188447a05SGarrett D'Amore /*
288447a05SGarrett D'Amore * CDDL HEADER START
388447a05SGarrett D'Amore *
488447a05SGarrett D'Amore * The contents of this file are subject to the terms of the
588447a05SGarrett D'Amore * Common Development and Distribution License (the "License").
688447a05SGarrett D'Amore * You may not use this file except in compliance with the License.
788447a05SGarrett D'Amore *
888447a05SGarrett D'Amore * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
988447a05SGarrett D'Amore * or http://www.opensolaris.org/os/licensing.
1088447a05SGarrett D'Amore * See the License for the specific language governing permissions
1188447a05SGarrett D'Amore * and limitations under the License.
1288447a05SGarrett D'Amore *
1388447a05SGarrett D'Amore * When distributing Covered Code, include this CDDL HEADER in each
1488447a05SGarrett D'Amore * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1588447a05SGarrett D'Amore * If applicable, add the following below this CDDL HEADER, with the
1688447a05SGarrett D'Amore * fields enclosed by brackets "[]" replaced with your own identifying
1788447a05SGarrett D'Amore * information: Portions Copyright [yyyy] [name of copyright owner]
1888447a05SGarrett D'Amore *
1988447a05SGarrett D'Amore * CDDL HEADER END
2088447a05SGarrett D'Amore */
2188447a05SGarrett D'Amore /*
2288447a05SGarrett D'Amore * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
2388447a05SGarrett D'Amore * Use is subject to license terms.
2488447a05SGarrett D'Amore */
2588447a05SGarrett D'Amore
2688447a05SGarrett D'Amore /*
2788447a05SGarrett D'Amore * ADS (Analog Devices) codec extensions.
2888447a05SGarrett D'Amore */
2988447a05SGarrett D'Amore
3088447a05SGarrett D'Amore /*
3188447a05SGarrett D'Amore * TODO:
3288447a05SGarrett D'Amore *
3388447a05SGarrett D'Amore * Most vendors connect the surr-out of ad1980/ad1985 codecs to the
3488447a05SGarrett D'Amore * line-out jack. So far we haven't found which vendors don't
3588447a05SGarrett D'Amore * do that. So we assume that all vendors swap the surr-out
3688447a05SGarrett D'Amore * and the line-out outputs. So we need swap the two outputs.
3788447a05SGarrett D'Amore *
3888447a05SGarrett D'Amore * Historically we internally processed the "ad198x-swap-output"
3988447a05SGarrett D'Amore * property. If someday some vendors do not swap the outputs, we would
4088447a05SGarrett D'Amore * set "ad198x-swap-output = 0" in the driver.conf file, and unload
4188447a05SGarrett D'Amore * and reload the driver (or reboot).
4288447a05SGarrett D'Amore *
4388447a05SGarrett D'Amore * TODO:
4488447a05SGarrett D'Amore *
4588447a05SGarrett D'Amore * Since we don't have access (at present) to any such systems, we have
4688447a05SGarrett D'Amore * not implemented this swapping property. Once we can test it, we will
4788447a05SGarrett D'Amore * add it. This is noted as CR 6819556.
4888447a05SGarrett D'Amore *
4988447a05SGarrett D'Amore * The old code did this:
5088447a05SGarrett D'Amore *
5188447a05SGarrett D'Amore * if (ddi_prop_get_int(DDI_DEV_T_ANY, statep->dip,
5288447a05SGarrett D'Amore * DDI_PROP_DONTPASS, "ad198x-swap-output", 1) == 1) {
5388447a05SGarrett D'Amore * statep->swap_out = B_TRUE;
5488447a05SGarrett D'Amore * (void) audioixp_read_ac97(statep, CODEC_AD_REG_MISC, &tmp);
5588447a05SGarrett D'Amore * (void) audioixp_write_ac97(statep,
5688447a05SGarrett D'Amore * CODEC_AD_REG_MISC,
5788447a05SGarrett D'Amore * tmp | AD1980_MISC_LOSEL | AD1980_MISC_HPSEL);
5888447a05SGarrett D'Amore *
5988447a05SGarrett D'Amore */
6088447a05SGarrett D'Amore
6188447a05SGarrett D'Amore #include <sys/types.h>
6288447a05SGarrett D'Amore #include <sys/ddi.h>
6388447a05SGarrett D'Amore #include <sys/sunddi.h>
6488447a05SGarrett D'Amore #include <sys/audio/audio_driver.h>
6588447a05SGarrett D'Amore #include <sys/audio/ac97.h>
6688447a05SGarrett D'Amore #include <sys/note.h>
6788447a05SGarrett D'Amore #include "ac97_impl.h"
6888447a05SGarrett D'Amore
6988447a05SGarrett D'Amore #define ADS_EQ_CTRL_REGISTER 0x60
7088447a05SGarrett D'Amore #define AECR_EQM 0x8000 /* disable EQ */
7188447a05SGarrett D'Amore #define AECR_SYM 0x0080
7288447a05SGarrett D'Amore
7388447a05SGarrett D'Amore #define ADS_EQ_DATA_REGISTER 0x62
7488447a05SGarrett D'Amore
7588447a05SGarrett D'Amore #define ADS_MIXER_ADC_IGAIN_REGISTER 0x64
7688447a05SGarrett D'Amore #define AMADIR_LEFT_MASK 0x0f00
7788447a05SGarrett D'Amore #define AMADIR_RIGHT_MASK 0x000f
7888447a05SGarrett D'Amore #define AMADIR_MXM 0x8000
7988447a05SGarrett D'Amore
8088447a05SGarrett D'Amore #define ADS_JS_INTS_STATUS_REGISTER 0x72
8188447a05SGarrett D'Amore #define AJISR_JS0INT 0x0001
8288447a05SGarrett D'Amore #define AJISR_JS1INT 0x0002
8388447a05SGarrett D'Amore #define AJISR_JS0ST 0x0004
8488447a05SGarrett D'Amore #define AJISR_JS1ST 0x0008
8588447a05SGarrett D'Amore #define AJISR_JS0MD 0x0010
8688447a05SGarrett D'Amore #define AJISR_JS1MD 0x0020
8788447a05SGarrett D'Amore #define AJISR_JS0TMR 0x0040
8888447a05SGarrett D'Amore #define AJISR_JS1TMR 0x0080
8988447a05SGarrett D'Amore #define AJISR_JS0EQB 0x0100
9088447a05SGarrett D'Amore #define AJISR_JS1EQB 0x0200
9188447a05SGarrett D'Amore #define AJISR_JSMT_MASK 0x1c00
9288447a05SGarrett D'Amore #define AJISR_JSMT_NONE 0x0000
9388447a05SGarrett D'Amore #define AJISR_JSMT_HP_LNOUT 0x0400 /* hp mutes line out */
9488447a05SGarrett D'Amore #define AJISR_JSMT_HP_BOTH 0x0800 /* hp mutes both mono & line */
9588447a05SGarrett D'Amore #define AJISR_JSMT_LNOUT_MONO 0x1000 /* lineout mutes mono */
9688447a05SGarrett D'Amore #define AJISR_JSMT_ALL 0x1800 /* all JS muting enabled */
9788447a05SGarrett D'Amore
9888447a05SGarrett D'Amore #define ADS_SERIAL_CFG_REGISTER 0x74
9988447a05SGarrett D'Amore #define ASCR_SPLNK 0x0001
10088447a05SGarrett D'Amore #define ASCR_SPDZ 0x0002
10188447a05SGarrett D'Amore #define ASCR_SPAL 0x0004
10288447a05SGarrett D'Amore #define ASCR_INTS 0x0010
10388447a05SGarrett D'Amore #define ASCR_CHEN 0x0100
10488447a05SGarrett D'Amore #define ASCR_REGM0 0x1000
10588447a05SGarrett D'Amore #define ASCR_REGM1 0x2000
10688447a05SGarrett D'Amore #define ASCR_REGM2 0x4000
10788447a05SGarrett D'Amore #define ASCR_SLOT16 0x8000
10888447a05SGarrett D'Amore
10988447a05SGarrett D'Amore #define ADS_MISC_CFG_REGISTER 0x76
11088447a05SGarrett D'Amore #define AMCR_MBG_MASK 0x0003
11188447a05SGarrett D'Amore #define AMCR_MBG_20dB 0x0000
11288447a05SGarrett D'Amore #define AMCR_MBG_10dB 0x0001
11388447a05SGarrett D'Amore #define AMCR_MBG_30dB 0x0002
11488447a05SGarrett D'Amore #define AMCR_VREFD 0x0004
11588447a05SGarrett D'Amore #define AMCR_VREFH 0x0008
11688447a05SGarrett D'Amore #define AMCR_MADST 0x0010 /* AD1981B */
11788447a05SGarrett D'Amore #define AMCR_SRU 0x0010 /* AD1980 */
11888447a05SGarrett D'Amore #define AMCR_LOSEL 0x0020 /* AD1980 */
11988447a05SGarrett D'Amore #define AMCR_2CMIC 0x0040
12088447a05SGarrett D'Amore #define AMCR_MADPD 0x0080 /* AD1981B */
12188447a05SGarrett D'Amore #define AMCR_SPRD 0x0080 /* AD1980 */
12288447a05SGarrett D'Amore #define AMCR_DMIX_6TO2 0x0100 /* AD1980 */
12388447a05SGarrett D'Amore #define AMCR_DMIX_FORCE 0x0200 /* AD1980 */
12488447a05SGarrett D'Amore #define AMCR_FMXE 0x0200 /* AD1981B */
12588447a05SGarrett D'Amore #define AMCR_HPSEL 0x0400 /* AD1980 */
12688447a05SGarrett D'Amore #define AMCR_CLDIS 0x0800 /* AD1980 */
12788447a05SGarrett D'Amore #define AMCR_LODIS 0x1000 /* AD1980 */
12888447a05SGarrett D'Amore #define AMCR_DAM 0x0800 /* AD1981B */
12988447a05SGarrett D'Amore #define AMCR_MSPLT 0x2000
13088447a05SGarrett D'Amore #define AMCR_AC97NC 0x4000 /* AD1980 */
13188447a05SGarrett D'Amore #define AMCR_DACZ 0x8000
13288447a05SGarrett D'Amore
13388447a05SGarrett D'Amore static void
ads_set_micboost(ac97_ctrl_t * actrl,uint64_t value)13488447a05SGarrett D'Amore ads_set_micboost(ac97_ctrl_t *actrl, uint64_t value)
13588447a05SGarrett D'Amore {
13688447a05SGarrett D'Amore ac97_t *ac = actrl->actrl_ac97;
13788447a05SGarrett D'Amore uint16_t v;
13888447a05SGarrett D'Amore
139*33ab04abSGarrett D'Amore ac_wr(ac, AC97_INTERRUPT_PAGING_REGISTER, 0); /* select page 0 */
14088447a05SGarrett D'Amore switch (value) {
14188447a05SGarrett D'Amore case 0x1:
14288447a05SGarrett D'Amore /* 0db */
143*33ab04abSGarrett D'Amore ac_clr(ac, AC97_MIC_VOLUME_REGISTER, MICVR_20dB_BOOST);
14488447a05SGarrett D'Amore break;
14588447a05SGarrett D'Amore case 0x2:
14688447a05SGarrett D'Amore /* 10dB */
147*33ab04abSGarrett D'Amore ac_set(ac, AC97_MIC_VOLUME_REGISTER, MICVR_20dB_BOOST);
148*33ab04abSGarrett D'Amore v = ac_rd(ac, ADS_MISC_CFG_REGISTER);
14988447a05SGarrett D'Amore v &= ~AMCR_MBG_MASK;
15088447a05SGarrett D'Amore v |= AMCR_MBG_10dB;
151*33ab04abSGarrett D'Amore ac_wr(ac, ADS_MISC_CFG_REGISTER, v);
15288447a05SGarrett D'Amore break;
15388447a05SGarrett D'Amore case 0x4:
15488447a05SGarrett D'Amore /* 20dB */
155*33ab04abSGarrett D'Amore ac_set(ac, AC97_MIC_VOLUME_REGISTER, MICVR_20dB_BOOST);
156*33ab04abSGarrett D'Amore v = ac_rd(ac, ADS_MISC_CFG_REGISTER);
15788447a05SGarrett D'Amore v &= ~AMCR_MBG_MASK;
15888447a05SGarrett D'Amore v |= AMCR_MBG_20dB;
159*33ab04abSGarrett D'Amore ac_wr(ac, ADS_MISC_CFG_REGISTER, v);
16088447a05SGarrett D'Amore break;
16188447a05SGarrett D'Amore case 0x8:
16288447a05SGarrett D'Amore /* 30dB */
163*33ab04abSGarrett D'Amore ac_set(ac, AC97_MIC_VOLUME_REGISTER, MICVR_20dB_BOOST);
164*33ab04abSGarrett D'Amore v = ac_rd(ac, ADS_MISC_CFG_REGISTER);
16588447a05SGarrett D'Amore v &= ~AMCR_MBG_MASK;
16688447a05SGarrett D'Amore v |= AMCR_MBG_30dB;
167*33ab04abSGarrett D'Amore ac_wr(ac, ADS_MISC_CFG_REGISTER, v);
16888447a05SGarrett D'Amore break;
16988447a05SGarrett D'Amore }
17088447a05SGarrett D'Amore }
17188447a05SGarrett D'Amore
17288447a05SGarrett D'Amore static void
ads_set_micsrc(ac97_ctrl_t * actrl,uint64_t value)17388447a05SGarrett D'Amore ads_set_micsrc(ac97_ctrl_t *actrl, uint64_t value)
17488447a05SGarrett D'Amore {
17588447a05SGarrett D'Amore ac97_t *ac = actrl->actrl_ac97;
17688447a05SGarrett D'Amore
177*33ab04abSGarrett D'Amore ac_wr(ac, AC97_INTERRUPT_PAGING_REGISTER, 0); /* select page 0 */
17888447a05SGarrett D'Amore switch (value) {
17988447a05SGarrett D'Amore case 0x1: /* mic1 */
180*33ab04abSGarrett D'Amore ac_clr(ac, ADS_MISC_CFG_REGISTER, AMCR_2CMIC);
181*33ab04abSGarrett D'Amore ac_clr(ac, AC97_GENERAL_PURPOSE_REGISTER, GPR_MS_MIC2);
18288447a05SGarrett D'Amore break;
18388447a05SGarrett D'Amore case 0x2: /* mic2 */
184*33ab04abSGarrett D'Amore ac_clr(ac, ADS_MISC_CFG_REGISTER, AMCR_2CMIC);
185*33ab04abSGarrett D'Amore ac_set(ac, AC97_GENERAL_PURPOSE_REGISTER, GPR_MS_MIC2);
18688447a05SGarrett D'Amore break;
18788447a05SGarrett D'Amore case 0x4: /* stereo - ms bit clear to allow MIC1 to be mixed */
188*33ab04abSGarrett D'Amore ac_set(ac, ADS_MISC_CFG_REGISTER, AMCR_2CMIC);
189*33ab04abSGarrett D'Amore ac_clr(ac, AC97_GENERAL_PURPOSE_REGISTER, GPR_MS_MIC2);
19088447a05SGarrett D'Amore break;
19188447a05SGarrett D'Amore }
19288447a05SGarrett D'Amore }
19388447a05SGarrett D'Amore
19488447a05SGarrett D'Amore static void
ads_setup_micsrc(ac97_t * ac)19588447a05SGarrett D'Amore ads_setup_micsrc(ac97_t *ac)
19688447a05SGarrett D'Amore {
19788447a05SGarrett D'Amore static const char *values[] = {
19888447a05SGarrett D'Amore AUDIO_PORT_MIC1,
19988447a05SGarrett D'Amore AUDIO_PORT_MIC2,
20088447a05SGarrett D'Amore AUDIO_PORT_STEREO,
20188447a05SGarrett D'Amore NULL
20288447a05SGarrett D'Amore };
20388447a05SGarrett D'Amore ac97_ctrl_probe_t cpt = {
20488447a05SGarrett D'Amore AUDIO_CTRL_ID_MICSRC, 1, 0x7, 0x7, AUDIO_CTRL_TYPE_ENUM,
20588447a05SGarrett D'Amore AC97_FLAGS | AUDIO_CTRL_FLAG_REC, 0, ads_set_micsrc,
20688447a05SGarrett D'Amore NULL, 0, values };
20788447a05SGarrett D'Amore
208*33ab04abSGarrett D'Amore ac_add_control(ac, &cpt);
20988447a05SGarrett D'Amore }
21088447a05SGarrett D'Amore
21188447a05SGarrett D'Amore static void
ads_setup_micboost(ac97_t * ac)21288447a05SGarrett D'Amore ads_setup_micboost(ac97_t *ac)
21388447a05SGarrett D'Amore {
21488447a05SGarrett D'Amore ac97_ctrl_t *ctrl;
21588447a05SGarrett D'Amore
21688447a05SGarrett D'Amore static const char *values[] = {
21788447a05SGarrett D'Amore AUDIO_VALUE_OFF, /* 0dB */
21888447a05SGarrett D'Amore AUDIO_VALUE_LOW, /* 10dB */
21988447a05SGarrett D'Amore AUDIO_VALUE_MEDIUM, /* 20dB */
22088447a05SGarrett D'Amore AUDIO_VALUE_HIGH, /* 30dB */
22188447a05SGarrett D'Amore NULL
22288447a05SGarrett D'Amore };
22388447a05SGarrett D'Amore ac97_ctrl_probe_t cpt = {
22488447a05SGarrett D'Amore AUDIO_CTRL_ID_MICBOOST, 1, 0xf, 0xf, AUDIO_CTRL_TYPE_ENUM,
22588447a05SGarrett D'Amore AC97_FLAGS | AUDIO_CTRL_FLAG_REC, 0, ads_set_micboost,
22688447a05SGarrett D'Amore NULL, 0, values };
22788447a05SGarrett D'Amore
22888447a05SGarrett D'Amore ctrl = ac97_control_find(ac, AUDIO_CTRL_ID_MICBOOST);
22988447a05SGarrett D'Amore if (ctrl) {
23088447a05SGarrett D'Amore if (ctrl->actrl_initval) {
23188447a05SGarrett D'Amore /* 20dB by default */
23288447a05SGarrett D'Amore cpt.cp_initval = 2;
23388447a05SGarrett D'Amore }
23488447a05SGarrett D'Amore }
23588447a05SGarrett D'Amore
236*33ab04abSGarrett D'Amore ac_add_control(ac, &cpt);
23788447a05SGarrett D'Amore }
23888447a05SGarrett D'Amore
23988447a05SGarrett D'Amore void
ad1981a_init(ac97_t * ac)24088447a05SGarrett D'Amore ad1981a_init(ac97_t *ac)
24188447a05SGarrett D'Amore {
24288447a05SGarrett D'Amore ads_setup_micboost(ac);
24388447a05SGarrett D'Amore }
24488447a05SGarrett D'Amore
24588447a05SGarrett D'Amore void
ad1981b_init(ac97_t * ac)24688447a05SGarrett D'Amore ad1981b_init(ac97_t *ac)
24788447a05SGarrett D'Amore {
24888447a05SGarrett D'Amore ads_setup_micboost(ac);
24988447a05SGarrett D'Amore ads_setup_micsrc(ac); /* this part can use a mic array */
25088447a05SGarrett D'Amore }
251