1 /* 2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2008 Atheros Communications Inc. 8 * 9 * Permission to use, copy, modify, and/or distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 #ifndef _ARN_REGD_COMMON_H 23 #define _ARN_REGD_COMMON_H 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 enum EnumRd { 30 NO_ENUMRD = 0x00, 31 NULL1_WORLD = 0x03, 32 NULL1_ETSIB = 0x07, 33 NULL1_ETSIC = 0x08, 34 FCC1_FCCA = 0x10, 35 FCC1_WORLD = 0x11, 36 FCC4_FCCA = 0x12, 37 FCC5_FCCA = 0x13, 38 FCC6_FCCA = 0x14, 39 40 FCC2_FCCA = 0x20, 41 FCC2_WORLD = 0x21, 42 FCC2_ETSIC = 0x22, 43 FCC6_WORLD = 0x23, 44 FRANCE_RES = 0x31, 45 FCC3_FCCA = 0x3A, 46 FCC3_WORLD = 0x3B, 47 48 ETSI1_WORLD = 0x37, 49 ETSI3_ETSIA = 0x32, 50 ETSI2_WORLD = 0x35, 51 ETSI3_WORLD = 0x36, 52 ETSI4_WORLD = 0x30, 53 ETSI4_ETSIC = 0x38, 54 ETSI5_WORLD = 0x39, 55 ETSI6_WORLD = 0x34, 56 ETSI_RESERVED = 0x33, 57 58 MKK1_MKKA = 0x40, 59 MKK1_MKKB = 0x41, 60 APL4_WORLD = 0x42, 61 MKK2_MKKA = 0x43, 62 APL_RESERVED = 0x44, 63 APL2_WORLD = 0x45, 64 APL2_APLC = 0x46, 65 APL3_WORLD = 0x47, 66 MKK1_FCCA = 0x48, 67 APL2_APLD = 0x49, 68 MKK1_MKKA1 = 0x4A, 69 MKK1_MKKA2 = 0x4B, 70 MKK1_MKKC = 0x4C, 71 72 APL3_FCCA = 0x50, 73 APL1_WORLD = 0x52, 74 APL1_FCCA = 0x53, 75 APL1_APLA = 0x54, 76 APL1_ETSIC = 0x55, 77 APL2_ETSIC = 0x56, 78 APL5_WORLD = 0x58, 79 APL6_WORLD = 0x5B, 80 APL7_FCCA = 0x5C, 81 APL8_WORLD = 0x5D, 82 APL9_WORLD = 0x5E, 83 84 WOR0_WORLD = 0x60, 85 WOR1_WORLD = 0x61, 86 WOR2_WORLD = 0x62, 87 WOR3_WORLD = 0x63, 88 WOR4_WORLD = 0x64, 89 WOR5_ETSIC = 0x65, 90 91 WOR01_WORLD = 0x66, 92 WOR02_WORLD = 0x67, 93 EU1_WORLD = 0x68, 94 95 WOR9_WORLD = 0x69, 96 WORA_WORLD = 0x6A, 97 WORB_WORLD = 0x6B, 98 99 MKK3_MKKB = 0x80, 100 MKK3_MKKA2 = 0x81, 101 MKK3_MKKC = 0x82, 102 103 MKK4_MKKB = 0x83, 104 MKK4_MKKA2 = 0x84, 105 MKK4_MKKC = 0x85, 106 107 MKK5_MKKB = 0x86, 108 MKK5_MKKA2 = 0x87, 109 MKK5_MKKC = 0x88, 110 111 MKK6_MKKB = 0x89, 112 MKK6_MKKA2 = 0x8A, 113 MKK6_MKKC = 0x8B, 114 115 MKK7_MKKB = 0x8C, 116 MKK7_MKKA2 = 0x8D, 117 MKK7_MKKC = 0x8E, 118 119 MKK8_MKKB = 0x8F, 120 MKK8_MKKA2 = 0x90, 121 MKK8_MKKC = 0x91, 122 123 MKK14_MKKA1 = 0x92, 124 MKK15_MKKA1 = 0x93, 125 126 MKK10_FCCA = 0xD0, 127 MKK10_MKKA1 = 0xD1, 128 MKK10_MKKC = 0xD2, 129 MKK10_MKKA2 = 0xD3, 130 131 MKK11_MKKA = 0xD4, 132 MKK11_FCCA = 0xD5, 133 MKK11_MKKA1 = 0xD6, 134 MKK11_MKKC = 0xD7, 135 MKK11_MKKA2 = 0xD8, 136 137 MKK12_MKKA = 0xD9, 138 MKK12_FCCA = 0xDA, 139 MKK12_MKKA1 = 0xDB, 140 MKK12_MKKC = 0xDC, 141 MKK12_MKKA2 = 0xDD, 142 143 MKK13_MKKB = 0xDE, 144 145 MKK3_MKKA = 0xF0, 146 MKK3_MKKA1 = 0xF1, 147 MKK3_FCCA = 0xF2, 148 MKK4_MKKA = 0xF3, 149 MKK4_MKKA1 = 0xF4, 150 MKK4_FCCA = 0xF5, 151 MKK9_MKKA = 0xF6, 152 MKK10_MKKA = 0xF7, 153 MKK6_MKKA1 = 0xF8, 154 MKK6_FCCA = 0xF9, 155 MKK7_MKKA1 = 0xFA, 156 MKK7_FCCA = 0xFB, 157 MKK9_FCCA = 0xFC, 158 MKK9_MKKA1 = 0xFD, 159 MKK9_MKKC = 0xFE, 160 MKK9_MKKA2 = 0xFF, 161 162 APL1 = 0x0150, 163 APL2 = 0x0250, 164 APL3 = 0x0350, 165 APL4 = 0x0450, 166 APL5 = 0x0550, 167 APL6 = 0x0650, 168 APL7 = 0x0750, 169 APL8 = 0x0850, 170 APL9 = 0x0950, 171 APL10 = 0x1050, 172 173 ETSI1 = 0x0130, 174 ETSI2 = 0x0230, 175 ETSI3 = 0x0330, 176 ETSI4 = 0x0430, 177 ETSI5 = 0x0530, 178 ETSI6 = 0x0630, 179 ETSIA = 0x0A30, 180 ETSIB = 0x0B30, 181 ETSIC = 0x0C30, 182 183 FCC1 = 0x0110, 184 FCC2 = 0x0120, 185 FCC3 = 0x0160, 186 FCC4 = 0x0165, 187 FCC5 = 0x0510, 188 FCC6 = 0x0610, 189 FCCA = 0x0A10, 190 191 APLD = 0x0D50, 192 193 MKK1 = 0x0140, 194 MKK2 = 0x0240, 195 MKK3 = 0x0340, 196 MKK4 = 0x0440, 197 MKK5 = 0x0540, 198 MKK6 = 0x0640, 199 MKK7 = 0x0740, 200 MKK8 = 0x0840, 201 MKK9 = 0x0940, 202 MKK10 = 0x0B40, 203 MKK11 = 0x1140, 204 MKK12 = 0x1240, 205 MKK13 = 0x0C40, 206 MKK14 = 0x1440, 207 MKK15 = 0x1540, 208 MKKA = 0x0A40, 209 MKKC = 0x0A50, 210 211 NULL1 = 0x0198, 212 WORLD = 0x0199, 213 DEBUG_REG_DMN = 0x01ff, 214 }; 215 216 enum { 217 FCC = 0x10, 218 MKK = 0x40, 219 ETSI = 0x30, 220 }; 221 222 enum { 223 NO_REQ = 0x00000000, 224 DISALLOW_ADHOC_11A = 0x00000001, 225 DISALLOW_ADHOC_11A_TURB = 0x00000002, 226 NEED_NFC = 0x00000004, 227 228 ADHOC_PER_11D = 0x00000008, 229 ADHOC_NO_11A = 0x00000010, 230 231 PUBLIC_SAFETY_DOMAIN = 0x00000020, 232 LIMIT_FRAME_4MS = 0x00000040, 233 234 NO_HOSTAP = 0x00000080, 235 236 REQ_MASK = 0x000000FF, 237 }; 238 239 #define REG_DOMAIN_2GHZ_MASK (REQ_MASK & \ 240 (~(ADHOC_NO_11A | DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB))) 241 #define REG_DOMAIN_5GHZ_MASK REQ_MASK 242 243 static struct reg_dmn_pair_mapping regDomainPairs[] = { 244 {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ, 245 PSCAN_DEFER, 0}, 246 {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 247 {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 248 {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 249 250 {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 251 {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 252 {FCC2_ETSIC, FCC2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 253 {FCC3_FCCA, FCC3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 254 {FCC3_WORLD, FCC3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 255 {FCC4_FCCA, FCC4, FCCA, 256 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 257 0}, 258 {FCC5_FCCA, FCC5, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 259 {FCC6_FCCA, FCC6, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 260 {FCC6_WORLD, FCC6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 261 262 {ETSI1_WORLD, ETSI1, WORLD, 263 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 264 0}, 265 {ETSI2_WORLD, ETSI2, WORLD, 266 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 267 0}, 268 {ETSI3_WORLD, ETSI3, WORLD, 269 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 270 0}, 271 {ETSI4_WORLD, ETSI4, WORLD, 272 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 273 0}, 274 {ETSI5_WORLD, ETSI5, WORLD, 275 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 276 0}, 277 {ETSI6_WORLD, ETSI6, WORLD, 278 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 279 0}, 280 281 {ETSI3_ETSIA, ETSI3, WORLD, 282 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 283 0}, 284 {FRANCE_RES, ETSI3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 285 286 {FCC1_WORLD, FCC1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 287 {FCC1_FCCA, FCC1, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 288 {APL1_WORLD, APL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 289 {APL2_WORLD, APL2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 290 {APL3_WORLD, APL3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 291 {APL4_WORLD, APL4, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 292 {APL5_WORLD, APL5, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 293 {APL6_WORLD, APL6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 294 {APL8_WORLD, APL8, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 295 {APL9_WORLD, APL9, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 296 297 {APL3_FCCA, APL3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 298 {APL1_ETSIC, APL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 299 {APL2_ETSIC, APL2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 300 {APL2_APLD, APL2, APLD, NO_REQ, NO_REQ, PSCAN_DEFER, }, 301 302 {MKK1_MKKA, MKK1, MKKA, 303 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 304 PSCAN_MKK1 | PSCAN_MKKA, CTRY_JAPAN}, 305 {MKK1_MKKB, MKK1, MKKA, 306 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 307 LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, 308 CTRY_JAPAN1}, 309 {MKK1_FCCA, MKK1, FCCA, 310 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 311 PSCAN_MKK1, CTRY_JAPAN2}, 312 {MKK1_MKKA1, MKK1, MKKA, 313 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 314 PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN4}, 315 {MKK1_MKKA2, MKK1, MKKA, 316 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 317 PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN5}, 318 {MKK1_MKKC, MKK1, MKKC, 319 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 320 PSCAN_MKK1, CTRY_JAPAN6}, 321 322 {MKK2_MKKA, MKK2, MKKA, 323 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 324 LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKKA | PSCAN_MKKA_G, 325 CTRY_JAPAN3}, 326 327 {MKK3_MKKA, MKK3, MKKA, 328 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 329 PSCAN_MKKA, CTRY_JAPAN25}, 330 {MKK3_MKKB, MKK3, MKKA, 331 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 332 LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA | PSCAN_MKKA_G, 333 CTRY_JAPAN7}, 334 {MKK3_MKKA1, MKK3, MKKA, 335 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 336 PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN26}, 337 {MKK3_MKKA2, MKK3, MKKA, 338 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 339 PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN8}, 340 {MKK3_MKKC, MKK3, MKKC, 341 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 342 NO_PSCAN, CTRY_JAPAN9}, 343 {MKK3_FCCA, MKK3, FCCA, 344 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 345 NO_PSCAN, CTRY_JAPAN27}, 346 347 {MKK4_MKKA, MKK4, MKKA, 348 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 349 PSCAN_MKK3, CTRY_JAPAN36}, 350 {MKK4_MKKB, MKK4, MKKA, 351 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 352 LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 353 CTRY_JAPAN10}, 354 {MKK4_MKKA1, MKK4, MKKA, 355 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 356 PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN28}, 357 {MKK4_MKKA2, MKK4, MKKA, 358 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 359 PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11}, 360 {MKK4_MKKC, MKK4, MKKC, 361 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 362 PSCAN_MKK3, CTRY_JAPAN12}, 363 {MKK4_FCCA, MKK4, FCCA, 364 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 365 PSCAN_MKK3, CTRY_JAPAN29}, 366 367 {MKK5_MKKB, MKK5, MKKA, 368 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 369 LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 370 CTRY_JAPAN13}, 371 {MKK5_MKKA2, MKK5, MKKA, 372 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 373 PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN14}, 374 {MKK5_MKKC, MKK5, MKKC, 375 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 376 PSCAN_MKK3, CTRY_JAPAN15}, 377 378 {MKK6_MKKB, MKK6, MKKA, 379 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 380 PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN16}, 381 {MKK6_MKKA1, MKK6, MKKA, 382 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 383 PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN30}, 384 {MKK6_MKKA2, MKK6, MKKA, 385 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 386 PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN17}, 387 {MKK6_MKKC, MKK6, MKKC, 388 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 389 PSCAN_MKK1, CTRY_JAPAN18}, 390 {MKK6_FCCA, MKK6, FCCA, 391 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 392 NO_PSCAN, CTRY_JAPAN31}, 393 394 {MKK7_MKKB, MKK7, MKKA, 395 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 396 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 397 CTRY_JAPAN19}, 398 {MKK7_MKKA1, MKK7, MKKA, 399 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 400 PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN32}, 401 {MKK7_MKKA2, MKK7, MKKA, 402 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 403 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, 404 CTRY_JAPAN20}, 405 {MKK7_MKKC, MKK7, MKKC, 406 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 407 PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN21}, 408 {MKK7_FCCA, MKK7, FCCA, 409 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 410 PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN33}, 411 412 {MKK8_MKKB, MKK8, MKKA, 413 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 414 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 415 CTRY_JAPAN22}, 416 {MKK8_MKKA2, MKK8, MKKA, 417 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 418 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, 419 CTRY_JAPAN23}, 420 {MKK8_MKKC, MKK8, MKKC, 421 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 422 PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN24}, 423 424 {MKK9_MKKA, MKK9, MKKA, 425 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 426 LIMIT_FRAME_4MS, NEED_NFC, 427 PSCAN_MKK2 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 428 CTRY_JAPAN34}, 429 {MKK9_FCCA, MKK9, FCCA, 430 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 431 NO_PSCAN, CTRY_JAPAN37}, 432 {MKK9_MKKA1, MKK9, MKKA, 433 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 434 PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN38}, 435 {MKK9_MKKA2, MKK9, MKKA, 436 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 437 PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN40}, 438 {MKK9_MKKC, MKK9, MKKC, 439 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 440 NO_PSCAN, CTRY_JAPAN39}, 441 442 {MKK10_MKKA, MKK10, MKKA, 443 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 444 LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKK3, CTRY_JAPAN35}, 445 {MKK10_FCCA, MKK10, FCCA, 446 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 447 NO_PSCAN, CTRY_JAPAN41}, 448 {MKK10_MKKA1, MKK10, MKKA, 449 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 450 PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN42}, 451 {MKK10_MKKA2, MKK10, MKKA, 452 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 453 PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN44}, 454 {MKK10_MKKC, MKK10, MKKC, 455 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 456 NO_PSCAN, CTRY_JAPAN43}, 457 458 {MKK11_MKKA, MKK11, MKKA, 459 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 460 PSCAN_MKK3, CTRY_JAPAN45}, 461 {MKK11_FCCA, MKK11, FCCA, 462 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 463 PSCAN_MKK3, CTRY_JAPAN46}, 464 {MKK11_MKKA1, MKK11, MKKA, 465 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 466 PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN47}, 467 {MKK11_MKKA2, MKK11, MKKA, 468 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 469 PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN49}, 470 {MKK11_MKKC, MKK11, MKKC, 471 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 472 PSCAN_MKK3, CTRY_JAPAN48}, 473 474 {MKK12_MKKA, MKK12, MKKA, 475 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 476 PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN50}, 477 {MKK12_FCCA, MKK12, FCCA, 478 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 479 PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN51}, 480 {MKK12_MKKA1, MKK12, MKKA, 481 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 482 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, 483 CTRY_JAPAN52}, 484 {MKK12_MKKA2, MKK12, MKKA, 485 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 486 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, 487 CTRY_JAPAN54}, 488 {MKK12_MKKC, MKK12, MKKC, 489 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 490 PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN53}, 491 492 {MKK13_MKKB, MKK13, MKKA, 493 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | 494 LIMIT_FRAME_4MS, NEED_NFC, 495 PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 496 CTRY_JAPAN57}, 497 498 {MKK14_MKKA1, MKK14, MKKA, 499 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 500 PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN58}, 501 {MKK15_MKKA1, MKK15, MKKA, 502 DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, 503 PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN59}, 504 505 {WOR0_WORLD, WOR0_WORLD, WOR0_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 506 0}, 507 {WOR1_WORLD, WOR1_WORLD, WOR1_WORLD, 508 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 509 0}, 510 {WOR2_WORLD, WOR2_WORLD, WOR2_WORLD, DISALLOW_ADHOC_11A_TURB, 511 NO_REQ, PSCAN_DEFER, 0}, 512 {WOR3_WORLD, WOR3_WORLD, WOR3_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 513 0}, 514 {WOR4_WORLD, WOR4_WORLD, WOR4_WORLD, 515 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 516 0}, 517 {WOR5_ETSIC, WOR5_ETSIC, WOR5_ETSIC, 518 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 519 0}, 520 {WOR01_WORLD, WOR01_WORLD, WOR01_WORLD, NO_REQ, NO_REQ, 521 PSCAN_DEFER, 0}, 522 {WOR02_WORLD, WOR02_WORLD, WOR02_WORLD, NO_REQ, NO_REQ, 523 PSCAN_DEFER, 0}, 524 {EU1_WORLD, EU1_WORLD, EU1_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0}, 525 {WOR9_WORLD, WOR9_WORLD, WOR9_WORLD, 526 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 527 0}, 528 {WORA_WORLD, WORA_WORLD, WORA_WORLD, 529 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 530 0}, 531 {WORB_WORLD, WORB_WORLD, WORB_WORLD, 532 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 533 0}, 534 }; 535 536 #define NO_INTERSECT_REQ 0xFFFFFFFF 537 #define NO_UNION_REQ 0 538 539 static struct country_code_to_enum_rd allCountries[] = { 540 {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES, 541 YES, YES, 7000}, 542 {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES, 543 YES, YES, YES, YES, 7000}, 544 {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, YES, NO, 545 NO, NO, 7000}, 546 {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, YES, NO, 547 NO, NO, 7000}, 548 {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, YES, 549 NO, YES, NO, 7000}, 550 {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, YES, 551 YES, NO, NO, 7000}, 552 {CTRY_AUSTRALIA, FCC2_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES, 553 YES, YES, YES, 7000}, 554 {CTRY_AUSTRALIA2, FCC6_WORLD, "AU", "AUSTRALIA2", YES, YES, YES, 555 YES, YES, YES, YES, 7000}, 556 {CTRY_AUSTRIA, ETSI1_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES, 557 YES, YES, YES, 7000}, 558 {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES, 559 YES, YES, YES, YES, 7000}, 560 {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, YES, YES, 561 YES, NO, 7000}, 562 {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES, 563 YES, YES, YES, 7000}, 564 {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES, 565 YES, YES, YES, 7000}, 566 {CTRY_BELGIUM2, ETSI4_WORLD, "BL", "BELGIUM", YES, NO, YES, YES, 567 YES, YES, YES, 7000}, 568 {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES, 569 YES, YES, 7000}, 570 {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES, 571 YES, YES, 7000}, 572 {CTRY_BOSNIA_HERZ, ETSI1_WORLD, "BA", "BOSNIA_HERZGOWINA", YES, NO, 573 YES, YES, YES, YES, NO, 7000}, 574 {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", YES, NO, NO, YES, NO, 575 YES, NO, 7000}, 576 {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN", "BRUNEI DARUSSALAM", 577 YES, YES, YES, YES, YES, YES, YES, 7000}, 578 {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES, 579 YES, YES, YES, 7000}, 580 {CTRY_CANADA, FCC2_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES, 581 YES, YES, 7000}, 582 {CTRY_CANADA2, FCC6_FCCA, "CA", "CANADA2", YES, YES, YES, YES, YES, 583 YES, YES, 7000}, 584 {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES, 585 YES, YES, 7000}, 586 {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES, 587 YES, YES, 7000}, 588 {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, YES, 589 YES, YES, NO, 7000}, 590 {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES, 591 YES, YES, YES, NO, 7000}, 592 {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, YES, 593 YES, YES, NO, 7000}, 594 {CTRY_CYPRUS, ETSI1_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES, 595 YES, YES, 7000}, 596 {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES, 597 YES, YES, YES, YES, 7000}, 598 {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES, 599 YES, YES, YES, 7000}, 600 {CTRY_DOMINICAN_REPUBLIC, FCC1_FCCA, "DO", "DOMINICAN REPUBLIC", 601 YES, YES, YES, YES, YES, YES, YES, 7000}, 602 {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, YES, YES, 603 YES, NO, 7000}, 604 {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, YES, YES, 605 YES, NO, 7000}, 606 {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES, 607 YES, YES, YES, NO, 7000}, 608 {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES, 609 YES, YES, YES, 7000}, 610 {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES, 611 YES, YES, YES, 7000}, 612 {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES, 613 YES, YES, 7000}, 614 {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES, 615 YES, YES, YES, 7000}, 616 {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES, 617 YES, YES, YES, 7000}, 618 {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES, 619 YES, YES, 7000}, 620 {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES, 621 YES, YES, YES, 7000}, 622 {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, YES, 623 YES, NO, NO, 7000}, 624 {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES, 625 YES, YES, YES, 7000}, 626 {CTRY_HUNGARY, ETSI1_WORLD, "HU", "HUNGARY", YES, NO, YES, YES, 627 YES, YES, YES, 7000}, 628 {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES, 629 YES, YES, YES, 7000}, 630 {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, YES, YES, 631 YES, NO, 7000}, 632 {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, YES, 633 YES, YES, NO, 7000}, 634 {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, YES, 635 YES, 7000}, 636 {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES, 637 YES, YES, YES, 7000}, 638 {CTRY_ISRAEL, NULL1_WORLD, "IL", "ISRAEL", YES, NO, YES, YES, YES, 639 NO, NO, 7000}, 640 {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES, 641 YES, YES, 7000}, 642 {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES, 643 YES, YES, YES, 7000}, 644 645 {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, YES, YES, YES, 646 YES, 7000}, 647 {CTRY_JAPAN1, MKK1_MKKB, "JP", "JAPAN1", YES, NO, NO, YES, YES, 648 YES, YES, 7000}, 649 {CTRY_JAPAN2, MKK1_FCCA, "JP", "JAPAN2", YES, NO, NO, YES, YES, 650 YES, YES, 7000}, 651 {CTRY_JAPAN3, MKK2_MKKA, "JP", "JAPAN3", YES, NO, NO, YES, YES, 652 YES, YES, 7000}, 653 {CTRY_JAPAN4, MKK1_MKKA1, "JP", "JAPAN4", YES, NO, NO, YES, YES, 654 YES, YES, 7000}, 655 {CTRY_JAPAN5, MKK1_MKKA2, "JP", "JAPAN5", YES, NO, NO, YES, YES, 656 YES, YES, 7000}, 657 {CTRY_JAPAN6, MKK1_MKKC, "JP", "JAPAN6", YES, NO, NO, YES, YES, 658 YES, YES, 7000}, 659 660 {CTRY_JAPAN7, MKK3_MKKB, "JP", "JAPAN7", YES, NO, NO, YES, YES, 661 YES, YES, 7000}, 662 {CTRY_JAPAN8, MKK3_MKKA2, "JP", "JAPAN8", YES, NO, NO, YES, YES, 663 YES, YES, 7000}, 664 {CTRY_JAPAN9, MKK3_MKKC, "JP", "JAPAN9", YES, NO, NO, YES, YES, 665 YES, YES, 7000}, 666 667 {CTRY_JAPAN10, MKK4_MKKB, "JP", "JAPAN10", YES, NO, NO, YES, YES, 668 YES, YES, 7000}, 669 {CTRY_JAPAN11, MKK4_MKKA2, "JP", "JAPAN11", YES, NO, NO, YES, YES, 670 YES, YES, 7000}, 671 {CTRY_JAPAN12, MKK4_MKKC, "JP", "JAPAN12", YES, NO, NO, YES, YES, 672 YES, YES, 7000}, 673 674 {CTRY_JAPAN13, MKK5_MKKB, "JP", "JAPAN13", YES, NO, NO, YES, YES, 675 YES, YES, 7000}, 676 {CTRY_JAPAN14, MKK5_MKKA2, "JP", "JAPAN14", YES, NO, NO, YES, YES, 677 YES, YES, 7000}, 678 {CTRY_JAPAN15, MKK5_MKKC, "JP", "JAPAN15", YES, NO, NO, YES, YES, 679 YES, YES, 7000}, 680 681 {CTRY_JAPAN16, MKK6_MKKB, "JP", "JAPAN16", YES, NO, NO, YES, YES, 682 YES, YES, 7000}, 683 {CTRY_JAPAN17, MKK6_MKKA2, "JP", "JAPAN17", YES, NO, NO, YES, YES, 684 YES, YES, 7000}, 685 {CTRY_JAPAN18, MKK6_MKKC, "JP", "JAPAN18", YES, NO, NO, YES, YES, 686 YES, YES, 7000}, 687 688 {CTRY_JAPAN19, MKK7_MKKB, "JP", "JAPAN19", YES, NO, NO, YES, YES, 689 YES, YES, 7000}, 690 {CTRY_JAPAN20, MKK7_MKKA2, "JP", "JAPAN20", YES, NO, NO, YES, YES, 691 YES, YES, 7000}, 692 {CTRY_JAPAN21, MKK7_MKKC, "JP", "JAPAN21", YES, NO, NO, YES, YES, 693 YES, YES, 7000}, 694 695 {CTRY_JAPAN22, MKK8_MKKB, "JP", "JAPAN22", YES, NO, NO, YES, YES, 696 YES, YES, 7000}, 697 {CTRY_JAPAN23, MKK8_MKKA2, "JP", "JAPAN23", YES, NO, NO, YES, YES, 698 YES, YES, 7000}, 699 {CTRY_JAPAN24, MKK8_MKKC, "JP", "JAPAN24", YES, NO, NO, YES, YES, 700 YES, YES, 7000}, 701 702 {CTRY_JAPAN25, MKK3_MKKA, "JP", "JAPAN25", YES, NO, NO, YES, YES, 703 YES, YES, 7000}, 704 {CTRY_JAPAN26, MKK3_MKKA1, "JP", "JAPAN26", YES, NO, NO, YES, YES, 705 YES, YES, 7000}, 706 {CTRY_JAPAN27, MKK3_FCCA, "JP", "JAPAN27", YES, NO, NO, YES, YES, 707 YES, YES, 7000}, 708 {CTRY_JAPAN28, MKK4_MKKA1, "JP", "JAPAN28", YES, NO, NO, YES, YES, 709 YES, YES, 7000}, 710 {CTRY_JAPAN29, MKK4_FCCA, "JP", "JAPAN29", YES, NO, NO, YES, YES, 711 YES, YES, 7000}, 712 {CTRY_JAPAN30, MKK6_MKKA1, "JP", "JAPAN30", YES, NO, NO, YES, YES, 713 YES, YES, 7000}, 714 {CTRY_JAPAN31, MKK6_FCCA, "JP", "JAPAN31", YES, NO, NO, YES, YES, 715 YES, YES, 7000}, 716 {CTRY_JAPAN32, MKK7_MKKA1, "JP", "JAPAN32", YES, NO, NO, YES, YES, 717 YES, YES, 7000}, 718 {CTRY_JAPAN33, MKK7_FCCA, "JP", "JAPAN33", YES, NO, NO, YES, YES, 719 YES, YES, 7000}, 720 {CTRY_JAPAN34, MKK9_MKKA, "JP", "JAPAN34", YES, NO, NO, YES, YES, 721 YES, YES, 7000}, 722 {CTRY_JAPAN35, MKK10_MKKA, "JP", "JAPAN35", YES, NO, NO, YES, YES, 723 YES, YES, 7000}, 724 {CTRY_JAPAN36, MKK4_MKKA, "JP", "JAPAN36", YES, NO, NO, YES, YES, 725 YES, YES, 7000}, 726 {CTRY_JAPAN37, MKK9_FCCA, "JP", "JAPAN37", YES, NO, NO, YES, YES, 727 YES, YES, 7000}, 728 {CTRY_JAPAN38, MKK9_MKKA1, "JP", "JAPAN38", YES, NO, NO, YES, YES, 729 YES, YES, 7000}, 730 {CTRY_JAPAN39, MKK9_MKKC, "JP", "JAPAN39", YES, NO, NO, YES, YES, 731 YES, YES, 7000}, 732 {CTRY_JAPAN40, MKK9_MKKA2, "JP", "JAPAN40", YES, NO, NO, YES, YES, 733 YES, YES, 7000}, 734 {CTRY_JAPAN41, MKK10_FCCA, "JP", "JAPAN41", YES, NO, NO, YES, YES, 735 YES, YES, 7000}, 736 {CTRY_JAPAN42, MKK10_MKKA1, "JP", "JAPAN42", YES, NO, NO, YES, YES, 737 YES, YES, 7000}, 738 {CTRY_JAPAN43, MKK10_MKKC, "JP", "JAPAN43", YES, NO, NO, YES, YES, 739 YES, YES, 7000}, 740 {CTRY_JAPAN44, MKK10_MKKA2, "JP", "JAPAN44", YES, NO, NO, YES, YES, 741 YES, YES, 7000}, 742 {CTRY_JAPAN45, MKK11_MKKA, "JP", "JAPAN45", YES, NO, NO, YES, YES, 743 YES, YES, 7000}, 744 {CTRY_JAPAN46, MKK11_FCCA, "JP", "JAPAN46", YES, NO, NO, YES, YES, 745 YES, YES, 7000}, 746 {CTRY_JAPAN47, MKK11_MKKA1, "JP", "JAPAN47", YES, NO, NO, YES, YES, 747 YES, YES, 7000}, 748 {CTRY_JAPAN48, MKK11_MKKC, "JP", "JAPAN48", YES, NO, NO, YES, YES, 749 YES, YES, 7000}, 750 {CTRY_JAPAN49, MKK11_MKKA2, "JP", "JAPAN49", YES, NO, NO, YES, YES, 751 YES, YES, 7000}, 752 {CTRY_JAPAN50, MKK12_MKKA, "JP", "JAPAN50", YES, NO, NO, YES, YES, 753 YES, YES, 7000}, 754 {CTRY_JAPAN51, MKK12_FCCA, "JP", "JAPAN51", YES, NO, NO, YES, YES, 755 YES, YES, 7000}, 756 {CTRY_JAPAN52, MKK12_MKKA1, "JP", "JAPAN52", YES, NO, NO, YES, YES, 757 YES, YES, 7000}, 758 {CTRY_JAPAN53, MKK12_MKKC, "JP", "JAPAN53", YES, NO, NO, YES, YES, 759 YES, YES, 7000}, 760 {CTRY_JAPAN54, MKK12_MKKA2, "JP", "JAPAN54", YES, NO, NO, YES, YES, 761 YES, YES, 7000}, 762 763 {CTRY_JAPAN57, MKK13_MKKB, "JP", "JAPAN57", YES, NO, NO, YES, YES, 764 YES, YES, 7000}, 765 {CTRY_JAPAN58, MKK14_MKKA1, "JP", "JAPAN58", YES, NO, NO, YES, YES, 766 YES, YES, 7000}, 767 {CTRY_JAPAN59, MKK15_MKKA1, "JP", "JAPAN59", YES, NO, NO, YES, YES, 768 YES, YES, 7000}, 769 770 {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, YES, YES, 771 YES, NO, 7000}, 772 {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES, 773 YES, YES, NO, NO, 7000}, 774 {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO, 775 YES, YES, YES, YES, 7000}, 776 {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO, 777 YES, NO, YES, NO, 7000}, 778 {CTRY_KOREA_ROC2, APL2_WORLD, "K2", "KOREA REPUBLIC2", YES, NO, NO, 779 YES, NO, YES, NO, 7000}, 780 {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3", YES, NO, NO, 781 YES, NO, YES, NO, 7000}, 782 {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, YES, YES, 783 NO, NO, 7000}, 784 {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES, 785 YES, YES, 7000}, 786 {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, YES, 787 YES, NO, NO, 7000}, 788 {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO, 789 YES, YES, YES, YES, YES, 7000}, 790 {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES, 791 YES, YES, YES, 7000}, 792 {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES, 793 YES, YES, YES, YES, 7000}, 794 {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES, 795 YES, YES, 7000}, 796 {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, YES, 797 YES, NO, NO, 7000}, 798 {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", YES, NO, NO, YES, NO, 799 YES, NO, 7000}, 800 {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES, 801 YES, YES, 7000}, 802 {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES, 803 YES, YES, 7000}, 804 {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES, 805 YES, YES, 7000}, 806 {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, YES, 807 YES, NO, NO, 7000}, 808 {CTRY_NEPAL, APL1_WORLD, "NP", "NEPAL", YES, NO, YES, YES, YES, 809 YES, YES, 7000}, 810 {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES, 811 YES, YES, YES, YES, 7000}, 812 {CTRY_NETHERLANDS_ANTILLES, ETSI1_WORLD, "AN", 813 "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, YES, YES, 7000}, 814 {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES, 815 YES, YES, YES, NO, 7000}, 816 {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES, 817 YES, YES, 7000}, 818 {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, YES, YES, YES, 819 NO, 7000}, 820 {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, YES, 821 YES, NO, NO, 7000}, 822 {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES, 823 YES, YES, 7000}, 824 {CTRY_PAPUA_NEW_GUINEA, FCC1_WORLD, "PG", "PAPUA NEW GUINEA", YES, 825 YES, YES, YES, YES, YES, YES, 7000}, 826 {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, YES, YES, YES, 827 NO, 7000}, 828 {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES, 829 YES, YES, YES, YES, 7000}, 830 {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES, 831 YES, YES, 7000}, 832 {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES, 833 YES, YES, YES, 7000}, 834 {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES, 835 YES, YES, YES, YES, 7000}, 836 {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, YES, YES, 837 NO, NO, 7000}, 838 {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, YES, 839 YES, NO, NO, 7000}, 840 {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, YES, YES, 841 NO, NO, 7000}, 842 {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO, 843 YES, YES, YES, NO, NO, 7000}, 844 {CTRY_SERBIA_MONTENEGRO, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO", 845 YES, NO, YES, YES, YES, YES, YES, 7000}, 846 {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES, 847 YES, YES, YES, 7000}, 848 {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC", YES, NO, YES, 849 YES, YES, YES, YES, 7000}, 850 {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES, 851 YES, YES, YES, 7000}, 852 {CTRY_SOUTH_AFRICA, FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES, 853 YES, YES, YES, NO, 7000}, 854 {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES, 855 YES, YES, 7000}, 856 {CTRY_SRI_LANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, YES, 857 YES, YES, NO, 7000}, 858 {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES, 859 YES, YES, 7000}, 860 {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES, 861 YES, YES, YES, YES, 7000}, 862 {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, YES, YES, 863 NO, NO, 7000}, 864 {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES, 865 YES, YES, 7000}, 866 {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, YES, 867 YES, NO, NO, 7000}, 868 {CTRY_TRINIDAD_Y_TOBAGO, ETSI4_WORLD, "TT", "TRINIDAD & TOBAGO", 869 YES, NO, YES, YES, YES, YES, NO, 7000}, 870 {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, YES, 871 YES, YES, NO, 7000}, 872 {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, YES, YES, 873 YES, NO, 7000}, 874 {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, YES, 875 YES, NO, NO, 7000}, 876 {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES, 877 YES, YES, NO, NO, 7000}, 878 {CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB", "UNITED KINGDOM", YES, NO, 879 YES, YES, YES, YES, YES, 7000}, 880 {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES, 881 YES, YES, YES, YES, YES, 5825}, 882 {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS", 883 "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, YES, 884 YES, 7000}, 885 {CTRY_URUGUAY, APL2_WORLD, "UY", "URUGUAY", YES, NO, YES, YES, YES, 886 YES, NO, 7000}, 887 {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES, 888 YES, YES, YES, YES, 7000}, 889 {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, YES, 890 YES, YES, NO, 7000}, 891 {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, YES, 892 YES, NO, NO, 7000}, 893 {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, YES, YES, 894 NO, NO, 7000}, 895 {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, YES, 896 YES, NO, NO, 7000} 897 }; 898 899 enum { 900 NO_DFS = 0x0000000000000000ULL, 901 DFS_FCC3 = 0x0000000000000001ULL, 902 DFS_ETSI = 0x0000000000000002ULL, 903 DFS_MKK4 = 0x0000000000000004ULL, 904 }; 905 906 enum { 907 F1_4915_4925, 908 F1_4935_4945, 909 F1_4920_4980, 910 F1_4942_4987, 911 F1_4945_4985, 912 F1_4950_4980, 913 F1_5035_5040, 914 F1_5040_5080, 915 F1_5055_5055, 916 917 F1_5120_5240, 918 919 F1_5170_5230, 920 F2_5170_5230, 921 922 F1_5180_5240, 923 F2_5180_5240, 924 F3_5180_5240, 925 F4_5180_5240, 926 F5_5180_5240, 927 F6_5180_5240, 928 F7_5180_5240, 929 F8_5180_5240, 930 931 F1_5180_5320, 932 933 F1_5240_5280, 934 935 F1_5260_5280, 936 937 F1_5260_5320, 938 F2_5260_5320, 939 F3_5260_5320, 940 F4_5260_5320, 941 F5_5260_5320, 942 F6_5260_5320, 943 944 F1_5260_5700, 945 946 F1_5280_5320, 947 948 F1_5500_5580, 949 950 F1_5500_5620, 951 952 F1_5500_5700, 953 F2_5500_5700, 954 F3_5500_5700, 955 F4_5500_5700, 956 F5_5500_5700, 957 958 F1_5660_5700, 959 960 F1_5745_5805, 961 F2_5745_5805, 962 F3_5745_5805, 963 964 F1_5745_5825, 965 F2_5745_5825, 966 F3_5745_5825, 967 F4_5745_5825, 968 F5_5745_5825, 969 F6_5745_5825, 970 971 W1_4920_4980, 972 W1_5040_5080, 973 W1_5170_5230, 974 W1_5180_5240, 975 W1_5260_5320, 976 W1_5745_5825, 977 W1_5500_5700, 978 A_DEMO_ALL_CHANNELS 979 }; 980 981 static struct RegDmnFreqBand regDmn5GhzFreq[] = { 982 {4915, 4925, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16}, 983 {4935, 4945, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16}, 984 {4920, 4980, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 7}, 985 {4942, 4987, 27, 6, 5, 5, NO_DFS, PSCAN_FCC, 0}, 986 {4945, 4985, 30, 6, 10, 5, NO_DFS, PSCAN_FCC, 0}, 987 {4950, 4980, 33, 6, 20, 5, NO_DFS, PSCAN_FCC, 0}, 988 {5035, 5040, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12}, 989 {5040, 5080, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 2}, 990 {5055, 5055, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12}, 991 992 {5120, 5240, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0}, 993 994 {5170, 5230, 23, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1}, 995 {5170, 5230, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1}, 996 997 {5180, 5240, 15, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0}, 998 {5180, 5240, 17, 6, 20, 20, NO_DFS, NO_PSCAN, 1}, 999 {5180, 5240, 18, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0}, 1000 {5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0}, 1001 {5180, 5240, 23, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0}, 1002 {5180, 5240, 23, 6, 20, 20, NO_DFS, PSCAN_FCC, 0}, 1003 {5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK3, 0}, 1004 {5180, 5240, 23, 6, 20, 20, NO_DFS, NO_PSCAN, 0}, 1005 1006 {5180, 5320, 20, 6, 20, 20, NO_DFS, PSCAN_ETSI, 0}, 1007 1008 {5240, 5280, 23, 0, 20, 20, DFS_FCC3, PSCAN_FCC | PSCAN_ETSI, 0}, 1009 1010 {5260, 5280, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI, 1011 PSCAN_FCC | PSCAN_ETSI, 0}, 1012 1013 {5260, 5320, 18, 0, 20, 20, DFS_FCC3 | DFS_ETSI, 1014 PSCAN_FCC | PSCAN_ETSI, 0}, 1015 1016 {5260, 5320, 20, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4, 1017 PSCAN_FCC | PSCAN_ETSI | PSCAN_MKK3, 0}, 1018 1019 1020 {5260, 5320, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, 1021 PSCAN_FCC | PSCAN_ETSI, 2}, 1022 {5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2}, 1023 {5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0}, 1024 {5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0}, 1025 1026 {5260, 5700, 5, 6, 20, 20, DFS_FCC3 | DFS_ETSI, NO_PSCAN, 0}, 1027 1028 {5280, 5320, 17, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0}, 1029 1030 {5500, 5580, 23, 6, 20, 20, DFS_FCC3, PSCAN_FCC, 0}, 1031 1032 {5500, 5620, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0}, 1033 1034 {5500, 5700, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 4}, 1035 {5500, 5700, 27, 0, 20, 20, DFS_FCC3 | DFS_ETSI, 1036 PSCAN_FCC | PSCAN_ETSI, 0}, 1037 {5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, 1038 PSCAN_FCC | PSCAN_ETSI, 0}, 1039 {5500, 5700, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4, 1040 PSCAN_MKK3 | PSCAN_FCC, 0}, 1041 {5500, 5700, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0}, 1042 1043 {5660, 5700, 23, 6, 20, 20, DFS_FCC3, PSCAN_FCC, 0}, 1044 1045 {5745, 5805, 23, 0, 20, 20, NO_DFS, NO_PSCAN, 0}, 1046 {5745, 5805, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0}, 1047 {5745, 5805, 30, 6, 20, 20, NO_DFS, PSCAN_ETSI, 0}, 1048 {5745, 5825, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0}, 1049 {5745, 5825, 17, 0, 20, 20, NO_DFS, NO_PSCAN, 0}, 1050 {5745, 5825, 20, 0, 20, 20, NO_DFS, NO_PSCAN, 0}, 1051 {5745, 5825, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0}, 1052 {5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 3}, 1053 {5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0}, 1054 1055 1056 {4920, 4980, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0}, 1057 {5040, 5080, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0}, 1058 {5170, 5230, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0}, 1059 {5180, 5240, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0}, 1060 {5260, 5320, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0}, 1061 {5745, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0}, 1062 {5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0}, 1063 {4920, 6100, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0}, 1064 }; 1065 1066 enum { 1067 T1_5130_5650, 1068 T1_5150_5670, 1069 1070 T1_5200_5200, 1071 T2_5200_5200, 1072 T3_5200_5200, 1073 T4_5200_5200, 1074 T5_5200_5200, 1075 T6_5200_5200, 1076 T7_5200_5200, 1077 T8_5200_5200, 1078 1079 T1_5200_5280, 1080 T2_5200_5280, 1081 T3_5200_5280, 1082 T4_5200_5280, 1083 T5_5200_5280, 1084 T6_5200_5280, 1085 1086 T1_5200_5240, 1087 T1_5210_5210, 1088 T2_5210_5210, 1089 T3_5210_5210, 1090 T4_5210_5210, 1091 T5_5210_5210, 1092 T6_5210_5210, 1093 T7_5210_5210, 1094 T8_5210_5210, 1095 T9_5210_5210, 1096 T10_5210_5210, 1097 T1_5240_5240, 1098 1099 T1_5210_5250, 1100 T1_5210_5290, 1101 T2_5210_5290, 1102 T3_5210_5290, 1103 1104 T1_5280_5280, 1105 T2_5280_5280, 1106 T1_5290_5290, 1107 T2_5290_5290, 1108 T3_5290_5290, 1109 T1_5250_5290, 1110 T2_5250_5290, 1111 T3_5250_5290, 1112 T4_5250_5290, 1113 1114 T1_5540_5660, 1115 T2_5540_5660, 1116 T3_5540_5660, 1117 T1_5760_5800, 1118 T2_5760_5800, 1119 T3_5760_5800, 1120 T4_5760_5800, 1121 T5_5760_5800, 1122 T6_5760_5800, 1123 T7_5760_5800, 1124 1125 T1_5765_5805, 1126 T2_5765_5805, 1127 T3_5765_5805, 1128 T4_5765_5805, 1129 T5_5765_5805, 1130 T6_5765_5805, 1131 T7_5765_5805, 1132 T8_5765_5805, 1133 T9_5765_5805, 1134 1135 WT1_5210_5250, 1136 WT1_5290_5290, 1137 WT1_5540_5660, 1138 WT1_5760_5800, 1139 }; 1140 1141 enum { 1142 F1_2312_2372, 1143 F2_2312_2372, 1144 1145 F1_2412_2472, 1146 F2_2412_2472, 1147 F3_2412_2472, 1148 1149 F1_2412_2462, 1150 F2_2412_2462, 1151 1152 F1_2432_2442, 1153 1154 F1_2457_2472, 1155 1156 F1_2467_2472, 1157 1158 F1_2484_2484, 1159 F2_2484_2484, 1160 1161 F1_2512_2732, 1162 1163 W1_2312_2372, 1164 W1_2412_2412, 1165 W1_2417_2432, 1166 W1_2437_2442, 1167 W1_2447_2457, 1168 W1_2462_2462, 1169 W1_2467_2467, 1170 W2_2467_2467, 1171 W1_2472_2472, 1172 W2_2472_2472, 1173 W1_2484_2484, 1174 W2_2484_2484, 1175 }; 1176 1177 static struct RegDmnFreqBand regDmn2GhzFreq[] = { 1178 {2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1179 {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1180 1181 {2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1182 {2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0}, 1183 {2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1184 1185 {2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1186 {2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0}, 1187 1188 {2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1189 1190 {2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1191 1192 {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0}, 1193 1194 {2484, 2484, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1195 {2484, 2484, 20, 0, 20, 5, NO_DFS, 1196 PSCAN_MKKA | PSCAN_MKKA1 | PSCAN_MKKA2, 0}, 1197 1198 {2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1199 1200 {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1201 {2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1202 {2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1203 {2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1204 {2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1205 {2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1206 {2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, 1207 {2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, 1208 {2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, 1209 {2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, 1210 {2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, 1211 {2484, 2484, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, 1212 }; 1213 1214 enum { 1215 G1_2312_2372, 1216 G2_2312_2372, 1217 1218 G1_2412_2472, 1219 G2_2412_2472, 1220 G3_2412_2472, 1221 1222 G1_2412_2462, 1223 G2_2412_2462, 1224 1225 G1_2432_2442, 1226 1227 G1_2457_2472, 1228 1229 G1_2512_2732, 1230 1231 G1_2467_2472, 1232 1233 WG1_2312_2372, 1234 WG1_2412_2462, 1235 WG1_2467_2472, 1236 WG2_2467_2472, 1237 G_DEMO_ALL_CHANNELS 1238 }; 1239 1240 static struct RegDmnFreqBand regDmn2Ghz11gFreq[] = { 1241 {2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1242 {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1243 1244 {2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1245 {2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0}, 1246 {2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1247 1248 {2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1249 {2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0}, 1250 1251 {2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1252 1253 {2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1254 1255 {2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1256 1257 {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0}, 1258 1259 {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1260 {2412, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, 1261 {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, 1262 {2467, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, 1263 {2312, 2732, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, 1264 }; 1265 1266 enum { 1267 T1_2312_2372, 1268 T1_2437_2437, 1269 T2_2437_2437, 1270 T3_2437_2437, 1271 T1_2512_2732 1272 }; 1273 1274 static struct regDomain regDomains[] = { 1275 1276 {DEBUG_REG_DMN, FCC, DFS_FCC3, NO_PSCAN, NO_REQ, 1277 /* LINTED E_FALSE_LOGICAL_EXPR */ 1278 BM(A_DEMO_ALL_CHANNELS, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1279 -1), 1280 /* LINTED E_FALSE_LOGICAL_EXPR */ 1281 BM(T1_5130_5650, T1_5150_5670, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1282 -1), 1283 /* LINTED E_FALSE_LOGICAL_EXPR */ 1284 BM(T1_5200_5240, T1_5280_5280, T1_5540_5660, T1_5765_5805, -1, -1, 1285 -1, -1, -1, -1, -1, -1), 1286 /* LINTED E_FALSE_LOGICAL_EXPR */ 1287 BM(F1_2312_2372, F1_2412_2472, F1_2484_2484, F1_2512_2732, -1, -1, 1288 -1, -1, -1, -1, -1, -1), 1289 /* LINTED E_FALSE_LOGICAL_EXPR */ 1290 BM(G_DEMO_ALL_CHANNELS, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1291 -1), 1292 /* LINTED E_FALSE_LOGICAL_EXPR */ 1293 BM(T1_2312_2372, T1_2437_2437, T1_2512_2732, -1, -1, -1, -1, -1, 1294 -1, -1, -1, -1)}, 1295 1296 {APL1, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1297 /* LINTED E_FALSE_LOGICAL_EXPR */ 1298 BM(F4_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1299 /* LINTED E_FALSE_LOGICAL_EXPR */ 1300 BM(T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1301 /* LINTED E_FALSE_LOGICAL_EXPR */ 1302 BM(T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1303 BMZERO, 1304 BMZERO, 1305 BMZERO}, 1306 1307 {APL2, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1308 /* LINTED E_FALSE_LOGICAL_EXPR */ 1309 BM(F1_5745_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1310 /* LINTED E_FALSE_LOGICAL_EXPR */ 1311 BM(T1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1312 /* LINTED E_FALSE_LOGICAL_EXPR */ 1313 BM(T2_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1314 BMZERO, 1315 BMZERO, 1316 BMZERO}, 1317 1318 {APL3, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1319 /* LINTED E_FALSE_LOGICAL_EXPR */ 1320 BM(F1_5280_5320, F2_5745_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1321 -1), 1322 /* LINTED E_FALSE_LOGICAL_EXPR */ 1323 BM(T1_5290_5290, T1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1324 -1), 1325 /* LINTED E_FALSE_LOGICAL_EXPR */ 1326 BM(T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1327 BMZERO, 1328 BMZERO, 1329 BMZERO}, 1330 1331 {APL4, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1332 /* LINTED E_FALSE_LOGICAL_EXPR */ 1333 BM(F4_5180_5240, F3_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1334 -1), 1335 /* LINTED E_FALSE_LOGICAL_EXPR */ 1336 BM(T1_5210_5210, T3_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1337 -1), 1338 /* LINTED E_FALSE_LOGICAL_EXPR */ 1339 BM(T1_5200_5200, T3_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1340 -1), 1341 BMZERO, 1342 BMZERO, 1343 BMZERO}, 1344 1345 {APL5, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1346 /* LINTED E_FALSE_LOGICAL_EXPR */ 1347 BM(F2_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1348 /* LINTED E_FALSE_LOGICAL_EXPR */ 1349 BM(T4_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1350 /* LINTED E_FALSE_LOGICAL_EXPR */ 1351 BM(T4_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1352 BMZERO, 1353 BMZERO, 1354 BMZERO}, 1355 1356 {APL6, ETSI, DFS_ETSI, PSCAN_FCC_T | PSCAN_FCC, NO_REQ, 1357 /* LINTED E_FALSE_LOGICAL_EXPR */ 1358 BM(F4_5180_5240, F2_5260_5320, F3_5745_5825, -1, -1, -1, -1, -1, 1359 -1, -1, -1, -1), 1360 /* LINTED E_FALSE_LOGICAL_EXPR */ 1361 BM(T2_5210_5210, T1_5250_5290, T1_5760_5800, -1, -1, -1, -1, -1, 1362 -1, -1, -1, -1), 1363 /* LINTED E_FALSE_LOGICAL_EXPR */ 1364 BM(T1_5200_5280, T5_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1365 -1), 1366 BMZERO, 1367 BMZERO, 1368 BMZERO}, 1369 1370 {APL7, ETSI, DFS_ETSI, PSCAN_ETSI, NO_REQ, 1371 /* LINTED E_FALSE_LOGICAL_EXPR */ 1372 BM(F1_5280_5320, F5_5500_5700, F3_5745_5805, -1, -1, -1, -1, -1, 1373 -1, -1, -1, -1), 1374 /* LINTED E_FALSE_LOGICAL_EXPR */ 1375 BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1376 -1), 1377 /* LINTED E_FALSE_LOGICAL_EXPR */ 1378 BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1379 -1), 1380 BMZERO, 1381 BMZERO, 1382 BMZERO}, 1383 1384 {APL8, ETSI, NO_DFS, NO_PSCAN, 1385 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1386 /* LINTED E_FALSE_LOGICAL_EXPR */ 1387 BM(F6_5260_5320, F4_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1388 -1), 1389 /* LINTED E_FALSE_LOGICAL_EXPR */ 1390 BM(T2_5290_5290, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1391 -1), 1392 /* LINTED E_FALSE_LOGICAL_EXPR */ 1393 BM(T1_5280_5280, T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1394 -1), 1395 BMZERO, 1396 BMZERO, 1397 BMZERO}, 1398 1399 {APL9, ETSI, DFS_ETSI, PSCAN_ETSI, 1400 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1401 /* LINTED E_FALSE_LOGICAL_EXPR */ 1402 BM(F1_5180_5320, F1_5500_5620, F3_5745_5805, -1, -1, -1, -1, -1, 1403 -1, -1, -1, -1), 1404 /* LINTED E_FALSE_LOGICAL_EXPR */ 1405 BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1406 -1), 1407 /* LINTED E_FALSE_LOGICAL_EXPR */ 1408 BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1409 -1), 1410 BMZERO, 1411 BMZERO, 1412 BMZERO}, 1413 1414 {APL10, ETSI, DFS_ETSI, PSCAN_ETSI, 1415 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1416 /* LINTED E_FALSE_LOGICAL_EXPR */ 1417 BM(F1_5180_5320, F5_5500_5700, F3_5745_5805, -1, -1, -1, -1, -1, 1418 -1, -1, -1, -1), 1419 /* LINTED E_FALSE_LOGICAL_EXPR */ 1420 BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1421 -1), 1422 /* LINTED E_FALSE_LOGICAL_EXPR */ 1423 BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1424 -1), 1425 BMZERO, 1426 BMZERO, 1427 BMZERO}, 1428 1429 {ETSI1, ETSI, DFS_ETSI, PSCAN_ETSI, 1430 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1431 /* LINTED E_FALSE_LOGICAL_EXPR */ 1432 BM(F4_5180_5240, F2_5260_5320, F2_5500_5700, -1, -1, -1, -1, -1, 1433 -1, -1, -1, -1), 1434 /* LINTED E_FALSE_LOGICAL_EXPR */ 1435 BM(T1_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1436 /* LINTED E_FALSE_LOGICAL_EXPR */ 1437 BM(T2_5200_5280, T2_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1438 -1), 1439 BMZERO, 1440 BMZERO, 1441 BMZERO}, 1442 1443 {ETSI2, ETSI, DFS_ETSI, PSCAN_ETSI, 1444 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1445 /* LINTED E_FALSE_LOGICAL_EXPR */ 1446 BM(F3_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1447 /* LINTED E_FALSE_LOGICAL_EXPR */ 1448 BM(T3_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1449 /* LINTED E_FALSE_LOGICAL_EXPR */ 1450 BM(T2_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1451 BMZERO, 1452 BMZERO, 1453 BMZERO}, 1454 1455 {ETSI3, ETSI, DFS_ETSI, PSCAN_ETSI, 1456 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1457 /* LINTED E_FALSE_LOGICAL_EXPR */ 1458 BM(F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1459 -1), 1460 /* LINTED E_FALSE_LOGICAL_EXPR */ 1461 BM(T1_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1462 /* LINTED E_FALSE_LOGICAL_EXPR */ 1463 BM(T2_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1464 BMZERO, 1465 BMZERO, 1466 BMZERO}, 1467 1468 {ETSI4, ETSI, DFS_ETSI, PSCAN_ETSI, 1469 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1470 /* LINTED E_FALSE_LOGICAL_EXPR */ 1471 BM(F3_5180_5240, F1_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1472 -1), 1473 /* LINTED E_FALSE_LOGICAL_EXPR */ 1474 BM(T2_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1475 /* LINTED E_FALSE_LOGICAL_EXPR */ 1476 BM(T3_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1477 BMZERO, 1478 BMZERO, 1479 BMZERO}, 1480 1481 {ETSI5, ETSI, DFS_ETSI, PSCAN_ETSI, 1482 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1483 /* LINTED E_FALSE_LOGICAL_EXPR */ 1484 BM(F1_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1485 /* LINTED E_FALSE_LOGICAL_EXPR */ 1486 BM(T4_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1487 /* LINTED E_FALSE_LOGICAL_EXPR */ 1488 BM(T3_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1489 BMZERO, 1490 BMZERO, 1491 BMZERO}, 1492 1493 {ETSI6, ETSI, DFS_ETSI, PSCAN_ETSI, 1494 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1495 /* LINTED E_FALSE_LOGICAL_EXPR */ 1496 BM(F5_5180_5240, F1_5260_5280, F3_5500_5700, -1, -1, -1, -1, -1, 1497 -1, -1, -1, -1), 1498 /* LINTED E_FALSE_LOGICAL_EXPR */ 1499 BM(T1_5210_5250, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1500 /* LINTED E_FALSE_LOGICAL_EXPR */ 1501 BM(T4_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1502 BMZERO, 1503 BMZERO, 1504 BMZERO}, 1505 1506 {FCC1, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1507 /* LINTED E_FALSE_LOGICAL_EXPR */ 1508 BM(F2_5180_5240, F4_5260_5320, F5_5745_5825, -1, -1, -1, -1, -1, 1509 -1, -1, -1, -1), 1510 /* LINTED E_FALSE_LOGICAL_EXPR */ 1511 BM(T6_5210_5210, T2_5250_5290, T6_5760_5800, -1, -1, -1, -1, -1, 1512 -1, -1, -1, -1), 1513 /* LINTED E_FALSE_LOGICAL_EXPR */ 1514 BM(T1_5200_5240, T2_5280_5280, T7_5765_5805, -1, -1, -1, -1, -1, 1515 -1, -1, -1, -1), 1516 BMZERO, 1517 BMZERO, 1518 BMZERO}, 1519 1520 {FCC2, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1521 /* LINTED E_FALSE_LOGICAL_EXPR */ 1522 BM(F6_5180_5240, F5_5260_5320, F6_5745_5825, -1, -1, -1, -1, -1, 1523 -1, -1, -1, -1), 1524 /* LINTED E_FALSE_LOGICAL_EXPR */ 1525 BM(T7_5210_5210, T3_5250_5290, T2_5760_5800, -1, -1, -1, -1, -1, 1526 -1, -1, -1, -1), 1527 /* LINTED E_FALSE_LOGICAL_EXPR */ 1528 BM(T7_5200_5200, T1_5240_5240, T2_5280_5280, T1_5765_5805, -1, -1, 1529 -1, -1, -1, -1, -1, -1), 1530 BMZERO, 1531 BMZERO, 1532 BMZERO}, 1533 1534 {FCC3, FCC, DFS_FCC3, PSCAN_FCC | PSCAN_FCC_T, NO_REQ, 1535 /* LINTED E_FALSE_LOGICAL_EXPR */ 1536 BM(F2_5180_5240, F3_5260_5320, F1_5500_5700, F5_5745_5825, -1, -1, 1537 -1, -1, -1, -1, -1, -1), 1538 /* LINTED E_FALSE_LOGICAL_EXPR */ 1539 BM(T6_5210_5210, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1540 -1), 1541 /* LINTED E_FALSE_LOGICAL_EXPR */ 1542 BM(T4_5200_5200, T8_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1543 -1), 1544 BMZERO, 1545 BMZERO, 1546 BMZERO}, 1547 1548 {FCC4, FCC, DFS_FCC3, PSCAN_FCC | PSCAN_FCC_T, NO_REQ, 1549 /* LINTED E_FALSE_LOGICAL_EXPR */ 1550 BM(F1_4942_4987, F1_4945_4985, F1_4950_4980, -1, -1, -1, -1, -1, 1551 -1, -1, -1, -1), 1552 /* LINTED E_FALSE_LOGICAL_EXPR */ 1553 BM(T8_5210_5210, T4_5250_5290, T7_5760_5800, -1, -1, -1, -1, -1, 1554 -1, -1, -1, -1), 1555 /* LINTED E_FALSE_LOGICAL_EXPR */ 1556 BM(T1_5200_5240, T1_5280_5280, T9_5765_5805, -1, -1, -1, -1, -1, 1557 -1, -1, -1, -1), 1558 BMZERO, 1559 BMZERO, 1560 BMZERO}, 1561 1562 {FCC5, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1563 /* LINTED E_FALSE_LOGICAL_EXPR */ 1564 BM(F2_5180_5240, F6_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1565 -1), 1566 /* LINTED E_FALSE_LOGICAL_EXPR */ 1567 BM(T6_5210_5210, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1568 -1), 1569 /* LINTED E_FALSE_LOGICAL_EXPR */ 1570 BM(T8_5200_5200, T7_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1571 -1), 1572 BMZERO, 1573 BMZERO, 1574 BMZERO}, 1575 1576 {FCC6, FCC, DFS_FCC3, PSCAN_FCC, NO_REQ, 1577 /* LINTED E_FALSE_LOGICAL_EXPR */ 1578 BM(F8_5180_5240, F5_5260_5320, F1_5500_5580, F1_5660_5700, 1579 F6_5745_5825, -1, -1, -1, -1, -1, -1, -1), 1580 /* LINTED E_FALSE_LOGICAL_EXPR */ 1581 BM(T7_5210_5210, T3_5250_5290, T2_5760_5800, -1, -1, -1, -1, -1, 1582 -1, -1, -1, -1), 1583 /* LINTED E_FALSE_LOGICAL_EXPR */ 1584 BM(T7_5200_5200, T1_5240_5240, T2_5280_5280, T1_5765_5805, -1, -1, 1585 -1, -1, -1, -1, -1, -1), 1586 BMZERO, 1587 BMZERO, 1588 BMZERO}, 1589 1590 {MKK1, MKK, NO_DFS, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB, 1591 /* LINTED E_FALSE_LOGICAL_EXPR */ 1592 BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1, 1593 -1, -1, -1, -1, -1, -1), 1594 /* LINTED E_FALSE_LOGICAL_EXPR */ 1595 BM(T7_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1596 /* LINTED E_FALSE_LOGICAL_EXPR */ 1597 BM(T5_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1598 BMZERO, 1599 BMZERO, 1600 BMZERO}, 1601 1602 {MKK2, MKK, NO_DFS, PSCAN_MKK2, DISALLOW_ADHOC_11A_TURB, 1603 /* LINTED E_FALSE_LOGICAL_EXPR */ 1604 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1605 F1_5055_5055, F1_5040_5080, F1_5170_5230, F4_5180_5240, 1606 F2_5260_5320, F4_5500_5700, -1, -1), 1607 /* LINTED E_FALSE_LOGICAL_EXPR */ 1608 BM(T7_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1609 /* LINTED E_FALSE_LOGICAL_EXPR */ 1610 BM(T5_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1611 BMZERO, 1612 BMZERO, 1613 BMZERO}, 1614 1615 1616 {MKK3, MKK, NO_DFS, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB, 1617 /* LINTED E_FALSE_LOGICAL_EXPR */ 1618 BM(F4_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1619 /* LINTED E_FALSE_LOGICAL_EXPR */ 1620 BM(T9_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1621 /* LINTED E_FALSE_LOGICAL_EXPR */ 1622 BM(T1_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1623 BMZERO, 1624 BMZERO, 1625 BMZERO}, 1626 1627 1628 {MKK4, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB, 1629 /* LINTED E_FALSE_LOGICAL_EXPR */ 1630 BM(F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1631 -1), 1632 /* LINTED E_FALSE_LOGICAL_EXPR */ 1633 BM(T10_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1634 /* LINTED E_FALSE_LOGICAL_EXPR */ 1635 BM(T6_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1636 BMZERO, 1637 BMZERO, 1638 BMZERO}, 1639 1640 1641 {MKK5, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB, 1642 /* LINTED E_FALSE_LOGICAL_EXPR */ 1643 BM(F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1, -1, -1, -1, 1644 -1, -1, -1, -1), 1645 /* LINTED E_FALSE_LOGICAL_EXPR */ 1646 BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1647 /* LINTED E_FALSE_LOGICAL_EXPR */ 1648 BM(T5_5200_5280, T3_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1649 -1), 1650 BMZERO, 1651 BMZERO, 1652 BMZERO}, 1653 1654 1655 {MKK6, MKK, NO_DFS, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB, 1656 /* LINTED E_FALSE_LOGICAL_EXPR */ 1657 BM(F2_5170_5230, F4_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1658 -1), 1659 /* LINTED E_FALSE_LOGICAL_EXPR */ 1660 BM(T3_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1661 /* LINTED E_FALSE_LOGICAL_EXPR */ 1662 BM(T6_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1663 BMZERO, 1664 BMZERO, 1665 BMZERO}, 1666 1667 1668 {MKK7, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3, 1669 DISALLOW_ADHOC_11A_TURB, 1670 /* LINTED E_FALSE_LOGICAL_EXPR */ 1671 BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, 1672 -1, -1, -1, -1), 1673 /* LINTED E_FALSE_LOGICAL_EXPR */ 1674 BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1675 /* LINTED E_FALSE_LOGICAL_EXPR */ 1676 BM(T5_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1677 BMZERO, 1678 BMZERO, 1679 BMZERO}, 1680 1681 1682 {MKK8, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3, 1683 DISALLOW_ADHOC_11A_TURB, 1684 /* LINTED E_FALSE_LOGICAL_EXPR */ 1685 BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1, 1686 -1, -1, -1, -1, -1, -1), 1687 /* LINTED E_FALSE_LOGICAL_EXPR */ 1688 BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1689 /* LINTED E_FALSE_LOGICAL_EXPR */ 1690 BM(T5_5200_5280, T3_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1691 -1), 1692 BMZERO, 1693 BMZERO, 1694 BMZERO}, 1695 1696 1697 {MKK9, MKK, NO_DFS, PSCAN_MKK2 | PSCAN_MKK3, 1698 DISALLOW_ADHOC_11A_TURB, 1699 /* LINTED E_FALSE_LOGICAL_EXPR */ 1700 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1701 F1_5055_5055, F1_5040_5080, F4_5180_5240, -1, -1, -1, -1, -1), 1702 /* LINTED E_FALSE_LOGICAL_EXPR */ 1703 BM(T9_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1704 /* LINTED E_FALSE_LOGICAL_EXPR */ 1705 BM(T1_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1706 BMZERO, 1707 BMZERO, 1708 BMZERO}, 1709 1710 1711 {MKK10, MKK, DFS_MKK4, PSCAN_MKK2 | PSCAN_MKK3, 1712 DISALLOW_ADHOC_11A_TURB, 1713 /* LINTED E_FALSE_LOGICAL_EXPR */ 1714 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1715 F1_5055_5055, F1_5040_5080, F4_5180_5240, F2_5260_5320, -1, -1, 1716 -1, -1), 1717 /* LINTED E_FALSE_LOGICAL_EXPR */ 1718 BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1719 /* LINTED E_FALSE_LOGICAL_EXPR */ 1720 BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1721 BMZERO, 1722 BMZERO, 1723 BMZERO}, 1724 1725 1726 {MKK11, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB, 1727 /* LINTED E_FALSE_LOGICAL_EXPR */ 1728 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1729 F1_5055_5055, F1_5040_5080, F4_5180_5240, F2_5260_5320, 1730 F4_5500_5700, -1, -1, -1), 1731 /* LINTED E_FALSE_LOGICAL_EXPR */ 1732 BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1733 /* LINTED E_FALSE_LOGICAL_EXPR */ 1734 BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1735 BMZERO, 1736 BMZERO, 1737 BMZERO}, 1738 1739 1740 {MKK12, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3, 1741 DISALLOW_ADHOC_11A_TURB, 1742 /* LINTED E_FALSE_LOGICAL_EXPR */ 1743 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1744 F1_5055_5055, F1_5040_5080, F1_5170_5230, F4_5180_5240, 1745 F2_5260_5320, F4_5500_5700, -1, -1), 1746 /* LINTED E_FALSE_LOGICAL_EXPR */ 1747 BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1748 /* LINTED E_FALSE_LOGICAL_EXPR */ 1749 BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1750 BMZERO, 1751 BMZERO, 1752 BMZERO}, 1753 1754 1755 {MKK13, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3, 1756 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1757 /* LINTED E_FALSE_LOGICAL_EXPR */ 1758 BM(F1_5170_5230, F7_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1, 1759 -1, -1, -1, -1, -1, -1), 1760 BMZERO, 1761 BMZERO, 1762 BMZERO, 1763 BMZERO, 1764 BMZERO}, 1765 1766 1767 {MKK14, MKK, DFS_MKK4, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB, 1768 /* LINTED E_FALSE_LOGICAL_EXPR */ 1769 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1770 F1_5040_5080, F1_5055_5055, F1_5170_5230, F4_5180_5240, -1, -1, 1771 -1, -1), 1772 BMZERO, 1773 BMZERO, 1774 BMZERO, 1775 BMZERO, 1776 BMZERO}, 1777 1778 1779 {MKK15, MKK, DFS_MKK4, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB, 1780 /* LINTED E_FALSE_LOGICAL_EXPR */ 1781 BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040, 1782 F1_5040_5080, F1_5055_5055, F1_5170_5230, F4_5180_5240, 1783 F2_5260_5320, -1, -1, -1), 1784 BMZERO, 1785 BMZERO, 1786 BMZERO, 1787 BMZERO, 1788 BMZERO}, 1789 1790 1791 {APLD, NO_CTL, NO_DFS, NO_PSCAN, NO_REQ, 1792 BMZERO, 1793 BMZERO, 1794 BMZERO, 1795 /* LINTED E_FALSE_LOGICAL_EXPR */ 1796 BM(F2_2312_2372, F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1797 -1), 1798 /* LINTED E_FALSE_LOGICAL_EXPR */ 1799 BM(G2_2312_2372, G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1800 -1), 1801 BMZERO}, 1802 1803 {ETSIA, NO_CTL, NO_DFS, PSCAN_ETSIA, 1804 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1805 BMZERO, 1806 BMZERO, 1807 BMZERO, 1808 /* LINTED E_FALSE_LOGICAL_EXPR */ 1809 BM(F1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1810 /* LINTED E_FALSE_LOGICAL_EXPR */ 1811 BM(G1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1812 /* LINTED E_FALSE_LOGICAL_EXPR */ 1813 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1814 1815 {ETSIB, ETSI, NO_DFS, PSCAN_ETSIB, 1816 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1817 BMZERO, 1818 BMZERO, 1819 BMZERO, 1820 /* LINTED E_FALSE_LOGICAL_EXPR */ 1821 BM(F1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1822 /* LINTED E_FALSE_LOGICAL_EXPR */ 1823 BM(G1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1824 /* LINTED E_FALSE_LOGICAL_EXPR */ 1825 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1826 1827 {ETSIC, ETSI, NO_DFS, PSCAN_ETSIC, 1828 DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, 1829 BMZERO, 1830 BMZERO, 1831 BMZERO, 1832 /* LINTED E_FALSE_LOGICAL_EXPR */ 1833 BM(F3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1834 /* LINTED E_FALSE_LOGICAL_EXPR */ 1835 BM(G3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1836 /* LINTED E_FALSE_LOGICAL_EXPR */ 1837 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1838 1839 {FCCA, FCC, NO_DFS, NO_PSCAN, NO_REQ, 1840 BMZERO, 1841 BMZERO, 1842 BMZERO, 1843 /* LINTED E_FALSE_LOGICAL_EXPR */ 1844 BM(F1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1845 /* LINTED E_FALSE_LOGICAL_EXPR */ 1846 BM(G1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1847 /* LINTED E_FALSE_LOGICAL_EXPR */ 1848 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1849 1850 {MKKA, MKK, NO_DFS, 1851 PSCAN_MKKA | PSCAN_MKKA_G | PSCAN_MKKA1 | PSCAN_MKKA1_G | 1852 PSCAN_MKKA2 | PSCAN_MKKA2_G, DISALLOW_ADHOC_11A_TURB, 1853 BMZERO, 1854 BMZERO, 1855 BMZERO, 1856 /* LINTED E_FALSE_LOGICAL_EXPR */ 1857 BM(F2_2412_2462, F1_2467_2472, F2_2484_2484, -1, -1, -1, -1, -1, 1858 -1, -1, -1, -1), 1859 /* LINTED E_FALSE_LOGICAL_EXPR */ 1860 BM(G2_2412_2462, G1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1861 -1), 1862 /* LINTED E_FALSE_LOGICAL_EXPR */ 1863 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1864 1865 {MKKC, MKK, NO_DFS, NO_PSCAN, NO_REQ, 1866 BMZERO, 1867 BMZERO, 1868 BMZERO, 1869 /* LINTED E_FALSE_LOGICAL_EXPR */ 1870 BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1871 /* LINTED E_FALSE_LOGICAL_EXPR */ 1872 BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1873 /* LINTED E_FALSE_LOGICAL_EXPR */ 1874 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1875 1876 {WORLD, ETSI, NO_DFS, NO_PSCAN, NO_REQ, 1877 BMZERO, 1878 BMZERO, 1879 BMZERO, 1880 /* LINTED E_FALSE_LOGICAL_EXPR */ 1881 BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1882 /* LINTED E_FALSE_LOGICAL_EXPR */ 1883 BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1884 /* LINTED E_FALSE_LOGICAL_EXPR */ 1885 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1886 1887 {WOR0_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, 1888 /* LINTED E_FALSE_LOGICAL_EXPR */ 1889 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, 1890 W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1891 /* LINTED E_FALSE_LOGICAL_EXPR */ 1892 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 1893 -1, -1, -1, -1, -1), 1894 BMZERO, 1895 /* LINTED E_FALSE_LOGICAL_EXPR */ 1896 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 1897 W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, 1898 -1, -1), 1899 /* LINTED E_FALSE_LOGICAL_EXPR */ 1900 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 1901 -1, -1), 1902 /* LINTED E_FALSE_LOGICAL_EXPR */ 1903 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1904 1905 {WOR01_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 1906 ADHOC_PER_11D, 1907 /* LINTED E_FALSE_LOGICAL_EXPR */ 1908 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, 1909 W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1910 /* LINTED E_FALSE_LOGICAL_EXPR */ 1911 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 1912 -1, -1, -1, -1, -1), 1913 BMZERO, 1914 /* LINTED E_FALSE_LOGICAL_EXPR */ 1915 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432, 1916 W1_2447_2457, -1, -1, -1, -1, -1, -1, -1), 1917 /* LINTED E_FALSE_LOGICAL_EXPR */ 1918 BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1919 /* LINTED E_FALSE_LOGICAL_EXPR */ 1920 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1921 1922 {WOR02_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 1923 ADHOC_PER_11D, 1924 /* LINTED E_FALSE_LOGICAL_EXPR */ 1925 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, 1926 W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1927 /* LINTED E_FALSE_LOGICAL_EXPR */ 1928 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 1929 -1, -1, -1, -1, -1), 1930 BMZERO, 1931 /* LINTED E_FALSE_LOGICAL_EXPR */ 1932 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 1933 W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 1934 /* LINTED E_FALSE_LOGICAL_EXPR */ 1935 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 1936 -1, -1), 1937 /* LINTED E_FALSE_LOGICAL_EXPR */ 1938 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1939 1940 {EU1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, 1941 /* LINTED E_FALSE_LOGICAL_EXPR */ 1942 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, 1943 W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1944 /* LINTED E_FALSE_LOGICAL_EXPR */ 1945 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 1946 -1, -1, -1, -1, -1), 1947 BMZERO, 1948 /* LINTED E_FALSE_LOGICAL_EXPR */ 1949 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W2_2472_2472, 1950 W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1), 1951 /* LINTED E_FALSE_LOGICAL_EXPR */ 1952 BM(WG1_2412_2462, WG2_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 1953 -1, -1), 1954 /* LINTED E_FALSE_LOGICAL_EXPR */ 1955 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1956 1957 {WOR1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 1958 /* LINTED E_FALSE_LOGICAL_EXPR */ 1959 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, 1960 W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1961 BMZERO, 1962 BMZERO, 1963 /* LINTED E_FALSE_LOGICAL_EXPR */ 1964 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 1965 W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, 1966 -1, -1), 1967 /* LINTED E_FALSE_LOGICAL_EXPR */ 1968 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 1969 -1, -1), 1970 /* LINTED E_FALSE_LOGICAL_EXPR */ 1971 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1972 1973 {WOR2_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 1974 /* LINTED E_FALSE_LOGICAL_EXPR */ 1975 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, 1976 W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1977 /* LINTED E_FALSE_LOGICAL_EXPR */ 1978 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 1979 -1, -1, -1, -1, -1), 1980 BMZERO, 1981 /* LINTED E_FALSE_LOGICAL_EXPR */ 1982 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 1983 W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, 1984 -1, -1), 1985 /* LINTED E_FALSE_LOGICAL_EXPR */ 1986 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 1987 -1, -1), 1988 /* LINTED E_FALSE_LOGICAL_EXPR */ 1989 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 1990 1991 {WOR3_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, 1992 /* LINTED E_FALSE_LOGICAL_EXPR */ 1993 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, -1, -1, 1994 -1, -1, -1, -1, -1, -1), 1995 /* LINTED E_FALSE_LOGICAL_EXPR */ 1996 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 1997 -1, -1, -1, -1, -1), 1998 BMZERO, 1999 /* LINTED E_FALSE_LOGICAL_EXPR */ 2000 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 2001 W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 2002 /* LINTED E_FALSE_LOGICAL_EXPR */ 2003 BM(WG1_2412_2462, WG2_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 2004 -1, -1), 2005 /* LINTED E_FALSE_LOGICAL_EXPR */ 2006 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 2007 2008 {WOR4_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 2009 /* LINTED E_FALSE_LOGICAL_EXPR */ 2010 BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, -1, -1, -1, -1, -1, 2011 -1, -1, -1, -1), 2012 /* LINTED E_FALSE_LOGICAL_EXPR */ 2013 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 2014 -1, -1, -1, -1, -1), 2015 BMZERO, 2016 /* LINTED E_FALSE_LOGICAL_EXPR */ 2017 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432, 2018 W1_2447_2457, -1, -1, -1, -1, -1, -1, -1), 2019 /* LINTED E_FALSE_LOGICAL_EXPR */ 2020 BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 2021 /* LINTED E_FALSE_LOGICAL_EXPR */ 2022 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 2023 2024 {WOR5_ETSIC, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 2025 /* LINTED E_FALSE_LOGICAL_EXPR */ 2026 BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, -1, -1, -1, -1, -1, 2027 -1, -1, -1, -1), 2028 BMZERO, 2029 BMZERO, 2030 /* LINTED E_FALSE_LOGICAL_EXPR */ 2031 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 2032 W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 2033 /* LINTED E_FALSE_LOGICAL_EXPR */ 2034 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 2035 -1, -1), 2036 /* LINTED E_FALSE_LOGICAL_EXPR */ 2037 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 2038 2039 {WOR9_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 2040 /* LINTED E_FALSE_LOGICAL_EXPR */ 2041 BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, W1_5500_5700, -1, -1, 2042 -1, -1, -1, -1, -1, -1), 2043 /* LINTED E_FALSE_LOGICAL_EXPR */ 2044 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, 2045 -1, -1, -1, -1, -1), 2046 BMZERO, 2047 /* LINTED E_FALSE_LOGICAL_EXPR */ 2048 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432, 2049 W1_2447_2457, -1, -1, -1, -1, -1, -1, -1), 2050 /* LINTED E_FALSE_LOGICAL_EXPR */ 2051 BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 2052 /* LINTED E_FALSE_LOGICAL_EXPR */ 2053 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 2054 2055 {WORA_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 2056 /* LINTED E_FALSE_LOGICAL_EXPR */ 2057 BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, W1_5500_5700, -1, -1, 2058 -1, -1, -1, -1, -1, -1), 2059 BMZERO, 2060 BMZERO, 2061 /* LINTED E_FALSE_LOGICAL_EXPR */ 2062 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 2063 W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 2064 /* LINTED E_FALSE_LOGICAL_EXPR */ 2065 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 2066 -1, -1), 2067 /* LINTED E_FALSE_LOGICAL_EXPR */ 2068 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 2069 2070 {WORB_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A, 2071 /* LINTED E_FALSE_LOGICAL_EXPR */ 2072 BM(W1_5260_5320, W1_5180_5240, W1_5500_5700, -1, -1, -1, -1, -1, 2073 -1, -1, -1, -1), 2074 BMZERO, 2075 BMZERO, 2076 /* LINTED E_FALSE_LOGICAL_EXPR */ 2077 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, 2078 W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 2079 /* LINTED E_FALSE_LOGICAL_EXPR */ 2080 BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, 2081 -1, -1), 2082 /* LINTED E_FALSE_LOGICAL_EXPR */ 2083 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)}, 2084 2085 {NULL1, NO_CTL, NO_DFS, NO_PSCAN, NO_REQ, 2086 BMZERO, 2087 BMZERO, 2088 BMZERO, 2089 BMZERO, 2090 BMZERO, 2091 BMZERO} 2092 }; 2093 2094 static const struct cmode modes[] = { 2095 {ATH9K_MODE_11A, CHANNEL_A}, 2096 {ATH9K_MODE_11B, CHANNEL_B}, 2097 {ATH9K_MODE_11G, CHANNEL_G}, 2098 {ATH9K_MODE_11NG_HT20, CHANNEL_G_HT20}, 2099 {ATH9K_MODE_11NG_HT40PLUS, CHANNEL_G_HT40PLUS}, 2100 {ATH9K_MODE_11NG_HT40MINUS, CHANNEL_G_HT40MINUS}, 2101 {ATH9K_MODE_11NA_HT20, CHANNEL_A_HT20}, 2102 {ATH9K_MODE_11NA_HT40PLUS, CHANNEL_A_HT40PLUS}, 2103 {ATH9K_MODE_11NA_HT40MINUS, CHANNEL_A_HT40MINUS}, 2104 }; 2105 2106 static struct japan_bandcheck j_bandcheck[] = { 2107 {F1_5170_5230, AR_EEPROM_EEREGCAP_EN_KK_U1_ODD}, 2108 {F4_5180_5240, AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN}, 2109 {F2_5260_5320, AR_EEPROM_EEREGCAP_EN_KK_U2}, 2110 {F4_5500_5700, AR_EEPROM_EEREGCAP_EN_KK_MIDBAND} 2111 }; 2112 2113 #ifdef __cplusplus 2114 } 2115 #endif 2116 2117 #endif /* _ARN_REGD_COMMON_H */ 2118