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13.\" Copyright 2022 Oxide Compuer Company
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15.Dd July 2, 2022
16.Dt MAC_INTR 9S
17.Os
18.Sh NAME
19.Nm mac_intr ,
20.Nm mac_intr_t
21.Nd MAC interrupt information
22.Sh SYNOPSIS
23.In sys/mac_provider.h
24.Sh INTERFACE STABILITY
25.Sy Uncommitted -
26This interface is still evolving.
27API and ABI stability is not guaranteed.
28.Sh DESCRIPTION
29The
30.Vt mac_intr_t
31structure is used by the MAC framework as part of the
32.Dv MAC_CAPAB_RINGS
33capability.
34For more background on the MAC framework, please see
35.Xr mac 9E
36and for more information on the
37.Dv MAC_CAPAB_RINGS
38capability,
39.Xr mac_capab_rings 9E .
40.Pp
41The
42.Vt mac_intr_t
43structure is used to describe an interrupt and additional capabilities
44around it.
45The structure is usually used as part of another
46.Xr mac 9E
47related structure such as the
48.Fa mri_intr
49member of the
50.Xr mac_ring_info 9S
51structure.
52The MAC framework uses the functions described here to enable and
53disable interrupt generation for a specific ring, which is used as part
54of switching between polling and interrupt-driven receiving.
55.Pp
56While the structure does embed a
57.Vt ddi_intr_handle_t
58that corresponds to the ring's unerlying MSI-X, MSI, INTx, or other
59interrupt type, the
60.Vt mac_intr_t
61still represents and is scoped to a single ring itself.
62.Sh TYPES
63Tye following types define the function pointers in use in the
64.Vt mac_intr_t
65structure.
66.Bd -literal -offset indent
67typedef int (*mac_intr_enable_t)(mac_intr_handle_t);
68typedef int (*mac_intr_disable_t)(mac_intr_handle_t);
69.Ed
70.Sh STRUCTURE MEMBERS
71.Bd -literal -offset indent
72mac_intr_handle_t       mi_handle;
73mac_intr_enable_t       mi_enable;
74mac_intr_disable_t      mi_disable;
75ddi_intr_handle_t       mi_ddi_handle;
76.Ed
77.Pp
78The
79.Fa mi_handle
80member should be set to a driver-specific value that will be passed back
81to the driver in the various callback functions that are setin the
82structure and described below.
83.Pp
84The
85.Fa mi_enable
86member is a required entry point for receive rings and optional for
87transmit rings.
88It should be set to a function which enables interrupts for the ring.
89For more information, see
90.Xr mi_enable 9E .
91.Pp
92The
93.Fa mi_disable
94member is a required entry point for receive rings and an optional entry
95point for transmit rings.
96It should be set to a function which disables interrupts for the ring.
97For more information, see
98.Xr mi_disable 9E .
99.Pp
100The
101.Fa mi_ddi_handle
102member should be set to the interrupt handle that corresponds to the
103ring.
104the interrupt handle will have come from
105.Xr ddi_intr_alloc 9F .
106This member should only be set if the interrupt is a MSI or MSI-X
107interrupt.
108.Sh SEE ALSO
109.Xr mac 9E ,
110.Xr mac_capab_rings 9E ,
111.Xr mi_disable 9E ,
112.Xr mi_enable 9E ,
113.Xr ddi_intr_alloc 9F ,
114.Xr mac_ring_inf 9S
115