Copyright (c) 1996, Sun Microsystems, Inc. All Rights Reserved
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#include <sys/pccard.h> int32_t csx_Parse_CISTPL_CFTABLE_ENTRY(client_handle_t ch, tuple_t *tu, cistpl_cftable_entry_t *cft);
Client handle returned from csx_RegisterClient(9F).
Pointer to a tuple_t structure (see tuple(9S)) returned by a call to csx_GetFirstTuple(9F) or csx_GetNextTuple(9F).
Pointer to a cistpl_cftable_entry_t structure which contains the parsed CISTPL_CFTABLE_ENTRY tuple information upon return from this function.
The CISTPL_CFTABLE_ENTRY tuple is used to describe each possible configuration of a PC Card and to distinguish among the permitted configurations. The CISTPL_CONFIG tuple must precede all CISTPL_CFTABLE_ENTRY tuples.
uint32_t flags; /* valid descriptions */ uint32_t ifc; /* interface description */ /* information */ uint32_t pin; /* values for PRR */ uint32_t index; /* configuration index number */ cistpl_cftable_entry_pd_t pd; /* power requirements */ /* description */ cistpl_cftable_entry_speed_t speed; /* device speed description */ cistpl_cftable_entry_io_t io; /* device I/O map */ cistpl_cftable_entry_irq_t irq; /* device IRQ utilization */ cistpl_cftable_entry_mem_t mem; /* device memory space */ cistpl_cftable_entry_misc_t misc; /* miscellaneous /* device features */
The flags field is defined and bit-mapped as follows: CISTPL_CFTABLE_TPCE_DEFAULT
This is a default configuration
If configuration byte exists
Power information exists
Timing information exists
I/O information exists
IRQ information exists
MEM space information exists
MISC information exists
STCE_EV exists
STCE_PD exists
If the CISTPL_CFTABLE_TPCE_IF flag is set, the ifc field is bit-mapped and defined as follows: CISTPL_CFTABLE_TPCE_IF_MEMORY
Memory interface
IO and memory
Custom interface 0
Custom interface 1
Custom interface 2
Custom interface 3
Interface type mask
BVD active in PRR
WP active in PRR
RDY active in PRR
WAIT - mem cycles
pin is a value for the Pin Replacement Register.
index is a configuration index number.
The structure members of cistpl_cftable_entry_pd_t are:
uint32_t flags; /* which descriptions are valid */ cistpl_cftable_entry_pwr_t pd_vcc; /* VCC power description */ cistpl_cftable_entry_pwr_t pd_vpp1; /* Vpp1 power description */ cistpl_cftable_entry_pwr_t pd_vpp2; /* Vpp2 power description */
This flags field is bit-mapped and defined as follows: CISTPL_CFTABLE_TPCE_FS_PWR_VCC
Vcc description valid
Vpp1 description valid
Vpp2 description valid
The structure members of cistpl_cftable_entry_pwr_t are:
uint32_t nomV; /* nominal supply voltage */ uint32_t nomV_flags; uint32_t minV; /* minimum supply voltage */ uint32_t minV_flags; uint32_t maxV; /* maximum supply voltage */ uint32_t maxV_flags; uint32_t staticI; /* continuous supply current */ uint32_t staticI_flags; uint32_t avgI; /* max current required averaged over 1 sec. */ uint32_t avgI_flags; uint32_t peakI; /* max current required averaged over 10mS */ uint32_t peakI_flags; uint32_t pdownI; /* power down supply current required */ uint32_t pdownI_flags;
nomV, minV, maxV, staticI, avgI, peakI_flag, and pdownI are defined and bit-mapped as follows: CISTPL_CFTABLE_PD_NOMV
Nominal supply voltage
Minimum supply voltage
Maximum supply voltage
Continuous supply current
Maximum current required averaged over 1 second
Maximum current required averaged over 10mS
Power down supply current required
nomV_flags, minV_flags, maxV_flags, staticI_flags, avgI_flags, peakI_flags, and pdownI_flags are defined and bit-mapped as follows: CISTPL_CFTABLE_PD_EXISTS
This parameter exists
Multiply return value by 10
Zero value required
No connection ever
The structure members of cistpl_cftable_entry_speed_t are:
uint32_t flags; /* which timing information is present */ uint32_t wait; /* max WAIT time in device speed format */ uint32_t nS_wait; /* max WAIT time in nS */ uint32_t rdybsy; /* max RDY/BSY time in device speed format */ uint32_t nS_rdybsy; /* max RDY/BSY time in nS */ uint32_t rsvd; /* max RSVD time in device speed format */ uint32_t nS_rsvd; /* max RSVD time in nS */
The flags field is bit-mapped and defined as follows: CISTPL_CFTABLE_TPCE_FS_TD_WAIT
WAIT timing exists
RSVD timing exists
The structure members of cistpl_cftable_entry_io_t are:
uint32_t flags; /* direct copy of TPCE_IO byte in tuple */ uint32_t addr_lines; /* number of decoded I/O address lines */ uint32_t ranges; /* number of I/O ranges */ cistpl_cftable_entry_io_range_t range[CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES];
The flags field is defined and bit-mapped as follows: CISTPL_CFTABLE_TPCE_FS_IO_BUS
Bus width mask
8-bit flag
16-bit flag
IO address ranges exist
The structure members of cistpl_cftable_entry_io_range_t are:
uint32_t addr; /* I/O start address */ uint32_t length; /* I/O register length */
The structure members of cistpl_cftable_entry_irq_t are:
uint32_t flags; /* direct copy of TPCE_IR byte in tuple */ uint32_t irqs; /* bit mask for each allowed IRQ */
The structure members of cistpl_cftable_entry_mem_t are:
uint32_t flags; /* memory descriptor type and host addr info */ uint32_t windows; /* number of memory space descriptors */ cistpl_cftable_entry_mem_window_t window[CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS];
The flags field is defined and bit-mapped as follows: CISTPL_CFTABLE_TPCE_FS_MEM3
Space descriptors
host_addr=card_addr
Card address=0 any host address
If host address is present in MEM3
The structure members of cistpl_cftable_entry_mem_window_t are:
uint32_t length; /* length of this window */ uint32_t card_addr; /* card address */ uint32_t host_addr; /* host address */
The structure members of cistpl_cftable_entry_misc_t are:
uint32_t flags; /* miscellaneous features flags */
The flags field is defined and bit-mapped as follows: CISTPL_CFTABLE_TPCE_MI_MTC_MASK
Max twin cards mask
Audio on BVD2
R/O storage
Powerdown capable
DMAREQ mask
DMAREQ on SPKR
DMAREQ on IOIS16
DMAREQ on INPACK
DMA width 8 bits
DMA width 16 bits
Successful operation.
Client handle is invalid.
Parser does not know how to parse tuple.
No PC Card in socket.
No Card Information Structure (CIS) on PC Card.
No PCMCIA hardware installed.