1.\" 2.\" This file and its contents are supplied under the terms of the 3.\" Common Development and Distribution License ("CDDL"), version 1.0. 4.\" You may only use this file in accordance with the terms of version 5.\" 1.0 of the CDDL. 6.\" 7.\" A full copy of the text of the CDDL should have accompanied this 8.\" source. A copy of the CDDL is also available via the Internet at 9.\" http://www.illumos.org/license/CDDL. 10.\" 11.\" 12.\" Copyright 2019 Joyent, Inc. 13.\" 14.Dd June 25, 2019 15.Dt IMC 4D 16.Os 17.Sh NAME 18.Nm imc 19.Nd Intel memory controller driver 20.Sh SYNOPSIS 21.Pa /dev/mc/mc* 22.Sh DESCRIPTION 23The 24.Nm 25driver interfaces with the memory controller found on certain 26generations of Intel CPUs and provides a means for decoding physical 27addresses to the corresponding memory device. 28The 29.Nm 30driver plugs into the operating systems fault management framework 31providing additional details to the system about the memory topology and 32the ability to decode physical addresses into the corresponding portion 33of the memory hierarchy. 34.Pp 35The 36.Nm 37driver is supported on the following Intel processors: 38.Bl -bullet -offset indent -width Sy 39.It 40Sandy Bridge E5 and E7 Xeon Processors 41.It 42Ivy Bridge E5 and E7 Xeon Processors 43.It 44Haswell E5 and E7 Xeon Processors 45.It 46Broadwell E5 and E7 Xeon Processors 47.It 48Skylake Xeon Scalable Processors 49.It 50Cascade Lake Xeon Scalable Processors 51.It 52Broadwell and Skylake Xeon-D processors 53.El 54.Pp 55Other lines involving the above microarchitectures, such as Xeon E3 56branded processors, are not supported as they do not provide the 57necessary hardware support. 58.Pp 59The 60.Nm 61driver is a pseudo-device driver that amalgamates all of the different 62.Xr imcstub 4D 63instances into a coherent view. 64The 65.Xr imcstub 4D 66driver attaches to all of the different PCI devices that the processor 67exposes. 68.Pp 69One challenge with the 70.Nm 71driver is the Intel Enhanced Machine Check Architecture v2 72.Pq EMCAv2 . 73Many vendors use EMCAv2 to hide memory errors from the operating system. 74Such systems limit the effectiveness of the 75.Nm 76driver and the fault management architecture by hiding correctable and 77uncorrectable DIMM errors from the operating system. 78.Pp 79The 80.Nm 81driver has a few limitations. 82Currently it does not always properly handle lockstep and mirroring 83mode, particularly in variants that are common on Skylake and newer 84systems. 85It also does not properly handle cases where Intel Optane NVDIMMs are in 86use on the memory bus. 87.Sh ARCHITECTURE 88The 89.Nm 90driver is only supported on specific Intel 91.Sy x86 92systems. 93.Sh FILES 94.Bl -tag -width Pa 95.It Pa /platform/i86pc/kernel/drv/amd64/imc 9664-bit device driver (x86). 97.It Pa /platform/i86pc/kernel/drv/imc.conf 98Driver configuration file. 99.El 100.Sh SEE ALSO 101.Xr imcstub 4D , 102.Xr fmadm 8 , 103.Xr fmdump 8 104