Copyright (c) 2005 Innovative Computing Labs Computer Science Department, University of Tennessee, Knoxville, TN. All Rights Reserved.
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* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the University of Tennessee nor the names of its contributors
may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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license conforms to the BSD License template.
Portions Copyright (c) 2008, Sun Microsystems Inc. All Rights Reserved.
The Solaris cpc(3CPC) subsystem implements a number of predefined, generic performance counter events. Each generic event maps onto a single platform specific event and one or more optional attributes. Each hardware platform only need support a subset of the total set of generic events.
The defined generic events are: PAPI_br_cn
Conditional branch instructions
Branch instructions taken
Conditional branch instructions mispredicted
Conditional branch instructions not taken
Conditional branch instructions correctly predicted
Unconditional branch instructions
Cycles branch units are idle
Branch target address cache misses
Requests for exclusive access to clean cache line
Requests for cache invalidation
Requests for cache line intervention
Request for exclusive access to shared cache line
Request for cache snoop
Failed conditional store instructions
Successful conditional store instructions
Total conditional store instructions
Floating point add instructions
Floating point divide instructions
Floating point multiply and add instructions
Floating point multiply instructions
Floating point inverse instructions
Floating point operations
Cycles the floating point unit stalled
Cycles the floating point units are idle
Floating point sqrt instructions
Cycles with maximum instructions completed
Cycles with maximum instruction issue
Cycles when units are idle
Hardware interrupts
Integer instructions
Total cycles
Instructions issued
Instructions completed
VectorSIMD instructions
Level 1 data cache accesses
Level 1 data cache hits
Level 1 data cache misses
Level 1 data cache reads
Level 1 data cache writes
Level 1 instruction cache accesses
Level 1 instruction cache hits
Level 1 instruction cache misses
Level 1 instruction cache reads
Level 1 instruction cache writes
Level 1 cache load misses
Level 1 cache store misses
Level 1 cache accesses
Level 1 cache hits
Level 1 cache misses
Level 1 cache reads
Level 1 cache writes
Level 2 data cache accesses
Level 2 data cache hits
Level 2 data cache misses
Level 2 data cache reads
Level 2 data cache writes
Level 2 instruction cache accesses
Level 2 instruction cache hits
Level 2 instruction cache misses
Level 2 instruction cache reads
Level 2 instruction cache writes
Level 2 cache load misses
Level 2 cache store misses
Level 2 cache accesses
Level 2 cache hits
Level 2 cache misses
Level 2 cache reads
Level 2 cache writes
Level 3 data cache accesses
Level 3 data cache hits
Level 3 data cache misses
Level 3 data cache reads
Level 3 data cache writes
Level 3 instruction cache accesses
Level 3 instruction cache hits
Level 3 instruction cache misses
Level 3 instruction cache reads
Level 3 instruction cache writes
Level 3 cache load misses
Level 3 cache store misses
Level 3 cache accesses
Level 3 cache hits
Level 3 cache misses
Level 3 cache reads
Level 3 cache writes
Load Instructions
Loadstore Instructions
Cycles load store units are idle
Cycles stalled waiting for memory reads
Cycles stalled waiting for memory accesses
Cycles stalled waiting for memory writes
Data prefetch cache misses
Cycles stalled on any resource
Store Instructions
Cycles with no instructions completed
Synchronization instructions completed
Data TLB misses
Instruction TLB misses
TLB shootdowns
Total TLB misses
The tables below define mappings of generic events to platform events and any associated attribute for all supported platforms.
Generic Event Platform Event Unit Mask |
PAPI_br_ins FR_retired_branches_w_excp_intr 0x0 |
PAPI_br_msp FR_retired_branches_mispred 0x0 |
PAPI_br_tkn FR_retired_taken_branches 0x0 |
PAPI_fp_ops FP_dispatched_fpu_ops 0x3 |
PAPI_fad_ins FP_dispatched_fpu_ops 0x1 |
PAPI_fml_ins FP_dispatched_fpu_ops 0x2 |
PAPI_fpu_idl FP_cycles_no_fpu_ops_retired 0x0 |
PAPI_tot_cyc BU_cpu_clk_unhalted 0x0 |
PAPI_tot_ins FR_retired_x86_instr_w_excp_intr 0x0 |
PAPI_l1_dca DC_access 0x0 |
PAPI_l1_dcm DC_miss 0x0 |
PAPI_l1_ldm DC_refill_from_L2 0xe |
PAPI_l1_stm DC_refill_from_L2 0x10 |
PAPI_l1_ica IC_fetch 0x0 |
PAPI_l1_icm IC_miss 0x0 |
PAPI_l1_icr IC_fetch 0x0 |
PAPI_l2_dch DC_refill_from_L2 0x1e |
PAPI_l2_dcm DC_refill_from_system 0x1e |
PAPI_l2_dcr DC_refill_from_L2 0xe |
PAPI_l2_dcw DC_refill_from_L2 0x10 |
PAPI_l2_ich IC_refill_from_L2 0x0 |
PAPI_l2_icm IC_refill_from_system 0x0 |
PAPI_l2_ldm DC_refill_from_system 0xe |
PAPI_l2_stm DC_refill_from_system 0x10 |
PAPI_res_stl FR_dispatch_stalls 0x0 |
PAPI_stl_icy FR_nothing_to_dispatch 0x0 |
PAPI_hw_int FR_taken_hardware_intrs 0x0 |
PAPI_tlb_dm DC_dtlb_L1_miss_L2_miss 0x0 |
PAPI_tlb_im IC_itlb_L1_miss_L2_miss 0x0 |
PAPI_fp_ins FR_retired_fpu_instr 0xd |
PAPI_vec_ins FR_retired_fpu_instr 0x4 |
Generic Event Platform Event Event Mask |
PAPI_br_ins FR_retired_branches_w_excp_intr 0x0 |
PAPI_br_msp FR_retired_branches_mispred 0x0 |
PAPI_br_tkn FR_retired_taken_branches 0x0 |
PAPI_fp_ops FP_dispatched_fpu_ops 0x3 |
PAPI_fad_ins FP_dispatched_fpu_ops 0x1 |
PAPI_fml_ins FP_dispatched_fpu_ops 0x2 |
PAPI_fpu_idl FP_cycles_no_fpu_ops_retired 0x0 |
PAPI_tot_cyc BU_cpu_clk_unhalted 0x0 |
PAPI_tot_ins FR_retired_x86_instr_w_excp_intr 0x0 |
PAPI_l1_dca DC_access 0x0 |
PAPI_l1_dcm DC_miss 0x0 |
PAPI_l1_ldm DC_refill_from_L2 0xe |
PAPI_l1_stm DC_refill_from_L2 0x10 |
PAPI_l1_ica IC_fetch 0x0 |
PAPI_l1_icm IC_miss 0x0 |
PAPI_l1_icr IC_fetch 0x0 |
PAPI_l2_dch DC_refill_from_L2 0x1e |
PAPI_l2_dcm DC_refill_from_system 0x1e |
PAPI_l2_dcr DC_refill_from_L2 0xe |
PAPI_l2_dcw DC_refill_from_L2 0x10 |
PAPI_l2_ich IC_refill_from_L2 0x0 |
PAPI_l2_icm IC_refill_from_system 0x0 |
PAPI_l2_ldm DC_refill_from_system 0xe |
PAPI_l2_stm DC_refill_from_system 0x10 |
PAPI_res_stl FR_dispatch_stalls 0x0 |
PAPI_stl_icy FR_nothing_to_dispatch 0x0 |
PAPI_hw_int FR_taken_hardware_intrs 0x0 |
PAPI_tlb_dm DC_dtlb_L1_miss_L2_miss 0x7 |
PAPI_tlb_im IC_itlb_L1_miss_L2_miss 0x3 |
PAPI_fp_ins FR_retired_fpu_instr 0xd |
PAPI_vec_ins FR_retired_fpu_instr 0x4 |
PAPI_l3_dcr L3_read_req 0xf1 |
PAPI_l3_icr L3_read_req 0xf2 |
PAPI_l3_tcr L3_read_req 0xf7 |
PAPI_l3_stm L3_miss 0xf4 |
PAPI_l3_ldm L3_miss 0xf3 |
PAPI_l3_tcm L3_miss 0xf7 |
Generic Event Platform Event Event Mask |
PAPI_br_msp branch_retired 0xa |
PAPI_br_ins branch_retired 0xf |
PAPI_br_tkn branch_retired 0xc |
PAPI_br_ntk branch_retired 0x3 |
PAPI_br_prc branch_retired 0x5 |
PAPI_tot_ins instr_retired 0x3 |
PAPI_tot_cyc global_power_events 0x1 |
PAPI_tlb_dm page_walk_type 0x1 |
PAPI_tlb_im page_walk_type 0x2 |
PAPI_tlb_tm page_walk_type 0x3 |
PAPI_l2_ldm BSQ_cache_reference 0x100 |
PAPI_l2_stm BSQ_cache_reference 0x400 |
PAPI_l2_tcm BSQ_cache_reference 0x500 |
Generic Event Platform Event Event Mask |
PAPI_ca_shr l2_ifetch 0xf |
PAPI_ca_cln bus_tran_rfo 0x0 |
PAPI_ca_itv bus_tran_inval 0x0 |
PAPI_tlb_im itlb_miss 0x0 |
PAPI_btac_m btb_misses 0x0 |
PAPI_hw_int hw_int_rx 0x0 |
PAPI_br_cn br_inst_retired 0x0 |
PAPI_br_tkn br_taken_retired 0x0 |
PAPI_br_msp br_miss_pred_taken_ret 0x0 |
PAPI_br_ins br_inst_retired 0x0 |
PAPI_res_stl resource_stalls 0x0 |
PAPI_tot_iis inst_decoder 0x0 |
PAPI_tot_ins inst_retired 0x0 |
PAPI_tot_cyc cpu_clk_unhalted 0x0 |
PAPI_l1_dcm dcu_lines_in 0x0 |
PAPI_l1_icm l2_ifetch 0xf |
PAPI_l1_tcm l2_rqsts 0xf |
PAPI_l1_dca data_mem_refs 0x0 |
PAPI_l1_ldm l2_ld 0xf |
PAPI_l1_stm l2_st 0xf |
PAPI_l2_icm bus_tran_ifetch 0x0 |
PAPI_l2_dcr l2_ld 0xf |
PAPI_l2_dcw l2_st 0xf |
PAPI_l2_tcm l2_lines_in 0x0 |
PAPI_l2_tca l2_rqsts 0xf |
PAPI_l2_tcw l2_st 0xf |
PAPI_l2_stm l2_m_lines_inm 0x0 |
PAPI_fp_ins flops 0x0 |
PAPI_fp_ops flops 0x0 |
PAPI_fml_ins mul 0x0 |
PAPI_fdv_ins div 0x0 |
Generic Event Platform Event |
PAPI_tot_cyc Cycle_cnt |
PAPI_tot_ins Instr_cnt |
PAPI_tot_iis Instr_cnt |
PAPI_l1_dcr DC_rd |
PAPI_l1_dcw DC_wr |
PAPI_l1_ica IC_ref |
PAPI_l1_ich IC_hit |
PAPI_l2_tca EC_ref |
PAPI_l2_dch EC_rd_hit |
PAPI_l2_tch EC_hit |
PAPI_l2_ich EC_ic_hit |
PAPI_ca_inv EC_snoop_inv |
PAPI_br_msp Dispatch0_mispred |
PAPI_ca_snp EC_snoop_cb |
Generic Event Platform Event |
PAPI_tot_cyc Cycle_cnt |
PAPI_tot_ins Instr_cnt |
PAPI_tot_iis Instr_cnt |
PAPI_fma_ins FA_pipe_completion |
PAPI_fml_ins FM_pipe_completion |
PAPI_l1_dcr DC_rd |
PAPI_l1_dcw DC_wr |
PAPI_l1_ica IC_ref |
PAPI_l1_icm IC_miss |
PAPI_l2_tca EC_ref |
PAPI_l2_ldm EC_rd_miss |
PAPI_l2_tcm EC_misses |
PAPI_l2_icm EC_ic_miss |
PAPI_tlb_dm DTLB_miss |
PAPI_tlb_im ITLB_miss |
PAPI_br_ntk IU_Stat_Br_count_untaken |
PAPI_br_msp Dispatch0_mispred |
PAPI_br_tkn IU_Stat_Br_count_taken |
PAPI_ca_inv EC_snoop_inv |
PAPI_ca_snp EC_snoop_cb |
Generic Event Platform Event |
PAPI_tot_cyc Cycle_cnt |
PAPI_tot_ins Instr_cnt |
PAPI_tot_iis Instr_cnt |
PAPI_fma_ins FA_pipe_completion |
PAPI_fml_ins FM_pipe_completion |
PAPI_l1_dcr DC_rd |
PAPI_l1_stm DC_wr_miss |
PAPI_l1_ica IC_ref |
PAPI_l1_icm IC_L2_req |
PAPI_l1_ldm DC_rd_miss |
PAPI_l1_dcw DC_wr |
PAPI_l2_tca L2_ref |
PAPI_l2_ldm L2_rd_miss |
PAPI_l2_icm L2_IC_miss |
PAPI_l2_stm L2_write_miss |
PAPI_l2_tcm L2_miss |
PAPI_l3_tcm L3_miss |
PAPI_l3_icm L3_IC_miss |
PAPI_l3_ldm L3_rd_miss |
PAPI_tlb_im ITLB_miss |
PAPI_tlb_dm DTLB_miss |
PAPI_br_tkn IU_stat_br_count_taken |
PAPI_br_ntk IU_stat_br_count_untaken |
Generic Event Platform Event |
PAPI_tot_cyc Cycle_cnt |
PAPI_l2_icm L2_imiss |
PAPI_l2_ldm L2_dmiss_ld |
PAPI_fp_ops FP_instr_cnt |
PAPI_l1_icm IC_miss |
PAPI_l1_dcm DC_miss |
PAPI_tlb_im ITLB_miss |
PAPI_tlb_dm DTLB_miss |
Generic Event Platform Event |
PAPI_tot_ins Instr_cnt |
PAPI_l1_dcm DC_miss |
PAPI_l1_icm IC_miss |
PAPI_l2_icm L2_imiss |
PAPI_l2_ldm L2_dmiss_ld |
PAPI_tlb_dm DTLB_miss |
PAPI_tlb_im ITLB_miss |
PAPI_tlb_tm TLB_miss |
PAPI_br_tkn Br_taken |
PAPI_br_ins Br_completed |
PAPI_ld_ins Instr_ld |
PAPI_sr_ins Instr_st |
Generic Event Platform Event |
PAPI_tot_cyc cycle_counts |
PAPI_tot_ins instruction_counts |
PAPI_br_tkn branch_instructions |
PAPI_fp_ops floating_instructions |
PAPI_fma_ins impdep2_instructions |
PAPI_l1_dcm op_r_iu_req_mi_go |
PAPI_l1_icm if_r_iu_req_mi_go |
PAPI_tlb_dm trap_DMMU_miss |
PAPI_tlb_im trap_IMMU_miss |
See attributes(5) for descriptions of the following attributes:
ATTRIBUTE TYPE ATTRIBUTE VALUE |
Interface Stability Volatile |
cpc(3CPC), attributes(5)
Generic names prefixed with "PAPI_" are taken from the University of Tennessee's PAPI project, http://icl.cs.utk.edu/papi.