xref: /illumos-gate/usr/src/lib/libprtdiag_psr/sparc/ontario/common/stpaul.h (revision 60a3f738d56f92ae8b80e4b62a2331c6e1f2311f)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*
28  * Sun4v Platform header file.
29  *
30  * 	called when :
31  *      machine_type ==  StPaul
32  *
33  */
34 
35 #ifndef _STPAUL_H
36 #define	_STPAUL_H
37 
38 #pragma ident	"%Z%%M%	%I%	%E% SMI"
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
44 #define	STPAUL_PLATFORM		"SUNW,Sun-Blade-T6300"
45 #define	MOTHERBOARD			"MB"
46 #define	SWITCH_A			"PCI-SWITCH0"
47 #define	SWITCH_B			"PCI-SWITCH1"
48 #define	PCI_BRIDGE			"PCI-BRIDGE"
49 #define	OPHIR				"GBE"
50 #define	USB				"USB"
51 #define	NETWORK				"network"
52 #define	PCIE				"/PCIE"
53 #define	PCIX				"/PCIX"
54 #define	FIRE_PATH0			"/pci@780"
55 #define	FIRE_PATH1			"/pci@7c0"
56 #define	SWITCH_A_PATH			"/pci@780/pci@0"
57 #define	SWITCH_B_PATH			"/pci@7c0/pci@0"
58 #define	SPL_NETWORK_0_PATH		"/pci@780/pci@0/pci@1/network@0"
59 #define	SPL_NETWORK_1_PATH		"/pci@780/pci@0/pci@1/network@0,1"
60 #define	SPL_PCIE_SLOT0			"/pci@7c0/pci@0/pci@9"
61 #define	SPL_PCIE_SLOT1			"/pci@780/pci@0/pci@9"
62 #define	SPL_PCIE_SLOT2			"/pci@7c0/pci@0/pci@8"
63 #define	SPL_PCIE_SLOT3			"/pci@780/pci@0/pci@8"
64 #define	SPL_PCIE2PCI			"/pci@7c0/pci@0/pci@1/pci@0"
65 #define	SPL_NSC_USB0_PATH		"/pci@7c0/pci@0/pci@1/pci@0/usb@1"
66 #define	SPL_NSC_USB1_PATH		"/pci@7c0/pci@0/pci@1/pci@0/usb@1,1"
67 #define	SPL_NSC_USB2_PATH		"/pci@7c0/pci@0/pci@1/pci@0/usb@1,2"
68 #define	SPL_NSC_USB3_PATH		"/pci@7c0/pci@0/pci@1/pci@0/usb@1,3"
69 
70 #define	SPL_LSI_PATH			"/pci@7c0/pci@0/pci@2/scsi@0"
71 #define	SPL_SAS_HBA			"SAS-SATA-HBA"
72 
73 /*
74  * Property names
75  */
76 #define	OBP_PROP_REG			"reg"
77 #define	OBP_PROP_CLOCK_FREQ		"clock-frequency"
78 #define	OBP_PROP_BOARD_NUM		"board#"
79 #define	OBP_PROP_REVISION_ID		"revision-id"
80 #define	OBP_PROP_VERSION_NUM		"version#"
81 #define	OBP_PROP_BOARD_TYPE		"board_type"
82 #define	OBP_PROP_ECACHE_SIZE		"ecache-size"
83 #define	OBP_PROP_IMPLEMENTATION		"implementation#"
84 #define	OBP_PROP_MASK			"mask#"
85 #define	OBP_PROP_COMPATIBLE		"compatible"
86 #define	OBP_PROP_BANNER_NAME		"banner-name"
87 #define	OBP_PROP_MODEL			"model"
88 #define	OBP_PROP_66MHZ_CAPABLE		"66mhz-capable"
89 #define	OBP_PROP_FBC_REG_ID		"fbc_reg_id"
90 #define	OBP_PROP_VERSION		"version"
91 #define	OBP_PROP_INSTANCE		"instance"
92 
93 /*
94  * Function Headers
95  */
96 int stpaul_pci_callback(picl_nodehdl_t pcih, void *args);
97 int stpaul_hw_rev_callback(picl_nodehdl_t pcih, void *args);
98 
99 #ifdef __cplusplus
100 }
101 #endif
102 
103 #endif /* _STPAUL_H */
104