xref: /illumos-gate/usr/src/lib/libprtdiag_psr/sparc/ontario/common/erie.h (revision 2654012f83cec5dc15b61dfe3e4a4915f186e7a6)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 /*
27  * Sun4v Platform header file.
28  *
29  * 	called when :
30  *      machine_type ==  erie
31  *
32  */
33 
34 #ifndef _ERIE_H
35 #define	_ERIE_H
36 
37 #pragma ident	"%Z%%M%	%I%	%E% SMI"
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 #define	ERIE_PLATFORM			"SUNW,Sun-Fire-T1000"
44 #define	ERIE_PLATFORM2			"SUNW,SPARC-Enterprise-T1000"
45 #define	ERIE_PCIE_COMP			8
46 #define	ERIE_PCIX_COMP			20
47 #define	NO_SLOT 			-1
48 #define	NET_COMP_NUM			3
49 #define	IOBOARD				"IOBD"
50 #define	MOTHERBOARD			"MB"
51 #define	OPHIR				"GBE"
52 #define	NETWORK				"network"
53 #define	ERIE_NETWORK_0			"/pci@7c0/pci@0/network@4"
54 #define	ERIE_NETWORK_1			"/pci@7c0/pci@0/network@4,1"
55 #define	ERIE_NETWORK_2			"/pci@7c0/pci@0/pci@8/network@1"
56 #define	ERIE_NETWORK_3			"/pci@7c0/pci@0/pci@8/network@1,1"
57 #define	PCIX_BUS			"/pci@7c0/pci@0/pci@8"
58 #define	PCIE_PCIX			"/pci@7c0/pci@0/pci@8"
59 #define	PCIE_PCIE			"/pci@7c0/pci@0"
60 #define	ERIE_LSI_PATH			"/pci@7c0/pci@0/pci@8/scsi@2"
61 #define	FIRE0   			"/pci@780"
62 #define	FIRE1   			"/pci@7c0"
63 #define	IOBRIDGE			"IO-BRIDGE"
64 #define	PCI_BRIDGE			"PCI-BRIDGE"
65 #define	SAS_SATA_HBA			"SAS-SATA-HBA"
66 
67 
68 
69 /*
70  * Property names
71  */
72 #define	OBP_PROP_REG			"reg"
73 #define	OBP_PROP_CLOCK_FREQ		"clock-frequency"
74 #define	OBP_PROP_BOARD_NUM		"board#"
75 #define	OBP_PROP_REVISION_ID		"revision-id"
76 #define	OBP_PROP_VERSION_NUM		"version#"
77 #define	OBP_PROP_BOARD_TYPE		"board_type"
78 #define	OBP_PROP_ECACHE_SIZE		"ecache-size"
79 #define	OBP_PROP_IMPLEMENTATION		"implementation#"
80 #define	OBP_PROP_MASK			"mask#"
81 #define	OBP_PROP_COMPATIBLE		"compatible"
82 #define	OBP_PROP_BANNER_NAME		"banner-name"
83 #define	OBP_PROP_MODEL			"model"
84 #define	OBP_PROP_66MHZ_CAPABLE		"66mhz-capable"
85 #define	OBP_PROP_FBC_REG_ID		"fbc_reg_id"
86 #define	OBP_PROP_VERSION		"version"
87 #define	OBP_PROP_INSTANCE		"instance"
88 
89 /*
90  * Function Headers
91  */
92 
93 
94 /* local functions */
95 
96 int erie_pci_callback(picl_nodehdl_t pcih, void *args);
97 int erie_hw_rev_callback(picl_nodehdl_t pcih, void *args);
98 int erie_get_first_compatible_value(picl_nodehdl_t nodeh,
99     char **outbuf);
100 int64_t erie_get_int_propval(picl_nodehdl_t modh, char *prop_name,
101     int *ret);
102 void erie_get_bus_type(char path[], char bus_type[]);
103 void erie_get_nac(char bus_type[], char path[], int s,
104     char name[],  char loc[], int size);
105 int erie_get_slot_number(char path[]);
106 int erie_get_network_instance(char path[]);
107 int erie_get_name(picl_nodehdl_t nodeh, char name[], int size);
108 int erie_get_model(picl_nodehdl_t nodeh, char model[], int size);
109 int erie_get_path(picl_nodehdl_t nodeh, char path[], int size);
110 int erie_get_class(picl_nodehdl_t nodeh, char piclclass[], int size);
111 #ifdef __cplusplus
112 }
113 #endif
114 
115 #endif /* _ERIE_H */
116