1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved. 23 * Copyright (c) 2018, Joyent, Inc. All rights reserved. 24 */ 25 26 #ifndef _LIBIPMI_H 27 #define _LIBIPMI_H 28 29 #include <sys/byteorder.h> 30 #include <sys/nvpair.h> 31 #include <sys/sysmacros.h> 32 33 /* 34 * Private interfaces for communicating with attached services over IPMI. This 35 * library is designed for system software communicating with Illumos-supported 36 * service processors over /dev/ipmi0. It is not a generic IPMI library. 37 * 38 * Documentation references refer to "Intelligent Platform Management Interface 39 * Specification Second Generation v2.0", document revision 1.0 with Februrary 40 * 15, 2006 Markup from "IPMI v2.0 Addenda, Errata, and Clarifications Revision 41 * 3". 42 */ 43 44 #ifdef __cplusplus 45 extern "C" { 46 #endif 47 48 typedef struct ipmi_handle ipmi_handle_t; 49 50 #pragma pack(1) 51 52 /* 53 * Basic netfn definitions. See section 5.1. 54 */ 55 #define IPMI_NETFN_CHASSIS 0x0 56 #define IPMI_NETFN_BRIDGE 0x2 57 #define IPMI_NETFN_SE 0x4 58 #define IPMI_NETFN_APP 0x6 59 #define IPMI_NETFN_FIRMWARE 0x8 60 #define IPMI_NETFN_STORAGE 0xa 61 #define IPMI_NETFN_TRANSPORT 0x0C 62 #define IPMI_NETFN_OEM 0x2e 63 64 /* 65 * Error definitions 66 */ 67 #define EIPMI_BASE 2000 68 69 typedef enum { 70 EIPMI_NOMEM = EIPMI_BASE, /* memory allocation failure */ 71 EIPMI_BMC_OPEN_FAILED, /* failed to open /dev/ipmi0 */ 72 EIPMI_BMC_PUTMSG, /* failed to send message to /dev/ipmi0 */ 73 EIPMI_BMC_GETMSG, /* failed to read response from /dev/ipmi0 */ 74 EIPMI_BMC_RESPONSE, /* response from /dev/ipmi0 failed */ 75 EIPMI_INVALID_COMMAND, /* invalid command */ 76 EIPMI_COMMAND_TIMEOUT, /* command timeout */ 77 EIPMI_DATA_LENGTH_EXCEEDED, /* maximum data length exceeded */ 78 EIPMI_SEND_FAILED, /* failed to send BMC request */ 79 EIPMI_UNSPECIFIED, /* unspecified BMC error */ 80 EIPMI_UNKNOWN, /* unknown error */ 81 EIPMI_BAD_RESPONSE, /* received unexpected response */ 82 EIPMI_BAD_RESPONSE_LENGTH, /* unexpected response length */ 83 EIPMI_INVALID_RESERVATION, /* invalid or cancelled reservation */ 84 EIPMI_NOT_PRESENT, /* requested entity not present */ 85 EIPMI_INVALID_REQUEST, /* malformed request data */ 86 EIPMI_BUSY, /* service processor is busy */ 87 EIPMI_NOSPACE, /* service processor is out of space */ 88 EIPMI_UNAVAILABLE, /* service processor is unavailable */ 89 EIPMI_ACCESS, /* insufficient privileges */ 90 EIPMI_BADPARAM, /* parameter is not supported */ 91 EIPMI_READONLY, /* attempt to write read-only param */ 92 EIPMI_WRITEONLY, /* attempt to read write-only param */ 93 EIPMI_LAN_OPEN_FAILED, /* failed to open socket */ 94 EIPMI_LAN_PING_FAILED, /* RMCP Ping message failed */ 95 EIPMI_LAN_PASSWD_NOTSUP, /* password authentication not supported */ 96 EIPMI_LAN_CHALLENGE, /* failure getting challenge */ 97 EIPMI_LAN_SESSION, /* failure activating session */ 98 EIPMI_LAN_SETPRIV /* failure setting session privs */ 99 } ipmi_errno_t; 100 101 /* 102 * Basic library functions. 103 * 104 * The ipmi_handle is the primary interface to the library. The library itself 105 * is not MT-safe, but it is safe within a single handle. Multithreaded clients 106 * should either open multiple handles, or otherwise synchronize access to the 107 * same handle. 108 * 109 * There is a single command response buffer that is stored with the handle, to 110 * simplify memory management in the caller. The memory referenced by a command 111 * response is only valid until the next command is issued. The caller is 112 * responsible for making a copy of the response if it is needed. 113 */ 114 extern ipmi_handle_t *ipmi_open(int *, char **, uint_t xport_type, nvlist_t *); 115 116 /* 117 * Constants for nvpair names for the params nvlist that is passed to 118 * ipmi_open(). If the IPMI_TRANSPORT_BMC is desired, then it is sufficient 119 * to just specify NULL for the params nvlist. 120 * 121 * For IPMI_TRANSPORT_LAN, the params nvlist must contain the following 122 * nvpairs: 123 * 124 * IPMI_LAN_HOST, IPMI_LAN_USER, IPMI_LAN_PASSWD 125 * 126 * IPMI_LAN_PORT is optional and will default to 623 127 * IPMI_LAN_PRIVLVL is optional and will default to admin 128 * IPMI_LAN_TIMEOUT is optional and will default to 3 seconds 129 * IPMI_LAN_NUM_RETIES is optional and will default to 5 130 */ 131 #define IPMI_TRANSPORT_TYPE "transport-type" 132 #define IPMI_TRANSPORT_BMC 0x01 133 #define IPMI_TRANSPORT_LAN 0x02 134 135 #define IPMI_LAN_HOST "lan-host" 136 #define IPMI_LAN_PORT "lan-port" 137 #define IPMI_LAN_USER "lan-user" 138 #define IPMI_LAN_PASSWD "lan-passwd" 139 #define IPMI_LAN_PRIVLVL "lan-privlvl" 140 #define IPMI_LAN_TIMEOUT "lan-timeout" 141 #define IPMI_LAN_NUM_RETRIES "lan-num-retries" 142 143 extern void ipmi_close(ipmi_handle_t *); 144 145 extern int ipmi_errno(ipmi_handle_t *); 146 extern const char *ipmi_errmsg(ipmi_handle_t *); 147 148 /* 149 * Raw requests. See section 5. 150 */ 151 typedef struct ipmi_cmd { 152 uint8_t ic_netfn:6; 153 uint8_t ic_lun:2; 154 uint8_t ic_cmd; 155 uint16_t ic_dlen; 156 void *ic_data; 157 } ipmi_cmd_t; 158 159 extern ipmi_cmd_t *ipmi_send(ipmi_handle_t *, ipmi_cmd_t *); 160 161 /* 162 * Retrieve basic information about the IPMI device. See section 20.1 "Get 163 * Device ID Command". 164 */ 165 #define IPMI_CMD_GET_DEVICEID 0x01 166 167 typedef struct ipmi_deviceid { 168 uint8_t id_devid; 169 DECL_BITFIELD3( 170 id_dev_rev :4, 171 __reserved :3, 172 id_dev_sdrs :1); 173 DECL_BITFIELD2( 174 id_firm_major :7, 175 id_dev_available :1); 176 uint8_t id_firm_minor; 177 uint8_t id_ipmi_rev; 178 uint8_t id_dev_support; 179 uint8_t id_manufacturer[3]; 180 uint8_t id_product[2]; 181 } ipmi_deviceid_t; 182 183 #define IPMI_OEM_SUN 0x2a 184 #define IPMI_PROD_SUN_ILOM 0x4701 185 186 ipmi_deviceid_t *ipmi_get_deviceid(ipmi_handle_t *); 187 188 #define ipmi_devid_manufacturer(dp) \ 189 ((dp)->id_manufacturer[0] | \ 190 ((dp)->id_manufacturer[1] << 8) | \ 191 ((dp)->id_manufacturer[2] << 16)) 192 193 #define ipmi_devid_product(dp) \ 194 ((dp)->id_product[0] | \ 195 ((dp)->id_product[1] << 8)) 196 197 const char *ipmi_firmware_version(ipmi_handle_t *); 198 199 /* 200 * Get Channel Auth Caps. See section 22.13. 201 */ 202 typedef struct ipmi_channel_auth_caps { 203 uint8_t cap_channel; 204 DECL_BITFIELD3( 205 cap_authtype :6, 206 __reserved1 :1, 207 cap_ipmirev2 :1); 208 DECL_BITFIELD5( 209 cap_anon :3, 210 cap_peruser :1, 211 cap_permesg :1, 212 cap_kgstatus :1, 213 __reserved2 :2); 214 uint8_t cap_ext; 215 uint8_t cap_oemid[3]; 216 uint8_t cap_oemaux; 217 } ipmi_channel_auth_caps_t; 218 219 #define IPMI_CMD_GET_CHANNEL_AUTH_CAPS 0x38 220 extern ipmi_channel_auth_caps_t *ipmi_get_channel_auth_caps(ipmi_handle_t *, 221 uint8_t, uint8_t); 222 223 /* 224 * Get Channel Info. See section 22.24. 225 */ 226 typedef struct ipmi_channel_info { 227 DECL_BITFIELD2( 228 ici_number :4, 229 __reserved1 :4); 230 DECL_BITFIELD2( 231 ici_medium :7, 232 __reserved2 :1); 233 DECL_BITFIELD2( 234 ici_protocol :5, 235 __reserved3 :3); 236 DECL_BITFIELD3( 237 ici_session_count :6, 238 ici_single_session :1, 239 ici_multi_Session :1); 240 uint8_t ici_vendor[3]; 241 uint8_t ici_auxinfo[2]; 242 } ipmi_channel_info_t; 243 244 #define IPMI_CMD_GET_CHANNEL_INFO 0x42 245 246 /* 247 * Channel Numbers. See section 6.3. 248 */ 249 #define IPMI_CHANNEL_PRIMARY 0x0 250 #define IPMI_CHANNEL_MIN 0x1 251 #define IPMI_CHANNEL_MAX 0xB 252 #define IPMI_CHANNEL_CURRENT 0xE 253 #define IPMI_CHANNEL_SYSTEM 0xF 254 255 extern ipmi_channel_info_t *ipmi_get_channel_info(ipmi_handle_t *, int); 256 257 /* 258 * Channel Protocol Types. See section 6.4. 259 */ 260 #define IPMI_PROTOCOL_IPMB 0x1 261 #define IPMI_PROTOCOL_ICMB 0x2 262 #define IPMI_PROTOCOL_SMBUS 0x4 263 #define IPMI_PROTOCOL_KCS 0x5 264 #define IPMI_PROTOCOL_SMIC 0x6 265 #define IPMI_PROTOCOL_BT10 0x7 266 #define IPMI_PROTOCOL_BT15 0x8 267 #define IPMI_PROTOCOL_TMODE 0x9 268 #define IPMI_PROTOCOL_OEM1 0xC 269 #define IPMI_PROTOCOL_OEM2 0xD 270 #define IPMI_PROTOCOL_OEM3 0xE 271 #define IPMI_PROTOCOL_OEM4 0xF 272 273 /* 274 * Channel Medium Types. See section 6.5. 275 */ 276 #define IPMI_MEDIUM_IPMB 0x1 277 #define IPMI_MEDIUM_ICMB10 0x2 278 #define IPMI_MEDIUM_ICMB09 0x3 279 #define IPMI_MEDIUM_8023LAN 0x4 280 #define IPMI_MEDIUM_RS232 0x5 281 #define IPMI_MEDIUM_OTHERLAN 0x6 282 #define IPMI_MEDIUM_PCISMBUS 0x7 283 #define IPMI_MEDIUM_SMBUS10 0x8 284 #define IPMI_MEDIUM_SMBUS20 0x9 285 #define IPMI_MEDIUM_USB1 0xA 286 #define IPMI_MEDIUM_USB2 0xB 287 #define IPMI_MEDIUM_SYSTEM 0xC 288 289 /* 290 * LAN Configuration. See section 23. While the underlying mechanism is 291 * implemented via a sequence of get/set parameter commands, we assume that 292 * consumers prefer to get and set information in chunks, and therefore expose 293 * the configuration as a structure, with some of the less useful fields 294 * removed. When making changes, the consumer specifies which fields to apply 295 * along with the structure the library takes care of the rest of the work. 296 * 297 * This can be expanded in the future as needed. 298 */ 299 300 typedef struct ipmi_lan_config { 301 boolean_t ilc_set_in_progress; 302 uint32_t ilc_ipaddr; 303 uint8_t ilc_ipaddr_source; 304 uint8_t ilc_macaddr[6]; 305 uint32_t ilc_subnet; 306 uint32_t ilc_gateway_addr; 307 } ipmi_lan_config_t; 308 309 #define IPMI_LAN_SRC_UNSPECIFIED 0x0 310 #define IPMI_LAN_SRC_STATIC 0x1 311 #define IPMI_LAN_SRC_DHCP 0x2 312 #define IPMI_LAN_SRC_BIOS 0x3 313 #define IPMI_LAN_SRC_OTHER 0x4 314 315 #define IPMI_LAN_SET_IPADDR 0x01 316 #define IPMI_LAN_SET_IPADDR_SOURCE 0x02 317 #define IPMI_LAN_SET_MACADDR 0x04 318 #define IPMI_LAN_SET_SUBNET 0x08 319 #define IPMI_LAN_SET_GATEWAY_ADDR 0x10 320 321 #define IPMI_CMD_SET_LAN_CONFIG 0x01 322 #define IPMI_CMD_GET_LAN_CONFIG 0x02 323 324 extern int ipmi_lan_get_config(ipmi_handle_t *, int, 325 ipmi_lan_config_t *); 326 extern int ipmi_lan_set_config(ipmi_handle_t *, int, ipmi_lan_config_t *, int); 327 328 /* 329 * SEL (System Event Log) commands. Currently the library only provides 330 * commands for reading the SEL. 331 */ 332 333 /* 334 * 31.2 Get SEL Info Command 335 */ 336 #define IPMI_CMD_GET_SEL_INFO 0x40 337 338 typedef struct ipmi_sel_info { 339 uint8_t isel_version; 340 uint16_t isel_entries; 341 uint16_t isel_free; 342 uint32_t isel_add_ts; 343 uint32_t isel_erase_ts; 344 DECL_BITFIELD6( 345 isel_supp_allocation :1, 346 isel_supp_reserve :1, 347 isel_supp_partial :1, 348 isel_supp_delete :1, 349 __reserved :3, 350 isel_overflow :1); 351 } ipmi_sel_info_t; 352 353 extern ipmi_sel_info_t *ipmi_sel_get_info(ipmi_handle_t *); 354 extern boolean_t ipmi_sdr_changed(ipmi_handle_t *); 355 extern int ipmi_sdr_refresh(ipmi_handle_t *); 356 357 /* 358 * 32.1 SEL Event Records 359 */ 360 typedef struct ipmi_sel_event { 361 uint16_t isel_ev_next; 362 uint16_t isel_ev_recid; 363 uint8_t isel_ev_rectype; 364 uint32_t isel_ev_ts; 365 DECL_BITFIELD2( 366 isel_ev_software :1, 367 isel_ev_addr_or_id :7); 368 DECL_BITFIELD3( 369 isel_ev_lun :2, 370 __reserved :2, 371 isel_ev_channel :4); 372 uint8_t isel_ev_rev; 373 uint8_t isel_ev_sensor_type; 374 uint8_t isel_ev_sensor_number; 375 DECL_BITFIELD2( 376 isel_ev_type :7, 377 isel_ev_dir :1); 378 uint8_t isel_ev_data[3]; 379 } ipmi_sel_event_t; 380 381 #define IPMI_EV_REV15 0x04 382 #define IPMI_EV_REV1 0x03 383 384 #define IPMI_SEL_SYSTEM 0x02 385 #define IPMI_SEL_OEMTS_LO 0xC0 386 #define IPMI_SEL_OEMTS_HI 0xDF 387 #define IPMI_SEL_OEM_LO 0xE0 388 #define IPMI_SEL_OEM_HI 0xFF 389 390 #define IPMI_EV_ASSERT 0x0 391 #define IPMI_EV_DEASSERT 0x1 392 393 /* 394 * 32.2 OEM SEL Record (with timestamp) 395 */ 396 typedef struct ipmi_sel_oem_ts { 397 uint16_t isel_oem_next; 398 uint16_t isel_oem_id; 399 uint8_t isel_oem_type; 400 uint32_t isel_oem_ts; 401 uint8_t isel_oem_devid[3]; 402 uint8_t isel_oem_data[6]; 403 } ipmi_sel_oem_ts_t; 404 405 /* 406 * 32.3 OEM SEL Record (no timestamp) 407 */ 408 typedef struct ipmi_sel_oem { 409 uint16_t isel_oem_next; 410 uint16_t isel_oem_id; 411 uint8_t isel_oem_type; 412 uint8_t isel_oem_data[13]; 413 } ipmi_sel_oem_t; 414 415 /* 416 * 29.3 Platform Event Message Command. 417 */ 418 typedef struct ipmi_platform_event_message { 419 uint8_t ipem_generator; 420 uint8_t ipem_rev; 421 uint8_t ipem_sensor_type; 422 uint8_t ipem_sensor_num; 423 DECL_BITFIELD2( 424 ipem_event_type :7, 425 ipem_event_dir :1); 426 uint8_t ipem_event_data[3]; 427 } ipmi_platform_event_message_t; 428 429 #define IPMI_CMD_PLATFORM_EVENT_MESSAGE 0x02 430 431 extern int ipmi_event_platform_message(ipmi_handle_t *, 432 ipmi_platform_event_message_t *); 433 434 /* 435 * 29.7 Event Data Field Formats. Consumers can cast the data field of the 436 * event record to the appropriate type depending on the sensor class. 437 */ 438 439 typedef struct ipmi_event_threshold { 440 DECL_BITFIELD3( 441 iev_offset :4, 442 iev_desc_byte3 :2, 443 iev_desc_byte2 :2); 444 uint8_t iev_reading; 445 uint8_t iev_threshold; 446 } ipmi_event_threshold_t; 447 448 #define IPMI_EV_DESC_UNSPECIFIED 0x00 449 #define IPMI_EV_DESC_TRIGGER 0x01 450 #define IPMI_EV_DESC_OEM 0x02 451 #define IPMI_EV_DESC_SPECIFIC 0x03 452 453 typedef struct ipmi_event_discrete { 454 DECL_BITFIELD3( 455 iev_offset :4, 456 iev_desc_byte3 :2, 457 iev_desc_byte2 :2); 458 DECL_BITFIELD2( 459 iev_offset_type :4, 460 iev_offset_severity :4); 461 uint8_t iev_oem_code; 462 } ipmi_event_discrete_t; 463 464 #define IPMI_EV_DESC_PREVSTATE 0x01 465 #define IPMI_EV_DESC_SPECIFIC 0x03 466 467 typedef struct ipmi_event_oem { 468 DECL_BITFIELD3( 469 iev_offset :4, 470 iev_desc_byte3 :2, 471 iev_desc_byte2 :2); 472 DECL_BITFIELD2( 473 iev_offset_type :4, 474 iev_offset_severity :4); 475 uint8_t iev_oem_code; 476 } ipmi_event_oem_t; 477 478 /* 479 * Get SEL Entry Command. See section 31.5. We don't support partial reads, so 480 * this interface is quite a bit simpler than in the spec. We default to 481 * returning event records, though the consumer should check the type field and 482 * cast it to the appropriate type if it is no IPMI_SEL_SYSTEM. 483 */ 484 #define IPMI_CMD_GET_SEL_ENTRY 0x43 485 486 extern ipmi_sel_event_t *ipmi_sel_get_entry(ipmi_handle_t *, uint16_t); 487 488 #define IPMI_SEL_FIRST_ENTRY 0x0000 489 #define IPMI_SEL_LAST_ENTRY 0xFFFF 490 491 /* 492 * SEL time management. See sections 31.10 and 31.11. 493 */ 494 #define IPMI_CMD_GET_SEL_TIME 0x48 495 #define IPMI_CMD_SET_SEL_TIME 0x49 496 #define IPMI_CMD_GET_SEL_UTC_OFFSET 0x5C 497 #define IPMI_CMD_SET_SEL_UTC_OFFSET 0x5D 498 499 extern int ipmi_sel_get_time(ipmi_handle_t *, uint32_t *); 500 extern int ipmi_sel_set_time(ipmi_handle_t *, uint32_t); 501 extern int ipmi_sel_get_utc_offset(ipmi_handle_t *, int *); 502 extern int ipmi_sel_set_utc_offset(ipmi_handle_t *, int); 503 504 /* 505 * SDR (Sensor Device Record) requests. A cache of the current SDR repository 506 * is kept as part of the IPMI handle and updated when necessary. This does the 507 * work of processing the SDR names and providing an easy way to lookup 508 * individual records and iterate over all records. 509 */ 510 511 /* 512 * Get SDR Repository Info Command. See section 33.9. 513 */ 514 #define IPMI_CMD_GET_SDR_INFO 0x20 515 516 typedef struct ipmi_sdr_info { 517 uint8_t isi_version; 518 uint16_t isi_record_count; 519 uint16_t isi_free_space; 520 uint32_t isi_add_ts; 521 uint32_t isi_erase_ts; 522 DECL_BITFIELD7( 523 isi_supp_allocation :1, 524 isi_supp_reserve :1, 525 isi_supp_partial :1, 526 isi_supp_delete :1, 527 __reserved :1, 528 isi_modal :2, 529 isi_overflow :1); 530 } ipmi_sdr_info_t; 531 532 extern ipmi_sdr_info_t *ipmi_sdr_get_info(ipmi_handle_t *); 533 534 /* 535 * Reserve repository command. See section 33.11. 536 */ 537 #define IPMI_CMD_RESERVE_SDR_REPOSITORY 0x22 538 539 /* 540 * Get SDR command. See section 33.12. This command accesses the raw SDR 541 * repository. Clients can also use the lookup functions to retrieve a 542 * particular SDR record by name. 543 * 544 * The list of possible types is indicated in the sub-chapters of section 43. 545 */ 546 typedef struct ipmi_sdr { 547 uint16_t is_id; 548 uint8_t is_version; 549 uint8_t is_type; 550 uint8_t is_length; 551 uint8_t is_record[1]; 552 } ipmi_sdr_t; 553 #define IPMI_CMD_GET_SDR 0x23 554 555 #define IPMI_SDR_FIRST 0x0000 556 #define IPMI_SDR_LAST 0xFFFF 557 558 extern ipmi_sdr_t *ipmi_sdr_get(ipmi_handle_t *, uint16_t, uint16_t *); 559 560 /* 561 * Full Sensor Record. See 43.1 562 */ 563 #define IPMI_SDR_TYPE_FULL_SENSOR 0x01 564 565 typedef struct ipmi_sdr_full_sensor { 566 /* RECORD KEY BYTES */ 567 uint8_t is_fs_owner; 568 DECL_BITFIELD3( 569 is_fs_sensor_lun :2, 570 __reserved1 :2, 571 is_fs_channel :4); 572 uint8_t is_fs_number; 573 /* RECORD BODY BYTES */ 574 uint8_t is_fs_entity_id; 575 DECL_BITFIELD2( 576 is_fs_entity_instance :7, 577 is_fs_entity_logical :1); 578 DECL_BITFIELD8( 579 is_fs_sensor_scanning_enabled :1, 580 is_fs_event_generation_enabled :1, 581 is_fs_init_sensor_type :1, 582 is_fs_init_hysteresis :1, 583 is_fs_init_thresholds :1, 584 is_fs_init_events :1, 585 is_fs_init_scanning :1, 586 is_fs_settable :1); 587 DECL_BITFIELD5( 588 is_fs_event_support :2, 589 is_fs_threshold_support :2, 590 is_fs_hysteresis_support :2, 591 is_fs_rearm_support :1, 592 is_fs_ignore :1); 593 uint8_t is_fs_type; 594 uint8_t is_fs_reading_type; 595 uint16_t is_fs_assert_mask; 596 uint16_t is_fs_deassert_mask; 597 uint16_t is_fs_reading_mask; 598 DECL_BITFIELD4( 599 is_fs_units_isprcnt :1, 600 is_fs_mod_unit :2, 601 is_fs_rate_unit :3, 602 is_fs_analog_fmt :2); 603 uint8_t is_fs_unit2; 604 uint8_t is_fs_unit3; 605 /* Linearization */ 606 DECL_BITFIELD2( 607 is_fs_sensor_linear_type :7, 608 __reserved2 :1); 609 /* M, Tolerance */ 610 uint16_t is_fs_mtol; 611 /* B, Accuracy, R exp, B exp */ 612 uint32_t is_fs_bacc; 613 DECL_BITFIELD4( 614 is_fs_nominal_reading_spec :1, 615 is_fs_normal_max_spec :1, 616 is_fs_normal_min_spec :1, 617 __reserved3 :5); 618 uint8_t is_fs_nominal_reading; 619 uint8_t is_fs_normal_maximum; 620 uint8_t is_fs_normal_minimum; 621 uint8_t is_fs_max; 622 uint8_t is_fs_min; 623 uint8_t is_fs_upper_nonrecov; 624 uint8_t is_fs_upper_critical; 625 uint8_t is_fs_upper_noncrit; 626 uint8_t is_fs_lower_nonrecov; 627 uint8_t is_fs_lower_critical; 628 uint8_t is_fs_lower_noncrit; 629 uint8_t is_fs_hysteresis_positive; 630 uint8_t is_fs_hysteresis_negative; 631 uint16_t __reserved4; 632 uint8_t is_fs_oem; 633 DECL_BITFIELD3( 634 is_fs_idlen :5, 635 __reserved5 :1, 636 is_fs_idtype :2); 637 char is_fs_idstring[1]; 638 } ipmi_sdr_full_sensor_t; 639 640 #define IPMI_SDR_TYPE_COMPACT_SENSOR 0x02 641 642 /* 643 * Compact Sensor Record. See section 43.2 644 */ 645 typedef struct ipmi_sdr_compact_sensor { 646 /* RECORD KEY BYTES */ 647 uint8_t is_cs_owner; 648 DECL_BITFIELD3( 649 is_cs_sensor_lun :2, 650 is_cs_fru_lun :2, 651 is_cs_channel :4); 652 uint8_t is_cs_number; 653 /* RECORD BODY BYTES */ 654 uint8_t is_cs_entity_id; 655 DECL_BITFIELD2( 656 is_cs_entity_instance :7, 657 is_cs_entity_logical :1); 658 DECL_BITFIELD8( 659 is_cs_sensor_scanning_enabled :1, 660 is_cs_event_generation_enabled :1, 661 is_cs_init_sensor_type :1, 662 is_cs_init_hysteresis :1, 663 __reserved1 :1, 664 is_cs_init_events :1, 665 is_cs_init_scanning :1, 666 is_cs_settable :1); 667 DECL_BITFIELD5( 668 is_cs_event_support :2, 669 is_cs_threshold_support :2, 670 is_cs_hysteresis_support :2, 671 is_cs_rearm_support :1, 672 is_cs_ignore :1); 673 uint8_t is_cs_type; 674 uint8_t is_cs_reading_type; 675 uint16_t is_cs_assert_mask; 676 uint16_t is_cs_deassert_mask; 677 uint16_t is_cs_reading_mask; 678 DECL_BITFIELD4( 679 is_cs_units_isprcnt :1, 680 is_cs_mod_unit :2, 681 is_cs_rate_unit :3, 682 __reserved2 :2); 683 uint8_t is_cs_unit2; 684 uint8_t is_cs_unit3; 685 DECL_BITFIELD3( 686 is_cs_share_count :4, 687 is_cs_modifier_type :2, 688 is_cs_direction :2); 689 DECL_BITFIELD2( 690 is_cs_modifier_offset :7, 691 is_cs_sharing :1); 692 uint8_t is_cs_hysteresis_positive; 693 uint8_t is_cs_hysteresis_negative; 694 uint16_t __reserved3; 695 uint8_t __reserved4; 696 uint8_t is_cs_oem; 697 DECL_BITFIELD3( 698 is_cs_idlen :5, 699 __reserved5 :1, 700 is_cs_idtype :2); 701 char is_cs_idstring[1]; 702 } ipmi_sdr_compact_sensor_t; 703 704 /* 705 * Threshold sensor masks for is_cs_assert_mask and is_cs_deassert_mask. 706 */ 707 #define IPMI_SENSOR_RETURN_NONRECOV 0x4000 708 #define IPMI_SENSOR_RETURN_CRIT 0x2000 709 #define IPMI_SENSOR_RETURN_NONCRIT 0x1000 710 711 #define IPMI_SENSOR_MASK_UPPER_NONRECOV_HI 0x0800 712 #define IPMI_SENSOR_MASK_UPPER_NONRECOV_LO 0x0400 713 #define IPMI_SENSOR_MASK_UPPER_CRIT_HI 0x0200 714 #define IPMI_SENSOR_MASK_UPPER_CRIT_LO 0x0100 715 #define IPMI_SENSOR_MASK_UPPER_NONCRIT_HI 0x0080 716 #define IPMI_SENSOR_MASK_UPPER_NONCRIT_LO 0x0040 717 #define IPMI_SENSOR_MASK_LOWER_NONRECOV_HI 0x0020 718 #define IPMI_SENSOR_MASK_LOWER_NONRECOV_LO 0x0010 719 #define IPMI_SENSOR_MASK_LOWER_CRIT_HI 0x0008 720 #define IPMI_SENSOR_MASK_LOWER_CRIT_LO 0x0004 721 #define IPMI_SENSOR_MASK_LOWER_NONCRIT_HI 0x0002 722 #define IPMI_SENSOR_MASK_LOWER_NONCRIT_LO 0x0001 723 724 /* 725 * Threshold sensor masks for is_cs_reading_mask. 726 */ 727 #define IPMI_SENSOR_SETTABLE_UPPER_NONRECOV 0x2000 728 #define IPMI_SENSOR_SETTABLE_UPPER_CRIT 0x1000 729 #define IPMI_SENSOR_SETTABLE_UPPER_NONCRIT 0x0800 730 #define IPMI_SENSOR_SETTABLE_LOWER_NONRECOV 0x0400 731 #define IPMI_SENSOR_SETTABLE_LOWER_CRIT 0x0200 732 #define IPMI_SENSOR_SETTABLE_LOWER_NONCRIT 0x0100 733 #define IPMI_SENSOR_READABLE_UPPER_NONRECOV 0x0020 734 #define IPMI_SENSOR_READABLE_UPPER_CRIT 0x0010 735 #define IPMI_SENSOR_READABLE_UPPER_NONCRIT 0x0008 736 #define IPMI_SENSOR_READABLE_LOWER_NONRECOV 0x0004 737 #define IPMI_SENSOR_READABLE_LOWER_CRIT 0x0002 738 #define IPMI_SENSOR_READABLE_LOWER_NONCRIT 0x0001 739 740 /* 741 * Values for is_cs_reading_type. See table 42-2. 742 */ 743 #define IPMI_RT_THRESHOLD 0x01 744 #define IPMI_RT_USAGE 0x02 745 #define IPMI_RT_STATE 0x03 746 #define IPMI_RT_PREDFAIL 0x04 747 #define IPMI_RT_LIMIT 0x05 748 #define IPMI_RT_PERFORMANCE 0x06 749 #define IPMI_RT_SEVERITY 0x07 750 #define IPMI_RT_PRESENT 0x08 751 #define IPMI_RT_ENABLED 0x09 752 #define IPMI_RT_AVAILABILITY 0x0A 753 #define IPMI_RT_REDUNDANCY 0x0B 754 #define IPMI_RT_ACPI 0x0C 755 #define IPMI_RT_SPECIFIC 0x6F 756 757 /* 758 * Bitmasks based on above reading types. See table 42-2 759 */ 760 #define IPMI_SR_THRESHOLD_LOWER_NONCRIT_LOW 0x0001 761 #define IPMI_SR_THRESHOLD_LOWER_NONCRIT_HIGH 0x0002 762 #define IPMI_SR_THRESHOLD_LOWER_CRIT_LOW 0x0004 763 #define IPMI_SR_THRESHOLD_LOWER_CRIT_HIGH 0x0008 764 #define IPMI_SR_THRESHOLD_LOWER_NONRECOV_LOW 0x0010 765 #define IPMI_SR_THRESHOLD_LOWER_NONRECOV_HIGH 0x0020 766 #define IPMI_SR_THRESHOLD_UPPER_NONCRIT_LOW 0x0040 767 #define IPMI_SR_THRESHOLD_UPPER_NONCRIT_HIGH 0x0080 768 #define IPMI_SR_THRESHOLD_UPPER_CRIT_LOW 0x0100 769 #define IPMI_SR_THRESHOLD_UPPER_CRIT_HIGH 0x0200 770 #define IPMI_SR_THRESHOLD_UPPER_NONRECOV_LOW 0x0400 771 #define IPMI_SR_THRESHOLD_UPPER_NONRECOV_HIGH 0x0800 772 773 #define IPMI_SR_USAGE_IDLE 0x0001 774 #define IPMI_SR_USAGE_ACTIVE 0x0002 775 #define IPMI_SR_USAGE_BUSY 0x0004 776 777 #define IPMI_SR_STATE_DEASSERT 0x0001 778 #define IPMI_SR_STATE_ASSERT 0x0002 779 780 #define IPMI_SR_PREDFAIL_DEASSERT 0x0001 781 #define IPMI_SR_PREDFAIL_ASSERT 0x0002 782 783 #define IPMI_SR_LIMIT_NOTEXCEEDED 0x0001 784 #define IPMI_SR_LIMIT_EXCEEDED 0x0002 785 786 #define IPMI_SR_PERFORMANCE_MET 0x0001 787 #define IPMI_SR_PERFORMANCE_LAGS 0x0002 788 789 #define IPMI_SR_SEVERITY_TO_OK 0x0001 790 #define IPMI_SR_SEVERITY_OK_TO_NONCRIT 0x0002 791 #define IPMI_SR_SEVERITY_LESS_TO_CRIT 0x0004 792 #define IPMI_SR_SEVERITY_LESS_TO_NONRECOV 0x0008 793 #define IPMI_SR_SEVERITY_MORE_TO_NONCRIT 0x0010 794 #define IPMI_SR_SEVERITY_NONRECOV_TO_CRIT 0x0020 795 #define IPMI_SR_SEVERITY_TO_NONRECOV 0x0040 796 #define IPMI_SR_SEVERITY_MONITOR 0x0080 797 #define IPMI_SR_SEVERITY_INFO 0x0100 798 799 #define IPMI_SR_PRESENT_DEASSERT 0x0001 800 #define IPMI_SR_PRESENT_ASSERT 0x0002 801 802 #define IPMI_SR_ENABLED_DEASSERT 0x0001 803 #define IPMI_SR_ENABLED_ASSERT 0x0002 804 805 #define IPMI_SR_AVAILABILITY_RUNNING 0x0001 806 #define IPMI_SR_AVAILABILITY_INTEST 0x0002 807 #define IPMI_SR_AVAILABILITY_POWEROFF 0x0004 808 #define IPMI_SR_AVAILABILITY_ONLINE 0x0008 809 #define IPMI_SR_AVAILABILITY_OFFLINE 0x0010 810 #define IPMI_SR_AVAILABILITY_OFFDUTY 0x0020 811 #define IPMI_SR_AVAILABILITY_DEGRADED 0x0040 812 #define IPMI_SR_AVAILABILITY_POWERSAVE 0x0080 813 #define IPMI_SR_AVAILABILITY_INSTALLERR 0x0100 814 815 #define IPMI_SR_REDUNDANCY_FULL 0x0001 816 #define IPMI_SR_REDUNDANCY_LOST 0x0002 817 #define IPMI_SR_REDUNDANCY_DEGRADED 0x0004 818 #define IPMI_SR_REDUNDANCY_NONE_MINIMAL 0x0008 819 #define IPMI_SR_REDUNDANCY_NONE_REGAINED 0x0010 820 #define IPMI_SR_REDUNDANCY_NONE_INSUFFFICIENT 0x0020 821 #define IPMI_SR_REDUNDANCY_DEG_FROM_FULL 0x0040 822 #define IPMI_SR_REDUNDANCY_DEG_FROM_NON 0x0080 823 824 #define IPMI_SR_ACPI_DO 0x0001 825 #define IPMI_SR_ACPI_D1 0x0002 826 #define IPMI_SR_ACPI_D2 0x0004 827 #define IPMI_SR_ACPI_D3 0x0008 828 829 /* 830 * Bitmasks for sensor-specific reading type (0x6F). See section 42.2. 831 */ 832 #define IPMI_ST_RESERVED 0x00 833 #define IPMI_ST_TEMP 0x01 834 #define IPMI_ST_VOLTAGE 0x02 835 #define IPMI_ST_CURRENT 0x03 836 #define IPMI_ST_FAN 0x04 837 #define IPMI_ST_PHYSICAL 0x05 838 839 #define IPMI_EV_PHYSICAL_GENERAL 0x0001 840 #define IPMI_EV_PHYSICAL_BAY 0x0002 841 #define IPMI_EV_PHYSICAL_CARD 0x0004 842 #define IPMI_EV_PHYSICAL_PROCESSOR 0x0008 843 #define IPMI_EV_PHYSICAL_LAN 0x0010 844 #define IPMI_EV_PHYSICAL_DOCK 0x0020 845 #define IPMI_EV_PHYSICAL_FAN 0x0040 846 847 #define IPMI_ST_PLATFORM 0x06 848 849 #define IPMI_EV_PLATFORM_SECURE 0x0001 850 #define IPMI_EV_PLATFORM_USER_PASS 0x0002 851 #define IPMI_EV_PLATFORM_SETUP_PASS 0x0004 852 #define IPMI_EV_PLATFORM_NETWORK_PASS 0x0008 853 #define IPMI_EV_PLATFORM_OTHER_PASS 0x0010 854 #define IPMI_EV_PLATFORM_OUT_OF_BAND 0x0020 855 856 #define IPMI_ST_PROCESSOR 0x07 857 858 #define IPMI_EV_PROCESSOR_IERR 0x0001 859 #define IPMI_EV_PROCESSOR_THERMAL 0x0002 860 #define IPMI_EV_PROCESSOR_FRB1 0x0004 861 #define IPMI_EV_PROCESSOR_FRB2 0x0008 862 #define IPMI_EV_PROCESSOR_FRB3 0x0010 863 #define IPMI_EV_PROCESSOR_CONFIG 0x0020 864 #define IPMI_EV_PROCESSOR_SMBIOS 0x0040 865 #define IPMI_EV_PROCESSOR_PRESENT 0x0080 866 #define IPMI_EV_PROCESSOR_DISABLED 0x0100 867 #define IPMI_EV_PROCESSOR_TERMINATOR 0x0200 868 #define IPMI_EV_PROCESSOR_THROTTLED 0x0400 869 870 #define IPMI_ST_POWER_SUPPLY 0x08 871 872 #define IPMI_EV_POWER_SUPPLY_PRESENT 0x0001 873 #define IPMI_EV_POWER_SUPPLY_FAILURE 0x0002 874 #define IPMI_EV_POWER_SUPPLY_PREDFAIL 0x0004 875 #define IPMI_EV_POWER_SUPPLY_INPUT_LOST 0x0008 876 #define IPMI_EV_POWER_SUPPLY_INPUT_RANGE 0x0010 877 #define IPMI_EV_POWER_SUPPLY_INPUT_RANGE_PRES 0x0020 878 #define IPMI_EV_POWER_SUPPLY_CONFIG_ERR 0x0040 879 880 #define IPMI_ST_POWER_UNIT 0x09 881 882 #define IPMI_EV_POWER_UNIT_OFF 0x0001 883 #define IPMI_EV_POWER_UNIT_CYCLE 0x0002 884 #define IPMI_EV_POWER_UNIT_240_DOWN 0x0004 885 #define IPMI_EV_POWER_UNIT_INTERLOCK_DOWN 0x0008 886 #define IPMI_EV_POWER_UNIT_AC_LOST 0x0010 887 #define IPMI_EV_POWER_UNIT_SOFT_FAILURE 0x0020 888 #define IPMI_EV_POWER_UNIT_FAIL 0x0040 889 #define IPMI_EV_POWER_UNIT_PREDFAIL 0x0080 890 891 #define IPMI_ST_COOLING 0x0A 892 #define IPMI_ST_OTHER 0x0B 893 #define IPMI_ST_MEMORY 0x0C 894 895 #define IPMI_EV_MEMORY_CE 0x0001 896 #define IPMI_EV_MEMORY_UE 0x0002 897 #define IPMI_EV_MEMORY_PARITY 0x0004 898 #define IPMI_EV_MEMORY_SCRUB_FAIL 0x0008 899 #define IPMI_EV_MEMORY_DISABLED 0x0010 900 #define IPMI_EV_MEMORY_CE_LOG_LIMIT 0x0020 901 #define IPMI_EV_MEMORY_PRESENT 0x0040 902 #define IPMI_EV_MEMORY_CONFIG_ERR 0x0080 903 #define IPMI_EV_MEMORY_SPARE 0x0100 904 #define IPMI_EV_MEMORY_THROTTLED 0x0200 905 #define IPMI_EV_MEMORY_OVERTEMP 0x0400 906 907 #define IPMI_ST_BAY 0x0D 908 909 #define IPMI_EV_BAY_PRESENT 0x0001 910 #define IPMI_EV_BAY_FAULT 0x0002 911 #define IPMI_EV_BAY_PREDFAIL 0x0004 912 #define IPMI_EV_BAY_SPARE 0x0008 913 #define IPMI_EV_BAY_CHECK 0x0010 914 #define IPMI_EV_BAY_CRITICAL 0x0020 915 #define IPMI_EV_BAY_FAILED 0x0040 916 #define IPMI_EV_BAY_REBUILDING 0x0080 917 #define IPMI_EV_BAY_ABORTED 0x0100 918 919 #define IPMI_ST_POST_RESIZE 0x0E 920 #define IPMI_ST_FIRMWARE 0x0F 921 922 #define IPMI_EV_FIRMWARE_ERROR 0x0001 923 #define IPMI_EV_FIRMWARE_HANG 0x0002 924 #define IPMI_EV_FIRMWARE_PROGRESS 0x0004 925 926 #define IPMI_ST_EVENT_LOG 0x10 927 928 #define IPMI_EV_EVENT_LOG_CE 0x0001 929 #define IPMI_EV_EVENT_LOG_TYPE 0x0002 930 #define IPMI_EV_EVENT_LOG_RESET 0x0004 931 #define IPMI_EV_EVENT_LOG_ALL 0x0008 932 #define IPMI_EV_EVENT_LOG_FULL 0x0010 933 #define IPMI_EV_EVENT_LOG_ALMOST_FULL 0x0020 934 935 #define IPMI_ST_WATCHDOG1 0x11 936 937 #define IPMI_EV_WATCHDOG_BIOS_RESET 0x0001 938 #define IPMI_EV_WATCHDOG_OS_RESET 0x0002 939 #define IPMI_EV_WATCHDOG_OS_SHUTDOWN 0x0004 940 #define IPMI_EV_WATCHDOG_OS_PWR_DOWN 0x0008 941 #define IPMI_EV_WATCHDOG_OS_PWR_CYCLE 0x0010 942 #define IPMI_EV_WATCHDOG_OS_NMI_DIAG 0x0020 943 #define IPMI_EV_WATCHDOG_EXPIRED 0x0040 944 #define IPMI_EV_WATCHDOG_PRE_TIMEOUT_INT 0x0080 945 946 #define IPMI_ST_SYSTEM 0x12 947 948 #define IPMI_EV_STSTEM_RECONF 0x0001 949 #define IPMI_EV_STSTEM_BOOT 0x0002 950 #define IPMI_EV_STSTEM_UNKNOWN_HW_FAILURE 0x0004 951 #define IPMI_EV_STSTEM_AUX_LOG_UPDATED 0x0008 952 #define IPMI_EV_STSTEM_PEF_ACTION 0x0010 953 #define IPMI_EV_SYSTEM_TIMETAMP_CLOCKSYNC 0x0020 954 955 #define IPMI_ST_CRITICAL 0x13 956 957 #define IPMI_EV_CRITICAL_EXT_NMI 0x0001 958 #define IPMI_EV_CRITICAL_BUS_TIMOEOUT 0x0002 959 #define IPMI_EV_CRITICAL_IO_NMI 0x0004 960 #define IPMI_EV_CRITICAL_SW_NMI 0x0008 961 #define IPMI_EV_CRITICAL_PCI_PERR 0x0010 962 #define IPMI_EV_CRITICAL_PCI_SERR 0x0020 963 #define IPMI_EV_CRITICAL_EISA_FAILSAFE 0x0040 964 #define IPMI_EV_CRITICAL_BUS_CE 0x0080 965 #define IPMI_EV_CRITICAL_BUS_UE 0x0100 966 #define IPMI_EV_CRITICAL_FATAL_NMI 0x0200 967 #define IPMI_EV_CRITICAL_BUS_FATAL_ERR 0x0400 968 #define IPMI_EV_CRITICAL_BUS_DEGRADED 0x0800 969 970 #define IPMI_ST_BUTTON 0x14 971 972 #define IPMI_EV_BUTTON_PWR 0x0001 973 #define IPMI_EV_BUTTON_SLEEP 0x0002 974 #define IPMI_EV_BUTTON_RESET 0x0004 975 #define IPMI_EV_BUTTON_FRU_LATCH 0x0008 976 #define IPMI_EV_BUTTON_FRU_SERVICE 0x0010 977 978 #define IPMI_ST_MODULE 0x15 979 #define IPMI_ST_MICROCONTROLLER 0x16 980 #define IPMI_ST_CARD 0x17 981 #define IPMI_ST_CHASSIS 0x18 982 983 #define IPMI_ST_CHIPSET 0x19 984 985 #define IPMI_EV_CHIPSET_PWR_CTL_FAIL 0x0001 986 987 #define IPMI_ST_FRU 0x1A 988 #define IPMI_ST_CABLE 0x1B 989 990 #define IPMI_EV_CABLE_CONNECTED 0x0001 991 #define IPMI_EV_CABLE_CONFIG_ERR 0x0002 992 993 #define IPMI_ST_TERMINATOR 0x1C 994 995 #define IPMI_ST_BOOT 0x1D 996 997 #define IPMI_EV_BOOT_BIOS_PWR_UP 0x0001 998 #define IPMI_EV_BOOT_BIOS_HARD_RESET 0x0002 999 #define IPMI_EV_BOOT_BIOS_WARM_RESET 0x0004 1000 #define IPMI_EV_BOOT_PXE_BOOT 0x0008 1001 #define IPMI_EV_BOOT_DIAG_BOOT 0x0010 1002 #define IPMI_EV_BOOT_OS_HARD_RESET 0x0020 1003 #define IPMI_EV_BOOT_OS_WARM_RESET 0x0040 1004 #define IPMI_EV_BOOT_SYS_RESTART 0x0080 1005 1006 #define IPMI_ST_BOOT_ERROR 0x1E 1007 1008 #define IPMI_EV_BOOT_ERROR_NOMEDIA 0x0001 1009 #define IPMI_EV_BOOT_ERROR_NON_BOOTABLE_DISK 0x0002 1010 #define IPMI_EV_BOOT_ERROR_NO_PXE_SERVER 0x0004 1011 #define IPMI_EV_BOOT_ERROR_INV_BOOT_SECT 0x0008 1012 #define IPMI_EV_BOOT_ERROR_USR_SELECT_TIMEOUT 0x0010 1013 1014 #define IPMI_ST_BOOT_OS 0x1F 1015 1016 #define IPMI_EV_BOOT_OS_A_DRV_BOOT_COMPLETE 0x0001 1017 #define IPMI_EV_BOOT_OS_C_DRV_BOOT_COMPLETE 0x0002 1018 #define IPMI_EV_BOOT_OS_PXE_BOOT_COMPLETE 0x0004 1019 #define IPMI_EV_BOOT_OS_DIAG_BOOT_COMPLETE 0x0008 1020 #define IPMI_EV_BOOT_OS_CDROM_BOOT_COMPLETE 0x0010 1021 #define IPMI_EV_BOOT_OS_ROM_BOOT_COMPLETE 0x0020 1022 #define IPMI_EV_BOOT_OS_UNSPEC_BOOT_COMPLETE 0x0040 1023 1024 #define IPMI_ST_OS_SHUTDOWN 0x20 1025 1026 #define IPMI_EV_OS_SHUTDOWN_LOADING 0x0001 1027 #define IPMI_EV_OS_SHUTDOWN_CRASH 0x0002 1028 #define IPMI_EV_OS_STOP_GRACEFUL 0x0004 1029 #define IPMI_EV_OS_SHUTDOWN_GRACEFUL 0x0008 1030 #define IPMI_EV_OS_SHUTDOWN_PEF 0x0010 1031 #define IPMI_EV_OS_SHUTDOWN_BMC 0x0020 1032 1033 #define IPMI_ST_SLOT 0x21 1034 1035 #define IPMI_EV_SLOT_FAULT_ASSERTED 0x0001 1036 #define IPMI_EV_SLOT_IDENTIFY_ASSERTED 0x0002 1037 #define IPMI_EV_SLOT_CONNECTED 0x0004 1038 #define IPMI_EV_SLOT_INSTALL_READY 0x0008 1039 #define IPMI_EV_SLOT_REMOVE_READY 0x0010 1040 #define IPMI_EV_SLOT_PWR_OFF 0x0020 1041 #define IPMI_EV_SLOT_REMOVED 0x0040 1042 #define IPMI_EV_SLOT_INTERLOCK_ASSERTED 0x0080 1043 #define IPMI_EV_SLOT_DISABLED 0x0100 1044 #define IPMI_EV_SLOT_SPARE_DEVICE 0x0200 1045 1046 #define IPMI_ST_ACPI 0x22 1047 1048 #define IPMI_EV_ACPI_PSTATE_S0_G0 0x0001 1049 #define IPMI_EV_ACPI_PSTATE_S1 0x0002 1050 #define IPMI_EV_ACPI_PSTATE_S2 0x0004 1051 #define IPMI_EV_ACPI_PSTATE_S3 0x0008 1052 #define IPMI_EV_ACPI_PSTATE_S4 0x0010 1053 #define IPMI_EV_ACPI_PSTATE_S5_G2_SOFT_OFF 0x0020 1054 #define IPMI_EV_ACPI_PSTATE_S4_S5_SOFT_OFF 0x0040 1055 #define IPMI_EV_ACPI_PSATTE_G3_MECH_OFF 0x0080 1056 #define IPMI_EV_ACPI_PSTATE_S1_S2_S3_SLEEP 0x0100 1057 #define IPMI_EV_ACPI_PSTATE_G1_SLEEP 0x0200 1058 #define IPMI_EV_ACPI_PSTATE_S5_OVERRIDE 0x0400 1059 #define IPMI_EV_ACPI_PSTATE_LEGACY_ON 0x0800 1060 #define IPMI_EV_ACPI_PSTATE_LEGACY_OFF 0x1000 1061 #define IPMI_EV_ACPI_PSTATE_UNKNOWN 0x2000 1062 1063 #define IPMI_ST_WATCHDOG2 0x23 1064 1065 #define IPMI_EV_WATCHDOG2_EXPIRED 0x0001 1066 #define IPMI_EV_WATCHDOG2_HARD_RESET 0x0002 1067 #define IPMI_EV_WATCHDOG2_PWR_DOWN 0x0004 1068 #define IPMI_EV_WATCHDOG2_PWR_CYCLE 0x0008 1069 #define IPMI_EV_WATCHDOG2_RESERVED1 0x0010 1070 #define IPMI_EV_WATCHDOG2_RESERVED2 0x0020 1071 #define IPMI_EV_WATCHDOG2_RESERVED3 0x0040 1072 #define IPMI_EV_WATCHDOG2_RESERVED4 0x0080 1073 #define IPMI_EV_WATCHDOG2_TIMEOUT_INT 0x0100 1074 1075 #define IPMI_ST_ALERT 0x24 1076 1077 #define IPMI_EV_ALERT_PLAT_PAGE 0x0001 1078 #define IPMI_EV_ALERT_PLAT_LAN_ALERT 0x0002 1079 #define IPMI_EV_ALERT_PLAT_EVT_TRAP 0x0004 1080 #define IPMI_EV_ALERT_PLAT_SNMP_TRAP 0x0008 1081 1082 #define IPMI_ST_PRESENCE 0x25 1083 1084 #define IPMI_EV_PRESENCE_PRESENT 0x0001 1085 #define IPMI_EV_PRESENCE_ABSENT 0x0002 1086 #define IPMI_EV_PRESENCE_DISABLED 0x0004 1087 1088 #define IPMI_ST_ASIC 0x26 1089 1090 #define IPMI_ST_LAN 0x27 1091 1092 #define IPMI_EV_LAN_HEARTBEAT_LOST 0x0001 1093 #define IPMI_EV_LAN_HEARTBEAT 0x0002 1094 1095 #define IPMI_ST_HEALTH 0x28 1096 1097 #define IPMI_EV_HEALTH_SENSOR_ACC_DEGRADED 0x0001 1098 #define IPMI_EV_HEALTH_CNTLR_ACC_DEGRADED 0x0002 1099 #define IPMI_EV_HEALTH_CNTLR_OFFLINE 0x0004 1100 #define IPMI_EV_HEALTH_CNTLR_UNAVAIL 0x0008 1101 #define IPMI_EV_HEALTH_SENSOR_FAILURE 0x0010 1102 #define IPMI_EV_HEALTH_FRU_FAILURE 0x0020 1103 1104 #define IPMI_ST_BATTERY 0x29 1105 1106 #define IPMI_EV_BATTERY_LOW 0x0001 1107 #define IPMI_EV_BATTERY_FAILED 0x0002 1108 #define IPMI_EV_BATTERY_PRESENCE 0x0004 1109 1110 #define IPMI_ST_AUDIT 0x2A 1111 1112 #define IPMI_EV_AUDIT_SESSION_ACTIVATED 0x0001 1113 #define IPMI_EV_AUDIT_SESSION_DEACTIVATED 0x0002 1114 1115 #define IPMI_ST_VERSION 0x2B 1116 1117 #define IPMI_EV_VERSION_HW_CHANGE 0x0001 1118 #define IPMI_EV_VERSION_SW_CHANGE 0x0002 1119 #define IPMI_EV_VERSION_HW_INCOMPATIBLE 0x0004 1120 #define IPMI_EV_VERSION_SW_INCOMPATIBLE 0x0008 1121 #define IPMI_EV_VERSION_HW_INVAL 0x0010 1122 #define IPMI_EV_VERSION_SW_INVAL 0x0020 1123 #define IPMI_EV_VERSION_HW_CHANGE_SUCCESS 0x0040 1124 #define IPMI_EV_VERSION_SW_CHANGE_SUCCESS 0x0080 1125 1126 #define IPMI_ST_FRU_STATE 0x2C 1127 1128 #define IPMI_EV_FRU_STATE_NOT_INSTALLED 0x0001 1129 #define IPMI_EV_FRU_STATE_INACTIVE 0x0002 1130 #define IPMI_EV_FRU_STATE_ACT_REQ 0x0004 1131 #define IPMI_EV_FRU_STATE_ACT_INPROGRESS 0x0008 1132 #define IPMI_EV_FRU_STATE_ACTIVE 0x0010 1133 #define IPMI_EV_FRU_STATE_DEACT_REQ 0x0020 1134 #define IPMI_EV_FRU_STATE_DEACT_INPROGRESS 0x0040 1135 #define IPMI_EV_FRU_STATE_COMM_LOST 0x0080 1136 1137 /* 1138 * Constants for unit type codes. See Table 43-15. 1139 */ 1140 #define IPMI_UNITS_UNSPECIFIED 0x00 1141 #define IPMI_UNITS_DEGREES_C 0x01 1142 #define IPMI_UNITS_DEGREES_F 0x02 1143 #define IPMI_UNITS_DEGREES_K 0x03 1144 #define IPMI_UNITS_VOLTS 0x04 1145 #define IPMI_UNITS_AMPS 0x05 1146 #define IPMI_UNITS_WATTS 0x06 1147 #define IPMI_UNITS_JOULES 0x07 1148 #define IPMI_UNITS_COULOMBS 0x08 1149 #define IPMI_UNITS_VA 0x09 1150 #define IPMI_UNITS_NITS 0x0A 1151 #define IPMI_UNITS_LUMEN 0x0B 1152 #define IPMI_UNITS_LUX 0x0C 1153 #define IPMI_UNITS_CANDELA 0x0D 1154 #define IPMI_UNITS_KPA 0x0E 1155 #define IPMI_UNITS_PSI 0x0F 1156 1157 #define IPMI_UNITS_NEWTON 0x10 1158 #define IPMI_UNITS_CFM 0x11 1159 #define IPMI_UNITS_RPM 0x12 1160 #define IPMI_UNITS_HZ 0x13 1161 #define IPMI_UNITS_MICROSEC 0x14 1162 #define IPMI_UNITS_MILLISEC 0x15 1163 #define IPMI_UNITS_SECS 0x16 1164 #define IPMI_UNITS_MIN 0x17 1165 #define IPMI_UNITS_HOUR 0x18 1166 #define IPMI_UNITS_DAY 0x19 1167 #define IPMI_UNITS_WEEK 0x1A 1168 #define IPMI_UNITS_MIL 0x1B 1169 #define IPMI_UNITS_INCHES 0x1C 1170 #define IPMI_UNITS_FEET 0x1D 1171 #define IPMI_UNITS_CUB_INCH 0x1E 1172 #define IPMI_UNITS_CUB_FEET 0x1F 1173 1174 #define IPMI_UNITS_MM 0x20 1175 #define IPMI_UNITS_CM 0x21 1176 #define IPMI_UNITS_METERS 0x22 1177 #define IPMI_UNITS_CUB_CM 0x23 1178 #define IPMI_UNITS_CUB_METER 0x24 1179 #define IPMI_UNITS_LITERS 0x25 1180 #define IPMI_UNITS_FLUID_OUNCE 0x26 1181 #define IPMI_UNITS_RADIANS 0x27 1182 #define IPMI_UNITS_STERADIANS 0x28 1183 #define IPMI_UNITS_REVOLUTIONS 0x29 1184 #define IPMI_UNITS_CYCLES 0x2A 1185 #define IPMI_UNITS_GRAVITIES 0x2B 1186 #define IPMI_UNITS_OUNCE 0x2C 1187 #define IPMI_UNITS_POUND 0x2D 1188 #define IPMI_UNITS_FOOT_POUND 0x2E 1189 #define IPMI_UNITS_OZ_INCH 0x2F 1190 1191 #define IPMI_UNITS_GAUSS 0x30 1192 #define IPMI_UNITS_GILBERTS 0x31 1193 #define IPMI_UNITS_HENRY 0x32 1194 #define IPMI_UNITS_MILHENRY 0x33 1195 #define IPMI_UNITS_FARAD 0x34 1196 #define IPMI_UNITS_MICROFARAD 0x35 1197 #define IPMI_UNITS_OHMS 0x36 1198 #define IPMI_UNITS_SIEMENS 0x37 1199 #define IPMI_UNITS_MOLE 0x38 1200 #define IPMI_UNITS_BECQUEREL 0x39 1201 #define IPMI_UNITS_PPM 0x3A 1202 /* 0x3B is reserved */ 1203 #define IPMI_UNITS_DECIBELS 0x3C 1204 #define IPMI_UNITS_DBA 0x3D 1205 #define IPMI_UNITS_DBC 0x3E 1206 #define IPMI_UNITS_GRAY 0x3F 1207 1208 #define IPMI_UNITS_SIEVERT 0x40 1209 #define IPMI_UNITS_COLOR_TEMP_K 0x41 1210 #define IPMI_UNITS_BIT 0x42 1211 #define IPMI_UNITS_KILOBIT 0x43 1212 #define IPMI_UNITS_MEGABIT 0x44 1213 #define IPMI_UNITS_GIGABIT 0x45 1214 #define IPMI_UNITS_BYTE 0x46 1215 #define IPMI_UNITS_KILOBYTE 0x47 1216 #define IPMI_UNITS_MEGABYTE 0x48 1217 #define IPMI_UNITS_GIGABYTE 0x49 1218 #define IPMI_UNITS_WORD 0x4A 1219 #define IPMI_UNITS_DWORD 0x4B 1220 #define IPMI_UNITS_QWORD 0x4C 1221 #define IPMI_UNITS_MEMLINE 0x4D 1222 #define IPMI_UNITS_HIT 0x4E 1223 #define IPMI_UNITS_MISS 0x4F 1224 1225 #define IPMI_UNITS_RETRY 0x50 1226 #define IPMI_UNITS_RESET 0x51 1227 #define IPMI_UNITS_OVERFLOW 0x52 1228 #define IPMI_UNITS_UNDERRUN 0x53 1229 #define IPMI_UNITS_COLLISION 0x54 1230 #define IPMI_UNITS_PACKETS 0x55 1231 #define IPMI_UNITS_MESSAGES 0x56 1232 #define IPMI_UNITS_CHARACTERS 0x57 1233 #define IPMI_UNITS_ERROR 0x58 1234 #define IPMI_UNITS_CE 0x59 1235 #define IPMI_UNITS_UE 0x5A 1236 #define IPMI_UNITS_FATAL_ERROR 0x5B 1237 #define IPMI_UNITS_GRAMS 0x5C 1238 1239 /* 1240 * Event-Only Record. See section 43.3. 1241 */ 1242 1243 #define IPMI_SDR_TYPE_EVENT_ONLY 0x03 1244 1245 typedef struct ipmi_sdr_event_only { 1246 /* RECORD KEY BYTES */ 1247 uint8_t is_eo_owner; 1248 DECL_BITFIELD3( 1249 is_eo_sensor_lun :2, 1250 is_eo_fru_lun :2, 1251 is_eo_channel :4); 1252 uint8_t is_eo_number; 1253 /* RECORD BODY BYTES */ 1254 uint8_t is_eo_entity_id; 1255 DECL_BITFIELD2( 1256 is_eo_entity_instance :7, 1257 is_eo_entity_logical :1); 1258 uint8_t is_eo_sensor_type; 1259 uint8_t is_eo_reading_type; 1260 DECL_BITFIELD3( 1261 is_eo_share_count :4, 1262 is_eo_modifier_type :2, 1263 is_eo_direction :2); 1264 DECL_BITFIELD2( 1265 is_eo_modifier_offset :7, 1266 is_eo_sharing :1); 1267 uint8_t __reserved; 1268 uint8_t is_eo_oem; 1269 DECL_BITFIELD3( 1270 is_eo_idlen :5, 1271 __reserved1 :1, 1272 is_eo_idtype :2); 1273 char is_eo_idstring[1]; 1274 } ipmi_sdr_event_only_t; 1275 1276 /* 1277 * Entity Association Record. See section 43.4. 1278 */ 1279 1280 #define IPMI_SDR_TYPE_ENTITY_ASSOCIATION 0x08 1281 1282 typedef struct ipmi_sdr_entity_association { 1283 /* RECORD KEY BYTES */ 1284 uint8_t is_ea_entity_id; 1285 uint8_t is_ea_entity_instance; 1286 DECL_BITFIELD4( 1287 __reserved :5, 1288 is_ea_presence :1, 1289 is_ea_record_link :1, 1290 is_ea_range :1); 1291 /* RECORD BODY BYTES */ 1292 struct { 1293 uint8_t is_ea_sub_id; 1294 uint8_t is_ea_sub_instance; 1295 } is_ea_sub[4]; 1296 } ipmi_sdr_entity_association_t; 1297 1298 /* 1299 * Device-relative Entity Association Record. See section 43.5. 1300 */ 1301 1302 #define IPMI_SDR_TYPE_DEVICE_RELATIVE 0x09 1303 1304 typedef struct ipmi_sdr_device_relative { 1305 /* RECORD KEY BYTES */ 1306 uint8_t is_dr_entity_id; 1307 uint8_t is_dr_entity_instance; 1308 DECL_BITFIELD2( 1309 __reserved1 :1, 1310 is_dr_slaveaddr :7); 1311 DECL_BITFIELD2( 1312 __reserved2 :4, 1313 is_dr_channel :4); 1314 DECL_BITFIELD4( 1315 __reserved :5, 1316 is_dr_presence :1, 1317 is_dr_record_link :1, 1318 is_dr_range :1); 1319 /* RECORD BODY BYTES */ 1320 struct { 1321 DECL_BITFIELD2( 1322 __reserved3 :1, 1323 is_dr_sub_slaveaddr :7); 1324 DECL_BITFIELD2( 1325 __reserved4 :4, 1326 is_dr_sub_channel :4); 1327 uint8_t is_ea_sub_id; 1328 uint8_t is_ea_sub_instance; 1329 } is_ea_sub[4]; 1330 } ipmi_sdr_device_relative_t; 1331 1332 /* 1333 * Generic Device Locator Record. See section 43.7. 1334 */ 1335 1336 #define IPMI_SDR_TYPE_GENERIC_LOCATOR 0x10 1337 1338 typedef struct ipmi_sdr_generic_locator { 1339 /* RECORD KEY BYTES */ 1340 DECL_BITFIELD2( 1341 __reserved1 :1, 1342 is_gl_accessaddr :7); 1343 DECL_BITFIELD2( 1344 is_gl_channel_msb :1, 1345 is_gl_slaveaddr :7); 1346 DECL_BITFIELD3( 1347 is_gl_bus :3, 1348 is_gl_lun :2, 1349 is_gl_channel :3); 1350 /* RECORD BODY BYTES */ 1351 DECL_BITFIELD2( 1352 is_gl_span :3, 1353 __reserved2 :5); 1354 uint8_t __reserved3; 1355 uint8_t is_gl_type; 1356 uint8_t is_gl_modifier; 1357 uint8_t is_gl_entity; 1358 uint8_t is_gl_instance; 1359 uint8_t is_gl_oem; 1360 DECL_BITFIELD3( 1361 is_gl_idlen :5, 1362 __reserved4 :1, 1363 is_gl_idtype :2); 1364 char is_gl_idstring[1]; 1365 } ipmi_sdr_generic_locator_t; 1366 1367 /* 1368 * FRU Device Locator Record. See section 43.8. 1369 */ 1370 1371 #define IPMI_SDR_TYPE_FRU_LOCATOR 0x11 1372 1373 typedef struct ipmi_sdr_fru_locator { 1374 /* RECORD KEY BYTES */ 1375 DECL_BITFIELD2( 1376 __reserved1 :1, 1377 is_fl_accessaddr :7); 1378 union { 1379 struct { 1380 uint8_t _is_fl_devid; 1381 } _logical; 1382 struct { 1383 DECL_BITFIELD2( 1384 __reserved :1, 1385 _is_fl_slaveaddr :7); 1386 } _nonintelligent; 1387 } _devid_or_slaveaddr; 1388 DECL_BITFIELD4( 1389 is_fl_bus :3, 1390 is_fl_lun :2, 1391 __reserved2 :2, 1392 is_fl_logical :1); 1393 DECL_BITFIELD2( 1394 __reserved3 :4, 1395 is_fl_channel :4); 1396 /* RECORD BODY BYTES */ 1397 uint8_t __reserved4; 1398 uint8_t is_fl_type; 1399 uint8_t is_fl_modifier; 1400 uint8_t is_fl_entity; 1401 uint8_t is_fl_instance; 1402 uint8_t is_fl_oem; 1403 DECL_BITFIELD3( 1404 is_fl_idlen :5, 1405 __reserved5 :1, 1406 is_fl_idtype :2); 1407 char is_fl_idstring[1]; 1408 } ipmi_sdr_fru_locator_t; 1409 1410 #define is_fl_devid _devid_or_slaveaddr._logical._is_fl_devid 1411 #define is_fl_slaveaddr _devid_or_slaveaddr._nonintelligent._is_fl_slaveaddr 1412 1413 /* 1414 * Management Controller Device Locator Record. See section 43.9 1415 */ 1416 1417 #define IPMI_SDR_TYPE_MANAGEMENT_LOCATOR 0x12 1418 1419 typedef struct ipmi_sdr_management_locator { 1420 /* RECORD KEY BYTES */ 1421 DECL_BITFIELD2( 1422 __reserved1 :1, 1423 is_ml_devaddr :7); 1424 DECL_BITFIELD2( 1425 is_ml_channel :4, 1426 __reserved2 :4); 1427 /* RECORD BODY BYTES */ 1428 DECL_BITFIELD7( 1429 is_ml_init_message :2, 1430 is_ml_init_log :1, 1431 is_ml_init_controller_log :1, 1432 __reserved3 :1, 1433 is_ml_static :1, 1434 is_ml_acpi_device :1, 1435 is_ml_acpi_system :1); 1436 DECL_BITFIELD8( 1437 is_ml_supp_sensor :1, 1438 is_ml_supp_sdr :1, 1439 is_ml_supp_sel :1, 1440 is_ml_supp_fru :1, 1441 is_ml_supp_event_receiver :1, 1442 is_ml_supp_event_generator :1, 1443 is_ml_supp_bridge :1, 1444 is_ml_supp_chassis :1); 1445 uint8_t __reserved4; 1446 uint16_t __reserved5; 1447 uint8_t is_ml_entity_id; 1448 uint8_t is_ml_entity_instance; 1449 uint8_t is_ml_oem; 1450 DECL_BITFIELD3( 1451 is_ml_idlen :5, 1452 __reserved6 :1, 1453 is_ml_idtype :2); 1454 char is_ml_idstring[1]; 1455 } ipmi_sdr_management_locator_t; 1456 1457 #define IPMI_MESSAGE_INIT_ENABLE 0x0 1458 #define IPMI_MESSAGE_INIT_DISABLE 0x1 1459 #define IPMI_MESSAGE_INIT_NONE 0x2 1460 1461 /* 1462 * Management Controller Confirmation Record. See section 43.10 1463 */ 1464 1465 #define IPMI_SDR_TYPE_MANAGEMENT_CONFIRMATION 0x13 1466 1467 typedef struct ipmi_sdr_management_confirmation { 1468 /* RECORD KEY BYTES */ 1469 DECL_BITFIELD2( 1470 __reserved1 :1, 1471 is_mc_slaveaddr :7); 1472 uint8_t is_mc_deviceid; 1473 DECL_BITFIELD2( 1474 is_mc_dev_revision :4, 1475 is_mc_channel :4); 1476 /* RECORD BODY BYTES */ 1477 DECL_BITFIELD2( 1478 is_mc_major_rev :7, 1479 __reserved2 :1); 1480 uint8_t is_mc_minor_rev; 1481 uint8_t is_mc_impi_ver; 1482 uint8_t is_mc_manufacturer[3]; 1483 uint16_t is_mc_product; 1484 uint8_t is_mc_guid[16]; 1485 } ipmi_sdr_management_confirmation_t; 1486 1487 /* 1488 * BMC Message Channel Info Record. See esction 43.11. 1489 */ 1490 1491 #define IPMI_SDR_TYPE_BMC_MESSAGE_CHANNEL 0x14 1492 1493 typedef struct ipmi_sdr_bmc_channel { 1494 /* RECORD BODY BYTES */ 1495 struct { 1496 DECL_BITFIELD3( 1497 is_bc_protocol :4, 1498 is_bc_receive_lun :3, 1499 is_bc_transmit :1); 1500 } is_bc_channel[8]; 1501 uint8_t is_bc_interrupt_type; 1502 uint8_t is_bc_buffer_type; 1503 uint8_t __reserved; 1504 } ipmi_sdr_bmc_channel_t; 1505 1506 /* 1507 * OEM Record. See ction 43.12. 1508 */ 1509 1510 #define IPMI_SDR_TYPE_OEM 0xC0 1511 1512 typedef struct ipmi_sdr_oem { 1513 uint8_t is_oem_manufacturer[3]; 1514 uint8_t is_oem_data[1]; 1515 } ipmi_sdr_oem_t; 1516 1517 /* 1518 * Iterate over the SDR repository. This function does the work of parsing the 1519 * name when available, and keeping the repository in a consistent state. 1520 */ 1521 extern int ipmi_sdr_iter(ipmi_handle_t *, 1522 int (*)(ipmi_handle_t *, const char *, ipmi_sdr_t *, void *), void *); 1523 1524 /* 1525 * Lookup the given sensor type by name or a combination of name and entity 1526 * ID/instance. These functions automatically read in and cache the complete 1527 * SDR repository. 1528 */ 1529 extern ipmi_sdr_t *ipmi_sdr_lookup(ipmi_handle_t *, const char *); 1530 extern ipmi_sdr_t *ipmi_sdr_lookup_precise(ipmi_handle_t *, const char *, 1531 uint8_t, uint8_t); 1532 extern ipmi_sdr_fru_locator_t *ipmi_sdr_lookup_fru(ipmi_handle_t *, 1533 const char *); 1534 extern ipmi_sdr_generic_locator_t *ipmi_sdr_lookup_generic(ipmi_handle_t *, 1535 const char *); 1536 extern ipmi_sdr_compact_sensor_t *ipmi_sdr_lookup_compact_sensor( 1537 ipmi_handle_t *, const char *); 1538 extern ipmi_sdr_full_sensor_t *ipmi_sdr_lookup_full_sensor( 1539 ipmi_handle_t *, const char *); 1540 1541 /* 1542 * Entity ID codes. See table 43.13. 1543 */ 1544 #define IPMI_ET_UNSPECIFIED 0x00 1545 #define IPMI_ET_OTHER 0x01 1546 #define IPMI_ET_UNKNOWN 0x02 1547 #define IPMI_ET_PROCESSOR 0x03 1548 #define IPMI_ET_DISK 0x04 1549 #define IPMI_ET_PERIPHERAL 0x05 1550 #define IPMI_ET_MANAGEMENT_MODULE 0x06 1551 #define IPMI_ET_MOTHERBOARD 0x07 1552 #define IPMI_ET_MEMORY_MODULE 0x08 1553 #define IPMI_ET_PROCESSOR_MODULE 0x09 1554 #define IPMI_ET_PSU 0x0A 1555 #define IPMI_ET_CARD 0x0B 1556 #define IPMI_ET_FRONT_PANEL 0x0C 1557 #define IPMI_ET_BACK_PANEL 0x0D 1558 #define IPMI_ET_POWER_BOARD 0x0E 1559 #define IPMI_ET_BACKPLANE 0x0F 1560 #define IPMI_ET_EXPANSION_BOARD 0x10 1561 #define IPMI_ET_OTHER_BOARD 0x11 1562 #define IPMI_ET_PROCESSOR_BOARD 0x12 1563 #define IPMI_ET_POWER_DOMAIN 0x13 1564 #define IPMI_ET_POWER_CONVERTER 0x14 1565 #define IPMI_ET_POWER_MANAGEMENT 0x15 1566 #define IPMI_ET_BACK_CHASSIS 0x16 1567 #define IPMI_ET_SYSTEM_CHASSIS 0x17 1568 #define IPMI_ET_SUB_CHASSIS 0x18 1569 #define IPMI_ET_OTHER_CHASSIS 0x19 1570 #define IPMI_ET_DISK_BAY 0x1A 1571 #define IPMI_ET_PERIPHERAL_BAY 0x1B 1572 #define IPMI_ET_DEVICE_BAY 0x1C 1573 #define IPMI_ET_FAN 0x1D 1574 #define IPMI_ET_COOLING_DOMAIN 0x1E 1575 #define IPMI_ET_CABLE 0x1F 1576 #define IPMI_ET_MEMORY_DEVICE 0x20 1577 #define IPMI_ET_MANAGEMENT_SOFTWARE 0x21 1578 #define IPMI_ET_SYSTEM_FIRMWARE 0x22 1579 #define IPMI_ET_OS 0x23 1580 #define IPMI_ET_SYSTEM_BUS 0x24 1581 #define IPMI_ET_GROUP 0x25 1582 #define IPMI_ET_REMOTE 0x26 1583 #define IPMI_ET_ENVIRONMENT 0x27 1584 #define IPMI_ET_BATTERY 0x28 1585 #define IPMI_ET_BLADE 0x29 1586 #define IPMI_ET_SWITCH 0x2A 1587 #define IPMI_ET_PROCMEM_MODULE 0x2B 1588 #define IPMI_ET_IO_MODULE 0x2C 1589 #define IPMI_ET_PROCIO_MODULE 0x2D 1590 #define IPMI_ET_CONTROLLER_FIRMWARE 0x2E 1591 #define IPMI_ET_CHANNEL 0x2F 1592 #define IPMI_ET_PCI 0x30 1593 #define IPMI_ET_PCIE 0x31 1594 #define IPMI_ET_SCSI 0x32 1595 #define IPMI_ET_SATA_SAS 0x33 1596 #define IPMI_ET_FSB 0x34 1597 #define IPMI_ET_RTC 0x35 1598 1599 /* 1600 * Get Sensor Threshold. See section 35.9 1601 */ 1602 #define IPMI_CMD_GET_SENSOR_THRESHOLDS 0x27 1603 1604 typedef struct ipmi_sensor_thresholds { 1605 uint8_t ithr_readable_mask; 1606 uint8_t ithr_lower_noncrit; 1607 uint8_t ithr_lower_crit; 1608 uint8_t ithr_lower_nonrec; 1609 uint8_t ithr_upper_noncrit; 1610 uint8_t ithr_upper_crit; 1611 uint8_t ithr_upper_nonrec; 1612 } ipmi_sensor_thresholds_t; 1613 1614 extern int ipmi_get_sensor_thresholds(ipmi_handle_t *, 1615 ipmi_sensor_thresholds_t *, uint8_t); 1616 1617 /* 1618 * Get Sensor Reading. See section 35.14. 1619 */ 1620 1621 #define IPMI_CMD_GET_SENSOR_READING 0x2d 1622 1623 typedef struct ipmi_sensor_reading { 1624 uint8_t isr_reading; 1625 DECL_BITFIELD4( 1626 __reserved1 :5, 1627 isr_state_unavailable :1, 1628 isr_scanning_enabled :1, 1629 isr_event_enabled :1); 1630 uint16_t isr_state; 1631 } ipmi_sensor_reading_t; 1632 1633 #define IPMI_SENSOR_THRESHOLD_LOWER_NONCRIT 0x0001 1634 #define IPMI_SENSOR_THRESHOLD_LOWER_CRIT 0x0002 1635 #define IPMI_SENSOR_THRESHOLD_LOWER_NONRECOV 0x0004 1636 #define IPMI_SENSOR_THRESHOLD_UPPER_NONCRIT 0x0008 1637 #define IPMI_SENSOR_THRESHOLD_UPPER_CRIT 0x0010 1638 #define IPMI_SENSOR_THRESHOLD_UPPER_NONRECOV 0x0020 1639 1640 extern ipmi_sensor_reading_t *ipmi_get_sensor_reading(ipmi_handle_t *, uint8_t); 1641 extern int ipmi_sdr_conv_reading(ipmi_sdr_full_sensor_t *, uint8_t, 1642 double *); 1643 /* 1644 * Set Sensor Reading. See section 35.14. 1645 */ 1646 #define IPMI_CMD_SET_SENSOR_READING 0x30 1647 1648 #define IPMI_SENSOR_OP_CLEAR 0x3 /* clear '0' bits */ 1649 #define IPMI_SENSOR_OP_SET 0x2 /* set '1' bits */ 1650 #define IPMI_SENSOR_OP_EXACT 0x1 /* set bits exactly */ 1651 1652 typedef struct ipmi_set_sensor_reading { 1653 uint8_t iss_id; 1654 DECL_BITFIELD5( 1655 iss_set_reading :1, 1656 __reserved :1, 1657 iss_deassrt_op :2, 1658 iss_assert_op :2, 1659 iss_data_bytes :2); 1660 uint8_t iss_sensor_reading; 1661 uint16_t iss_assert_state; /* optional */ 1662 uint16_t iss_deassert_state; /* optional */ 1663 uint8_t iss_event_data1; /* optional */ 1664 uint8_t iss_event_data2; /* optional */ 1665 uint8_t iss_event_data3; /* optional */ 1666 } ipmi_set_sensor_reading_t; 1667 1668 extern int ipmi_set_sensor_reading(ipmi_handle_t *, 1669 ipmi_set_sensor_reading_t *); 1670 1671 /* 1672 * These IPMI message id/opcodes are documented in Appendix G in the IPMI spec. 1673 * 1674 * Payloads for these two commands are described in Sections 34.1 and 34.2 of 1675 * the spec, respectively. 1676 */ 1677 #define IPMI_CMD_GET_FRU_INV_AREA 0x10 1678 #define IPMI_CMD_READ_FRU_DATA 0x11 1679 1680 /* 1681 * Structs to hold the FRU Common Header and the FRU Product Info Area, as 1682 * described in the IPMI Platform Management FRU Information Storage 1683 * Definition (v1.1). 1684 */ 1685 typedef struct ipmi_fru_hdr 1686 { 1687 uint8_t ifh_format; 1688 uint8_t ifh_int_use_off; 1689 uint8_t ifh_chassis_info_off; 1690 uint8_t ifh_board_info_off; 1691 uint8_t ifh_product_info_off; 1692 uint8_t ifh_multi_rec_off; 1693 uint8_t ifh_pad; 1694 uint8_t ifh_chksum; 1695 } ipmi_fru_hdr_t; 1696 1697 /* 1698 * Because only 6 bits are used to specify the length of each field in the FRU 1699 * product and board info areas, the biggest string we would ever need to hold 1700 * would be 63 chars plus a NULL. 1701 */ 1702 #define FRU_INFO_MAXLEN 64 1703 1704 typedef struct ipmi_fru_brd_info 1705 { 1706 char ifbi_manuf_date[3]; 1707 char ifbi_manuf_name[FRU_INFO_MAXLEN]; 1708 char ifbi_board_name[FRU_INFO_MAXLEN]; 1709 char ifbi_product_serial[FRU_INFO_MAXLEN]; 1710 char ifbi_part_number[FRU_INFO_MAXLEN]; 1711 } ipmi_fru_brd_info_t; 1712 1713 typedef struct ipmi_fru_prod_info 1714 { 1715 char ifpi_manuf_name[FRU_INFO_MAXLEN]; 1716 char ifpi_product_name[FRU_INFO_MAXLEN]; 1717 char ifpi_part_number[FRU_INFO_MAXLEN]; 1718 char ifpi_product_version[FRU_INFO_MAXLEN]; 1719 char ifpi_product_serial[FRU_INFO_MAXLEN]; 1720 char ifpi_asset_tag[FRU_INFO_MAXLEN]; 1721 } ipmi_fru_prod_info_t; 1722 1723 extern int ipmi_fru_read(ipmi_handle_t *, ipmi_sdr_fru_locator_t *, char **); 1724 extern int ipmi_fru_parse_board(ipmi_handle_t *, char *, ipmi_fru_brd_info_t *); 1725 extern int ipmi_fru_parse_product(ipmi_handle_t *, char *, 1726 ipmi_fru_prod_info_t *); 1727 1728 /* 1729 * Routines to convert from entity and sensors defines into text strings. 1730 */ 1731 void ipmi_entity_name(uint8_t, char *, size_t); 1732 void ipmi_sensor_type_name(uint8_t, char *, size_t); 1733 void ipmi_sensor_units_name(uint8_t, char *, size_t); 1734 void ipmi_sensor_reading_name(uint8_t, uint8_t, char *, size_t); 1735 1736 /* 1737 * Entity management. IPMI has a notion of 'entities', but these are not 1738 * directly accessible from any commands. Instead, their existence is inferred 1739 * from examining the SDR repository. Since this is rather unwieldy, and 1740 * iterating over entities is a common operation, libipmi provides an entity 1741 * abstraction that hides the implementation details. This handles entity 1742 * groupings as well as SDR associations. 1743 */ 1744 typedef struct ipmi_entity { 1745 uint8_t ie_type; 1746 uint8_t ie_instance; 1747 uint8_t ie_children; 1748 boolean_t ie_logical; 1749 } ipmi_entity_t; 1750 1751 extern int ipmi_entity_iter(ipmi_handle_t *, int (*)(ipmi_handle_t *, 1752 ipmi_entity_t *, void *), void *); 1753 extern int ipmi_entity_iter_sdr(ipmi_handle_t *, ipmi_entity_t *, 1754 int (*)(ipmi_handle_t *, ipmi_entity_t *, const char *, ipmi_sdr_t *, 1755 void *), void *); 1756 extern int ipmi_entity_iter_children(ipmi_handle_t *, ipmi_entity_t *, 1757 int (*)(ipmi_handle_t *, ipmi_entity_t *, void *), void *); 1758 extern ipmi_entity_t *ipmi_entity_lookup(ipmi_handle_t *, uint8_t, 1759 uint8_t); 1760 extern ipmi_entity_t *ipmi_entity_lookup_sdr(ipmi_handle_t *, const char *); 1761 extern ipmi_entity_t *ipmi_entity_parent(ipmi_handle_t *, ipmi_entity_t *); 1762 extern int ipmi_entity_present(ipmi_handle_t *, ipmi_entity_t *, boolean_t *); 1763 extern int ipmi_entity_present_sdr(ipmi_handle_t *, ipmi_sdr_t *, boolean_t *); 1764 1765 /* 1766 * User management. The raw functions are private to libipmi, and only the 1767 * higher level abstraction (ipmi_user_t) is exported to consumers of the 1768 * library. 1769 */ 1770 1771 #define IPMI_USER_PRIV_CALLBACK 0x1 1772 #define IPMI_USER_PRIV_USER 0x2 1773 #define IPMI_USER_PRIV_OPERATOR 0x3 1774 #define IPMI_USER_PRIV_ADMIN 0x4 1775 #define IPMI_USER_PRIV_OEM 0x5 1776 #define IPMI_USER_PRIV_NONE 0xf 1777 1778 typedef struct ipmi_user { 1779 uint8_t iu_uid; 1780 char *iu_name; 1781 boolean_t iu_enabled; 1782 boolean_t iu_ipmi_msg_enable; 1783 boolean_t iu_link_auth_enable; 1784 uint8_t iu_priv; 1785 } ipmi_user_t; 1786 1787 extern int ipmi_user_iter(ipmi_handle_t *, 1788 int (*)(ipmi_user_t *, void *), void *); 1789 extern ipmi_user_t *ipmi_user_lookup_name(ipmi_handle_t *, const char *); 1790 extern ipmi_user_t *ipmi_user_lookup_id(ipmi_handle_t *, uint8_t); 1791 extern int ipmi_user_set_password(ipmi_handle_t *, uint8_t, const char *); 1792 1793 /* 1794 * The remaining functions are private to the implementation of the Sun ILOM 1795 * service processor. These function first check the manufacturer from the IPMI 1796 * device ID, and will return EIPMI_NOT_SUPPORTED if attempted for non-Sun 1797 * devices. 1798 */ 1799 boolean_t ipmi_is_sun_ilom(ipmi_deviceid_t *); 1800 1801 /* 1802 * Sun OEM LED requests. 1803 */ 1804 1805 #define IPMI_SUNOEM_LED_MODE_OFF 0 1806 #define IPMI_SUNOEM_LED_MODE_ON 1 1807 #define IPMI_SUNOEM_LED_MODE_STANDBY 2 1808 #define IPMI_SUNOEM_LED_MODE_SLOW 3 1809 #define IPMI_SUNOEM_LED_MODE_FAST 4 1810 1811 /* 1812 * These functions take a SDR record and construct the appropriate form of the 1813 * above commands. 1814 */ 1815 extern int ipmi_sunoem_led_set(ipmi_handle_t *, 1816 ipmi_sdr_generic_locator_t *, uint8_t); 1817 extern int ipmi_sunoem_led_get(ipmi_handle_t *, 1818 ipmi_sdr_generic_locator_t *, uint8_t *); 1819 1820 /* 1821 * Sun OEM uptime. Note that the underlying command returns the uptime in big 1822 * endian form. This wrapper automatically converts to the appropriate native 1823 * form. 1824 */ 1825 1826 #define IPMI_CMD_SUNOEM_UPTIME 0x08 1827 1828 extern int ipmi_sunoem_uptime(ipmi_handle_t *, uint32_t *, uint32_t *); 1829 1830 /* 1831 * Sun OEM FRU update. The FRU information is managed through a generic 1832 * identifier, and then a type-specific data portion. The wrapper function will 1833 * automatically fill in the data length field according to which type is 1834 * specified. 1835 */ 1836 1837 #define IPMI_CMD_SUNOEM_FRU_UPDATE 0x16 1838 1839 #define IPMI_SUNOEM_FRU_DIMM 0x00 1840 #define IPMI_SUNOEM_FRU_CPU 0x01 1841 #define IPMI_SUNOEM_FRU_BIOS 0x02 1842 #define IPMI_SUNOEM_FRU_DISK 0x03 1843 1844 typedef struct ipmi_sunoem_fru { 1845 uint8_t isf_type; 1846 uint8_t isf_id; 1847 uint8_t isf_datalen; 1848 union { 1849 struct { 1850 uint8_t isf_data[128]; 1851 } dimm; 1852 struct { 1853 uint32_t isf_thermtrip; 1854 uint32_t isf_eax; 1855 char isf_product[48]; 1856 } cpu; 1857 struct { 1858 char isf_part[16]; 1859 char isf_version[16]; 1860 } bios; 1861 struct { 1862 char isf_manufacturer[16]; 1863 char isf_model[28]; 1864 char isf_serial[20]; 1865 char isf_version[8]; 1866 char isf_capacity[16]; 1867 } disk; 1868 } isf_data; 1869 } ipmi_sunoem_fru_t; 1870 1871 int ipmi_sunoem_update_fru(ipmi_handle_t *, ipmi_sunoem_fru_t *); 1872 1873 /* 1874 * See section 28.2 1875 */ 1876 #define IPMI_CMD_GET_CHASSIS_STATUS 0x01 1877 1878 /* 1879 * flags for ichs_current_pwr_state field 1880 */ 1881 #define IPMI_CURR_PWR_STATE_ON 0x01 1882 #define IPMI_CURR_PWR_STATE_OVERLOAD 0x02 1883 #define IPMI_CURR_PWR_STATE_INTERLOCK 0x04 1884 #define IPMI_CURR_PWR_STATE_FAULT 0x08 1885 #define IPMI_CURR_PWR_STATE_CNTL_FAULT 0x10 1886 1887 /* 1888 * flags for ichs_last_pwr_state field 1889 */ 1890 #define IPMI_LAST_PWR_STATE_ACFAILED 0x01 1891 #define IPMI_LAST_PWR_STATE_OVERLOAD 0x02 1892 #define IPMI_LAST_PWR_STATE_INTERLOCK 0x04 1893 #define IPMI_LAST_PWR_STATE_FAULT 0x08 1894 #define IPMI_LAST_PWR_STATE_CMD_ON 0x10 1895 1896 /* 1897 * flags for the ichs_pwr_restore_policy field 1898 */ 1899 #define IPMI_PWR_POLICY_REMAIN_OFF 0x0 1900 #define IPMI_PWR_POLICY_RESTORE 0x1 1901 #define IPMI_PWR_POLICY_POWER_ON 0x2 1902 #define IPMI_PWR_POLICY_UNKNOWN 0x3 1903 1904 typedef struct ipmi_chassis_status { 1905 DECL_BITFIELD3( 1906 ichs_current_pwr_state :5, 1907 ichs_pwr_restore_policy :2, 1908 __reserved1 :1); 1909 DECL_BITFIELD2( 1910 ichs_last_pwr_state :5, 1911 __reserved2 :3); 1912 DECL_BITFIELD7( 1913 ichs_intrusion_asserted :1, 1914 ichs_front_panel_disabled :1, 1915 ichs_drive_fault_asserted :1, 1916 ichs_fan_fault_asserted :1, 1917 ichs_identify_state :2, 1918 ichs_identify_supported :1, 1919 __reserved3 :1); 1920 } ipmi_chassis_status_t; 1921 1922 extern ipmi_chassis_status_t *ipmi_chassis_status(ipmi_handle_t *); 1923 1924 /* 1925 * See section 28.5 1926 */ 1927 #define IPMI_CMD_CHASSIS_IDENTIFY 0x04 1928 int ipmi_chassis_identify(ipmi_handle_t *, boolean_t); 1929 1930 #pragma pack() 1931 1932 #ifdef __cplusplus 1933 } 1934 #endif 1935 1936 #endif /* _LIBIPMI_H */ 1937