1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2009, Intel Corporation 24 * All rights reserved. 25 */ 26 27 /* 28 * Portions Copyright 2009 Advanced Micro Devices, Inc. 29 */ 30 31 #ifndef _PROC64_ID_H 32 #define _PROC64_ID_H 33 34 #include <sys/x86_archext.h> 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 /* 41 * Defines to determine what SSE instructions can be used for memops or strops 42 */ 43 #define NO_SSE 0x00 /* Default -- Don't use SSE instructions */ 44 #define USE_SSE2 0x01 /* SSE2 */ 45 #define USE_SSE3 0x02 /* SSE3 */ 46 #define USE_SSSE3 0x04 /* Supplemental SSE3 */ 47 #define USE_SSE4_1 0x08 /* SSE 4.1 */ 48 #define USE_SSE4_2 0x10 /* SSE 4.2 */ 49 #define USE_BSF 0x20 /* USE BSF class of instructions */ 50 51 /* 52 * Cache size defaults for Core 2 Duo 53 */ 54 #define INTEL_DFLT_L1_CACHE_SIZE (32 * 1024) 55 #define INTEL_DFLT_L2_CACHE_SIZE (4 * 1024 * 1024) 56 #define INTEL_DFLT_LARGEST_CACHE_SIZE (4 * 1024 * 1024) 57 58 /* 59 * Cache size defaults for AMD SledgeHammer 60 */ 61 #define AMD_DFLT_L1_CACHE_SIZE (64 * 1024) 62 #define AMD_DFLT_L2_CACHE_SIZE (1024 * 1024) 63 64 #ifdef _ASM 65 .extern .memops_method 66 #else 67 68 void __libc_get_cpuid(int cpuid_function, void *out_reg, int cache_index); 69 void __intel_set_memops_method(long sse_level); 70 void __set_cache_sizes(long l1_cache_size, long l2_cache_size, 71 long largest_level_cache); 72 73 #endif /* _ASM */ 74 75 #ifdef __cplusplus 76 } 77 #endif 78 79 #endif /* _PROC64_ID_H */ 80