1*0db3240dSStephen Hanson /* 2*0db3240dSStephen Hanson * CDDL HEADER START 3*0db3240dSStephen Hanson * 4*0db3240dSStephen Hanson * The contents of this file are subject to the terms of the 5*0db3240dSStephen Hanson * Common Development and Distribution License (the "License"). 6*0db3240dSStephen Hanson * You may not use this file except in compliance with the License. 7*0db3240dSStephen Hanson * 8*0db3240dSStephen Hanson * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*0db3240dSStephen Hanson * or http://www.opensolaris.org/os/licensing. 10*0db3240dSStephen Hanson * See the License for the specific language governing permissions 11*0db3240dSStephen Hanson * and limitations under the License. 12*0db3240dSStephen Hanson * 13*0db3240dSStephen Hanson * When distributing Covered Code, include this CDDL HEADER in each 14*0db3240dSStephen Hanson * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*0db3240dSStephen Hanson * If applicable, add the following below this CDDL HEADER, with the 16*0db3240dSStephen Hanson * fields enclosed by brackets "[]" replaced with your own identifying 17*0db3240dSStephen Hanson * information: Portions Copyright [yyyy] [name of copyright owner] 18*0db3240dSStephen Hanson * 19*0db3240dSStephen Hanson * CDDL HEADER END 20*0db3240dSStephen Hanson */ 21*0db3240dSStephen Hanson 22*0db3240dSStephen Hanson /* 23*0db3240dSStephen Hanson * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved. 24*0db3240dSStephen Hanson */ 25*0db3240dSStephen Hanson 26*0db3240dSStephen Hanson #ifndef _PCI_I86PC_H 27*0db3240dSStephen Hanson #define _PCI_I86PC_H 28*0db3240dSStephen Hanson 29*0db3240dSStephen Hanson #include <pcibus_labels.h> 30*0db3240dSStephen Hanson 31*0db3240dSStephen Hanson #ifdef __cplusplus 32*0db3240dSStephen Hanson extern "C" { 33*0db3240dSStephen Hanson #endif 34*0db3240dSStephen Hanson 35*0db3240dSStephen Hanson /* 36*0db3240dSStephen Hanson * Data for label lookup based on existing slot label. 37*0db3240dSStephen Hanson * 38*0db3240dSStephen Hanson * Platforms may need entries here if the slot labels 39*0db3240dSStephen Hanson * provided by firmware are incorrect. 40*0db3240dSStephen Hanson * 41*0db3240dSStephen Hanson * Note that re-writing to NULL provides a way of getting rid of totally 42*0db3240dSStephen Hanson * spurious labels. 43*0db3240dSStephen Hanson */ 44*0db3240dSStephen Hanson 45*0db3240dSStephen Hanson slot_rwd_t x4600_rewrites[] = { 46*0db3240dSStephen Hanson /* from hw, should be, test func */ 47*0db3240dSStephen Hanson { "PCIX SLOT0", NULL, NULL }, 48*0db3240dSStephen Hanson { "PCIX SLOT1", NULL, NULL }, 49*0db3240dSStephen Hanson { "PCIX SLOT2", NULL, NULL }, 50*0db3240dSStephen Hanson { "PCIExp SLOT2", NULL, NULL }, 51*0db3240dSStephen Hanson { "PCIExp SLOT3", NULL, NULL }, 52*0db3240dSStephen Hanson { "PCIExp SLOT4", NULL, NULL }, 53*0db3240dSStephen Hanson { "PCIExp SLOT5", NULL, NULL }, 54*0db3240dSStephen Hanson { "PCIExp SLOT6", NULL, NULL }, 55*0db3240dSStephen Hanson { "PCIExp SLOT7", NULL, NULL }, 56*0db3240dSStephen Hanson { "PCIExp SLOT8", NULL, NULL } 57*0db3240dSStephen Hanson }; 58*0db3240dSStephen Hanson 59*0db3240dSStephen Hanson slot_rwd_t netra_x4200_rewrites[] = { 60*0db3240dSStephen Hanson /* from hw, should be, test func */ 61*0db3240dSStephen Hanson { "PCIExp SLOT1", NULL, NULL }, 62*0db3240dSStephen Hanson { "PCIX SLOT2", NULL, NULL }, 63*0db3240dSStephen Hanson }; 64*0db3240dSStephen Hanson 65*0db3240dSStephen Hanson slot_rwd_t x4250_rewrites[] = { 66*0db3240dSStephen Hanson /* from hw, should be, test func */ 67*0db3240dSStephen Hanson { "SLOT0", NULL, NULL }, 68*0db3240dSStephen Hanson { "SLOT1", NULL, NULL }, 69*0db3240dSStephen Hanson { "SLOT2", NULL, NULL } 70*0db3240dSStephen Hanson }; 71*0db3240dSStephen Hanson 72*0db3240dSStephen Hanson plat_rwd_t plat_rewrites[] = { 73*0db3240dSStephen Hanson { "Sun-Fire-X4600", 74*0db3240dSStephen Hanson sizeof (x4600_rewrites) / sizeof (slot_rwd_t), 75*0db3240dSStephen Hanson x4600_rewrites }, 76*0db3240dSStephen Hanson { "Sun-Fire-X4600-M2", 77*0db3240dSStephen Hanson sizeof (x4600_rewrites) / sizeof (slot_rwd_t), 78*0db3240dSStephen Hanson x4600_rewrites }, 79*0db3240dSStephen Hanson { "Sun-Fire-X4250", 80*0db3240dSStephen Hanson sizeof (x4250_rewrites) / sizeof (slot_rwd_t), 81*0db3240dSStephen Hanson x4250_rewrites }, 82*0db3240dSStephen Hanson { "Netra-X4200-M2", 83*0db3240dSStephen Hanson sizeof (netra_x4200_rewrites) / sizeof (slot_rwd_t), 84*0db3240dSStephen Hanson netra_x4200_rewrites } 85*0db3240dSStephen Hanson }; 86*0db3240dSStephen Hanson 87*0db3240dSStephen Hanson slotnm_rewrite_t SlotRWs = { 88*0db3240dSStephen Hanson sizeof (plat_rewrites) / sizeof (plat_rwd_t), 89*0db3240dSStephen Hanson plat_rewrites 90*0db3240dSStephen Hanson }; 91*0db3240dSStephen Hanson 92*0db3240dSStephen Hanson /* 93*0db3240dSStephen Hanson * Data for label lookup based on device info. 94*0db3240dSStephen Hanson * 95*0db3240dSStephen Hanson * Platforms need entries here if there is no physical slot number 96*0db3240dSStephen Hanson * or slot-names. 97*0db3240dSStephen Hanson */ 98*0db3240dSStephen Hanson 99*0db3240dSStephen Hanson extern int parent_is_rc(topo_mod_t *, did_t *); 100*0db3240dSStephen Hanson extern int ba_is_2(topo_mod_t *, did_t *); 101*0db3240dSStephen Hanson extern int ba_is_4(topo_mod_t *, did_t *); 102*0db3240dSStephen Hanson 103*0db3240dSStephen Hanson devlab_t x4600_missing[] = { 104*0db3240dSStephen Hanson /* board, bridge, root-complex, bus, dev, label, test func */ 105*0db3240dSStephen Hanson { 0, 2, 2, -1, -1, "PCIExp SLOT4", parent_is_rc }, 106*0db3240dSStephen Hanson { 0, 3, 3, -1, -1, "PCIExp SLOT2", parent_is_rc }, 107*0db3240dSStephen Hanson { 0, 4, 4, -1, -1, "PCIExp SLOT3", parent_is_rc }, 108*0db3240dSStephen Hanson { 0, 8, 8, -1, -1, "PCIExp SLOT7", parent_is_rc }, 109*0db3240dSStephen Hanson { 0, 9, 9, -1, -1, "PCIExp SLOT5", parent_is_rc }, 110*0db3240dSStephen Hanson { 0, 10, 10, -1, -1, "PCIExp SLOT6", parent_is_rc } 111*0db3240dSStephen Hanson }; 112*0db3240dSStephen Hanson 113*0db3240dSStephen Hanson devlab_t x4600m2_missing[] = { 114*0db3240dSStephen Hanson /* board, bridge, root-complex, bus, dev, label, test func */ 115*0db3240dSStephen Hanson { 0, 1, 1, -1, -1, "PCIExp SLOT4", parent_is_rc }, 116*0db3240dSStephen Hanson { 0, 2, 2, -1, -1, "PCIExp SLOT2", parent_is_rc }, 117*0db3240dSStephen Hanson { 0, 3, 3, -1, -1, "PCIExp SLOT3", parent_is_rc }, 118*0db3240dSStephen Hanson { 0, 6, 6, -1, -1, "PCIExp SLOT7", parent_is_rc }, 119*0db3240dSStephen Hanson { 0, 7, 7, -1, -1, "PCIExp SLOT5", parent_is_rc }, 120*0db3240dSStephen Hanson { 0, 8, 8, -1, -1, "PCIExp SLOT6", parent_is_rc } 121*0db3240dSStephen Hanson }; 122*0db3240dSStephen Hanson 123*0db3240dSStephen Hanson devlab_t x4250_missing[] = { 124*0db3240dSStephen Hanson /* board, bridge, root-complex, bus, dev, label, test func */ 125*0db3240dSStephen Hanson { 0, 0, 0, -1, -1, "PCIExp SLOT3", ba_is_2 }, 126*0db3240dSStephen Hanson { 0, 0, 0, -1, -1, "PCIExp SLOT0", ba_is_4 }, 127*0db3240dSStephen Hanson { 0, 2, 2, -1, -1, "PCIExp SLOT4", ba_is_2 }, 128*0db3240dSStephen Hanson { 0, 2, 2, -1, -1, "PCIExp SLOT1", ba_is_4 }, 129*0db3240dSStephen Hanson { 0, 4, 4, -1, -1, "PCIExp SLOT5", ba_is_2 }, 130*0db3240dSStephen Hanson { 0, 4, 4, -1, -1, "PCIExp SLOT2", ba_is_4 } 131*0db3240dSStephen Hanson }; 132*0db3240dSStephen Hanson 133*0db3240dSStephen Hanson devlab_t netra_x4200_missing[] = { 134*0db3240dSStephen Hanson /* board, bridge, root-complex, bus, dev, label, test func */ 135*0db3240dSStephen Hanson { 0, 4, 4, -1, -1, "PCIExp SLOT0", NULL }, 136*0db3240dSStephen Hanson { 0, 0, 3 - TO_PCI, -1, -1, "PCIX SLOT", NULL }, 137*0db3240dSStephen Hanson { 0, 0, 7 - TO_PCI, -1, -1, "PCIX SLOT", NULL } 138*0db3240dSStephen Hanson }; 139*0db3240dSStephen Hanson 140*0db3240dSStephen Hanson pdevlabs_t plats_missing[] = { 141*0db3240dSStephen Hanson { "Sun-Fire-X4600", 142*0db3240dSStephen Hanson sizeof (x4600_missing) / sizeof (devlab_t), 143*0db3240dSStephen Hanson x4600_missing }, 144*0db3240dSStephen Hanson { "Sun-Fire-X4600-M2", 145*0db3240dSStephen Hanson sizeof (x4600m2_missing) / sizeof (devlab_t), 146*0db3240dSStephen Hanson x4600m2_missing }, 147*0db3240dSStephen Hanson { "Sun-Fire-X4250", 148*0db3240dSStephen Hanson sizeof (x4250_missing) / sizeof (devlab_t), 149*0db3240dSStephen Hanson x4250_missing }, 150*0db3240dSStephen Hanson { "Netra-X4200-M2", 151*0db3240dSStephen Hanson sizeof (netra_x4200_missing) / sizeof (devlab_t), 152*0db3240dSStephen Hanson netra_x4200_missing } 153*0db3240dSStephen Hanson }; 154*0db3240dSStephen Hanson 155*0db3240dSStephen Hanson physnm_t x2100m2_pnms[] = { 156*0db3240dSStephen Hanson /* Slot #, Label */ 157*0db3240dSStephen Hanson { 37, "PCIe 0" }, 158*0db3240dSStephen Hanson { 32, "PCIe 1" } 159*0db3240dSStephen Hanson }; 160*0db3240dSStephen Hanson 161*0db3240dSStephen Hanson physnm_t x2200m2_pnms[] = { 162*0db3240dSStephen Hanson /* Slot #, Label */ 163*0db3240dSStephen Hanson { 37, "PCIe 0" }, 164*0db3240dSStephen Hanson { 32, "PCIe 1" } 165*0db3240dSStephen Hanson }; 166*0db3240dSStephen Hanson 167*0db3240dSStephen Hanson physnm_t x2250_pnms[] = { 168*0db3240dSStephen Hanson /* Slot #, Label */ 169*0db3240dSStephen Hanson { 6, "PCIe 0" } 170*0db3240dSStephen Hanson }; 171*0db3240dSStephen Hanson 172*0db3240dSStephen Hanson physnm_t x2270_pnms[] = { 173*0db3240dSStephen Hanson /* Slot #, Label */ 174*0db3240dSStephen Hanson { 55, "PCIe 0" } 175*0db3240dSStephen Hanson }; 176*0db3240dSStephen Hanson 177*0db3240dSStephen Hanson physnm_t x4170_pnms[] = { 178*0db3240dSStephen Hanson /* Slot #, Label */ 179*0db3240dSStephen Hanson { 1, "PCIe 0" }, 180*0db3240dSStephen Hanson { 2, "PCIe 1" }, 181*0db3240dSStephen Hanson { 3, "PCIe 2" } 182*0db3240dSStephen Hanson }; 183*0db3240dSStephen Hanson 184*0db3240dSStephen Hanson physnm_t x4270_pnms[] = { 185*0db3240dSStephen Hanson /* Slot #, Label */ 186*0db3240dSStephen Hanson { 1, "PCIe 0" }, 187*0db3240dSStephen Hanson { 2, "PCIe 1" }, 188*0db3240dSStephen Hanson { 3, "PCIe 2" }, 189*0db3240dSStephen Hanson { 4, "PCIe 3" }, 190*0db3240dSStephen Hanson { 5, "PCIe 4" }, 191*0db3240dSStephen Hanson { 6, "PCIe 5" } 192*0db3240dSStephen Hanson }; 193*0db3240dSStephen Hanson 194*0db3240dSStephen Hanson physnm_t x4275_pnms[] = { 195*0db3240dSStephen Hanson /* Slot #, Label */ 196*0db3240dSStephen Hanson { 1, "PCIe 0" }, 197*0db3240dSStephen Hanson { 2, "PCIe 1" }, 198*0db3240dSStephen Hanson { 3, "PCIe 2" }, 199*0db3240dSStephen Hanson { 4, "PCIe 3" }, 200*0db3240dSStephen Hanson { 5, "PCIe 4" }, 201*0db3240dSStephen Hanson { 6, "PCIe 5" } 202*0db3240dSStephen Hanson }; 203*0db3240dSStephen Hanson 204*0db3240dSStephen Hanson physnm_t netra4270_pnms[] = { 205*0db3240dSStephen Hanson /* Slot #, Label */ 206*0db3240dSStephen Hanson { 1, "PCIe 0" }, 207*0db3240dSStephen Hanson { 2, "PCIe 1" }, 208*0db3240dSStephen Hanson { 3, "PCIe 2" }, 209*0db3240dSStephen Hanson { 5, "PCIe 4" }, 210*0db3240dSStephen Hanson { 6, "PCIe 5" } 211*0db3240dSStephen Hanson }; 212*0db3240dSStephen Hanson 213*0db3240dSStephen Hanson physnm_t x4150_pnms[] = { 214*0db3240dSStephen Hanson /* Slot #, Label */ 215*0db3240dSStephen Hanson { 40, "PCIe 0" }, 216*0db3240dSStephen Hanson { 48, "PCIe 1" }, 217*0db3240dSStephen Hanson { 50, "PCIe 2" } 218*0db3240dSStephen Hanson }; 219*0db3240dSStephen Hanson 220*0db3240dSStephen Hanson physnm_t x4450_pnms[] = { 221*0db3240dSStephen Hanson /* Slot #, Label */ 222*0db3240dSStephen Hanson { 52, "PCIe 0" }, 223*0db3240dSStephen Hanson { 54, "PCIe 1" }, 224*0db3240dSStephen Hanson { 40, "PCIe 2" }, 225*0db3240dSStephen Hanson { 49, "PCIe 3" }, 226*0db3240dSStephen Hanson { 51, "PCIe 4" }, 227*0db3240dSStephen Hanson { 41, "PCIe 5" } 228*0db3240dSStephen Hanson }; 229*0db3240dSStephen Hanson 230*0db3240dSStephen Hanson pphysnm_t plat_pnames[] = { 231*0db3240dSStephen Hanson { "X2100-M2", 232*0db3240dSStephen Hanson sizeof (x2100m2_pnms) / sizeof (physnm_t), 233*0db3240dSStephen Hanson x2100m2_pnms }, 234*0db3240dSStephen Hanson { "Sun-Fire-X2100-M2", 235*0db3240dSStephen Hanson sizeof (x2100m2_pnms) / sizeof (physnm_t), 236*0db3240dSStephen Hanson x2100m2_pnms }, 237*0db3240dSStephen Hanson { "X2200-M2", 238*0db3240dSStephen Hanson sizeof (x2200m2_pnms) / sizeof (physnm_t), 239*0db3240dSStephen Hanson x2200m2_pnms }, 240*0db3240dSStephen Hanson { "Sun-Fire-X2200-M2", 241*0db3240dSStephen Hanson sizeof (x2200m2_pnms) / sizeof (physnm_t), 242*0db3240dSStephen Hanson x2200m2_pnms }, 243*0db3240dSStephen Hanson { "Sun-Fire-X2250", 244*0db3240dSStephen Hanson sizeof (x2250_pnms) / sizeof (physnm_t), 245*0db3240dSStephen Hanson x2250_pnms }, 246*0db3240dSStephen Hanson { "Sun-Fire-X2270", 247*0db3240dSStephen Hanson sizeof (x2270_pnms) / sizeof (physnm_t), 248*0db3240dSStephen Hanson x2270_pnms }, 249*0db3240dSStephen Hanson { "Sun-Fire-X4170", 250*0db3240dSStephen Hanson sizeof (x4170_pnms) / sizeof (physnm_t), 251*0db3240dSStephen Hanson x4170_pnms }, 252*0db3240dSStephen Hanson { "Sun-Fire-X4270", 253*0db3240dSStephen Hanson sizeof (x4270_pnms) / sizeof (physnm_t), 254*0db3240dSStephen Hanson x4270_pnms }, 255*0db3240dSStephen Hanson { "Sun-Fire-X4275", 256*0db3240dSStephen Hanson sizeof (x4275_pnms) / sizeof (physnm_t), 257*0db3240dSStephen Hanson x4275_pnms }, 258*0db3240dSStephen Hanson { "Sun-Fire-X4170-Server", 259*0db3240dSStephen Hanson sizeof (x4170_pnms) / sizeof (physnm_t), 260*0db3240dSStephen Hanson x4170_pnms }, 261*0db3240dSStephen Hanson { "Sun-Fire-X4270-Server", 262*0db3240dSStephen Hanson sizeof (x4270_pnms) / sizeof (physnm_t), 263*0db3240dSStephen Hanson x4270_pnms }, 264*0db3240dSStephen Hanson { "Sun-Fire-X4275-Server", 265*0db3240dSStephen Hanson sizeof (x4275_pnms) / sizeof (physnm_t), 266*0db3240dSStephen Hanson x4275_pnms }, 267*0db3240dSStephen Hanson { "Sun-Netra-X4270", 268*0db3240dSStephen Hanson sizeof (netra4270_pnms) / sizeof (physnm_t), 269*0db3240dSStephen Hanson netra4270_pnms }, 270*0db3240dSStephen Hanson { "Sun-Fire-X4150", 271*0db3240dSStephen Hanson sizeof (x4150_pnms) / sizeof (physnm_t), 272*0db3240dSStephen Hanson x4150_pnms }, 273*0db3240dSStephen Hanson { "Sun-Fire-X4450", 274*0db3240dSStephen Hanson sizeof (x4450_pnms) / sizeof (physnm_t), 275*0db3240dSStephen Hanson x4450_pnms } 276*0db3240dSStephen Hanson }; 277*0db3240dSStephen Hanson 278*0db3240dSStephen Hanson missing_names_t Missing = { 279*0db3240dSStephen Hanson sizeof (plats_missing) / sizeof (pdevlabs_t), 280*0db3240dSStephen Hanson plats_missing 281*0db3240dSStephen Hanson }; 282*0db3240dSStephen Hanson 283*0db3240dSStephen Hanson physlot_names_t PhyslotNMs = { 284*0db3240dSStephen Hanson sizeof (plat_pnames) / sizeof (pphysnm_t), 285*0db3240dSStephen Hanson plat_pnames 286*0db3240dSStephen Hanson }; 287*0db3240dSStephen Hanson 288*0db3240dSStephen Hanson slotnm_rewrite_t *Slot_Rewrites = &SlotRWs; 289*0db3240dSStephen Hanson physlot_names_t *Physlot_Names = &PhyslotNMs; 290*0db3240dSStephen Hanson missing_names_t *Missing_Names = &Missing; 291*0db3240dSStephen Hanson 292*0db3240dSStephen Hanson #ifdef __cplusplus 293*0db3240dSStephen Hanson } 294*0db3240dSStephen Hanson #endif 295*0db3240dSStephen Hanson 296*0db3240dSStephen Hanson #endif /* _PCI_I86PC_H */ 297