1# 2# This file and its contents are supplied under the terms of the 3# Common Development and Distribution License ("CDDL"), version 1.0. 4# You may only use this file in accordance with the terms of version 5# 1.0 of the CDDL. 6# 7# A full copy of the text of the CDDL should have accompanied this 8# source. A copy of the CDDL is also available via the Internet at 9# http://www.illumos.org/license/CDDL. 10# 11 12# 13# Copyright (c) 2018, Joyent, Inc. 14# 15 16# 17# This file describes the USB topology for the SuperMicro 18# SSG-2028P-ACR24L product. For more information on the format see 19# topo_usb_file.c. 20# 21 22# 23# Older revisions of this system had issues with the ACPI tables that 24# caused the ACPI PLD data to incorrectly match ports. As such, drive 25# all port matching rules from this. We'll explicitly label the ports as 26# well. 27# 28disable-acpi-match 29enable-metadata-match 30port 31 label 32 Rear Upper Left USB 33 chassis 34 external 35 port-type 36 0x0 37 acpi-path 38 \_SB_.PCI0.XHCI.RHUB.HS02 39 acpi-path 40 \_SB_.PCI0.EHC1.HUBN.PR01.PR12 41end-port 42 43port 44 label 45 Rear Lower Left USB 46 chassis 47 external 48 port-type 49 0x0 50 acpi-path 51 \_SB_.PCI0.XHCI.RHUB.HS01 52 acpi-path 53 \_SB_.PCI0.EHC1.HUBN.PR01.PR11 54end-port 55 56port 57 label 58 Rear Upper Right USB 59 chassis 60 external 61 port-type 62 0x3 63 acpi-path 64 \_SB_.PCI0.XHCI.RHUB.HS12 65 acpi-path 66 \_SB_.PCI0.XHCI.RHUB.SSP1 67 acpi-path 68 \_SB_.PCI0.EHC2.HUBN.PR01.PR16 69end-port 70 71port 72 label 73 Rear Lower Right USB 74 chassis 75 external 76 port-type 77 0x3 78 acpi-path 79 \_SB_.PCI0.XHCI.RHUB.HS11 80 acpi-path 81 \_SB_.PCI0.XHCI.RHUB.SSP2 82 acpi-path 83 \_SB_.PCI0.EHC2.HUBN.PR01.PR15 84end-port 85 86port 87 label 88 Internal USB 89 internal 90 port-type 91 0x3 92 acpi-path 93 \_SB_.PCI0.XHCI.RHUB.HS07 94 acpi-path 95 \_SB_.PCI0.XHCI.RHUB.SSP4 96 acpi-path 97 \_SB_.PCI0.EHC2.HUBN.PR01.PR13 98end-port 99