xref: /illumos-gate/usr/src/lib/fm/topo/libtopo/common/topo_hc.h (revision a194faf8907a6722dcf10ad16c6ca72c9b7bd0ba)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _TOPO_HC_H
28 #define	_TOPO_HC_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * Allowable hardware component names for hc FMRIs
38  */
39 #define	BAY		"bay"
40 #define	BRANCH		"branch"
41 #define	CMP		"CMP"
42 #define	CENTERPLANE	"centerplane"
43 #define	CHASSIS		"chassis"
44 #define	CHIP		"chip"
45 #define	CHIP_SELECT	"chip-select"
46 #define	CPU		"cpu"
47 #define	CPUBOARD	"cpuboard"
48 #define	DIMM		"dimm"
49 #define	DISK		"disk"
50 #define	DRAMCHANNEL	"dram-channel"
51 #define	HOSTBRIDGE	"hostbridge"
52 #define	INTERCONNECT	"interconnect"
53 #define	IOBOARD		"ioboard"
54 #define	MEMBOARD	"memboard"
55 #define	MEMORYCONTROL	"memory-controller"
56 #define	MOTHERBOARD	"motherboard"
57 #define	NIU		"niu"
58 #define	NIUFN		"niufn"
59 #define	PCI_BUS		"pcibus"
60 #define	PCI_DEVICE	"pcidev"
61 #define	PCI_FUNCTION    "pcifn"
62 #define	PCIEX_BUS	"pciexbus"
63 #define	PCIEX_DEVICE	"pciexdev"
64 #define	PCIEX_FUNCTION  "pciexfn"
65 #define	PCIEX_ROOT	"pciexrc"
66 #define	PCIEX_SWUP	"pciexswu"
67 #define	PCIEX_SWDWN	"pciexswd"
68 #define	RANK		"rank"
69 #define	SYSTEMBOARD	"systemboard"
70 #define	XAUI		"xaui"
71 #define	XFP		"xfp"
72 
73 /*
74  * Allowable hc node property group and property names
75  */
76 #define	TOPO_PGROUP_IO		"io"
77 #define	TOPO_IO_DEVTYPE		"devtype"
78 #define	TOPO_IO_DRIVER		"driver"
79 #define	TOPO_IO_MODULE		"module"
80 #define	TOPO_IO_DEV		"dev"
81 #define	TOPO_IO_DEV_PATH	"devfs-path"
82 #define	TOPO_IO_AP_PATH		"ap-path"
83 
84 #define	TOPO_PGROUP_PCI		"pci"
85 #define	TOPO_PCI_VENDID		"vendor-id"
86 #define	TOPO_PCI_DEVID		"device-id"
87 #define	TOPO_PCI_EXCAP		"extended-capabilities"
88 #define	TOPO_PCI_BDF		"BDF"
89 #define	TOPO_PCI_CLASS		"class-code"
90 
91 #ifdef	__cplusplus
92 }
93 #endif
94 
95 #endif	/* _TOPO_HC_H */
96