1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _TOPO_HC_H 28 #define _TOPO_HC_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* 35 * Allowable hardware component names for hc FMRIs 36 */ 37 #define BANK "bank" 38 #define BAY "bay" 39 #define BLADE "blade" 40 #define BRANCH "branch" 41 #define CMP "CMP" 42 #define CENTERPLANE "centerplane" 43 #define CHASSIS "chassis" 44 #define CHIP "chip" 45 #define CORE "core" 46 #define STRAND "strand" 47 #define CHIP_SELECT "chip-select" 48 #define CONTROLLER "controller" 49 #define CPU "cpu" 50 #define CPUBOARD "cpuboard" 51 #define DIMM "dimm" 52 #define DISK "disk" 53 #define DRAM "dram" 54 #define DRAMCHANNEL "dram-channel" 55 #define FAN "fan" 56 #define FANMODULE "fanmodule" 57 #define HOSTBRIDGE "hostbridge" 58 #define INTERCONNECT "interconnect" 59 #define IOBOARD "ioboard" 60 #define MEMBOARD "memboard" 61 #define MEMORYBUFFER "memory-buffer" 62 #define MEMORYCONTROL "memory-controller" 63 #define MICROCORE "micro-core" 64 #define MOTHERBOARD "motherboard" 65 #define NIU "niu" 66 #define NIUFN "niufn" 67 #define PCI_BUS "pcibus" 68 #define PCI_DEVICE "pcidev" 69 #define PCI_FUNCTION "pcifn" 70 #define PCIEX_BUS "pciexbus" 71 #define PCIEX_DEVICE "pciexdev" 72 #define PCIEX_FUNCTION "pciexfn" 73 #define PCIEX_ROOT "pciexrc" 74 #define PCIEX_SWUP "pciexswu" 75 #define PCIEX_SWDWN "pciexswd" 76 #define POWERMODULE "powermodule" 77 #define PSU "psu" 78 #define RANK "rank" 79 #define RISER "riser" 80 #define SHELF "shelf" 81 #define SES_ENCLOSURE "ses-enclosure" 82 #define SUBCHASSIS "subchassis" 83 #define SYSTEMBOARD "systemboard" 84 #define XAUI "xaui" 85 #define XFP "xfp" 86 87 /* 88 * Allowable hc node property group and property names 89 */ 90 #define TOPO_PGROUP_IO "io" 91 #define TOPO_IO_DEVTYPE "devtype" 92 #define TOPO_IO_DRIVER "driver" 93 #define TOPO_IO_MODULE "module" 94 #define TOPO_IO_DEV "dev" 95 #define TOPO_IO_DEVID "devid" 96 #define TOPO_IO_DEV_PATH "devfs-path" 97 #define TOPO_IO_AP_PATH "ap-path" 98 #define TOPO_IO_PHYS_PATH "phys-path" 99 100 #define TOPO_PGROUP_PCI "pci" 101 #define TOPO_PCI_VENDID "vendor-id" 102 #define TOPO_PCI_DEVID "device-id" 103 #define TOPO_PCI_EXCAP "extended-capabilities" 104 #define TOPO_PCI_BDF "BDF" 105 #define TOPO_PCI_CLASS "class-code" 106 #define TOPO_PCI_AADDR "assigned-addresses" 107 108 #ifdef __cplusplus 109 } 110 #endif 111 112 #endif /* _TOPO_HC_H */ 113