1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _SYS_ATA_H_ 32 #define _SYS_ATA_H_ 33 34 #include <sys/ioccom.h> 35 36 /* ATA/ATAPI device parameters */ 37 struct ata_params { 38 /*000*/ u_int16_t config; /* configuration info */ 39 #define ATA_PROTO_MASK 0x8003 40 #define ATA_PROTO_ATAPI 0x8000 41 #define ATA_PROTO_ATAPI_12 0x8000 42 #define ATA_PROTO_ATAPI_16 0x8001 43 #define ATA_PROTO_CFA 0x848a 44 #define ATA_ATAPI_TYPE_MASK 0x1f00 45 #define ATA_ATAPI_TYPE_DIRECT 0x0000 /* disk/floppy */ 46 #define ATA_ATAPI_TYPE_TAPE 0x0100 /* streaming tape */ 47 #define ATA_ATAPI_TYPE_CDROM 0x0500 /* CD-ROM device */ 48 #define ATA_ATAPI_TYPE_OPTICAL 0x0700 /* optical disk */ 49 #define ATA_ATAPI_REMOVABLE 0x0080 50 #define ATA_DRQ_MASK 0x0060 51 #define ATA_DRQ_SLOW 0x0000 /* cpu 3 ms delay */ 52 #define ATA_DRQ_INTR 0x0020 /* interrupt 10 ms delay */ 53 #define ATA_DRQ_FAST 0x0040 /* accel 50 us delay */ 54 #define ATA_RESP_INCOMPLETE 0x0004 55 56 /*001*/ u_int16_t cylinders; /* # of cylinders */ 57 /*002*/ u_int16_t specconf; /* specific configuration */ 58 /*003*/ u_int16_t heads; /* # heads */ 59 u_int16_t obsolete4; 60 u_int16_t obsolete5; 61 /*006*/ u_int16_t sectors; /* # sectors/track */ 62 /*007*/ u_int16_t vendor7[3]; 63 /*010*/ u_int8_t serial[20]; /* serial number */ 64 /*020*/ u_int16_t retired20; 65 u_int16_t retired21; 66 u_int16_t obsolete22; 67 /*023*/ u_int8_t revision[8]; /* firmware revision */ 68 /*027*/ u_int8_t model[40]; /* model name */ 69 /*047*/ u_int16_t sectors_intr; /* sectors per interrupt */ 70 /*048*/ u_int16_t tcg; /* Trusted Computing Group */ 71 #define ATA_SUPPORT_TCG 0x0001 72 /*049*/ u_int16_t capabilities1; 73 #define ATA_SUPPORT_DMA 0x0100 74 #define ATA_SUPPORT_LBA 0x0200 75 #define ATA_SUPPORT_IORDYDIS 0x0400 76 #define ATA_SUPPORT_IORDY 0x0800 77 #define ATA_SUPPORT_OVERLAP 0x4000 78 79 /*050*/ u_int16_t capabilities2; 80 /*051*/ u_int16_t retired_piomode; /* PIO modes 0-2 */ 81 #define ATA_RETIRED_PIO_MASK 0x0300 82 83 /*052*/ u_int16_t retired_dmamode; /* DMA modes */ 84 #define ATA_RETIRED_DMA_MASK 0x0003 85 86 /*053*/ u_int16_t atavalid; /* fields valid */ 87 #define ATA_FLAG_54_58 0x0001 /* words 54-58 valid */ 88 #define ATA_FLAG_64_70 0x0002 /* words 64-70 valid */ 89 #define ATA_FLAG_88 0x0004 /* word 88 valid */ 90 91 /*054*/ u_int16_t current_cylinders; 92 /*055*/ u_int16_t current_heads; 93 /*056*/ u_int16_t current_sectors; 94 /*057*/ u_int16_t current_size_1; 95 /*058*/ u_int16_t current_size_2; 96 /*059*/ u_int16_t multi; 97 #define ATA_SUPPORT_BLOCK_ERASE_EXT 0x8000 98 #define ATA_SUPPORT_OVERWRITE_EXT 0x4000 99 #define ATA_SUPPORT_CRYPTO_SCRAMBLE_EXT 0x2000 100 #define ATA_SUPPORT_SANITIZE 0x1000 101 #define ATA_SUPPORT_SANITIZE_ALLOWED 0x0800 102 #define ATA_SUPPORT_ANTIFREEZE_LOCK_EXT 0x0400 103 #define ATA_MULTI_VALID 0x0100 104 105 /*060*/ u_int16_t lba_size_1; 106 u_int16_t lba_size_2; 107 u_int16_t obsolete62; 108 /*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */ 109 /*064*/ u_int16_t apiomodes; /* advanced PIO modes */ 110 111 /*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */ 112 /*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */ 113 /*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */ 114 /*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */ 115 /*069*/ u_int16_t support3; 116 #define ATA_SUPPORT_RZAT 0x0020 117 #define ATA_SUPPORT_DRAT 0x4000 118 #define ATA_ENCRYPTS_ALL_USER_DATA 0x0010 /* Self-encrypting drive */ 119 #define ATA_SUPPORT_ZONE_MASK 0x0003 120 #define ATA_SUPPORT_ZONE_NR 0x0000 121 #define ATA_SUPPORT_ZONE_HOST_AWARE 0x0001 122 #define ATA_SUPPORT_ZONE_DEV_MANAGED 0x0002 123 u_int16_t reserved70; 124 /*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */ 125 /*072*/ u_int16_t rlsservice; /* rel time (us) for service */ 126 u_int16_t reserved73; 127 u_int16_t reserved74; 128 /*075*/ u_int16_t queue; 129 #define ATA_QUEUE_LEN(x) ((x) & 0x001f) 130 131 /*76*/ u_int16_t satacapabilities; 132 #define ATA_SATA_GEN1 0x0002 133 #define ATA_SATA_GEN2 0x0004 134 #define ATA_SATA_GEN3 0x0008 135 #define ATA_SUPPORT_NCQ 0x0100 136 #define ATA_SUPPORT_IFPWRMNGTRCV 0x0200 137 #define ATA_SUPPORT_PHYEVENTCNT 0x0400 138 #define ATA_SUPPORT_NCQ_UNLOAD 0x0800 139 #define ATA_SUPPORT_NCQ_PRIO 0x1000 140 #define ATA_SUPPORT_HAPST 0x2000 141 #define ATA_SUPPORT_DAPST 0x4000 142 #define ATA_SUPPORT_READLOGDMAEXT 0x8000 143 144 /*77*/ u_int16_t satacapabilities2; 145 #define ATA_SATA_CURR_GEN_MASK 0x0006 146 #define ATA_SUPPORT_NCQ_STREAM 0x0010 147 #define ATA_SUPPORT_NCQ_NON_DATA 0x0020 148 #define ATA_SUPPORT_NCQ_QMANAGEMENT ATA_SUPPORT_NCQ_NON_DATA 149 #define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040 150 /*78*/ u_int16_t satasupport; 151 #define ATA_SUPPORT_NONZERO 0x0002 152 #define ATA_SUPPORT_AUTOACTIVATE 0x0004 153 #define ATA_SUPPORT_IFPWRMNGT 0x0008 154 #define ATA_SUPPORT_INORDERDATA 0x0010 155 #define ATA_SUPPORT_ASYNCNOTIF 0x0020 156 #define ATA_SUPPORT_SOFTSETPRESERVE 0x0040 157 #define ATA_SUPPORT_NCQ_AUTOSENSE 0x0080 158 /*79*/ u_int16_t sataenabled; 159 #define ATA_ENABLED_DAPST 0x0080 160 161 /*080*/ u_int16_t version_major; 162 /*081*/ u_int16_t version_minor; 163 164 struct { 165 /*082/085*/ u_int16_t command1; 166 #define ATA_SUPPORT_SMART 0x0001 167 #define ATA_SUPPORT_SECURITY 0x0002 168 #define ATA_SUPPORT_REMOVABLE 0x0004 169 #define ATA_SUPPORT_POWERMGT 0x0008 170 #define ATA_SUPPORT_PACKET 0x0010 171 #define ATA_SUPPORT_WRITECACHE 0x0020 172 #define ATA_SUPPORT_LOOKAHEAD 0x0040 173 #define ATA_SUPPORT_RELEASEIRQ 0x0080 174 #define ATA_SUPPORT_SERVICEIRQ 0x0100 175 #define ATA_SUPPORT_RESET 0x0200 176 #define ATA_SUPPORT_PROTECTED 0x0400 177 #define ATA_SUPPORT_WRITEBUFFER 0x1000 178 #define ATA_SUPPORT_READBUFFER 0x2000 179 #define ATA_SUPPORT_NOP 0x4000 180 181 /*083/086*/ u_int16_t command2; 182 #define ATA_SUPPORT_MICROCODE 0x0001 183 #define ATA_SUPPORT_QUEUED 0x0002 184 #define ATA_SUPPORT_CFA 0x0004 185 #define ATA_SUPPORT_APM 0x0008 186 #define ATA_SUPPORT_NOTIFY 0x0010 187 #define ATA_SUPPORT_STANDBY 0x0020 188 #define ATA_SUPPORT_SPINUP 0x0040 189 #define ATA_SUPPORT_MAXSECURITY 0x0100 190 #define ATA_SUPPORT_AUTOACOUSTIC 0x0200 191 #define ATA_SUPPORT_ADDRESS48 0x0400 192 #define ATA_SUPPORT_OVERLAY 0x0800 193 #define ATA_SUPPORT_FLUSHCACHE 0x1000 194 #define ATA_SUPPORT_FLUSHCACHE48 0x2000 195 196 /*084/087*/ u_int16_t extension; 197 #define ATA_SUPPORT_SMARTLOG 0x0001 198 #define ATA_SUPPORT_SMARTTEST 0x0002 199 #define ATA_SUPPORT_MEDIASN 0x0004 200 #define ATA_SUPPORT_MEDIAPASS 0x0008 201 #define ATA_SUPPORT_STREAMING 0x0010 202 #define ATA_SUPPORT_GENLOG 0x0020 203 #define ATA_SUPPORT_WRITEDMAFUAEXT 0x0040 204 #define ATA_SUPPORT_WRITEDMAQFUAEXT 0x0080 205 #define ATA_SUPPORT_64BITWWN 0x0100 206 #define ATA_SUPPORT_UNLOAD 0x2000 207 } __packed support, enabled; 208 209 /*088*/ u_int16_t udmamodes; /* UltraDMA modes */ 210 /*089*/ u_int16_t erase_time; /* time req'd in 2min units */ 211 /*090*/ u_int16_t enhanced_erase_time; /* time req'd in 2min units */ 212 /*091*/ u_int16_t apm_value; 213 /*092*/ u_int16_t master_passwd_revision; /* password revision code */ 214 /*093*/ u_int16_t hwres; 215 #define ATA_CABLE_ID 0x2000 216 217 /*094*/ u_int16_t acoustic; 218 #define ATA_ACOUSTIC_CURRENT(x) ((x) & 0x00ff) 219 #define ATA_ACOUSTIC_VENDOR(x) (((x) & 0xff00) >> 8) 220 221 /*095*/ u_int16_t stream_min_req_size; 222 /*096*/ u_int16_t stream_transfer_time; 223 /*097*/ u_int16_t stream_access_latency; 224 /*098*/ u_int32_t stream_granularity; 225 /*100*/ u_int16_t lba_size48_1; 226 u_int16_t lba_size48_2; 227 u_int16_t lba_size48_3; 228 u_int16_t lba_size48_4; 229 u_int16_t reserved104; 230 /*105*/ u_int16_t max_dsm_blocks; 231 /*106*/ u_int16_t pss; 232 #define ATA_PSS_LSPPS 0x000F 233 #define ATA_PSS_LSSABOVE512 0x1000 234 #define ATA_PSS_MULTLS 0x2000 235 #define ATA_PSS_VALID_MASK 0xC000 236 #define ATA_PSS_VALID_VALUE 0x4000 237 /*107*/ u_int16_t isd; 238 /*108*/ u_int16_t wwn[4]; 239 u_int16_t reserved112[5]; 240 /*117*/ u_int16_t lss_1; 241 /*118*/ u_int16_t lss_2; 242 /*119*/ u_int16_t support2; 243 #define ATA_SUPPORT_WRITEREADVERIFY 0x0002 244 #define ATA_SUPPORT_WRITEUNCORREXT 0x0004 245 #define ATA_SUPPORT_RWLOGDMAEXT 0x0008 246 #define ATA_SUPPORT_MICROCODE3 0x0010 247 #define ATA_SUPPORT_FREEFALL 0x0020 248 #define ATA_SUPPORT_SENSE_REPORT 0x0040 249 #define ATA_SUPPORT_EPC 0x0080 250 #define ATA_SUPPORT_AMAX_ADDR 0x0100 251 #define ATA_SUPPORT_DSN 0x0200 252 /*120*/ u_int16_t enabled2; 253 #define ATA_ENABLED_WRITEREADVERIFY 0x0002 254 #define ATA_ENABLED_WRITEUNCORREXT 0x0004 255 #define ATA_ENABLED_FREEFALL 0x0020 256 #define ATA_ENABLED_SENSE_REPORT 0x0040 257 #define ATA_ENABLED_EPC 0x0080 258 #define ATA_ENABLED_DSN 0x0200 259 u_int16_t reserved121[6]; 260 /*127*/ u_int16_t removable_status; 261 /*128*/ u_int16_t security_status; 262 #define ATA_SECURITY_LEVEL 0x0100 /* 0: high, 1: maximum */ 263 #define ATA_SECURITY_ENH_SUPP 0x0020 /* enhanced erase supported */ 264 #define ATA_SECURITY_COUNT_EXP 0x0010 /* count expired */ 265 #define ATA_SECURITY_FROZEN 0x0008 /* security config is frozen */ 266 #define ATA_SECURITY_LOCKED 0x0004 /* drive is locked */ 267 #define ATA_SECURITY_ENABLED 0x0002 /* ATA Security is enabled */ 268 #define ATA_SECURITY_SUPPORTED 0x0001 /* ATA Security is supported */ 269 270 u_int16_t reserved129[31]; 271 /*160*/ u_int16_t cfa_powermode1; 272 u_int16_t reserved161; 273 /*162*/ u_int16_t cfa_kms_support; 274 /*163*/ u_int16_t cfa_trueide_modes; 275 /*164*/ u_int16_t cfa_memory_modes; 276 u_int16_t reserved165[3]; 277 /*168*/ u_int16_t form_factor; 278 #define ATA_FORM_FACTOR_MASK 0x000f 279 #define ATA_FORM_FACTOR_NOT_REPORTED 0x0000 280 #define ATA_FORM_FACTOR_5_25 0x0001 281 #define ATA_FORM_FACTOR_3_5 0x0002 282 #define ATA_FORM_FACTOR_2_5 0x0003 283 #define ATA_FORM_FACTOR_1_8 0x0004 284 #define ATA_FORM_FACTOR_SUB_1_8 0x0005 285 #define ATA_FORM_FACTOR_MSATA 0x0006 286 #define ATA_FORM_FACTOR_M_2 0x0007 287 #define ATA_FORM_FACTOR_MICRO_SSD 0x0008 288 #define ATA_FORM_FACTOR_C_FAST 0x0009 289 /*169*/ u_int16_t support_dsm; 290 #define ATA_SUPPORT_DSM_TRIM 0x0001 291 /*170*/ u_int8_t product_id[8]; /* Additional Product Identifier */ 292 u_int16_t reserved174[2]; 293 /*176*/ u_int8_t media_serial[60]; 294 /*206*/ u_int16_t sct; 295 u_int16_t reserved207[2]; 296 /*209*/ u_int16_t lsalign; 297 /*210*/ u_int16_t wrv_sectors_m3_1; 298 u_int16_t wrv_sectors_m3_2; 299 /*212*/ u_int16_t wrv_sectors_m2_1; 300 u_int16_t wrv_sectors_m2_2; 301 /*214*/ u_int16_t nv_cache_caps; 302 /*215*/ u_int16_t nv_cache_size_1; 303 u_int16_t nv_cache_size_2; 304 /*217*/ u_int16_t media_rotation_rate; 305 #define ATA_RATE_NOT_REPORTED 0x0000 306 #define ATA_RATE_NON_ROTATING 0x0001 307 u_int16_t reserved218; 308 /*219*/ u_int16_t nv_cache_opt; 309 /*220*/ u_int16_t wrv_mode; 310 u_int16_t reserved221; 311 /*222*/ u_int16_t transport_major; 312 /*223*/ u_int16_t transport_minor; 313 u_int16_t reserved224[31]; 314 /*255*/ u_int16_t integrity; 315 } __packed __aligned(2); 316 317 /* ATA Dataset Management */ 318 #define ATA_DSM_BLK_SIZE 512 319 #define ATA_DSM_BLK_RANGES 64 320 #define ATA_DSM_RANGE_SIZE 8 321 #define ATA_DSM_RANGE_MAX 65535 322 323 /* 324 * ATA Device Register 325 * 326 * bit 7 Obsolete (was 1 in early ATA specs) 327 * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS 328 * bit 5 Obsolete (was 1 in early ATA specs) 329 * bit 4 1 = Slave Drive, 0 = Master Drive 330 * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number 331 */ 332 333 #define ATA_DEV_MASTER 0x00 334 #define ATA_DEV_SLAVE 0x10 335 #define ATA_DEV_LBA 0x40 336 337 /* ATA limits */ 338 #define ATA_MAX_28BIT_LBA 268435455UL 339 340 /* ATA Status Register */ 341 #define ATA_STATUS_ERROR 0x01 342 #define ATA_STATUS_SENSE_AVAIL 0x02 343 #define ATA_STATUS_ALIGN_ERR 0x04 344 #define ATA_STATUS_DATA_REQ 0x08 345 #define ATA_STATUS_DEF_WRITE_ERR 0x10 346 #define ATA_STATUS_DEVICE_FAULT 0x20 347 #define ATA_STATUS_DEVICE_READY 0x40 348 #define ATA_STATUS_BUSY 0x80 349 350 /* ATA Error Register */ 351 #define ATA_ERROR_ABORT 0x04 352 #define ATA_ERROR_ID_NOT_FOUND 0x10 353 354 /* ATA HPA Features */ 355 #define ATA_HPA_FEAT_MAX_ADDR 0x00 356 #define ATA_HPA_FEAT_SET_PWD 0x01 357 #define ATA_HPA_FEAT_LOCK 0x02 358 #define ATA_HPA_FEAT_UNLOCK 0x03 359 #define ATA_HPA_FEAT_FREEZE 0x04 360 361 /* ATA transfer modes */ 362 #define ATA_MODE_MASK 0x0f 363 #define ATA_DMA_MASK 0xf0 364 #define ATA_PIO 0x00 365 #define ATA_PIO0 0x08 366 #define ATA_PIO1 0x09 367 #define ATA_PIO2 0x0a 368 #define ATA_PIO3 0x0b 369 #define ATA_PIO4 0x0c 370 #define ATA_PIO_MAX 0x0f 371 #define ATA_DMA 0x10 372 #define ATA_WDMA0 0x20 373 #define ATA_WDMA1 0x21 374 #define ATA_WDMA2 0x22 375 #define ATA_UDMA0 0x40 376 #define ATA_UDMA1 0x41 377 #define ATA_UDMA2 0x42 378 #define ATA_UDMA3 0x43 379 #define ATA_UDMA4 0x44 380 #define ATA_UDMA5 0x45 381 #define ATA_UDMA6 0x46 382 #define ATA_SA150 0x47 383 #define ATA_SA300 0x48 384 #define ATA_SA600 0x49 385 #define ATA_DMA_MAX 0x4f 386 387 /* ATA commands */ 388 #define ATA_NOP 0x00 /* NOP */ 389 #define ATA_NF_FLUSHQUEUE 0x00 /* flush queued cmd's */ 390 #define ATA_NF_AUTOPOLL 0x01 /* start autopoll function */ 391 #define ATA_DATA_SET_MANAGEMENT 0x06 392 #define ATA_DSM_TRIM 0x01 393 #define ATA_DEVICE_RESET 0x08 /* reset device */ 394 #define ATA_READ 0x20 /* read */ 395 #define ATA_READ48 0x24 /* read 48bit LBA */ 396 #define ATA_READ_DMA48 0x25 /* read DMA 48bit LBA */ 397 #define ATA_READ_DMA_QUEUED48 0x26 /* read DMA QUEUED 48bit LBA */ 398 #define ATA_READ_NATIVE_MAX_ADDRESS48 0x27 /* read native max addr 48bit */ 399 #define ATA_READ_MUL48 0x29 /* read multi 48bit LBA */ 400 #define ATA_READ_STREAM_DMA48 0x2a /* read DMA stream 48bit LBA */ 401 #define ATA_READ_LOG_EXT 0x2f /* read log ext - PIO Data-In */ 402 #define ATA_READ_STREAM48 0x2b /* read stream 48bit LBA */ 403 #define ATA_WRITE 0x30 /* write */ 404 #define ATA_WRITE48 0x34 /* write 48bit LBA */ 405 #define ATA_WRITE_DMA48 0x35 /* write DMA 48bit LBA */ 406 #define ATA_WRITE_DMA_QUEUED48 0x36 /* write DMA QUEUED 48bit LBA*/ 407 #define ATA_SET_MAX_ADDRESS48 0x37 /* set max address 48bit */ 408 #define ATA_WRITE_MUL48 0x39 /* write multi 48bit LBA */ 409 #define ATA_WRITE_STREAM_DMA48 0x3a 410 #define ATA_WRITE_STREAM48 0x3b 411 #define ATA_WRITE_DMA_FUA48 0x3d 412 #define ATA_WRITE_DMA_QUEUED_FUA48 0x3e 413 #define ATA_WRITE_LOG_EXT 0x3f 414 #define ATA_READ_VERIFY 0x40 415 #define ATA_READ_VERIFY48 0x42 416 #define ATA_WRITE_UNCORRECTABLE48 0x45 /* write uncorrectable 48bit LBA */ 417 #define ATA_WU_PSEUDO 0x55 /* pseudo-uncorrectable error */ 418 #define ATA_WU_FLAGGED 0xaa /* flagged-uncorrectable error */ 419 #define ATA_READ_LOG_DMA_EXT 0x47 /* read log DMA ext - PIO Data-In */ 420 #define ATA_ZAC_MANAGEMENT_IN 0x4a /* ZAC management in */ 421 #define ATA_ZM_REPORT_ZONES 0x00 /* report zones */ 422 #define ATA_WRITE_LOG_DMA_EXT 0x57 /* WRITE LOG DMA EXT */ 423 #define ATA_TRUSTED_NON_DATA 0x5b /* TRUSTED NON-DATA */ 424 #define ATA_TRUSTED_RECEIVE 0x5c /* TRUSTED RECEIVE */ 425 #define ATA_TRUSTED_RECEIVE_DMA 0x5d /* TRUSTED RECEIVE DMA */ 426 #define ATA_TRUSTED_SEND 0x5e /* TRUSTED SEND */ 427 #define ATA_TRUSTED_SEND_DMA 0x5f /* TRUSTED SEND DMA */ 428 #define ATA_READ_FPDMA_QUEUED 0x60 /* read DMA NCQ */ 429 #define ATA_WRITE_FPDMA_QUEUED 0x61 /* write DMA NCQ */ 430 #define ATA_NCQ_NON_DATA 0x63 /* NCQ non-data command */ 431 #define ATA_ABORT_NCQ_QUEUE 0x00 /* abort NCQ queue */ 432 #define ATA_DEADLINE_HANDLING 0x01 /* deadline handling */ 433 #define ATA_SET_FEATURES 0x05 /* set features */ 434 #define ATA_ZERO_EXT 0x06 /* zero ext */ 435 #define ATA_NCQ_ZAC_MGMT_OUT 0x07 /* NCQ ZAC mgmt out no data */ 436 #define ATA_SEND_FPDMA_QUEUED 0x64 /* send DMA NCQ */ 437 #define ATA_SFPDMA_DSM 0x00 /* Data set management */ 438 #define ATA_SFPDMA_DSM_TRIM 0x01 /* Set trim bit in auxiliary */ 439 #define ATA_SFPDMA_HYBRID_EVICT 0x01 /* Hybrid Evict */ 440 #define ATA_SFPDMA_WLDMA 0x02 /* Write Log DMA EXT */ 441 #define ATA_SFPDMA_ZAC_MGMT_OUT 0x03 /* NCQ ZAC mgmt out w/data */ 442 #define ATA_RECV_FPDMA_QUEUED 0x65 /* receive DMA NCQ */ 443 #define ATA_RFPDMA_RL_DMA_EXT 0x00 /* Read Log DMA EXT */ 444 #define ATA_RFPDMA_ZAC_MGMT_IN 0x02 /* NCQ ZAC mgmt in w/data */ 445 #define ATA_SEP_ATTN 0x67 /* SEP request */ 446 #define ATA_SEEK 0x70 /* seek */ 447 #define ATA_AMAX_ADDR 0x78 /* Accessible Max Address */ 448 #define ATA_AMAX_ADDR_GET 0x00 /* GET NATIVE MAX ADDRESS EXT */ 449 #define ATA_AMAX_ADDR_SET 0x01 /* SET ACCESSIBLE MAX ADDRESS EXT */ 450 #define ATA_AMAX_ADDR_FREEZE 0x02 /* FREEZE ACCESSIBLE MAX ADDRESS EXT */ 451 #define ATA_ZAC_MANAGEMENT_OUT 0x9f /* ZAC management out */ 452 #define ATA_ZM_CLOSE_ZONE 0x01 /* close zone */ 453 #define ATA_ZM_FINISH_ZONE 0x02 /* finish zone */ 454 #define ATA_ZM_OPEN_ZONE 0x03 /* open zone */ 455 #define ATA_ZM_RWP 0x04 /* reset write pointer */ 456 #define ATA_DOWNLOAD_MICROCODE 0x92 /* DOWNLOAD MICROCODE */ 457 #define ATA_DOWNLOAD_MICROCODE_DMA 0x93 /* DOWNLOAD MICROCODE DMA */ 458 #define ATA_PACKET_CMD 0xa0 /* packet command */ 459 #define ATA_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/ 460 #define ATA_SERVICE 0xa2 /* service command */ 461 #define ATA_SMART_CMD 0xb0 /* SMART command */ 462 #define ATA_SANITIZE 0xb4 /* sanitize device */ 463 #define ATA_CFA_ERASE 0xc0 /* CFA erase */ 464 #define ATA_READ_MUL 0xc4 /* read multi */ 465 #define ATA_WRITE_MUL 0xc5 /* write multi */ 466 #define ATA_SET_MULTI 0xc6 /* set multi size */ 467 #define ATA_READ_DMA_QUEUED 0xc7 /* read DMA QUEUED */ 468 #define ATA_READ_DMA 0xc8 /* read DMA */ 469 #define ATA_WRITE_DMA 0xca /* write DMA */ 470 #define ATA_WRITE_DMA_QUEUED 0xcc /* write DMA QUEUED */ 471 #define ATA_WRITE_MUL_FUA48 0xce 472 #define ATA_STANDBY_IMMEDIATE 0xe0 /* standby immediate */ 473 #define ATA_IDLE_IMMEDIATE 0xe1 /* idle immediate */ 474 #define ATA_STANDBY_CMD 0xe2 /* standby */ 475 #define ATA_IDLE_CMD 0xe3 /* idle */ 476 #define ATA_READ_BUFFER 0xe4 /* read buffer */ 477 #define ATA_READ_PM 0xe4 /* read portmultiplier */ 478 #define ATA_CHECK_POWER_MODE 0xe5 /* device power mode */ 479 #define ATA_SLEEP 0xe6 /* sleep */ 480 #define ATA_FLUSHCACHE 0xe7 /* flush cache to disk */ 481 #define ATA_WRITE_BUFFER 0xe8 /* write buffer */ 482 #define ATA_WRITE_PM 0xe8 /* write portmultiplier */ 483 #define ATA_READ_BUFFER_DMA 0xe9 /* read buffer DMA */ 484 #define ATA_FLUSHCACHE48 0xea /* flush cache to disk */ 485 #define ATA_WRITE_BUFFER_DMA 0xeb /* write buffer DMA */ 486 #define ATA_ATA_IDENTIFY 0xec /* get ATA params */ 487 #define ATA_SETFEATURES 0xef /* features command */ 488 #define ATA_SF_ENAB_WCACHE 0x02 /* enable write cache */ 489 #define ATA_SF_DIS_WCACHE 0x82 /* disable write cache */ 490 #define ATA_SF_SETXFER 0x03 /* set transfer mode */ 491 #define ATA_SF_APM 0x05 /* Enable APM feature set */ 492 #define ATA_SF_ENAB_PUIS 0x06 /* enable PUIS */ 493 #define ATA_SF_DIS_PUIS 0x86 /* disable PUIS */ 494 #define ATA_SF_PUIS_SPINUP 0x07 /* PUIS spin-up */ 495 #define ATA_SF_WRV 0x0b /* Enable Write-Read-Verify */ 496 #define ATA_SF_DLC 0x0c /* Enable device life control */ 497 #define ATA_SF_SATA 0x10 /* Enable use of SATA feature */ 498 #define ATA_SF_FFC 0x41 /* Free-fall Control */ 499 #define ATA_SF_MHIST 0x43 /* Set Max Host Sect. Times */ 500 #define ATA_SF_RATE 0x45 /* Set Rate Basis */ 501 #define ATA_SF_EPC 0x4A /* Extended Power Conditions */ 502 #define ATA_SF_ENAB_RCACHE 0xaa /* enable readahead cache */ 503 #define ATA_SF_DIS_RCACHE 0x55 /* disable readahead cache */ 504 #define ATA_SF_ENAB_RELIRQ 0x5d /* enable release interrupt */ 505 #define ATA_SF_DIS_RELIRQ 0xdd /* disable release interrupt */ 506 #define ATA_SF_ENAB_SRVIRQ 0x5e /* enable service interrupt */ 507 #define ATA_SF_DIS_SRVIRQ 0xde /* disable service interrupt */ 508 #define ATA_SF_LPSAERC 0x62 /* Long Phys Sect Align ErrRep*/ 509 #define ATA_SF_DSN 0x63 /* Device Stats Notification */ 510 #define ATA_SECURITY_SET_PASSWORD 0xf1 /* set drive password */ 511 #define ATA_SECURITY_UNLOCK 0xf2 /* unlock drive using passwd */ 512 #define ATA_SECURITY_ERASE_PREPARE 0xf3 /* prepare to erase drive */ 513 #define ATA_SECURITY_ERASE_UNIT 0xf4 /* erase all blocks on drive */ 514 #define ATA_SECURITY_FREEZE_LOCK 0xf5 /* freeze security config */ 515 #define ATA_SECURITY_DISABLE_PASSWORD 0xf6 /* disable drive password */ 516 #define ATA_READ_NATIVE_MAX_ADDRESS 0xf8 /* read native max address */ 517 #define ATA_SET_MAX_ADDRESS 0xf9 /* set max address */ 518 519 /* ATAPI commands */ 520 #define ATAPI_TEST_UNIT_READY 0x00 /* check if device is ready */ 521 #define ATAPI_REZERO 0x01 /* rewind */ 522 #define ATAPI_REQUEST_SENSE 0x03 /* get sense data */ 523 #define ATAPI_FORMAT 0x04 /* format unit */ 524 #define ATAPI_READ 0x08 /* read data */ 525 #define ATAPI_WRITE 0x0a /* write data */ 526 #define ATAPI_WEOF 0x10 /* write filemark */ 527 #define ATAPI_WF_WRITE 0x01 528 #define ATAPI_SPACE 0x11 /* space command */ 529 #define ATAPI_SP_FM 0x01 530 #define ATAPI_SP_EOD 0x03 531 #define ATAPI_INQUIRY 0x12 /* get inquiry data */ 532 #define ATAPI_MODE_SELECT 0x15 /* mode select */ 533 #define ATAPI_ERASE 0x19 /* erase */ 534 #define ATAPI_MODE_SENSE 0x1a /* mode sense */ 535 #define ATAPI_START_STOP 0x1b /* start/stop unit */ 536 #define ATAPI_SS_LOAD 0x01 537 #define ATAPI_SS_RETENSION 0x02 538 #define ATAPI_SS_EJECT 0x04 539 #define ATAPI_PREVENT_ALLOW 0x1e /* media removal */ 540 #define ATAPI_READ_FORMAT_CAPACITIES 0x23 /* get format capacities */ 541 #define ATAPI_READ_CAPACITY 0x25 /* get volume capacity */ 542 #define ATAPI_READ_BIG 0x28 /* read data */ 543 #define ATAPI_WRITE_BIG 0x2a /* write data */ 544 #define ATAPI_LOCATE 0x2b /* locate to position */ 545 #define ATAPI_READ_POSITION 0x34 /* read position */ 546 #define ATAPI_SYNCHRONIZE_CACHE 0x35 /* flush buf, close channel */ 547 #define ATAPI_WRITE_BUFFER 0x3b /* write device buffer */ 548 #define ATAPI_READ_BUFFER 0x3c /* read device buffer */ 549 #define ATAPI_READ_SUBCHANNEL 0x42 /* get subchannel info */ 550 #define ATAPI_READ_TOC 0x43 /* get table of contents */ 551 #define ATAPI_PLAY_10 0x45 /* play by lba */ 552 #define ATAPI_PLAY_MSF 0x47 /* play by MSF address */ 553 #define ATAPI_PLAY_TRACK 0x48 /* play by track number */ 554 #define ATAPI_PAUSE 0x4b /* pause audio operation */ 555 #define ATAPI_READ_DISK_INFO 0x51 /* get disk info structure */ 556 #define ATAPI_READ_TRACK_INFO 0x52 /* get track info structure */ 557 #define ATAPI_RESERVE_TRACK 0x53 /* reserve track */ 558 #define ATAPI_SEND_OPC_INFO 0x54 /* send OPC structurek */ 559 #define ATAPI_MODE_SELECT_BIG 0x55 /* set device parameters */ 560 #define ATAPI_REPAIR_TRACK 0x58 /* repair track */ 561 #define ATAPI_READ_MASTER_CUE 0x59 /* read master CUE info */ 562 #define ATAPI_MODE_SENSE_BIG 0x5a /* get device parameters */ 563 #define ATAPI_CLOSE_TRACK 0x5b /* close track/session */ 564 #define ATAPI_READ_BUFFER_CAPACITY 0x5c /* get buffer capicity */ 565 #define ATAPI_SEND_CUE_SHEET 0x5d /* send CUE sheet */ 566 #define ATAPI_SERVICE_ACTION_IN 0x96 /* get service data */ 567 #define ATAPI_BLANK 0xa1 /* blank the media */ 568 #define ATAPI_SEND_KEY 0xa3 /* send DVD key structure */ 569 #define ATAPI_REPORT_KEY 0xa4 /* get DVD key structure */ 570 #define ATAPI_PLAY_12 0xa5 /* play by lba */ 571 #define ATAPI_LOAD_UNLOAD 0xa6 /* changer control command */ 572 #define ATAPI_READ_STRUCTURE 0xad /* get DVD structure */ 573 #define ATAPI_PLAY_CD 0xb4 /* universal play command */ 574 #define ATAPI_SET_SPEED 0xbb /* set drive speed */ 575 #define ATAPI_MECH_STATUS 0xbd /* get changer status */ 576 #define ATAPI_READ_CD 0xbe /* read data */ 577 #define ATAPI_POLL_DSC 0xff /* poll DSC status bit */ 578 579 struct ata_ioc_devices { 580 int channel; 581 char name[2][32]; 582 struct ata_params params[2]; 583 }; 584 585 /* pr channel ATA ioctl calls */ 586 #define IOCATAGMAXCHANNEL _IOR('a', 1, int) 587 #define IOCATAREINIT _IOW('a', 2, int) 588 #define IOCATAATTACH _IOW('a', 3, int) 589 #define IOCATADETACH _IOW('a', 4, int) 590 #define IOCATADEVICES _IOWR('a', 5, struct ata_ioc_devices) 591 592 /* ATAPI request sense structure */ 593 struct atapi_sense { 594 u_int8_t error; /* current or deferred errors */ 595 #define ATA_SENSE_VALID 0x80 596 597 u_int8_t segment; /* segment number */ 598 u_int8_t key; /* sense key */ 599 #define ATA_SENSE_KEY_MASK 0x0f /* sense key mask */ 600 #define ATA_SENSE_NO_SENSE 0x00 /* no specific sense key info */ 601 #define ATA_SENSE_RECOVERED_ERROR 0x01 /* command OK, data recovered */ 602 #define ATA_SENSE_NOT_READY 0x02 /* no access to drive */ 603 #define ATA_SENSE_MEDIUM_ERROR 0x03 /* non-recovered data error */ 604 #define ATA_SENSE_HARDWARE_ERROR 0x04 /* non-recoverable HW failure */ 605 #define ATA_SENSE_ILLEGAL_REQUEST 0x05 /* invalid command param(s) */ 606 #define ATA_SENSE_UNIT_ATTENTION 0x06 /* media changed */ 607 #define ATA_SENSE_DATA_PROTECT 0x07 /* write protect */ 608 #define ATA_SENSE_BLANK_CHECK 0x08 /* blank check */ 609 #define ATA_SENSE_VENDOR_SPECIFIC 0x09 /* vendor specific skey */ 610 #define ATA_SENSE_COPY_ABORTED 0x0a /* copy aborted */ 611 #define ATA_SENSE_ABORTED_COMMAND 0x0b /* command aborted, try again */ 612 #define ATA_SENSE_EQUAL 0x0c /* equal */ 613 #define ATA_SENSE_VOLUME_OVERFLOW 0x0d /* volume overflow */ 614 #define ATA_SENSE_MISCOMPARE 0x0e /* data dont match the medium */ 615 #define ATA_SENSE_RESERVED 0x0f 616 #define ATA_SENSE_ILI 0x20; 617 #define ATA_SENSE_EOM 0x40; 618 #define ATA_SENSE_FILEMARK 0x80; 619 620 u_int32_t cmd_info; /* cmd information */ 621 u_int8_t sense_length; /* additional sense len (n-7) */ 622 u_int32_t cmd_specific_info; /* additional cmd spec info */ 623 u_int8_t asc; /* additional sense code */ 624 u_int8_t ascq; /* additional sense code qual */ 625 u_int8_t replaceable_unit_code; /* replaceable unit code */ 626 u_int8_t specific; /* sense key specific */ 627 #define ATA_SENSE_SPEC_VALID 0x80 628 #define ATA_SENSE_SPEC_MASK 0x7f 629 630 u_int8_t specific1; /* sense key specific */ 631 u_int8_t specific2; /* sense key specific */ 632 } __packed; 633 634 /* 635 * SET FEATURES subcommands 636 */ 637 638 /* 639 * SET FEATURES command 640 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 641 * These values go in the LBA 3:0. 642 */ 643 #define ATA_SF_EPC_RESTORE 0x00 /* Restore Power Condition Settings */ 644 #define ATA_SF_EPC_GOTO 0x01 /* Go To Power Condition */ 645 #define ATA_SF_EPC_SET_TIMER 0x02 /* Set Power Condition Timer */ 646 #define ATA_SF_EPC_SET_STATE 0x03 /* Set Power Condition State */ 647 #define ATA_SF_EPC_ENABLE 0x04 /* Enable the EPC feature set */ 648 #define ATA_SF_EPC_DISABLE 0x05 /* Disable the EPC feature set */ 649 #define ATA_SF_EPC_SET_SOURCE 0x06 /* Set EPC Power Source */ 650 651 /* 652 * SET FEATURES command 653 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 654 * Power Condition ID field 655 * These values go in the count register. 656 */ 657 #define ATA_EPC_STANDBY_Z 0x00 /* Substate of PM2:Standby */ 658 #define ATA_EPC_STANDBY_Y 0x01 /* Substate of PM2:Standby */ 659 #define ATA_EPC_IDLE_A 0x81 /* Substate of PM1:Idle */ 660 #define ATA_EPC_IDLE_B 0x82 /* Substate of PM1:Idle */ 661 #define ATA_EPC_IDLE_C 0x83 /* Substate of PM1:Idle */ 662 #define ATA_EPC_ALL 0xff /* All supported power conditions */ 663 664 /* 665 * SET FEATURES command 666 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 667 * Restore Power Conditions Settings subcommand 668 * These values go in the LBA register. 669 */ 670 #define ATA_SF_EPC_RST_DFLT 0x40 /* 1=Rst from Default, 0= from Saved */ 671 #define ATA_SF_EPC_RST_SAVE 0x10 /* 1=Save on completion */ 672 673 /* 674 * SET FEATURES command 675 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 676 * Got To Power Condition subcommand 677 * These values go in the LBA register. 678 */ 679 #define ATA_SF_EPC_GOTO_DELAY 0x02000000 /* Delayed entry bit */ 680 #define ATA_SF_EPC_GOTO_HOLD 0x01000000 /* Hold Power Cond bit */ 681 682 /* 683 * SET FEATURES command 684 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 685 * Set Power Condition Timer subcommand 686 * These values go in the LBA register. 687 */ 688 #define ATA_SF_EPC_TIMER_MASK 0x00ffff00 /* Timer field */ 689 #define ATA_SF_EPC_TIMER_SHIFT 8 690 #define ATA_SF_EPC_TIMER_SEC 0x00000080 /* Timer units, 1=sec, 0=.1s */ 691 #define ATA_SF_EPC_TIMER_EN 0x00000020 /* Enable/disable cond. */ 692 #define ATA_SF_EPC_TIMER_SAVE 0x00000010 /* Save settings on comp. */ 693 694 /* 695 * SET FEATURES command 696 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 697 * Set Power Condition State subcommand 698 * These values go in the LBA register. 699 */ 700 #define ATA_SF_EPC_SETCON_EN 0x00000020 /* Enable power cond. */ 701 #define ATA_SF_EPC_SETCON_SAVE 0x00000010 /* Save settings on comp */ 702 703 /* 704 * SET FEATURES command 705 * Extended Power Conditions subcommand -- ATA_SF_EPC (0x4A) 706 * Set EPC Power Source subcommand 707 * These values go in the count register. 708 */ 709 #define ATA_SF_EPC_SRC_UNKNOWN 0x0000 /* Unknown source */ 710 #define ATA_SF_EPC_SRC_BAT 0x0001 /* battery source */ 711 #define ATA_SF_EPC_SRC_NOT_BAT 0x0002 /* not battery source */ 712 713 #define ATA_LOG_DIRECTORY 0x00 /* Directory of all logs */ 714 #define ATA_POWER_COND_LOG 0x08 /* Power Conditions Log */ 715 #define ATA_PCL_IDLE 0x00 /* Idle Power Conditions Page */ 716 #define ATA_PCL_STANDBY 0x01 /* Standby Power Conditions Page */ 717 #define ATA_IDENTIFY_DATA_LOG 0x30 /* Identify Device Data Log */ 718 #define ATA_IDL_PAGE_LIST 0x00 /* List of supported pages */ 719 #define ATA_IDL_IDENTIFY_DATA 0x01 /* Copy of Identify Device data */ 720 #define ATA_IDL_CAPACITY 0x02 /* Capacity */ 721 #define ATA_IDL_SUP_CAP 0x03 /* Supported Capabilities */ 722 #define ATA_IDL_CUR_SETTINGS 0x04 /* Current Settings */ 723 #define ATA_IDL_ATA_STRINGS 0x05 /* ATA Strings */ 724 #define ATA_IDL_SECURITY 0x06 /* Security */ 725 #define ATA_IDL_PARALLEL_ATA 0x07 /* Parallel ATA */ 726 #define ATA_IDL_SERIAL_ATA 0x08 /* Serial ATA */ 727 #define ATA_IDL_ZDI 0x09 /* Zoned Device Information */ 728 729 struct ata_gp_log_dir { 730 uint8_t header[2]; 731 #define ATA_GP_LOG_DIR_VERSION 0x0001 732 uint8_t num_pages[255*2]; /* Number of log pages at address */ 733 }; 734 735 /* 736 * ATA Power Conditions log descriptor 737 */ 738 struct ata_power_cond_log_desc { 739 uint8_t reserved1; 740 uint8_t flags; 741 #define ATA_PCL_COND_SUPPORTED 0x80 742 #define ATA_PCL_COND_SAVEABLE 0x40 743 #define ATA_PCL_COND_CHANGEABLE 0x20 744 #define ATA_PCL_DEFAULT_TIMER_EN 0x10 745 #define ATA_PCL_SAVED_TIMER_EN 0x08 746 #define ATA_PCL_CURRENT_TIMER_EN 0x04 747 #define ATA_PCL_HOLD_PC_NOT_SUP 0x02 748 uint8_t reserved2[2]; 749 uint8_t default_timer[4]; 750 uint8_t saved_timer[4]; 751 uint8_t current_timer[4]; 752 uint8_t nom_time_to_active[4]; 753 uint8_t min_timer[4]; 754 uint8_t max_timer[4]; 755 uint8_t num_transitions_to_pc[4]; 756 uint8_t hours_in_pc[4]; 757 uint8_t reserved3[28]; 758 }; 759 760 /* 761 * ATA Power Conditions Log (0x08), Idle power conditions page (0x00) 762 */ 763 struct ata_power_cond_log_idle { 764 struct ata_power_cond_log_desc idle_a_desc; 765 struct ata_power_cond_log_desc idle_b_desc; 766 struct ata_power_cond_log_desc idle_c_desc; 767 uint8_t reserved[320]; 768 }; 769 770 /* 771 * ATA Power Conditions Log (0x08), Standby power conditions page (0x01) 772 */ 773 struct ata_power_cond_log_standby { 774 uint8_t reserved[384]; 775 struct ata_power_cond_log_desc standby_y_desc; 776 struct ata_power_cond_log_desc standby_z_desc; 777 }; 778 779 /* 780 * ATA IDENTIFY DEVICE data log (0x30) page 0x00 781 * List of Supported IDENTIFY DEVICE data pages. 782 */ 783 struct ata_identify_log_pages { 784 uint8_t header[8]; 785 #define ATA_IDLOG_REVISION 0x0000000000000001 786 uint8_t entry_count; 787 uint8_t entries[503]; 788 }; 789 790 /* 791 * ATA IDENTIFY DEVICE data log (0x30) 792 * Capacity (Page 0x02). 793 */ 794 struct ata_identify_log_capacity { 795 uint8_t header[8]; 796 #define ATA_CAP_HEADER_VALID 0x8000000000000000 797 #define ATA_CAP_PAGE_NUM_MASK 0x0000000000ff0000 798 #define ATA_CAP_PAGE_NUM_SHIFT 16 799 #define ATA_CAP_REV_MASK 0x00000000000000ff 800 uint8_t capacity[8]; 801 #define ATA_CAP_CAPACITY_VALID 0x8000000000000000 802 #define ATA_CAP_ACCESSIBLE_CAP 0x0000ffffffffffff 803 uint8_t phys_logical_sect_size[8]; 804 #define ATA_CAP_PL_VALID 0x8000000000000000 805 #define ATA_CAP_LTOP_REL_SUP 0x4000000000000000 806 #define ATA_CAP_LOG_SECT_SUP 0x2000000000000000 807 #define ATA_CAP_ALIGN_ERR_MASK 0x0000000000300000 808 #define ATA_CAP_LTOP_MASK 0x00000000000f0000 809 #define ATA_CAP_LOG_SECT_OFF 0x000000000000ffff 810 uint8_t logical_sect_size[8]; 811 #define ATA_CAP_LOG_SECT_VALID 0x8000000000000000 812 #define ATA_CAP_LOG_SECT_SIZE 0x00000000ffffffff 813 uint8_t nominal_buffer_size[8]; 814 #define ATA_CAP_NOM_BUF_VALID 0x8000000000000000 815 #define ATA_CAP_NOM_BUF_SIZE 0x7fffffffffffffff 816 uint8_t reserved[472]; 817 }; 818 819 /* 820 * ATA IDENTIFY DEVICE data log (0x30) 821 * Supported Capabilities (Page 0x03). 822 */ 823 824 struct ata_identify_log_sup_cap { 825 uint8_t header[8]; 826 #define ATA_SUP_CAP_HEADER_VALID 0x8000000000000000 827 #define ATA_SUP_CAP_PAGE_NUM_MASK 0x0000000000ff0000 828 #define ATA_SUP_CAP_PAGE_NUM_SHIFT 16 829 #define ATA_SUP_CAP_REV_MASK 0x00000000000000ff 830 uint8_t sup_cap[8]; 831 #define ATA_SUP_CAP_VALID 0x8000000000000000 832 #define ATA_SC_SET_SECT_CONFIG_SUP 0x0002000000000000 /* Set Sect Conf*/ 833 #define ATA_SC_ZERO_EXT_SUP 0x0001000000000000 /* Zero EXT */ 834 #define ATA_SC_SUCC_NCQ_SENSE_SUP 0x0000800000000000 /* Succ. NCQ Sns */ 835 #define ATA_SC_DLC_SUP 0x0000400000000000 /* DLC */ 836 #define ATA_SC_RQSN_DEV_FAULT_SUP 0x0000200000000000 /* Req Sns Dev Flt*/ 837 #define ATA_SC_DSN_SUP 0x0000100000000000 /* DSN */ 838 #define ATA_SC_LP_STANDBY_SUP 0x0000080000000000 /* LP Standby */ 839 #define ATA_SC_SET_EPC_PS_SUP 0x0000040000000000 /* Set EPC PS */ 840 #define ATA_SC_AMAX_ADDR_SUP 0x0000020000000000 /* AMAX Addr */ 841 #define ATA_SC_DRAT_SUP 0x0000008000000000 /* DRAT */ 842 #define ATA_SC_LPS_MISALGN_SUP 0x0000004000000000 /* LPS Misalign */ 843 #define ATA_SC_RB_DMA_SUP 0x0000001000000000 /* Read Buf DMA */ 844 #define ATA_SC_WB_DMA_SUP 0x0000000800000000 /* Write Buf DMA */ 845 #define ATA_SC_DNLD_MC_DMA_SUP 0x0000000200000000 /* DL MCode DMA */ 846 #define ATA_SC_28BIT_SUP 0x0000000100000000 /* 28-bit */ 847 #define ATA_SC_RZAT_SUP 0x0000000080000000 /* RZAT */ 848 #define ATA_SC_NOP_SUP 0x0000000020000000 /* NOP */ 849 #define ATA_SC_READ_BUFFER_SUP 0x0000000010000000 /* Read Buffer */ 850 #define ATA_SC_WRITE_BUFFER_SUP 0x0000000008000000 /* Write Buffer */ 851 #define ATA_SC_READ_LOOK_AHEAD_SUP 0x0000000002000000 /* Read Look-Ahead*/ 852 #define ATA_SC_VOLATILE_WC_SUP 0x0000000001000000 /* Volatile WC */ 853 #define ATA_SC_SMART_SUP 0x0000000000800000 /* SMART */ 854 #define ATA_SC_FLUSH_CACHE_EXT_SUP 0x0000000000400000 /* Flush Cache Ext */ 855 #define ATA_SC_48BIT_SUP 0x0000000000100000 /* 48-Bit */ 856 #define ATA_SC_SPINUP_SUP 0x0000000000040000 /* Spin-Up */ 857 #define ATA_SC_PUIS_SUP 0x0000000000020000 /* PUIS */ 858 #define ATA_SC_APM_SUP 0x0000000000010000 /* APM */ 859 #define ATA_SC_DL_MICROCODE_SUP 0x0000000000004000 /* DL Microcode */ 860 #define ATA_SC_UNLOAD_SUP 0x0000000000002000 /* Unload */ 861 #define ATA_SC_WRITE_FUA_EXT_SUP 0x0000000000001000 /* Write FUA EXT */ 862 #define ATA_SC_GPL_SUP 0x0000000000000800 /* GPL */ 863 #define ATA_SC_STREAMING_SUP 0x0000000000000400 /* Streaming */ 864 #define ATA_SC_SMART_SELFTEST_SUP 0x0000000000000100 /* SMART self-test */ 865 #define ATA_SC_SMART_ERR_LOG_SUP 0x0000000000000080 /* SMART Err Log */ 866 #define ATA_SC_EPC_SUP 0x0000000000000040 /* EPC */ 867 #define ATA_SC_SENSE_SUP 0x0000000000000020 /* Sense data */ 868 #define ATA_SC_FREEFALL_SUP 0x0000000000000010 /* Free-Fall */ 869 #define ATA_SC_DM_MODE3_SUP 0x0000000000000008 /* DM Mode 3 */ 870 #define ATA_SC_GPL_DMA_SUP 0x0000000000000004 /* GPL DMA */ 871 #define ATA_SC_WRITE_UNCOR_SUP 0x0000000000000002 /* Write uncorr. */ 872 #define ATA_SC_WRV_SUP 0x0000000000000001 /* WRV */ 873 uint8_t download_code_cap[8]; 874 #define ATA_DL_CODE_VALID 0x8000000000000000 875 #define ATA_DLC_DM_OFFSETS_DEFER_SUP 0x0000000400000000 876 #define ATA_DLC_DM_IMMED_SUP 0x0000000200000000 877 #define ATA_DLC_DM_OFF_IMMED_SUP 0x0000000100000000 878 #define ATA_DLC_DM_MAX_XFER_SIZE_MASK 0x00000000ffff0000 879 #define ATA_DLC_DM_MAX_XFER_SIZE_SHIFT 16 880 #define ATA_DLC_DM_MIN_XFER_SIZE_MASK 0x000000000000ffff 881 uint8_t nom_media_rotation_rate[8]; 882 #define ATA_NOM_MEDIA_ROTATION_VALID 0x8000000000000000 883 #define ATA_ROTATION_MASK 0x000000000000ffff 884 uint8_t form_factor[8]; 885 #define ATA_FORM_FACTOR_VALID 0x8000000000000000 886 #define ATA_FF_MASK 0x000000000000000f 887 #define ATA_FF_NOT_REPORTED 0x0000000000000000 /* Not reported */ 888 #define ATA_FF_525_IN 0x0000000000000001 /* 5.25 inch */ 889 #define ATA_FF_35_IN 0x0000000000000002 /* 3.5 inch */ 890 #define ATA_FF_25_IN 0x0000000000000003 /* 2.5 inch */ 891 #define ATA_FF_18_IN 0x0000000000000004 /* 1.8 inch */ 892 #define ATA_FF_LT_18_IN 0x0000000000000005 /* < 1.8 inch */ 893 #define ATA_FF_MSATA 0x0000000000000006 /* mSATA */ 894 #define ATA_FF_M2 0x0000000000000007 /* M.2 */ 895 #define ATA_FF_MICROSSD 0x0000000000000008 /* MicroSSD */ 896 #define ATA_FF_CFAST 0x0000000000000009 /* CFast */ 897 uint8_t wrv_sec_cnt_mode3[8]; 898 #define ATA_WRV_MODE3_VALID 0x8000000000000000 899 #define ATA_WRV_MODE3_COUNT 0x00000000ffffffff 900 uint8_t wrv_sec_cnt_mode2[8]; 901 #define ATA_WRV_MODE2_VALID 0x8000000000000000 902 #define ATA_WRV_MODE2_COUNT 0x00000000ffffffff 903 uint8_t wwn[16]; 904 /* XXX KDM need to figure out how to handle 128-bit fields */ 905 uint8_t dsm[8]; 906 #define ATA_DSM_VALID 0x8000000000000000 907 #define ATA_LB_MARKUP_SUP 0x000000000000ff00 908 #define ATA_TRIM_SUP 0x0000000000000001 909 uint8_t util_per_unit_time[16]; 910 /* XXX KDM need to figure out how to handle 128-bit fields */ 911 uint8_t util_usage_rate_sup[8]; 912 #define ATA_UTIL_USAGE_RATE_VALID 0x8000000000000000 913 #define ATA_SETTING_RATE_SUP 0x0000000000800000 914 #define ATA_SINCE_POWERON_SUP 0x0000000000000100 915 #define ATA_POH_RATE_SUP 0x0000000000000010 916 #define ATA_DATE_TIME_RATE_SUP 0x0000000000000001 917 uint8_t zoned_cap[8]; 918 #define ATA_ZONED_VALID 0x8000000000000000 919 #define ATA_ZONED_MASK 0x0000000000000003 920 uint8_t sup_zac_cap[8]; 921 #define ATA_SUP_ZAC_CAP_VALID 0x8000000000000000 922 #define ATA_ND_RWP_SUP 0x0000000000000010 /* Reset Write Ptr*/ 923 #define ATA_ND_FINISH_ZONE_SUP 0x0000000000000008 /* Finish Zone */ 924 #define ATA_ND_CLOSE_ZONE_SUP 0x0000000000000004 /* Close Zone */ 925 #define ATA_ND_OPEN_ZONE_SUP 0x0000000000000002 /* Open Zone */ 926 #define ATA_REPORT_ZONES_SUP 0x0000000000000001 /* Report Zones */ 927 uint8_t reserved[392]; 928 }; 929 930 /* 931 * ATA Identify Device Data Log Zoned Device Information Page (0x09). 932 * Current as of ZAC r04a, August 25, 2015. 933 */ 934 struct ata_zoned_info_log { 935 uint8_t header[8]; 936 #define ATA_ZDI_HEADER_VALID 0x8000000000000000 937 #define ATA_ZDI_PAGE_NUM_MASK 0x0000000000ff0000 938 #define ATA_ZDI_PAGE_NUM_SHIFT 16 939 #define ATA_ZDI_REV_MASK 0x00000000000000ff 940 uint8_t zoned_cap[8]; 941 #define ATA_ZDI_CAP_VALID 0x8000000000000000 942 #define ATA_ZDI_CAP_URSWRZ 0x0000000000000001 943 uint8_t zoned_settings[8]; 944 #define ATA_ZDI_SETTINGS_VALID 0x8000000000000000 945 uint8_t optimal_seq_zones[8]; 946 #define ATA_ZDI_OPT_SEQ_VALID 0x8000000000000000 947 #define ATA_ZDI_OPT_SEQ_MASK 0x00000000ffffffff 948 uint8_t optimal_nonseq_zones[8]; 949 #define ATA_ZDI_OPT_NS_VALID 0x8000000000000000 950 #define ATA_ZDI_OPT_NS_MASK 0x00000000ffffffff 951 uint8_t max_seq_req_zones[8]; 952 #define ATA_ZDI_MAX_SEQ_VALID 0x8000000000000000 953 #define ATA_ZDI_MAX_SEQ_MASK 0x00000000ffffffff 954 uint8_t version_info[8]; 955 #define ATA_ZDI_VER_VALID 0x8000000000000000 956 #define ATA_ZDI_VER_ZAC_SUP 0x0100000000000000 957 #define ATA_ZDI_VER_ZAC_MASK 0x00000000000000ff 958 uint8_t reserved[456]; 959 }; 960 961 struct ata_ioc_request { 962 union { 963 struct { 964 u_int8_t command; 965 u_int8_t feature; 966 u_int64_t lba; 967 u_int16_t count; 968 } ata; 969 struct { 970 char ccb[16]; 971 struct atapi_sense sense; 972 } atapi; 973 } u; 974 caddr_t data; 975 int count; 976 int flags; 977 #define ATA_CMD_CONTROL 0x01 978 #define ATA_CMD_READ 0x02 979 #define ATA_CMD_WRITE 0x04 980 #define ATA_CMD_ATAPI 0x08 981 982 int timeout; 983 int error; 984 }; 985 986 struct ata_security_password { 987 u_int16_t ctrl; 988 #define ATA_SECURITY_PASSWORD_USER 0x0000 989 #define ATA_SECURITY_PASSWORD_MASTER 0x0001 990 #define ATA_SECURITY_ERASE_NORMAL 0x0000 991 #define ATA_SECURITY_ERASE_ENHANCED 0x0002 992 #define ATA_SECURITY_LEVEL_HIGH 0x0000 993 #define ATA_SECURITY_LEVEL_MAXIMUM 0x0100 994 995 u_int8_t password[32]; 996 u_int16_t revision; 997 u_int16_t reserved[238]; 998 }; 999 1000 /* pr device ATA ioctl calls */ 1001 #define IOCATAREQUEST _IOWR('a', 100, struct ata_ioc_request) 1002 #define IOCATAGPARM _IOR('a', 101, struct ata_params) 1003 #define IOCATAGMODE _IOR('a', 102, int) 1004 #define IOCATASMODE _IOW('a', 103, int) 1005 1006 #define IOCATAGSPINDOWN _IOR('a', 104, int) 1007 #define IOCATASSPINDOWN _IOW('a', 105, int) 1008 1009 struct ata_ioc_raid_config { 1010 int lun; 1011 int type; 1012 #define AR_JBOD 0x0001 1013 #define AR_SPAN 0x0002 1014 #define AR_RAID0 0x0004 1015 #define AR_RAID1 0x0008 1016 #define AR_RAID01 0x0010 1017 #define AR_RAID3 0x0020 1018 #define AR_RAID4 0x0040 1019 #define AR_RAID5 0x0080 1020 1021 int interleave; 1022 int status; 1023 #define AR_READY 1 1024 #define AR_DEGRADED 2 1025 #define AR_REBUILDING 4 1026 1027 int progress; 1028 int total_disks; 1029 int disks[16]; 1030 }; 1031 1032 struct ata_ioc_raid_status { 1033 int lun; 1034 int type; 1035 int interleave; 1036 int status; 1037 int progress; 1038 int total_disks; 1039 struct { 1040 int state; 1041 #define AR_DISK_ONLINE 0x01 1042 #define AR_DISK_PRESENT 0x02 1043 #define AR_DISK_SPARE 0x04 1044 int lun; 1045 } disks[16]; 1046 }; 1047 1048 /* ATA RAID ioctl calls */ 1049 #define IOCATARAIDCREATE _IOWR('a', 200, struct ata_ioc_raid_config) 1050 #define IOCATARAIDDELETE _IOW('a', 201, int) 1051 #define IOCATARAIDSTATUS _IOWR('a', 202, struct ata_ioc_raid_status) 1052 #define IOCATARAIDADDSPARE _IOW('a', 203, struct ata_ioc_raid_config) 1053 #define IOCATARAIDREBUILD _IOW('a', 204, int) 1054 1055 #endif /* _SYS_ATA_H_ */ 1056