xref: /illumos-gate/usr/src/cmd/sgs/gprof/common/sparc.h (revision 03100a6332bd4edc7a53091fcf7c9a7131bcdaa7)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright (c) 1993 by Sun Microsystems, Inc.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28     /*
29      *	opcodes of the call instructions
30      */
31     /*
32      *	offset (in bytes) of the code from the entry address of a routine.
33      *	(see asgnsamples for use and explanation.)
34      */
35 #define OFFSET_OF_CODE	0 /* there is no mask on a SPARC */
36 #define	UNITS_TO_CODE	(OFFSET_OF_CODE / sizeof(UNIT))
37     /*
38      *  address at which text begins N_TXTADDR is defined in a.out.h
39      */
40 #ifdef _SYS_ELF_H
41 extern size_t 	textbegin;
42 #define TORIGIN (unsigned int)	textbegin
43 #else
44 #define TORIGIN ((unsigned long) N_TXTADDR(xbuf))
45 #endif
46     /*
47      *  Macros for manipulating instruction fields.  These use the
48      *  structures defined below
49      */
50 #define OP(x)		(((union instruct *) (x))->f_1.op)
51 #define DISP30(x)	(((union instruct *) (x))->f_1.disp30)
52 #define OP3(x)		(((union instruct *) (x))->f_3c.op3)
53 #define RD(x)		(((union instruct *) (x))->f_3c.rd)
54 #define IMMED(x)	(((union instruct *) (x))->f_3c.i)
55 #define SIMM13(x)	(((((union instruct *) (x))->f_3d.simm13) << 19) >> 19)
56 #define RS1(x)		(((union instruct *) (x))->f_3c.rs1)
57 #define RS2(x)		(((union instruct *) (x))->f_3c.rs2)
58     /*
59      *  a few values for operand and register fields
60      */
61 #define CALL		0x1
62 #define FMT3_0x10	0x2
63 #define JMPL		0x38
64 #define R_G0		0x0
65 #define R_O7		0xF
66 #define R_I7		0x1F
67     /*
68      *  A macro for converting from instructp to the appropriate address in
69      *  the program
70      */
71 #define PC_VAL(x)	((x) - (unsigned long) textspace + TORIGIN)
72 	/*
73 	 *	structures for decoding instructions
74 	 */
75 struct f_1 {
76     unsigned long   op:2,
77 		    disp30:30;
78 };
79 struct f_2a {
80     unsigned long   op:2,
81 		    rd:5,
82 		    op2:3,
83 		    imm22:22;
84 };
85 struct f_2b {
86     unsigned long   op:2,
87 		    a:1,
88 		    cond:4,
89 		    op2:3,
90 		    disp22:22;
91 };
92 struct f_3a {
93     unsigned long   op:2,
94 		    ign1:1,
95 		    cond:4,
96 		    op3:6,
97 		    rs1:5,
98 		    i:1,
99 		    ign2:8,
100 		    rs2:5;
101 };
102 struct f_3b {
103     unsigned long   op:2,
104 		    ign1:1,
105 		    cond:4,
106 		    op3:6,
107 		    rs1:5,
108 		    i:1,
109 		    simm13:13;
110 };
111 struct f_3c {
112     unsigned long   op:2,
113 		    rd:5,
114 		    op3:6,
115 		    rs1:5,
116 		    i:1,
117 		    asi:8,
118 		    rs2:5;
119 };
120 struct f_3d {
121     unsigned long   op:2,
122 		    rd:5,
123 		    op3:6,
124 		    rs1:5,
125 		    i:1,
126 		    simm13:13;
127 };
128 struct f_3e {
129     unsigned long   op:2,
130 		    rd:5,
131 		    op3:6,
132 		    rs1:5,
133 		    opf:9,
134 		    rs2:5;
135 };
136 
137 union instruct {
138 	struct f_1	f_1;
139 	struct f_2a	f_2a;
140 	struct f_2b	f_2b;
141 	struct f_3a	f_3a;
142 	struct f_3b	f_3b;
143 	struct f_3c	f_3c;
144 	struct f_3d	f_3d;
145 	struct f_3e	f_3e;
146 };
147 
148