1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 #include <mdb/mdb_modapi.h> 27 #include <generic_cpu/gcpu.h> 28 #include <sys/cpu_module_impl.h> 29 #include <sys/cpu_module_ms_impl.h> 30 31 typedef struct cmi_hdl_impl { 32 enum cmi_hdl_class cmih_class; /* Handle nature */ 33 struct cmi_hdl_ops *cmih_ops; /* Operations vector */ 34 uint_t cmih_chipid; /* Chipid of cpu resource */ 35 uint_t cmih_procnodeid; /* Nodeid of cpu resource */ 36 uint_t cmih_coreid; /* Core within die */ 37 uint_t cmih_strandid; /* Thread within core */ 38 uint_t cmih_procnodes_per_pkg; /* Nodes in a processor */ 39 boolean_t cmih_mstrand; /* cores are multithreaded */ 40 volatile uint32_t *cmih_refcntp; /* Reference count pointer */ 41 uint64_t cmih_msrsrc; /* MSR data source flags */ 42 void *cmih_hdlpriv; /* cmi_hw.c private data */ 43 void *cmih_spec; /* cmi_hdl_{set,get}_specific */ 44 void *cmih_cmi; /* cpu mod control structure */ 45 void *cmih_cmidata; /* cpu mod private data */ 46 const struct cmi_mc_ops *cmih_mcops; /* Memory-controller ops */ 47 void *cmih_mcdata; /* Memory-controller data */ 48 uint64_t cmih_flags; 49 uint16_t cmih_smbiosid; /* SMBIOS Type 4 struct ID */ 50 uint_t cmih_smb_chipid; /* smbios chipid */ 51 nvlist_t *cmih_smb_bboard; /* smbios bboard */ 52 } cmi_hdl_impl_t; 53 54 typedef struct cmi_hdl_ent { 55 volatile uint32_t cmae_refcnt; 56 cmi_hdl_impl_t *cmae_hdlp; 57 } cmi_hdl_ent_t; 58 59 typedef struct cmi { 60 struct cmi *cmi_next; 61 struct cmi *cmi_prev; 62 const cmi_ops_t *cmi_ops; 63 struct modctl *cmi_modp; 64 uint_t cmi_refcnt; 65 } cmi_t; 66 67 typedef struct cms { 68 struct cms *cms_next; 69 struct cms *cms_prev; 70 const cms_ops_t *cms_ops; 71 struct modctl *cms_modp; 72 uint_t cms_refcnt; 73 } cms_t; 74 75 struct cms_ctl { 76 cms_t *cs_cms; 77 void *cs_cmsdata; 78 }; 79 80 #define CMI_MAX_CHIPID_NBITS 6 /* max chipid of 63 */ 81 82 #define CMI_MAX_CHIPID ((1 << (CMI_MAX_CHIPID_NBITS)) - 1) 83 #define CMI_MAX_CORES_PER_CHIP(cbits) (1 << (cbits)) 84 #define CMI_MAX_COREID(cbits) ((1 << (cbits)) - 1) 85 #define CMI_MAX_STRANDS_PER_CORE(sbits) (1 << (sbits)) 86 #define CMI_MAX_STRANDID(sbits) ((1 << (sbits)) - 1) 87 #define CMI_MAX_STRANDS_PER_CHIP(cbits, sbits) \ 88 (CMI_MAX_CORES_PER_CHIP(cbits) * CMI_MAX_STRANDS_PER_CORE(sbits)) 89 90 #define CMI_CHIPID_ARR_SZ (1 << CMI_MAX_CHIPID_NBITS) 91 92 struct cmih_walk_state { 93 int chipid, coreid, strandid; /* currently visited cpu */ 94 cmi_hdl_ent_t *chip_tab[CMI_CHIPID_ARR_SZ]; 95 uint_t core_nbits; 96 uint_t strand_nbits; 97 }; 98 99 /* 100 * Advance the <chipid,coreid,strandid> tuple to the next strand entry 101 * Return true upon sucessful result. Otherwise return false if already reach 102 * the highest strand. 103 */ 104 static boolean_t 105 cmih_ent_next(struct cmih_walk_state *wsp) 106 { 107 uint_t carry = 0; 108 109 /* Check for end of the table */ 110 if (wsp->chipid >= CMI_MAX_CHIPID && 111 wsp->coreid >= CMI_MAX_COREID(wsp->core_nbits) && 112 wsp->strandid >= CMI_MAX_STRANDID(wsp->strand_nbits)) 113 return (B_FALSE); 114 115 /* increment the strand id */ 116 wsp->strandid++; 117 carry = wsp->strandid >> wsp->strand_nbits; 118 wsp->strandid = wsp->strandid & CMI_MAX_STRANDID(wsp->strand_nbits); 119 if (carry == 0) 120 return (B_TRUE); 121 122 /* increment the core id */ 123 wsp->coreid++; 124 carry = wsp->coreid >> wsp->core_nbits; 125 wsp->coreid = wsp->coreid & CMI_MAX_COREID(wsp->core_nbits); 126 if (carry == 0) 127 return (B_TRUE); 128 129 /* increment the chip id */ 130 wsp->chipid = (wsp->chipid + 1) & (CMI_MAX_CHIPID); 131 132 return (B_TRUE); 133 } 134 135 /* 136 * Lookup for the hdl entry of a given <chip,core,strand> tuple 137 */ 138 static cmi_hdl_ent_t * 139 cmih_ent_lookup(struct cmih_walk_state *wsp) 140 { 141 if (wsp == NULL || wsp->chip_tab[wsp->chipid] == NULL) 142 return (NULL); /* chip is not present */ 143 144 return (wsp->chip_tab[wsp->chipid] + 145 (((wsp->coreid & CMI_MAX_COREID(wsp->core_nbits)) << 146 wsp->strand_nbits) | 147 ((wsp->strandid) & CMI_MAX_STRANDID(wsp->strand_nbits)))); 148 } 149 150 /* forward decls */ 151 static void 152 cmih_walk_fini(mdb_walk_state_t *wsp); 153 154 static int 155 cmih_walk_init(mdb_walk_state_t *wsp) 156 { 157 int i; 158 ssize_t sz; 159 struct cmih_walk_state *awsp; 160 void *pg; 161 cmi_hdl_ent_t *ent; 162 163 if (wsp->walk_addr != 0) { 164 mdb_warn("cmihdl is a global walker\n"); 165 return (WALK_ERR); 166 } 167 168 wsp->walk_data = awsp = 169 mdb_zalloc(sizeof (struct cmih_walk_state), UM_SLEEP); 170 171 /* read the number of core bits and strand bits */ 172 if (mdb_readvar(&awsp->core_nbits, "cmi_core_nbits") == -1) { 173 mdb_warn("read of cmi_core_nbits failed"); 174 mdb_free(wsp->walk_data, sizeof (struct cmih_walk_state)); 175 wsp->walk_data = NULL; 176 return (WALK_ERR); 177 } 178 if (mdb_readvar(&awsp->strand_nbits, "cmi_strand_nbits") == -1) { 179 mdb_warn("read of cmi_strand_nbits failed"); 180 mdb_free(wsp->walk_data, sizeof (struct cmih_walk_state)); 181 wsp->walk_data = NULL; 182 return (WALK_ERR); 183 } 184 185 /* table of chipid entries */ 186 if ((sz = mdb_readvar(&awsp->chip_tab, "cmi_chip_tab")) == -1) { 187 mdb_warn("read of cmi_chip_tab failed"); 188 mdb_free(wsp->walk_data, sizeof (struct cmih_walk_state)); 189 wsp->walk_data = NULL; 190 return (WALK_ERR); 191 } else if (sz < sizeof (awsp->chip_tab)) { 192 mdb_warn("Unexpected cmi_chip_tab size (exp=%ld, actual=%ld)", 193 sizeof (awsp->chip_tab), sz); 194 mdb_free(wsp->walk_data, sizeof (struct cmih_walk_state)); 195 wsp->walk_data = NULL; 196 return (WALK_ERR); 197 } 198 199 /* read the per-chip table that contains all strands of the chip */ 200 sz = CMI_MAX_STRANDS_PER_CHIP(awsp->core_nbits, awsp->strand_nbits) * 201 sizeof (cmi_hdl_ent_t); 202 for (i = 0; i < CMI_CHIPID_ARR_SZ; i++) { 203 if (awsp->chip_tab[i] == NULL) 204 continue; /* this chip(i) is not present */ 205 pg = mdb_alloc(sz, UM_SLEEP); 206 if (mdb_vread(pg, sz, (uintptr_t)awsp->chip_tab[i]) != sz) { 207 mdb_warn("read of cmi_hdl(%i) array at 0x%p failed", 208 i, awsp->chip_tab[i]); 209 mdb_free(pg, sz); 210 cmih_walk_fini(wsp); 211 return (WALK_ERR); 212 } 213 awsp->chip_tab[i] = pg; 214 } 215 216 /* Look up the hdl of the first strand <0,0,0> */ 217 wsp->walk_addr = 0; 218 if ((ent = cmih_ent_lookup(awsp)) != NULL) 219 wsp->walk_addr = (uintptr_t)ent->cmae_hdlp; 220 221 return (WALK_NEXT); 222 } 223 224 static int 225 cmih_walk_step(mdb_walk_state_t *wsp) 226 { 227 struct cmih_walk_state *awsp = wsp->walk_data; 228 uintptr_t addr = 0; 229 cmi_hdl_impl_t hdl; 230 cmi_hdl_ent_t *ent; 231 int rv; 232 233 if ((ent = cmih_ent_lookup(awsp)) != NULL) 234 addr = (uintptr_t)ent->cmae_hdlp; 235 if (wsp->walk_addr == 0 || addr == 0) 236 return (cmih_ent_next(awsp) ? WALK_NEXT : WALK_DONE); 237 238 if (mdb_vread(&hdl, sizeof (hdl), addr) != sizeof (hdl)) { 239 mdb_warn("read of handle at 0x%p failed", addr); 240 return (WALK_DONE); 241 } 242 243 if ((rv = wsp->walk_callback(addr, (void *)&hdl, 244 wsp->walk_cbdata)) != WALK_NEXT) 245 return (rv); 246 247 return (cmih_ent_next(awsp) ? WALK_NEXT : WALK_DONE); 248 } 249 250 static void 251 cmih_walk_fini(mdb_walk_state_t *wsp) 252 { 253 struct cmih_walk_state *awsp = wsp->walk_data; 254 255 if (awsp != NULL) { 256 int i; 257 int max_strands = CMI_MAX_STRANDS_PER_CHIP(awsp->core_nbits, 258 awsp->strand_nbits); 259 for (i = 0; i < CMI_CHIPID_ARR_SZ; i++) { 260 /* free the per-chip table */ 261 if (awsp->chip_tab[i] != NULL) { 262 mdb_free((void *)awsp->chip_tab[i], 263 max_strands * sizeof (cmi_hdl_ent_t)); 264 awsp->chip_tab[i] = NULL; 265 } 266 } 267 mdb_free(wsp->walk_data, sizeof (struct cmih_walk_state)); 268 wsp->walk_data = NULL; 269 } 270 } 271 272 struct cmihdl_cb { 273 int mod_cpuid; 274 int mod_chipid; 275 int mod_coreid; 276 int mod_strandid; 277 uintptr_t mod_hdladdr; 278 }; 279 280 static int 281 cmihdl_cb(uintptr_t addr, const void *arg, void *data) 282 { 283 cmi_hdl_impl_t *hdl = (cmi_hdl_impl_t *)arg; 284 struct cmihdl_cb *cbp = data; 285 cpu_t *cp; 286 int rv; 287 288 if (cbp->mod_cpuid != -1) { 289 cp = mdb_alloc(sizeof (cpu_t), UM_SLEEP); 290 if (mdb_vread(cp, sizeof (cpu_t), 291 (uintptr_t)hdl->cmih_hdlpriv) != sizeof (cpu_t)) { 292 mdb_warn("Read of cpu_t at 0x%p failed", 293 hdl->cmih_hdlpriv); 294 mdb_free(cp, sizeof (cpu_t)); 295 return (WALK_ERR); 296 } 297 298 if (cp->cpu_id == cbp->mod_cpuid) { 299 cbp->mod_hdladdr = addr; 300 rv = WALK_DONE; 301 } else { 302 rv = WALK_NEXT; 303 } 304 305 mdb_free(cp, sizeof (cpu_t)); 306 return (rv); 307 } else { 308 if (hdl->cmih_chipid == cbp->mod_chipid && 309 hdl->cmih_coreid == cbp->mod_coreid && 310 hdl->cmih_strandid == cbp->mod_strandid) { 311 cbp->mod_hdladdr = addr; 312 return (WALK_DONE); 313 } else { 314 return (WALK_NEXT); 315 } 316 } 317 } 318 319 static int 320 cmihdl_disp(uintptr_t addr, cmi_hdl_impl_t *hdl) 321 { 322 struct cms_ctl cmsctl; /* 16 bytes max */ 323 struct modctl cmimodc, cmsmodc; /* 288 bytes max */ 324 cmi_t cmi; /* 40 bytes max */ 325 cms_t cms; /* 40 bytes max */ 326 char cmimodnm[25], cmsmodnm[25]; /* 50 bytes */ 327 char cpuidstr[4], hwidstr[16]; 328 int native = hdl->cmih_class == CMI_HDL_NATIVE; 329 uint32_t refcnt; 330 331 cmimodnm[0] = cmsmodnm[0] = '-'; 332 cmimodnm[1] = cmsmodnm[1] = '\0'; 333 334 if (hdl->cmih_cmi != NULL) { 335 if (mdb_vread(&cmi, sizeof (cmi_t), 336 (uintptr_t)hdl->cmih_cmi) != sizeof (cmi)) { 337 mdb_warn("Read of cmi_t at 0x%p failed", 338 hdl->cmih_cmi); 339 return (0); 340 } 341 342 if (cmi.cmi_modp != NULL) { 343 if (mdb_vread(&cmimodc, sizeof (struct modctl), 344 (uintptr_t)cmi.cmi_modp) != sizeof (cmimodc)) { 345 mdb_warn("Read of modctl at 0x%p failed", 346 cmi.cmi_modp); 347 return (0); 348 } 349 350 if (mdb_readstr(cmimodnm, sizeof (cmimodnm), 351 (uintptr_t)cmimodc.mod_modname) == -1) { 352 mdb_warn("Read of cmi module name at 0x%p " 353 "failed", cmimodc.mod_modname); 354 return (0); 355 } 356 } 357 } 358 359 if (hdl->cmih_spec != NULL) { 360 if (mdb_vread(&cmsctl, sizeof (struct cms_ctl), 361 (uintptr_t)hdl->cmih_spec) != sizeof (cmsctl)) { 362 mdb_warn("Read of struct cms_ctl at 0x%p failed", 363 hdl->cmih_spec); 364 return (0); 365 } 366 367 if (mdb_vread(&cms, sizeof (cms_t), 368 (uintptr_t)cmsctl.cs_cms) != sizeof (cms)) { 369 mdb_warn("Read of cms_t at 0x%p failed", cmsctl.cs_cms); 370 return (0); 371 } 372 373 if (cms.cms_modp != NULL) { 374 if (mdb_vread(&cmsmodc, sizeof (struct modctl), 375 (uintptr_t)cms.cms_modp) != sizeof (cmsmodc)) { 376 mdb_warn("Read of modctl at 0x%p failed", 377 cms.cms_modp); 378 return (0); 379 } 380 381 if (mdb_readstr(cmsmodnm, sizeof (cmsmodnm), 382 (uintptr_t)cmsmodc.mod_modname) == -1) { 383 mdb_warn("Read of cms module name at 0x%p " 384 "failed", cmsmodc.mod_modname); 385 return (0); 386 } 387 } 388 } 389 390 if (mdb_vread(&refcnt, sizeof (uint32_t), 391 (uintptr_t)hdl->cmih_refcntp) != sizeof (uint32_t)) { 392 mdb_warn("Read of reference count for hdl 0x%p failed", hdl); 393 return (0); 394 } 395 396 if (native) { 397 cpu_t *cp = mdb_alloc(sizeof (cpu_t), UM_SLEEP); 398 399 if (mdb_vread(cp, sizeof (cpu_t), 400 (uintptr_t)hdl->cmih_hdlpriv) != sizeof (cpu_t)) { 401 mdb_free(cp, sizeof (cpu_t)); 402 mdb_warn("Read of cpu_t at 0x%p failed", 403 hdl->cmih_hdlpriv); 404 return (0); 405 } 406 407 (void) mdb_snprintf(cpuidstr, sizeof (cpuidstr), "%d", 408 cp->cpu_id); 409 mdb_free(cp, sizeof (cpu_t)); 410 } else { 411 (void) mdb_snprintf(cpuidstr, sizeof (cpuidstr), "-"); 412 } 413 414 (void) mdb_snprintf(hwidstr, sizeof (hwidstr), "%d/%d/%d", 415 hdl->cmih_chipid, hdl->cmih_coreid, hdl->cmih_strandid); 416 417 mdb_printf("%16lx %3d %3s %8s %3s %2s %-13s %-24s\n", addr, 418 refcnt, cpuidstr, hwidstr, hdl->cmih_mstrand ? "M" : "S", 419 hdl->cmih_mcops ? "Y" : "N", cmimodnm, cmsmodnm); 420 421 return (1); 422 } 423 424 #define HDRFMT "%-16s %3s %3s %8s %3s %2s %-13s %-24s\n" 425 426 static int 427 cmihdl(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv) 428 { 429 struct cmihdl_cb cb; 430 cmi_hdl_impl_t *hdl; 431 432 /* 433 * If an address is given it must be that of a cmi handle. 434 * Otherwise if the user has specified -c <cpuid> or 435 * -c <chipid/coreid/strandid> we will lookup a matching handle. 436 * Otherwise we'll walk and callback to this dcmd. 437 */ 438 if (!(flags & DCMD_ADDRSPEC)) { 439 char *p, *buf; 440 int len; 441 442 if (argc == 0) 443 return (mdb_walk_dcmd("cmihdl", "cmihdl", argc, 444 argv) == 0 ? DCMD_OK : DCMD_ERR); 445 446 447 if (mdb_getopts(argc, argv, 448 'c', MDB_OPT_STR, &p, 449 NULL) != argc) 450 return (DCMD_USAGE); 451 452 if ((len = strlen(p)) == 0) { 453 return (DCMD_USAGE); 454 } else { 455 buf = mdb_alloc(len + 1, UM_SLEEP); 456 strcpy(buf, p); 457 } 458 459 cb.mod_cpuid = cb.mod_chipid = cb.mod_coreid = 460 cb.mod_strandid = -1; 461 462 if ((p = strchr(buf, '/')) == NULL) { 463 /* Native cpuid */ 464 cb.mod_cpuid = (int)mdb_strtoull(buf); 465 } else { 466 /* Comma-separated triplet chip,core,strand. */ 467 char *q = buf; 468 469 *p = '\0'; 470 cb.mod_chipid = (int)mdb_strtoull(q); 471 472 if ((q = p + 1) >= buf + len || 473 (p = strchr(q, '/')) == NULL) { 474 mdb_free(buf, len); 475 return (DCMD_USAGE); 476 } 477 478 *p = '\0'; 479 cb.mod_coreid = (int)mdb_strtoull(q); 480 481 if ((q = p + 1) >= buf + len) { 482 mdb_free(buf, len); 483 return (DCMD_USAGE); 484 } 485 486 cb.mod_strandid = (int)mdb_strtoull(q); 487 } 488 489 mdb_free(buf, len); 490 491 cb.mod_hdladdr = 0; 492 if (mdb_walk("cmihdl", cmihdl_cb, &cb) == -1) { 493 mdb_warn("cmi_hdl walk failed\n"); 494 return (DCMD_ERR); 495 } 496 497 if (cb.mod_hdladdr == 0) { 498 if (cb.mod_cpuid != -1) { 499 mdb_warn("No handle found for cpuid %d\n", 500 cb.mod_cpuid); 501 } else { 502 503 mdb_warn("No handle found for chip %d " 504 "core %d strand %d\n", cb.mod_chipid, 505 cb.mod_coreid, cb.mod_strandid); 506 } 507 return (DCMD_ERR); 508 } 509 510 addr = cb.mod_hdladdr; 511 } 512 513 if (DCMD_HDRSPEC(flags)) { 514 char ul[] = "----------------------------"; 515 char *p = ul + sizeof (ul) - 1; 516 517 mdb_printf(HDRFMT HDRFMT, 518 "HANDLE", "REF", "CPU", "CH/CR/ST", "CMT", "MC", 519 "MODULE", "MODEL-SPECIFIC", 520 p - 16, p - 3, p - 3, p - 8, p - 3, p - 2, p - 13, p - 24); 521 } 522 523 hdl = mdb_alloc(sizeof (cmi_hdl_impl_t), UM_SLEEP); 524 525 if (mdb_vread(hdl, sizeof (cmi_hdl_impl_t), addr) != 526 sizeof (cmi_hdl_impl_t)) { 527 mdb_free(hdl, sizeof (cmi_hdl_impl_t)); 528 mdb_warn("Read of cmi handle at 0x%p failed", addr); 529 return (DCMD_ERR); 530 } 531 532 if (!cmihdl_disp(addr, hdl)) { 533 mdb_free(hdl, sizeof (cmi_hdl_impl_t)); 534 return (DCMD_ERR); 535 } 536 537 mdb_free(hdl, sizeof (cmi_hdl_impl_t)); 538 539 return (DCMD_OK); 540 } 541 542 /*ARGSUSED*/ 543 static int 544 gcpu_mpt_dump(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv) 545 { 546 static const char *const whatstrs[] = { 547 "ntv-cyc-poll", /* GCPU_MPT_WHAT_CYC_ERR */ 548 "poll-poked", /* GCPU_MPT_WHAT_POKE_ERR */ 549 "unfaulting", /* GCPU_MPT_WHAT_UNFAULTING */ 550 "#MC", /* GCPU_MPT_WHAT_MC_ERR */ 551 "CMCI-int", /* GCPU_MPT_WHAT_CMCI_ERR */ 552 "xpv-virq-nrec", /* GCPU_MPT_WHAT_XPV_VIRQ */ 553 "xpv-virq-lgout", /* GCPU_MPT_WHAT_XPV_VIRQ_LOGOUT */ 554 }; 555 556 gcpu_poll_trace_t mpt; 557 const char *what; 558 559 if (argc != 0 || !(flags & DCMD_ADDRSPEC)) 560 return (DCMD_USAGE); 561 562 if (mdb_vread(&mpt, sizeof (mpt), addr) != sizeof (mpt)) { 563 mdb_warn("failed to read gcpu_poll_trace_t at 0x%p", addr); 564 return (DCMD_ERR); 565 } 566 567 if (DCMD_HDRSPEC(flags)) { 568 mdb_printf("%<u>%?s%</u> %<u>%?s%</u> %<u>%15s%</u> " 569 "%<u>%4s%</u>\n", "ADDR", "WHEN", "WHAT", "NERR"); 570 } 571 572 if (mpt.mpt_what < sizeof (whatstrs) / sizeof (char *)) 573 what = whatstrs[mpt.mpt_what]; 574 else 575 what = "???"; 576 577 mdb_printf("%?p %?p %15s %4u\n", addr, mpt.mpt_when, what, 578 mpt.mpt_nerr); 579 580 return (DCMD_OK); 581 } 582 583 typedef struct mptwalk_data { 584 uintptr_t mw_traceaddr; 585 gcpu_poll_trace_t *mw_trace; 586 size_t mw_tracesz; 587 uint_t mw_tracenent; 588 uint_t mw_curtrace; 589 } mptwalk_data_t; 590 591 static int 592 gcpu_mptwalk_init(mdb_walk_state_t *wsp) 593 { 594 gcpu_poll_trace_t *mpt; 595 mptwalk_data_t *mw; 596 GElf_Sym sym; 597 uint_t nent, i; 598 hrtime_t latest; 599 600 if (wsp->walk_addr == 0) { 601 mdb_warn("the address of a poll trace array must be " 602 "specified\n"); 603 return (WALK_ERR); 604 } 605 606 if (mdb_lookup_by_name("gcpu_poll_trace_nent", &sym) < 0 || 607 sym.st_size != sizeof (uint_t) || mdb_vread(&nent, sizeof (uint_t), 608 sym.st_value) != sizeof (uint_t)) { 609 mdb_warn("failed to read gcpu_poll_trace_nent from kernel"); 610 return (WALK_ERR); 611 } 612 613 mw = mdb_alloc(sizeof (mptwalk_data_t), UM_SLEEP); 614 mw->mw_traceaddr = wsp->walk_addr; 615 mw->mw_tracenent = nent; 616 mw->mw_tracesz = nent * sizeof (gcpu_poll_trace_t); 617 mw->mw_trace = mdb_alloc(mw->mw_tracesz, UM_SLEEP); 618 619 if (mdb_vread(mw->mw_trace, mw->mw_tracesz, wsp->walk_addr) != 620 mw->mw_tracesz) { 621 mdb_free(mw->mw_trace, mw->mw_tracesz); 622 mdb_free(mw, sizeof (mptwalk_data_t)); 623 mdb_warn("failed to read poll trace array from kernel"); 624 return (WALK_ERR); 625 } 626 627 latest = 0; 628 mw->mw_curtrace = 0; 629 for (mpt = mw->mw_trace, i = 0; i < mw->mw_tracenent; i++, mpt++) { 630 if (mpt->mpt_when > latest) { 631 latest = mpt->mpt_when; 632 mw->mw_curtrace = i; 633 } 634 } 635 636 if (latest == 0) { 637 mdb_free(mw->mw_trace, mw->mw_tracesz); 638 mdb_free(mw, sizeof (mptwalk_data_t)); 639 return (WALK_DONE); /* trace array is empty */ 640 } 641 642 wsp->walk_data = mw; 643 644 return (WALK_NEXT); 645 } 646 647 static int 648 gcpu_mptwalk_step(mdb_walk_state_t *wsp) 649 { 650 mptwalk_data_t *mw = wsp->walk_data; 651 gcpu_poll_trace_t *thismpt, *prevmpt; 652 int prev, rv; 653 654 thismpt = &mw->mw_trace[mw->mw_curtrace]; 655 656 rv = wsp->walk_callback(mw->mw_traceaddr + (mw->mw_curtrace * 657 sizeof (gcpu_poll_trace_t)), thismpt, wsp->walk_cbdata); 658 659 if (rv != WALK_NEXT) 660 return (rv); 661 662 prev = (mw->mw_curtrace - 1) % mw->mw_tracenent; 663 prevmpt = &mw->mw_trace[prev]; 664 665 if (prevmpt->mpt_when == 0 || prevmpt->mpt_when > thismpt->mpt_when) 666 return (WALK_DONE); 667 668 mw->mw_curtrace = prev; 669 670 return (WALK_NEXT); 671 } 672 673 static void 674 gcpu_mptwalk_fini(mdb_walk_state_t *wsp) 675 { 676 mptwalk_data_t *mw = wsp->walk_data; 677 678 mdb_free(mw->mw_trace, mw->mw_tracesz); 679 mdb_free(mw, sizeof (mptwalk_data_t)); 680 } 681 682 static const mdb_dcmd_t dcmds[] = { 683 { "cmihdl", ": -c <cpuid>|<chip,core,strand> ", 684 "dump a cmi_handle_t", cmihdl }, 685 { "gcpu_poll_trace", ":", "dump a poll trace buffer", gcpu_mpt_dump }, 686 { NULL } 687 }; 688 689 static const mdb_walker_t walkers[] = { 690 { "cmihdl", "walks cpu module interface handle list", 691 cmih_walk_init, cmih_walk_step, cmih_walk_fini, NULL }, 692 { "gcpu_poll_trace", "walks poll trace buffers in reverse " 693 "chronological order", gcpu_mptwalk_init, gcpu_mptwalk_step, 694 gcpu_mptwalk_fini, NULL }, 695 { NULL } 696 }; 697 698 static const mdb_modinfo_t modinfo = { MDB_API_VERSION, dcmds, walkers }; 699 700 const mdb_modinfo_t * 701 _mdb_init(void) 702 { 703 return (&modinfo); 704 } 705