1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #include <cma.h> 28 29 #include <unistd.h> 30 #include <fcntl.h> 31 #include <strings.h> 32 #include <errno.h> 33 #include <time.h> 34 #include <fm/fmd_api.h> 35 #include <sys/fm/protocol.h> 36 #include <sys/systeminfo.h> 37 #include <sys/utsname.h> 38 39 #ifdef sun4v 40 #include <sys/fm/ldom.h> 41 42 static fmd_hdl_t *init_hdl; 43 ldom_hdl_t *cma_lhp; 44 #endif 45 46 #ifdef i386 47 boolean_t cma_is_native; 48 #endif 49 50 extern const char *fmd_fmri_get_platform(); 51 52 cma_t cma; 53 54 cma_stats_t cma_stats = { 55 { "cpu_flts", FMD_TYPE_UINT64, "cpu faults resolved" }, 56 { "cpu_repairs", FMD_TYPE_UINT64, "cpu faults repaired" }, 57 { "cpu_fails", FMD_TYPE_UINT64, "cpu faults unresolveable" }, 58 { "cpu_blfails", FMD_TYPE_UINT64, "failed cpu blacklists" }, 59 { "cpu_supp", FMD_TYPE_UINT64, "cpu offlines suppressed" }, 60 { "cpu_blsupp", FMD_TYPE_UINT64, "cpu blacklists suppressed" }, 61 { "page_flts", FMD_TYPE_UINT64, "page faults resolved" }, 62 { "page_repairs", FMD_TYPE_UINT64, "page faults repaired" }, 63 { "page_fails", FMD_TYPE_UINT64, "page faults unresolveable" }, 64 { "page_supp", FMD_TYPE_UINT64, "page retires suppressed" }, 65 { "page_nonent", FMD_TYPE_UINT64, "retires for non-existent fmris" }, 66 { "bad_flts", FMD_TYPE_UINT64, "invalid fault events received" }, 67 { "nop_flts", FMD_TYPE_UINT64, "inapplicable fault events received" }, 68 { "auto_flts", FMD_TYPE_UINT64, "auto-close faults received" } 69 }; 70 71 typedef struct cma_subscriber { 72 const char *subr_class; 73 const char *subr_sname; 74 uint_t subr_svers; 75 int (*subr_func)(fmd_hdl_t *, nvlist_t *, nvlist_t *, const char *, 76 boolean_t); 77 } cma_subscriber_t; 78 79 static const cma_subscriber_t cma_subrs[] = { 80 #if defined(i386) 81 /* 82 * On x86, the ASRUs are expected to be in hc scheme. When 83 * cpumem-retire wants to retire a cpu or mem page, it calls the 84 * methods registered in the topo node to do that. The topo 85 * enumerator, which necessarily knows all the config info that 86 * we'd ever need in deciding what/how to retire etc. This takes 87 * away much of that complexity from the agent into the entity 88 * that knows all config/topo information. 89 */ 90 { "fault.memory.page", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 91 cma_page_retire }, 92 { "fault.memory.page_sb", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 93 cma_page_retire }, 94 { "fault.memory.page_ck", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 95 cma_page_retire }, 96 { "fault.memory.page_ue", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 97 cma_page_retire }, 98 { "fault.memory.generic-x86.page_ce", FM_FMRI_SCHEME_HC, 99 FM_HC_SCHEME_VERSION, cma_page_retire }, 100 { "fault.memory.generic-x86.page_ue", FM_FMRI_SCHEME_HC, 101 FM_HC_SCHEME_VERSION, cma_page_retire }, 102 { "fault.memory.intel.page_ce", FM_FMRI_SCHEME_HC, 103 FM_HC_SCHEME_VERSION, cma_page_retire }, 104 { "fault.memory.intel.page_ue", FM_FMRI_SCHEME_HC, 105 FM_HC_SCHEME_VERSION, cma_page_retire }, 106 { "fault.memory.dimm", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 107 NULL }, 108 { "fault.memory.dimm_sb", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 109 NULL }, 110 { "fault.memory.dimm_ck", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 111 NULL }, 112 { "fault.memory.dimm_ue", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 113 NULL }, 114 { "fault.memory.generic-x86.dimm_ce", FM_FMRI_SCHEME_HC, 115 FM_HC_SCHEME_VERSION, NULL }, 116 { "fault.memory.generic-x86.dimm_ue", FM_FMRI_SCHEME_HC, 117 FM_HC_SCHEME_VERSION, NULL }, 118 { "fault.memory.intel.dimm_ce", FM_FMRI_SCHEME_HC, 119 FM_HC_SCHEME_VERSION, NULL }, 120 { "fault.memory.intel.dimm_ue", FM_FMRI_SCHEME_HC, 121 FM_HC_SCHEME_VERSION, NULL }, 122 { "fault.memory.intel.fbd.*", FM_FMRI_SCHEME_HC, 123 FM_HC_SCHEME_VERSION, NULL }, 124 { "fault.memory.dimm_testfail", FM_FMRI_SCHEME_HC, 125 FM_HC_SCHEME_VERSION, NULL }, 126 { "fault.memory.bank", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 127 NULL }, 128 { "fault.memory.datapath", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 129 NULL }, 130 { "fault.cpu.intel.quickpath.*", FM_FMRI_SCHEME_HC, 131 FM_HC_SCHEME_VERSION, NULL }, 132 { "fault.cpu.generic-x86.mc", FM_FMRI_SCHEME_HC, 133 FM_HC_SCHEME_VERSION, NULL }, 134 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_HC, 135 FM_HC_SCHEME_VERSION, NULL }, 136 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_CPU, 137 FM_CPU_SCHEME_VERSION, NULL }, 138 139 /* 140 * The ASRU for cpu faults are in cpu scheme on native and in hc 141 * scheme on xpv. So each cpu fault class needs to be listed twice. 142 */ 143 144 /* 145 * The following faults do NOT retire a cpu thread, 146 * and therefore must be intercepted before 147 * the default "fault.cpu.*" dispatch to cma_cpu_hc_retire. 148 */ 149 { "fault.cpu.amd.dramchannel", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 150 NULL }, 151 { "fault.cpu.amd.dramchannel", FM_FMRI_SCHEME_CPU, 152 FM_CPU_SCHEME_VERSION, NULL }, 153 { "fault.cpu.generic-x86.bus_interconnect_memory", FM_FMRI_SCHEME_HC, 154 FM_HC_SCHEME_VERSION, NULL }, 155 { "fault.cpu.generic-x86.bus_interconnect_memory", FM_FMRI_SCHEME_CPU, 156 FM_CPU_SCHEME_VERSION, NULL }, 157 { "fault.cpu.generic-x86.bus_interconnect_io", FM_FMRI_SCHEME_HC, 158 FM_HC_SCHEME_VERSION, NULL }, 159 { "fault.cpu.generic-x86.bus_interconnect_io", FM_FMRI_SCHEME_CPU, 160 FM_CPU_SCHEME_VERSION, NULL }, 161 { "fault.cpu.generic-x86.bus_interconnect", FM_FMRI_SCHEME_HC, 162 FM_HC_SCHEME_VERSION, NULL }, 163 { "fault.cpu.generic-x86.bus_interconnect", FM_FMRI_SCHEME_CPU, 164 FM_CPU_SCHEME_VERSION, NULL }, 165 { "fault.cpu.intel.bus_interconnect_memory", FM_FMRI_SCHEME_HC, 166 FM_HC_SCHEME_VERSION, NULL }, 167 { "fault.cpu.intel.bus_interconnect_memory", FM_FMRI_SCHEME_CPU, 168 FM_CPU_SCHEME_VERSION, NULL }, 169 { "fault.cpu.intel.bus_interconnect_io", FM_FMRI_SCHEME_HC, 170 FM_HC_SCHEME_VERSION, NULL }, 171 { "fault.cpu.intel.bus_interconnect_io", FM_FMRI_SCHEME_CPU, 172 FM_CPU_SCHEME_VERSION, NULL }, 173 { "fault.cpu.intel.bus_interconnect", FM_FMRI_SCHEME_HC, 174 FM_HC_SCHEME_VERSION, NULL }, 175 { "fault.cpu.intel.bus_interconnect", FM_FMRI_SCHEME_CPU, 176 FM_CPU_SCHEME_VERSION, NULL }, 177 { "fault.cpu.intel.nb.*", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 178 NULL }, 179 { "fault.cpu.intel.nb.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 180 NULL }, 181 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 182 NULL }, 183 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 184 NULL }, 185 { "fault.cpu.*", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 186 cma_cpu_hc_retire }, 187 { "fault.cpu.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 188 cma_cpu_hc_retire }, 189 #elif defined(sun4v) 190 { "fault.memory.page", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 191 cma_page_retire }, 192 { "fault.memory.dimm", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 193 NULL }, 194 { "fault.memory.dimm_sb", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 195 NULL }, 196 { "fault.memory.dimm_ck", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 197 NULL }, 198 { "fault.memory.dimm_ue", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 199 NULL }, 200 { "fault.memory.dimm-page-retires-excessive", FM_FMRI_SCHEME_MEM, 201 FM_MEM_SCHEME_VERSION, NULL }, 202 { "fault.memory.dimm-ue-imminent", FM_FMRI_SCHEME_MEM, 203 FM_MEM_SCHEME_VERSION, NULL }, 204 { "fault.memory.dram-ue-imminent", FM_FMRI_SCHEME_MEM, 205 FM_MEM_SCHEME_VERSION, NULL }, 206 { "fault.memory.bank", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 207 NULL }, 208 { "fault.memory.datapath", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 209 NULL }, 210 { "fault.memory.link-c", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 211 NULL }, 212 { "fault.memory.link-u", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 213 NULL }, 214 { "fault.memory.link-f", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 215 NULL }, 216 { "fault.memory.link-c", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 217 NULL }, 218 { "fault.memory.link-u", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 219 NULL }, 220 { "fault.memory.link-f", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 221 NULL }, 222 223 /* 224 * The following ultraSPARC-T1/T2 faults do NOT retire a cpu thread, 225 * and therefore must be intercepted before 226 * the default "fault.cpu.*" dispatch to cma_cpu_hc_retire. 227 */ 228 { "fault.cpu.*.l2cachedata", FM_FMRI_SCHEME_CPU, 229 FM_CPU_SCHEME_VERSION, NULL }, 230 { "fault.cpu.*.l2cachetag", FM_FMRI_SCHEME_CPU, 231 FM_CPU_SCHEME_VERSION, NULL }, 232 { "fault.cpu.*.l2cachectl", FM_FMRI_SCHEME_CPU, 233 FM_CPU_SCHEME_VERSION, NULL }, 234 { "fault.cpu.*.l2data-c", FM_FMRI_SCHEME_CPU, 235 FM_CPU_SCHEME_VERSION, NULL }, 236 { "fault.cpu.*.l2data-u", FM_FMRI_SCHEME_CPU, 237 FM_CPU_SCHEME_VERSION, NULL }, 238 { "fault.cpu.*.mau", FM_FMRI_SCHEME_CPU, 239 FM_CPU_SCHEME_VERSION, NULL }, 240 { "fault.cpu.*.lfu-u", FM_FMRI_SCHEME_CPU, 241 FM_CPU_SCHEME_VERSION, NULL }, 242 { "fault.cpu.*.lfu-f", FM_FMRI_SCHEME_CPU, 243 FM_CPU_SCHEME_VERSION, NULL }, 244 { "fault.cpu.*.lfu-p", FM_FMRI_SCHEME_CPU, 245 FM_CPU_SCHEME_VERSION, NULL }, 246 { "fault.cpu.ultraSPARC-T1.freg", FM_FMRI_SCHEME_CPU, 247 FM_CPU_SCHEME_VERSION, NULL }, 248 { "fault.cpu.ultraSPARC-T1.l2cachedata", FM_FMRI_SCHEME_CPU, 249 FM_CPU_SCHEME_VERSION, NULL }, 250 { "fault.cpu.ultraSPARC-T1.l2cachetag", FM_FMRI_SCHEME_CPU, 251 FM_CPU_SCHEME_VERSION, NULL }, 252 { "fault.cpu.ultraSPARC-T1.l2cachectl", FM_FMRI_SCHEME_CPU, 253 FM_CPU_SCHEME_VERSION, NULL }, 254 { "fault.cpu.ultraSPARC-T1.mau", FM_FMRI_SCHEME_CPU, 255 FM_CPU_SCHEME_VERSION, NULL }, 256 { "fault.cpu.ultraSPARC-T2plus.chip", FM_FMRI_SCHEME_HC, 257 FM_HC_SCHEME_VERSION, NULL }, 258 { "fault.cpu.*", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 259 cma_cpu_hc_retire }, 260 { "fault.cpu.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 261 cma_cpu_hc_retire }, 262 #elif defined(opl) 263 { "fault.memory.page", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 264 cma_page_retire }, 265 { "fault.memory.dimm", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 266 NULL }, 267 { "fault.memory.dimm-page-retires-excessive", FM_FMRI_SCHEME_MEM, 268 FM_MEM_SCHEME_VERSION, NULL }, 269 { "fault.memory.dimm-ue-imminent", FM_FMRI_SCHEME_MEM, 270 FM_MEM_SCHEME_VERSION, NULL }, 271 { "fault.memory.dram-ue-imminent", FM_FMRI_SCHEME_MEM, 272 FM_MEM_SCHEME_VERSION, NULL }, 273 { "fault.memory.bank", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 274 NULL }, 275 { "fault.cpu.SPARC64-VI.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 276 cma_cpu_cpu_retire }, 277 { "fault.cpu.SPARC64-VII.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 278 cma_cpu_cpu_retire }, 279 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.se", 280 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 281 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.se-offlinereq", 282 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 283 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.ce", 284 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 285 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.ce-offlinereq", 286 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 287 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.se", 288 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 289 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.se-offlinereq", 290 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 291 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.ce", 292 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 293 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.ce-offlinereq", 294 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 295 #else 296 /* 297 * For platforms excluding i386, sun4v and opl. 298 */ 299 { "fault.memory.page", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 300 cma_page_retire }, 301 { "fault.memory.page_sb", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 302 cma_page_retire }, 303 { "fault.memory.page_ck", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 304 cma_page_retire }, 305 { "fault.memory.page_ue", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 306 cma_page_retire }, 307 { "fault.memory.dimm", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 308 NULL }, 309 { "fault.memory.dimm_sb", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 310 NULL }, 311 { "fault.memory.dimm_ck", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 312 NULL }, 313 { "fault.memory.dimm_ue", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 314 NULL }, 315 { "fault.memory.dimm-page-retires-excessive", FM_FMRI_SCHEME_MEM, 316 FM_MEM_SCHEME_VERSION, NULL }, 317 { "fault.memory.dimm-ue-imminent", FM_FMRI_SCHEME_MEM, 318 FM_MEM_SCHEME_VERSION, NULL }, 319 { "fault.memory.dram-ue-imminent", FM_FMRI_SCHEME_MEM, 320 FM_MEM_SCHEME_VERSION, NULL }, 321 { "fault.memory.dimm_testfail", FM_FMRI_SCHEME_MEM, 322 FM_MEM_SCHEME_VERSION, NULL }, 323 { "fault.memory.bank", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 324 NULL }, 325 { "fault.memory.datapath", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 326 NULL }, 327 328 /* 329 * The following faults do NOT retire a cpu thread, 330 * and therefore must be intercepted before 331 * the default "fault.cpu.*" dispatch to cma_cpu_cpu_retire. 332 */ 333 { "fault.cpu.ultraSPARC-IVplus.l2cachedata-line", 334 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 335 cma_cache_way_retire }, 336 { "fault.cpu.ultraSPARC-IVplus.l3cachedata-line", 337 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 338 cma_cache_way_retire }, 339 { "fault.cpu.ultraSPARC-IVplus.l2cachetag-line", 340 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 341 cma_cache_way_retire }, 342 { "fault.cpu.ultraSPARC-IVplus.l3cachetag-line", 343 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 344 cma_cache_way_retire }, 345 346 /* 347 * Default "fault.cpu.*" for "cpu" scheme ASRU dispatch. 348 */ 349 { "fault.cpu.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 350 cma_cpu_cpu_retire }, 351 #endif 352 { NULL, NULL, 0, NULL } 353 }; 354 355 static const cma_subscriber_t * 356 nvl2subr(fmd_hdl_t *hdl, nvlist_t *nvl, nvlist_t **asrup) 357 { 358 const cma_subscriber_t *sp; 359 nvlist_t *asru; 360 char *scheme; 361 uint8_t version; 362 boolean_t retire; 363 364 if (nvlist_lookup_boolean_value(nvl, FM_SUSPECT_RETIRE, &retire) == 0 && 365 retire == 0) { 366 fmd_hdl_debug(hdl, "cma_recv: retire suppressed"); 367 return (NULL); 368 } 369 370 if (nvlist_lookup_nvlist(nvl, FM_FAULT_ASRU, &asru) != 0 || 371 nvlist_lookup_string(asru, FM_FMRI_SCHEME, &scheme) != 0 || 372 nvlist_lookup_uint8(asru, FM_VERSION, &version) != 0) { 373 cma_stats.bad_flts.fmds_value.ui64++; 374 return (NULL); 375 } 376 377 for (sp = cma_subrs; sp->subr_class != NULL; sp++) { 378 if (fmd_nvl_class_match(hdl, nvl, sp->subr_class) && 379 strcmp(scheme, sp->subr_sname) == 0 && 380 version <= sp->subr_svers) { 381 *asrup = asru; 382 return (sp); 383 } 384 } 385 386 cma_stats.nop_flts.fmds_value.ui64++; 387 return (NULL); 388 } 389 390 static void 391 cma_recv_list(fmd_hdl_t *hdl, nvlist_t *nvl, const char *class) 392 { 393 char *uuid = NULL; 394 nvlist_t **nva; 395 uint_t nvc = 0; 396 uint_t keepopen; 397 int err = 0; 398 nvlist_t *asru = NULL; 399 #ifndef i386 400 uint32_t index; 401 #endif 402 403 err |= nvlist_lookup_string(nvl, FM_SUSPECT_UUID, &uuid); 404 err |= nvlist_lookup_nvlist_array(nvl, FM_SUSPECT_FAULT_LIST, 405 &nva, &nvc); 406 if (err != 0) { 407 cma_stats.bad_flts.fmds_value.ui64++; 408 return; 409 } 410 411 keepopen = nvc; 412 while (nvc-- != 0 && (strcmp(class, FM_LIST_SUSPECT_CLASS) != 0 || 413 !fmd_case_uuclosed(hdl, uuid))) { 414 nvlist_t *nvl = *nva++; 415 const cma_subscriber_t *subr; 416 int has_fault; 417 418 if ((subr = nvl2subr(hdl, nvl, &asru)) == NULL) 419 continue; 420 421 /* 422 * A handler returns CMA_RA_SUCCESS to indicate that 423 * from this suspects point-of-view the case may be 424 * closed, CMA_RA_FAILURE otherwise. 425 * A handler must not close the case itself. 426 */ 427 if (subr->subr_func != NULL) { 428 has_fault = fmd_nvl_fmri_has_fault(hdl, asru, 429 FMD_HAS_FAULT_ASRU, NULL); 430 if (strcmp(class, FM_LIST_SUSPECT_CLASS) == 0) { 431 if (has_fault == 1) 432 err = subr->subr_func(hdl, nvl, asru, 433 uuid, 0); 434 } else { 435 if (has_fault == 0) 436 err = subr->subr_func(hdl, nvl, asru, 437 uuid, 1); 438 } 439 if (err == CMA_RA_SUCCESS) 440 keepopen--; 441 } 442 } 443 444 #ifndef i386 445 /* 446 * Do not close the case if we are handling cache faults. 447 */ 448 if (asru != NULL) { 449 if (nvlist_lookup_uint32(asru, FM_FMRI_CPU_CACHE_INDEX, 450 &index) != 0) { 451 if (!keepopen && strcmp(class, 452 FM_LIST_SUSPECT_CLASS) == 0) { 453 fmd_case_uuclose(hdl, uuid); 454 } 455 } 456 } 457 #endif 458 459 if (!keepopen && strcmp(class, FM_LIST_REPAIRED_CLASS) == 0) 460 fmd_case_uuresolved(hdl, uuid); 461 } 462 463 static void 464 cma_recv_one(fmd_hdl_t *hdl, nvlist_t *nvl) 465 { 466 const cma_subscriber_t *subr; 467 nvlist_t *asru; 468 469 if ((subr = nvl2subr(hdl, nvl, &asru)) == NULL) 470 return; 471 472 if (subr->subr_func != NULL) { 473 if (fmd_nvl_fmri_has_fault(hdl, asru, 474 FMD_HAS_FAULT_ASRU, NULL) == 1) 475 (void) subr->subr_func(hdl, nvl, asru, NULL, 0); 476 } 477 } 478 479 /*ARGSUSED*/ 480 static void 481 cma_recv(fmd_hdl_t *hdl, fmd_event_t *ep, nvlist_t *nvl, const char *class) 482 { 483 fmd_hdl_debug(hdl, "received %s\n", class); 484 485 if (strcmp(class, FM_LIST_SUSPECT_CLASS) == 0 || 486 strcmp(class, FM_LIST_REPAIRED_CLASS) == 0 || 487 strcmp(class, FM_LIST_UPDATED_CLASS) == 0) 488 cma_recv_list(hdl, nvl, class); 489 else 490 cma_recv_one(hdl, nvl); 491 } 492 493 /*ARGSUSED*/ 494 static void 495 cma_timeout(fmd_hdl_t *hdl, id_t id, void *arg) 496 { 497 if (id == cma.cma_page_timerid) 498 cma_page_retry(hdl); 499 #ifdef sun4v 500 /* 501 * cpu offline/online needs to be retried on sun4v because 502 * ldom request can be asynchronous. 503 */ 504 else if (id == cma.cma_cpu_timerid) 505 cma_cpu_retry(hdl); 506 #endif 507 } 508 509 #ifdef sun4v 510 static void * 511 cma_init_alloc(size_t size) 512 { 513 return (fmd_hdl_alloc(init_hdl, size, FMD_SLEEP)); 514 } 515 516 static void 517 cma_init_free(void *addr, size_t size) 518 { 519 fmd_hdl_free(init_hdl, addr, size); 520 } 521 #endif 522 523 static const fmd_hdl_ops_t fmd_ops = { 524 cma_recv, /* fmdo_recv */ 525 cma_timeout, /* fmdo_timeout */ 526 NULL, /* fmdo_close */ 527 NULL, /* fmdo_stats */ 528 NULL, /* fmdo_gc */ 529 }; 530 531 static const fmd_prop_t fmd_props[] = { 532 { "cpu_tries", FMD_TYPE_UINT32, "10" }, 533 { "cpu_delay", FMD_TYPE_TIME, "1sec" }, 534 #ifdef sun4v 535 { "cpu_ret_mindelay", FMD_TYPE_TIME, "5sec" }, 536 { "cpu_ret_maxdelay", FMD_TYPE_TIME, "5min" }, 537 #endif /* sun4v */ 538 { "cpu_offline_enable", FMD_TYPE_BOOL, "true" }, 539 { "cpu_online_enable", FMD_TYPE_BOOL, "true" }, 540 { "cpu_forced_offline", FMD_TYPE_BOOL, "true" }, 541 #ifdef opl 542 { "cpu_blacklist_enable", FMD_TYPE_BOOL, "false" }, 543 { "cpu_unblacklist_enable", FMD_TYPE_BOOL, "false" }, 544 #else 545 { "cpu_blacklist_enable", FMD_TYPE_BOOL, "true" }, 546 { "cpu_unblacklist_enable", FMD_TYPE_BOOL, "true" }, 547 #endif /* opl */ 548 { "page_ret_mindelay", FMD_TYPE_TIME, "1sec" }, 549 { "page_ret_maxdelay", FMD_TYPE_TIME, "5min" }, 550 { "page_retire_enable", FMD_TYPE_BOOL, "true" }, 551 { "page_unretire_enable", FMD_TYPE_BOOL, "true" }, 552 { NULL, 0, NULL } 553 }; 554 555 static const fmd_hdl_info_t fmd_info = { 556 "CPU/Memory Retire Agent", CMA_VERSION, &fmd_ops, fmd_props 557 }; 558 559 void 560 _fmd_init(fmd_hdl_t *hdl) 561 { 562 hrtime_t nsec; 563 #ifdef i386 564 char buf[BUFSIZ]; 565 const char *dom0 = "control_d"; 566 567 /* 568 * Abort the cpumem-retire module if Solaris is running under DomU. 569 */ 570 if (sysinfo(SI_PLATFORM, buf, sizeof (buf)) == -1) 571 return; 572 573 if (strncmp(buf, "i86pc", sizeof (buf)) == 0) { 574 cma_is_native = B_TRUE; 575 } else if (strncmp(buf, "i86xpv", sizeof (buf)) != 0) { 576 return; 577 } else { 578 int fd = open("/dev/xen/domcaps", O_RDONLY); 579 580 if (fd != -1) { 581 if (read(fd, buf, sizeof (buf)) <= 0 || 582 strncmp(buf, dom0, strlen(dom0)) != 0) { 583 (void) close(fd); 584 return; 585 } 586 (void) close(fd); 587 } 588 cma_is_native = B_FALSE; 589 } 590 #endif /* i386 */ 591 592 if (fmd_hdl_register(hdl, FMD_API_VERSION, &fmd_info) != 0) 593 return; /* invalid data in configuration file */ 594 595 fmd_hdl_subscribe(hdl, "fault.cpu.*"); 596 fmd_hdl_subscribe(hdl, "fault.memory.*"); 597 #ifdef opl 598 fmd_hdl_subscribe(hdl, "fault.chassis.SPARC-Enterprise.cpu.*"); 599 #endif 600 601 (void) fmd_stat_create(hdl, FMD_STAT_NOALLOC, sizeof (cma_stats) / 602 sizeof (fmd_stat_t), (fmd_stat_t *)&cma_stats); 603 604 cma.cma_cpu_tries = fmd_prop_get_int32(hdl, "cpu_tries"); 605 606 nsec = fmd_prop_get_int64(hdl, "cpu_delay"); 607 cma.cma_cpu_delay.tv_sec = nsec / NANOSEC; 608 cma.cma_cpu_delay.tv_nsec = nsec % NANOSEC; 609 610 cma.cma_page_mindelay = fmd_prop_get_int64(hdl, "page_ret_mindelay"); 611 cma.cma_page_maxdelay = fmd_prop_get_int64(hdl, "page_ret_maxdelay"); 612 613 #ifdef sun4v 614 cma.cma_cpu_mindelay = fmd_prop_get_int64(hdl, "cpu_ret_mindelay"); 615 cma.cma_cpu_maxdelay = fmd_prop_get_int64(hdl, "cpu_ret_maxdelay"); 616 #endif 617 618 cma.cma_cpu_dooffline = fmd_prop_get_int32(hdl, "cpu_offline_enable"); 619 cma.cma_cpu_forcedoffline = fmd_prop_get_int32(hdl, 620 "cpu_forced_offline"); 621 cma.cma_cpu_doonline = fmd_prop_get_int32(hdl, "cpu_online_enable"); 622 cma.cma_cpu_doblacklist = fmd_prop_get_int32(hdl, 623 "cpu_blacklist_enable"); 624 cma.cma_cpu_dounblacklist = fmd_prop_get_int32(hdl, 625 "cpu_unblacklist_enable"); 626 cma.cma_page_doretire = fmd_prop_get_int32(hdl, "page_retire_enable"); 627 cma.cma_page_dounretire = fmd_prop_get_int32(hdl, 628 "page_unretire_enable"); 629 630 if (cma.cma_page_maxdelay < cma.cma_page_mindelay) 631 fmd_hdl_abort(hdl, "page retirement delays conflict\n"); 632 633 #ifdef sun4v 634 init_hdl = hdl; 635 cma_lhp = ldom_init(cma_init_alloc, cma_init_free); 636 #endif 637 } 638 639 void 640 _fmd_fini(fmd_hdl_t *hdl) 641 { 642 #ifdef sun4v 643 ldom_fini(cma_lhp); 644 cma_cpu_fini(hdl); 645 #endif 646 cma_page_fini(hdl); 647 } 648