1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27#pragma ident "%Z%%M% %I% %E% SMI" 28 29#pragma dictionary "INTEL" 30 31/* 32 * Eversholt rules for the intel CPU/Memory 33 */ 34 35/* CPU errors detected through MCA */ 36 37fru motherboard/chip; 38 39asru motherboard/chip/cpu; 40 41/* 42 * Ereports for Simple error codes. 43 */ 44 45#define SMPL_EVENT(leafclass, t) \ 46 event ereport.cpu.intel.leafclass@chip/cpu { within(t) } 47 48SMPL_EVENT(unknown, 1s); 49SMPL_EVENT(unclassified, 1s); 50SMPL_EVENT(microcode_rom_parity, 1s); 51SMPL_EVENT(external, 1s); 52SMPL_EVENT(frc, 1s); 53SMPL_EVENT(internal_timer, 1s); 54SMPL_EVENT(internal_unclassified, 1s); 55 56/* 57 * Propogations for all but "external" and "unknown" simple errors. 58 * If the error is uncorrected we produce a fault immediately, otherwise 59 * we diagnose it to an upset and decalre a fault when the SERD engine 60 * trips. 61 */ 62 63/* Simple fault event */ 64event fault.cpu.intel.internal@chip/cpu, 65 ASRU=motherboard/chip/cpu, FRU=motherboard/chip, 66 FITrate=1000; 67 68/* Produced when the correctable engine trips */ 69event ereport.cpu.intel.simple_trip@chip/cpu { within(1s) }; 70 71/* Upset to diagnose corrected events to */ 72event upset.cpu.intel.simple@chip/cpu 73 engine=serd.cpu.intel.simple@chip/cpu; 74 75/* SERD engine for corrected simple errors */ 76engine serd.cpu.intel.simple@chip/cpu, 77 N=3, T=72h, method=persistent, 78 trip=ereport.cpu.intel.simple_trip@chip/cpu; 79 80#define STATUS_UC \ 81 (payloadprop("error_uncorrected") + 0 == 1) 82 83/* Diagnose corrected events to upsets */ 84prop upset.cpu.intel.simple@chip/cpu 85 { !STATUS_UC } (1)-> 86 ereport.cpu.intel.microcode_rom_parity@chip/cpu, 87 ereport.cpu.intel.internal_timer@chip/cpu, 88 ereport.cpu.intel.unclassified@chip/cpu, 89 ereport.cpu.intel.internal_unclassified@chip/cpu, 90 ereport.cpu.intel.frc@chip/cpu; 91 92/* When the correctable engine trips, diagnose a fault */ 93prop fault.cpu.intel.internal@chip/cpu (0)-> 94 ereport.cpu.intel.simple_trip@chip/cpu; 95 96/* Diagnose uncorrected events to faults */ 97prop fault.cpu.intel.internal@chip/cpu 98 { STATUS_UC } (0)-> 99 ereport.cpu.intel.microcode_rom_parity@chip/cpu, 100 ereport.cpu.intel.internal_timer@chip/cpu, 101 ereport.cpu.intel.unclassified@chip/cpu, 102 ereport.cpu.intel.internal_unclassified@chip/cpu, 103 ereport.cpu.intel.frc@chip/cpu; 104 105/* 106 * Ereports for Compound error codes. These are in pairs "foo" and "foo_uc" 107 * for the corrected and uncorrected version of each error type. All are 108 * detected at chip/cpu. 109 */ 110 111#define CMPND_EVENT(leafclass, t) \ 112 event ereport.cpu.intel.leafclass@chip/cpu { within(t) }; \ 113 event ereport.cpu.intel.leafclass/**/_uc@chip/cpu { within(t) } 114 115/* 116 * Ereports for Compound error codes - intel errors 117 */ 118CMPND_EVENT(l0cache, 1s); 119CMPND_EVENT(l1cache, 1s); 120CMPND_EVENT(l2cache, 1s); 121CMPND_EVENT(cache, 1s); 122 123/* 124 * Ereports for Compound error codes - TLB errors 125 */ 126CMPND_EVENT(l0dtlb, 1s); 127CMPND_EVENT(l1dtlb, 1s); 128CMPND_EVENT(l2dtlb, 1s); 129CMPND_EVENT(dtlb, 1s); 130 131CMPND_EVENT(l0itlb, 1s); 132CMPND_EVENT(l1itlb, 1s); 133CMPND_EVENT(l2itlb, 1s); 134CMPND_EVENT(itlb, 1s); 135 136CMPND_EVENT(l0tlb, 1s); 137CMPND_EVENT(l1tlb, 1s); 138CMPND_EVENT(l2tlb, 1s); 139CMPND_EVENT(tlb, 1s); 140 141/* 142 * Ereports for Compound error codes - memory hierarchy errors 143 */ 144CMPND_EVENT(l0dcache, 1s); 145CMPND_EVENT(l1dcache, 1s); 146CMPND_EVENT(l2dcache, 1s); 147CMPND_EVENT(dcache, 1s); 148 149CMPND_EVENT(l0icache, 1s); 150CMPND_EVENT(l1icache, 1s); 151CMPND_EVENT(l2icache, 1s); 152CMPND_EVENT(icache, 1s); 153 154/* 155 * Ereports for Compound error codes - bus and interconnect errors 156 */ 157CMPND_EVENT(bus_interconnect, 1s); 158CMPND_EVENT(bus_interconnect_memory, 1s); 159CMPND_EVENT(bus_interconnect_io, 1s); 160 161/* 162 * Compound error propogations. 163 * 164 * We resist the temptation propogate, for example, a single dcache fault 165 * to all ereports mentioning dcache (l0dcache, l1dcache, l2dcache, dcache). 166 * Instead we will diagnose a distinct fault for each possible cache level, 167 * whether or not current chips have dcaches at all levels. 168 * 169 * Corrected errors are SERDed and produce a fault when the engine fires; 170 * the same fault is diagnosed immediately for a corresponding uncorrected 171 * error. 172 */ 173 174#define CMPND_FLT_PROP_1(erptleaf, fltleaf, n, t) \ 175 /* Declare the fault that we can diagnose here */ \ 176 event fault.cpu.intel.fltleaf@chip/cpu, \ 177 FITrate=1000, \ 178 FRU=motherboard/chip, \ 179 ASRU=motherboard/chip/cpu; \ 180 \ 181 /* Produced when the correctable engine trips */ \ 182 event ereport.cpu.intel.fltleaf/**/_error@chip/cpu { within(1s) }; \ 183 \ 184 /* Upset to diagnose corrected events to */ \ 185 event upset.cpu.intel.fltleaf@chip/cpu, \ 186 engine=serd.cpu.intel.fltleaf@chip/cpu; \ 187 \ 188 /* SERD engine for corrected events */ \ 189 engine serd.cpu.intel.fltleaf@chip/cpu, \ 190 N=n, T=t, method=persistent, \ 191 trip=ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 192 \ 193 /* Diagnose corrected events to the corresponding upset */ \ 194 prop upset.cpu.intel.fltleaf@chip/cpu (1)-> \ 195 ereport.cpu.intel.erptleaf@chip/cpu; \ 196 \ 197 /* When the engine trip, diagnose a fault */ \ 198 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 199 ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 200 \ 201 /* Produce immediate faults for uncorrected errors */ \ 202 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 203 ereport.cpu.intel.erptleaf/**/_uc@chip/cpu 204 205#define CMPND_FLT_PROP_2(erptleaf, fltleaf, n, t) \ 206 /* Declare the fault that we can diagnose here */ \ 207 event fault.cpu.intel.fltleaf@chip/cpu, \ 208 FITrate=1, \ 209 ASRU=motherboard/chip/cpu; \ 210 \ 211 /* Produced when the correctable engine trips */ \ 212 event ereport.cpu.intel.fltleaf/**/_error@chip/cpu { within(1s) }; \ 213 \ 214 /* Upset to diagnose corrected events to */ \ 215 event upset.cpu.intel.fltleaf@chip/cpu, \ 216 engine=serd.cpu.intel.fltleaf@chip/cpu; \ 217 \ 218 /* SERD engine for corrected events */ \ 219 engine serd.cpu.intel.fltleaf@chip/cpu, \ 220 N=n, T=t, method=persistent, \ 221 trip=ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 222 \ 223 /* Diagnose corrected events to the corresponding upset */ \ 224 prop upset.cpu.intel.fltleaf@chip/cpu (1)-> \ 225 ereport.cpu.intel.erptleaf@chip/cpu; \ 226 \ 227 /* When the engine trip, diagnose a fault */ \ 228 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 229 ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 230 \ 231 /* Produce immediate faults for uncorrected errors */ \ 232 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 233 ereport.cpu.intel.erptleaf/**/_uc@chip/cpu 234 235 236CMPND_FLT_PROP_1(l0cache, l0cache, 3, 72h); 237CMPND_FLT_PROP_1(l1cache, l1cache, 3, 72h); 238CMPND_FLT_PROP_1(l2cache, l2cache, 3, 72h); 239CMPND_FLT_PROP_1(cache, cache, 12, 72h); 240 241CMPND_FLT_PROP_1(l0dtlb, l0dtlb, 3, 72h); 242CMPND_FLT_PROP_1(l1dtlb, l1dtlb, 3, 72h); 243CMPND_FLT_PROP_1(l2dtlb, l2dtlb, 3, 72h); 244CMPND_FLT_PROP_1(dtlb, dtlb, 12, 72h); 245 246CMPND_FLT_PROP_1(l0itlb, l0itlb, 3, 72h); 247CMPND_FLT_PROP_1(l1itlb, l1itlb, 3, 72h); 248CMPND_FLT_PROP_1(l2itlb, l2itlb, 3, 72h); 249CMPND_FLT_PROP_1(itlb, itlb, 12, 72h); 250 251CMPND_FLT_PROP_1(l0tlb, litlb, 3, 72h); 252CMPND_FLT_PROP_1(l1tlb, litlb, 3, 72h); 253CMPND_FLT_PROP_1(l2tlb, litlb, 3, 72h); 254CMPND_FLT_PROP_1(tlb, tlb, 12, 72h); 255 256CMPND_FLT_PROP_1(l0dcache, l0dcache, 3, 72h); 257CMPND_FLT_PROP_1(l1dcache, l1dcache, 3, 72h); 258CMPND_FLT_PROP_1(l2dcache, l2dcache, 3, 72h); 259CMPND_FLT_PROP_1(dcache, dcache, 12, 72h); 260 261CMPND_FLT_PROP_1(l0icache, l0icache, 3, 72h); 262CMPND_FLT_PROP_1(l1icache, l1icache, 3, 72h); 263CMPND_FLT_PROP_1(l2icache, l2icache, 3, 72h); 264CMPND_FLT_PROP_1(icache, icache, 12, 72h); 265 266CMPND_FLT_PROP_2(bus_interconnect, bus_interconnect, 10, 72h); 267CMPND_FLT_PROP_2(bus_interconnect_memory, bus_interconnect_memory, 10, 72h); 268CMPND_FLT_PROP_2(bus_interconnect_io, bus_interconnect_io, 10, 72h); 269 270event upset.discard@chip/cpu; 271 272prop upset.discard@chip/cpu (0)-> 273 ereport.cpu.intel.external@chip/cpu, 274 ereport.cpu.intel.unknown@chip/cpu; 275 276/* errors detected in northbridge */ 277 278 279/* 280 * SET_ADDR and SET_OFFSET are used to set a payload value in the fault that 281 * we diagnose for page faults, to record the physical address of the faulting 282 * page. The "asru-" prefix is hooked in the "rewrite-ASRU" confcalls made on 283 * diagnosis of associated faults when the libtopo mem scheme rewrites the 284 * asru in "mem" scheme. 285 */ 286#define SET_ADDR (!payloadprop_defined("physaddr") || \ 287 setpayloadprop("asru-physaddr", payloadprop("physaddr"))) 288 289#define SET_OFFSET (!payloadprop_defined("offset") || \ 290 setpayloadprop("asru-offset", payloadprop("offset"))) 291 292#define CE_PGFLTS \ 293 (count(stat.ce_pgflt@motherboard/memory-controller/dram-channel/dimm)) 294#define UE_DIMM \ 295 (count(stat.ue_dimm@motherboard/memory-controller/dram-channel/dimm)) 296 297#define PAGE_FIT 1 298#define PAGE_CE_COUNT 2 299#define PAGE_CE_TIME 72h 300 301fru motherboard; 302asru motherboard; 303fru motherboard/memory-controller/dram-channel; 304asru motherboard/memory-controller/dram-channel; 305fru motherboard/memory-controller/dram-channel/dimm; 306asru motherboard/memory-controller/dram-channel/dimm; 307asru motherboard/memory-controller/dram-channel/dimm/rank; 308asru motherboard/chip; 309 310engine stat.ce_pgflt@motherboard/memory-controller/dram-channel/dimm; 311engine stat.ue_dimm@motherboard/memory-controller/dram-channel/dimm; 312 313event ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller{within(12s)}; 314event ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller{within(12s)}; 315event fault.memory.intel.page_ue@ 316 motherboard/memory-controller/dram-channel/dimm/rank, 317 FITrate=PAGE_FIT, 318 FRU=motherboard/memory-controller/dram-channel/dimm, 319 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, message=0, 320 action=confcall("rewrite-ASRU"); /* rewrite ASRU to identify page in rank */ 321event ereport.memory.page_ue_trip@motherboard/memory-controller{within(12s)}; 322engine serd.memory.intel.page_ue@motherboard/memory-controller, 323 N=0, T=1h, method=persistent, 324 trip=ereport.memory.page_ue_trip@motherboard/memory-controller; 325event upset.memory.intel.page_ue@motherboard/memory-controller, 326 engine=serd.memory.intel.page_ue@motherboard/memory-controller; 327 328prop upset.memory.intel.page_ue@motherboard/memory-controller (0)-> 329 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 330 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 331 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 332 ereport.cpu.intel.bus_interconnect@chip/cpu, 333 ereport.cpu.intel.external@chip/cpu; 334 335prop upset.memory.intel.page_ue@motherboard/memory-controller (1)-> 336 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 337 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 338 339prop fault.memory.intel.page_ue@ 340 motherboard/memory-controller/dram-channel/dimm/rank[rank_num] 341 { UE_DIMM > 0 && payloadprop_defined("rank") && 342 rank_num == payloadprop("rank") && 343 (payloadprop_defined("physaddr") || payloadprop_defined("offset")) && 344 SET_ADDR && SET_OFFSET } (1)-> 345 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 346 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 347 348prop fault.memory.intel.page_ue@ 349 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 350 ereport.memory.page_ue_trip@motherboard/memory-controller; 351 352event upset.memory.intel.discard@motherboard/memory-controller{within(1s)}; 353 354prop upset.memory.intel.discard@motherboard/memory-controller 355 { !payloadprop_defined("rank") || (!payloadprop_defined("physaddr") && 356 !payloadprop_defined("offset")) } (1)-> 357 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 358 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 359 360prop upset.memory.intel.discard@motherboard/memory-controller (0)-> 361 ereport.memory.page_ue_trip@motherboard/memory-controller, 362 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 363 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 364 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 365 ereport.cpu.intel.bus_interconnect@chip/cpu, 366 ereport.cpu.intel.external@chip/cpu; 367 368#define DIMM_UE_FIT 1000 369 370event fault.memory.intel.dimm_ue@ 371 motherboard/memory-controller/dram-channel/dimm/rank, 372 FITrate=DIMM_UE_FIT, FRU=motherboard/memory-controller/dram-channel/dimm, 373 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 374 count=stat.dimm_flt@motherboard/memory-controller/dram-channel/dimm, 375 action=confcall("rewrite-ASRU"); /* rewrite non-leaf ASRU in mem scheme */ 376event ereport.memory.dimm_ue_trip@motherboard/memory-controller{within(12s)}; 377engine serd.memory.intel.dimm_ue@motherboard/memory-controller, 378 N=0, T=1h, method=persistent, 379 trip=ereport.memory.dimm_ue_trip@motherboard/memory-controller; 380event upset.memory.intel.dimm_ue@motherboard/memory-controller, 381 engine=serd.memory.intel.dimm_ue@motherboard/memory-controller; 382 383prop upset.memory.intel.dimm_ue@ motherboard/memory-controller (1)-> 384 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 385 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 386 387prop fault.memory.intel.dimm_ue@ 388 motherboard/memory-controller/dram-channel<channel_num>/dimm/rank[rank_num] 389 { payloadprop_defined("rank") && rank_num == payloadprop("rank") } (1)-> 390 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 391 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 392 393prop upset.memory.intel.dimm_ue@ 394 motherboard/memory-controller (0)-> 395 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 396 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 397 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 398 ereport.cpu.intel.bus_interconnect@chip/cpu, 399 ereport.cpu.intel.external@chip/cpu; 400 401prop fault.memory.intel.dimm_ue@ 402 motherboard/memory-controller/dram-channel/dimm/rank (0)-> 403 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 404 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 405 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 406 ereport.cpu.intel.bus_interconnect@chip/cpu, 407 ereport.cpu.intel.external@chip/cpu; 408 409prop fault.memory.intel.dimm_ue@ 410 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 411 ereport.memory.dimm_ue_trip@motherboard/memory-controller; 412 413event upset.memory.intel.discard1@motherboard/memory-controller{within(1s)}; 414 415prop upset.memory.intel.discard1@motherboard/memory-controller 416 { !payloadprop_defined("rank") } (1)-> 417 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 418 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 419 420prop upset.memory.intel.discard1@motherboard/memory-controller (0)-> 421 ereport.memory.dimm_ue_trip@motherboard/memory-controller, 422 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 423 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 424 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 425 ereport.cpu.intel.bus_interconnect@chip/cpu, 426 ereport.cpu.intel.external@chip/cpu; 427 428event ereport.memory.intel.page_trip@ 429 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 430event ereport.cpu.intel.nb.mem_ce@ 431 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 432 433engine serd.memory.intel.page_ce@ 434 motherboard/memory-controller/dram-channel/dimm/rank, 435 N=PAGE_CE_COUNT, T=PAGE_CE_TIME, method=persistent, 436 trip=ereport.memory.intel.page_trip@ 437 motherboard/memory-controller/dram-channel/dimm/rank; 438event upset.memory.intel.page_ce@ 439 motherboard/memory-controller/dram-channel/dimm/rank, 440 engine=serd.memory.intel.page_ce@ 441 motherboard/memory-controller/dram-channel/dimm/rank; 442 443event fault.memory.intel.page_ce@ 444 motherboard/memory-controller/dram-channel/dimm/rank, 445 FITrate=PAGE_FIT, 446 FRU=motherboard/memory-controller/dram-channel/dimm, 447 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, message=0, 448 count=stat.ce_pgflt@motherboard/memory-controller/dram-channel/dimm, 449 action=confcall("rewrite-ASRU"); /* rewrite ASRU to identify page in rank */ 450 451prop fault.memory.intel.page_ce@ 452 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 453 ereport.memory.intel.page_trip@ 454 motherboard/memory-controller/dram-channel/dimm/rank; 455 456prop fault.memory.intel.page_ce@ 457 motherboard/memory-controller/dram-channel/dimm/rank 458 { (payloadprop_defined("physaddr") || payloadprop_defined("offset")) && 459 SET_ADDR && SET_OFFSET } (0)-> 460 ereport.cpu.intel.nb.mem_ce@ 461 motherboard/memory-controller/dram-channel/dimm/rank; 462 463prop upset.memory.intel.page_ce@ 464 motherboard/memory-controller/dram-channel/dimm/rank 465 { (payloadprop_defined("physaddr") || payloadprop_defined("offset")) && 466 SET_ADDR && SET_OFFSET } (1)-> 467 ereport.cpu.intel.nb.mem_ce@ 468 motherboard/memory-controller/dram-channel/dimm/rank; 469 470#define DIMM_CE_FIT 2000 471#define DIMM_CE_COUNT 10 472#define DIMM_CE_TIME 1week 473 474event fault.memory.intel.dimm_ce@ 475 motherboard/memory-controller/dram-channel/dimm/rank, 476 FITrate=DIMM_CE_FIT, FRU=motherboard/memory-controller/dram-channel/dimm, 477 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 478 action=confcall("rewrite-ASRU"); /* rewrite non-leaf ASRU in mem scheme */ 479event upset.memory.discard@motherboard/memory-controller/dram-channel/dimm/rank; 480 481event ereport.memory.intel.dimm_trip@ 482 motherboard/memory-controller/dram-channel/dimm/rank{within(1s)}; 483#define DIMM_CE(label, dimm_size, n, t, fault_rate) \ 484 engine serd.memory.intel.dimm_ce.label/**/@ \ 485 motherboard/memory-controller/dram-channel/dimm/rank, \ 486 N=n, T=t, method=persistent, \ 487 trip=ereport.memory.intel.dimm_trip@ \ 488 motherboard/memory-controller/dram-channel/dimm/rank; \ 489 event upset.memory.intel.dimm_ce.label/**/@ \ 490 motherboard/memory-controller/dram-channel/dimm/rank, \ 491 engine=serd.memory.intel.dimm_ce.label/**/@ \ 492 motherboard/memory-controller/dram-channel/dimm/rank; \ 493 prop upset.memory.intel.dimm_ce.label/**/@ \ 494 motherboard/memory-controller/dram-channel/dimm/rank \ 495 {confprop_defined( \ 496 fru(motherboard/memory-controller/dram-channel/dimm), \ 497 "dimm-size") && \ 498 confprop(fru(motherboard/memory-controller/dram-channel/dimm), \ 499 "dimm-size") == dimm_size && CE_PGFLTS > fault_rate} (1)-> \ 500 ereport.cpu.intel.nb.mem_ce@ \ 501 motherboard/memory-controller/dram-channel/dimm/rank; 502 503DIMM_CE(eight_g, "8G", 8, 1week, 2000) 504DIMM_CE(four_g, "4G", 4, 1week, 1500) 505DIMM_CE(two_g, "2G", 4, 2week, 1000) 506DIMM_CE(one_g, "1G", 4, 4week, 500) 507DIMM_CE(half_g, "512M", 4, 8week, 250) 508DIMM_CE(quarter_g, "256M", 4, 16week, 125) 509 510engine serd.memory.intel.dimm_ce@ 511 motherboard/memory-controller/dram-channel/dimm/rank, 512 N=DIMM_CE_COUNT, T=DIMM_CE_TIME, method=persistent, 513 trip=ereport.memory.intel.dimm_trip@ 514 motherboard/memory-controller/dram-channel/dimm/rank; 515event upset.memory.intel.dimm_ce@ 516 motherboard/memory-controller/dram-channel/dimm/rank, 517 engine=serd.memory.intel.dimm_ce@ 518 motherboard/memory-controller/dram-channel/dimm/rank; 519prop upset.memory.intel.dimm_ce@ 520 motherboard/memory-controller/dram-channel/dimm/rank 521 {!confprop_defined(fru(motherboard/memory-controller/dram-channel/dimm), 522 "dimm-size") && CE_PGFLTS > 512} (1)-> 523 ereport.cpu.intel.nb.mem_ce@ 524 motherboard/memory-controller/dram-channel/dimm/rank; 525 526prop fault.memory.intel.dimm_ce@ 527 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 528 ereport.memory.intel.dimm_trip@ 529 motherboard/memory-controller/dram-channel/dimm/rank; 530 531prop upset.memory.discard@ 532 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 533 ereport.memory.intel.dimm_trip@ 534 motherboard/memory-controller/dram-channel/dimm/rank; 535 536event ereport.cpu.intel.nb.fbd.alert@ 537 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 538event fault.memory.intel.fbd.alert@ 539 motherboard/memory-controller/dram-channel/dimm/rank, 540 FITrate=100, ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 541 FRU=motherboard/memory-controller/dram-channel/dimm; 542 543prop fault.memory.intel.fbd.alert@ 544 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 545 ereport.cpu.intel.nb.fbd.alert@ 546 motherboard/memory-controller/dram-channel/dimm/rank; 547 548prop fault.memory.intel.fbd.alert@ 549 motherboard/memory-controller/dram-channel/dimm/rank (0)-> 550 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 551 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 552 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 553 ereport.cpu.intel.bus_interconnect@chip/cpu, 554 ereport.cpu.intel.external@chip/cpu; 555 556event ereport.cpu.intel.nb.fbd.crc@ 557 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 558event fault.memory.intel.fbd.crc@ 559 motherboard/memory-controller/dram-channel/dimm/rank, 560 FITrate=100, ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 561 FRU=motherboard/memory-controller/dram-channel/dimm; 562 563prop fault.memory.intel.fbd.crc@ 564 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 565 ereport.cpu.intel.nb.fbd.crc@ 566 motherboard/memory-controller/dram-channel/dimm/rank; 567 568prop fault.memory.intel.fbd.crc@ 569 motherboard/memory-controller/dram-channel/dimm/rank (0)-> 570 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 571 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 572 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 573 ereport.cpu.intel.bus_interconnect@chip/cpu, 574 ereport.cpu.intel.external@chip/cpu; 575 576event ereport.cpu.intel.nb.fbd.reset_timeout@motherboard/memory-controller 577 {within(12s)}; 578event fault.memory.intel.fbd.reset_timeout@motherboard/memory-controller, 579 FITrate=1000, ASRU=motherboard/memory-controller/dram-channel/dimm, 580 FRU=motherboard/memory-controller/dram-channel/dimm; 581 582prop fault.memory.intel.fbd.reset_timeout@motherboard/memory-controller (1)-> 583 ereport.cpu.intel.nb.fbd.reset_timeout@motherboard/memory-controller; 584 585prop fault.memory.intel.fbd.reset_timeout@motherboard/memory-controller (0)-> 586 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 587 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 588 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 589 ereport.cpu.intel.bus_interconnect@chip/cpu, 590 ereport.cpu.intel.external@chip/cpu; 591 592event ereport.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel 593 {within(12s)}; 594event fault.memory.intel.fbd.ch@motherboard/memory-controller/dram-channel, 595 FITrate=100, ASRU=motherboard/memory-controller/dram-channel/dimm, 596 FRU=motherboard/memory-controller/dram-channel/dimm; 597event upset.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel, 598 engine=serd.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel; 599event ereport.cpu.intel.nb.fbd_ch@motherboard/memory-controller/dram-channel 600 {within(12s)}; 601 602engine serd.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel, 603 N=2, T=1month, method=persistent, 604 trip=ereport.cpu.intel.nb.fbd_ch@motherboard/memory-controller/dram-channel; 605 606prop upset.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel (1)-> 607 ereport.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel; 608 609prop upset.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel (0)-> 610 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 611 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 612 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 613 ereport.cpu.intel.bus_interconnect@chip/cpu, 614 ereport.cpu.intel.external@chip/cpu; 615 616prop fault.memory.intel.fbd.ch@ 617 motherboard/memory-controller/dram-channel (1)-> 618 ereport.cpu.intel.nb.fbd_ch@motherboard/memory-controller/dram-channel; 619 620event ereport.cpu.intel.nb.fbd.otf@motherboard/memory-controller/dram-channel 621 {within(12s)}; 622event fault.memory.intel.fbd.otf@motherboard/memory-controller/dram-channel, 623 FITrate=100, ASRU=motherboard/memory-controller/dram-channel; 624event upset.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel, 625 engine=serd.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel; 626event ereport.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel 627 {within(12s)}; 628 629engine serd.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel, 630 N=2, T=1week, method=persistent, 631 trip=ereport.cpu.intel.nb.fbd_otf@ 632 motherboard/memory-controller/dram-channel; 633 634prop upset.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel (1)-> 635 ereport.cpu.intel.nb.fbd.otf@motherboard/memory-controller/dram-channel; 636 637prop fault.memory.intel.fbd.otf@ 638 motherboard/memory-controller/dram-channel (1)-> 639 ereport.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel; 640 641event ereport.cpu.intel.nb.unknown@motherboard/memory-controller {within(12s)}; 642event ereport.cpu.intel.nb.unknown@motherboard/memory-controller/dram-channel 643 {within(12s)}; 644event upset.discard@motherboard/memory-controller; 645 646prop upset.discard@motherboard/memory-controller (0)-> 647 ereport.cpu.intel.nb.unknown@motherboard/memory-controller, 648 ereport.cpu.intel.nb.unknown@motherboard/memory-controller/dram-channel; 649 650event ereport.cpu.intel.nb.mem_ds@motherboard/memory-controller{within(30s)}; 651 652event fault.memory.intel.fbd.mem_ds@ 653 motherboard/memory-controller/dram-channel/dimm/rank, 654 FITrate=DIMM_UE_FIT, 655 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 656 FRU=motherboard/memory-controller/dram-channel/dimm; 657 658prop fault.memory.intel.fbd.mem_ds@ 659 motherboard/memory-controller/dram-channel/dimm/rank[rank_num] 660 { payloadprop_defined("rank") && rank_num == payloadprop("rank") } (1)-> 661 ereport.cpu.intel.nb.mem_ds@motherboard/memory-controller; 662 663event ereport.cpu.intel.nb.fsb@motherboard/chip{within(12s)}; 664event fault.cpu.intel.nb.fsb@motherboard/chip, 665 FITrate=10000, ASRU=motherboard/chip, FRU=motherboard/chip; 666 667prop fault.cpu.intel.nb.fsb@motherboard/chip (1)-> 668 ereport.cpu.intel.nb.fsb@motherboard/chip; 669 670prop fault.cpu.intel.nb.fsb@motherboard/chip (0)-> 671 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 672 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 673 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 674 ereport.cpu.intel.bus_interconnect@chip/cpu, 675 ereport.cpu.intel.external@chip/cpu; 676 677event ereport.cpu.intel.nb.ie@motherboard{within(12s)}; 678event fault.cpu.intel.nb.ie@motherboard, 679 FITrate=10000, ASRU=motherboard, FRU=motherboard; 680 681prop fault.cpu.intel.nb.ie@motherboard (1)-> 682 ereport.cpu.intel.nb.ie@motherboard; 683 684prop fault.cpu.intel.nb.ie@motherboard (0)-> 685 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 686 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 687 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 688 ereport.cpu.intel.bus_interconnect@chip/cpu, 689 ereport.cpu.intel.external@chip/cpu; 690 691event ereport.cpu.intel.nb.dma@motherboard{within(12s)}; 692event fault.cpu.intel.nb.dma@motherboard, 693 FITrate=10000, ASRU=motherboard; 694 695prop fault.cpu.intel.nb.dma@motherboard (1)-> 696 ereport.cpu.intel.nb.dma@motherboard; 697 698prop fault.cpu.intel.nb.dma@motherboard (0)-> 699 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 700 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 701 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 702 ereport.cpu.intel.bus_interconnect@chip/cpu, 703 ereport.cpu.intel.external@chip/cpu; 704 705event ereport.cpu.intel.nb.esi@motherboard{within(12s)}; 706event ereport.cpu.intel.nb.pex@motherboard/hostbridge{within(12s)}; 707event upset.cpu.intel.nb.pex@motherboard/hostbridge; 708 709prop upset.cpu.intel.nb.pex@motherboard/hostbridge (1)-> 710 ereport.cpu.intel.nb.esi@motherboard, 711 ereport.cpu.intel.nb.pex@motherboard/hostbridge; 712 713prop upset.cpu.intel.nb.pex@motherboard/hostbridge (0)-> 714 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 715 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 716 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 717 ereport.cpu.intel.bus_interconnect@chip/cpu, 718 ereport.cpu.intel.external@chip/cpu; 719 720event ereport.cpu.intel.nb.unknown@ 721 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 722event upset.discard@motherboard/memory-controller/dram-channel/dimm/rank; 723 724prop upset.discard@motherboard/memory-controller/dram-channel/dimm/rank (1)-> 725 ereport.cpu.intel.nb.unknown@ 726 motherboard/memory-controller/dram-channel/dimm/rank; 727 728prop upset.discard@motherboard/memory-controller/dram-channel/dimm/rank (0)-> 729 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 730 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 731 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 732 ereport.cpu.intel.bus_interconnect@chip/cpu, 733 ereport.cpu.intel.external@chip/cpu; 734 735