14c87aefeSPatrick Mooney /*- 24c87aefeSPatrick Mooney * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 34c87aefeSPatrick Mooney * 44c87aefeSPatrick Mooney * Copyright (c) 2014 Leon Dang <ldang@nahannisys.com> 54c87aefeSPatrick Mooney * Copyright 2018 Joyent, Inc. 64c87aefeSPatrick Mooney * All rights reserved. 74c87aefeSPatrick Mooney * 84c87aefeSPatrick Mooney * Redistribution and use in source and binary forms, with or without 94c87aefeSPatrick Mooney * modification, are permitted provided that the following conditions 104c87aefeSPatrick Mooney * are met: 114c87aefeSPatrick Mooney * 1. Redistributions of source code must retain the above copyright 124c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer. 134c87aefeSPatrick Mooney * 2. Redistributions in binary form must reproduce the above copyright 144c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer in the 154c87aefeSPatrick Mooney * documentation and/or other materials provided with the distribution. 164c87aefeSPatrick Mooney * 174c87aefeSPatrick Mooney * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 184c87aefeSPatrick Mooney * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 194c87aefeSPatrick Mooney * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 204c87aefeSPatrick Mooney * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 214c87aefeSPatrick Mooney * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 224c87aefeSPatrick Mooney * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 234c87aefeSPatrick Mooney * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 244c87aefeSPatrick Mooney * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 254c87aefeSPatrick Mooney * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 264c87aefeSPatrick Mooney * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 274c87aefeSPatrick Mooney * SUCH DAMAGE. 284c87aefeSPatrick Mooney */ 294c87aefeSPatrick Mooney /* 304c87aefeSPatrick Mooney XHCI options: 314c87aefeSPatrick Mooney -s <n>,xhci,{devices} 324c87aefeSPatrick Mooney 334c87aefeSPatrick Mooney devices: 344c87aefeSPatrick Mooney tablet USB tablet mouse 354c87aefeSPatrick Mooney */ 364c87aefeSPatrick Mooney #include <sys/cdefs.h> 374c87aefeSPatrick Mooney __FBSDID("$FreeBSD$"); 384c87aefeSPatrick Mooney 394c87aefeSPatrick Mooney #include <sys/param.h> 404c87aefeSPatrick Mooney #include <sys/uio.h> 414c87aefeSPatrick Mooney #include <sys/types.h> 424c87aefeSPatrick Mooney #include <sys/queue.h> 434c87aefeSPatrick Mooney 444c87aefeSPatrick Mooney #include <stdio.h> 454c87aefeSPatrick Mooney #include <stdlib.h> 464c87aefeSPatrick Mooney #include <stdint.h> 474c87aefeSPatrick Mooney #include <string.h> 484c87aefeSPatrick Mooney #include <errno.h> 494c87aefeSPatrick Mooney #include <pthread.h> 504c87aefeSPatrick Mooney #include <unistd.h> 514c87aefeSPatrick Mooney 524c87aefeSPatrick Mooney #include <dev/usb/usbdi.h> 534c87aefeSPatrick Mooney #include <dev/usb/usb.h> 544c87aefeSPatrick Mooney #include <dev/usb/usb_freebsd.h> 554c87aefeSPatrick Mooney #include <xhcireg.h> 564c87aefeSPatrick Mooney 574c87aefeSPatrick Mooney #include "bhyverun.h" 582b948146SAndy Fiddaman #include "config.h" 59154972afSPatrick Mooney #include "debug.h" 604c87aefeSPatrick Mooney #include "pci_emul.h" 614c87aefeSPatrick Mooney #include "pci_xhci.h" 624c87aefeSPatrick Mooney #include "usb_emul.h" 634c87aefeSPatrick Mooney 644c87aefeSPatrick Mooney 654c87aefeSPatrick Mooney static int xhci_debug = 0; 66154972afSPatrick Mooney #define DPRINTF(params) if (xhci_debug) PRINTLN params 67154972afSPatrick Mooney #define WPRINTF(params) PRINTLN params 684c87aefeSPatrick Mooney 694c87aefeSPatrick Mooney 704c87aefeSPatrick Mooney #define XHCI_NAME "xhci" 714c87aefeSPatrick Mooney #define XHCI_MAX_DEVS 8 /* 4 USB3 + 4 USB2 devs */ 724c87aefeSPatrick Mooney 734c87aefeSPatrick Mooney #define XHCI_MAX_SLOTS 64 /* min allowed by Windows drivers */ 744c87aefeSPatrick Mooney 754c87aefeSPatrick Mooney /* 764c87aefeSPatrick Mooney * XHCI data structures can be up to 64k, but limit paddr_guest2host mapping 774c87aefeSPatrick Mooney * to 4k to avoid going over the guest physical memory barrier. 784c87aefeSPatrick Mooney */ 794c87aefeSPatrick Mooney #define XHCI_PADDR_SZ 4096 /* paddr_guest2host max size */ 804c87aefeSPatrick Mooney 814c87aefeSPatrick Mooney #define XHCI_ERST_MAX 0 /* max 2^entries event ring seg tbl */ 824c87aefeSPatrick Mooney 834c87aefeSPatrick Mooney #define XHCI_CAPLEN (4*8) /* offset of op register space */ 844c87aefeSPatrick Mooney #define XHCI_HCCPRAMS2 0x1C /* offset of HCCPARAMS2 register */ 854c87aefeSPatrick Mooney #define XHCI_PORTREGS_START 0x400 864c87aefeSPatrick Mooney #define XHCI_DOORBELL_MAX 256 874c87aefeSPatrick Mooney 884c87aefeSPatrick Mooney #define XHCI_STREAMS_MAX 1 /* 4-15 in XHCI spec */ 894c87aefeSPatrick Mooney 904c87aefeSPatrick Mooney /* caplength and hci-version registers */ 914c87aefeSPatrick Mooney #define XHCI_SET_CAPLEN(x) ((x) & 0xFF) 924c87aefeSPatrick Mooney #define XHCI_SET_HCIVERSION(x) (((x) & 0xFFFF) << 16) 934c87aefeSPatrick Mooney #define XHCI_GET_HCIVERSION(x) (((x) >> 16) & 0xFFFF) 944c87aefeSPatrick Mooney 954c87aefeSPatrick Mooney /* hcsparams1 register */ 964c87aefeSPatrick Mooney #define XHCI_SET_HCSP1_MAXSLOTS(x) ((x) & 0xFF) 974c87aefeSPatrick Mooney #define XHCI_SET_HCSP1_MAXINTR(x) (((x) & 0x7FF) << 8) 984c87aefeSPatrick Mooney #define XHCI_SET_HCSP1_MAXPORTS(x) (((x) & 0xFF) << 24) 994c87aefeSPatrick Mooney 1004c87aefeSPatrick Mooney /* hcsparams2 register */ 1014c87aefeSPatrick Mooney #define XHCI_SET_HCSP2_IST(x) ((x) & 0x0F) 1024c87aefeSPatrick Mooney #define XHCI_SET_HCSP2_ERSTMAX(x) (((x) & 0x0F) << 4) 1034c87aefeSPatrick Mooney #define XHCI_SET_HCSP2_MAXSCRATCH_HI(x) (((x) & 0x1F) << 21) 1044c87aefeSPatrick Mooney #define XHCI_SET_HCSP2_MAXSCRATCH_LO(x) (((x) & 0x1F) << 27) 1054c87aefeSPatrick Mooney 1064c87aefeSPatrick Mooney /* hcsparams3 register */ 1074c87aefeSPatrick Mooney #define XHCI_SET_HCSP3_U1EXITLATENCY(x) ((x) & 0xFF) 1084c87aefeSPatrick Mooney #define XHCI_SET_HCSP3_U2EXITLATENCY(x) (((x) & 0xFFFF) << 16) 1094c87aefeSPatrick Mooney 1104c87aefeSPatrick Mooney /* hccparams1 register */ 1114c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_AC64(x) ((x) & 0x01) 1124c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_BNC(x) (((x) & 0x01) << 1) 1134c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_CSZ(x) (((x) & 0x01) << 2) 1144c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_PPC(x) (((x) & 0x01) << 3) 1154c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_PIND(x) (((x) & 0x01) << 4) 1164c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_LHRC(x) (((x) & 0x01) << 5) 1174c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_LTC(x) (((x) & 0x01) << 6) 1184c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_NSS(x) (((x) & 0x01) << 7) 1194c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_PAE(x) (((x) & 0x01) << 8) 1204c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_SPC(x) (((x) & 0x01) << 9) 1214c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_SEC(x) (((x) & 0x01) << 10) 1224c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_CFC(x) (((x) & 0x01) << 11) 1234c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_MAXPSA(x) (((x) & 0x0F) << 12) 1244c87aefeSPatrick Mooney #define XHCI_SET_HCCP1_XECP(x) (((x) & 0xFFFF) << 16) 1254c87aefeSPatrick Mooney 1264c87aefeSPatrick Mooney /* hccparams2 register */ 1274c87aefeSPatrick Mooney #define XHCI_SET_HCCP2_U3C(x) ((x) & 0x01) 1284c87aefeSPatrick Mooney #define XHCI_SET_HCCP2_CMC(x) (((x) & 0x01) << 1) 1294c87aefeSPatrick Mooney #define XHCI_SET_HCCP2_FSC(x) (((x) & 0x01) << 2) 1304c87aefeSPatrick Mooney #define XHCI_SET_HCCP2_CTC(x) (((x) & 0x01) << 3) 1314c87aefeSPatrick Mooney #define XHCI_SET_HCCP2_LEC(x) (((x) & 0x01) << 4) 1324c87aefeSPatrick Mooney #define XHCI_SET_HCCP2_CIC(x) (((x) & 0x01) << 5) 1334c87aefeSPatrick Mooney 1344c87aefeSPatrick Mooney /* other registers */ 1354c87aefeSPatrick Mooney #define XHCI_SET_DOORBELL(x) ((x) & ~0x03) 1364c87aefeSPatrick Mooney #define XHCI_SET_RTSOFFSET(x) ((x) & ~0x0F) 1374c87aefeSPatrick Mooney 1384c87aefeSPatrick Mooney /* register masks */ 1394c87aefeSPatrick Mooney #define XHCI_PS_PLS_MASK (0xF << 5) /* port link state */ 1404c87aefeSPatrick Mooney #define XHCI_PS_SPEED_MASK (0xF << 10) /* port speed */ 1414c87aefeSPatrick Mooney #define XHCI_PS_PIC_MASK (0x3 << 14) /* port indicator */ 1424c87aefeSPatrick Mooney 1434c87aefeSPatrick Mooney /* port register set */ 1444c87aefeSPatrick Mooney #define XHCI_PORTREGS_BASE 0x400 /* base offset */ 1454c87aefeSPatrick Mooney #define XHCI_PORTREGS_PORT0 0x3F0 1464c87aefeSPatrick Mooney #define XHCI_PORTREGS_SETSZ 0x10 /* size of a set */ 1474c87aefeSPatrick Mooney 1484c87aefeSPatrick Mooney #define MASK_64_HI(x) ((x) & ~0xFFFFFFFFULL) 1494c87aefeSPatrick Mooney #define MASK_64_LO(x) ((x) & 0xFFFFFFFFULL) 1504c87aefeSPatrick Mooney 1514c87aefeSPatrick Mooney #define FIELD_REPLACE(a,b,m,s) (((a) & ~((m) << (s))) | \ 1524c87aefeSPatrick Mooney (((b) & (m)) << (s))) 1534c87aefeSPatrick Mooney #define FIELD_COPY(a,b,m,s) (((a) & ~((m) << (s))) | \ 1544c87aefeSPatrick Mooney (((b) & ((m) << (s))))) 1554c87aefeSPatrick Mooney 1564c87aefeSPatrick Mooney struct pci_xhci_trb_ring { 1574c87aefeSPatrick Mooney uint64_t ringaddr; /* current dequeue guest address */ 1584c87aefeSPatrick Mooney uint32_t ccs; /* consumer cycle state */ 1594c87aefeSPatrick Mooney }; 1604c87aefeSPatrick Mooney 1614c87aefeSPatrick Mooney /* device endpoint transfer/stream rings */ 1624c87aefeSPatrick Mooney struct pci_xhci_dev_ep { 1634c87aefeSPatrick Mooney union { 1644c87aefeSPatrick Mooney struct xhci_trb *_epu_tr; 1654c87aefeSPatrick Mooney struct xhci_stream_ctx *_epu_sctx; 1664c87aefeSPatrick Mooney } _ep_trbsctx; 1674c87aefeSPatrick Mooney #define ep_tr _ep_trbsctx._epu_tr 1684c87aefeSPatrick Mooney #define ep_sctx _ep_trbsctx._epu_sctx 1694c87aefeSPatrick Mooney 1704c87aefeSPatrick Mooney union { 1714c87aefeSPatrick Mooney struct pci_xhci_trb_ring _epu_trb; 1724c87aefeSPatrick Mooney struct pci_xhci_trb_ring *_epu_sctx_trbs; 1734c87aefeSPatrick Mooney } _ep_trb_rings; 1744c87aefeSPatrick Mooney #define ep_ringaddr _ep_trb_rings._epu_trb.ringaddr 1754c87aefeSPatrick Mooney #define ep_ccs _ep_trb_rings._epu_trb.ccs 1764c87aefeSPatrick Mooney #define ep_sctx_trbs _ep_trb_rings._epu_sctx_trbs 1774c87aefeSPatrick Mooney 1784c87aefeSPatrick Mooney struct usb_data_xfer *ep_xfer; /* transfer chain */ 1794c87aefeSPatrick Mooney }; 1804c87aefeSPatrick Mooney 1814c87aefeSPatrick Mooney /* device context base address array: maps slot->device context */ 1824c87aefeSPatrick Mooney struct xhci_dcbaa { 1834c87aefeSPatrick Mooney uint64_t dcba[USB_MAX_DEVICES+1]; /* xhci_dev_ctx ptrs */ 1844c87aefeSPatrick Mooney }; 1854c87aefeSPatrick Mooney 1864c87aefeSPatrick Mooney /* port status registers */ 1874c87aefeSPatrick Mooney struct pci_xhci_portregs { 1884c87aefeSPatrick Mooney uint32_t portsc; /* port status and control */ 1894c87aefeSPatrick Mooney uint32_t portpmsc; /* port pwr mgmt status & control */ 1904c87aefeSPatrick Mooney uint32_t portli; /* port link info */ 1914c87aefeSPatrick Mooney uint32_t porthlpmc; /* port hardware LPM control */ 1924c87aefeSPatrick Mooney } __packed; 1934c87aefeSPatrick Mooney #define XHCI_PS_SPEED_SET(x) (((x) & 0xF) << 10) 1944c87aefeSPatrick Mooney 1954c87aefeSPatrick Mooney /* xHC operational registers */ 1964c87aefeSPatrick Mooney struct pci_xhci_opregs { 1974c87aefeSPatrick Mooney uint32_t usbcmd; /* usb command */ 1984c87aefeSPatrick Mooney uint32_t usbsts; /* usb status */ 1994c87aefeSPatrick Mooney uint32_t pgsz; /* page size */ 2004c87aefeSPatrick Mooney uint32_t dnctrl; /* device notification control */ 2014c87aefeSPatrick Mooney uint64_t crcr; /* command ring control */ 2024c87aefeSPatrick Mooney uint64_t dcbaap; /* device ctx base addr array ptr */ 2034c87aefeSPatrick Mooney uint32_t config; /* configure */ 2044c87aefeSPatrick Mooney 2054c87aefeSPatrick Mooney /* guest mapped addresses: */ 2064c87aefeSPatrick Mooney struct xhci_trb *cr_p; /* crcr dequeue */ 2074c87aefeSPatrick Mooney struct xhci_dcbaa *dcbaa_p; /* dev ctx array ptr */ 2084c87aefeSPatrick Mooney }; 2094c87aefeSPatrick Mooney 2104c87aefeSPatrick Mooney /* xHC runtime registers */ 2114c87aefeSPatrick Mooney struct pci_xhci_rtsregs { 2124c87aefeSPatrick Mooney uint32_t mfindex; /* microframe index */ 2134c87aefeSPatrick Mooney struct { /* interrupter register set */ 2144c87aefeSPatrick Mooney uint32_t iman; /* interrupter management */ 2154c87aefeSPatrick Mooney uint32_t imod; /* interrupter moderation */ 2164c87aefeSPatrick Mooney uint32_t erstsz; /* event ring segment table size */ 2174c87aefeSPatrick Mooney uint32_t rsvd; 2184c87aefeSPatrick Mooney uint64_t erstba; /* event ring seg-tbl base addr */ 2194c87aefeSPatrick Mooney uint64_t erdp; /* event ring dequeue ptr */ 2204c87aefeSPatrick Mooney } intrreg __packed; 2214c87aefeSPatrick Mooney 2224c87aefeSPatrick Mooney /* guest mapped addresses */ 2234c87aefeSPatrick Mooney struct xhci_event_ring_seg *erstba_p; 2244c87aefeSPatrick Mooney struct xhci_trb *erst_p; /* event ring segment tbl */ 2254c87aefeSPatrick Mooney int er_deq_seg; /* event ring dequeue segment */ 2264c87aefeSPatrick Mooney int er_enq_idx; /* event ring enqueue index - xHCI */ 2274c87aefeSPatrick Mooney int er_enq_seg; /* event ring enqueue segment */ 2284c87aefeSPatrick Mooney uint32_t er_events_cnt; /* number of events in ER */ 2294c87aefeSPatrick Mooney uint32_t event_pcs; /* producer cycle state flag */ 2304c87aefeSPatrick Mooney }; 2314c87aefeSPatrick Mooney 2324c87aefeSPatrick Mooney 2334c87aefeSPatrick Mooney struct pci_xhci_softc; 2344c87aefeSPatrick Mooney 2354c87aefeSPatrick Mooney 2364c87aefeSPatrick Mooney /* 2374c87aefeSPatrick Mooney * USB device emulation container. 2384c87aefeSPatrick Mooney * This is referenced from usb_hci->hci_sc; 1 pci_xhci_dev_emu for each 2394c87aefeSPatrick Mooney * emulated device instance. 2404c87aefeSPatrick Mooney */ 2414c87aefeSPatrick Mooney struct pci_xhci_dev_emu { 2424c87aefeSPatrick Mooney struct pci_xhci_softc *xsc; 2434c87aefeSPatrick Mooney 2444c87aefeSPatrick Mooney /* XHCI contexts */ 2454c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 2464c87aefeSPatrick Mooney struct pci_xhci_dev_ep eps[XHCI_MAX_ENDPOINTS]; 2474c87aefeSPatrick Mooney int dev_slotstate; 2484c87aefeSPatrick Mooney 2494c87aefeSPatrick Mooney struct usb_devemu *dev_ue; /* USB emulated dev */ 2504c87aefeSPatrick Mooney void *dev_sc; /* device's softc */ 2514c87aefeSPatrick Mooney 2524c87aefeSPatrick Mooney struct usb_hci hci; 2534c87aefeSPatrick Mooney }; 2544c87aefeSPatrick Mooney 2554c87aefeSPatrick Mooney struct pci_xhci_softc { 2564c87aefeSPatrick Mooney struct pci_devinst *xsc_pi; 2574c87aefeSPatrick Mooney 2584c87aefeSPatrick Mooney pthread_mutex_t mtx; 2594c87aefeSPatrick Mooney 2604c87aefeSPatrick Mooney uint32_t caplength; /* caplen & hciversion */ 2614c87aefeSPatrick Mooney uint32_t hcsparams1; /* structural parameters 1 */ 2624c87aefeSPatrick Mooney uint32_t hcsparams2; /* structural parameters 2 */ 2634c87aefeSPatrick Mooney uint32_t hcsparams3; /* structural parameters 3 */ 2644c87aefeSPatrick Mooney uint32_t hccparams1; /* capability parameters 1 */ 2654c87aefeSPatrick Mooney uint32_t dboff; /* doorbell offset */ 2664c87aefeSPatrick Mooney uint32_t rtsoff; /* runtime register space offset */ 2674c87aefeSPatrick Mooney uint32_t hccparams2; /* capability parameters 2 */ 2684c87aefeSPatrick Mooney 2694c87aefeSPatrick Mooney uint32_t regsend; /* end of configuration registers */ 2704c87aefeSPatrick Mooney 2714c87aefeSPatrick Mooney struct pci_xhci_opregs opregs; 2724c87aefeSPatrick Mooney struct pci_xhci_rtsregs rtsregs; 2734c87aefeSPatrick Mooney 2744c87aefeSPatrick Mooney struct pci_xhci_portregs *portregs; 2754c87aefeSPatrick Mooney struct pci_xhci_dev_emu **devices; /* XHCI[port] = device */ 2764c87aefeSPatrick Mooney struct pci_xhci_dev_emu **slots; /* slots assigned from 1 */ 2774c87aefeSPatrick Mooney 2784c87aefeSPatrick Mooney int usb2_port_start; 2794c87aefeSPatrick Mooney int usb3_port_start; 2804c87aefeSPatrick Mooney }; 2814c87aefeSPatrick Mooney 2824c87aefeSPatrick Mooney 2834c87aefeSPatrick Mooney /* portregs and devices arrays are set up to start from idx=1 */ 2844c87aefeSPatrick Mooney #define XHCI_PORTREG_PTR(x,n) &(x)->portregs[(n)] 2854c87aefeSPatrick Mooney #define XHCI_DEVINST_PTR(x,n) (x)->devices[(n)] 2864c87aefeSPatrick Mooney #define XHCI_SLOTDEV_PTR(x,n) (x)->slots[(n)] 2874c87aefeSPatrick Mooney 2884c87aefeSPatrick Mooney #define XHCI_HALTED(sc) ((sc)->opregs.usbsts & XHCI_STS_HCH) 2894c87aefeSPatrick Mooney 2904c87aefeSPatrick Mooney #define XHCI_GADDR(sc,a) paddr_guest2host((sc)->xsc_pi->pi_vmctx, \ 2914c87aefeSPatrick Mooney (a), \ 2924c87aefeSPatrick Mooney XHCI_PADDR_SZ - ((a) & (XHCI_PADDR_SZ-1))) 2934c87aefeSPatrick Mooney 2944c87aefeSPatrick Mooney static int xhci_in_use; 2954c87aefeSPatrick Mooney 2964c87aefeSPatrick Mooney /* map USB errors to XHCI */ 2974c87aefeSPatrick Mooney static const int xhci_usb_errors[USB_ERR_MAX] = { 2984c87aefeSPatrick Mooney [USB_ERR_NORMAL_COMPLETION] = XHCI_TRB_ERROR_SUCCESS, 2994c87aefeSPatrick Mooney [USB_ERR_PENDING_REQUESTS] = XHCI_TRB_ERROR_RESOURCE, 3004c87aefeSPatrick Mooney [USB_ERR_NOT_STARTED] = XHCI_TRB_ERROR_ENDP_NOT_ON, 3014c87aefeSPatrick Mooney [USB_ERR_INVAL] = XHCI_TRB_ERROR_INVALID, 3024c87aefeSPatrick Mooney [USB_ERR_NOMEM] = XHCI_TRB_ERROR_RESOURCE, 3034c87aefeSPatrick Mooney [USB_ERR_CANCELLED] = XHCI_TRB_ERROR_STOPPED, 3044c87aefeSPatrick Mooney [USB_ERR_BAD_ADDRESS] = XHCI_TRB_ERROR_PARAMETER, 3054c87aefeSPatrick Mooney [USB_ERR_BAD_BUFSIZE] = XHCI_TRB_ERROR_PARAMETER, 3064c87aefeSPatrick Mooney [USB_ERR_BAD_FLAG] = XHCI_TRB_ERROR_PARAMETER, 3074c87aefeSPatrick Mooney [USB_ERR_NO_CALLBACK] = XHCI_TRB_ERROR_STALL, 3084c87aefeSPatrick Mooney [USB_ERR_IN_USE] = XHCI_TRB_ERROR_RESOURCE, 3094c87aefeSPatrick Mooney [USB_ERR_NO_ADDR] = XHCI_TRB_ERROR_RESOURCE, 3104c87aefeSPatrick Mooney [USB_ERR_NO_PIPE] = XHCI_TRB_ERROR_RESOURCE, 3114c87aefeSPatrick Mooney [USB_ERR_ZERO_NFRAMES] = XHCI_TRB_ERROR_UNDEFINED, 3124c87aefeSPatrick Mooney [USB_ERR_ZERO_MAXP] = XHCI_TRB_ERROR_UNDEFINED, 3134c87aefeSPatrick Mooney [USB_ERR_SET_ADDR_FAILED] = XHCI_TRB_ERROR_RESOURCE, 3144c87aefeSPatrick Mooney [USB_ERR_NO_POWER] = XHCI_TRB_ERROR_ENDP_NOT_ON, 3154c87aefeSPatrick Mooney [USB_ERR_TOO_DEEP] = XHCI_TRB_ERROR_RESOURCE, 3164c87aefeSPatrick Mooney [USB_ERR_IOERROR] = XHCI_TRB_ERROR_TRB, 3174c87aefeSPatrick Mooney [USB_ERR_NOT_CONFIGURED] = XHCI_TRB_ERROR_ENDP_NOT_ON, 3184c87aefeSPatrick Mooney [USB_ERR_TIMEOUT] = XHCI_TRB_ERROR_CMD_ABORTED, 3194c87aefeSPatrick Mooney [USB_ERR_SHORT_XFER] = XHCI_TRB_ERROR_SHORT_PKT, 3204c87aefeSPatrick Mooney [USB_ERR_STALLED] = XHCI_TRB_ERROR_STALL, 3214c87aefeSPatrick Mooney [USB_ERR_INTERRUPTED] = XHCI_TRB_ERROR_CMD_ABORTED, 3224c87aefeSPatrick Mooney [USB_ERR_DMA_LOAD_FAILED] = XHCI_TRB_ERROR_DATA_BUF, 3234c87aefeSPatrick Mooney [USB_ERR_BAD_CONTEXT] = XHCI_TRB_ERROR_TRB, 3244c87aefeSPatrick Mooney [USB_ERR_NO_ROOT_HUB] = XHCI_TRB_ERROR_UNDEFINED, 3254c87aefeSPatrick Mooney [USB_ERR_NO_INTR_THREAD] = XHCI_TRB_ERROR_UNDEFINED, 3264c87aefeSPatrick Mooney [USB_ERR_NOT_LOCKED] = XHCI_TRB_ERROR_UNDEFINED, 3274c87aefeSPatrick Mooney }; 3284c87aefeSPatrick Mooney #define USB_TO_XHCI_ERR(e) ((e) < USB_ERR_MAX ? xhci_usb_errors[(e)] : \ 3294c87aefeSPatrick Mooney XHCI_TRB_ERROR_INVALID) 3304c87aefeSPatrick Mooney 3314c87aefeSPatrick Mooney static int pci_xhci_insert_event(struct pci_xhci_softc *sc, 3324c87aefeSPatrick Mooney struct xhci_trb *evtrb, int do_intr); 3334c87aefeSPatrick Mooney static void pci_xhci_dump_trb(struct xhci_trb *trb); 3344c87aefeSPatrick Mooney static void pci_xhci_assert_interrupt(struct pci_xhci_softc *sc); 3354c87aefeSPatrick Mooney static void pci_xhci_reset_slot(struct pci_xhci_softc *sc, int slot); 3364c87aefeSPatrick Mooney static void pci_xhci_reset_port(struct pci_xhci_softc *sc, int portn, int warm); 3374c87aefeSPatrick Mooney static void pci_xhci_update_ep_ring(struct pci_xhci_softc *sc, 3384c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev, struct pci_xhci_dev_ep *devep, 3394c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx, uint32_t streamid, 3404c87aefeSPatrick Mooney uint64_t ringaddr, int ccs); 3414c87aefeSPatrick Mooney 3424c87aefeSPatrick Mooney static void 3434c87aefeSPatrick Mooney pci_xhci_set_evtrb(struct xhci_trb *evtrb, uint64_t port, uint32_t errcode, 3444c87aefeSPatrick Mooney uint32_t evtype) 3454c87aefeSPatrick Mooney { 3464c87aefeSPatrick Mooney evtrb->qwTrb0 = port << 24; 3474c87aefeSPatrick Mooney evtrb->dwTrb2 = XHCI_TRB_2_ERROR_SET(errcode); 3484c87aefeSPatrick Mooney evtrb->dwTrb3 = XHCI_TRB_3_TYPE_SET(evtype); 3494c87aefeSPatrick Mooney } 3504c87aefeSPatrick Mooney 3514c87aefeSPatrick Mooney 3524c87aefeSPatrick Mooney /* controller reset */ 3534c87aefeSPatrick Mooney static void 3544c87aefeSPatrick Mooney pci_xhci_reset(struct pci_xhci_softc *sc) 3554c87aefeSPatrick Mooney { 3564c87aefeSPatrick Mooney int i; 3574c87aefeSPatrick Mooney 3584c87aefeSPatrick Mooney sc->rtsregs.er_enq_idx = 0; 3594c87aefeSPatrick Mooney sc->rtsregs.er_events_cnt = 0; 3604c87aefeSPatrick Mooney sc->rtsregs.event_pcs = 1; 3614c87aefeSPatrick Mooney 3624c87aefeSPatrick Mooney for (i = 1; i <= XHCI_MAX_SLOTS; i++) { 3634c87aefeSPatrick Mooney pci_xhci_reset_slot(sc, i); 3644c87aefeSPatrick Mooney } 3654c87aefeSPatrick Mooney } 3664c87aefeSPatrick Mooney 3674c87aefeSPatrick Mooney static uint32_t 3684c87aefeSPatrick Mooney pci_xhci_usbcmd_write(struct pci_xhci_softc *sc, uint32_t cmd) 3694c87aefeSPatrick Mooney { 3704c87aefeSPatrick Mooney int do_intr = 0; 3714c87aefeSPatrick Mooney int i; 3724c87aefeSPatrick Mooney 3734c87aefeSPatrick Mooney if (cmd & XHCI_CMD_RS) { 3744c87aefeSPatrick Mooney do_intr = (sc->opregs.usbcmd & XHCI_CMD_RS) == 0; 3754c87aefeSPatrick Mooney 3764c87aefeSPatrick Mooney sc->opregs.usbcmd |= XHCI_CMD_RS; 3774c87aefeSPatrick Mooney sc->opregs.usbsts &= ~XHCI_STS_HCH; 3784c87aefeSPatrick Mooney sc->opregs.usbsts |= XHCI_STS_PCD; 3794c87aefeSPatrick Mooney 3804c87aefeSPatrick Mooney /* Queue port change event on controller run from stop */ 3814c87aefeSPatrick Mooney if (do_intr) 3824c87aefeSPatrick Mooney for (i = 1; i <= XHCI_MAX_DEVS; i++) { 3834c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 3844c87aefeSPatrick Mooney struct pci_xhci_portregs *port; 3854c87aefeSPatrick Mooney struct xhci_trb evtrb; 3864c87aefeSPatrick Mooney 3874c87aefeSPatrick Mooney if ((dev = XHCI_DEVINST_PTR(sc, i)) == NULL) 3884c87aefeSPatrick Mooney continue; 3894c87aefeSPatrick Mooney 3904c87aefeSPatrick Mooney port = XHCI_PORTREG_PTR(sc, i); 3914c87aefeSPatrick Mooney port->portsc |= XHCI_PS_CSC | XHCI_PS_CCS; 3924c87aefeSPatrick Mooney port->portsc &= ~XHCI_PS_PLS_MASK; 3934c87aefeSPatrick Mooney 3944c87aefeSPatrick Mooney /* 3954c87aefeSPatrick Mooney * XHCI 4.19.3 USB2 RxDetect->Polling, 3964c87aefeSPatrick Mooney * USB3 Polling->U0 3974c87aefeSPatrick Mooney */ 3984c87aefeSPatrick Mooney if (dev->dev_ue->ue_usbver == 2) 3994c87aefeSPatrick Mooney port->portsc |= 4004c87aefeSPatrick Mooney XHCI_PS_PLS_SET(UPS_PORT_LS_POLL); 4014c87aefeSPatrick Mooney else 4024c87aefeSPatrick Mooney port->portsc |= 4034c87aefeSPatrick Mooney XHCI_PS_PLS_SET(UPS_PORT_LS_U0); 4044c87aefeSPatrick Mooney 4054c87aefeSPatrick Mooney pci_xhci_set_evtrb(&evtrb, i, 4064c87aefeSPatrick Mooney XHCI_TRB_ERROR_SUCCESS, 4074c87aefeSPatrick Mooney XHCI_TRB_EVENT_PORT_STS_CHANGE); 4084c87aefeSPatrick Mooney 4094c87aefeSPatrick Mooney if (pci_xhci_insert_event(sc, &evtrb, 0) != 4104c87aefeSPatrick Mooney XHCI_TRB_ERROR_SUCCESS) 4114c87aefeSPatrick Mooney break; 4124c87aefeSPatrick Mooney } 4134c87aefeSPatrick Mooney } else { 4144c87aefeSPatrick Mooney sc->opregs.usbcmd &= ~XHCI_CMD_RS; 4154c87aefeSPatrick Mooney sc->opregs.usbsts |= XHCI_STS_HCH; 4164c87aefeSPatrick Mooney sc->opregs.usbsts &= ~XHCI_STS_PCD; 4174c87aefeSPatrick Mooney } 4184c87aefeSPatrick Mooney 4194c87aefeSPatrick Mooney /* start execution of schedule; stop when set to 0 */ 4204c87aefeSPatrick Mooney cmd |= sc->opregs.usbcmd & XHCI_CMD_RS; 4214c87aefeSPatrick Mooney 4224c87aefeSPatrick Mooney if (cmd & XHCI_CMD_HCRST) { 4234c87aefeSPatrick Mooney /* reset controller */ 4244c87aefeSPatrick Mooney pci_xhci_reset(sc); 4254c87aefeSPatrick Mooney cmd &= ~XHCI_CMD_HCRST; 4264c87aefeSPatrick Mooney } 4274c87aefeSPatrick Mooney 4284c87aefeSPatrick Mooney cmd &= ~(XHCI_CMD_CSS | XHCI_CMD_CRS); 4294c87aefeSPatrick Mooney 4304c87aefeSPatrick Mooney if (do_intr) 4314c87aefeSPatrick Mooney pci_xhci_assert_interrupt(sc); 4324c87aefeSPatrick Mooney 4334c87aefeSPatrick Mooney return (cmd); 4344c87aefeSPatrick Mooney } 4354c87aefeSPatrick Mooney 4364c87aefeSPatrick Mooney static void 4374c87aefeSPatrick Mooney pci_xhci_portregs_write(struct pci_xhci_softc *sc, uint64_t offset, 4384c87aefeSPatrick Mooney uint64_t value) 4394c87aefeSPatrick Mooney { 4404c87aefeSPatrick Mooney struct xhci_trb evtrb; 4414c87aefeSPatrick Mooney struct pci_xhci_portregs *p; 4424c87aefeSPatrick Mooney int port; 4434c87aefeSPatrick Mooney uint32_t oldpls, newpls; 4444c87aefeSPatrick Mooney 4454c87aefeSPatrick Mooney if (sc->portregs == NULL) 4464c87aefeSPatrick Mooney return; 4474c87aefeSPatrick Mooney 4484c87aefeSPatrick Mooney port = (offset - XHCI_PORTREGS_PORT0) / XHCI_PORTREGS_SETSZ; 4494c87aefeSPatrick Mooney offset = (offset - XHCI_PORTREGS_PORT0) % XHCI_PORTREGS_SETSZ; 4504c87aefeSPatrick Mooney 451154972afSPatrick Mooney DPRINTF(("pci_xhci: portregs wr offset 0x%lx, port %u: 0x%lx", 4524c87aefeSPatrick Mooney offset, port, value)); 4534c87aefeSPatrick Mooney 4544c87aefeSPatrick Mooney assert(port >= 0); 4554c87aefeSPatrick Mooney 4564c87aefeSPatrick Mooney if (port > XHCI_MAX_DEVS) { 457154972afSPatrick Mooney DPRINTF(("pci_xhci: portregs_write port %d > ndevices", 4584c87aefeSPatrick Mooney port)); 4594c87aefeSPatrick Mooney return; 4604c87aefeSPatrick Mooney } 4614c87aefeSPatrick Mooney 4624c87aefeSPatrick Mooney if (XHCI_DEVINST_PTR(sc, port) == NULL) { 463154972afSPatrick Mooney DPRINTF(("pci_xhci: portregs_write to unattached port %d", 4644c87aefeSPatrick Mooney port)); 4654c87aefeSPatrick Mooney } 4664c87aefeSPatrick Mooney 4674c87aefeSPatrick Mooney p = XHCI_PORTREG_PTR(sc, port); 4684c87aefeSPatrick Mooney switch (offset) { 4694c87aefeSPatrick Mooney case 0: 4704c87aefeSPatrick Mooney /* port reset or warm reset */ 4714c87aefeSPatrick Mooney if (value & (XHCI_PS_PR | XHCI_PS_WPR)) { 4724c87aefeSPatrick Mooney pci_xhci_reset_port(sc, port, value & XHCI_PS_WPR); 4734c87aefeSPatrick Mooney break; 4744c87aefeSPatrick Mooney } 4754c87aefeSPatrick Mooney 4764c87aefeSPatrick Mooney if ((p->portsc & XHCI_PS_PP) == 0) { 4774c87aefeSPatrick Mooney WPRINTF(("pci_xhci: portregs_write to unpowered " 478154972afSPatrick Mooney "port %d", port)); 4794c87aefeSPatrick Mooney break; 4804c87aefeSPatrick Mooney } 4814c87aefeSPatrick Mooney 4824c87aefeSPatrick Mooney /* Port status and control register */ 4834c87aefeSPatrick Mooney oldpls = XHCI_PS_PLS_GET(p->portsc); 4844c87aefeSPatrick Mooney newpls = XHCI_PS_PLS_GET(value); 4854c87aefeSPatrick Mooney 486*104fd295SAndy Fiddaman #ifndef __FreeBSD__ 487*104fd295SAndy Fiddaman p->portsc &= XHCI_PS_PED | XHCI_PS_PP | XHCI_PS_PLS_MASK | 488*104fd295SAndy Fiddaman XHCI_PS_SPEED_MASK | XHCI_PS_PIC_MASK; 489*104fd295SAndy Fiddaman #else 4904c87aefeSPatrick Mooney p->portsc &= XHCI_PS_PED | XHCI_PS_PLS_MASK | 4914c87aefeSPatrick Mooney XHCI_PS_SPEED_MASK | XHCI_PS_PIC_MASK; 492*104fd295SAndy Fiddaman #endif 4934c87aefeSPatrick Mooney 4944c87aefeSPatrick Mooney if (XHCI_DEVINST_PTR(sc, port)) 4954c87aefeSPatrick Mooney p->portsc |= XHCI_PS_CCS; 4964c87aefeSPatrick Mooney 4974c87aefeSPatrick Mooney p->portsc |= (value & 4984c87aefeSPatrick Mooney ~(XHCI_PS_OCA | 4994c87aefeSPatrick Mooney XHCI_PS_PR | 5004c87aefeSPatrick Mooney XHCI_PS_PED | 5014c87aefeSPatrick Mooney XHCI_PS_PLS_MASK | /* link state */ 5024c87aefeSPatrick Mooney XHCI_PS_SPEED_MASK | 5034c87aefeSPatrick Mooney XHCI_PS_PIC_MASK | /* port indicator */ 5044c87aefeSPatrick Mooney XHCI_PS_LWS | XHCI_PS_DR | XHCI_PS_WPR)); 5054c87aefeSPatrick Mooney 5064c87aefeSPatrick Mooney /* clear control bits */ 5074c87aefeSPatrick Mooney p->portsc &= ~(value & 5084c87aefeSPatrick Mooney (XHCI_PS_CSC | 5094c87aefeSPatrick Mooney XHCI_PS_PEC | 5104c87aefeSPatrick Mooney XHCI_PS_WRC | 5114c87aefeSPatrick Mooney XHCI_PS_OCC | 5124c87aefeSPatrick Mooney XHCI_PS_PRC | 5134c87aefeSPatrick Mooney XHCI_PS_PLC | 5144c87aefeSPatrick Mooney XHCI_PS_CEC | 5154c87aefeSPatrick Mooney XHCI_PS_CAS)); 5164c87aefeSPatrick Mooney 5174c87aefeSPatrick Mooney /* port disable request; for USB3, don't care */ 5184c87aefeSPatrick Mooney if (value & XHCI_PS_PED) 519154972afSPatrick Mooney DPRINTF(("Disable port %d request", port)); 5204c87aefeSPatrick Mooney 5214c87aefeSPatrick Mooney if (!(value & XHCI_PS_LWS)) 5224c87aefeSPatrick Mooney break; 5234c87aefeSPatrick Mooney 524154972afSPatrick Mooney DPRINTF(("Port new PLS: %d", newpls)); 5254c87aefeSPatrick Mooney switch (newpls) { 5264c87aefeSPatrick Mooney case 0: /* U0 */ 5274c87aefeSPatrick Mooney case 3: /* U3 */ 5284c87aefeSPatrick Mooney if (oldpls != newpls) { 5294c87aefeSPatrick Mooney p->portsc &= ~XHCI_PS_PLS_MASK; 5304c87aefeSPatrick Mooney p->portsc |= XHCI_PS_PLS_SET(newpls) | 5314c87aefeSPatrick Mooney XHCI_PS_PLC; 5324c87aefeSPatrick Mooney 5334c87aefeSPatrick Mooney if (oldpls != 0 && newpls == 0) { 5344c87aefeSPatrick Mooney pci_xhci_set_evtrb(&evtrb, port, 5354c87aefeSPatrick Mooney XHCI_TRB_ERROR_SUCCESS, 5364c87aefeSPatrick Mooney XHCI_TRB_EVENT_PORT_STS_CHANGE); 5374c87aefeSPatrick Mooney 5384c87aefeSPatrick Mooney pci_xhci_insert_event(sc, &evtrb, 1); 5394c87aefeSPatrick Mooney } 5404c87aefeSPatrick Mooney } 5414c87aefeSPatrick Mooney break; 5424c87aefeSPatrick Mooney 5434c87aefeSPatrick Mooney default: 544154972afSPatrick Mooney DPRINTF(("Unhandled change port %d PLS %u", 5454c87aefeSPatrick Mooney port, newpls)); 5464c87aefeSPatrick Mooney break; 5474c87aefeSPatrick Mooney } 5484c87aefeSPatrick Mooney break; 5494c87aefeSPatrick Mooney case 4: 5504c87aefeSPatrick Mooney /* Port power management status and control register */ 5514c87aefeSPatrick Mooney p->portpmsc = value; 5524c87aefeSPatrick Mooney break; 5534c87aefeSPatrick Mooney case 8: 5544c87aefeSPatrick Mooney /* Port link information register */ 555154972afSPatrick Mooney DPRINTF(("pci_xhci attempted write to PORTLI, port %d", 5564c87aefeSPatrick Mooney port)); 5574c87aefeSPatrick Mooney break; 5584c87aefeSPatrick Mooney case 12: 5594c87aefeSPatrick Mooney /* 5604c87aefeSPatrick Mooney * Port hardware LPM control register. 5614c87aefeSPatrick Mooney * For USB3, this register is reserved. 5624c87aefeSPatrick Mooney */ 5634c87aefeSPatrick Mooney p->porthlpmc = value; 5644c87aefeSPatrick Mooney break; 5654c87aefeSPatrick Mooney } 5664c87aefeSPatrick Mooney } 5674c87aefeSPatrick Mooney 5684c87aefeSPatrick Mooney struct xhci_dev_ctx * 5694c87aefeSPatrick Mooney pci_xhci_get_dev_ctx(struct pci_xhci_softc *sc, uint32_t slot) 5704c87aefeSPatrick Mooney { 5714c87aefeSPatrick Mooney uint64_t devctx_addr; 5724c87aefeSPatrick Mooney struct xhci_dev_ctx *devctx; 5734c87aefeSPatrick Mooney 5742b948146SAndy Fiddaman assert(slot > 0 && slot <= XHCI_MAX_DEVS); 5752b948146SAndy Fiddaman assert(XHCI_SLOTDEV_PTR(sc, slot) != NULL); 5764c87aefeSPatrick Mooney assert(sc->opregs.dcbaa_p != NULL); 5774c87aefeSPatrick Mooney 5784c87aefeSPatrick Mooney devctx_addr = sc->opregs.dcbaa_p->dcba[slot]; 5794c87aefeSPatrick Mooney 5804c87aefeSPatrick Mooney if (devctx_addr == 0) { 581154972afSPatrick Mooney DPRINTF(("get_dev_ctx devctx_addr == 0")); 5824c87aefeSPatrick Mooney return (NULL); 5834c87aefeSPatrick Mooney } 5844c87aefeSPatrick Mooney 585154972afSPatrick Mooney DPRINTF(("pci_xhci: get dev ctx, slot %u devctx addr %016lx", 5864c87aefeSPatrick Mooney slot, devctx_addr)); 5874c87aefeSPatrick Mooney devctx = XHCI_GADDR(sc, devctx_addr & ~0x3FUL); 5884c87aefeSPatrick Mooney 5894c87aefeSPatrick Mooney return (devctx); 5904c87aefeSPatrick Mooney } 5914c87aefeSPatrick Mooney 5924c87aefeSPatrick Mooney struct xhci_trb * 5934c87aefeSPatrick Mooney pci_xhci_trb_next(struct pci_xhci_softc *sc, struct xhci_trb *curtrb, 5944c87aefeSPatrick Mooney uint64_t *guestaddr) 5954c87aefeSPatrick Mooney { 5964c87aefeSPatrick Mooney struct xhci_trb *next; 5974c87aefeSPatrick Mooney 5984c87aefeSPatrick Mooney assert(curtrb != NULL); 5994c87aefeSPatrick Mooney 6004c87aefeSPatrick Mooney if (XHCI_TRB_3_TYPE_GET(curtrb->dwTrb3) == XHCI_TRB_TYPE_LINK) { 6014c87aefeSPatrick Mooney if (guestaddr) 6024c87aefeSPatrick Mooney *guestaddr = curtrb->qwTrb0 & ~0xFUL; 6034c87aefeSPatrick Mooney 6044c87aefeSPatrick Mooney next = XHCI_GADDR(sc, curtrb->qwTrb0 & ~0xFUL); 6054c87aefeSPatrick Mooney } else { 6064c87aefeSPatrick Mooney if (guestaddr) 6074c87aefeSPatrick Mooney *guestaddr += sizeof(struct xhci_trb) & ~0xFUL; 6084c87aefeSPatrick Mooney 6094c87aefeSPatrick Mooney next = curtrb + 1; 6104c87aefeSPatrick Mooney } 6114c87aefeSPatrick Mooney 6124c87aefeSPatrick Mooney return (next); 6134c87aefeSPatrick Mooney } 6144c87aefeSPatrick Mooney 6154c87aefeSPatrick Mooney static void 6164c87aefeSPatrick Mooney pci_xhci_assert_interrupt(struct pci_xhci_softc *sc) 6174c87aefeSPatrick Mooney { 6184c87aefeSPatrick Mooney 6194c87aefeSPatrick Mooney sc->rtsregs.intrreg.erdp |= XHCI_ERDP_LO_BUSY; 6204c87aefeSPatrick Mooney sc->rtsregs.intrreg.iman |= XHCI_IMAN_INTR_PEND; 6214c87aefeSPatrick Mooney sc->opregs.usbsts |= XHCI_STS_EINT; 6224c87aefeSPatrick Mooney 6234c87aefeSPatrick Mooney /* only trigger interrupt if permitted */ 6244c87aefeSPatrick Mooney if ((sc->opregs.usbcmd & XHCI_CMD_INTE) && 6254c87aefeSPatrick Mooney (sc->rtsregs.intrreg.iman & XHCI_IMAN_INTR_ENA)) { 6264c87aefeSPatrick Mooney if (pci_msi_enabled(sc->xsc_pi)) 6274c87aefeSPatrick Mooney pci_generate_msi(sc->xsc_pi, 0); 6284c87aefeSPatrick Mooney else 6294c87aefeSPatrick Mooney pci_lintr_assert(sc->xsc_pi); 6304c87aefeSPatrick Mooney } 6314c87aefeSPatrick Mooney } 6324c87aefeSPatrick Mooney 6334c87aefeSPatrick Mooney static void 6344c87aefeSPatrick Mooney pci_xhci_deassert_interrupt(struct pci_xhci_softc *sc) 6354c87aefeSPatrick Mooney { 6364c87aefeSPatrick Mooney 6374c87aefeSPatrick Mooney if (!pci_msi_enabled(sc->xsc_pi)) 6384c87aefeSPatrick Mooney pci_lintr_assert(sc->xsc_pi); 6394c87aefeSPatrick Mooney } 6404c87aefeSPatrick Mooney 6414c87aefeSPatrick Mooney static void 6424c87aefeSPatrick Mooney pci_xhci_init_ep(struct pci_xhci_dev_emu *dev, int epid) 6434c87aefeSPatrick Mooney { 6444c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 6454c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep; 6464c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 6474c87aefeSPatrick Mooney uint32_t pstreams; 6484c87aefeSPatrick Mooney int i; 6494c87aefeSPatrick Mooney 6504c87aefeSPatrick Mooney dev_ctx = dev->dev_ctx; 6514c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 6524c87aefeSPatrick Mooney devep = &dev->eps[epid]; 6534c87aefeSPatrick Mooney pstreams = XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0); 6544c87aefeSPatrick Mooney if (pstreams > 0) { 655154972afSPatrick Mooney DPRINTF(("init_ep %d with pstreams %d", epid, pstreams)); 6564c87aefeSPatrick Mooney assert(devep->ep_sctx_trbs == NULL); 6574c87aefeSPatrick Mooney 6584c87aefeSPatrick Mooney devep->ep_sctx = XHCI_GADDR(dev->xsc, ep_ctx->qwEpCtx2 & 6594c87aefeSPatrick Mooney XHCI_EPCTX_2_TR_DQ_PTR_MASK); 6604c87aefeSPatrick Mooney devep->ep_sctx_trbs = calloc(pstreams, 6614c87aefeSPatrick Mooney sizeof(struct pci_xhci_trb_ring)); 6624c87aefeSPatrick Mooney for (i = 0; i < pstreams; i++) { 6634c87aefeSPatrick Mooney devep->ep_sctx_trbs[i].ringaddr = 6644c87aefeSPatrick Mooney devep->ep_sctx[i].qwSctx0 & 6654c87aefeSPatrick Mooney XHCI_SCTX_0_TR_DQ_PTR_MASK; 6664c87aefeSPatrick Mooney devep->ep_sctx_trbs[i].ccs = 6674c87aefeSPatrick Mooney XHCI_SCTX_0_DCS_GET(devep->ep_sctx[i].qwSctx0); 6684c87aefeSPatrick Mooney } 6694c87aefeSPatrick Mooney } else { 670154972afSPatrick Mooney DPRINTF(("init_ep %d with no pstreams", epid)); 6714c87aefeSPatrick Mooney devep->ep_ringaddr = ep_ctx->qwEpCtx2 & 6724c87aefeSPatrick Mooney XHCI_EPCTX_2_TR_DQ_PTR_MASK; 6734c87aefeSPatrick Mooney devep->ep_ccs = XHCI_EPCTX_2_DCS_GET(ep_ctx->qwEpCtx2); 6744c87aefeSPatrick Mooney devep->ep_tr = XHCI_GADDR(dev->xsc, devep->ep_ringaddr); 675154972afSPatrick Mooney DPRINTF(("init_ep tr DCS %x", devep->ep_ccs)); 6764c87aefeSPatrick Mooney } 6774c87aefeSPatrick Mooney 6784c87aefeSPatrick Mooney if (devep->ep_xfer == NULL) { 6794c87aefeSPatrick Mooney devep->ep_xfer = malloc(sizeof(struct usb_data_xfer)); 6804c87aefeSPatrick Mooney USB_DATA_XFER_INIT(devep->ep_xfer); 6814c87aefeSPatrick Mooney } 6824c87aefeSPatrick Mooney } 6834c87aefeSPatrick Mooney 6844c87aefeSPatrick Mooney static void 6854c87aefeSPatrick Mooney pci_xhci_disable_ep(struct pci_xhci_dev_emu *dev, int epid) 6864c87aefeSPatrick Mooney { 6874c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 6884c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep; 6894c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 6904c87aefeSPatrick Mooney 691154972afSPatrick Mooney DPRINTF(("pci_xhci disable_ep %d", epid)); 6924c87aefeSPatrick Mooney 6934c87aefeSPatrick Mooney dev_ctx = dev->dev_ctx; 6944c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 6954c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = (ep_ctx->dwEpCtx0 & ~0x7) | XHCI_ST_EPCTX_DISABLED; 6964c87aefeSPatrick Mooney 6974c87aefeSPatrick Mooney devep = &dev->eps[epid]; 6984c87aefeSPatrick Mooney if (XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0) > 0 && 6994c87aefeSPatrick Mooney devep->ep_sctx_trbs != NULL) 7004c87aefeSPatrick Mooney free(devep->ep_sctx_trbs); 7014c87aefeSPatrick Mooney 7024c87aefeSPatrick Mooney if (devep->ep_xfer != NULL) { 7034c87aefeSPatrick Mooney free(devep->ep_xfer); 7044c87aefeSPatrick Mooney devep->ep_xfer = NULL; 7054c87aefeSPatrick Mooney } 7064c87aefeSPatrick Mooney 7074c87aefeSPatrick Mooney memset(devep, 0, sizeof(struct pci_xhci_dev_ep)); 7084c87aefeSPatrick Mooney } 7094c87aefeSPatrick Mooney 7104c87aefeSPatrick Mooney 7114c87aefeSPatrick Mooney /* reset device at slot and data structures related to it */ 7124c87aefeSPatrick Mooney static void 7134c87aefeSPatrick Mooney pci_xhci_reset_slot(struct pci_xhci_softc *sc, int slot) 7144c87aefeSPatrick Mooney { 7154c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 7164c87aefeSPatrick Mooney 7174c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 7184c87aefeSPatrick Mooney 7194c87aefeSPatrick Mooney if (!dev) { 720154972afSPatrick Mooney DPRINTF(("xhci reset unassigned slot (%d)?", slot)); 7214c87aefeSPatrick Mooney } else { 7224c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_DISABLED; 7234c87aefeSPatrick Mooney } 7244c87aefeSPatrick Mooney 7254c87aefeSPatrick Mooney /* TODO: reset ring buffer pointers */ 7264c87aefeSPatrick Mooney } 7274c87aefeSPatrick Mooney 7284c87aefeSPatrick Mooney static int 7294c87aefeSPatrick Mooney pci_xhci_insert_event(struct pci_xhci_softc *sc, struct xhci_trb *evtrb, 7304c87aefeSPatrick Mooney int do_intr) 7314c87aefeSPatrick Mooney { 7324c87aefeSPatrick Mooney struct pci_xhci_rtsregs *rts; 7334c87aefeSPatrick Mooney uint64_t erdp; 7344c87aefeSPatrick Mooney int erdp_idx; 7354c87aefeSPatrick Mooney int err; 7364c87aefeSPatrick Mooney struct xhci_trb *evtrbptr; 7374c87aefeSPatrick Mooney 7384c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_SUCCESS; 7394c87aefeSPatrick Mooney 7404c87aefeSPatrick Mooney rts = &sc->rtsregs; 7414c87aefeSPatrick Mooney 7424c87aefeSPatrick Mooney erdp = rts->intrreg.erdp & ~0xF; 7434c87aefeSPatrick Mooney erdp_idx = (erdp - rts->erstba_p[rts->er_deq_seg].qwEvrsTablePtr) / 7444c87aefeSPatrick Mooney sizeof(struct xhci_trb); 7454c87aefeSPatrick Mooney 746154972afSPatrick Mooney DPRINTF(("pci_xhci: insert event 0[%lx] 2[%x] 3[%x]", 747154972afSPatrick Mooney evtrb->qwTrb0, evtrb->dwTrb2, evtrb->dwTrb3)); 748154972afSPatrick Mooney DPRINTF(("\terdp idx %d/seg %d, enq idx %d/seg %d, pcs %u", 7494c87aefeSPatrick Mooney erdp_idx, rts->er_deq_seg, rts->er_enq_idx, 750154972afSPatrick Mooney rts->er_enq_seg, rts->event_pcs)); 751154972afSPatrick Mooney DPRINTF(("\t(erdp=0x%lx, erst=0x%lx, tblsz=%u, do_intr %d)", 752154972afSPatrick Mooney erdp, rts->erstba_p->qwEvrsTablePtr, 7534c87aefeSPatrick Mooney rts->erstba_p->dwEvrsTableSize, do_intr)); 7544c87aefeSPatrick Mooney 7554c87aefeSPatrick Mooney evtrbptr = &rts->erst_p[rts->er_enq_idx]; 7564c87aefeSPatrick Mooney 7574c87aefeSPatrick Mooney /* TODO: multi-segment table */ 7584c87aefeSPatrick Mooney if (rts->er_events_cnt >= rts->erstba_p->dwEvrsTableSize) { 759154972afSPatrick Mooney DPRINTF(("pci_xhci[%d] cannot insert event; ring full", 7604c87aefeSPatrick Mooney __LINE__)); 7614c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_EV_RING_FULL; 7624c87aefeSPatrick Mooney goto done; 7634c87aefeSPatrick Mooney } 7644c87aefeSPatrick Mooney 7654c87aefeSPatrick Mooney if (rts->er_events_cnt == rts->erstba_p->dwEvrsTableSize - 1) { 7664c87aefeSPatrick Mooney struct xhci_trb errev; 7674c87aefeSPatrick Mooney 7684c87aefeSPatrick Mooney if ((evtrbptr->dwTrb3 & 0x1) == (rts->event_pcs & 0x1)) { 7694c87aefeSPatrick Mooney 770154972afSPatrick Mooney DPRINTF(("pci_xhci[%d] insert evt err: ring full", 7714c87aefeSPatrick Mooney __LINE__)); 7724c87aefeSPatrick Mooney 7734c87aefeSPatrick Mooney errev.qwTrb0 = 0; 7744c87aefeSPatrick Mooney errev.dwTrb2 = XHCI_TRB_2_ERROR_SET( 7754c87aefeSPatrick Mooney XHCI_TRB_ERROR_EV_RING_FULL); 7764c87aefeSPatrick Mooney errev.dwTrb3 = XHCI_TRB_3_TYPE_SET( 7774c87aefeSPatrick Mooney XHCI_TRB_EVENT_HOST_CTRL) | 7784c87aefeSPatrick Mooney rts->event_pcs; 7794c87aefeSPatrick Mooney rts->er_events_cnt++; 7804c87aefeSPatrick Mooney memcpy(&rts->erst_p[rts->er_enq_idx], &errev, 7814c87aefeSPatrick Mooney sizeof(struct xhci_trb)); 7824c87aefeSPatrick Mooney rts->er_enq_idx = (rts->er_enq_idx + 1) % 7834c87aefeSPatrick Mooney rts->erstba_p->dwEvrsTableSize; 7844c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_EV_RING_FULL; 7854c87aefeSPatrick Mooney do_intr = 1; 7864c87aefeSPatrick Mooney 7874c87aefeSPatrick Mooney goto done; 7884c87aefeSPatrick Mooney } 7894c87aefeSPatrick Mooney } else { 7904c87aefeSPatrick Mooney rts->er_events_cnt++; 7914c87aefeSPatrick Mooney } 7924c87aefeSPatrick Mooney 7934c87aefeSPatrick Mooney evtrb->dwTrb3 &= ~XHCI_TRB_3_CYCLE_BIT; 7944c87aefeSPatrick Mooney evtrb->dwTrb3 |= rts->event_pcs; 7954c87aefeSPatrick Mooney 7964c87aefeSPatrick Mooney memcpy(&rts->erst_p[rts->er_enq_idx], evtrb, sizeof(struct xhci_trb)); 7974c87aefeSPatrick Mooney rts->er_enq_idx = (rts->er_enq_idx + 1) % 7984c87aefeSPatrick Mooney rts->erstba_p->dwEvrsTableSize; 7994c87aefeSPatrick Mooney 8004c87aefeSPatrick Mooney if (rts->er_enq_idx == 0) 8014c87aefeSPatrick Mooney rts->event_pcs ^= 1; 8024c87aefeSPatrick Mooney 8034c87aefeSPatrick Mooney done: 8044c87aefeSPatrick Mooney if (do_intr) 8054c87aefeSPatrick Mooney pci_xhci_assert_interrupt(sc); 8064c87aefeSPatrick Mooney 8074c87aefeSPatrick Mooney return (err); 8084c87aefeSPatrick Mooney } 8094c87aefeSPatrick Mooney 8104c87aefeSPatrick Mooney static uint32_t 8114c87aefeSPatrick Mooney pci_xhci_cmd_enable_slot(struct pci_xhci_softc *sc, uint32_t *slot) 8124c87aefeSPatrick Mooney { 8134c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 8144c87aefeSPatrick Mooney uint32_t cmderr; 8154c87aefeSPatrick Mooney int i; 8164c87aefeSPatrick Mooney 8174c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_NO_SLOTS; 8184c87aefeSPatrick Mooney if (sc->portregs != NULL) 8194c87aefeSPatrick Mooney for (i = 1; i <= XHCI_MAX_SLOTS; i++) { 8204c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, i); 8214c87aefeSPatrick Mooney if (dev && dev->dev_slotstate == XHCI_ST_DISABLED) { 8224c87aefeSPatrick Mooney *slot = i; 8234c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_ENABLED; 8244c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 8254c87aefeSPatrick Mooney dev->hci.hci_address = i; 8264c87aefeSPatrick Mooney break; 8274c87aefeSPatrick Mooney } 8284c87aefeSPatrick Mooney } 8294c87aefeSPatrick Mooney 830154972afSPatrick Mooney DPRINTF(("pci_xhci enable slot (error=%d) slot %u", 8314c87aefeSPatrick Mooney cmderr != XHCI_TRB_ERROR_SUCCESS, *slot)); 8324c87aefeSPatrick Mooney 8334c87aefeSPatrick Mooney return (cmderr); 8344c87aefeSPatrick Mooney } 8354c87aefeSPatrick Mooney 8364c87aefeSPatrick Mooney static uint32_t 8374c87aefeSPatrick Mooney pci_xhci_cmd_disable_slot(struct pci_xhci_softc *sc, uint32_t slot) 8384c87aefeSPatrick Mooney { 8394c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 8404c87aefeSPatrick Mooney uint32_t cmderr; 8414c87aefeSPatrick Mooney 842154972afSPatrick Mooney DPRINTF(("pci_xhci disable slot %u", slot)); 8434c87aefeSPatrick Mooney 8444c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_NO_SLOTS; 8454c87aefeSPatrick Mooney if (sc->portregs == NULL) 8464c87aefeSPatrick Mooney goto done; 8474c87aefeSPatrick Mooney 8482b948146SAndy Fiddaman if (slot > XHCI_MAX_SLOTS) { 8494c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SLOT_NOT_ON; 8504c87aefeSPatrick Mooney goto done; 8514c87aefeSPatrick Mooney } 8524c87aefeSPatrick Mooney 8534c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 8544c87aefeSPatrick Mooney if (dev) { 8554c87aefeSPatrick Mooney if (dev->dev_slotstate == XHCI_ST_DISABLED) { 8564c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SLOT_NOT_ON; 8574c87aefeSPatrick Mooney } else { 8584c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_DISABLED; 8594c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 8604c87aefeSPatrick Mooney /* TODO: reset events and endpoints */ 8614c87aefeSPatrick Mooney } 8622b948146SAndy Fiddaman } else 8632b948146SAndy Fiddaman cmderr = XHCI_TRB_ERROR_SLOT_NOT_ON; 8644c87aefeSPatrick Mooney 8654c87aefeSPatrick Mooney done: 8664c87aefeSPatrick Mooney return (cmderr); 8674c87aefeSPatrick Mooney } 8684c87aefeSPatrick Mooney 8694c87aefeSPatrick Mooney static uint32_t 8704c87aefeSPatrick Mooney pci_xhci_cmd_reset_device(struct pci_xhci_softc *sc, uint32_t slot) 8714c87aefeSPatrick Mooney { 8724c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 8734c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 8744c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 8754c87aefeSPatrick Mooney uint32_t cmderr; 8764c87aefeSPatrick Mooney int i; 8774c87aefeSPatrick Mooney 8784c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_NO_SLOTS; 8794c87aefeSPatrick Mooney if (sc->portregs == NULL) 8804c87aefeSPatrick Mooney goto done; 8814c87aefeSPatrick Mooney 882154972afSPatrick Mooney DPRINTF(("pci_xhci reset device slot %u", slot)); 8834c87aefeSPatrick Mooney 8844c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 8854c87aefeSPatrick Mooney if (!dev || dev->dev_slotstate == XHCI_ST_DISABLED) 8864c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SLOT_NOT_ON; 8874c87aefeSPatrick Mooney else { 8884c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_DEFAULT; 8894c87aefeSPatrick Mooney 8904c87aefeSPatrick Mooney dev->hci.hci_address = 0; 8914c87aefeSPatrick Mooney dev_ctx = pci_xhci_get_dev_ctx(sc, slot); 8924c87aefeSPatrick Mooney 8934c87aefeSPatrick Mooney /* slot state */ 8944c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3 = FIELD_REPLACE( 8954c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3, XHCI_ST_SLCTX_DEFAULT, 8964c87aefeSPatrick Mooney 0x1F, 27); 8974c87aefeSPatrick Mooney 8984c87aefeSPatrick Mooney /* number of contexts */ 8994c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0 = FIELD_REPLACE( 9004c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, 1, 0x1F, 27); 9014c87aefeSPatrick Mooney 9024c87aefeSPatrick Mooney /* reset all eps other than ep-0 */ 9034c87aefeSPatrick Mooney for (i = 2; i <= 31; i++) { 9044c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[i]; 9054c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = FIELD_REPLACE( ep_ctx->dwEpCtx0, 9064c87aefeSPatrick Mooney XHCI_ST_EPCTX_DISABLED, 0x7, 0); 9074c87aefeSPatrick Mooney } 9084c87aefeSPatrick Mooney 9094c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 9104c87aefeSPatrick Mooney } 9114c87aefeSPatrick Mooney 9124c87aefeSPatrick Mooney pci_xhci_reset_slot(sc, slot); 9134c87aefeSPatrick Mooney 9144c87aefeSPatrick Mooney done: 9154c87aefeSPatrick Mooney return (cmderr); 9164c87aefeSPatrick Mooney } 9174c87aefeSPatrick Mooney 9184c87aefeSPatrick Mooney static uint32_t 9194c87aefeSPatrick Mooney pci_xhci_cmd_address_device(struct pci_xhci_softc *sc, uint32_t slot, 9204c87aefeSPatrick Mooney struct xhci_trb *trb) 9214c87aefeSPatrick Mooney { 9224c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 9234c87aefeSPatrick Mooney struct xhci_input_dev_ctx *input_ctx; 9244c87aefeSPatrick Mooney struct xhci_slot_ctx *islot_ctx; 9254c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 9264c87aefeSPatrick Mooney struct xhci_endp_ctx *ep0_ctx; 9274c87aefeSPatrick Mooney uint32_t cmderr; 9284c87aefeSPatrick Mooney 9294c87aefeSPatrick Mooney input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL); 9304c87aefeSPatrick Mooney islot_ctx = &input_ctx->ctx_slot; 9314c87aefeSPatrick Mooney ep0_ctx = &input_ctx->ctx_ep[1]; 9324c87aefeSPatrick Mooney 9334c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 9344c87aefeSPatrick Mooney 935154972afSPatrick Mooney DPRINTF(("pci_xhci: address device, input ctl: D 0x%08x A 0x%08x,", 936154972afSPatrick Mooney input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1)); 937154972afSPatrick Mooney DPRINTF((" slot %08x %08x %08x %08x", 9384c87aefeSPatrick Mooney islot_ctx->dwSctx0, islot_ctx->dwSctx1, 939154972afSPatrick Mooney islot_ctx->dwSctx2, islot_ctx->dwSctx3)); 940154972afSPatrick Mooney DPRINTF((" ep0 %08x %08x %016lx %08x", 9414c87aefeSPatrick Mooney ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2, 9424c87aefeSPatrick Mooney ep0_ctx->dwEpCtx4)); 9434c87aefeSPatrick Mooney 9444c87aefeSPatrick Mooney /* when setting address: drop-ctx=0, add-ctx=slot+ep0 */ 9454c87aefeSPatrick Mooney if ((input_ctx->ctx_input.dwInCtx0 != 0) || 9464c87aefeSPatrick Mooney (input_ctx->ctx_input.dwInCtx1 & 0x03) != 0x03) { 947154972afSPatrick Mooney DPRINTF(("pci_xhci: address device, input ctl invalid")); 9484c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_TRB; 9494c87aefeSPatrick Mooney goto done; 9504c87aefeSPatrick Mooney } 9514c87aefeSPatrick Mooney 9524c87aefeSPatrick Mooney /* assign address to slot */ 9534c87aefeSPatrick Mooney dev_ctx = pci_xhci_get_dev_ctx(sc, slot); 9544c87aefeSPatrick Mooney 955154972afSPatrick Mooney DPRINTF(("pci_xhci: address device, dev ctx")); 956154972afSPatrick Mooney DPRINTF((" slot %08x %08x %08x %08x", 9574c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1, 9584c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3)); 9594c87aefeSPatrick Mooney 9604c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 9614c87aefeSPatrick Mooney assert(dev != NULL); 9624c87aefeSPatrick Mooney 9634c87aefeSPatrick Mooney dev->hci.hci_address = slot; 9644c87aefeSPatrick Mooney dev->dev_ctx = dev_ctx; 9654c87aefeSPatrick Mooney 9664c87aefeSPatrick Mooney if (dev->dev_ue->ue_reset == NULL || 9674c87aefeSPatrick Mooney dev->dev_ue->ue_reset(dev->dev_sc) < 0) { 9684c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_ENDP_NOT_ON; 9694c87aefeSPatrick Mooney goto done; 9704c87aefeSPatrick Mooney } 9714c87aefeSPatrick Mooney 9724c87aefeSPatrick Mooney memcpy(&dev_ctx->ctx_slot, islot_ctx, sizeof(struct xhci_slot_ctx)); 9734c87aefeSPatrick Mooney 9744c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3 = 9754c87aefeSPatrick Mooney XHCI_SCTX_3_SLOT_STATE_SET(XHCI_ST_SLCTX_ADDRESSED) | 9764c87aefeSPatrick Mooney XHCI_SCTX_3_DEV_ADDR_SET(slot); 9774c87aefeSPatrick Mooney 9784c87aefeSPatrick Mooney memcpy(&dev_ctx->ctx_ep[1], ep0_ctx, sizeof(struct xhci_endp_ctx)); 9794c87aefeSPatrick Mooney ep0_ctx = &dev_ctx->ctx_ep[1]; 9804c87aefeSPatrick Mooney ep0_ctx->dwEpCtx0 = (ep0_ctx->dwEpCtx0 & ~0x7) | 9814c87aefeSPatrick Mooney XHCI_EPCTX_0_EPSTATE_SET(XHCI_ST_EPCTX_RUNNING); 9824c87aefeSPatrick Mooney 9834c87aefeSPatrick Mooney pci_xhci_init_ep(dev, 1); 9844c87aefeSPatrick Mooney 9854c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_ADDRESSED; 9864c87aefeSPatrick Mooney 987154972afSPatrick Mooney DPRINTF(("pci_xhci: address device, output ctx")); 988154972afSPatrick Mooney DPRINTF((" slot %08x %08x %08x %08x", 9894c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1, 990154972afSPatrick Mooney dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3)); 991154972afSPatrick Mooney DPRINTF((" ep0 %08x %08x %016lx %08x", 9924c87aefeSPatrick Mooney ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2, 9934c87aefeSPatrick Mooney ep0_ctx->dwEpCtx4)); 9944c87aefeSPatrick Mooney 9954c87aefeSPatrick Mooney done: 9964c87aefeSPatrick Mooney return (cmderr); 9974c87aefeSPatrick Mooney } 9984c87aefeSPatrick Mooney 9994c87aefeSPatrick Mooney static uint32_t 10004c87aefeSPatrick Mooney pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot, 10014c87aefeSPatrick Mooney struct xhci_trb *trb) 10024c87aefeSPatrick Mooney { 10034c87aefeSPatrick Mooney struct xhci_input_dev_ctx *input_ctx; 10044c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 10054c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 10064c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx, *iep_ctx; 10074c87aefeSPatrick Mooney uint32_t cmderr; 10084c87aefeSPatrick Mooney int i; 10094c87aefeSPatrick Mooney 10104c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 10114c87aefeSPatrick Mooney 1012154972afSPatrick Mooney DPRINTF(("pci_xhci config_ep slot %u", slot)); 10134c87aefeSPatrick Mooney 10144c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 10154c87aefeSPatrick Mooney assert(dev != NULL); 10164c87aefeSPatrick Mooney 10174c87aefeSPatrick Mooney if ((trb->dwTrb3 & XHCI_TRB_3_DCEP_BIT) != 0) { 1018154972afSPatrick Mooney DPRINTF(("pci_xhci config_ep - deconfigure ep slot %u", 10194c87aefeSPatrick Mooney slot)); 10204c87aefeSPatrick Mooney if (dev->dev_ue->ue_stop != NULL) 10214c87aefeSPatrick Mooney dev->dev_ue->ue_stop(dev->dev_sc); 10224c87aefeSPatrick Mooney 10234c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_ADDRESSED; 10244c87aefeSPatrick Mooney 10254c87aefeSPatrick Mooney dev->hci.hci_address = 0; 10264c87aefeSPatrick Mooney dev_ctx = pci_xhci_get_dev_ctx(sc, slot); 10274c87aefeSPatrick Mooney 10284c87aefeSPatrick Mooney /* number of contexts */ 10294c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0 = FIELD_REPLACE( 10304c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, 1, 0x1F, 27); 10314c87aefeSPatrick Mooney 10324c87aefeSPatrick Mooney /* slot state */ 10334c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3 = FIELD_REPLACE( 10344c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3, XHCI_ST_SLCTX_ADDRESSED, 10354c87aefeSPatrick Mooney 0x1F, 27); 10364c87aefeSPatrick Mooney 10374c87aefeSPatrick Mooney /* disable endpoints */ 10384c87aefeSPatrick Mooney for (i = 2; i < 32; i++) 10394c87aefeSPatrick Mooney pci_xhci_disable_ep(dev, i); 10404c87aefeSPatrick Mooney 10414c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 10424c87aefeSPatrick Mooney 10434c87aefeSPatrick Mooney goto done; 10444c87aefeSPatrick Mooney } 10454c87aefeSPatrick Mooney 10464c87aefeSPatrick Mooney if (dev->dev_slotstate < XHCI_ST_ADDRESSED) { 1047154972afSPatrick Mooney DPRINTF(("pci_xhci: config_ep slotstate x%x != addressed", 10484c87aefeSPatrick Mooney dev->dev_slotstate)); 10494c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SLOT_NOT_ON; 10504c87aefeSPatrick Mooney goto done; 10514c87aefeSPatrick Mooney } 10524c87aefeSPatrick Mooney 10534c87aefeSPatrick Mooney /* In addressed/configured state; 10544c87aefeSPatrick Mooney * for each drop endpoint ctx flag: 10554c87aefeSPatrick Mooney * ep->state = DISABLED 10564c87aefeSPatrick Mooney * for each add endpoint ctx flag: 10574c87aefeSPatrick Mooney * cp(ep-in, ep-out) 10584c87aefeSPatrick Mooney * ep->state = RUNNING 10594c87aefeSPatrick Mooney * for each drop+add endpoint flag: 10604c87aefeSPatrick Mooney * reset ep resources 10614c87aefeSPatrick Mooney * cp(ep-in, ep-out) 10624c87aefeSPatrick Mooney * ep->state = RUNNING 10634c87aefeSPatrick Mooney * if input->DisabledCtx[2-31] < 30: (at least 1 ep not disabled) 10644c87aefeSPatrick Mooney * slot->state = configured 10654c87aefeSPatrick Mooney */ 10664c87aefeSPatrick Mooney 10674c87aefeSPatrick Mooney input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL); 10684c87aefeSPatrick Mooney dev_ctx = dev->dev_ctx; 1069154972afSPatrick Mooney DPRINTF(("pci_xhci: config_ep inputctx: D:x%08x A:x%08x 7:x%08x", 10704c87aefeSPatrick Mooney input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1, 10714c87aefeSPatrick Mooney input_ctx->ctx_input.dwInCtx7)); 10724c87aefeSPatrick Mooney 10734c87aefeSPatrick Mooney for (i = 2; i <= 31; i++) { 10744c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[i]; 10754c87aefeSPatrick Mooney 10764c87aefeSPatrick Mooney if (input_ctx->ctx_input.dwInCtx0 & 10774c87aefeSPatrick Mooney XHCI_INCTX_0_DROP_MASK(i)) { 1078154972afSPatrick Mooney DPRINTF((" config ep - dropping ep %d", i)); 10794c87aefeSPatrick Mooney pci_xhci_disable_ep(dev, i); 10804c87aefeSPatrick Mooney } 10814c87aefeSPatrick Mooney 10824c87aefeSPatrick Mooney if (input_ctx->ctx_input.dwInCtx1 & 10834c87aefeSPatrick Mooney XHCI_INCTX_1_ADD_MASK(i)) { 10844c87aefeSPatrick Mooney iep_ctx = &input_ctx->ctx_ep[i]; 10854c87aefeSPatrick Mooney 1086154972afSPatrick Mooney DPRINTF((" enable ep[%d] %08x %08x %016lx %08x", 10874c87aefeSPatrick Mooney i, iep_ctx->dwEpCtx0, iep_ctx->dwEpCtx1, 10884c87aefeSPatrick Mooney iep_ctx->qwEpCtx2, iep_ctx->dwEpCtx4)); 10894c87aefeSPatrick Mooney 10904c87aefeSPatrick Mooney memcpy(ep_ctx, iep_ctx, sizeof(struct xhci_endp_ctx)); 10914c87aefeSPatrick Mooney 10924c87aefeSPatrick Mooney pci_xhci_init_ep(dev, i); 10934c87aefeSPatrick Mooney 10944c87aefeSPatrick Mooney /* ep state */ 10954c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = FIELD_REPLACE( 10964c87aefeSPatrick Mooney ep_ctx->dwEpCtx0, XHCI_ST_EPCTX_RUNNING, 0x7, 0); 10974c87aefeSPatrick Mooney } 10984c87aefeSPatrick Mooney } 10994c87aefeSPatrick Mooney 11004c87aefeSPatrick Mooney /* slot state to configured */ 11014c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3 = FIELD_REPLACE( 11024c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx3, XHCI_ST_SLCTX_CONFIGURED, 0x1F, 27); 11034c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0 = FIELD_COPY( 11044c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, input_ctx->ctx_slot.dwSctx0, 0x1F, 27); 11054c87aefeSPatrick Mooney dev->dev_slotstate = XHCI_ST_CONFIGURED; 11064c87aefeSPatrick Mooney 11074c87aefeSPatrick Mooney DPRINTF(("EP configured; slot %u [0]=0x%08x [1]=0x%08x [2]=0x%08x " 1108154972afSPatrick Mooney "[3]=0x%08x", 11094c87aefeSPatrick Mooney slot, dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1, 11104c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3)); 11114c87aefeSPatrick Mooney 11124c87aefeSPatrick Mooney done: 11134c87aefeSPatrick Mooney return (cmderr); 11144c87aefeSPatrick Mooney } 11154c87aefeSPatrick Mooney 11164c87aefeSPatrick Mooney static uint32_t 11174c87aefeSPatrick Mooney pci_xhci_cmd_reset_ep(struct pci_xhci_softc *sc, uint32_t slot, 11184c87aefeSPatrick Mooney struct xhci_trb *trb) 11194c87aefeSPatrick Mooney { 11204c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 11214c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep; 11224c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 11234c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 11244c87aefeSPatrick Mooney uint32_t cmderr, epid; 11254c87aefeSPatrick Mooney uint32_t type; 11264c87aefeSPatrick Mooney 11274c87aefeSPatrick Mooney epid = XHCI_TRB_3_EP_GET(trb->dwTrb3); 11284c87aefeSPatrick Mooney 1129154972afSPatrick Mooney DPRINTF(("pci_xhci: reset ep %u: slot %u", epid, slot)); 11304c87aefeSPatrick Mooney 11314c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 11324c87aefeSPatrick Mooney 11334c87aefeSPatrick Mooney type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3); 11344c87aefeSPatrick Mooney 11354c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 11364c87aefeSPatrick Mooney assert(dev != NULL); 11374c87aefeSPatrick Mooney 11384c87aefeSPatrick Mooney if (type == XHCI_TRB_TYPE_STOP_EP && 11394c87aefeSPatrick Mooney (trb->dwTrb3 & XHCI_TRB_3_SUSP_EP_BIT) != 0) { 11404c87aefeSPatrick Mooney /* XXX suspend endpoint for 10ms */ 11414c87aefeSPatrick Mooney } 11424c87aefeSPatrick Mooney 11434c87aefeSPatrick Mooney if (epid < 1 || epid > 31) { 1144154972afSPatrick Mooney DPRINTF(("pci_xhci: reset ep: invalid epid %u", epid)); 11454c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_TRB; 11464c87aefeSPatrick Mooney goto done; 11474c87aefeSPatrick Mooney } 11484c87aefeSPatrick Mooney 11494c87aefeSPatrick Mooney devep = &dev->eps[epid]; 11504c87aefeSPatrick Mooney if (devep->ep_xfer != NULL) 11514c87aefeSPatrick Mooney USB_DATA_XFER_RESET(devep->ep_xfer); 11524c87aefeSPatrick Mooney 11534c87aefeSPatrick Mooney dev_ctx = dev->dev_ctx; 11544c87aefeSPatrick Mooney assert(dev_ctx != NULL); 11554c87aefeSPatrick Mooney 11564c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 11574c87aefeSPatrick Mooney 11584c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = (ep_ctx->dwEpCtx0 & ~0x7) | XHCI_ST_EPCTX_STOPPED; 11594c87aefeSPatrick Mooney 11604c87aefeSPatrick Mooney if (XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0) == 0) 11614c87aefeSPatrick Mooney ep_ctx->qwEpCtx2 = devep->ep_ringaddr | devep->ep_ccs; 11624c87aefeSPatrick Mooney 1163154972afSPatrick Mooney DPRINTF(("pci_xhci: reset ep[%u] %08x %08x %016lx %08x", 11644c87aefeSPatrick Mooney epid, ep_ctx->dwEpCtx0, ep_ctx->dwEpCtx1, ep_ctx->qwEpCtx2, 11654c87aefeSPatrick Mooney ep_ctx->dwEpCtx4)); 11664c87aefeSPatrick Mooney 11674c87aefeSPatrick Mooney if (type == XHCI_TRB_TYPE_RESET_EP && 11684c87aefeSPatrick Mooney (dev->dev_ue->ue_reset == NULL || 11694c87aefeSPatrick Mooney dev->dev_ue->ue_reset(dev->dev_sc) < 0)) { 11704c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_ENDP_NOT_ON; 11714c87aefeSPatrick Mooney goto done; 11724c87aefeSPatrick Mooney } 11734c87aefeSPatrick Mooney 11744c87aefeSPatrick Mooney done: 11754c87aefeSPatrick Mooney return (cmderr); 11764c87aefeSPatrick Mooney } 11774c87aefeSPatrick Mooney 11784c87aefeSPatrick Mooney 11794c87aefeSPatrick Mooney static uint32_t 11804c87aefeSPatrick Mooney pci_xhci_find_stream(struct pci_xhci_softc *sc, struct xhci_endp_ctx *ep, 11814c87aefeSPatrick Mooney uint32_t streamid, struct xhci_stream_ctx **osctx) 11824c87aefeSPatrick Mooney { 11834c87aefeSPatrick Mooney struct xhci_stream_ctx *sctx; 11844c87aefeSPatrick Mooney uint32_t maxpstreams; 11854c87aefeSPatrick Mooney 11864c87aefeSPatrick Mooney maxpstreams = XHCI_EPCTX_0_MAXP_STREAMS_GET(ep->dwEpCtx0); 11874c87aefeSPatrick Mooney if (maxpstreams == 0) 11884c87aefeSPatrick Mooney return (XHCI_TRB_ERROR_TRB); 11894c87aefeSPatrick Mooney 11904c87aefeSPatrick Mooney if (maxpstreams > XHCI_STREAMS_MAX) 11914c87aefeSPatrick Mooney return (XHCI_TRB_ERROR_INVALID_SID); 11924c87aefeSPatrick Mooney 11934c87aefeSPatrick Mooney if (XHCI_EPCTX_0_LSA_GET(ep->dwEpCtx0) == 0) { 1194154972afSPatrick Mooney DPRINTF(("pci_xhci: find_stream; LSA bit not set")); 11954c87aefeSPatrick Mooney return (XHCI_TRB_ERROR_INVALID_SID); 11964c87aefeSPatrick Mooney } 11974c87aefeSPatrick Mooney 11984c87aefeSPatrick Mooney /* only support primary stream */ 11994c87aefeSPatrick Mooney if (streamid > maxpstreams) 12004c87aefeSPatrick Mooney return (XHCI_TRB_ERROR_STREAM_TYPE); 12014c87aefeSPatrick Mooney 12024c87aefeSPatrick Mooney sctx = XHCI_GADDR(sc, ep->qwEpCtx2 & ~0xFUL) + streamid; 12034c87aefeSPatrick Mooney if (!XHCI_SCTX_0_SCT_GET(sctx->qwSctx0)) 12044c87aefeSPatrick Mooney return (XHCI_TRB_ERROR_STREAM_TYPE); 12054c87aefeSPatrick Mooney 12064c87aefeSPatrick Mooney *osctx = sctx; 12074c87aefeSPatrick Mooney 12084c87aefeSPatrick Mooney return (XHCI_TRB_ERROR_SUCCESS); 12094c87aefeSPatrick Mooney } 12104c87aefeSPatrick Mooney 12114c87aefeSPatrick Mooney 12124c87aefeSPatrick Mooney static uint32_t 12134c87aefeSPatrick Mooney pci_xhci_cmd_set_tr(struct pci_xhci_softc *sc, uint32_t slot, 12144c87aefeSPatrick Mooney struct xhci_trb *trb) 12154c87aefeSPatrick Mooney { 12164c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 12174c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep; 12184c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 12194c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 12204c87aefeSPatrick Mooney uint32_t cmderr, epid; 12214c87aefeSPatrick Mooney uint32_t streamid; 12224c87aefeSPatrick Mooney 12234c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 12244c87aefeSPatrick Mooney 12254c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 12264c87aefeSPatrick Mooney assert(dev != NULL); 12274c87aefeSPatrick Mooney 1228154972afSPatrick Mooney DPRINTF(("pci_xhci set_tr: new-tr x%016lx, SCT %u DCS %u", 12294c87aefeSPatrick Mooney (trb->qwTrb0 & ~0xF), (uint32_t)((trb->qwTrb0 >> 1) & 0x7), 1230154972afSPatrick Mooney (uint32_t)(trb->qwTrb0 & 0x1))); 1231154972afSPatrick Mooney DPRINTF((" stream-id %u, slot %u, epid %u, C %u", 1232154972afSPatrick Mooney (trb->dwTrb2 >> 16) & 0xFFFF, 12334c87aefeSPatrick Mooney XHCI_TRB_3_SLOT_GET(trb->dwTrb3), 12344c87aefeSPatrick Mooney XHCI_TRB_3_EP_GET(trb->dwTrb3), trb->dwTrb3 & 0x1)); 12354c87aefeSPatrick Mooney 12364c87aefeSPatrick Mooney epid = XHCI_TRB_3_EP_GET(trb->dwTrb3); 12374c87aefeSPatrick Mooney if (epid < 1 || epid > 31) { 1238154972afSPatrick Mooney DPRINTF(("pci_xhci: set_tr_deq: invalid epid %u", epid)); 12394c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_TRB; 12404c87aefeSPatrick Mooney goto done; 12414c87aefeSPatrick Mooney } 12424c87aefeSPatrick Mooney 12434c87aefeSPatrick Mooney dev_ctx = dev->dev_ctx; 12444c87aefeSPatrick Mooney assert(dev_ctx != NULL); 12454c87aefeSPatrick Mooney 12464c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 12474c87aefeSPatrick Mooney devep = &dev->eps[epid]; 12484c87aefeSPatrick Mooney 12494c87aefeSPatrick Mooney switch (XHCI_EPCTX_0_EPSTATE_GET(ep_ctx->dwEpCtx0)) { 12504c87aefeSPatrick Mooney case XHCI_ST_EPCTX_STOPPED: 12514c87aefeSPatrick Mooney case XHCI_ST_EPCTX_ERROR: 12524c87aefeSPatrick Mooney break; 12534c87aefeSPatrick Mooney default: 1254154972afSPatrick Mooney DPRINTF(("pci_xhci cmd set_tr invalid state %x", 12554c87aefeSPatrick Mooney XHCI_EPCTX_0_EPSTATE_GET(ep_ctx->dwEpCtx0))); 12564c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_CONTEXT_STATE; 12574c87aefeSPatrick Mooney goto done; 12584c87aefeSPatrick Mooney } 12594c87aefeSPatrick Mooney 12604c87aefeSPatrick Mooney streamid = XHCI_TRB_2_STREAM_GET(trb->dwTrb2); 12614c87aefeSPatrick Mooney if (XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0) > 0) { 12624c87aefeSPatrick Mooney struct xhci_stream_ctx *sctx; 12634c87aefeSPatrick Mooney 12644c87aefeSPatrick Mooney sctx = NULL; 12654c87aefeSPatrick Mooney cmderr = pci_xhci_find_stream(sc, ep_ctx, streamid, &sctx); 12664c87aefeSPatrick Mooney if (sctx != NULL) { 12674c87aefeSPatrick Mooney assert(devep->ep_sctx != NULL); 12684c87aefeSPatrick Mooney 12694c87aefeSPatrick Mooney devep->ep_sctx[streamid].qwSctx0 = trb->qwTrb0; 12704c87aefeSPatrick Mooney devep->ep_sctx_trbs[streamid].ringaddr = 12714c87aefeSPatrick Mooney trb->qwTrb0 & ~0xF; 12724c87aefeSPatrick Mooney devep->ep_sctx_trbs[streamid].ccs = 12734c87aefeSPatrick Mooney XHCI_EPCTX_2_DCS_GET(trb->qwTrb0); 12744c87aefeSPatrick Mooney } 12754c87aefeSPatrick Mooney } else { 12764c87aefeSPatrick Mooney if (streamid != 0) { 1277154972afSPatrick Mooney DPRINTF(("pci_xhci cmd set_tr streamid %x != 0", 12784c87aefeSPatrick Mooney streamid)); 12794c87aefeSPatrick Mooney } 12804c87aefeSPatrick Mooney ep_ctx->qwEpCtx2 = trb->qwTrb0 & ~0xFUL; 12814c87aefeSPatrick Mooney devep->ep_ringaddr = ep_ctx->qwEpCtx2 & ~0xFUL; 12824c87aefeSPatrick Mooney devep->ep_ccs = trb->qwTrb0 & 0x1; 12834c87aefeSPatrick Mooney devep->ep_tr = XHCI_GADDR(sc, devep->ep_ringaddr); 12844c87aefeSPatrick Mooney 1285154972afSPatrick Mooney DPRINTF(("pci_xhci set_tr first TRB:")); 12864c87aefeSPatrick Mooney pci_xhci_dump_trb(devep->ep_tr); 12874c87aefeSPatrick Mooney } 12884c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = (ep_ctx->dwEpCtx0 & ~0x7) | XHCI_ST_EPCTX_STOPPED; 12894c87aefeSPatrick Mooney 12904c87aefeSPatrick Mooney done: 12914c87aefeSPatrick Mooney return (cmderr); 12924c87aefeSPatrick Mooney } 12934c87aefeSPatrick Mooney 12944c87aefeSPatrick Mooney static uint32_t 12954c87aefeSPatrick Mooney pci_xhci_cmd_eval_ctx(struct pci_xhci_softc *sc, uint32_t slot, 12964c87aefeSPatrick Mooney struct xhci_trb *trb) 12974c87aefeSPatrick Mooney { 12984c87aefeSPatrick Mooney struct xhci_input_dev_ctx *input_ctx; 12994c87aefeSPatrick Mooney struct xhci_slot_ctx *islot_ctx; 13004c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 13014c87aefeSPatrick Mooney struct xhci_endp_ctx *ep0_ctx; 13024c87aefeSPatrick Mooney uint32_t cmderr; 13034c87aefeSPatrick Mooney 13044c87aefeSPatrick Mooney input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL); 13054c87aefeSPatrick Mooney islot_ctx = &input_ctx->ctx_slot; 13064c87aefeSPatrick Mooney ep0_ctx = &input_ctx->ctx_ep[1]; 13074c87aefeSPatrick Mooney 13084c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 1309154972afSPatrick Mooney DPRINTF(("pci_xhci: eval ctx, input ctl: D 0x%08x A 0x%08x,", 1310154972afSPatrick Mooney input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1)); 1311154972afSPatrick Mooney DPRINTF((" slot %08x %08x %08x %08x", 13124c87aefeSPatrick Mooney islot_ctx->dwSctx0, islot_ctx->dwSctx1, 1313154972afSPatrick Mooney islot_ctx->dwSctx2, islot_ctx->dwSctx3)); 1314154972afSPatrick Mooney DPRINTF((" ep0 %08x %08x %016lx %08x", 13154c87aefeSPatrick Mooney ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2, 13164c87aefeSPatrick Mooney ep0_ctx->dwEpCtx4)); 13174c87aefeSPatrick Mooney 13184c87aefeSPatrick Mooney /* this command expects drop-ctx=0 & add-ctx=slot+ep0 */ 13194c87aefeSPatrick Mooney if ((input_ctx->ctx_input.dwInCtx0 != 0) || 13204c87aefeSPatrick Mooney (input_ctx->ctx_input.dwInCtx1 & 0x03) == 0) { 1321154972afSPatrick Mooney DPRINTF(("pci_xhci: eval ctx, input ctl invalid")); 13224c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_TRB; 13234c87aefeSPatrick Mooney goto done; 13244c87aefeSPatrick Mooney } 13254c87aefeSPatrick Mooney 13264c87aefeSPatrick Mooney /* assign address to slot; in this emulation, slot_id = address */ 13274c87aefeSPatrick Mooney dev_ctx = pci_xhci_get_dev_ctx(sc, slot); 13284c87aefeSPatrick Mooney 1329154972afSPatrick Mooney DPRINTF(("pci_xhci: eval ctx, dev ctx")); 1330154972afSPatrick Mooney DPRINTF((" slot %08x %08x %08x %08x", 13314c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1, 13324c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3)); 13334c87aefeSPatrick Mooney 13344c87aefeSPatrick Mooney if (input_ctx->ctx_input.dwInCtx1 & 0x01) { /* slot ctx */ 13354c87aefeSPatrick Mooney /* set max exit latency */ 13364c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx1 = FIELD_COPY( 13374c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx1, input_ctx->ctx_slot.dwSctx1, 13384c87aefeSPatrick Mooney 0xFFFF, 0); 13394c87aefeSPatrick Mooney 13404c87aefeSPatrick Mooney /* set interrupter target */ 13414c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx2 = FIELD_COPY( 13424c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx2, input_ctx->ctx_slot.dwSctx2, 13434c87aefeSPatrick Mooney 0x3FF, 22); 13444c87aefeSPatrick Mooney } 13454c87aefeSPatrick Mooney if (input_ctx->ctx_input.dwInCtx1 & 0x02) { /* control ctx */ 13464c87aefeSPatrick Mooney /* set max packet size */ 13474c87aefeSPatrick Mooney dev_ctx->ctx_ep[1].dwEpCtx1 = FIELD_COPY( 13484c87aefeSPatrick Mooney dev_ctx->ctx_ep[1].dwEpCtx1, ep0_ctx->dwEpCtx1, 13494c87aefeSPatrick Mooney 0xFFFF, 16); 13504c87aefeSPatrick Mooney 13514c87aefeSPatrick Mooney ep0_ctx = &dev_ctx->ctx_ep[1]; 13524c87aefeSPatrick Mooney } 13534c87aefeSPatrick Mooney 1354154972afSPatrick Mooney DPRINTF(("pci_xhci: eval ctx, output ctx")); 1355154972afSPatrick Mooney DPRINTF((" slot %08x %08x %08x %08x", 13564c87aefeSPatrick Mooney dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1, 1357154972afSPatrick Mooney dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3)); 1358154972afSPatrick Mooney DPRINTF((" ep0 %08x %08x %016lx %08x", 13594c87aefeSPatrick Mooney ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2, 13604c87aefeSPatrick Mooney ep0_ctx->dwEpCtx4)); 13614c87aefeSPatrick Mooney 13624c87aefeSPatrick Mooney done: 13634c87aefeSPatrick Mooney return (cmderr); 13644c87aefeSPatrick Mooney } 13654c87aefeSPatrick Mooney 13664c87aefeSPatrick Mooney static int 13674c87aefeSPatrick Mooney pci_xhci_complete_commands(struct pci_xhci_softc *sc) 13684c87aefeSPatrick Mooney { 13694c87aefeSPatrick Mooney struct xhci_trb evtrb; 13704c87aefeSPatrick Mooney struct xhci_trb *trb; 13714c87aefeSPatrick Mooney uint64_t crcr; 13724c87aefeSPatrick Mooney uint32_t ccs; /* cycle state (XHCI 4.9.2) */ 13734c87aefeSPatrick Mooney uint32_t type; 13744c87aefeSPatrick Mooney uint32_t slot; 13754c87aefeSPatrick Mooney uint32_t cmderr; 13764c87aefeSPatrick Mooney int error; 13774c87aefeSPatrick Mooney 13784c87aefeSPatrick Mooney error = 0; 13794c87aefeSPatrick Mooney sc->opregs.crcr |= XHCI_CRCR_LO_CRR; 13804c87aefeSPatrick Mooney 13814c87aefeSPatrick Mooney trb = sc->opregs.cr_p; 13824c87aefeSPatrick Mooney ccs = sc->opregs.crcr & XHCI_CRCR_LO_RCS; 13834c87aefeSPatrick Mooney crcr = sc->opregs.crcr & ~0xF; 13844c87aefeSPatrick Mooney 13854c87aefeSPatrick Mooney while (1) { 13864c87aefeSPatrick Mooney sc->opregs.cr_p = trb; 13874c87aefeSPatrick Mooney 13884c87aefeSPatrick Mooney type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3); 13894c87aefeSPatrick Mooney 13904c87aefeSPatrick Mooney if ((trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT) != 13914c87aefeSPatrick Mooney (ccs & XHCI_TRB_3_CYCLE_BIT)) 13924c87aefeSPatrick Mooney break; 13934c87aefeSPatrick Mooney 13944c87aefeSPatrick Mooney DPRINTF(("pci_xhci: cmd type 0x%x, Trb0 x%016lx dwTrb2 x%08x" 1395154972afSPatrick Mooney " dwTrb3 x%08x, TRB_CYCLE %u/ccs %u", 13964c87aefeSPatrick Mooney type, trb->qwTrb0, trb->dwTrb2, trb->dwTrb3, 13974c87aefeSPatrick Mooney trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT, ccs)); 13984c87aefeSPatrick Mooney 13994c87aefeSPatrick Mooney cmderr = XHCI_TRB_ERROR_SUCCESS; 14004c87aefeSPatrick Mooney evtrb.dwTrb2 = 0; 14014c87aefeSPatrick Mooney evtrb.dwTrb3 = (ccs & XHCI_TRB_3_CYCLE_BIT) | 14024c87aefeSPatrick Mooney XHCI_TRB_3_TYPE_SET(XHCI_TRB_EVENT_CMD_COMPLETE); 14034c87aefeSPatrick Mooney slot = 0; 14044c87aefeSPatrick Mooney 14054c87aefeSPatrick Mooney switch (type) { 14064c87aefeSPatrick Mooney case XHCI_TRB_TYPE_LINK: /* 0x06 */ 14074c87aefeSPatrick Mooney if (trb->dwTrb3 & XHCI_TRB_3_TC_BIT) 14084c87aefeSPatrick Mooney ccs ^= XHCI_CRCR_LO_RCS; 14094c87aefeSPatrick Mooney break; 14104c87aefeSPatrick Mooney 14114c87aefeSPatrick Mooney case XHCI_TRB_TYPE_ENABLE_SLOT: /* 0x09 */ 14124c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_enable_slot(sc, &slot); 14134c87aefeSPatrick Mooney break; 14144c87aefeSPatrick Mooney 14154c87aefeSPatrick Mooney case XHCI_TRB_TYPE_DISABLE_SLOT: /* 0x0A */ 14164c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14174c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_disable_slot(sc, slot); 14184c87aefeSPatrick Mooney break; 14194c87aefeSPatrick Mooney 14204c87aefeSPatrick Mooney case XHCI_TRB_TYPE_ADDRESS_DEVICE: /* 0x0B */ 14214c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14224c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_address_device(sc, slot, trb); 14234c87aefeSPatrick Mooney break; 14244c87aefeSPatrick Mooney 14254c87aefeSPatrick Mooney case XHCI_TRB_TYPE_CONFIGURE_EP: /* 0x0C */ 14264c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14274c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_config_ep(sc, slot, trb); 14284c87aefeSPatrick Mooney break; 14294c87aefeSPatrick Mooney 14304c87aefeSPatrick Mooney case XHCI_TRB_TYPE_EVALUATE_CTX: /* 0x0D */ 14314c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14324c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_eval_ctx(sc, slot, trb); 14334c87aefeSPatrick Mooney break; 14344c87aefeSPatrick Mooney 14354c87aefeSPatrick Mooney case XHCI_TRB_TYPE_RESET_EP: /* 0x0E */ 1436154972afSPatrick Mooney DPRINTF(("Reset Endpoint on slot %d", slot)); 14374c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14384c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_reset_ep(sc, slot, trb); 14394c87aefeSPatrick Mooney break; 14404c87aefeSPatrick Mooney 14414c87aefeSPatrick Mooney case XHCI_TRB_TYPE_STOP_EP: /* 0x0F */ 1442154972afSPatrick Mooney DPRINTF(("Stop Endpoint on slot %d", slot)); 14434c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14444c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_reset_ep(sc, slot, trb); 14454c87aefeSPatrick Mooney break; 14464c87aefeSPatrick Mooney 14474c87aefeSPatrick Mooney case XHCI_TRB_TYPE_SET_TR_DEQUEUE: /* 0x10 */ 14484c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14494c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_set_tr(sc, slot, trb); 14504c87aefeSPatrick Mooney break; 14514c87aefeSPatrick Mooney 14524c87aefeSPatrick Mooney case XHCI_TRB_TYPE_RESET_DEVICE: /* 0x11 */ 14534c87aefeSPatrick Mooney slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); 14544c87aefeSPatrick Mooney cmderr = pci_xhci_cmd_reset_device(sc, slot); 14554c87aefeSPatrick Mooney break; 14564c87aefeSPatrick Mooney 14574c87aefeSPatrick Mooney case XHCI_TRB_TYPE_FORCE_EVENT: /* 0x12 */ 14584c87aefeSPatrick Mooney /* TODO: */ 14594c87aefeSPatrick Mooney break; 14604c87aefeSPatrick Mooney 14614c87aefeSPatrick Mooney case XHCI_TRB_TYPE_NEGOTIATE_BW: /* 0x13 */ 14624c87aefeSPatrick Mooney break; 14634c87aefeSPatrick Mooney 14644c87aefeSPatrick Mooney case XHCI_TRB_TYPE_SET_LATENCY_TOL: /* 0x14 */ 14654c87aefeSPatrick Mooney break; 14664c87aefeSPatrick Mooney 14674c87aefeSPatrick Mooney case XHCI_TRB_TYPE_GET_PORT_BW: /* 0x15 */ 14684c87aefeSPatrick Mooney break; 14694c87aefeSPatrick Mooney 14704c87aefeSPatrick Mooney case XHCI_TRB_TYPE_FORCE_HEADER: /* 0x16 */ 14714c87aefeSPatrick Mooney break; 14724c87aefeSPatrick Mooney 14734c87aefeSPatrick Mooney case XHCI_TRB_TYPE_NOOP_CMD: /* 0x17 */ 14744c87aefeSPatrick Mooney break; 14754c87aefeSPatrick Mooney 14764c87aefeSPatrick Mooney default: 1477154972afSPatrick Mooney DPRINTF(("pci_xhci: unsupported cmd %x", type)); 14784c87aefeSPatrick Mooney break; 14794c87aefeSPatrick Mooney } 14804c87aefeSPatrick Mooney 14814c87aefeSPatrick Mooney if (type != XHCI_TRB_TYPE_LINK) { 14824c87aefeSPatrick Mooney /* 14834c87aefeSPatrick Mooney * insert command completion event and assert intr 14844c87aefeSPatrick Mooney */ 14854c87aefeSPatrick Mooney evtrb.qwTrb0 = crcr; 14864c87aefeSPatrick Mooney evtrb.dwTrb2 |= XHCI_TRB_2_ERROR_SET(cmderr); 14874c87aefeSPatrick Mooney evtrb.dwTrb3 |= XHCI_TRB_3_SLOT_SET(slot); 1488154972afSPatrick Mooney DPRINTF(("pci_xhci: command 0x%x result: 0x%x", 14894c87aefeSPatrick Mooney type, cmderr)); 14904c87aefeSPatrick Mooney pci_xhci_insert_event(sc, &evtrb, 1); 14914c87aefeSPatrick Mooney } 14924c87aefeSPatrick Mooney 14934c87aefeSPatrick Mooney trb = pci_xhci_trb_next(sc, trb, &crcr); 14944c87aefeSPatrick Mooney } 14954c87aefeSPatrick Mooney 14964c87aefeSPatrick Mooney sc->opregs.crcr = crcr | (sc->opregs.crcr & XHCI_CRCR_LO_CA) | ccs; 14974c87aefeSPatrick Mooney sc->opregs.crcr &= ~XHCI_CRCR_LO_CRR; 14984c87aefeSPatrick Mooney return (error); 14994c87aefeSPatrick Mooney } 15004c87aefeSPatrick Mooney 15014c87aefeSPatrick Mooney static void 15024c87aefeSPatrick Mooney pci_xhci_dump_trb(struct xhci_trb *trb) 15034c87aefeSPatrick Mooney { 15044c87aefeSPatrick Mooney static const char *trbtypes[] = { 15054c87aefeSPatrick Mooney "RESERVED", 15064c87aefeSPatrick Mooney "NORMAL", 15074c87aefeSPatrick Mooney "SETUP_STAGE", 15084c87aefeSPatrick Mooney "DATA_STAGE", 15094c87aefeSPatrick Mooney "STATUS_STAGE", 15104c87aefeSPatrick Mooney "ISOCH", 15114c87aefeSPatrick Mooney "LINK", 15124c87aefeSPatrick Mooney "EVENT_DATA", 15134c87aefeSPatrick Mooney "NOOP", 15144c87aefeSPatrick Mooney "ENABLE_SLOT", 15154c87aefeSPatrick Mooney "DISABLE_SLOT", 15164c87aefeSPatrick Mooney "ADDRESS_DEVICE", 15174c87aefeSPatrick Mooney "CONFIGURE_EP", 15184c87aefeSPatrick Mooney "EVALUATE_CTX", 15194c87aefeSPatrick Mooney "RESET_EP", 15204c87aefeSPatrick Mooney "STOP_EP", 15214c87aefeSPatrick Mooney "SET_TR_DEQUEUE", 15224c87aefeSPatrick Mooney "RESET_DEVICE", 15234c87aefeSPatrick Mooney "FORCE_EVENT", 15244c87aefeSPatrick Mooney "NEGOTIATE_BW", 15254c87aefeSPatrick Mooney "SET_LATENCY_TOL", 15264c87aefeSPatrick Mooney "GET_PORT_BW", 15274c87aefeSPatrick Mooney "FORCE_HEADER", 15284c87aefeSPatrick Mooney "NOOP_CMD" 15294c87aefeSPatrick Mooney }; 15304c87aefeSPatrick Mooney uint32_t type; 15314c87aefeSPatrick Mooney 15324c87aefeSPatrick Mooney type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3); 1533154972afSPatrick Mooney DPRINTF(("pci_xhci: trb[@%p] type x%02x %s 0:x%016lx 2:x%08x 3:x%08x", 15344c87aefeSPatrick Mooney trb, type, 15354c87aefeSPatrick Mooney type <= XHCI_TRB_TYPE_NOOP_CMD ? trbtypes[type] : "INVALID", 15364c87aefeSPatrick Mooney trb->qwTrb0, trb->dwTrb2, trb->dwTrb3)); 15374c87aefeSPatrick Mooney } 15384c87aefeSPatrick Mooney 15394c87aefeSPatrick Mooney static int 15404c87aefeSPatrick Mooney pci_xhci_xfer_complete(struct pci_xhci_softc *sc, struct usb_data_xfer *xfer, 15414c87aefeSPatrick Mooney uint32_t slot, uint32_t epid, int *do_intr) 15424c87aefeSPatrick Mooney { 15434c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 15444c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep; 15454c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 15464c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 15474c87aefeSPatrick Mooney struct xhci_trb *trb; 15484c87aefeSPatrick Mooney struct xhci_trb evtrb; 15494c87aefeSPatrick Mooney uint32_t trbflags; 15504c87aefeSPatrick Mooney uint32_t edtla; 15514c87aefeSPatrick Mooney int i, err; 15524c87aefeSPatrick Mooney 15534c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 15544c87aefeSPatrick Mooney devep = &dev->eps[epid]; 15554c87aefeSPatrick Mooney dev_ctx = pci_xhci_get_dev_ctx(sc, slot); 15564c87aefeSPatrick Mooney 15574c87aefeSPatrick Mooney assert(dev_ctx != NULL); 15584c87aefeSPatrick Mooney 15594c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 15604c87aefeSPatrick Mooney 15614c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_SUCCESS; 15624c87aefeSPatrick Mooney *do_intr = 0; 15634c87aefeSPatrick Mooney edtla = 0; 15644c87aefeSPatrick Mooney 15654c87aefeSPatrick Mooney /* go through list of TRBs and insert event(s) */ 15664c87aefeSPatrick Mooney for (i = xfer->head; xfer->ndata > 0; ) { 15674c87aefeSPatrick Mooney evtrb.qwTrb0 = (uint64_t)xfer->data[i].hci_data; 15684c87aefeSPatrick Mooney trb = XHCI_GADDR(sc, evtrb.qwTrb0); 15694c87aefeSPatrick Mooney trbflags = trb->dwTrb3; 15704c87aefeSPatrick Mooney 15714c87aefeSPatrick Mooney DPRINTF(("pci_xhci: xfer[%d] done?%u:%d trb %x %016lx %x " 1572154972afSPatrick Mooney "(err %d) IOC?%d", 15734c87aefeSPatrick Mooney i, xfer->data[i].processed, xfer->data[i].blen, 15744c87aefeSPatrick Mooney XHCI_TRB_3_TYPE_GET(trbflags), evtrb.qwTrb0, 15754c87aefeSPatrick Mooney trbflags, err, 15764c87aefeSPatrick Mooney trb->dwTrb3 & XHCI_TRB_3_IOC_BIT ? 1 : 0)); 15774c87aefeSPatrick Mooney 15784c87aefeSPatrick Mooney if (!xfer->data[i].processed) { 15794c87aefeSPatrick Mooney xfer->head = i; 15804c87aefeSPatrick Mooney break; 15814c87aefeSPatrick Mooney } 15824c87aefeSPatrick Mooney 15834c87aefeSPatrick Mooney xfer->ndata--; 15844c87aefeSPatrick Mooney edtla += xfer->data[i].bdone; 15854c87aefeSPatrick Mooney 15864c87aefeSPatrick Mooney trb->dwTrb3 = (trb->dwTrb3 & ~0x1) | (xfer->data[i].ccs); 15874c87aefeSPatrick Mooney 15884c87aefeSPatrick Mooney pci_xhci_update_ep_ring(sc, dev, devep, ep_ctx, 15894c87aefeSPatrick Mooney xfer->data[i].streamid, xfer->data[i].trbnext, 15904c87aefeSPatrick Mooney xfer->data[i].ccs); 15914c87aefeSPatrick Mooney 15924c87aefeSPatrick Mooney /* Only interrupt if IOC or short packet */ 15934c87aefeSPatrick Mooney if (!(trb->dwTrb3 & XHCI_TRB_3_IOC_BIT) && 15944c87aefeSPatrick Mooney !((err == XHCI_TRB_ERROR_SHORT_PKT) && 15954c87aefeSPatrick Mooney (trb->dwTrb3 & XHCI_TRB_3_ISP_BIT))) { 15964c87aefeSPatrick Mooney 15974c87aefeSPatrick Mooney i = (i + 1) % USB_MAX_XFER_BLOCKS; 15984c87aefeSPatrick Mooney continue; 15994c87aefeSPatrick Mooney } 16004c87aefeSPatrick Mooney 16014c87aefeSPatrick Mooney evtrb.dwTrb2 = XHCI_TRB_2_ERROR_SET(err) | 16024c87aefeSPatrick Mooney XHCI_TRB_2_REM_SET(xfer->data[i].blen); 16034c87aefeSPatrick Mooney 16044c87aefeSPatrick Mooney evtrb.dwTrb3 = XHCI_TRB_3_TYPE_SET(XHCI_TRB_EVENT_TRANSFER) | 16054c87aefeSPatrick Mooney XHCI_TRB_3_SLOT_SET(slot) | XHCI_TRB_3_EP_SET(epid); 16064c87aefeSPatrick Mooney 16074c87aefeSPatrick Mooney if (XHCI_TRB_3_TYPE_GET(trbflags) == XHCI_TRB_TYPE_EVENT_DATA) { 1608154972afSPatrick Mooney DPRINTF(("pci_xhci EVENT_DATA edtla %u", edtla)); 16094c87aefeSPatrick Mooney evtrb.qwTrb0 = trb->qwTrb0; 16104c87aefeSPatrick Mooney evtrb.dwTrb2 = (edtla & 0xFFFFF) | 16114c87aefeSPatrick Mooney XHCI_TRB_2_ERROR_SET(err); 16124c87aefeSPatrick Mooney evtrb.dwTrb3 |= XHCI_TRB_3_ED_BIT; 16134c87aefeSPatrick Mooney edtla = 0; 16144c87aefeSPatrick Mooney } 16154c87aefeSPatrick Mooney 16164c87aefeSPatrick Mooney *do_intr = 1; 16174c87aefeSPatrick Mooney 16184c87aefeSPatrick Mooney err = pci_xhci_insert_event(sc, &evtrb, 0); 16194c87aefeSPatrick Mooney if (err != XHCI_TRB_ERROR_SUCCESS) { 16204c87aefeSPatrick Mooney break; 16214c87aefeSPatrick Mooney } 16224c87aefeSPatrick Mooney 16234c87aefeSPatrick Mooney i = (i + 1) % USB_MAX_XFER_BLOCKS; 16244c87aefeSPatrick Mooney } 16254c87aefeSPatrick Mooney 16264c87aefeSPatrick Mooney return (err); 16274c87aefeSPatrick Mooney } 16284c87aefeSPatrick Mooney 16294c87aefeSPatrick Mooney static void 16304c87aefeSPatrick Mooney pci_xhci_update_ep_ring(struct pci_xhci_softc *sc, struct pci_xhci_dev_emu *dev, 16314c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep, struct xhci_endp_ctx *ep_ctx, 16324c87aefeSPatrick Mooney uint32_t streamid, uint64_t ringaddr, int ccs) 16334c87aefeSPatrick Mooney { 16344c87aefeSPatrick Mooney 16354c87aefeSPatrick Mooney if (XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0) != 0) { 16364c87aefeSPatrick Mooney devep->ep_sctx[streamid].qwSctx0 = (ringaddr & ~0xFUL) | 16374c87aefeSPatrick Mooney (ccs & 0x1); 16384c87aefeSPatrick Mooney 16394c87aefeSPatrick Mooney devep->ep_sctx_trbs[streamid].ringaddr = ringaddr & ~0xFUL; 16404c87aefeSPatrick Mooney devep->ep_sctx_trbs[streamid].ccs = ccs & 0x1; 16414c87aefeSPatrick Mooney ep_ctx->qwEpCtx2 = (ep_ctx->qwEpCtx2 & ~0x1) | (ccs & 0x1); 16424c87aefeSPatrick Mooney 1643154972afSPatrick Mooney DPRINTF(("xhci update ep-ring stream %d, addr %lx", 16444c87aefeSPatrick Mooney streamid, devep->ep_sctx[streamid].qwSctx0)); 16454c87aefeSPatrick Mooney } else { 16464c87aefeSPatrick Mooney devep->ep_ringaddr = ringaddr & ~0xFUL; 16474c87aefeSPatrick Mooney devep->ep_ccs = ccs & 0x1; 16484c87aefeSPatrick Mooney devep->ep_tr = XHCI_GADDR(sc, ringaddr & ~0xFUL); 16494c87aefeSPatrick Mooney ep_ctx->qwEpCtx2 = (ringaddr & ~0xFUL) | (ccs & 0x1); 16504c87aefeSPatrick Mooney 1651154972afSPatrick Mooney DPRINTF(("xhci update ep-ring, addr %lx", 16524c87aefeSPatrick Mooney (devep->ep_ringaddr | devep->ep_ccs))); 16534c87aefeSPatrick Mooney } 16544c87aefeSPatrick Mooney } 16554c87aefeSPatrick Mooney 16564c87aefeSPatrick Mooney /* 16574c87aefeSPatrick Mooney * Outstanding transfer still in progress (device NAK'd earlier) so retry 16584c87aefeSPatrick Mooney * the transfer again to see if it succeeds. 16594c87aefeSPatrick Mooney */ 16604c87aefeSPatrick Mooney static int 16614c87aefeSPatrick Mooney pci_xhci_try_usb_xfer(struct pci_xhci_softc *sc, 16624c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev, struct pci_xhci_dev_ep *devep, 16634c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx, uint32_t slot, uint32_t epid) 16644c87aefeSPatrick Mooney { 16654c87aefeSPatrick Mooney struct usb_data_xfer *xfer; 16664c87aefeSPatrick Mooney int err; 16674c87aefeSPatrick Mooney int do_intr; 16684c87aefeSPatrick Mooney 16694c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = FIELD_REPLACE( 16704c87aefeSPatrick Mooney ep_ctx->dwEpCtx0, XHCI_ST_EPCTX_RUNNING, 0x7, 0); 16714c87aefeSPatrick Mooney 16724c87aefeSPatrick Mooney err = 0; 16734c87aefeSPatrick Mooney do_intr = 0; 16744c87aefeSPatrick Mooney 16754c87aefeSPatrick Mooney xfer = devep->ep_xfer; 16764c87aefeSPatrick Mooney #ifdef __FreeBSD__ 16774c87aefeSPatrick Mooney USB_DATA_XFER_LOCK(xfer); 16784c87aefeSPatrick Mooney #else 16794c87aefeSPatrick Mooney /* 16804c87aefeSPatrick Mooney * At least one caller needs to hold this lock across the call to this 16814c87aefeSPatrick Mooney * function and other code. To avoid deadlock from a recursive mutex 16824c87aefeSPatrick Mooney * enter, we ensure that all callers hold this lock. 16834c87aefeSPatrick Mooney */ 16844c87aefeSPatrick Mooney assert(USB_DATA_XFER_LOCK_HELD(xfer)); 16854c87aefeSPatrick Mooney #endif 16864c87aefeSPatrick Mooney 16874c87aefeSPatrick Mooney /* outstanding requests queued up */ 16884c87aefeSPatrick Mooney if (dev->dev_ue->ue_data != NULL) { 16894c87aefeSPatrick Mooney err = dev->dev_ue->ue_data(dev->dev_sc, xfer, 16904c87aefeSPatrick Mooney epid & 0x1 ? USB_XFER_IN : USB_XFER_OUT, epid/2); 16914c87aefeSPatrick Mooney if (err == USB_ERR_CANCELLED) { 16924c87aefeSPatrick Mooney if (USB_DATA_GET_ERRCODE(&xfer->data[xfer->head]) == 16934c87aefeSPatrick Mooney USB_NAK) 16944c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_SUCCESS; 16954c87aefeSPatrick Mooney } else { 16964c87aefeSPatrick Mooney err = pci_xhci_xfer_complete(sc, xfer, slot, epid, 16974c87aefeSPatrick Mooney &do_intr); 16984c87aefeSPatrick Mooney if (err == XHCI_TRB_ERROR_SUCCESS && do_intr) { 16994c87aefeSPatrick Mooney pci_xhci_assert_interrupt(sc); 17004c87aefeSPatrick Mooney } 17014c87aefeSPatrick Mooney 17024c87aefeSPatrick Mooney 17034c87aefeSPatrick Mooney /* XXX should not do it if error? */ 17044c87aefeSPatrick Mooney USB_DATA_XFER_RESET(xfer); 17054c87aefeSPatrick Mooney } 17064c87aefeSPatrick Mooney } 17074c87aefeSPatrick Mooney 17084c87aefeSPatrick Mooney #ifdef __FreeBSD__ 17094c87aefeSPatrick Mooney USB_DATA_XFER_UNLOCK(xfer); 17104c87aefeSPatrick Mooney #endif 17114c87aefeSPatrick Mooney 17124c87aefeSPatrick Mooney return (err); 17134c87aefeSPatrick Mooney } 17144c87aefeSPatrick Mooney 17154c87aefeSPatrick Mooney 17164c87aefeSPatrick Mooney static int 17174c87aefeSPatrick Mooney pci_xhci_handle_transfer(struct pci_xhci_softc *sc, 17184c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev, struct pci_xhci_dev_ep *devep, 17194c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx, struct xhci_trb *trb, uint32_t slot, 17204c87aefeSPatrick Mooney uint32_t epid, uint64_t addr, uint32_t ccs, uint32_t streamid) 17214c87aefeSPatrick Mooney { 17224c87aefeSPatrick Mooney struct xhci_trb *setup_trb; 17234c87aefeSPatrick Mooney struct usb_data_xfer *xfer; 17244c87aefeSPatrick Mooney struct usb_data_xfer_block *xfer_block; 17254c87aefeSPatrick Mooney uint64_t val; 17264c87aefeSPatrick Mooney uint32_t trbflags; 17274c87aefeSPatrick Mooney int do_intr, err; 17284c87aefeSPatrick Mooney int do_retry; 17294c87aefeSPatrick Mooney 17304c87aefeSPatrick Mooney ep_ctx->dwEpCtx0 = FIELD_REPLACE(ep_ctx->dwEpCtx0, 17314c87aefeSPatrick Mooney XHCI_ST_EPCTX_RUNNING, 0x7, 0); 17324c87aefeSPatrick Mooney 17334c87aefeSPatrick Mooney xfer = devep->ep_xfer; 17344c87aefeSPatrick Mooney USB_DATA_XFER_LOCK(xfer); 17354c87aefeSPatrick Mooney 1736154972afSPatrick Mooney DPRINTF(("pci_xhci handle_transfer slot %u", slot)); 17374c87aefeSPatrick Mooney 17384c87aefeSPatrick Mooney retry: 17394c87aefeSPatrick Mooney err = 0; 17404c87aefeSPatrick Mooney do_retry = 0; 17414c87aefeSPatrick Mooney do_intr = 0; 17424c87aefeSPatrick Mooney setup_trb = NULL; 17434c87aefeSPatrick Mooney 17444c87aefeSPatrick Mooney while (1) { 17454c87aefeSPatrick Mooney pci_xhci_dump_trb(trb); 17464c87aefeSPatrick Mooney 17474c87aefeSPatrick Mooney trbflags = trb->dwTrb3; 17484c87aefeSPatrick Mooney 17494c87aefeSPatrick Mooney if (XHCI_TRB_3_TYPE_GET(trbflags) != XHCI_TRB_TYPE_LINK && 17504c87aefeSPatrick Mooney (trbflags & XHCI_TRB_3_CYCLE_BIT) != 17514c87aefeSPatrick Mooney (ccs & XHCI_TRB_3_CYCLE_BIT)) { 1752154972afSPatrick Mooney DPRINTF(("Cycle-bit changed trbflags %x, ccs %x", 17534c87aefeSPatrick Mooney trbflags & XHCI_TRB_3_CYCLE_BIT, ccs)); 17544c87aefeSPatrick Mooney break; 17554c87aefeSPatrick Mooney } 17564c87aefeSPatrick Mooney 17574c87aefeSPatrick Mooney xfer_block = NULL; 17584c87aefeSPatrick Mooney 17594c87aefeSPatrick Mooney switch (XHCI_TRB_3_TYPE_GET(trbflags)) { 17604c87aefeSPatrick Mooney case XHCI_TRB_TYPE_LINK: 17614c87aefeSPatrick Mooney if (trb->dwTrb3 & XHCI_TRB_3_TC_BIT) 17624c87aefeSPatrick Mooney ccs ^= 0x1; 17634c87aefeSPatrick Mooney 17644c87aefeSPatrick Mooney xfer_block = usb_data_xfer_append(xfer, NULL, 0, 17654c87aefeSPatrick Mooney (void *)addr, ccs); 17664c87aefeSPatrick Mooney xfer_block->processed = 1; 17674c87aefeSPatrick Mooney break; 17684c87aefeSPatrick Mooney 17694c87aefeSPatrick Mooney case XHCI_TRB_TYPE_SETUP_STAGE: 17704c87aefeSPatrick Mooney if ((trbflags & XHCI_TRB_3_IDT_BIT) == 0 || 17714c87aefeSPatrick Mooney XHCI_TRB_2_BYTES_GET(trb->dwTrb2) != 8) { 1772154972afSPatrick Mooney DPRINTF(("pci_xhci: invalid setup trb")); 17734c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_TRB; 17744c87aefeSPatrick Mooney goto errout; 17754c87aefeSPatrick Mooney } 17764c87aefeSPatrick Mooney setup_trb = trb; 17774c87aefeSPatrick Mooney 17784c87aefeSPatrick Mooney val = trb->qwTrb0; 17794c87aefeSPatrick Mooney if (!xfer->ureq) 17804c87aefeSPatrick Mooney xfer->ureq = malloc( 17814c87aefeSPatrick Mooney sizeof(struct usb_device_request)); 17824c87aefeSPatrick Mooney memcpy(xfer->ureq, &val, 17834c87aefeSPatrick Mooney sizeof(struct usb_device_request)); 17844c87aefeSPatrick Mooney 17854c87aefeSPatrick Mooney xfer_block = usb_data_xfer_append(xfer, NULL, 0, 17864c87aefeSPatrick Mooney (void *)addr, ccs); 17874c87aefeSPatrick Mooney xfer_block->processed = 1; 17884c87aefeSPatrick Mooney break; 17894c87aefeSPatrick Mooney 17904c87aefeSPatrick Mooney case XHCI_TRB_TYPE_NORMAL: 17914c87aefeSPatrick Mooney case XHCI_TRB_TYPE_ISOCH: 17924c87aefeSPatrick Mooney if (setup_trb != NULL) { 17934c87aefeSPatrick Mooney DPRINTF(("pci_xhci: trb not supposed to be in " 1794154972afSPatrick Mooney "ctl scope")); 17954c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_TRB; 17964c87aefeSPatrick Mooney goto errout; 17974c87aefeSPatrick Mooney } 17984c87aefeSPatrick Mooney /* fall through */ 17994c87aefeSPatrick Mooney 18004c87aefeSPatrick Mooney case XHCI_TRB_TYPE_DATA_STAGE: 18014c87aefeSPatrick Mooney xfer_block = usb_data_xfer_append(xfer, 18024c87aefeSPatrick Mooney (void *)(trbflags & XHCI_TRB_3_IDT_BIT ? 18034c87aefeSPatrick Mooney &trb->qwTrb0 : XHCI_GADDR(sc, trb->qwTrb0)), 18044c87aefeSPatrick Mooney trb->dwTrb2 & 0x1FFFF, (void *)addr, ccs); 18054c87aefeSPatrick Mooney break; 18064c87aefeSPatrick Mooney 18074c87aefeSPatrick Mooney case XHCI_TRB_TYPE_STATUS_STAGE: 18084c87aefeSPatrick Mooney xfer_block = usb_data_xfer_append(xfer, NULL, 0, 18094c87aefeSPatrick Mooney (void *)addr, ccs); 18104c87aefeSPatrick Mooney break; 18114c87aefeSPatrick Mooney 18124c87aefeSPatrick Mooney case XHCI_TRB_TYPE_NOOP: 18134c87aefeSPatrick Mooney xfer_block = usb_data_xfer_append(xfer, NULL, 0, 18144c87aefeSPatrick Mooney (void *)addr, ccs); 18154c87aefeSPatrick Mooney xfer_block->processed = 1; 18164c87aefeSPatrick Mooney break; 18174c87aefeSPatrick Mooney 18184c87aefeSPatrick Mooney case XHCI_TRB_TYPE_EVENT_DATA: 18194c87aefeSPatrick Mooney xfer_block = usb_data_xfer_append(xfer, NULL, 0, 18204c87aefeSPatrick Mooney (void *)addr, ccs); 18214c87aefeSPatrick Mooney if ((epid > 1) && (trbflags & XHCI_TRB_3_IOC_BIT)) { 18224c87aefeSPatrick Mooney xfer_block->processed = 1; 18234c87aefeSPatrick Mooney } 18244c87aefeSPatrick Mooney break; 18254c87aefeSPatrick Mooney 18264c87aefeSPatrick Mooney default: 18274c87aefeSPatrick Mooney DPRINTF(("pci_xhci: handle xfer unexpected trb type " 1828154972afSPatrick Mooney "0x%x", 18294c87aefeSPatrick Mooney XHCI_TRB_3_TYPE_GET(trbflags))); 18304c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_TRB; 18314c87aefeSPatrick Mooney goto errout; 18324c87aefeSPatrick Mooney } 18334c87aefeSPatrick Mooney 18344c87aefeSPatrick Mooney trb = pci_xhci_trb_next(sc, trb, &addr); 18354c87aefeSPatrick Mooney 1836154972afSPatrick Mooney DPRINTF(("pci_xhci: next trb: 0x%lx", (uint64_t)trb)); 18374c87aefeSPatrick Mooney 18384c87aefeSPatrick Mooney if (xfer_block) { 18394c87aefeSPatrick Mooney xfer_block->trbnext = addr; 18404c87aefeSPatrick Mooney xfer_block->streamid = streamid; 18414c87aefeSPatrick Mooney } 18424c87aefeSPatrick Mooney 18434c87aefeSPatrick Mooney if (!setup_trb && !(trbflags & XHCI_TRB_3_CHAIN_BIT) && 18444c87aefeSPatrick Mooney XHCI_TRB_3_TYPE_GET(trbflags) != XHCI_TRB_TYPE_LINK) { 18454c87aefeSPatrick Mooney break; 18464c87aefeSPatrick Mooney } 18474c87aefeSPatrick Mooney 18484c87aefeSPatrick Mooney /* handle current batch that requires interrupt on complete */ 18494c87aefeSPatrick Mooney if (trbflags & XHCI_TRB_3_IOC_BIT) { 1850154972afSPatrick Mooney DPRINTF(("pci_xhci: trb IOC bit set")); 18514c87aefeSPatrick Mooney if (epid == 1) 18524c87aefeSPatrick Mooney do_retry = 1; 18534c87aefeSPatrick Mooney break; 18544c87aefeSPatrick Mooney } 18554c87aefeSPatrick Mooney } 18564c87aefeSPatrick Mooney 1857154972afSPatrick Mooney DPRINTF(("pci_xhci[%d]: xfer->ndata %u", __LINE__, xfer->ndata)); 18584c87aefeSPatrick Mooney 18596960cd89SAndy Fiddaman if (xfer->ndata <= 0) 18606960cd89SAndy Fiddaman goto errout; 18616960cd89SAndy Fiddaman 18624c87aefeSPatrick Mooney if (epid == 1) { 18634c87aefeSPatrick Mooney err = USB_ERR_NOT_STARTED; 18644c87aefeSPatrick Mooney if (dev->dev_ue->ue_request != NULL) 18654c87aefeSPatrick Mooney err = dev->dev_ue->ue_request(dev->dev_sc, xfer); 18664c87aefeSPatrick Mooney setup_trb = NULL; 18674c87aefeSPatrick Mooney } else { 18684c87aefeSPatrick Mooney /* handle data transfer */ 18694c87aefeSPatrick Mooney pci_xhci_try_usb_xfer(sc, dev, devep, ep_ctx, slot, epid); 18704c87aefeSPatrick Mooney err = XHCI_TRB_ERROR_SUCCESS; 18714c87aefeSPatrick Mooney goto errout; 18724c87aefeSPatrick Mooney } 18734c87aefeSPatrick Mooney 18744c87aefeSPatrick Mooney err = USB_TO_XHCI_ERR(err); 18754c87aefeSPatrick Mooney if ((err == XHCI_TRB_ERROR_SUCCESS) || 18766960cd89SAndy Fiddaman (err == XHCI_TRB_ERROR_STALL) || 18774c87aefeSPatrick Mooney (err == XHCI_TRB_ERROR_SHORT_PKT)) { 18784c87aefeSPatrick Mooney err = pci_xhci_xfer_complete(sc, xfer, slot, epid, &do_intr); 18794c87aefeSPatrick Mooney if (err != XHCI_TRB_ERROR_SUCCESS) 18804c87aefeSPatrick Mooney do_retry = 0; 18814c87aefeSPatrick Mooney } 18824c87aefeSPatrick Mooney 18834c87aefeSPatrick Mooney errout: 18844c87aefeSPatrick Mooney if (err == XHCI_TRB_ERROR_EV_RING_FULL) 1885154972afSPatrick Mooney DPRINTF(("pci_xhci[%d]: event ring full", __LINE__)); 18864c87aefeSPatrick Mooney 18874c87aefeSPatrick Mooney if (!do_retry) 18884c87aefeSPatrick Mooney USB_DATA_XFER_UNLOCK(xfer); 18894c87aefeSPatrick Mooney 18904c87aefeSPatrick Mooney if (do_intr) 18914c87aefeSPatrick Mooney pci_xhci_assert_interrupt(sc); 18924c87aefeSPatrick Mooney 18934c87aefeSPatrick Mooney if (do_retry) { 18944c87aefeSPatrick Mooney USB_DATA_XFER_RESET(xfer); 1895154972afSPatrick Mooney DPRINTF(("pci_xhci[%d]: retry:continuing with next TRBs", 18964c87aefeSPatrick Mooney __LINE__)); 18974c87aefeSPatrick Mooney goto retry; 18984c87aefeSPatrick Mooney } 18994c87aefeSPatrick Mooney 19004c87aefeSPatrick Mooney if (epid == 1) 19014c87aefeSPatrick Mooney USB_DATA_XFER_RESET(xfer); 19024c87aefeSPatrick Mooney 19034c87aefeSPatrick Mooney return (err); 19044c87aefeSPatrick Mooney } 19054c87aefeSPatrick Mooney 19064c87aefeSPatrick Mooney static void 19074c87aefeSPatrick Mooney pci_xhci_device_doorbell(struct pci_xhci_softc *sc, uint32_t slot, 19084c87aefeSPatrick Mooney uint32_t epid, uint32_t streamid) 19094c87aefeSPatrick Mooney { 19104c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 19114c87aefeSPatrick Mooney struct pci_xhci_dev_ep *devep; 19124c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 19134c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 19144c87aefeSPatrick Mooney struct pci_xhci_trb_ring *sctx_tr; 19154c87aefeSPatrick Mooney struct xhci_trb *trb; 19164c87aefeSPatrick Mooney uint64_t ringaddr; 19174c87aefeSPatrick Mooney uint32_t ccs; 19184c87aefeSPatrick Mooney 1919154972afSPatrick Mooney DPRINTF(("pci_xhci doorbell slot %u epid %u stream %u", 19204c87aefeSPatrick Mooney slot, epid, streamid)); 19214c87aefeSPatrick Mooney 19222b948146SAndy Fiddaman if (slot == 0 || slot > XHCI_MAX_SLOTS) { 1923154972afSPatrick Mooney DPRINTF(("pci_xhci: invalid doorbell slot %u", slot)); 19244c87aefeSPatrick Mooney return; 19254c87aefeSPatrick Mooney } 19264c87aefeSPatrick Mooney 192784659b24SMichael Zeller if (epid == 0 || epid >= XHCI_MAX_ENDPOINTS) { 1928154972afSPatrick Mooney DPRINTF(("pci_xhci: invalid endpoint %u", epid)); 192984659b24SMichael Zeller return; 193084659b24SMichael Zeller } 193184659b24SMichael Zeller 19324c87aefeSPatrick Mooney dev = XHCI_SLOTDEV_PTR(sc, slot); 19334c87aefeSPatrick Mooney devep = &dev->eps[epid]; 19344c87aefeSPatrick Mooney dev_ctx = pci_xhci_get_dev_ctx(sc, slot); 19354c87aefeSPatrick Mooney if (!dev_ctx) { 19364c87aefeSPatrick Mooney return; 19374c87aefeSPatrick Mooney } 19384c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 19394c87aefeSPatrick Mooney 19404c87aefeSPatrick Mooney sctx_tr = NULL; 19414c87aefeSPatrick Mooney 1942154972afSPatrick Mooney DPRINTF(("pci_xhci: device doorbell ep[%u] %08x %08x %016lx %08x", 19434c87aefeSPatrick Mooney epid, ep_ctx->dwEpCtx0, ep_ctx->dwEpCtx1, ep_ctx->qwEpCtx2, 19444c87aefeSPatrick Mooney ep_ctx->dwEpCtx4)); 19454c87aefeSPatrick Mooney 19464c87aefeSPatrick Mooney if (ep_ctx->qwEpCtx2 == 0) 19474c87aefeSPatrick Mooney return; 19484c87aefeSPatrick Mooney 19494c87aefeSPatrick Mooney /* handle pending transfers */ 19504c87aefeSPatrick Mooney if (devep->ep_xfer->ndata > 0) { 19514c87aefeSPatrick Mooney #ifndef __FreeBSD__ 19524c87aefeSPatrick Mooney USB_DATA_XFER_LOCK(devep->ep_xfer); 19534c87aefeSPatrick Mooney #endif 19544c87aefeSPatrick Mooney pci_xhci_try_usb_xfer(sc, dev, devep, ep_ctx, slot, epid); 19554c87aefeSPatrick Mooney #ifndef __FreeBSD__ 19564c87aefeSPatrick Mooney USB_DATA_XFER_UNLOCK(devep->ep_xfer); 19574c87aefeSPatrick Mooney #endif 19584c87aefeSPatrick Mooney return; 19594c87aefeSPatrick Mooney } 19604c87aefeSPatrick Mooney 19614c87aefeSPatrick Mooney /* get next trb work item */ 19624c87aefeSPatrick Mooney if (XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0) != 0) { 196384659b24SMichael Zeller struct xhci_stream_ctx *sctx; 196484659b24SMichael Zeller 196584659b24SMichael Zeller /* 196684659b24SMichael Zeller * Stream IDs of 0, 65535 (any stream), and 65534 196784659b24SMichael Zeller * (prime) are invalid. 196884659b24SMichael Zeller */ 196984659b24SMichael Zeller if (streamid == 0 || streamid == 65534 || streamid == 65535) { 1970154972afSPatrick Mooney DPRINTF(("pci_xhci: invalid stream %u", streamid)); 197184659b24SMichael Zeller return; 197284659b24SMichael Zeller } 197384659b24SMichael Zeller 197484659b24SMichael Zeller sctx = NULL; 197584659b24SMichael Zeller pci_xhci_find_stream(sc, ep_ctx, streamid, &sctx); 197684659b24SMichael Zeller if (sctx == NULL) { 1977154972afSPatrick Mooney DPRINTF(("pci_xhci: invalid stream %u", streamid)); 197884659b24SMichael Zeller return; 197984659b24SMichael Zeller } 19804c87aefeSPatrick Mooney sctx_tr = &devep->ep_sctx_trbs[streamid]; 19814c87aefeSPatrick Mooney ringaddr = sctx_tr->ringaddr; 19824c87aefeSPatrick Mooney ccs = sctx_tr->ccs; 19834c87aefeSPatrick Mooney trb = XHCI_GADDR(sc, sctx_tr->ringaddr & ~0xFUL); 1984154972afSPatrick Mooney DPRINTF(("doorbell, stream %u, ccs %lx, trb ccs %x", 19854c87aefeSPatrick Mooney streamid, ep_ctx->qwEpCtx2 & XHCI_TRB_3_CYCLE_BIT, 19864c87aefeSPatrick Mooney trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT)); 19874c87aefeSPatrick Mooney } else { 198884659b24SMichael Zeller if (streamid != 0) { 1989154972afSPatrick Mooney DPRINTF(("pci_xhci: invalid stream %u", streamid)); 199084659b24SMichael Zeller return; 199184659b24SMichael Zeller } 19924c87aefeSPatrick Mooney ringaddr = devep->ep_ringaddr; 19934c87aefeSPatrick Mooney ccs = devep->ep_ccs; 19944c87aefeSPatrick Mooney trb = devep->ep_tr; 1995154972afSPatrick Mooney DPRINTF(("doorbell, ccs %lx, trb ccs %x", 19964c87aefeSPatrick Mooney ep_ctx->qwEpCtx2 & XHCI_TRB_3_CYCLE_BIT, 19974c87aefeSPatrick Mooney trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT)); 19984c87aefeSPatrick Mooney } 19994c87aefeSPatrick Mooney 20004c87aefeSPatrick Mooney if (XHCI_TRB_3_TYPE_GET(trb->dwTrb3) == 0) { 2001154972afSPatrick Mooney DPRINTF(("pci_xhci: ring %lx trb[%lx] EP %u is RESERVED?", 20024c87aefeSPatrick Mooney ep_ctx->qwEpCtx2, devep->ep_ringaddr, epid)); 20034c87aefeSPatrick Mooney return; 20044c87aefeSPatrick Mooney } 20054c87aefeSPatrick Mooney 20064c87aefeSPatrick Mooney pci_xhci_handle_transfer(sc, dev, devep, ep_ctx, trb, slot, epid, 20074c87aefeSPatrick Mooney ringaddr, ccs, streamid); 20084c87aefeSPatrick Mooney } 20094c87aefeSPatrick Mooney 20104c87aefeSPatrick Mooney static void 20114c87aefeSPatrick Mooney pci_xhci_dbregs_write(struct pci_xhci_softc *sc, uint64_t offset, 20124c87aefeSPatrick Mooney uint64_t value) 20134c87aefeSPatrick Mooney { 20144c87aefeSPatrick Mooney 20154c87aefeSPatrick Mooney offset = (offset - sc->dboff) / sizeof(uint32_t); 20164c87aefeSPatrick Mooney 2017154972afSPatrick Mooney DPRINTF(("pci_xhci: doorbell write offset 0x%lx: 0x%lx", 20184c87aefeSPatrick Mooney offset, value)); 20194c87aefeSPatrick Mooney 20204c87aefeSPatrick Mooney if (XHCI_HALTED(sc)) { 2021154972afSPatrick Mooney DPRINTF(("pci_xhci: controller halted")); 20224c87aefeSPatrick Mooney return; 20234c87aefeSPatrick Mooney } 20244c87aefeSPatrick Mooney 20254c87aefeSPatrick Mooney if (offset == 0) 20264c87aefeSPatrick Mooney pci_xhci_complete_commands(sc); 20274c87aefeSPatrick Mooney else if (sc->portregs != NULL) 20284c87aefeSPatrick Mooney pci_xhci_device_doorbell(sc, offset, 20294c87aefeSPatrick Mooney XHCI_DB_TARGET_GET(value), XHCI_DB_SID_GET(value)); 20304c87aefeSPatrick Mooney } 20314c87aefeSPatrick Mooney 20324c87aefeSPatrick Mooney static void 20334c87aefeSPatrick Mooney pci_xhci_rtsregs_write(struct pci_xhci_softc *sc, uint64_t offset, 20344c87aefeSPatrick Mooney uint64_t value) 20354c87aefeSPatrick Mooney { 20364c87aefeSPatrick Mooney struct pci_xhci_rtsregs *rts; 20374c87aefeSPatrick Mooney 20384c87aefeSPatrick Mooney offset -= sc->rtsoff; 20394c87aefeSPatrick Mooney 20404c87aefeSPatrick Mooney if (offset == 0) { 2041154972afSPatrick Mooney DPRINTF(("pci_xhci attempted write to MFINDEX")); 20424c87aefeSPatrick Mooney return; 20434c87aefeSPatrick Mooney } 20444c87aefeSPatrick Mooney 2045154972afSPatrick Mooney DPRINTF(("pci_xhci: runtime regs write offset 0x%lx: 0x%lx", 20464c87aefeSPatrick Mooney offset, value)); 20474c87aefeSPatrick Mooney 20484c87aefeSPatrick Mooney offset -= 0x20; /* start of intrreg */ 20494c87aefeSPatrick Mooney 20504c87aefeSPatrick Mooney rts = &sc->rtsregs; 20514c87aefeSPatrick Mooney 20524c87aefeSPatrick Mooney switch (offset) { 20534c87aefeSPatrick Mooney case 0x00: 20544c87aefeSPatrick Mooney if (value & XHCI_IMAN_INTR_PEND) 20554c87aefeSPatrick Mooney rts->intrreg.iman &= ~XHCI_IMAN_INTR_PEND; 20564c87aefeSPatrick Mooney rts->intrreg.iman = (value & XHCI_IMAN_INTR_ENA) | 20574c87aefeSPatrick Mooney (rts->intrreg.iman & XHCI_IMAN_INTR_PEND); 20584c87aefeSPatrick Mooney 20594c87aefeSPatrick Mooney if (!(value & XHCI_IMAN_INTR_ENA)) 20604c87aefeSPatrick Mooney pci_xhci_deassert_interrupt(sc); 20614c87aefeSPatrick Mooney 20624c87aefeSPatrick Mooney break; 20634c87aefeSPatrick Mooney 20644c87aefeSPatrick Mooney case 0x04: 20654c87aefeSPatrick Mooney rts->intrreg.imod = value; 20664c87aefeSPatrick Mooney break; 20674c87aefeSPatrick Mooney 20684c87aefeSPatrick Mooney case 0x08: 20694c87aefeSPatrick Mooney rts->intrreg.erstsz = value & 0xFFFF; 20704c87aefeSPatrick Mooney break; 20714c87aefeSPatrick Mooney 20724c87aefeSPatrick Mooney case 0x10: 20734c87aefeSPatrick Mooney /* ERSTBA low bits */ 20744c87aefeSPatrick Mooney rts->intrreg.erstba = MASK_64_HI(sc->rtsregs.intrreg.erstba) | 20754c87aefeSPatrick Mooney (value & ~0x3F); 20764c87aefeSPatrick Mooney break; 20774c87aefeSPatrick Mooney 20784c87aefeSPatrick Mooney case 0x14: 20794c87aefeSPatrick Mooney /* ERSTBA high bits */ 20804c87aefeSPatrick Mooney rts->intrreg.erstba = (value << 32) | 20814c87aefeSPatrick Mooney MASK_64_LO(sc->rtsregs.intrreg.erstba); 20824c87aefeSPatrick Mooney 20834c87aefeSPatrick Mooney rts->erstba_p = XHCI_GADDR(sc, 20844c87aefeSPatrick Mooney sc->rtsregs.intrreg.erstba & ~0x3FUL); 20854c87aefeSPatrick Mooney 20864c87aefeSPatrick Mooney rts->erst_p = XHCI_GADDR(sc, 20874c87aefeSPatrick Mooney sc->rtsregs.erstba_p->qwEvrsTablePtr & ~0x3FUL); 20884c87aefeSPatrick Mooney 20894c87aefeSPatrick Mooney rts->er_enq_idx = 0; 20904c87aefeSPatrick Mooney rts->er_events_cnt = 0; 20914c87aefeSPatrick Mooney 2092154972afSPatrick Mooney DPRINTF(("pci_xhci: wr erstba erst (%p) ptr 0x%lx, sz %u", 20934c87aefeSPatrick Mooney rts->erstba_p, 20944c87aefeSPatrick Mooney rts->erstba_p->qwEvrsTablePtr, 20954c87aefeSPatrick Mooney rts->erstba_p->dwEvrsTableSize)); 20964c87aefeSPatrick Mooney break; 20974c87aefeSPatrick Mooney 20984c87aefeSPatrick Mooney case 0x18: 20994c87aefeSPatrick Mooney /* ERDP low bits */ 21004c87aefeSPatrick Mooney rts->intrreg.erdp = 21014c87aefeSPatrick Mooney MASK_64_HI(sc->rtsregs.intrreg.erdp) | 21024c87aefeSPatrick Mooney (rts->intrreg.erdp & XHCI_ERDP_LO_BUSY) | 21034c87aefeSPatrick Mooney (value & ~0xF); 21044c87aefeSPatrick Mooney if (value & XHCI_ERDP_LO_BUSY) { 21054c87aefeSPatrick Mooney rts->intrreg.erdp &= ~XHCI_ERDP_LO_BUSY; 21064c87aefeSPatrick Mooney rts->intrreg.iman &= ~XHCI_IMAN_INTR_PEND; 21074c87aefeSPatrick Mooney } 21084c87aefeSPatrick Mooney 21094c87aefeSPatrick Mooney rts->er_deq_seg = XHCI_ERDP_LO_SINDEX(value); 21104c87aefeSPatrick Mooney 21114c87aefeSPatrick Mooney break; 21124c87aefeSPatrick Mooney 21134c87aefeSPatrick Mooney case 0x1C: 21144c87aefeSPatrick Mooney /* ERDP high bits */ 21154c87aefeSPatrick Mooney rts->intrreg.erdp = (value << 32) | 21164c87aefeSPatrick Mooney MASK_64_LO(sc->rtsregs.intrreg.erdp); 21174c87aefeSPatrick Mooney 21184c87aefeSPatrick Mooney if (rts->er_events_cnt > 0) { 21194c87aefeSPatrick Mooney uint64_t erdp; 21204c87aefeSPatrick Mooney uint32_t erdp_i; 21214c87aefeSPatrick Mooney 21224c87aefeSPatrick Mooney erdp = rts->intrreg.erdp & ~0xF; 21234c87aefeSPatrick Mooney erdp_i = (erdp - rts->erstba_p->qwEvrsTablePtr) / 21244c87aefeSPatrick Mooney sizeof(struct xhci_trb); 21254c87aefeSPatrick Mooney 21264c87aefeSPatrick Mooney if (erdp_i <= rts->er_enq_idx) 21274c87aefeSPatrick Mooney rts->er_events_cnt = rts->er_enq_idx - erdp_i; 21284c87aefeSPatrick Mooney else 21294c87aefeSPatrick Mooney rts->er_events_cnt = 21304c87aefeSPatrick Mooney rts->erstba_p->dwEvrsTableSize - 21314c87aefeSPatrick Mooney (erdp_i - rts->er_enq_idx); 21324c87aefeSPatrick Mooney 2133154972afSPatrick Mooney DPRINTF(("pci_xhci: erdp 0x%lx, events cnt %u", 21344c87aefeSPatrick Mooney erdp, rts->er_events_cnt)); 21354c87aefeSPatrick Mooney } 21364c87aefeSPatrick Mooney 21374c87aefeSPatrick Mooney break; 21384c87aefeSPatrick Mooney 21394c87aefeSPatrick Mooney default: 2140154972afSPatrick Mooney DPRINTF(("pci_xhci attempted write to RTS offset 0x%lx", 21414c87aefeSPatrick Mooney offset)); 21424c87aefeSPatrick Mooney break; 21434c87aefeSPatrick Mooney } 21444c87aefeSPatrick Mooney } 21454c87aefeSPatrick Mooney 21464c87aefeSPatrick Mooney static uint64_t 21474c87aefeSPatrick Mooney pci_xhci_portregs_read(struct pci_xhci_softc *sc, uint64_t offset) 21484c87aefeSPatrick Mooney { 21494c87aefeSPatrick Mooney int port; 21504c87aefeSPatrick Mooney uint32_t *p; 21514c87aefeSPatrick Mooney 21524c87aefeSPatrick Mooney if (sc->portregs == NULL) 21534c87aefeSPatrick Mooney return (0); 21544c87aefeSPatrick Mooney 21554c87aefeSPatrick Mooney port = (offset - 0x3F0) / 0x10; 21564c87aefeSPatrick Mooney 21574c87aefeSPatrick Mooney if (port > XHCI_MAX_DEVS) { 2158154972afSPatrick Mooney DPRINTF(("pci_xhci: portregs_read port %d >= XHCI_MAX_DEVS", 21594c87aefeSPatrick Mooney port)); 21604c87aefeSPatrick Mooney 21614c87aefeSPatrick Mooney /* return default value for unused port */ 21624c87aefeSPatrick Mooney return (XHCI_PS_SPEED_SET(3)); 21634c87aefeSPatrick Mooney } 21644c87aefeSPatrick Mooney 21654c87aefeSPatrick Mooney offset = (offset - 0x3F0) % 0x10; 21664c87aefeSPatrick Mooney 21674c87aefeSPatrick Mooney p = &sc->portregs[port].portsc; 21684c87aefeSPatrick Mooney p += offset / sizeof(uint32_t); 21694c87aefeSPatrick Mooney 2170154972afSPatrick Mooney DPRINTF(("pci_xhci: portregs read offset 0x%lx port %u -> 0x%x", 21714c87aefeSPatrick Mooney offset, port, *p)); 21724c87aefeSPatrick Mooney 21734c87aefeSPatrick Mooney return (*p); 21744c87aefeSPatrick Mooney } 21754c87aefeSPatrick Mooney 21764c87aefeSPatrick Mooney static void 21774c87aefeSPatrick Mooney pci_xhci_hostop_write(struct pci_xhci_softc *sc, uint64_t offset, 21784c87aefeSPatrick Mooney uint64_t value) 21794c87aefeSPatrick Mooney { 21804c87aefeSPatrick Mooney offset -= XHCI_CAPLEN; 21814c87aefeSPatrick Mooney 21824c87aefeSPatrick Mooney if (offset < 0x400) 2183154972afSPatrick Mooney DPRINTF(("pci_xhci: hostop write offset 0x%lx: 0x%lx", 21844c87aefeSPatrick Mooney offset, value)); 21854c87aefeSPatrick Mooney 21864c87aefeSPatrick Mooney switch (offset) { 21874c87aefeSPatrick Mooney case XHCI_USBCMD: 21884c87aefeSPatrick Mooney sc->opregs.usbcmd = pci_xhci_usbcmd_write(sc, value & 0x3F0F); 21894c87aefeSPatrick Mooney break; 21904c87aefeSPatrick Mooney 21914c87aefeSPatrick Mooney case XHCI_USBSTS: 21924c87aefeSPatrick Mooney /* clear bits on write */ 21934c87aefeSPatrick Mooney sc->opregs.usbsts &= ~(value & 21944c87aefeSPatrick Mooney (XHCI_STS_HSE|XHCI_STS_EINT|XHCI_STS_PCD|XHCI_STS_SSS| 21954c87aefeSPatrick Mooney XHCI_STS_RSS|XHCI_STS_SRE|XHCI_STS_CNR)); 21964c87aefeSPatrick Mooney break; 21974c87aefeSPatrick Mooney 21984c87aefeSPatrick Mooney case XHCI_PAGESIZE: 21994c87aefeSPatrick Mooney /* read only */ 22004c87aefeSPatrick Mooney break; 22014c87aefeSPatrick Mooney 22024c87aefeSPatrick Mooney case XHCI_DNCTRL: 22034c87aefeSPatrick Mooney sc->opregs.dnctrl = value & 0xFFFF; 22044c87aefeSPatrick Mooney break; 22054c87aefeSPatrick Mooney 22064c87aefeSPatrick Mooney case XHCI_CRCR_LO: 22074c87aefeSPatrick Mooney if (sc->opregs.crcr & XHCI_CRCR_LO_CRR) { 22084c87aefeSPatrick Mooney sc->opregs.crcr &= ~(XHCI_CRCR_LO_CS|XHCI_CRCR_LO_CA); 22094c87aefeSPatrick Mooney sc->opregs.crcr |= value & 22104c87aefeSPatrick Mooney (XHCI_CRCR_LO_CS|XHCI_CRCR_LO_CA); 22114c87aefeSPatrick Mooney } else { 22124c87aefeSPatrick Mooney sc->opregs.crcr = MASK_64_HI(sc->opregs.crcr) | 22134c87aefeSPatrick Mooney (value & (0xFFFFFFC0 | XHCI_CRCR_LO_RCS)); 22144c87aefeSPatrick Mooney } 22154c87aefeSPatrick Mooney break; 22164c87aefeSPatrick Mooney 22174c87aefeSPatrick Mooney case XHCI_CRCR_HI: 22184c87aefeSPatrick Mooney if (!(sc->opregs.crcr & XHCI_CRCR_LO_CRR)) { 22194c87aefeSPatrick Mooney sc->opregs.crcr = MASK_64_LO(sc->opregs.crcr) | 22204c87aefeSPatrick Mooney (value << 32); 22214c87aefeSPatrick Mooney 22224c87aefeSPatrick Mooney sc->opregs.cr_p = XHCI_GADDR(sc, 22234c87aefeSPatrick Mooney sc->opregs.crcr & ~0xF); 22244c87aefeSPatrick Mooney } 22254c87aefeSPatrick Mooney 22264c87aefeSPatrick Mooney if (sc->opregs.crcr & XHCI_CRCR_LO_CS) { 22274c87aefeSPatrick Mooney /* Stop operation of Command Ring */ 22284c87aefeSPatrick Mooney } 22294c87aefeSPatrick Mooney 22304c87aefeSPatrick Mooney if (sc->opregs.crcr & XHCI_CRCR_LO_CA) { 22314c87aefeSPatrick Mooney /* Abort command */ 22324c87aefeSPatrick Mooney } 22334c87aefeSPatrick Mooney 22344c87aefeSPatrick Mooney break; 22354c87aefeSPatrick Mooney 22364c87aefeSPatrick Mooney case XHCI_DCBAAP_LO: 22374c87aefeSPatrick Mooney sc->opregs.dcbaap = MASK_64_HI(sc->opregs.dcbaap) | 22384c87aefeSPatrick Mooney (value & 0xFFFFFFC0); 22394c87aefeSPatrick Mooney break; 22404c87aefeSPatrick Mooney 22414c87aefeSPatrick Mooney case XHCI_DCBAAP_HI: 22424c87aefeSPatrick Mooney sc->opregs.dcbaap = MASK_64_LO(sc->opregs.dcbaap) | 22434c87aefeSPatrick Mooney (value << 32); 22444c87aefeSPatrick Mooney sc->opregs.dcbaa_p = XHCI_GADDR(sc, sc->opregs.dcbaap & ~0x3FUL); 22454c87aefeSPatrick Mooney 2246154972afSPatrick Mooney DPRINTF(("pci_xhci: opregs dcbaap = 0x%lx (vaddr 0x%lx)", 22474c87aefeSPatrick Mooney sc->opregs.dcbaap, (uint64_t)sc->opregs.dcbaa_p)); 22484c87aefeSPatrick Mooney break; 22494c87aefeSPatrick Mooney 22504c87aefeSPatrick Mooney case XHCI_CONFIG: 22514c87aefeSPatrick Mooney sc->opregs.config = value & 0x03FF; 22524c87aefeSPatrick Mooney break; 22534c87aefeSPatrick Mooney 22544c87aefeSPatrick Mooney default: 22554c87aefeSPatrick Mooney if (offset >= 0x400) 22564c87aefeSPatrick Mooney pci_xhci_portregs_write(sc, offset, value); 22574c87aefeSPatrick Mooney 22584c87aefeSPatrick Mooney break; 22594c87aefeSPatrick Mooney } 22604c87aefeSPatrick Mooney } 22614c87aefeSPatrick Mooney 22624c87aefeSPatrick Mooney 22634c87aefeSPatrick Mooney static void 22644c87aefeSPatrick Mooney pci_xhci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 22654c87aefeSPatrick Mooney int baridx, uint64_t offset, int size, uint64_t value) 22664c87aefeSPatrick Mooney { 22674c87aefeSPatrick Mooney struct pci_xhci_softc *sc; 22684c87aefeSPatrick Mooney 22694c87aefeSPatrick Mooney sc = pi->pi_arg; 22704c87aefeSPatrick Mooney 22714c87aefeSPatrick Mooney assert(baridx == 0); 22724c87aefeSPatrick Mooney 22734c87aefeSPatrick Mooney 22744c87aefeSPatrick Mooney pthread_mutex_lock(&sc->mtx); 22754c87aefeSPatrick Mooney if (offset < XHCI_CAPLEN) /* read only registers */ 2276154972afSPatrick Mooney WPRINTF(("pci_xhci: write RO-CAPs offset %ld", offset)); 22774c87aefeSPatrick Mooney else if (offset < sc->dboff) 22784c87aefeSPatrick Mooney pci_xhci_hostop_write(sc, offset, value); 22794c87aefeSPatrick Mooney else if (offset < sc->rtsoff) 22804c87aefeSPatrick Mooney pci_xhci_dbregs_write(sc, offset, value); 22814c87aefeSPatrick Mooney else if (offset < sc->regsend) 22824c87aefeSPatrick Mooney pci_xhci_rtsregs_write(sc, offset, value); 22834c87aefeSPatrick Mooney else 2284154972afSPatrick Mooney WPRINTF(("pci_xhci: write invalid offset %ld", offset)); 22854c87aefeSPatrick Mooney 22864c87aefeSPatrick Mooney pthread_mutex_unlock(&sc->mtx); 22874c87aefeSPatrick Mooney } 22884c87aefeSPatrick Mooney 22894c87aefeSPatrick Mooney static uint64_t 22904c87aefeSPatrick Mooney pci_xhci_hostcap_read(struct pci_xhci_softc *sc, uint64_t offset) 22914c87aefeSPatrick Mooney { 22924c87aefeSPatrick Mooney uint64_t value; 22934c87aefeSPatrick Mooney 22944c87aefeSPatrick Mooney switch (offset) { 22954c87aefeSPatrick Mooney case XHCI_CAPLENGTH: /* 0x00 */ 22964c87aefeSPatrick Mooney value = sc->caplength; 22974c87aefeSPatrick Mooney break; 22984c87aefeSPatrick Mooney 22994c87aefeSPatrick Mooney case XHCI_HCSPARAMS1: /* 0x04 */ 23004c87aefeSPatrick Mooney value = sc->hcsparams1; 23014c87aefeSPatrick Mooney break; 23024c87aefeSPatrick Mooney 23034c87aefeSPatrick Mooney case XHCI_HCSPARAMS2: /* 0x08 */ 23044c87aefeSPatrick Mooney value = sc->hcsparams2; 23054c87aefeSPatrick Mooney break; 23064c87aefeSPatrick Mooney 23074c87aefeSPatrick Mooney case XHCI_HCSPARAMS3: /* 0x0C */ 23084c87aefeSPatrick Mooney value = sc->hcsparams3; 23094c87aefeSPatrick Mooney break; 23104c87aefeSPatrick Mooney 23114c87aefeSPatrick Mooney case XHCI_HCSPARAMS0: /* 0x10 */ 23124c87aefeSPatrick Mooney value = sc->hccparams1; 23134c87aefeSPatrick Mooney break; 23144c87aefeSPatrick Mooney 23154c87aefeSPatrick Mooney case XHCI_DBOFF: /* 0x14 */ 23164c87aefeSPatrick Mooney value = sc->dboff; 23174c87aefeSPatrick Mooney break; 23184c87aefeSPatrick Mooney 23194c87aefeSPatrick Mooney case XHCI_RTSOFF: /* 0x18 */ 23204c87aefeSPatrick Mooney value = sc->rtsoff; 23214c87aefeSPatrick Mooney break; 23224c87aefeSPatrick Mooney 23234c87aefeSPatrick Mooney case XHCI_HCCPRAMS2: /* 0x1C */ 23244c87aefeSPatrick Mooney value = sc->hccparams2; 23254c87aefeSPatrick Mooney break; 23264c87aefeSPatrick Mooney 23274c87aefeSPatrick Mooney default: 23284c87aefeSPatrick Mooney value = 0; 23294c87aefeSPatrick Mooney break; 23304c87aefeSPatrick Mooney } 23314c87aefeSPatrick Mooney 2332154972afSPatrick Mooney DPRINTF(("pci_xhci: hostcap read offset 0x%lx -> 0x%lx", 23334c87aefeSPatrick Mooney offset, value)); 23344c87aefeSPatrick Mooney 23354c87aefeSPatrick Mooney return (value); 23364c87aefeSPatrick Mooney } 23374c87aefeSPatrick Mooney 23384c87aefeSPatrick Mooney static uint64_t 23394c87aefeSPatrick Mooney pci_xhci_hostop_read(struct pci_xhci_softc *sc, uint64_t offset) 23404c87aefeSPatrick Mooney { 23414c87aefeSPatrick Mooney uint64_t value; 23424c87aefeSPatrick Mooney 23434c87aefeSPatrick Mooney offset = (offset - XHCI_CAPLEN); 23444c87aefeSPatrick Mooney 23454c87aefeSPatrick Mooney switch (offset) { 23464c87aefeSPatrick Mooney case XHCI_USBCMD: /* 0x00 */ 23474c87aefeSPatrick Mooney value = sc->opregs.usbcmd; 23484c87aefeSPatrick Mooney break; 23494c87aefeSPatrick Mooney 23504c87aefeSPatrick Mooney case XHCI_USBSTS: /* 0x04 */ 23514c87aefeSPatrick Mooney value = sc->opregs.usbsts; 23524c87aefeSPatrick Mooney break; 23534c87aefeSPatrick Mooney 23544c87aefeSPatrick Mooney case XHCI_PAGESIZE: /* 0x08 */ 23554c87aefeSPatrick Mooney value = sc->opregs.pgsz; 23564c87aefeSPatrick Mooney break; 23574c87aefeSPatrick Mooney 23584c87aefeSPatrick Mooney case XHCI_DNCTRL: /* 0x14 */ 23594c87aefeSPatrick Mooney value = sc->opregs.dnctrl; 23604c87aefeSPatrick Mooney break; 23614c87aefeSPatrick Mooney 23624c87aefeSPatrick Mooney case XHCI_CRCR_LO: /* 0x18 */ 23634c87aefeSPatrick Mooney value = sc->opregs.crcr & XHCI_CRCR_LO_CRR; 23644c87aefeSPatrick Mooney break; 23654c87aefeSPatrick Mooney 23664c87aefeSPatrick Mooney case XHCI_CRCR_HI: /* 0x1C */ 23674c87aefeSPatrick Mooney value = 0; 23684c87aefeSPatrick Mooney break; 23694c87aefeSPatrick Mooney 23704c87aefeSPatrick Mooney case XHCI_DCBAAP_LO: /* 0x30 */ 23714c87aefeSPatrick Mooney value = sc->opregs.dcbaap & 0xFFFFFFFF; 23724c87aefeSPatrick Mooney break; 23734c87aefeSPatrick Mooney 23744c87aefeSPatrick Mooney case XHCI_DCBAAP_HI: /* 0x34 */ 23754c87aefeSPatrick Mooney value = (sc->opregs.dcbaap >> 32) & 0xFFFFFFFF; 23764c87aefeSPatrick Mooney break; 23774c87aefeSPatrick Mooney 23784c87aefeSPatrick Mooney case XHCI_CONFIG: /* 0x38 */ 23794c87aefeSPatrick Mooney value = sc->opregs.config; 23804c87aefeSPatrick Mooney break; 23814c87aefeSPatrick Mooney 23824c87aefeSPatrick Mooney default: 23834c87aefeSPatrick Mooney if (offset >= 0x400) 23844c87aefeSPatrick Mooney value = pci_xhci_portregs_read(sc, offset); 23854c87aefeSPatrick Mooney else 23864c87aefeSPatrick Mooney value = 0; 23874c87aefeSPatrick Mooney 23884c87aefeSPatrick Mooney break; 23894c87aefeSPatrick Mooney } 23904c87aefeSPatrick Mooney 23914c87aefeSPatrick Mooney if (offset < 0x400) 2392154972afSPatrick Mooney DPRINTF(("pci_xhci: hostop read offset 0x%lx -> 0x%lx", 23934c87aefeSPatrick Mooney offset, value)); 23944c87aefeSPatrick Mooney 23954c87aefeSPatrick Mooney return (value); 23964c87aefeSPatrick Mooney } 23974c87aefeSPatrick Mooney 23984c87aefeSPatrick Mooney static uint64_t 23994c87aefeSPatrick Mooney pci_xhci_dbregs_read(struct pci_xhci_softc *sc, uint64_t offset) 24004c87aefeSPatrick Mooney { 24014c87aefeSPatrick Mooney 24024c87aefeSPatrick Mooney /* read doorbell always returns 0 */ 24034c87aefeSPatrick Mooney return (0); 24044c87aefeSPatrick Mooney } 24054c87aefeSPatrick Mooney 24064c87aefeSPatrick Mooney static uint64_t 24074c87aefeSPatrick Mooney pci_xhci_rtsregs_read(struct pci_xhci_softc *sc, uint64_t offset) 24084c87aefeSPatrick Mooney { 24094c87aefeSPatrick Mooney uint32_t value; 24104c87aefeSPatrick Mooney 24114c87aefeSPatrick Mooney offset -= sc->rtsoff; 24124c87aefeSPatrick Mooney value = 0; 24134c87aefeSPatrick Mooney 24144c87aefeSPatrick Mooney if (offset == XHCI_MFINDEX) { 24154c87aefeSPatrick Mooney value = sc->rtsregs.mfindex; 24164c87aefeSPatrick Mooney } else if (offset >= 0x20) { 24174c87aefeSPatrick Mooney int item; 24184c87aefeSPatrick Mooney uint32_t *p; 24194c87aefeSPatrick Mooney 24204c87aefeSPatrick Mooney offset -= 0x20; 24214c87aefeSPatrick Mooney item = offset % 32; 24224c87aefeSPatrick Mooney 24234c87aefeSPatrick Mooney assert(offset < sizeof(sc->rtsregs.intrreg)); 24244c87aefeSPatrick Mooney 24254c87aefeSPatrick Mooney p = &sc->rtsregs.intrreg.iman; 24264c87aefeSPatrick Mooney p += item / sizeof(uint32_t); 24274c87aefeSPatrick Mooney value = *p; 24284c87aefeSPatrick Mooney } 24294c87aefeSPatrick Mooney 2430154972afSPatrick Mooney DPRINTF(("pci_xhci: rtsregs read offset 0x%lx -> 0x%x", 24314c87aefeSPatrick Mooney offset, value)); 24324c87aefeSPatrick Mooney 24334c87aefeSPatrick Mooney return (value); 24344c87aefeSPatrick Mooney } 24354c87aefeSPatrick Mooney 24364c87aefeSPatrick Mooney static uint64_t 24374c87aefeSPatrick Mooney pci_xhci_xecp_read(struct pci_xhci_softc *sc, uint64_t offset) 24384c87aefeSPatrick Mooney { 24394c87aefeSPatrick Mooney uint32_t value; 24404c87aefeSPatrick Mooney 24414c87aefeSPatrick Mooney offset -= sc->regsend; 24424c87aefeSPatrick Mooney value = 0; 24434c87aefeSPatrick Mooney 24444c87aefeSPatrick Mooney switch (offset) { 24454c87aefeSPatrick Mooney case 0: 24464c87aefeSPatrick Mooney /* rev major | rev minor | next-cap | cap-id */ 24474c87aefeSPatrick Mooney value = (0x02 << 24) | (4 << 8) | XHCI_ID_PROTOCOLS; 24484c87aefeSPatrick Mooney break; 24494c87aefeSPatrick Mooney case 4: 24504c87aefeSPatrick Mooney /* name string = "USB" */ 24514c87aefeSPatrick Mooney value = 0x20425355; 24524c87aefeSPatrick Mooney break; 24534c87aefeSPatrick Mooney case 8: 24544c87aefeSPatrick Mooney /* psic | proto-defined | compat # | compat offset */ 24554c87aefeSPatrick Mooney value = ((XHCI_MAX_DEVS/2) << 8) | sc->usb2_port_start; 24564c87aefeSPatrick Mooney break; 24574c87aefeSPatrick Mooney case 12: 24584c87aefeSPatrick Mooney break; 24594c87aefeSPatrick Mooney case 16: 24604c87aefeSPatrick Mooney /* rev major | rev minor | next-cap | cap-id */ 24614c87aefeSPatrick Mooney value = (0x03 << 24) | XHCI_ID_PROTOCOLS; 24624c87aefeSPatrick Mooney break; 24634c87aefeSPatrick Mooney case 20: 24644c87aefeSPatrick Mooney /* name string = "USB" */ 24654c87aefeSPatrick Mooney value = 0x20425355; 24664c87aefeSPatrick Mooney break; 24674c87aefeSPatrick Mooney case 24: 24684c87aefeSPatrick Mooney /* psic | proto-defined | compat # | compat offset */ 24694c87aefeSPatrick Mooney value = ((XHCI_MAX_DEVS/2) << 8) | sc->usb3_port_start; 24704c87aefeSPatrick Mooney break; 24714c87aefeSPatrick Mooney case 28: 24724c87aefeSPatrick Mooney break; 24734c87aefeSPatrick Mooney default: 2474154972afSPatrick Mooney DPRINTF(("pci_xhci: xecp invalid offset 0x%lx", offset)); 24754c87aefeSPatrick Mooney break; 24764c87aefeSPatrick Mooney } 24774c87aefeSPatrick Mooney 2478154972afSPatrick Mooney DPRINTF(("pci_xhci: xecp read offset 0x%lx -> 0x%x", 24794c87aefeSPatrick Mooney offset, value)); 24804c87aefeSPatrick Mooney 24814c87aefeSPatrick Mooney return (value); 24824c87aefeSPatrick Mooney } 24834c87aefeSPatrick Mooney 24844c87aefeSPatrick Mooney 24854c87aefeSPatrick Mooney static uint64_t 24864c87aefeSPatrick Mooney pci_xhci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx, 24874c87aefeSPatrick Mooney uint64_t offset, int size) 24884c87aefeSPatrick Mooney { 24894c87aefeSPatrick Mooney struct pci_xhci_softc *sc; 24904c87aefeSPatrick Mooney uint32_t value; 24914c87aefeSPatrick Mooney 24924c87aefeSPatrick Mooney sc = pi->pi_arg; 24934c87aefeSPatrick Mooney 24944c87aefeSPatrick Mooney assert(baridx == 0); 24954c87aefeSPatrick Mooney 24964c87aefeSPatrick Mooney pthread_mutex_lock(&sc->mtx); 24974c87aefeSPatrick Mooney if (offset < XHCI_CAPLEN) 24984c87aefeSPatrick Mooney value = pci_xhci_hostcap_read(sc, offset); 24994c87aefeSPatrick Mooney else if (offset < sc->dboff) 25004c87aefeSPatrick Mooney value = pci_xhci_hostop_read(sc, offset); 25014c87aefeSPatrick Mooney else if (offset < sc->rtsoff) 25024c87aefeSPatrick Mooney value = pci_xhci_dbregs_read(sc, offset); 25034c87aefeSPatrick Mooney else if (offset < sc->regsend) 25044c87aefeSPatrick Mooney value = pci_xhci_rtsregs_read(sc, offset); 25054c87aefeSPatrick Mooney else if (offset < (sc->regsend + 4*32)) 25064c87aefeSPatrick Mooney value = pci_xhci_xecp_read(sc, offset); 25074c87aefeSPatrick Mooney else { 25084c87aefeSPatrick Mooney value = 0; 2509154972afSPatrick Mooney WPRINTF(("pci_xhci: read invalid offset %ld", offset)); 25104c87aefeSPatrick Mooney } 25114c87aefeSPatrick Mooney 25124c87aefeSPatrick Mooney pthread_mutex_unlock(&sc->mtx); 25134c87aefeSPatrick Mooney 25144c87aefeSPatrick Mooney switch (size) { 25154c87aefeSPatrick Mooney case 1: 25164c87aefeSPatrick Mooney value &= 0xFF; 25174c87aefeSPatrick Mooney break; 25184c87aefeSPatrick Mooney case 2: 25194c87aefeSPatrick Mooney value &= 0xFFFF; 25204c87aefeSPatrick Mooney break; 25214c87aefeSPatrick Mooney case 4: 25224c87aefeSPatrick Mooney value &= 0xFFFFFFFF; 25234c87aefeSPatrick Mooney break; 25244c87aefeSPatrick Mooney } 25254c87aefeSPatrick Mooney 25264c87aefeSPatrick Mooney return (value); 25274c87aefeSPatrick Mooney } 25284c87aefeSPatrick Mooney 25294c87aefeSPatrick Mooney static void 25304c87aefeSPatrick Mooney pci_xhci_reset_port(struct pci_xhci_softc *sc, int portn, int warm) 25314c87aefeSPatrick Mooney { 25324c87aefeSPatrick Mooney struct pci_xhci_portregs *port; 25334c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 25344c87aefeSPatrick Mooney struct xhci_trb evtrb; 25354c87aefeSPatrick Mooney int error; 25364c87aefeSPatrick Mooney 25374c87aefeSPatrick Mooney assert(portn <= XHCI_MAX_DEVS); 25384c87aefeSPatrick Mooney 2539154972afSPatrick Mooney DPRINTF(("xhci reset port %d", portn)); 25404c87aefeSPatrick Mooney 25414c87aefeSPatrick Mooney port = XHCI_PORTREG_PTR(sc, portn); 25424c87aefeSPatrick Mooney dev = XHCI_DEVINST_PTR(sc, portn); 25434c87aefeSPatrick Mooney if (dev) { 25444c87aefeSPatrick Mooney port->portsc &= ~(XHCI_PS_PLS_MASK | XHCI_PS_PR | XHCI_PS_PRC); 25454c87aefeSPatrick Mooney port->portsc |= XHCI_PS_PED | 25464c87aefeSPatrick Mooney XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); 25474c87aefeSPatrick Mooney 25484c87aefeSPatrick Mooney if (warm && dev->dev_ue->ue_usbver == 3) { 25494c87aefeSPatrick Mooney port->portsc |= XHCI_PS_WRC; 25504c87aefeSPatrick Mooney } 25514c87aefeSPatrick Mooney 25524c87aefeSPatrick Mooney if ((port->portsc & XHCI_PS_PRC) == 0) { 25534c87aefeSPatrick Mooney port->portsc |= XHCI_PS_PRC; 25544c87aefeSPatrick Mooney 25554c87aefeSPatrick Mooney pci_xhci_set_evtrb(&evtrb, portn, 25564c87aefeSPatrick Mooney XHCI_TRB_ERROR_SUCCESS, 25574c87aefeSPatrick Mooney XHCI_TRB_EVENT_PORT_STS_CHANGE); 25584c87aefeSPatrick Mooney error = pci_xhci_insert_event(sc, &evtrb, 1); 25594c87aefeSPatrick Mooney if (error != XHCI_TRB_ERROR_SUCCESS) 25604c87aefeSPatrick Mooney DPRINTF(("xhci reset port insert event " 2561154972afSPatrick Mooney "failed")); 25624c87aefeSPatrick Mooney } 25634c87aefeSPatrick Mooney } 25644c87aefeSPatrick Mooney } 25654c87aefeSPatrick Mooney 25664c87aefeSPatrick Mooney static void 25674c87aefeSPatrick Mooney pci_xhci_init_port(struct pci_xhci_softc *sc, int portn) 25684c87aefeSPatrick Mooney { 25694c87aefeSPatrick Mooney struct pci_xhci_portregs *port; 25704c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 25714c87aefeSPatrick Mooney 25724c87aefeSPatrick Mooney port = XHCI_PORTREG_PTR(sc, portn); 25734c87aefeSPatrick Mooney dev = XHCI_DEVINST_PTR(sc, portn); 25744c87aefeSPatrick Mooney if (dev) { 25754c87aefeSPatrick Mooney port->portsc = XHCI_PS_CCS | /* connected */ 25764c87aefeSPatrick Mooney XHCI_PS_PP; /* port power */ 25774c87aefeSPatrick Mooney 25784c87aefeSPatrick Mooney if (dev->dev_ue->ue_usbver == 2) { 25794c87aefeSPatrick Mooney port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_POLL) | 25804c87aefeSPatrick Mooney XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); 25814c87aefeSPatrick Mooney } else { 25824c87aefeSPatrick Mooney port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_U0) | 25834c87aefeSPatrick Mooney XHCI_PS_PED | /* enabled */ 25844c87aefeSPatrick Mooney XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); 25854c87aefeSPatrick Mooney } 25864c87aefeSPatrick Mooney 2587154972afSPatrick Mooney DPRINTF(("Init port %d 0x%x", portn, port->portsc)); 25884c87aefeSPatrick Mooney } else { 25894c87aefeSPatrick Mooney port->portsc = XHCI_PS_PLS_SET(UPS_PORT_LS_RX_DET) | XHCI_PS_PP; 2590154972afSPatrick Mooney DPRINTF(("Init empty port %d 0x%x", portn, port->portsc)); 25914c87aefeSPatrick Mooney } 25924c87aefeSPatrick Mooney } 25934c87aefeSPatrick Mooney 25944c87aefeSPatrick Mooney static int 25954c87aefeSPatrick Mooney pci_xhci_dev_intr(struct usb_hci *hci, int epctx) 25964c87aefeSPatrick Mooney { 25974c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 25984c87aefeSPatrick Mooney struct xhci_dev_ctx *dev_ctx; 25994c87aefeSPatrick Mooney struct xhci_trb evtrb; 26004c87aefeSPatrick Mooney struct pci_xhci_softc *sc; 26014c87aefeSPatrick Mooney struct pci_xhci_portregs *p; 26024c87aefeSPatrick Mooney struct xhci_endp_ctx *ep_ctx; 260384659b24SMichael Zeller int error = 0; 26044c87aefeSPatrick Mooney int dir_in; 26054c87aefeSPatrick Mooney int epid; 26064c87aefeSPatrick Mooney 26074c87aefeSPatrick Mooney dir_in = epctx & 0x80; 26084c87aefeSPatrick Mooney epid = epctx & ~0x80; 26094c87aefeSPatrick Mooney 26104c87aefeSPatrick Mooney /* HW endpoint contexts are 0-15; convert to epid based on dir */ 26114c87aefeSPatrick Mooney epid = (epid * 2) + (dir_in ? 1 : 0); 26124c87aefeSPatrick Mooney 26134c87aefeSPatrick Mooney assert(epid >= 1 && epid <= 31); 26144c87aefeSPatrick Mooney 26154c87aefeSPatrick Mooney dev = hci->hci_sc; 26164c87aefeSPatrick Mooney sc = dev->xsc; 26174c87aefeSPatrick Mooney 26184c87aefeSPatrick Mooney /* check if device is ready; OS has to initialise it */ 26194c87aefeSPatrick Mooney if (sc->rtsregs.erstba_p == NULL || 26204c87aefeSPatrick Mooney (sc->opregs.usbcmd & XHCI_CMD_RS) == 0 || 26214c87aefeSPatrick Mooney dev->dev_ctx == NULL) 26224c87aefeSPatrick Mooney return (0); 26234c87aefeSPatrick Mooney 26244c87aefeSPatrick Mooney p = XHCI_PORTREG_PTR(sc, hci->hci_port); 26254c87aefeSPatrick Mooney 26264c87aefeSPatrick Mooney /* raise event if link U3 (suspended) state */ 26274c87aefeSPatrick Mooney if (XHCI_PS_PLS_GET(p->portsc) == 3) { 26284c87aefeSPatrick Mooney p->portsc &= ~XHCI_PS_PLS_MASK; 26294c87aefeSPatrick Mooney p->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_RESUME); 26304c87aefeSPatrick Mooney if ((p->portsc & XHCI_PS_PLC) != 0) 26314c87aefeSPatrick Mooney return (0); 26324c87aefeSPatrick Mooney 26334c87aefeSPatrick Mooney p->portsc |= XHCI_PS_PLC; 26344c87aefeSPatrick Mooney 26354c87aefeSPatrick Mooney pci_xhci_set_evtrb(&evtrb, hci->hci_port, 26364c87aefeSPatrick Mooney XHCI_TRB_ERROR_SUCCESS, XHCI_TRB_EVENT_PORT_STS_CHANGE); 26374c87aefeSPatrick Mooney error = pci_xhci_insert_event(sc, &evtrb, 0); 26384c87aefeSPatrick Mooney if (error != XHCI_TRB_ERROR_SUCCESS) 26394c87aefeSPatrick Mooney goto done; 26404c87aefeSPatrick Mooney } 26414c87aefeSPatrick Mooney 26424c87aefeSPatrick Mooney dev_ctx = dev->dev_ctx; 26434c87aefeSPatrick Mooney ep_ctx = &dev_ctx->ctx_ep[epid]; 26444c87aefeSPatrick Mooney if ((ep_ctx->dwEpCtx0 & 0x7) == XHCI_ST_EPCTX_DISABLED) { 2645154972afSPatrick Mooney DPRINTF(("xhci device interrupt on disabled endpoint %d", 26464c87aefeSPatrick Mooney epid)); 26474c87aefeSPatrick Mooney return (0); 26484c87aefeSPatrick Mooney } 26494c87aefeSPatrick Mooney 2650154972afSPatrick Mooney DPRINTF(("xhci device interrupt on endpoint %d", epid)); 26514c87aefeSPatrick Mooney 26524c87aefeSPatrick Mooney pci_xhci_device_doorbell(sc, hci->hci_port, epid, 0); 26534c87aefeSPatrick Mooney 26544c87aefeSPatrick Mooney done: 26554c87aefeSPatrick Mooney return (error); 26564c87aefeSPatrick Mooney } 26574c87aefeSPatrick Mooney 26584c87aefeSPatrick Mooney static int 26594c87aefeSPatrick Mooney pci_xhci_dev_event(struct usb_hci *hci, enum hci_usbev evid, void *param) 26604c87aefeSPatrick Mooney { 26614c87aefeSPatrick Mooney 2662154972afSPatrick Mooney DPRINTF(("xhci device event port %d", hci->hci_port)); 26634c87aefeSPatrick Mooney return (0); 26644c87aefeSPatrick Mooney } 26654c87aefeSPatrick Mooney 26662b948146SAndy Fiddaman /* 26672b948146SAndy Fiddaman * Each controller contains a "slot" node which contains a list of 26682b948146SAndy Fiddaman * child nodes each of which is a device. Each slot node's name 26692b948146SAndy Fiddaman * corresponds to a specific controller slot. These nodes 26702b948146SAndy Fiddaman * contain a "device" variable identifying the device model of the 26712b948146SAndy Fiddaman * USB device. For example: 26722b948146SAndy Fiddaman * 26732b948146SAndy Fiddaman * pci.0.1.0 26742b948146SAndy Fiddaman * .device="xhci" 26752b948146SAndy Fiddaman * .slot 26762b948146SAndy Fiddaman * .1 26772b948146SAndy Fiddaman * .device="tablet" 26782b948146SAndy Fiddaman */ 26792b948146SAndy Fiddaman static int 26802b948146SAndy Fiddaman pci_xhci_legacy_config(nvlist_t *nvl, const char *opts) 26814c87aefeSPatrick Mooney { 26822b948146SAndy Fiddaman char node_name[16]; 26832b948146SAndy Fiddaman nvlist_t *slots_nvl, *slot_nvl; 26842b948146SAndy Fiddaman char *cp, *opt, *str, *tofree; 26852b948146SAndy Fiddaman int slot; 26864c87aefeSPatrick Mooney 26872b948146SAndy Fiddaman if (opts == NULL) 26882b948146SAndy Fiddaman return (0); 26892b948146SAndy Fiddaman 26902b948146SAndy Fiddaman slots_nvl = create_relative_config_node(nvl, "slot"); 26912b948146SAndy Fiddaman slot = 1; 26922b948146SAndy Fiddaman tofree = str = strdup(opts); 26932b948146SAndy Fiddaman while ((opt = strsep(&str, ",")) != NULL) { 26942b948146SAndy Fiddaman /* device[=<config>] */ 26952b948146SAndy Fiddaman cp = strchr(opt, '='); 26962b948146SAndy Fiddaman if (cp != NULL) { 26972b948146SAndy Fiddaman *cp = '\0'; 26982b948146SAndy Fiddaman cp++; 26992b948146SAndy Fiddaman } 27002b948146SAndy Fiddaman 27012b948146SAndy Fiddaman snprintf(node_name, sizeof(node_name), "%d", slot); 27022b948146SAndy Fiddaman slot++; 27032b948146SAndy Fiddaman slot_nvl = create_relative_config_node(slots_nvl, node_name); 27042b948146SAndy Fiddaman set_config_value_node(slot_nvl, "device", opt); 27052b948146SAndy Fiddaman 27062b948146SAndy Fiddaman /* 27072b948146SAndy Fiddaman * NB: Given that we split on commas above, the legacy 27082b948146SAndy Fiddaman * format only supports a single option. 27092b948146SAndy Fiddaman */ 27102b948146SAndy Fiddaman if (cp != NULL && *cp != '\0') 27112b948146SAndy Fiddaman pci_parse_legacy_config(slot_nvl, cp); 27122b948146SAndy Fiddaman } 27132b948146SAndy Fiddaman free(tofree); 27142b948146SAndy Fiddaman return (0); 27154c87aefeSPatrick Mooney } 27164c87aefeSPatrick Mooney 27174c87aefeSPatrick Mooney static int 27182b948146SAndy Fiddaman pci_xhci_parse_devices(struct pci_xhci_softc *sc, nvlist_t *nvl) 27194c87aefeSPatrick Mooney { 27204c87aefeSPatrick Mooney struct pci_xhci_dev_emu *dev; 27214c87aefeSPatrick Mooney struct usb_devemu *ue; 27222b948146SAndy Fiddaman const nvlist_t *slots_nvl, *slot_nvl; 27232b948146SAndy Fiddaman const char *name, *device; 27242b948146SAndy Fiddaman char *cp; 27252b948146SAndy Fiddaman void *devsc, *cookie; 27262b948146SAndy Fiddaman long slot; 27272b948146SAndy Fiddaman int type, usb3_port, usb2_port, i, ndevices; 27284c87aefeSPatrick Mooney 27292b948146SAndy Fiddaman usb3_port = sc->usb3_port_start; 27302b948146SAndy Fiddaman usb2_port = sc->usb2_port_start; 27314c87aefeSPatrick Mooney 27322b948146SAndy Fiddaman sc->devices = calloc(XHCI_MAX_DEVS, sizeof(struct pci_xhci_dev_emu *)); 27332b948146SAndy Fiddaman sc->slots = calloc(XHCI_MAX_SLOTS, sizeof(struct pci_xhci_dev_emu *)); 27342b948146SAndy Fiddaman 27352b948146SAndy Fiddaman /* port and slot numbering start from 1 */ 27362b948146SAndy Fiddaman sc->devices--; 27372b948146SAndy Fiddaman sc->slots--; 27382b948146SAndy Fiddaman 27392b948146SAndy Fiddaman ndevices = 0; 27402b948146SAndy Fiddaman 27412b948146SAndy Fiddaman slots_nvl = find_relative_config_node(nvl, "slot"); 27422b948146SAndy Fiddaman if (slots_nvl == NULL) 27434c87aefeSPatrick Mooney goto portsfinal; 27444c87aefeSPatrick Mooney 27452b948146SAndy Fiddaman cookie = NULL; 27462b948146SAndy Fiddaman while ((name = nvlist_next(slots_nvl, &type, &cookie)) != NULL) { 27472b948146SAndy Fiddaman if (usb2_port == ((sc->usb2_port_start) + XHCI_MAX_DEVS/2) || 27482b948146SAndy Fiddaman usb3_port == ((sc->usb3_port_start) + XHCI_MAX_DEVS/2)) { 27494c87aefeSPatrick Mooney WPRINTF(("pci_xhci max number of USB 2 or 3 " 2750154972afSPatrick Mooney "devices reached, max %d", XHCI_MAX_DEVS/2)); 27512b948146SAndy Fiddaman goto bad; 27524c87aefeSPatrick Mooney } 27534c87aefeSPatrick Mooney 27542b948146SAndy Fiddaman if (type != NV_TYPE_NVLIST) { 27552b948146SAndy Fiddaman EPRINTLN( 27562b948146SAndy Fiddaman "pci_xhci: config variable '%s' under slot node", 27572b948146SAndy Fiddaman name); 27582b948146SAndy Fiddaman goto bad; 27592b948146SAndy Fiddaman } 27604c87aefeSPatrick Mooney 27612b948146SAndy Fiddaman slot = strtol(name, &cp, 0); 27622b948146SAndy Fiddaman if (*cp != '\0' || slot <= 0 || slot > XHCI_MAX_SLOTS) { 27632b948146SAndy Fiddaman EPRINTLN("pci_xhci: invalid slot '%s'", name); 27642b948146SAndy Fiddaman goto bad; 27652b948146SAndy Fiddaman } 27662b948146SAndy Fiddaman 27672b948146SAndy Fiddaman if (XHCI_SLOTDEV_PTR(sc, slot) != NULL) { 27682b948146SAndy Fiddaman EPRINTLN("pci_xhci: duplicate slot '%s'", name); 27692b948146SAndy Fiddaman goto bad; 27702b948146SAndy Fiddaman } 27712b948146SAndy Fiddaman 27722b948146SAndy Fiddaman slot_nvl = nvlist_get_nvlist(slots_nvl, name); 27732b948146SAndy Fiddaman device = get_config_value_node(slot_nvl, "device"); 27742b948146SAndy Fiddaman if (device == NULL) { 27752b948146SAndy Fiddaman EPRINTLN( 27762b948146SAndy Fiddaman "pci_xhci: missing \"device\" value for slot '%s'", 27772b948146SAndy Fiddaman name); 27782b948146SAndy Fiddaman goto bad; 27792b948146SAndy Fiddaman } 27802b948146SAndy Fiddaman 27812b948146SAndy Fiddaman ue = usb_emu_finddev(device); 27824c87aefeSPatrick Mooney if (ue == NULL) { 27832b948146SAndy Fiddaman EPRINTLN("pci_xhci: unknown device model \"%s\"", 27842b948146SAndy Fiddaman device); 27852b948146SAndy Fiddaman goto bad; 27864c87aefeSPatrick Mooney } 27874c87aefeSPatrick Mooney 27882b948146SAndy Fiddaman DPRINTF(("pci_xhci adding device %s", device)); 27894c87aefeSPatrick Mooney 27904c87aefeSPatrick Mooney dev = calloc(1, sizeof(struct pci_xhci_dev_emu)); 27914c87aefeSPatrick Mooney dev->xsc = sc; 27924c87aefeSPatrick Mooney dev->hci.hci_sc = dev; 27934c87aefeSPatrick Mooney dev->hci.hci_intr = pci_xhci_dev_intr; 27944c87aefeSPatrick Mooney dev->hci.hci_event = pci_xhci_dev_event; 27954c87aefeSPatrick Mooney 27964c87aefeSPatrick Mooney if (ue->ue_usbver == 2) { 27972b948146SAndy Fiddaman if (usb2_port == sc->usb2_port_start + 27982b948146SAndy Fiddaman XHCI_MAX_DEVS / 2) { 27992b948146SAndy Fiddaman WPRINTF(("pci_xhci max number of USB 2 devices " 28002b948146SAndy Fiddaman "reached, max %d", XHCI_MAX_DEVS / 2)); 28012b948146SAndy Fiddaman goto bad; 28022b948146SAndy Fiddaman } 28032b948146SAndy Fiddaman dev->hci.hci_port = usb2_port; 28044c87aefeSPatrick Mooney usb2_port++; 28054c87aefeSPatrick Mooney } else { 28062b948146SAndy Fiddaman if (usb3_port == sc->usb3_port_start + 28072b948146SAndy Fiddaman XHCI_MAX_DEVS / 2) { 28082b948146SAndy Fiddaman WPRINTF(("pci_xhci max number of USB 3 devices " 28092b948146SAndy Fiddaman "reached, max %d", XHCI_MAX_DEVS / 2)); 28102b948146SAndy Fiddaman goto bad; 28112b948146SAndy Fiddaman } 28122b948146SAndy Fiddaman dev->hci.hci_port = usb3_port; 28134c87aefeSPatrick Mooney usb3_port++; 28144c87aefeSPatrick Mooney } 28152b948146SAndy Fiddaman XHCI_DEVINST_PTR(sc, dev->hci.hci_port) = dev; 28164c87aefeSPatrick Mooney 28174c87aefeSPatrick Mooney dev->hci.hci_address = 0; 28182b948146SAndy Fiddaman devsc = ue->ue_init(&dev->hci, nvl); 28194c87aefeSPatrick Mooney if (devsc == NULL) { 28202b948146SAndy Fiddaman goto bad; 28214c87aefeSPatrick Mooney } 28224c87aefeSPatrick Mooney 28234c87aefeSPatrick Mooney dev->dev_ue = ue; 28244c87aefeSPatrick Mooney dev->dev_sc = devsc; 28254c87aefeSPatrick Mooney 28262b948146SAndy Fiddaman XHCI_SLOTDEV_PTR(sc, slot) = dev; 28272b948146SAndy Fiddaman ndevices++; 28284c87aefeSPatrick Mooney } 28294c87aefeSPatrick Mooney 28304c87aefeSPatrick Mooney portsfinal: 28314c87aefeSPatrick Mooney sc->portregs = calloc(XHCI_MAX_DEVS, sizeof(struct pci_xhci_portregs)); 28324c87aefeSPatrick Mooney sc->portregs--; 28334c87aefeSPatrick Mooney 28342b948146SAndy Fiddaman if (ndevices > 0) { 28354c87aefeSPatrick Mooney for (i = 1; i <= XHCI_MAX_DEVS; i++) { 28364c87aefeSPatrick Mooney pci_xhci_init_port(sc, i); 28374c87aefeSPatrick Mooney } 28384c87aefeSPatrick Mooney } else { 2839154972afSPatrick Mooney WPRINTF(("pci_xhci no USB devices configured")); 28402b948146SAndy Fiddaman } 28412b948146SAndy Fiddaman return (0); 28422b948146SAndy Fiddaman 28432b948146SAndy Fiddaman bad: 28442b948146SAndy Fiddaman for (i = 1; i <= XHCI_MAX_DEVS; i++) { 28452b948146SAndy Fiddaman free(XHCI_DEVINST_PTR(sc, i)); 28464c87aefeSPatrick Mooney } 28474c87aefeSPatrick Mooney 28482b948146SAndy Fiddaman free(sc->devices + 1); 28492b948146SAndy Fiddaman free(sc->slots + 1); 28504c87aefeSPatrick Mooney 28512b948146SAndy Fiddaman return (-1); 28524c87aefeSPatrick Mooney } 28534c87aefeSPatrick Mooney 28544c87aefeSPatrick Mooney static int 28552b948146SAndy Fiddaman pci_xhci_init(struct vmctx *ctx, struct pci_devinst *pi, nvlist_t *nvl) 28564c87aefeSPatrick Mooney { 28574c87aefeSPatrick Mooney struct pci_xhci_softc *sc; 28584c87aefeSPatrick Mooney int error; 28594c87aefeSPatrick Mooney 2860*104fd295SAndy Fiddaman #ifndef __FreeBSD__ 2861*104fd295SAndy Fiddaman if (get_config_bool_default("xhci.debug", false)) 2862*104fd295SAndy Fiddaman xhci_debug = 1; 2863*104fd295SAndy Fiddaman #endif 2864*104fd295SAndy Fiddaman 28654c87aefeSPatrick Mooney if (xhci_in_use) { 2866154972afSPatrick Mooney WPRINTF(("pci_xhci controller already defined")); 28674c87aefeSPatrick Mooney return (-1); 28684c87aefeSPatrick Mooney } 28694c87aefeSPatrick Mooney xhci_in_use = 1; 28704c87aefeSPatrick Mooney 28714c87aefeSPatrick Mooney sc = calloc(1, sizeof(struct pci_xhci_softc)); 28724c87aefeSPatrick Mooney pi->pi_arg = sc; 28734c87aefeSPatrick Mooney sc->xsc_pi = pi; 28744c87aefeSPatrick Mooney 28754c87aefeSPatrick Mooney sc->usb2_port_start = (XHCI_MAX_DEVS/2) + 1; 28764c87aefeSPatrick Mooney sc->usb3_port_start = 1; 28774c87aefeSPatrick Mooney 28784c87aefeSPatrick Mooney /* discover devices */ 28792b948146SAndy Fiddaman error = pci_xhci_parse_devices(sc, nvl); 28804c87aefeSPatrick Mooney if (error < 0) 28814c87aefeSPatrick Mooney goto done; 28824c87aefeSPatrick Mooney else 28834c87aefeSPatrick Mooney error = 0; 28844c87aefeSPatrick Mooney 28854c87aefeSPatrick Mooney sc->caplength = XHCI_SET_CAPLEN(XHCI_CAPLEN) | 28864c87aefeSPatrick Mooney XHCI_SET_HCIVERSION(0x0100); 28874c87aefeSPatrick Mooney sc->hcsparams1 = XHCI_SET_HCSP1_MAXPORTS(XHCI_MAX_DEVS) | 28884c87aefeSPatrick Mooney XHCI_SET_HCSP1_MAXINTR(1) | /* interrupters */ 28894c87aefeSPatrick Mooney XHCI_SET_HCSP1_MAXSLOTS(XHCI_MAX_SLOTS); 28904c87aefeSPatrick Mooney sc->hcsparams2 = XHCI_SET_HCSP2_ERSTMAX(XHCI_ERST_MAX) | 28914c87aefeSPatrick Mooney XHCI_SET_HCSP2_IST(0x04); 28924c87aefeSPatrick Mooney sc->hcsparams3 = 0; /* no latency */ 28936960cd89SAndy Fiddaman sc->hccparams1 = XHCI_SET_HCCP1_AC64(1) | /* 64-bit addrs */ 28946960cd89SAndy Fiddaman XHCI_SET_HCCP1_NSS(1) | /* no 2nd-streams */ 28954c87aefeSPatrick Mooney XHCI_SET_HCCP1_SPC(1) | /* short packet */ 28964c87aefeSPatrick Mooney XHCI_SET_HCCP1_MAXPSA(XHCI_STREAMS_MAX); 28974c87aefeSPatrick Mooney sc->hccparams2 = XHCI_SET_HCCP2_LEC(1) | 28984c87aefeSPatrick Mooney XHCI_SET_HCCP2_U3C(1); 28994c87aefeSPatrick Mooney sc->dboff = XHCI_SET_DOORBELL(XHCI_CAPLEN + XHCI_PORTREGS_START + 29004c87aefeSPatrick Mooney XHCI_MAX_DEVS * sizeof(struct pci_xhci_portregs)); 29014c87aefeSPatrick Mooney 29024c87aefeSPatrick Mooney /* dboff must be 32-bit aligned */ 29034c87aefeSPatrick Mooney if (sc->dboff & 0x3) 29044c87aefeSPatrick Mooney sc->dboff = (sc->dboff + 0x3) & ~0x3; 29054c87aefeSPatrick Mooney 29064c87aefeSPatrick Mooney /* rtsoff must be 32-bytes aligned */ 29074c87aefeSPatrick Mooney sc->rtsoff = XHCI_SET_RTSOFFSET(sc->dboff + (XHCI_MAX_SLOTS+1) * 32); 29084c87aefeSPatrick Mooney if (sc->rtsoff & 0x1F) 29094c87aefeSPatrick Mooney sc->rtsoff = (sc->rtsoff + 0x1F) & ~0x1F; 29104c87aefeSPatrick Mooney 2911154972afSPatrick Mooney DPRINTF(("pci_xhci dboff: 0x%x, rtsoff: 0x%x", sc->dboff, 29124c87aefeSPatrick Mooney sc->rtsoff)); 29134c87aefeSPatrick Mooney 29144c87aefeSPatrick Mooney sc->opregs.usbsts = XHCI_STS_HCH; 29154c87aefeSPatrick Mooney sc->opregs.pgsz = XHCI_PAGESIZE_4K; 29164c87aefeSPatrick Mooney 29174c87aefeSPatrick Mooney pci_xhci_reset(sc); 29184c87aefeSPatrick Mooney 29194c87aefeSPatrick Mooney sc->regsend = sc->rtsoff + 0x20 + 32; /* only 1 intrpter */ 29204c87aefeSPatrick Mooney 29214c87aefeSPatrick Mooney /* 29224c87aefeSPatrick Mooney * Set extended capabilities pointer to be after regsend; 29234c87aefeSPatrick Mooney * value of xecp field is 32-bit offset. 29244c87aefeSPatrick Mooney */ 29254c87aefeSPatrick Mooney sc->hccparams1 |= XHCI_SET_HCCP1_XECP(sc->regsend/4); 29264c87aefeSPatrick Mooney 29274c87aefeSPatrick Mooney pci_set_cfgdata16(pi, PCIR_DEVICE, 0x1E31); 29284c87aefeSPatrick Mooney pci_set_cfgdata16(pi, PCIR_VENDOR, 0x8086); 29294c87aefeSPatrick Mooney pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_SERIALBUS); 29304c87aefeSPatrick Mooney pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_SERIALBUS_USB); 29314c87aefeSPatrick Mooney pci_set_cfgdata8(pi, PCIR_PROGIF,PCIP_SERIALBUS_USB_XHCI); 29324c87aefeSPatrick Mooney pci_set_cfgdata8(pi, PCI_USBREV, PCI_USB_REV_3_0); 29334c87aefeSPatrick Mooney 29344c87aefeSPatrick Mooney pci_emul_add_msicap(pi, 1); 29354c87aefeSPatrick Mooney 29364c87aefeSPatrick Mooney /* regsend + xecp registers */ 29374c87aefeSPatrick Mooney pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, sc->regsend + 4*32); 2938154972afSPatrick Mooney DPRINTF(("pci_xhci pci_emu_alloc: %d", sc->regsend + 4*32)); 29394c87aefeSPatrick Mooney 29404c87aefeSPatrick Mooney 29414c87aefeSPatrick Mooney pci_lintr_request(pi); 29424c87aefeSPatrick Mooney 29434c87aefeSPatrick Mooney pthread_mutex_init(&sc->mtx, NULL); 29444c87aefeSPatrick Mooney 29454c87aefeSPatrick Mooney done: 29464c87aefeSPatrick Mooney if (error) { 29474c87aefeSPatrick Mooney free(sc); 29484c87aefeSPatrick Mooney } 29494c87aefeSPatrick Mooney 29504c87aefeSPatrick Mooney return (error); 29514c87aefeSPatrick Mooney } 29524c87aefeSPatrick Mooney 29534c87aefeSPatrick Mooney struct pci_devemu pci_de_xhci = { 29544c87aefeSPatrick Mooney .pe_emu = "xhci", 29554c87aefeSPatrick Mooney .pe_init = pci_xhci_init, 29562b948146SAndy Fiddaman .pe_legacy_config = pci_xhci_legacy_config, 29574c87aefeSPatrick Mooney .pe_barwrite = pci_xhci_write, 29584c87aefeSPatrick Mooney .pe_barread = pci_xhci_read 29594c87aefeSPatrick Mooney }; 29604c87aefeSPatrick Mooney PCI_EMUL_SET(pci_de_xhci); 2961