1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2015 Nahanni Systems, Inc. 5 * Copyright 2018 Joyent, Inc. 6 * Copyright 2021 OmniOS Community Edition (OmniOSce) Association. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 33 #include <sys/types.h> 34 #include <sys/mman.h> 35 36 #include <machine/vmm.h> 37 #include <vmmapi.h> 38 39 #include <stdio.h> 40 #include <stdlib.h> 41 #include <string.h> 42 43 #include <errno.h> 44 #include <unistd.h> 45 46 #include "bhyvegc.h" 47 #include "bhyverun.h" 48 #include "config.h" 49 #include "debug.h" 50 #include "console.h" 51 #include "inout.h" 52 #include "pci_emul.h" 53 #include "rfb.h" 54 #include "vga.h" 55 56 /* 57 * bhyve Framebuffer device emulation. 58 * BAR0 points to the current mode information. 59 * BAR1 is the 32-bit framebuffer address. 60 * 61 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 62 */ 63 64 static int fbuf_debug = 1; 65 #define DEBUG_INFO 1 66 #define DEBUG_VERBOSE 4 67 #define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params 68 69 70 #define KB (1024UL) 71 #define MB (1024 * 1024UL) 72 73 #define DMEMSZ 128 74 75 #define FB_SIZE (16*MB) 76 77 #define COLS_MAX 1920 78 #define ROWS_MAX 1200 79 80 #define COLS_DEFAULT 1024 81 #define ROWS_DEFAULT 768 82 83 #define COLS_MIN 640 84 #define ROWS_MIN 480 85 86 struct pci_fbuf_softc { 87 struct pci_devinst *fsc_pi; 88 struct { 89 uint32_t fbsize; 90 uint16_t width; 91 uint16_t height; 92 uint16_t depth; 93 uint16_t refreshrate; 94 uint8_t reserved[116]; 95 } __packed memregs; 96 97 /* rfb server */ 98 char *rfb_host; 99 char *rfb_password; 100 int rfb_port; 101 #ifndef __FreeBSD__ 102 const char *rfb_unix; 103 #endif 104 int rfb_wait; 105 int vga_enabled; 106 int vga_full; 107 108 uint32_t fbaddr; 109 char *fb_base; 110 uint16_t gc_width; 111 uint16_t gc_height; 112 void *vgasc; 113 struct bhyvegc_image *gc_image; 114 }; 115 116 static struct pci_fbuf_softc *fbuf_sc; 117 118 #define PCI_FBUF_MSI_MSGS 4 119 120 static void 121 pci_fbuf_write(struct pci_devinst *pi, int baridx, uint64_t offset, int size, 122 uint64_t value) 123 { 124 struct pci_fbuf_softc *sc; 125 uint8_t *p; 126 127 assert(baridx == 0); 128 129 sc = pi->pi_arg; 130 131 DPRINTF(DEBUG_VERBOSE, 132 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx", 133 offset, size, value)); 134 135 if (offset + size > DMEMSZ) { 136 printf("fbuf: write too large, offset %ld size %d\n", 137 offset, size); 138 return; 139 } 140 141 p = (uint8_t *)&sc->memregs + offset; 142 143 switch (size) { 144 case 1: 145 *p = value; 146 break; 147 case 2: 148 *(uint16_t *)p = value; 149 break; 150 case 4: 151 *(uint32_t *)p = value; 152 break; 153 case 8: 154 *(uint64_t *)p = value; 155 break; 156 default: 157 printf("fbuf: write unknown size %d\n", size); 158 break; 159 } 160 161 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 162 sc->memregs.height == 0) { 163 DPRINTF(DEBUG_INFO, ("switching to VGA mode")); 164 sc->gc_image->vgamode = 1; 165 sc->gc_width = 0; 166 sc->gc_height = 0; 167 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 168 sc->memregs.height != 0) { 169 DPRINTF(DEBUG_INFO, ("switching to VESA mode")); 170 sc->gc_image->vgamode = 0; 171 } 172 } 173 174 static uint64_t 175 pci_fbuf_read(struct pci_devinst *pi, int baridx, uint64_t offset, int size) 176 { 177 struct pci_fbuf_softc *sc; 178 uint8_t *p; 179 uint64_t value; 180 181 assert(baridx == 0); 182 183 sc = pi->pi_arg; 184 185 186 if (offset + size > DMEMSZ) { 187 printf("fbuf: read too large, offset %ld size %d\n", 188 offset, size); 189 return (0); 190 } 191 192 p = (uint8_t *)&sc->memregs + offset; 193 value = 0; 194 switch (size) { 195 case 1: 196 value = *p; 197 break; 198 case 2: 199 value = *(uint16_t *)p; 200 break; 201 case 4: 202 value = *(uint32_t *)p; 203 break; 204 case 8: 205 value = *(uint64_t *)p; 206 break; 207 default: 208 printf("fbuf: read unknown size %d\n", size); 209 break; 210 } 211 212 DPRINTF(DEBUG_VERBOSE, 213 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx", 214 offset, size, value)); 215 216 return (value); 217 } 218 219 static void 220 pci_fbuf_baraddr(struct pci_devinst *pi, int baridx, int enabled, 221 uint64_t address) 222 { 223 struct pci_fbuf_softc *sc; 224 int prot; 225 226 if (baridx != 1) 227 return; 228 229 sc = pi->pi_arg; 230 if (!enabled) { 231 if (vm_munmap_memseg(pi->pi_vmctx, sc->fbaddr, FB_SIZE) != 0) 232 EPRINTLN("pci_fbuf: munmap_memseg failed"); 233 sc->fbaddr = 0; 234 } else { 235 prot = PROT_READ | PROT_WRITE; 236 if (vm_mmap_memseg(pi->pi_vmctx, address, VM_FRAMEBUFFER, 0, 237 FB_SIZE, prot) != 0) 238 EPRINTLN("pci_fbuf: mmap_memseg failed"); 239 sc->fbaddr = address; 240 } 241 } 242 243 244 static int 245 pci_fbuf_parse_config(struct pci_fbuf_softc *sc, nvlist_t *nvl) 246 { 247 const char *value; 248 char *cp; 249 250 sc->rfb_wait = get_config_bool_node_default(nvl, "wait", false); 251 252 /* Prefer "rfb" to "tcp". */ 253 value = get_config_value_node(nvl, "rfb"); 254 if (value == NULL) 255 value = get_config_value_node(nvl, "tcp"); 256 if (value != NULL) { 257 /* 258 * IPv4 -- host-ip:port 259 * IPv6 -- [host-ip%zone]:port 260 * XXX for now port is mandatory for IPv4. 261 */ 262 if (value[0] == '[') { 263 cp = strchr(value + 1, ']'); 264 if (cp == NULL || cp == value + 1) { 265 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", 266 value); 267 return (-1); 268 } 269 sc->rfb_host = strndup(value + 1, cp - (value + 1)); 270 cp++; 271 if (*cp == ':') { 272 cp++; 273 if (*cp == '\0') { 274 EPRINTLN( 275 "fbuf: Missing port number: \"%s\"", 276 value); 277 return (-1); 278 } 279 sc->rfb_port = atoi(cp); 280 } else if (*cp != '\0') { 281 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", 282 value); 283 return (-1); 284 } 285 } else { 286 cp = strchr(value, ':'); 287 if (cp == NULL) { 288 sc->rfb_port = atoi(value); 289 } else { 290 sc->rfb_host = strndup(value, cp - value); 291 cp++; 292 if (*cp == '\0') { 293 EPRINTLN( 294 "fbuf: Missing port number: \"%s\"", 295 value); 296 return (-1); 297 } 298 sc->rfb_port = atoi(cp); 299 } 300 } 301 } 302 303 #ifndef __FreeBSD__ 304 sc->rfb_unix = get_config_value_node(nvl, "unix"); 305 #endif 306 307 value = get_config_value_node(nvl, "vga"); 308 if (value != NULL) { 309 if (strcmp(value, "off") == 0) { 310 sc->vga_enabled = 0; 311 } else if (strcmp(value, "io") == 0) { 312 sc->vga_enabled = 1; 313 sc->vga_full = 0; 314 } else if (strcmp(value, "on") == 0) { 315 sc->vga_enabled = 1; 316 sc->vga_full = 1; 317 } else { 318 EPRINTLN("fbuf: Invalid vga setting: \"%s\"", value); 319 return (-1); 320 } 321 } 322 323 value = get_config_value_node(nvl, "w"); 324 if (value != NULL) { 325 sc->memregs.width = atoi(value); 326 if (sc->memregs.width > COLS_MAX) { 327 EPRINTLN("fbuf: width %d too large", sc->memregs.width); 328 return (-1); 329 } 330 if (sc->memregs.width == 0) 331 sc->memregs.width = 1920; 332 } 333 334 value = get_config_value_node(nvl, "h"); 335 if (value != NULL) { 336 sc->memregs.height = atoi(value); 337 if (sc->memregs.height > ROWS_MAX) { 338 EPRINTLN("fbuf: height %d too large", 339 sc->memregs.height); 340 return (-1); 341 } 342 if (sc->memregs.height == 0) 343 sc->memregs.height = 1080; 344 } 345 346 value = get_config_value_node(nvl, "password"); 347 if (value != NULL) 348 sc->rfb_password = strdup(value); 349 350 return (0); 351 } 352 353 354 extern void vga_render(struct bhyvegc *gc, void *arg); 355 356 static void 357 pci_fbuf_render(struct bhyvegc *gc, void *arg) 358 { 359 struct pci_fbuf_softc *sc; 360 361 sc = arg; 362 363 if (sc->vga_full && sc->gc_image->vgamode) { 364 /* TODO: mode switching to vga and vesa should use the special 365 * EFI-bhyve protocol port. 366 */ 367 vga_render(gc, sc->vgasc); 368 return; 369 } 370 if (sc->gc_width != sc->memregs.width || 371 sc->gc_height != sc->memregs.height) { 372 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 373 sc->gc_width = sc->memregs.width; 374 sc->gc_height = sc->memregs.height; 375 } 376 } 377 378 static int 379 pci_fbuf_init(struct pci_devinst *pi, nvlist_t *nvl) 380 { 381 int error; 382 struct pci_fbuf_softc *sc; 383 384 if (fbuf_sc != NULL) { 385 EPRINTLN("Only one frame buffer device is allowed."); 386 return (-1); 387 } 388 389 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 390 391 pi->pi_arg = sc; 392 393 /* initialize config space */ 394 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 395 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 396 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 397 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 398 399 sc->fb_base = vm_create_devmem(pi->pi_vmctx, VM_FRAMEBUFFER, 400 "framebuffer", FB_SIZE); 401 if (sc->fb_base == MAP_FAILED) { 402 error = -1; 403 goto done; 404 } 405 406 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 407 assert(error == 0); 408 409 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 410 assert(error == 0); 411 412 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 413 assert(error == 0); 414 415 sc->memregs.fbsize = FB_SIZE; 416 sc->memregs.width = COLS_DEFAULT; 417 sc->memregs.height = ROWS_DEFAULT; 418 sc->memregs.depth = 32; 419 420 sc->vga_enabled = 1; 421 sc->vga_full = 0; 422 423 sc->fsc_pi = pi; 424 425 error = pci_fbuf_parse_config(sc, nvl); 426 if (error != 0) 427 goto done; 428 429 /* XXX until VGA rendering is enabled */ 430 if (sc->vga_full != 0) { 431 EPRINTLN("pci_fbuf: VGA rendering not enabled"); 432 #ifndef __FreeBSD__ 433 errno = ENOTSUP; 434 error = -1; 435 #endif 436 goto done; 437 } 438 439 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]", 440 sc->fb_base, FB_SIZE)); 441 442 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 443 console_fb_register(pci_fbuf_render, sc); 444 445 if (sc->vga_enabled) 446 sc->vgasc = vga_init(!sc->vga_full); 447 sc->gc_image = console_get_image(); 448 449 fbuf_sc = sc; 450 451 memset((void *)sc->fb_base, 0, FB_SIZE); 452 453 #ifdef __FreeBSD__ 454 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 455 #else 456 char *name; 457 458 (void) asprintf(&name, "%s (bhyve)", get_config_value("name")); 459 460 if (sc->rfb_unix != NULL) { 461 error = rfb_init((char *)sc->rfb_unix, -1, sc->rfb_wait, 462 sc->rfb_password, name != NULL ? name : "bhyve"); 463 } else { 464 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, 465 sc->rfb_password, name != NULL ? name : "bhyve"); 466 } 467 if (error != 0) 468 free(name); 469 #endif 470 done: 471 if (error) 472 free(sc); 473 474 return (error); 475 } 476 477 static const struct pci_devemu pci_fbuf = { 478 .pe_emu = "fbuf", 479 .pe_init = pci_fbuf_init, 480 .pe_barwrite = pci_fbuf_write, 481 .pe_barread = pci_fbuf_read, 482 .pe_baraddr = pci_fbuf_baraddr, 483 }; 484 PCI_EMUL_SET(pci_fbuf); 485