1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2015 Nahanni Systems, Inc. 5 * Copyright 2018 Joyent, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/types.h> 36 #include <sys/mman.h> 37 38 #include <machine/vmm.h> 39 #include <vmmapi.h> 40 41 #include <stdio.h> 42 #include <stdlib.h> 43 #include <string.h> 44 45 #include <errno.h> 46 #include <unistd.h> 47 48 #include "bhyvegc.h" 49 #include "bhyverun.h" 50 #include "console.h" 51 #include "inout.h" 52 #include "pci_emul.h" 53 #include "rfb.h" 54 #include "vga.h" 55 56 /* 57 * bhyve Framebuffer device emulation. 58 * BAR0 points to the current mode information. 59 * BAR1 is the 32-bit framebuffer address. 60 * 61 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 62 */ 63 64 static int fbuf_debug = 1; 65 #define DEBUG_INFO 1 66 #define DEBUG_VERBOSE 4 67 #define DPRINTF(level, params) if (level <= fbuf_debug) printf params 68 69 70 #define KB (1024UL) 71 #define MB (1024 * 1024UL) 72 73 #define DMEMSZ 128 74 75 #define FB_SIZE (16*MB) 76 77 #define COLS_MAX 1920 78 #define ROWS_MAX 1200 79 80 #define COLS_DEFAULT 1024 81 #define ROWS_DEFAULT 768 82 83 #define COLS_MIN 640 84 #define ROWS_MIN 480 85 86 struct pci_fbuf_softc { 87 struct pci_devinst *fsc_pi; 88 struct { 89 uint32_t fbsize; 90 uint16_t width; 91 uint16_t height; 92 uint16_t depth; 93 uint16_t refreshrate; 94 uint8_t reserved[116]; 95 } __packed memregs; 96 97 /* rfb server */ 98 char *rfb_host; 99 char *rfb_password; 100 int rfb_port; 101 #ifndef __FreeBSD__ 102 char *rfb_unix; 103 #endif 104 int rfb_wait; 105 int vga_enabled; 106 int vga_full; 107 108 uint32_t fbaddr; 109 char *fb_base; 110 uint16_t gc_width; 111 uint16_t gc_height; 112 void *vgasc; 113 struct bhyvegc_image *gc_image; 114 }; 115 116 static struct pci_fbuf_softc *fbuf_sc; 117 118 #define PCI_FBUF_MSI_MSGS 4 119 120 static void 121 pci_fbuf_usage(char *opt) 122 { 123 124 fprintf(stderr, "Invalid fbuf emulation option \"%s\"\r\n", opt); 125 fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port" 126 "{,w=width}{,h=height}\r\n"); 127 } 128 129 static void 130 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 131 int baridx, uint64_t offset, int size, uint64_t value) 132 { 133 struct pci_fbuf_softc *sc; 134 uint8_t *p; 135 136 assert(baridx == 0); 137 138 sc = pi->pi_arg; 139 140 DPRINTF(DEBUG_VERBOSE, 141 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx\n", 142 offset, size, value)); 143 144 if (offset + size > DMEMSZ) { 145 printf("fbuf: write too large, offset %ld size %d\n", 146 offset, size); 147 return; 148 } 149 150 p = (uint8_t *)&sc->memregs + offset; 151 152 switch (size) { 153 case 1: 154 *p = value; 155 break; 156 case 2: 157 *(uint16_t *)p = value; 158 break; 159 case 4: 160 *(uint32_t *)p = value; 161 break; 162 case 8: 163 *(uint64_t *)p = value; 164 break; 165 default: 166 printf("fbuf: write unknown size %d\n", size); 167 break; 168 } 169 170 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 171 sc->memregs.height == 0) { 172 DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n")); 173 sc->gc_image->vgamode = 1; 174 sc->gc_width = 0; 175 sc->gc_height = 0; 176 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 177 sc->memregs.height != 0) { 178 DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n")); 179 sc->gc_image->vgamode = 0; 180 } 181 } 182 183 uint64_t 184 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 185 int baridx, uint64_t offset, int size) 186 { 187 struct pci_fbuf_softc *sc; 188 uint8_t *p; 189 uint64_t value; 190 191 assert(baridx == 0); 192 193 sc = pi->pi_arg; 194 195 196 if (offset + size > DMEMSZ) { 197 printf("fbuf: read too large, offset %ld size %d\n", 198 offset, size); 199 return (0); 200 } 201 202 p = (uint8_t *)&sc->memregs + offset; 203 value = 0; 204 switch (size) { 205 case 1: 206 value = *p; 207 break; 208 case 2: 209 value = *(uint16_t *)p; 210 break; 211 case 4: 212 value = *(uint32_t *)p; 213 break; 214 case 8: 215 value = *(uint64_t *)p; 216 break; 217 default: 218 printf("fbuf: read unknown size %d\n", size); 219 break; 220 } 221 222 DPRINTF(DEBUG_VERBOSE, 223 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx\n", 224 offset, size, value)); 225 226 return (value); 227 } 228 229 static int 230 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts) 231 { 232 char *uopts, *xopts, *config; 233 char *tmpstr; 234 int ret; 235 236 ret = 0; 237 uopts = strdup(opts); 238 for (xopts = strtok(uopts, ","); 239 xopts != NULL; 240 xopts = strtok(NULL, ",")) { 241 if (strcmp(xopts, "wait") == 0) { 242 sc->rfb_wait = 1; 243 continue; 244 } 245 246 if ((config = strchr(xopts, '=')) == NULL) { 247 pci_fbuf_usage(xopts); 248 ret = -1; 249 goto done; 250 } 251 252 *config++ = '\0'; 253 254 DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n", 255 xopts, config)); 256 257 if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) { 258 /* 259 * IPv4 -- host-ip:port 260 * IPv6 -- [host-ip%zone]:port 261 * XXX for now port is mandatory. 262 */ 263 tmpstr = strsep(&config, "]"); 264 if (config) { 265 if (tmpstr[0] == '[') 266 tmpstr++; 267 sc->rfb_host = tmpstr; 268 if (config[0] == ':') 269 config++; 270 else { 271 pci_fbuf_usage(xopts); 272 ret = -1; 273 goto done; 274 } 275 sc->rfb_port = atoi(config); 276 } else { 277 config = tmpstr; 278 tmpstr = strsep(&config, ":"); 279 if (!config) 280 sc->rfb_port = atoi(tmpstr); 281 else { 282 sc->rfb_port = atoi(config); 283 sc->rfb_host = tmpstr; 284 } 285 } 286 #ifndef __FreeBSD__ 287 } else if (!strcmp(xopts, "unix")) { 288 sc->rfb_unix = config; 289 #endif 290 } else if (!strcmp(xopts, "vga")) { 291 if (!strcmp(config, "off")) { 292 sc->vga_enabled = 0; 293 } else if (!strcmp(config, "io")) { 294 sc->vga_enabled = 1; 295 sc->vga_full = 0; 296 } else if (!strcmp(config, "on")) { 297 sc->vga_enabled = 1; 298 sc->vga_full = 1; 299 } else { 300 pci_fbuf_usage(xopts); 301 ret = -1; 302 goto done; 303 } 304 } else if (!strcmp(xopts, "w")) { 305 sc->memregs.width = atoi(config); 306 if (sc->memregs.width > COLS_MAX) { 307 pci_fbuf_usage(xopts); 308 ret = -1; 309 goto done; 310 } else if (sc->memregs.width == 0) 311 sc->memregs.width = 1920; 312 } else if (!strcmp(xopts, "h")) { 313 sc->memregs.height = atoi(config); 314 if (sc->memregs.height > ROWS_MAX) { 315 pci_fbuf_usage(xopts); 316 ret = -1; 317 goto done; 318 } else if (sc->memregs.height == 0) 319 sc->memregs.height = 1080; 320 } else if (!strcmp(xopts, "password")) { 321 sc->rfb_password = config; 322 } else { 323 pci_fbuf_usage(xopts); 324 ret = -1; 325 goto done; 326 } 327 } 328 329 done: 330 return (ret); 331 } 332 333 334 extern void vga_render(struct bhyvegc *gc, void *arg); 335 336 void 337 pci_fbuf_render(struct bhyvegc *gc, void *arg) 338 { 339 struct pci_fbuf_softc *sc; 340 341 sc = arg; 342 343 if (sc->vga_full && sc->gc_image->vgamode) { 344 /* TODO: mode switching to vga and vesa should use the special 345 * EFI-bhyve protocol port. 346 */ 347 vga_render(gc, sc->vgasc); 348 return; 349 } 350 if (sc->gc_width != sc->memregs.width || 351 sc->gc_height != sc->memregs.height) { 352 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 353 sc->gc_width = sc->memregs.width; 354 sc->gc_height = sc->memregs.height; 355 } 356 357 return; 358 } 359 360 static int 361 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) 362 { 363 int error, prot; 364 struct pci_fbuf_softc *sc; 365 366 if (fbuf_sc != NULL) { 367 fprintf(stderr, "Only one frame buffer device is allowed.\n"); 368 return (-1); 369 } 370 371 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 372 373 pi->pi_arg = sc; 374 375 /* initialize config space */ 376 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 377 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 378 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 379 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 380 381 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 382 assert(error == 0); 383 384 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 385 assert(error == 0); 386 387 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 388 assert(error == 0); 389 390 sc->fbaddr = pi->pi_bar[1].addr; 391 sc->memregs.fbsize = FB_SIZE; 392 sc->memregs.width = COLS_DEFAULT; 393 sc->memregs.height = ROWS_DEFAULT; 394 sc->memregs.depth = 32; 395 396 sc->vga_enabled = 1; 397 sc->vga_full = 0; 398 399 sc->fsc_pi = pi; 400 401 error = pci_fbuf_parse_opts(sc, opts); 402 if (error != 0) 403 goto done; 404 405 /* XXX until VGA rendering is enabled */ 406 if (sc->vga_full != 0) { 407 fprintf(stderr, "pci_fbuf: VGA rendering not enabled"); 408 goto done; 409 } 410 411 sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE); 412 if (sc->fb_base == MAP_FAILED) { 413 error = -1; 414 goto done; 415 } 416 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n", 417 sc->fb_base, FB_SIZE)); 418 419 /* 420 * Map the framebuffer into the guest address space. 421 * XXX This may fail if the BAR is different than a prior 422 * run. In this case flag the error. This will be fixed 423 * when a change_memseg api is available. 424 */ 425 prot = PROT_READ | PROT_WRITE; 426 if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) { 427 fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n"); 428 error = -1; 429 goto done; 430 } 431 432 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 433 console_fb_register(pci_fbuf_render, sc); 434 435 if (sc->vga_enabled) 436 sc->vgasc = vga_init(!sc->vga_full); 437 sc->gc_image = console_get_image(); 438 439 fbuf_sc = sc; 440 441 memset((void *)sc->fb_base, 0, FB_SIZE); 442 443 #ifdef __FreeBSD__ 444 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 445 #else 446 if (sc->rfb_unix != NULL) { 447 error = rfb_init_unix(sc->rfb_unix, sc->rfb_wait, 448 sc->rfb_password); 449 } else { 450 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, 451 sc->rfb_password); 452 } 453 #endif 454 done: 455 if (error) 456 free(sc); 457 458 return (error); 459 } 460 461 struct pci_devemu pci_fbuf = { 462 .pe_emu = "fbuf", 463 .pe_init = pci_fbuf_init, 464 .pe_barwrite = pci_fbuf_write, 465 .pe_barread = pci_fbuf_read 466 }; 467 PCI_EMUL_SET(pci_fbuf); 468