1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2015 Nahanni Systems, Inc. 5 * Copyright 2018 Joyent, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/types.h> 36 #include <sys/mman.h> 37 38 #include <machine/vmm.h> 39 #include <vmmapi.h> 40 41 #include <stdio.h> 42 #include <stdlib.h> 43 #include <string.h> 44 45 #include <errno.h> 46 #include <unistd.h> 47 48 #include "bhyvegc.h" 49 #include "bhyverun.h" 50 #include "debug.h" 51 #include "console.h" 52 #include "inout.h" 53 #include "pci_emul.h" 54 #include "rfb.h" 55 #include "vga.h" 56 57 /* 58 * bhyve Framebuffer device emulation. 59 * BAR0 points to the current mode information. 60 * BAR1 is the 32-bit framebuffer address. 61 * 62 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 63 */ 64 65 static int fbuf_debug = 1; 66 #define DEBUG_INFO 1 67 #define DEBUG_VERBOSE 4 68 #define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params 69 70 71 #define KB (1024UL) 72 #define MB (1024 * 1024UL) 73 74 #define DMEMSZ 128 75 76 #define FB_SIZE (16*MB) 77 78 #define COLS_MAX 1920 79 #define ROWS_MAX 1200 80 81 #define COLS_DEFAULT 1024 82 #define ROWS_DEFAULT 768 83 84 #define COLS_MIN 640 85 #define ROWS_MIN 480 86 87 struct pci_fbuf_softc { 88 struct pci_devinst *fsc_pi; 89 struct { 90 uint32_t fbsize; 91 uint16_t width; 92 uint16_t height; 93 uint16_t depth; 94 uint16_t refreshrate; 95 uint8_t reserved[116]; 96 } __packed memregs; 97 98 /* rfb server */ 99 char *rfb_host; 100 char *rfb_password; 101 int rfb_port; 102 #ifndef __FreeBSD__ 103 char *rfb_unix; 104 #endif 105 int rfb_wait; 106 int vga_enabled; 107 int vga_full; 108 109 uint32_t fbaddr; 110 char *fb_base; 111 uint16_t gc_width; 112 uint16_t gc_height; 113 void *vgasc; 114 struct bhyvegc_image *gc_image; 115 }; 116 117 static struct pci_fbuf_softc *fbuf_sc; 118 119 #define PCI_FBUF_MSI_MSGS 4 120 121 static void 122 pci_fbuf_usage(char *opt) 123 { 124 125 EPRINTLN("Invalid fbuf emulation option \"%s\"", opt); 126 EPRINTLN("fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port" 127 "{,w=width}{,h=height}"); 128 } 129 130 static void 131 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 132 int baridx, uint64_t offset, int size, uint64_t value) 133 { 134 struct pci_fbuf_softc *sc; 135 uint8_t *p; 136 137 assert(baridx == 0); 138 139 sc = pi->pi_arg; 140 141 DPRINTF(DEBUG_VERBOSE, 142 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx", 143 offset, size, value)); 144 145 if (offset + size > DMEMSZ) { 146 printf("fbuf: write too large, offset %ld size %d\n", 147 offset, size); 148 return; 149 } 150 151 p = (uint8_t *)&sc->memregs + offset; 152 153 switch (size) { 154 case 1: 155 *p = value; 156 break; 157 case 2: 158 *(uint16_t *)p = value; 159 break; 160 case 4: 161 *(uint32_t *)p = value; 162 break; 163 case 8: 164 *(uint64_t *)p = value; 165 break; 166 default: 167 printf("fbuf: write unknown size %d\n", size); 168 break; 169 } 170 171 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 172 sc->memregs.height == 0) { 173 DPRINTF(DEBUG_INFO, ("switching to VGA mode")); 174 sc->gc_image->vgamode = 1; 175 sc->gc_width = 0; 176 sc->gc_height = 0; 177 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 178 sc->memregs.height != 0) { 179 DPRINTF(DEBUG_INFO, ("switching to VESA mode")); 180 sc->gc_image->vgamode = 0; 181 } 182 } 183 184 uint64_t 185 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 186 int baridx, uint64_t offset, int size) 187 { 188 struct pci_fbuf_softc *sc; 189 uint8_t *p; 190 uint64_t value; 191 192 assert(baridx == 0); 193 194 sc = pi->pi_arg; 195 196 197 if (offset + size > DMEMSZ) { 198 printf("fbuf: read too large, offset %ld size %d\n", 199 offset, size); 200 return (0); 201 } 202 203 p = (uint8_t *)&sc->memregs + offset; 204 value = 0; 205 switch (size) { 206 case 1: 207 value = *p; 208 break; 209 case 2: 210 value = *(uint16_t *)p; 211 break; 212 case 4: 213 value = *(uint32_t *)p; 214 break; 215 case 8: 216 value = *(uint64_t *)p; 217 break; 218 default: 219 printf("fbuf: read unknown size %d\n", size); 220 break; 221 } 222 223 DPRINTF(DEBUG_VERBOSE, 224 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx", 225 offset, size, value)); 226 227 return (value); 228 } 229 230 static int 231 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts) 232 { 233 char *uopts, *uoptsbak, *xopts, *config; 234 char *tmpstr; 235 int ret; 236 237 ret = 0; 238 uoptsbak = uopts = strdup(opts); 239 while ((xopts = strsep(&uopts, ",")) != NULL) { 240 if (strcmp(xopts, "wait") == 0) { 241 sc->rfb_wait = 1; 242 continue; 243 } 244 245 if ((config = strchr(xopts, '=')) == NULL) { 246 pci_fbuf_usage(xopts); 247 ret = -1; 248 goto done; 249 } 250 251 *config++ = '\0'; 252 253 DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s", 254 xopts, config)); 255 256 if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) { 257 /* 258 * IPv4 -- host-ip:port 259 * IPv6 -- [host-ip%zone]:port 260 * XXX for now port is mandatory. 261 */ 262 tmpstr = strsep(&config, "]"); 263 if (config) { 264 if (tmpstr[0] == '[') 265 tmpstr++; 266 sc->rfb_host = strdup(tmpstr); 267 if (config[0] == ':') 268 config++; 269 else { 270 pci_fbuf_usage(xopts); 271 ret = -1; 272 goto done; 273 } 274 sc->rfb_port = atoi(config); 275 } else { 276 config = tmpstr; 277 tmpstr = strsep(&config, ":"); 278 if (!config) 279 sc->rfb_port = atoi(tmpstr); 280 else { 281 sc->rfb_port = atoi(config); 282 sc->rfb_host = strdup(tmpstr); 283 } 284 } 285 #ifndef __FreeBSD__ 286 } else if (!strcmp(xopts, "unix")) { 287 sc->rfb_unix = strdup(config); 288 #endif 289 } else if (!strcmp(xopts, "vga")) { 290 if (!strcmp(config, "off")) { 291 sc->vga_enabled = 0; 292 } else if (!strcmp(config, "io")) { 293 sc->vga_enabled = 1; 294 sc->vga_full = 0; 295 } else if (!strcmp(config, "on")) { 296 sc->vga_enabled = 1; 297 sc->vga_full = 1; 298 } else { 299 pci_fbuf_usage(xopts); 300 ret = -1; 301 goto done; 302 } 303 } else if (!strcmp(xopts, "w")) { 304 sc->memregs.width = atoi(config); 305 if (sc->memregs.width > COLS_MAX) { 306 pci_fbuf_usage(xopts); 307 ret = -1; 308 goto done; 309 } else if (sc->memregs.width == 0) 310 sc->memregs.width = 1920; 311 } else if (!strcmp(xopts, "h")) { 312 sc->memregs.height = atoi(config); 313 if (sc->memregs.height > ROWS_MAX) { 314 pci_fbuf_usage(xopts); 315 ret = -1; 316 goto done; 317 } else if (sc->memregs.height == 0) 318 sc->memregs.height = 1080; 319 } else if (!strcmp(xopts, "password")) { 320 sc->rfb_password = strdup(config); 321 } else { 322 pci_fbuf_usage(xopts); 323 ret = -1; 324 goto done; 325 } 326 } 327 328 done: 329 free(uoptsbak); 330 return (ret); 331 } 332 333 334 extern void vga_render(struct bhyvegc *gc, void *arg); 335 336 void 337 pci_fbuf_render(struct bhyvegc *gc, void *arg) 338 { 339 struct pci_fbuf_softc *sc; 340 341 sc = arg; 342 343 if (sc->vga_full && sc->gc_image->vgamode) { 344 /* TODO: mode switching to vga and vesa should use the special 345 * EFI-bhyve protocol port. 346 */ 347 vga_render(gc, sc->vgasc); 348 return; 349 } 350 if (sc->gc_width != sc->memregs.width || 351 sc->gc_height != sc->memregs.height) { 352 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 353 sc->gc_width = sc->memregs.width; 354 sc->gc_height = sc->memregs.height; 355 } 356 357 return; 358 } 359 360 static int 361 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) 362 { 363 int error, prot; 364 struct pci_fbuf_softc *sc; 365 366 if (fbuf_sc != NULL) { 367 EPRINTLN("Only one frame buffer device is allowed."); 368 return (-1); 369 } 370 371 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 372 373 pi->pi_arg = sc; 374 375 /* initialize config space */ 376 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 377 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 378 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 379 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 380 381 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 382 assert(error == 0); 383 384 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 385 assert(error == 0); 386 387 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 388 assert(error == 0); 389 390 sc->fbaddr = pi->pi_bar[1].addr; 391 sc->memregs.fbsize = FB_SIZE; 392 sc->memregs.width = COLS_DEFAULT; 393 sc->memregs.height = ROWS_DEFAULT; 394 sc->memregs.depth = 32; 395 396 sc->vga_enabled = 1; 397 sc->vga_full = 0; 398 399 sc->fsc_pi = pi; 400 401 error = pci_fbuf_parse_opts(sc, opts); 402 if (error != 0) 403 goto done; 404 405 /* XXX until VGA rendering is enabled */ 406 if (sc->vga_full != 0) { 407 EPRINTLN("pci_fbuf: VGA rendering not enabled"); 408 goto done; 409 } 410 411 sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE); 412 if (sc->fb_base == MAP_FAILED) { 413 error = -1; 414 goto done; 415 } 416 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]", 417 sc->fb_base, FB_SIZE)); 418 419 /* 420 * Map the framebuffer into the guest address space. 421 * XXX This may fail if the BAR is different than a prior 422 * run. In this case flag the error. This will be fixed 423 * when a change_memseg api is available. 424 */ 425 prot = PROT_READ | PROT_WRITE; 426 if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) { 427 EPRINTLN("pci_fbuf: mapseg failed - try deleting VM and restarting"); 428 error = -1; 429 goto done; 430 } 431 432 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 433 console_fb_register(pci_fbuf_render, sc); 434 435 if (sc->vga_enabled) 436 sc->vgasc = vga_init(!sc->vga_full); 437 sc->gc_image = console_get_image(); 438 439 fbuf_sc = sc; 440 441 memset((void *)sc->fb_base, 0, FB_SIZE); 442 443 #ifdef __FreeBSD__ 444 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 445 #else 446 if (sc->rfb_unix != NULL) { 447 error = rfb_init_unix(sc->rfb_unix, sc->rfb_wait, 448 sc->rfb_password); 449 } else { 450 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, 451 sc->rfb_password); 452 } 453 #endif 454 done: 455 if (error) 456 free(sc); 457 458 return (error); 459 } 460 461 struct pci_devemu pci_fbuf = { 462 .pe_emu = "fbuf", 463 .pe_init = pci_fbuf_init, 464 .pe_barwrite = pci_fbuf_write, 465 .pe_barread = pci_fbuf_read 466 }; 467 PCI_EMUL_SET(pci_fbuf); 468