1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2015 Nahanni Systems, Inc. 5 * Copyright 2018 Joyent, Inc. 6 * Copyright 2021 OmniOS Community Edition (OmniOSce) Association. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 32 #include <sys/types.h> 33 #include <sys/mman.h> 34 35 #include <machine/vmm.h> 36 #include <vmmapi.h> 37 38 #include <stdio.h> 39 #include <stdlib.h> 40 #include <string.h> 41 42 #include <errno.h> 43 #include <unistd.h> 44 45 #include "bhyvegc.h" 46 #include "bhyverun.h" 47 #include "config.h" 48 #include "debug.h" 49 #include "console.h" 50 #include "inout.h" 51 #include "pci_emul.h" 52 #include "rfb.h" 53 #include "vga.h" 54 55 /* 56 * bhyve Framebuffer device emulation. 57 * BAR0 points to the current mode information. 58 * BAR1 is the 32-bit framebuffer address. 59 * 60 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 61 */ 62 63 static int fbuf_debug = 1; 64 #define DEBUG_INFO 1 65 #define DEBUG_VERBOSE 4 66 #define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params 67 68 69 #define KB (1024UL) 70 #define MB (1024 * 1024UL) 71 72 #define DMEMSZ 128 73 74 #define FB_SIZE (32*MB) 75 76 #define COLS_MAX 3840 77 #define ROWS_MAX 2160 78 79 #define COLS_DEFAULT 1024 80 #define ROWS_DEFAULT 768 81 82 #define COLS_MIN 640 83 #define ROWS_MIN 480 84 85 struct pci_fbuf_softc { 86 struct pci_devinst *fsc_pi; 87 struct { 88 uint32_t fbsize; 89 uint16_t width; 90 uint16_t height; 91 uint16_t depth; 92 uint16_t refreshrate; 93 uint8_t reserved[116]; 94 } __packed memregs; 95 96 /* rfb server */ 97 char *rfb_host; 98 char *rfb_password; 99 int rfb_port; 100 #ifndef __FreeBSD__ 101 const char *rfb_unix; 102 #endif 103 int rfb_wait; 104 int vga_enabled; 105 int vga_full; 106 107 uint32_t fbaddr; 108 char *fb_base; 109 uint16_t gc_width; 110 uint16_t gc_height; 111 void *vgasc; 112 struct bhyvegc_image *gc_image; 113 }; 114 115 static struct pci_fbuf_softc *fbuf_sc; 116 117 #define PCI_FBUF_MSI_MSGS 4 118 119 static void 120 pci_fbuf_write(struct pci_devinst *pi, int baridx, uint64_t offset, int size, 121 uint64_t value) 122 { 123 struct pci_fbuf_softc *sc; 124 uint8_t *p; 125 126 assert(baridx == 0); 127 128 sc = pi->pi_arg; 129 130 DPRINTF(DEBUG_VERBOSE, 131 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx", 132 offset, size, value)); 133 134 if (offset + size > DMEMSZ) { 135 printf("fbuf: write too large, offset %ld size %d\n", 136 offset, size); 137 return; 138 } 139 140 p = (uint8_t *)&sc->memregs + offset; 141 142 switch (size) { 143 case 1: 144 *p = value; 145 break; 146 case 2: 147 *(uint16_t *)p = value; 148 break; 149 case 4: 150 *(uint32_t *)p = value; 151 break; 152 case 8: 153 *(uint64_t *)p = value; 154 break; 155 default: 156 printf("fbuf: write unknown size %d\n", size); 157 break; 158 } 159 160 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 161 sc->memregs.height == 0) { 162 DPRINTF(DEBUG_INFO, ("switching to VGA mode")); 163 sc->gc_image->vgamode = 1; 164 sc->gc_width = 0; 165 sc->gc_height = 0; 166 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 167 sc->memregs.height != 0) { 168 DPRINTF(DEBUG_INFO, ("switching to VESA mode")); 169 sc->gc_image->vgamode = 0; 170 } 171 } 172 173 static uint64_t 174 pci_fbuf_read(struct pci_devinst *pi, int baridx, uint64_t offset, int size) 175 { 176 struct pci_fbuf_softc *sc; 177 uint8_t *p; 178 uint64_t value; 179 180 assert(baridx == 0); 181 182 sc = pi->pi_arg; 183 184 185 if (offset + size > DMEMSZ) { 186 printf("fbuf: read too large, offset %ld size %d\n", 187 offset, size); 188 return (0); 189 } 190 191 p = (uint8_t *)&sc->memregs + offset; 192 value = 0; 193 switch (size) { 194 case 1: 195 value = *p; 196 break; 197 case 2: 198 value = *(uint16_t *)p; 199 break; 200 case 4: 201 value = *(uint32_t *)p; 202 break; 203 case 8: 204 value = *(uint64_t *)p; 205 break; 206 default: 207 printf("fbuf: read unknown size %d\n", size); 208 break; 209 } 210 211 DPRINTF(DEBUG_VERBOSE, 212 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx", 213 offset, size, value)); 214 215 return (value); 216 } 217 218 static void 219 pci_fbuf_baraddr(struct pci_devinst *pi, int baridx, int enabled, 220 uint64_t address) 221 { 222 struct pci_fbuf_softc *sc; 223 int prot; 224 225 if (baridx != 1) 226 return; 227 228 sc = pi->pi_arg; 229 if (!enabled) { 230 if (vm_munmap_memseg(pi->pi_vmctx, sc->fbaddr, FB_SIZE) != 0) 231 EPRINTLN("pci_fbuf: munmap_memseg failed"); 232 sc->fbaddr = 0; 233 } else { 234 prot = PROT_READ | PROT_WRITE; 235 if (vm_mmap_memseg(pi->pi_vmctx, address, VM_FRAMEBUFFER, 0, 236 FB_SIZE, prot) != 0) 237 EPRINTLN("pci_fbuf: mmap_memseg failed"); 238 else 239 sc->fbaddr = address; 240 } 241 } 242 243 244 static int 245 pci_fbuf_parse_config(struct pci_fbuf_softc *sc, nvlist_t *nvl) 246 { 247 const char *value; 248 char *cp; 249 250 sc->rfb_wait = get_config_bool_node_default(nvl, "wait", false); 251 252 /* Prefer "rfb" to "tcp". */ 253 value = get_config_value_node(nvl, "rfb"); 254 if (value == NULL) 255 value = get_config_value_node(nvl, "tcp"); 256 if (value != NULL) { 257 /* 258 * IPv4 -- host-ip:port 259 * IPv6 -- [host-ip%zone]:port 260 * XXX for now port is mandatory for IPv4. 261 */ 262 if (value[0] == '[') { 263 cp = strchr(value + 1, ']'); 264 if (cp == NULL || cp == value + 1) { 265 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", 266 value); 267 return (-1); 268 } 269 sc->rfb_host = strndup(value + 1, cp - (value + 1)); 270 cp++; 271 if (*cp == ':') { 272 cp++; 273 if (*cp == '\0') { 274 EPRINTLN( 275 "fbuf: Missing port number: \"%s\"", 276 value); 277 return (-1); 278 } 279 sc->rfb_port = atoi(cp); 280 } else if (*cp != '\0') { 281 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", 282 value); 283 return (-1); 284 } 285 } else { 286 cp = strchr(value, ':'); 287 if (cp == NULL) { 288 sc->rfb_port = atoi(value); 289 } else { 290 sc->rfb_host = strndup(value, cp - value); 291 cp++; 292 if (*cp == '\0') { 293 EPRINTLN( 294 "fbuf: Missing port number: \"%s\"", 295 value); 296 return (-1); 297 } 298 sc->rfb_port = atoi(cp); 299 } 300 } 301 } 302 303 #ifndef __FreeBSD__ 304 sc->rfb_unix = get_config_value_node(nvl, "unix"); 305 #endif 306 307 value = get_config_value_node(nvl, "vga"); 308 if (value != NULL) { 309 if (strcmp(value, "off") == 0) { 310 sc->vga_enabled = 0; 311 } else if (strcmp(value, "io") == 0) { 312 sc->vga_enabled = 1; 313 sc->vga_full = 0; 314 } else if (strcmp(value, "on") == 0) { 315 sc->vga_enabled = 1; 316 sc->vga_full = 1; 317 } else { 318 EPRINTLN("fbuf: Invalid vga setting: \"%s\"", value); 319 return (-1); 320 } 321 } 322 323 value = get_config_value_node(nvl, "w"); 324 if (value != NULL) 325 sc->memregs.width = strtol(value, NULL, 10); 326 327 value = get_config_value_node(nvl, "h"); 328 if (value != NULL) 329 sc->memregs.height = strtol(value, NULL, 10); 330 331 if (sc->memregs.width > COLS_MAX || 332 sc->memregs.height > ROWS_MAX) { 333 EPRINTLN("fbuf: max resolution is %ux%u", COLS_MAX, ROWS_MAX); 334 return (-1); 335 } 336 if (sc->memregs.width < COLS_MIN || 337 sc->memregs.height < ROWS_MIN) { 338 EPRINTLN("fbuf: minimum resolution is %ux%u", 339 COLS_MIN, ROWS_MIN); 340 return (-1); 341 } 342 343 value = get_config_value_node(nvl, "password"); 344 if (value != NULL) 345 sc->rfb_password = strdup(value); 346 347 return (0); 348 } 349 350 351 extern void vga_render(struct bhyvegc *gc, void *arg); 352 353 static void 354 pci_fbuf_render(struct bhyvegc *gc, void *arg) 355 { 356 struct pci_fbuf_softc *sc; 357 358 sc = arg; 359 360 if (sc->vga_full && sc->gc_image->vgamode) { 361 /* TODO: mode switching to vga and vesa should use the special 362 * EFI-bhyve protocol port. 363 */ 364 vga_render(gc, sc->vgasc); 365 return; 366 } 367 if (sc->gc_width != sc->memregs.width || 368 sc->gc_height != sc->memregs.height) { 369 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 370 sc->gc_width = sc->memregs.width; 371 sc->gc_height = sc->memregs.height; 372 } 373 } 374 375 static int 376 pci_fbuf_init(struct pci_devinst *pi, nvlist_t *nvl) 377 { 378 int error; 379 struct pci_fbuf_softc *sc; 380 381 if (fbuf_sc != NULL) { 382 EPRINTLN("Only one frame buffer device is allowed."); 383 return (-1); 384 } 385 386 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 387 388 pi->pi_arg = sc; 389 390 /* initialize config space */ 391 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 392 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 393 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 394 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 395 396 sc->fb_base = vm_create_devmem(pi->pi_vmctx, VM_FRAMEBUFFER, 397 "framebuffer", FB_SIZE); 398 if (sc->fb_base == MAP_FAILED) { 399 error = -1; 400 goto done; 401 } 402 403 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 404 assert(error == 0); 405 406 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 407 assert(error == 0); 408 409 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 410 assert(error == 0); 411 412 sc->memregs.fbsize = FB_SIZE; 413 sc->memregs.width = COLS_DEFAULT; 414 sc->memregs.height = ROWS_DEFAULT; 415 sc->memregs.depth = 32; 416 417 sc->vga_enabled = 1; 418 sc->vga_full = 0; 419 420 sc->fsc_pi = pi; 421 422 error = pci_fbuf_parse_config(sc, nvl); 423 if (error != 0) 424 goto done; 425 426 /* XXX until VGA rendering is enabled */ 427 if (sc->vga_full != 0) { 428 EPRINTLN("pci_fbuf: VGA rendering not enabled"); 429 #ifndef __FreeBSD__ 430 errno = ENOTSUP; 431 error = -1; 432 #endif 433 goto done; 434 } 435 436 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]", 437 sc->fb_base, FB_SIZE)); 438 439 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 440 console_fb_register(pci_fbuf_render, sc); 441 442 if (sc->vga_enabled) 443 sc->vgasc = vga_init(!sc->vga_full); 444 sc->gc_image = console_get_image(); 445 446 fbuf_sc = sc; 447 448 memset((void *)sc->fb_base, 0, FB_SIZE); 449 450 #ifdef __FreeBSD__ 451 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 452 #else 453 char *name; 454 455 (void) asprintf(&name, "%s (bhyve)", get_config_value("name")); 456 457 if (sc->rfb_unix != NULL) { 458 error = rfb_init((char *)sc->rfb_unix, -1, sc->rfb_wait, 459 sc->rfb_password, name != NULL ? name : "bhyve"); 460 } else { 461 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, 462 sc->rfb_password, name != NULL ? name : "bhyve"); 463 } 464 if (error != 0) 465 free(name); 466 #endif 467 done: 468 if (error) 469 free(sc); 470 471 return (error); 472 } 473 474 static const struct pci_devemu pci_fbuf = { 475 .pe_emu = "fbuf", 476 .pe_init = pci_fbuf_init, 477 .pe_barwrite = pci_fbuf_write, 478 .pe_barread = pci_fbuf_read, 479 .pe_baraddr = pci_fbuf_baraddr, 480 }; 481 PCI_EMUL_SET(pci_fbuf); 482