1bf21cd93STycho Nightingale /*- 2*32640292SAndy Fiddaman * SPDX-License-Identifier: BSD-2-Clause 34c87aefeSPatrick Mooney * 4bf21cd93STycho Nightingale * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 5bf21cd93STycho Nightingale * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 6bf21cd93STycho Nightingale * All rights reserved. 7bf21cd93STycho Nightingale * 8bf21cd93STycho Nightingale * Redistribution and use in source and binary forms, with or without 9bf21cd93STycho Nightingale * modification, are permitted provided that the following conditions 10bf21cd93STycho Nightingale * are met: 11bf21cd93STycho Nightingale * 1. Redistributions of source code must retain the above copyright 12bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer, 13bf21cd93STycho Nightingale * without modification, immediately at the beginning of the file. 14bf21cd93STycho Nightingale * 2. Redistributions in binary form must reproduce the above copyright 15bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer in the 16bf21cd93STycho Nightingale * documentation and/or other materials provided with the distribution. 17bf21cd93STycho Nightingale * 18bf21cd93STycho Nightingale * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19bf21cd93STycho Nightingale * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20bf21cd93STycho Nightingale * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21bf21cd93STycho Nightingale * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22bf21cd93STycho Nightingale * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23bf21cd93STycho Nightingale * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24bf21cd93STycho Nightingale * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25bf21cd93STycho Nightingale * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26bf21cd93STycho Nightingale * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27bf21cd93STycho Nightingale * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28bf21cd93STycho Nightingale */ 29bf21cd93STycho Nightingale 30bf21cd93STycho Nightingale #ifndef _AHCI_H_ 31bf21cd93STycho Nightingale #define _AHCI_H_ 32bf21cd93STycho Nightingale 33bf21cd93STycho Nightingale /* ATA register defines */ 34bf21cd93STycho Nightingale #define ATA_DATA 0 /* (RW) data */ 35bf21cd93STycho Nightingale 36bf21cd93STycho Nightingale #define ATA_FEATURE 1 /* (W) feature */ 37bf21cd93STycho Nightingale #define ATA_F_DMA 0x01 /* enable DMA */ 38bf21cd93STycho Nightingale #define ATA_F_OVL 0x02 /* enable overlap */ 39bf21cd93STycho Nightingale 40bf21cd93STycho Nightingale #define ATA_COUNT 2 /* (W) sector count */ 41bf21cd93STycho Nightingale 42bf21cd93STycho Nightingale #define ATA_SECTOR 3 /* (RW) sector # */ 43bf21cd93STycho Nightingale #define ATA_CYL_LSB 4 /* (RW) cylinder# LSB */ 44bf21cd93STycho Nightingale #define ATA_CYL_MSB 5 /* (RW) cylinder# MSB */ 45bf21cd93STycho Nightingale #define ATA_DRIVE 6 /* (W) Sector/Drive/Head */ 46bf21cd93STycho Nightingale #define ATA_D_LBA 0x40 /* use LBA addressing */ 47bf21cd93STycho Nightingale #define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */ 48bf21cd93STycho Nightingale 49bf21cd93STycho Nightingale #define ATA_COMMAND 7 /* (W) command */ 50bf21cd93STycho Nightingale 51bf21cd93STycho Nightingale #define ATA_ERROR 8 /* (R) error */ 52bf21cd93STycho Nightingale #define ATA_E_ILI 0x01 /* illegal length */ 53bf21cd93STycho Nightingale #define ATA_E_NM 0x02 /* no media */ 54bf21cd93STycho Nightingale #define ATA_E_ABORT 0x04 /* command aborted */ 55bf21cd93STycho Nightingale #define ATA_E_MCR 0x08 /* media change request */ 56bf21cd93STycho Nightingale #define ATA_E_IDNF 0x10 /* ID not found */ 57bf21cd93STycho Nightingale #define ATA_E_MC 0x20 /* media changed */ 58bf21cd93STycho Nightingale #define ATA_E_UNC 0x40 /* uncorrectable data */ 59bf21cd93STycho Nightingale #define ATA_E_ICRC 0x80 /* UDMA crc error */ 60bf21cd93STycho Nightingale #define ATA_E_ATAPI_SENSE_MASK 0xf0 /* ATAPI sense key mask */ 61bf21cd93STycho Nightingale 62bf21cd93STycho Nightingale #define ATA_IREASON 9 /* (R) interrupt reason */ 63bf21cd93STycho Nightingale #define ATA_I_CMD 0x01 /* cmd (1) | data (0) */ 64bf21cd93STycho Nightingale #define ATA_I_IN 0x02 /* read (1) | write (0) */ 65bf21cd93STycho Nightingale #define ATA_I_RELEASE 0x04 /* released bus (1) */ 66bf21cd93STycho Nightingale #define ATA_I_TAGMASK 0xf8 /* tag mask */ 67bf21cd93STycho Nightingale 68bf21cd93STycho Nightingale #define ATA_STATUS 10 /* (R) status */ 69bf21cd93STycho Nightingale #define ATA_ALTSTAT 11 /* (R) alternate status */ 70bf21cd93STycho Nightingale #define ATA_S_ERROR 0x01 /* error */ 71bf21cd93STycho Nightingale #define ATA_S_INDEX 0x02 /* index */ 72bf21cd93STycho Nightingale #define ATA_S_CORR 0x04 /* data corrected */ 73bf21cd93STycho Nightingale #define ATA_S_DRQ 0x08 /* data request */ 74bf21cd93STycho Nightingale #define ATA_S_DSC 0x10 /* drive seek completed */ 75bf21cd93STycho Nightingale #define ATA_S_SERVICE 0x10 /* drive needs service */ 76bf21cd93STycho Nightingale #define ATA_S_DWF 0x20 /* drive write fault */ 77bf21cd93STycho Nightingale #define ATA_S_DMA 0x20 /* DMA ready */ 78bf21cd93STycho Nightingale #define ATA_S_READY 0x40 /* drive ready */ 79bf21cd93STycho Nightingale #define ATA_S_BUSY 0x80 /* busy */ 80bf21cd93STycho Nightingale 81bf21cd93STycho Nightingale #define ATA_CONTROL 12 /* (W) control */ 82bf21cd93STycho Nightingale #define ATA_A_IDS 0x02 /* disable interrupts */ 83bf21cd93STycho Nightingale #define ATA_A_RESET 0x04 /* RESET controller */ 84bf21cd93STycho Nightingale #define ATA_A_4BIT 0x08 /* 4 head bits */ 85bf21cd93STycho Nightingale #define ATA_A_HOB 0x80 /* High Order Byte enable */ 86bf21cd93STycho Nightingale 87bf21cd93STycho Nightingale /* SATA register defines */ 88bf21cd93STycho Nightingale #define ATA_SSTATUS 13 89bf21cd93STycho Nightingale #define ATA_SS_DET_MASK 0x0000000f 90bf21cd93STycho Nightingale #define ATA_SS_DET_NO_DEVICE 0x00000000 91bf21cd93STycho Nightingale #define ATA_SS_DET_DEV_PRESENT 0x00000001 92bf21cd93STycho Nightingale #define ATA_SS_DET_PHY_ONLINE 0x00000003 93bf21cd93STycho Nightingale #define ATA_SS_DET_PHY_OFFLINE 0x00000004 94bf21cd93STycho Nightingale 95bf21cd93STycho Nightingale #define ATA_SS_SPD_MASK 0x000000f0 96bf21cd93STycho Nightingale #define ATA_SS_SPD_NO_SPEED 0x00000000 97bf21cd93STycho Nightingale #define ATA_SS_SPD_GEN1 0x00000010 98bf21cd93STycho Nightingale #define ATA_SS_SPD_GEN2 0x00000020 994c87aefeSPatrick Mooney #define ATA_SS_SPD_GEN3 0x00000030 100bf21cd93STycho Nightingale 101bf21cd93STycho Nightingale #define ATA_SS_IPM_MASK 0x00000f00 102bf21cd93STycho Nightingale #define ATA_SS_IPM_NO_DEVICE 0x00000000 103bf21cd93STycho Nightingale #define ATA_SS_IPM_ACTIVE 0x00000100 104bf21cd93STycho Nightingale #define ATA_SS_IPM_PARTIAL 0x00000200 105bf21cd93STycho Nightingale #define ATA_SS_IPM_SLUMBER 0x00000600 1064c87aefeSPatrick Mooney #define ATA_SS_IPM_DEVSLEEP 0x00000800 107bf21cd93STycho Nightingale 108bf21cd93STycho Nightingale #define ATA_SERROR 14 109bf21cd93STycho Nightingale #define ATA_SE_DATA_CORRECTED 0x00000001 110bf21cd93STycho Nightingale #define ATA_SE_COMM_CORRECTED 0x00000002 111bf21cd93STycho Nightingale #define ATA_SE_DATA_ERR 0x00000100 112bf21cd93STycho Nightingale #define ATA_SE_COMM_ERR 0x00000200 113bf21cd93STycho Nightingale #define ATA_SE_PROT_ERR 0x00000400 114bf21cd93STycho Nightingale #define ATA_SE_HOST_ERR 0x00000800 115bf21cd93STycho Nightingale #define ATA_SE_PHY_CHANGED 0x00010000 116bf21cd93STycho Nightingale #define ATA_SE_PHY_IERROR 0x00020000 117bf21cd93STycho Nightingale #define ATA_SE_COMM_WAKE 0x00040000 118bf21cd93STycho Nightingale #define ATA_SE_DECODE_ERR 0x00080000 119bf21cd93STycho Nightingale #define ATA_SE_PARITY_ERR 0x00100000 120bf21cd93STycho Nightingale #define ATA_SE_CRC_ERR 0x00200000 121bf21cd93STycho Nightingale #define ATA_SE_HANDSHAKE_ERR 0x00400000 122bf21cd93STycho Nightingale #define ATA_SE_LINKSEQ_ERR 0x00800000 123bf21cd93STycho Nightingale #define ATA_SE_TRANSPORT_ERR 0x01000000 124bf21cd93STycho Nightingale #define ATA_SE_UNKNOWN_FIS 0x02000000 125bf21cd93STycho Nightingale #define ATA_SE_EXCHANGED 0x04000000 126bf21cd93STycho Nightingale 127bf21cd93STycho Nightingale #define ATA_SCONTROL 15 128bf21cd93STycho Nightingale #define ATA_SC_DET_MASK 0x0000000f 129bf21cd93STycho Nightingale #define ATA_SC_DET_IDLE 0x00000000 130bf21cd93STycho Nightingale #define ATA_SC_DET_RESET 0x00000001 131bf21cd93STycho Nightingale #define ATA_SC_DET_DISABLE 0x00000004 132bf21cd93STycho Nightingale 133bf21cd93STycho Nightingale #define ATA_SC_SPD_MASK 0x000000f0 134bf21cd93STycho Nightingale #define ATA_SC_SPD_NO_SPEED 0x00000000 135bf21cd93STycho Nightingale #define ATA_SC_SPD_SPEED_GEN1 0x00000010 136bf21cd93STycho Nightingale #define ATA_SC_SPD_SPEED_GEN2 0x00000020 1374c87aefeSPatrick Mooney #define ATA_SC_SPD_SPEED_GEN3 0x00000030 138bf21cd93STycho Nightingale 139bf21cd93STycho Nightingale #define ATA_SC_IPM_MASK 0x00000f00 140bf21cd93STycho Nightingale #define ATA_SC_IPM_NONE 0x00000000 141bf21cd93STycho Nightingale #define ATA_SC_IPM_DIS_PARTIAL 0x00000100 142bf21cd93STycho Nightingale #define ATA_SC_IPM_DIS_SLUMBER 0x00000200 1434c87aefeSPatrick Mooney #define ATA_SC_IPM_DIS_DEVSLEEP 0x00000400 144bf21cd93STycho Nightingale 145bf21cd93STycho Nightingale #define ATA_SACTIVE 16 146bf21cd93STycho Nightingale 147bf21cd93STycho Nightingale #define AHCI_MAX_PORTS 32 148bf21cd93STycho Nightingale #define AHCI_MAX_SLOTS 32 1494c87aefeSPatrick Mooney #define AHCI_MAX_IRQS 16 150bf21cd93STycho Nightingale 151bf21cd93STycho Nightingale /* SATA AHCI v1.0 register defines */ 152bf21cd93STycho Nightingale #define AHCI_CAP 0x00 153bf21cd93STycho Nightingale #define AHCI_CAP_NPMASK 0x0000001f 154bf21cd93STycho Nightingale #define AHCI_CAP_SXS 0x00000020 155bf21cd93STycho Nightingale #define AHCI_CAP_EMS 0x00000040 156bf21cd93STycho Nightingale #define AHCI_CAP_CCCS 0x00000080 157bf21cd93STycho Nightingale #define AHCI_CAP_NCS 0x00001F00 158bf21cd93STycho Nightingale #define AHCI_CAP_NCS_SHIFT 8 159bf21cd93STycho Nightingale #define AHCI_CAP_PSC 0x00002000 160bf21cd93STycho Nightingale #define AHCI_CAP_SSC 0x00004000 161bf21cd93STycho Nightingale #define AHCI_CAP_PMD 0x00008000 162bf21cd93STycho Nightingale #define AHCI_CAP_FBSS 0x00010000 163bf21cd93STycho Nightingale #define AHCI_CAP_SPM 0x00020000 164bf21cd93STycho Nightingale #define AHCI_CAP_SAM 0x00080000 165bf21cd93STycho Nightingale #define AHCI_CAP_ISS 0x00F00000 166bf21cd93STycho Nightingale #define AHCI_CAP_ISS_SHIFT 20 167bf21cd93STycho Nightingale #define AHCI_CAP_SCLO 0x01000000 168bf21cd93STycho Nightingale #define AHCI_CAP_SAL 0x02000000 169bf21cd93STycho Nightingale #define AHCI_CAP_SALP 0x04000000 170bf21cd93STycho Nightingale #define AHCI_CAP_SSS 0x08000000 171bf21cd93STycho Nightingale #define AHCI_CAP_SMPS 0x10000000 172bf21cd93STycho Nightingale #define AHCI_CAP_SSNTF 0x20000000 173bf21cd93STycho Nightingale #define AHCI_CAP_SNCQ 0x40000000 174bf21cd93STycho Nightingale #define AHCI_CAP_64BIT 0x80000000 175bf21cd93STycho Nightingale 176bf21cd93STycho Nightingale #define AHCI_GHC 0x04 177bf21cd93STycho Nightingale #define AHCI_GHC_AE 0x80000000 178bf21cd93STycho Nightingale #define AHCI_GHC_MRSM 0x00000004 179bf21cd93STycho Nightingale #define AHCI_GHC_IE 0x00000002 180bf21cd93STycho Nightingale #define AHCI_GHC_HR 0x00000001 181bf21cd93STycho Nightingale 182bf21cd93STycho Nightingale #define AHCI_IS 0x08 183bf21cd93STycho Nightingale #define AHCI_PI 0x0c 184bf21cd93STycho Nightingale #define AHCI_VS 0x10 185bf21cd93STycho Nightingale 186bf21cd93STycho Nightingale #define AHCI_CCCC 0x14 187bf21cd93STycho Nightingale #define AHCI_CCCC_TV_MASK 0xffff0000 188bf21cd93STycho Nightingale #define AHCI_CCCC_TV_SHIFT 16 189bf21cd93STycho Nightingale #define AHCI_CCCC_CC_MASK 0x0000ff00 190bf21cd93STycho Nightingale #define AHCI_CCCC_CC_SHIFT 8 191bf21cd93STycho Nightingale #define AHCI_CCCC_INT_MASK 0x000000f8 192bf21cd93STycho Nightingale #define AHCI_CCCC_INT_SHIFT 3 193bf21cd93STycho Nightingale #define AHCI_CCCC_EN 0x00000001 194bf21cd93STycho Nightingale #define AHCI_CCCP 0x18 195bf21cd93STycho Nightingale 196bf21cd93STycho Nightingale #define AHCI_EM_LOC 0x1C 197bf21cd93STycho Nightingale #define AHCI_EM_CTL 0x20 198bf21cd93STycho Nightingale #define AHCI_EM_MR 0x00000001 199bf21cd93STycho Nightingale #define AHCI_EM_TM 0x00000100 200bf21cd93STycho Nightingale #define AHCI_EM_RST 0x00000200 201bf21cd93STycho Nightingale #define AHCI_EM_LED 0x00010000 202bf21cd93STycho Nightingale #define AHCI_EM_SAFTE 0x00020000 203bf21cd93STycho Nightingale #define AHCI_EM_SES2 0x00040000 204bf21cd93STycho Nightingale #define AHCI_EM_SGPIO 0x00080000 205bf21cd93STycho Nightingale #define AHCI_EM_SMB 0x01000000 206bf21cd93STycho Nightingale #define AHCI_EM_XMT 0x02000000 207bf21cd93STycho Nightingale #define AHCI_EM_ALHD 0x04000000 208bf21cd93STycho Nightingale #define AHCI_EM_PM 0x08000000 209bf21cd93STycho Nightingale 210bf21cd93STycho Nightingale #define AHCI_CAP2 0x24 211bf21cd93STycho Nightingale #define AHCI_CAP2_BOH 0x00000001 212bf21cd93STycho Nightingale #define AHCI_CAP2_NVMP 0x00000002 213bf21cd93STycho Nightingale #define AHCI_CAP2_APST 0x00000004 2144c87aefeSPatrick Mooney #define AHCI_CAP2_SDS 0x00000008 2154c87aefeSPatrick Mooney #define AHCI_CAP2_SADM 0x00000010 2164c87aefeSPatrick Mooney #define AHCI_CAP2_DESO 0x00000020 217bf21cd93STycho Nightingale 218bf21cd93STycho Nightingale #define AHCI_OFFSET 0x100 219bf21cd93STycho Nightingale #define AHCI_STEP 0x80 220bf21cd93STycho Nightingale 221bf21cd93STycho Nightingale #define AHCI_P_CLB 0x00 222bf21cd93STycho Nightingale #define AHCI_P_CLBU 0x04 223bf21cd93STycho Nightingale #define AHCI_P_FB 0x08 224bf21cd93STycho Nightingale #define AHCI_P_FBU 0x0c 225bf21cd93STycho Nightingale #define AHCI_P_IS 0x10 226bf21cd93STycho Nightingale #define AHCI_P_IE 0x14 227bf21cd93STycho Nightingale #define AHCI_P_IX_DHR 0x00000001 228bf21cd93STycho Nightingale #define AHCI_P_IX_PS 0x00000002 229bf21cd93STycho Nightingale #define AHCI_P_IX_DS 0x00000004 230bf21cd93STycho Nightingale #define AHCI_P_IX_SDB 0x00000008 231bf21cd93STycho Nightingale #define AHCI_P_IX_UF 0x00000010 232bf21cd93STycho Nightingale #define AHCI_P_IX_DP 0x00000020 233bf21cd93STycho Nightingale #define AHCI_P_IX_PC 0x00000040 234bf21cd93STycho Nightingale #define AHCI_P_IX_MP 0x00000080 235bf21cd93STycho Nightingale 236bf21cd93STycho Nightingale #define AHCI_P_IX_PRC 0x00400000 237bf21cd93STycho Nightingale #define AHCI_P_IX_IPM 0x00800000 238bf21cd93STycho Nightingale #define AHCI_P_IX_OF 0x01000000 239bf21cd93STycho Nightingale #define AHCI_P_IX_INF 0x04000000 240bf21cd93STycho Nightingale #define AHCI_P_IX_IF 0x08000000 241bf21cd93STycho Nightingale #define AHCI_P_IX_HBD 0x10000000 242bf21cd93STycho Nightingale #define AHCI_P_IX_HBF 0x20000000 243bf21cd93STycho Nightingale #define AHCI_P_IX_TFE 0x40000000 244bf21cd93STycho Nightingale #define AHCI_P_IX_CPD 0x80000000 245bf21cd93STycho Nightingale 246bf21cd93STycho Nightingale #define AHCI_P_CMD 0x18 247bf21cd93STycho Nightingale #define AHCI_P_CMD_ST 0x00000001 248bf21cd93STycho Nightingale #define AHCI_P_CMD_SUD 0x00000002 249bf21cd93STycho Nightingale #define AHCI_P_CMD_POD 0x00000004 250bf21cd93STycho Nightingale #define AHCI_P_CMD_CLO 0x00000008 251bf21cd93STycho Nightingale #define AHCI_P_CMD_FRE 0x00000010 252bf21cd93STycho Nightingale #define AHCI_P_CMD_CCS_MASK 0x00001f00 253bf21cd93STycho Nightingale #define AHCI_P_CMD_CCS_SHIFT 8 254bf21cd93STycho Nightingale #define AHCI_P_CMD_ISS 0x00002000 255bf21cd93STycho Nightingale #define AHCI_P_CMD_FR 0x00004000 256bf21cd93STycho Nightingale #define AHCI_P_CMD_CR 0x00008000 257bf21cd93STycho Nightingale #define AHCI_P_CMD_CPS 0x00010000 258bf21cd93STycho Nightingale #define AHCI_P_CMD_PMA 0x00020000 259bf21cd93STycho Nightingale #define AHCI_P_CMD_HPCP 0x00040000 260bf21cd93STycho Nightingale #define AHCI_P_CMD_MPSP 0x00080000 261bf21cd93STycho Nightingale #define AHCI_P_CMD_CPD 0x00100000 262bf21cd93STycho Nightingale #define AHCI_P_CMD_ESP 0x00200000 263bf21cd93STycho Nightingale #define AHCI_P_CMD_FBSCP 0x00400000 264bf21cd93STycho Nightingale #define AHCI_P_CMD_APSTE 0x00800000 265bf21cd93STycho Nightingale #define AHCI_P_CMD_ATAPI 0x01000000 266bf21cd93STycho Nightingale #define AHCI_P_CMD_DLAE 0x02000000 267bf21cd93STycho Nightingale #define AHCI_P_CMD_ALPE 0x04000000 268bf21cd93STycho Nightingale #define AHCI_P_CMD_ASP 0x08000000 269bf21cd93STycho Nightingale #define AHCI_P_CMD_ICC_MASK 0xf0000000 270bf21cd93STycho Nightingale #define AHCI_P_CMD_NOOP 0x00000000 271bf21cd93STycho Nightingale #define AHCI_P_CMD_ACTIVE 0x10000000 272bf21cd93STycho Nightingale #define AHCI_P_CMD_PARTIAL 0x20000000 273bf21cd93STycho Nightingale #define AHCI_P_CMD_SLUMBER 0x60000000 2744c87aefeSPatrick Mooney #define AHCI_P_CMD_DEVSLEEP 0x80000000 275bf21cd93STycho Nightingale 276bf21cd93STycho Nightingale #define AHCI_P_TFD 0x20 277bf21cd93STycho Nightingale #define AHCI_P_SIG 0x24 278bf21cd93STycho Nightingale #define AHCI_P_SSTS 0x28 279bf21cd93STycho Nightingale #define AHCI_P_SCTL 0x2c 280bf21cd93STycho Nightingale #define AHCI_P_SERR 0x30 281bf21cd93STycho Nightingale #define AHCI_P_SACT 0x34 282bf21cd93STycho Nightingale #define AHCI_P_CI 0x38 283bf21cd93STycho Nightingale #define AHCI_P_SNTF 0x3C 284bf21cd93STycho Nightingale #define AHCI_P_FBS 0x40 285bf21cd93STycho Nightingale #define AHCI_P_FBS_EN 0x00000001 286bf21cd93STycho Nightingale #define AHCI_P_FBS_DEC 0x00000002 287bf21cd93STycho Nightingale #define AHCI_P_FBS_SDE 0x00000004 288bf21cd93STycho Nightingale #define AHCI_P_FBS_DEV 0x00000f00 289bf21cd93STycho Nightingale #define AHCI_P_FBS_DEV_SHIFT 8 290bf21cd93STycho Nightingale #define AHCI_P_FBS_ADO 0x0000f000 291bf21cd93STycho Nightingale #define AHCI_P_FBS_ADO_SHIFT 12 292bf21cd93STycho Nightingale #define AHCI_P_FBS_DWE 0x000f0000 293bf21cd93STycho Nightingale #define AHCI_P_FBS_DWE_SHIFT 16 2944c87aefeSPatrick Mooney #define AHCI_P_DEVSLP 0x44 2954c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_ADSE 0x00000001 2964c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DSP 0x00000002 2974c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DETO 0x000003fc 2984c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DETO_SHIFT 2 2994c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_MDAT 0x00007c00 3004c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_MDAT_SHIFT 10 3014c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DITO 0x01ff8000 3024c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DITO_SHIFT 15 3034c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DM 0x0e000000 3044c87aefeSPatrick Mooney #define AHCI_P_DEVSLP_DM_SHIFT 25 305bf21cd93STycho Nightingale 306bf21cd93STycho Nightingale /* Just to be sure, if building as module. */ 307bf21cd93STycho Nightingale #if MAXPHYS < 512 * 1024 308bf21cd93STycho Nightingale #undef MAXPHYS 309bf21cd93STycho Nightingale #define MAXPHYS 512 * 1024 310bf21cd93STycho Nightingale #endif 311bf21cd93STycho Nightingale /* Pessimistic prognosis on number of required S/G entries */ 312bf21cd93STycho Nightingale #define AHCI_SG_ENTRIES (roundup(btoc(MAXPHYS) + 1, 8)) 313bf21cd93STycho Nightingale /* Command list. 32 commands. First, 1Kbyte aligned. */ 314bf21cd93STycho Nightingale #define AHCI_CL_OFFSET 0 315bf21cd93STycho Nightingale #define AHCI_CL_SIZE 32 316bf21cd93STycho Nightingale /* Command tables. Up to 32 commands, Each, 128byte aligned. */ 317bf21cd93STycho Nightingale #define AHCI_CT_OFFSET (AHCI_CL_OFFSET + AHCI_CL_SIZE * AHCI_MAX_SLOTS) 318bf21cd93STycho Nightingale #define AHCI_CT_SIZE (128 + AHCI_SG_ENTRIES * 16) 319bf21cd93STycho Nightingale /* Total main work area. */ 320bf21cd93STycho Nightingale #define AHCI_WORK_SIZE (AHCI_CT_OFFSET + AHCI_CT_SIZE * ch->numslots) 321bf21cd93STycho Nightingale 322bf21cd93STycho Nightingale #endif /* _AHCI_H_ */ 323