1 /*- 2 * Copyright (c) 1989, 1990 William F. Jolitz 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * from: @(#)segments.h 7.1 (Berkeley) 5/9/91 34 */ 35 36 #ifndef _X86_SEGMENTS_H_ 37 #define _X86_SEGMENTS_H_ 38 39 /* 40 * X86 Segmentation Data Structures and definitions 41 */ 42 43 /* 44 * Selectors 45 */ 46 #define SEL_RPL_MASK 3 /* requester priv level */ 47 #define ISPL(s) ((s)&3) /* priority level of a selector */ 48 #define SEL_KPL 0 /* kernel priority level */ 49 #define SEL_UPL 3 /* user priority level */ 50 #define ISLDT(s) ((s)&SEL_LDT) /* is it local or global */ 51 #define SEL_LDT 4 /* local descriptor table */ 52 #define IDXSEL(s) (((s)>>3) & 0x1fff) /* index of selector */ 53 #define LSEL(s,r) (((s)<<3) | SEL_LDT | r) /* a local selector */ 54 #define GSEL(s,r) (((s)<<3) | r) /* a global selector */ 55 56 /* 57 * User segment descriptors (%cs, %ds etc for i386 apps. 64 bit wide) 58 * For long-mode apps, %cs only has the conforming bit in sd_type, the sd_dpl, 59 * sd_p, sd_l and sd_def32 which must be zero). %ds only has sd_p. 60 */ 61 struct segment_descriptor { 62 unsigned sd_lolimit:16; /* segment extent (lsb) */ 63 unsigned sd_lobase:24; /* segment base address (lsb) */ 64 unsigned sd_type:5; /* segment type */ 65 unsigned sd_dpl:2; /* segment descriptor priority level */ 66 unsigned sd_p:1; /* segment descriptor present */ 67 unsigned sd_hilimit:4; /* segment extent (msb) */ 68 unsigned sd_xx:2; /* unused */ 69 unsigned sd_def32:1; /* default 32 vs 16 bit size */ 70 unsigned sd_gran:1; /* limit granularity (byte/page units)*/ 71 unsigned sd_hibase:8; /* segment base address (msb) */ 72 } __packed; 73 74 struct user_segment_descriptor { 75 unsigned sd_lolimit:16; /* segment extent (lsb) */ 76 unsigned sd_lobase:24; /* segment base address (lsb) */ 77 unsigned sd_type:5; /* segment type */ 78 unsigned sd_dpl:2; /* segment descriptor priority level */ 79 unsigned sd_p:1; /* segment descriptor present */ 80 unsigned sd_hilimit:4; /* segment extent (msb) */ 81 unsigned sd_xx:1; /* unused */ 82 unsigned sd_long:1; /* long mode (cs only) */ 83 unsigned sd_def32:1; /* default 32 vs 16 bit size */ 84 unsigned sd_gran:1; /* limit granularity (byte/page units)*/ 85 unsigned sd_hibase:8; /* segment base address (msb) */ 86 } __packed; 87 88 #define USD_GETBASE(sd) (((sd)->sd_lobase) | (sd)->sd_hibase << 24) 89 #define USD_SETBASE(sd, b) (sd)->sd_lobase = (b); \ 90 (sd)->sd_hibase = ((b) >> 24); 91 #define USD_GETLIMIT(sd) (((sd)->sd_lolimit) | (sd)->sd_hilimit << 16) 92 #define USD_SETLIMIT(sd, l) (sd)->sd_lolimit = (l); \ 93 (sd)->sd_hilimit = ((l) >> 16); 94 95 #ifdef __i386__ 96 /* 97 * Gate descriptors (e.g. indirect descriptors) 98 */ 99 struct gate_descriptor { 100 unsigned gd_looffset:16; /* gate offset (lsb) */ 101 unsigned gd_selector:16; /* gate segment selector */ 102 unsigned gd_stkcpy:5; /* number of stack wds to cpy */ 103 unsigned gd_xx:3; /* unused */ 104 unsigned gd_type:5; /* segment type */ 105 unsigned gd_dpl:2; /* segment descriptor priority level */ 106 unsigned gd_p:1; /* segment descriptor present */ 107 unsigned gd_hioffset:16; /* gate offset (msb) */ 108 } __packed; 109 110 /* 111 * Generic descriptor 112 */ 113 union descriptor { 114 struct segment_descriptor sd; 115 struct gate_descriptor gd; 116 }; 117 #else 118 /* 119 * Gate descriptors (e.g. indirect descriptors, trap, interrupt etc. 128 bit) 120 * Only interrupt and trap gates have gd_ist. 121 */ 122 struct gate_descriptor { 123 uint64_t gd_looffset:16; /* gate offset (lsb) */ 124 uint64_t gd_selector:16; /* gate segment selector */ 125 uint64_t gd_ist:3; /* IST table index */ 126 uint64_t gd_xx:5; /* unused */ 127 uint64_t gd_type:5; /* segment type */ 128 uint64_t gd_dpl:2; /* segment descriptor priority level */ 129 uint64_t gd_p:1; /* segment descriptor present */ 130 uint64_t gd_hioffset:48; /* gate offset (msb) */ 131 uint64_t sd_xx1:32; 132 } __packed; 133 134 /* 135 * Generic descriptor 136 */ 137 union descriptor { 138 struct user_segment_descriptor sd; 139 struct gate_descriptor gd; 140 }; 141 #endif 142 143 /* system segments and gate types */ 144 #define SDT_SYSNULL 0 /* system null */ 145 #define SDT_SYS286TSS 1 /* system 286 TSS available */ 146 #define SDT_SYSLDT 2 /* system local descriptor table */ 147 #define SDT_SYS286BSY 3 /* system 286 TSS busy */ 148 #define SDT_SYS286CGT 4 /* system 286 call gate */ 149 #define SDT_SYSTASKGT 5 /* system task gate */ 150 #define SDT_SYS286IGT 6 /* system 286 interrupt gate */ 151 #define SDT_SYS286TGT 7 /* system 286 trap gate */ 152 #define SDT_SYSNULL2 8 /* system null again */ 153 #define SDT_SYS386TSS 9 /* system 386 TSS available */ 154 #define SDT_SYSTSS 9 /* system available 64 bit TSS */ 155 #define SDT_SYSNULL3 10 /* system null again */ 156 #define SDT_SYS386BSY 11 /* system 386 TSS busy */ 157 #define SDT_SYSBSY 11 /* system busy 64 bit TSS */ 158 #define SDT_SYS386CGT 12 /* system 386 call gate */ 159 #define SDT_SYSCGT 12 /* system 64 bit call gate */ 160 #define SDT_SYSNULL4 13 /* system null again */ 161 #define SDT_SYS386IGT 14 /* system 386 interrupt gate */ 162 #define SDT_SYSIGT 14 /* system 64 bit interrupt gate */ 163 #define SDT_SYS386TGT 15 /* system 386 trap gate */ 164 #define SDT_SYSTGT 15 /* system 64 bit trap gate */ 165 166 /* memory segment types */ 167 #define SDT_MEMRO 16 /* memory read only */ 168 #define SDT_MEMROA 17 /* memory read only accessed */ 169 #define SDT_MEMRW 18 /* memory read write */ 170 #define SDT_MEMRWA 19 /* memory read write accessed */ 171 #define SDT_MEMROD 20 /* memory read only expand dwn limit */ 172 #define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */ 173 #define SDT_MEMRWD 22 /* memory read write expand dwn limit */ 174 #define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed*/ 175 #define SDT_MEME 24 /* memory execute only */ 176 #define SDT_MEMEA 25 /* memory execute only accessed */ 177 #define SDT_MEMER 26 /* memory execute read */ 178 #define SDT_MEMERA 27 /* memory execute read accessed */ 179 #define SDT_MEMEC 28 /* memory execute only conforming */ 180 #define SDT_MEMEAC 29 /* memory execute only accessed conforming */ 181 #define SDT_MEMERC 30 /* memory execute read conforming */ 182 #define SDT_MEMERAC 31 /* memory execute read accessed conforming */ 183 184 /* 185 * Size of IDT table 186 */ 187 #define NIDT 256 /* 32 reserved, 0x80 syscall, most are h/w */ 188 #define NRSVIDT 32 /* reserved entries for cpu exceptions */ 189 190 /* 191 * Entries in the Interrupt Descriptor Table (IDT) 192 */ 193 #define IDT_DE 0 /* #DE: Divide Error */ 194 #define IDT_DB 1 /* #DB: Debug */ 195 #define IDT_NMI 2 /* Nonmaskable External Interrupt */ 196 #define IDT_BP 3 /* #BP: Breakpoint */ 197 #define IDT_OF 4 /* #OF: Overflow */ 198 #define IDT_BR 5 /* #BR: Bound Range Exceeded */ 199 #define IDT_UD 6 /* #UD: Undefined/Invalid Opcode */ 200 #define IDT_NM 7 /* #NM: No Math Coprocessor */ 201 #define IDT_DF 8 /* #DF: Double Fault */ 202 #define IDT_FPUGP 9 /* Coprocessor Segment Overrun */ 203 #define IDT_TS 10 /* #TS: Invalid TSS */ 204 #define IDT_NP 11 /* #NP: Segment Not Present */ 205 #define IDT_SS 12 /* #SS: Stack Segment Fault */ 206 #define IDT_GP 13 /* #GP: General Protection Fault */ 207 #define IDT_PF 14 /* #PF: Page Fault */ 208 #define IDT_MF 16 /* #MF: FPU Floating-Point Error */ 209 #define IDT_AC 17 /* #AC: Alignment Check */ 210 #define IDT_MC 18 /* #MC: Machine Check */ 211 #define IDT_XF 19 /* #XF: SIMD Floating-Point Exception */ 212 #define IDT_IO_INTS NRSVIDT /* Base of IDT entries for I/O interrupts. */ 213 #define IDT_SYSCALL 0x80 /* System Call Interrupt Vector */ 214 #define IDT_DTRACE_RET 0x92 /* DTrace pid provider Interrupt Vector */ 215 #define IDT_EVTCHN 0x93 /* Xen HVM Event Channel Interrupt Vector */ 216 217 #if defined(__i386__) 218 /* 219 * Entries in the Global Descriptor Table (GDT) 220 * Note that each 4 entries share a single 32 byte L1 cache line. 221 * Some of the fast syscall instructions require a specific order here. 222 */ 223 #define GNULL_SEL 0 /* Null Descriptor */ 224 #define GPRIV_SEL 1 /* SMP Per-Processor Private Data */ 225 #define GUFS_SEL 2 /* User %fs Descriptor (order critical: 1) */ 226 #define GUGS_SEL 3 /* User %gs Descriptor (order critical: 2) */ 227 #define GCODE_SEL 4 /* Kernel Code Descriptor (order critical: 1) */ 228 #define GDATA_SEL 5 /* Kernel Data Descriptor (order critical: 2) */ 229 #define GUCODE_SEL 6 /* User Code Descriptor (order critical: 3) */ 230 #define GUDATA_SEL 7 /* User Data Descriptor (order critical: 4) */ 231 #define GBIOSLOWMEM_SEL 8 /* BIOS low memory access (must be entry 8) */ 232 #define GPROC0_SEL 9 /* Task state process slot zero and up */ 233 #define GLDT_SEL 10 /* Default User LDT */ 234 #define GUSERLDT_SEL 11 /* User LDT */ 235 #define GPANIC_SEL 12 /* Task state to consider panic from */ 236 #define GBIOSCODE32_SEL 13 /* BIOS interface (32bit Code) */ 237 #define GBIOSCODE16_SEL 14 /* BIOS interface (16bit Code) */ 238 #define GBIOSDATA_SEL 15 /* BIOS interface (Data) */ 239 #define GBIOSUTIL_SEL 16 /* BIOS interface (Utility) */ 240 #define GBIOSARGS_SEL 17 /* BIOS interface (Arguments) */ 241 #define GNDIS_SEL 18 /* For the NDIS layer */ 242 #define NGDT 19 243 244 /* 245 * Entries in the Local Descriptor Table (LDT) 246 */ 247 #define LSYS5CALLS_SEL 0 /* forced by intel BCS */ 248 #define LSYS5SIGR_SEL 1 249 #define LUCODE_SEL 3 250 #define LUDATA_SEL 5 251 #define NLDT (LUDATA_SEL + 1) 252 253 #else /* !__i386__ */ 254 /* 255 * Entries in the Global Descriptor Table (GDT) 256 */ 257 #define GNULL_SEL 0 /* Null Descriptor */ 258 #define GNULL2_SEL 1 /* Null Descriptor */ 259 #define GUFS32_SEL 2 /* User 32 bit %fs Descriptor */ 260 #define GUGS32_SEL 3 /* User 32 bit %gs Descriptor */ 261 #define GCODE_SEL 4 /* Kernel Code Descriptor */ 262 #define GDATA_SEL 5 /* Kernel Data Descriptor */ 263 #define GUCODE32_SEL 6 /* User 32 bit code Descriptor */ 264 #define GUDATA_SEL 7 /* User 32/64 bit Data Descriptor */ 265 #define GUCODE_SEL 8 /* User 64 bit Code Descriptor */ 266 #define GPROC0_SEL 9 /* TSS for entering kernel etc */ 267 /* slot 10 is second half of GPROC0_SEL */ 268 #define GUSERLDT_SEL 11 /* LDT */ 269 /* slot 12 is second half of GUSERLDT_SEL */ 270 #define NGDT 13 271 #endif /* __i386__ */ 272 273 #endif /* !_X86_SEGMENTS_H_ */ 274