1 /** @file 2 ACPI 6.2 definitions from the ACPI Specification Revision 6.2 May, 2017. 3 4 Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR> 5 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 **/ 8 9 #ifndef _ACPI_6_2_H_ 10 #define _ACPI_6_2_H_ 11 12 #include <IndustryStandard/Acpi61.h> 13 14 // 15 // Large Item Descriptor Name 16 // 17 #define ACPI_LARGE_PIN_FUNCTION_DESCRIPTOR_NAME 0x0D 18 #define ACPI_LARGE_PIN_CONFIGURATION_DESCRIPTOR_NAME 0x0F 19 #define ACPI_LARGE_PIN_GROUP_DESCRIPTOR_NAME 0x10 20 #define ACPI_LARGE_PIN_GROUP_FUNCTION_DESCRIPTOR_NAME 0x11 21 #define ACPI_LARGE_PIN_GROUP_CONFIGURATION_DESCRIPTOR_NAME 0x12 22 23 // 24 // Large Item Descriptor Value 25 // 26 #define ACPI_PIN_FUNCTION_DESCRIPTOR 0x8D 27 #define ACPI_PIN_CONFIGURATION_DESCRIPTOR 0x8F 28 #define ACPI_PIN_GROUP_DESCRIPTOR 0x90 29 #define ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR 0x91 30 #define ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR 0x92 31 32 #pragma pack(1) 33 34 /// 35 /// Pin Function Descriptor 36 /// 37 typedef PACKED struct { 38 ACPI_LARGE_RESOURCE_HEADER Header; 39 UINT8 RevisionId; 40 UINT16 Flags; 41 UINT8 PinPullConfiguration; 42 UINT16 FunctionNumber; 43 UINT16 PinTableOffset; 44 UINT8 ResourceSourceIndex; 45 UINT16 ResourceSourceNameOffset; 46 UINT16 VendorDataOffset; 47 UINT16 VendorDataLength; 48 } EFI_ACPI_PIN_FUNCTION_DESCRIPTOR; 49 50 /// 51 /// Pin Configuration Descriptor 52 /// 53 typedef PACKED struct { 54 ACPI_LARGE_RESOURCE_HEADER Header; 55 UINT8 RevisionId; 56 UINT16 Flags; 57 UINT8 PinConfigurationType; 58 UINT32 PinConfigurationValue; 59 UINT16 PinTableOffset; 60 UINT8 ResourceSourceIndex; 61 UINT16 ResourceSourceNameOffset; 62 UINT16 VendorDataOffset; 63 UINT16 VendorDataLength; 64 } EFI_ACPI_PIN_CONFIGURATION_DESCRIPTOR; 65 66 /// 67 /// Pin Group Descriptor 68 /// 69 typedef PACKED struct { 70 ACPI_LARGE_RESOURCE_HEADER Header; 71 UINT8 RevisionId; 72 UINT16 Flags; 73 UINT16 PinTableOffset; 74 UINT16 ResourceLabelOffset; 75 UINT16 VendorDataOffset; 76 UINT16 VendorDataLength; 77 } EFI_ACPI_PIN_GROUP_DESCRIPTOR; 78 79 /// 80 /// Pin Group Function Descriptor 81 /// 82 typedef PACKED struct { 83 ACPI_LARGE_RESOURCE_HEADER Header; 84 UINT8 RevisionId; 85 UINT16 Flags; 86 UINT16 FunctionNumber; 87 UINT8 ResourceSourceIndex; 88 UINT16 ResourceSourceNameOffset; 89 UINT16 ResourceSourceLabelOffset; 90 UINT16 VendorDataOffset; 91 UINT16 VendorDataLength; 92 } EFI_ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR; 93 94 /// 95 /// Pin Group Configuration Descriptor 96 /// 97 typedef PACKED struct { 98 ACPI_LARGE_RESOURCE_HEADER Header; 99 UINT8 RevisionId; 100 UINT16 Flags; 101 UINT8 PinConfigurationType; 102 UINT32 PinConfigurationValue; 103 UINT8 ResourceSourceIndex; 104 UINT16 ResourceSourceNameOffset; 105 UINT16 ResourceSourceLabelOffset; 106 UINT16 VendorDataOffset; 107 UINT16 VendorDataLength; 108 } EFI_ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR; 109 110 #pragma pack() 111 112 // 113 // Ensure proper structure formats 114 // 115 #pragma pack(1) 116 117 /// 118 /// ACPI 6.2 Generic Address Space definition 119 /// 120 typedef struct { 121 UINT8 AddressSpaceId; 122 UINT8 RegisterBitWidth; 123 UINT8 RegisterBitOffset; 124 UINT8 AccessSize; 125 UINT64 Address; 126 } EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE; 127 128 // 129 // Generic Address Space Address IDs 130 // 131 #define EFI_ACPI_6_2_SYSTEM_MEMORY 0 132 #define EFI_ACPI_6_2_SYSTEM_IO 1 133 #define EFI_ACPI_6_2_PCI_CONFIGURATION_SPACE 2 134 #define EFI_ACPI_6_2_EMBEDDED_CONTROLLER 3 135 #define EFI_ACPI_6_2_SMBUS 4 136 #define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL 0x0A 137 #define EFI_ACPI_6_2_FUNCTIONAL_FIXED_HARDWARE 0x7F 138 139 // 140 // Generic Address Space Access Sizes 141 // 142 #define EFI_ACPI_6_2_UNDEFINED 0 143 #define EFI_ACPI_6_2_BYTE 1 144 #define EFI_ACPI_6_2_WORD 2 145 #define EFI_ACPI_6_2_DWORD 3 146 #define EFI_ACPI_6_2_QWORD 4 147 148 // 149 // ACPI 6.2 table structures 150 // 151 152 /// 153 /// Root System Description Pointer Structure 154 /// 155 typedef struct { 156 UINT64 Signature; 157 UINT8 Checksum; 158 UINT8 OemId[6]; 159 UINT8 Revision; 160 UINT32 RsdtAddress; 161 UINT32 Length; 162 UINT64 XsdtAddress; 163 UINT8 ExtendedChecksum; 164 UINT8 Reserved[3]; 165 } EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER; 166 167 /// 168 /// RSD_PTR Revision (as defined in ACPI 6.2 spec.) 169 /// 170 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.2) says current value is 2 171 172 /// 173 /// Common table header, this prefaces all ACPI tables, including FACS, but 174 /// excluding the RSD PTR structure 175 /// 176 typedef struct { 177 UINT32 Signature; 178 UINT32 Length; 179 } EFI_ACPI_6_2_COMMON_HEADER; 180 181 // 182 // Root System Description Table 183 // No definition needed as it is a common description table header, the same with 184 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 185 // 186 187 /// 188 /// RSDT Revision (as defined in ACPI 6.2 spec.) 189 /// 190 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 191 192 // 193 // Extended System Description Table 194 // No definition needed as it is a common description table header, the same with 195 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 196 // 197 198 /// 199 /// XSDT Revision (as defined in ACPI 6.2 spec.) 200 /// 201 #define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 202 203 /// 204 /// Fixed ACPI Description Table Structure (FADT) 205 /// 206 typedef struct { 207 EFI_ACPI_DESCRIPTION_HEADER Header; 208 UINT32 FirmwareCtrl; 209 UINT32 Dsdt; 210 UINT8 Reserved0; 211 UINT8 PreferredPmProfile; 212 UINT16 SciInt; 213 UINT32 SmiCmd; 214 UINT8 AcpiEnable; 215 UINT8 AcpiDisable; 216 UINT8 S4BiosReq; 217 UINT8 PstateCnt; 218 UINT32 Pm1aEvtBlk; 219 UINT32 Pm1bEvtBlk; 220 UINT32 Pm1aCntBlk; 221 UINT32 Pm1bCntBlk; 222 UINT32 Pm2CntBlk; 223 UINT32 PmTmrBlk; 224 UINT32 Gpe0Blk; 225 UINT32 Gpe1Blk; 226 UINT8 Pm1EvtLen; 227 UINT8 Pm1CntLen; 228 UINT8 Pm2CntLen; 229 UINT8 PmTmrLen; 230 UINT8 Gpe0BlkLen; 231 UINT8 Gpe1BlkLen; 232 UINT8 Gpe1Base; 233 UINT8 CstCnt; 234 UINT16 PLvl2Lat; 235 UINT16 PLvl3Lat; 236 UINT16 FlushSize; 237 UINT16 FlushStride; 238 UINT8 DutyOffset; 239 UINT8 DutyWidth; 240 UINT8 DayAlrm; 241 UINT8 MonAlrm; 242 UINT8 Century; 243 UINT16 IaPcBootArch; 244 UINT8 Reserved1; 245 UINT32 Flags; 246 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ResetReg; 247 UINT8 ResetValue; 248 UINT16 ArmBootArch; 249 UINT8 MinorVersion; 250 UINT64 XFirmwareCtrl; 251 UINT64 XDsdt; 252 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 253 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 254 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 255 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 256 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 257 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 258 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 259 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 260 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 261 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 262 UINT64 HypervisorVendorIdentity; 263 } EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE; 264 265 /// 266 /// FADT Version (as defined in ACPI 6.2 spec.) 267 /// 268 #define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06 269 #define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x02 270 271 // 272 // Fixed ACPI Description Table Preferred Power Management Profile 273 // 274 #define EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED 0 275 #define EFI_ACPI_6_2_PM_PROFILE_DESKTOP 1 276 #define EFI_ACPI_6_2_PM_PROFILE_MOBILE 2 277 #define EFI_ACPI_6_2_PM_PROFILE_WORKSTATION 3 278 #define EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER 4 279 #define EFI_ACPI_6_2_PM_PROFILE_SOHO_SERVER 5 280 #define EFI_ACPI_6_2_PM_PROFILE_APPLIANCE_PC 6 281 #define EFI_ACPI_6_2_PM_PROFILE_PERFORMANCE_SERVER 7 282 #define EFI_ACPI_6_2_PM_PROFILE_TABLET 8 283 284 // 285 // Fixed ACPI Description Table Boot Architecture Flags 286 // All other bits are reserved and must be set to 0. 287 // 288 #define EFI_ACPI_6_2_LEGACY_DEVICES BIT0 289 #define EFI_ACPI_6_2_8042 BIT1 290 #define EFI_ACPI_6_2_VGA_NOT_PRESENT BIT2 291 #define EFI_ACPI_6_2_MSI_NOT_SUPPORTED BIT3 292 #define EFI_ACPI_6_2_PCIE_ASPM_CONTROLS BIT4 293 #define EFI_ACPI_6_2_CMOS_RTC_NOT_PRESENT BIT5 294 295 // 296 // Fixed ACPI Description Table Arm Boot Architecture Flags 297 // All other bits are reserved and must be set to 0. 298 // 299 #define EFI_ACPI_6_2_ARM_PSCI_COMPLIANT BIT0 300 #define EFI_ACPI_6_2_ARM_PSCI_USE_HVC BIT1 301 302 // 303 // Fixed ACPI Description Table Fixed Feature Flags 304 // All other bits are reserved and must be set to 0. 305 // 306 #define EFI_ACPI_6_2_WBINVD BIT0 307 #define EFI_ACPI_6_2_WBINVD_FLUSH BIT1 308 #define EFI_ACPI_6_2_PROC_C1 BIT2 309 #define EFI_ACPI_6_2_P_LVL2_UP BIT3 310 #define EFI_ACPI_6_2_PWR_BUTTON BIT4 311 #define EFI_ACPI_6_2_SLP_BUTTON BIT5 312 #define EFI_ACPI_6_2_FIX_RTC BIT6 313 #define EFI_ACPI_6_2_RTC_S4 BIT7 314 #define EFI_ACPI_6_2_TMR_VAL_EXT BIT8 315 #define EFI_ACPI_6_2_DCK_CAP BIT9 316 #define EFI_ACPI_6_2_RESET_REG_SUP BIT10 317 #define EFI_ACPI_6_2_SEALED_CASE BIT11 318 #define EFI_ACPI_6_2_HEADLESS BIT12 319 #define EFI_ACPI_6_2_CPU_SW_SLP BIT13 320 #define EFI_ACPI_6_2_PCI_EXP_WAK BIT14 321 #define EFI_ACPI_6_2_USE_PLATFORM_CLOCK BIT15 322 #define EFI_ACPI_6_2_S4_RTC_STS_VALID BIT16 323 #define EFI_ACPI_6_2_REMOTE_POWER_ON_CAPABLE BIT17 324 #define EFI_ACPI_6_2_FORCE_APIC_CLUSTER_MODEL BIT18 325 #define EFI_ACPI_6_2_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 326 #define EFI_ACPI_6_2_HW_REDUCED_ACPI BIT20 327 #define EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABLE BIT21 328 329 /// 330 /// Firmware ACPI Control Structure 331 /// 332 typedef struct { 333 UINT32 Signature; 334 UINT32 Length; 335 UINT32 HardwareSignature; 336 UINT32 FirmwareWakingVector; 337 UINT32 GlobalLock; 338 UINT32 Flags; 339 UINT64 XFirmwareWakingVector; 340 UINT8 Version; 341 UINT8 Reserved0[3]; 342 UINT32 OspmFlags; 343 UINT8 Reserved1[24]; 344 } EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE; 345 346 /// 347 /// FACS Version (as defined in ACPI 6.2 spec.) 348 /// 349 #define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 350 351 /// 352 /// Firmware Control Structure Feature Flags 353 /// All other bits are reserved and must be set to 0. 354 /// 355 #define EFI_ACPI_6_2_S4BIOS_F BIT0 356 #define EFI_ACPI_6_2_64BIT_WAKE_SUPPORTED_F BIT1 357 358 /// 359 /// OSPM Enabled Firmware Control Structure Flags 360 /// All other bits are reserved and must be set to 0. 361 /// 362 #define EFI_ACPI_6_2_OSPM_64BIT_WAKE_F BIT0 363 364 // 365 // Differentiated System Description Table, 366 // Secondary System Description Table 367 // and Persistent System Description Table, 368 // no definition needed as they are common description table header, the same with 369 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 370 // 371 #define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 372 #define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 373 374 /// 375 /// Multiple APIC Description Table header definition. The rest of the table 376 /// must be defined in a platform specific manner. 377 /// 378 typedef struct { 379 EFI_ACPI_DESCRIPTION_HEADER Header; 380 UINT32 LocalApicAddress; 381 UINT32 Flags; 382 } EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 383 384 /// 385 /// MADT Revision (as defined in ACPI 6.2 spec.) 386 /// 387 #define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04 388 389 /// 390 /// Multiple APIC Flags 391 /// All other bits are reserved and must be set to 0. 392 /// 393 #define EFI_ACPI_6_2_PCAT_COMPAT BIT0 394 395 // 396 // Multiple APIC Description Table APIC structure types 397 // All other values between 0x0D and 0x7F are reserved and 398 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 399 // 400 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC 0x00 401 #define EFI_ACPI_6_2_IO_APIC 0x01 402 #define EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE 0x02 403 #define EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE 0x03 404 #define EFI_ACPI_6_2_LOCAL_APIC_NMI 0x04 405 #define EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 406 #define EFI_ACPI_6_2_IO_SAPIC 0x06 407 #define EFI_ACPI_6_2_LOCAL_SAPIC 0x07 408 #define EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES 0x08 409 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC 0x09 410 #define EFI_ACPI_6_2_LOCAL_X2APIC_NMI 0x0A 411 #define EFI_ACPI_6_2_GIC 0x0B 412 #define EFI_ACPI_6_2_GICD 0x0C 413 #define EFI_ACPI_6_2_GIC_MSI_FRAME 0x0D 414 #define EFI_ACPI_6_2_GICR 0x0E 415 #define EFI_ACPI_6_2_GIC_ITS 0x0F 416 417 // 418 // APIC Structure Definitions 419 // 420 421 /// 422 /// Processor Local APIC Structure Definition 423 /// 424 typedef struct { 425 UINT8 Type; 426 UINT8 Length; 427 UINT8 AcpiProcessorUid; 428 UINT8 ApicId; 429 UINT32 Flags; 430 } EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_STRUCTURE; 431 432 /// 433 /// Local APIC Flags. All other bits are reserved and must be 0. 434 /// 435 #define EFI_ACPI_6_2_LOCAL_APIC_ENABLED BIT0 436 437 /// 438 /// IO APIC Structure 439 /// 440 typedef struct { 441 UINT8 Type; 442 UINT8 Length; 443 UINT8 IoApicId; 444 UINT8 Reserved; 445 UINT32 IoApicAddress; 446 UINT32 GlobalSystemInterruptBase; 447 } EFI_ACPI_6_2_IO_APIC_STRUCTURE; 448 449 /// 450 /// Interrupt Source Override Structure 451 /// 452 typedef struct { 453 UINT8 Type; 454 UINT8 Length; 455 UINT8 Bus; 456 UINT8 Source; 457 UINT32 GlobalSystemInterrupt; 458 UINT16 Flags; 459 } EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 460 461 /// 462 /// Platform Interrupt Sources Structure Definition 463 /// 464 typedef struct { 465 UINT8 Type; 466 UINT8 Length; 467 UINT16 Flags; 468 UINT8 InterruptType; 469 UINT8 ProcessorId; 470 UINT8 ProcessorEid; 471 UINT8 IoSapicVector; 472 UINT32 GlobalSystemInterrupt; 473 UINT32 PlatformInterruptSourceFlags; 474 UINT8 CpeiProcessorOverride; 475 UINT8 Reserved[31]; 476 } EFI_ACPI_6_2_PLATFORM_INTERRUPT_APIC_STRUCTURE; 477 478 // 479 // MPS INTI flags. 480 // All other bits are reserved and must be set to 0. 481 // 482 #define EFI_ACPI_6_2_POLARITY (3 << 0) 483 #define EFI_ACPI_6_2_TRIGGER_MODE (3 << 2) 484 485 /// 486 /// Non-Maskable Interrupt Source Structure 487 /// 488 typedef struct { 489 UINT8 Type; 490 UINT8 Length; 491 UINT16 Flags; 492 UINT32 GlobalSystemInterrupt; 493 } EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 494 495 /// 496 /// Local APIC NMI Structure 497 /// 498 typedef struct { 499 UINT8 Type; 500 UINT8 Length; 501 UINT8 AcpiProcessorUid; 502 UINT16 Flags; 503 UINT8 LocalApicLint; 504 } EFI_ACPI_6_2_LOCAL_APIC_NMI_STRUCTURE; 505 506 /// 507 /// Local APIC Address Override Structure 508 /// 509 typedef struct { 510 UINT8 Type; 511 UINT8 Length; 512 UINT16 Reserved; 513 UINT64 LocalApicAddress; 514 } EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 515 516 /// 517 /// IO SAPIC Structure 518 /// 519 typedef struct { 520 UINT8 Type; 521 UINT8 Length; 522 UINT8 IoApicId; 523 UINT8 Reserved; 524 UINT32 GlobalSystemInterruptBase; 525 UINT64 IoSapicAddress; 526 } EFI_ACPI_6_2_IO_SAPIC_STRUCTURE; 527 528 /// 529 /// Local SAPIC Structure 530 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 531 /// 532 typedef struct { 533 UINT8 Type; 534 UINT8 Length; 535 UINT8 AcpiProcessorId; 536 UINT8 LocalSapicId; 537 UINT8 LocalSapicEid; 538 UINT8 Reserved[3]; 539 UINT32 Flags; 540 UINT32 ACPIProcessorUIDValue; 541 } EFI_ACPI_6_2_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 542 543 /// 544 /// Platform Interrupt Sources Structure 545 /// 546 typedef struct { 547 UINT8 Type; 548 UINT8 Length; 549 UINT16 Flags; 550 UINT8 InterruptType; 551 UINT8 ProcessorId; 552 UINT8 ProcessorEid; 553 UINT8 IoSapicVector; 554 UINT32 GlobalSystemInterrupt; 555 UINT32 PlatformInterruptSourceFlags; 556 } EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 557 558 /// 559 /// Platform Interrupt Source Flags. 560 /// All other bits are reserved and must be set to 0. 561 /// 562 #define EFI_ACPI_6_2_CPEI_PROCESSOR_OVERRIDE BIT0 563 564 /// 565 /// Processor Local x2APIC Structure Definition 566 /// 567 typedef struct { 568 UINT8 Type; 569 UINT8 Length; 570 UINT8 Reserved[2]; 571 UINT32 X2ApicId; 572 UINT32 Flags; 573 UINT32 AcpiProcessorUid; 574 } EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 575 576 /// 577 /// Local x2APIC NMI Structure 578 /// 579 typedef struct { 580 UINT8 Type; 581 UINT8 Length; 582 UINT16 Flags; 583 UINT32 AcpiProcessorUid; 584 UINT8 LocalX2ApicLint; 585 UINT8 Reserved[3]; 586 } EFI_ACPI_6_2_LOCAL_X2APIC_NMI_STRUCTURE; 587 588 /// 589 /// GIC Structure 590 /// 591 typedef struct { 592 UINT8 Type; 593 UINT8 Length; 594 UINT16 Reserved; 595 UINT32 CPUInterfaceNumber; 596 UINT32 AcpiProcessorUid; 597 UINT32 Flags; 598 UINT32 ParkingProtocolVersion; 599 UINT32 PerformanceInterruptGsiv; 600 UINT64 ParkedAddress; 601 UINT64 PhysicalBaseAddress; 602 UINT64 GICV; 603 UINT64 GICH; 604 UINT32 VGICMaintenanceInterrupt; 605 UINT64 GICRBaseAddress; 606 UINT64 MPIDR; 607 UINT8 ProcessorPowerEfficiencyClass; 608 UINT8 Reserved2[3]; 609 } EFI_ACPI_6_2_GIC_STRUCTURE; 610 611 /// 612 /// GIC Flags. All other bits are reserved and must be 0. 613 /// 614 #define EFI_ACPI_6_2_GIC_ENABLED BIT0 615 #define EFI_ACPI_6_2_PERFORMANCE_INTERRUPT_MODEL BIT1 616 #define EFI_ACPI_6_2_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 617 618 /// 619 /// GIC Distributor Structure 620 /// 621 typedef struct { 622 UINT8 Type; 623 UINT8 Length; 624 UINT16 Reserved1; 625 UINT32 GicId; 626 UINT64 PhysicalBaseAddress; 627 UINT32 SystemVectorBase; 628 UINT8 GicVersion; 629 UINT8 Reserved2[3]; 630 } EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE; 631 632 /// 633 /// GIC Version 634 /// 635 #define EFI_ACPI_6_2_GIC_V1 0x01 636 #define EFI_ACPI_6_2_GIC_V2 0x02 637 #define EFI_ACPI_6_2_GIC_V3 0x03 638 #define EFI_ACPI_6_2_GIC_V4 0x04 639 640 /// 641 /// GIC MSI Frame Structure 642 /// 643 typedef struct { 644 UINT8 Type; 645 UINT8 Length; 646 UINT16 Reserved1; 647 UINT32 GicMsiFrameId; 648 UINT64 PhysicalBaseAddress; 649 UINT32 Flags; 650 UINT16 SPICount; 651 UINT16 SPIBase; 652 } EFI_ACPI_6_2_GIC_MSI_FRAME_STRUCTURE; 653 654 /// 655 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 656 /// 657 #define EFI_ACPI_6_2_SPI_COUNT_BASE_SELECT BIT0 658 659 /// 660 /// GICR Structure 661 /// 662 typedef struct { 663 UINT8 Type; 664 UINT8 Length; 665 UINT16 Reserved; 666 UINT64 DiscoveryRangeBaseAddress; 667 UINT32 DiscoveryRangeLength; 668 } EFI_ACPI_6_2_GICR_STRUCTURE; 669 670 /// 671 /// GIC Interrupt Translation Service Structure 672 /// 673 typedef struct { 674 UINT8 Type; 675 UINT8 Length; 676 UINT16 Reserved; 677 UINT32 GicItsId; 678 UINT64 PhysicalBaseAddress; 679 UINT32 Reserved2; 680 } EFI_ACPI_6_2_GIC_ITS_STRUCTURE; 681 682 /// 683 /// Smart Battery Description Table (SBST) 684 /// 685 typedef struct { 686 EFI_ACPI_DESCRIPTION_HEADER Header; 687 UINT32 WarningEnergyLevel; 688 UINT32 LowEnergyLevel; 689 UINT32 CriticalEnergyLevel; 690 } EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE; 691 692 /// 693 /// SBST Version (as defined in ACPI 6.2 spec.) 694 /// 695 #define EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 696 697 /// 698 /// Embedded Controller Boot Resources Table (ECDT) 699 /// The table is followed by a null terminated ASCII string that contains 700 /// a fully qualified reference to the name space object. 701 /// 702 typedef struct { 703 EFI_ACPI_DESCRIPTION_HEADER Header; 704 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcControl; 705 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcData; 706 UINT32 Uid; 707 UINT8 GpeBit; 708 } EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 709 710 /// 711 /// ECDT Version (as defined in ACPI 6.2 spec.) 712 /// 713 #define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 714 715 /// 716 /// System Resource Affinity Table (SRAT). The rest of the table 717 /// must be defined in a platform specific manner. 718 /// 719 typedef struct { 720 EFI_ACPI_DESCRIPTION_HEADER Header; 721 UINT32 Reserved1; ///< Must be set to 1 722 UINT64 Reserved2; 723 } EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 724 725 /// 726 /// SRAT Version (as defined in ACPI 6.2 spec.) 727 /// 728 #define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 729 730 // 731 // SRAT structure types. 732 // All other values between 0x05 an 0xFF are reserved and 733 // will be ignored by OSPM. 734 // 735 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 736 #define EFI_ACPI_6_2_MEMORY_AFFINITY 0x01 737 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 738 #define EFI_ACPI_6_2_GICC_AFFINITY 0x03 739 #define EFI_ACPI_6_2_GIC_ITS_AFFINITY 0x04 740 741 /// 742 /// Processor Local APIC/SAPIC Affinity Structure Definition 743 /// 744 typedef struct { 745 UINT8 Type; 746 UINT8 Length; 747 UINT8 ProximityDomain7To0; 748 UINT8 ApicId; 749 UINT32 Flags; 750 UINT8 LocalSapicEid; 751 UINT8 ProximityDomain31To8[3]; 752 UINT32 ClockDomain; 753 } EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 754 755 /// 756 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 757 /// 758 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 759 760 /// 761 /// Memory Affinity Structure Definition 762 /// 763 typedef struct { 764 UINT8 Type; 765 UINT8 Length; 766 UINT32 ProximityDomain; 767 UINT16 Reserved1; 768 UINT32 AddressBaseLow; 769 UINT32 AddressBaseHigh; 770 UINT32 LengthLow; 771 UINT32 LengthHigh; 772 UINT32 Reserved2; 773 UINT32 Flags; 774 UINT64 Reserved3; 775 } EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE; 776 777 // 778 // Memory Flags. All other bits are reserved and must be 0. 779 // 780 #define EFI_ACPI_6_2_MEMORY_ENABLED (1 << 0) 781 #define EFI_ACPI_6_2_MEMORY_HOT_PLUGGABLE (1 << 1) 782 #define EFI_ACPI_6_2_MEMORY_NONVOLATILE (1 << 2) 783 784 /// 785 /// Processor Local x2APIC Affinity Structure Definition 786 /// 787 typedef struct { 788 UINT8 Type; 789 UINT8 Length; 790 UINT8 Reserved1[2]; 791 UINT32 ProximityDomain; 792 UINT32 X2ApicId; 793 UINT32 Flags; 794 UINT32 ClockDomain; 795 UINT8 Reserved2[4]; 796 } EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 797 798 /// 799 /// GICC Affinity Structure Definition 800 /// 801 typedef struct { 802 UINT8 Type; 803 UINT8 Length; 804 UINT32 ProximityDomain; 805 UINT32 AcpiProcessorUid; 806 UINT32 Flags; 807 UINT32 ClockDomain; 808 } EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE; 809 810 /// 811 /// GICC Flags. All other bits are reserved and must be 0. 812 /// 813 #define EFI_ACPI_6_2_GICC_ENABLED (1 << 0) 814 815 /// 816 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition 817 /// 818 typedef struct { 819 UINT8 Type; 820 UINT8 Length; 821 UINT32 ProximityDomain; 822 UINT8 Reserved[2]; 823 UINT32 ItsId; 824 } EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE; 825 826 /// 827 /// System Locality Distance Information Table (SLIT). 828 /// The rest of the table is a matrix. 829 /// 830 typedef struct { 831 EFI_ACPI_DESCRIPTION_HEADER Header; 832 UINT64 NumberOfSystemLocalities; 833 } EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 834 835 /// 836 /// SLIT Version (as defined in ACPI 6.2 spec.) 837 /// 838 #define EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 839 840 /// 841 /// Corrected Platform Error Polling Table (CPEP) 842 /// 843 typedef struct { 844 EFI_ACPI_DESCRIPTION_HEADER Header; 845 UINT8 Reserved[8]; 846 } EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 847 848 /// 849 /// CPEP Version (as defined in ACPI 6.2 spec.) 850 /// 851 #define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 852 853 // 854 // CPEP processor structure types. 855 // 856 #define EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC 0x00 857 858 /// 859 /// Corrected Platform Error Polling Processor Structure Definition 860 /// 861 typedef struct { 862 UINT8 Type; 863 UINT8 Length; 864 UINT8 ProcessorId; 865 UINT8 ProcessorEid; 866 UINT32 PollingInterval; 867 } EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 868 869 /// 870 /// Maximum System Characteristics Table (MSCT) 871 /// 872 typedef struct { 873 EFI_ACPI_DESCRIPTION_HEADER Header; 874 UINT32 OffsetProxDomInfo; 875 UINT32 MaximumNumberOfProximityDomains; 876 UINT32 MaximumNumberOfClockDomains; 877 UINT64 MaximumPhysicalAddress; 878 } EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 879 880 /// 881 /// MSCT Version (as defined in ACPI 6.2 spec.) 882 /// 883 #define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 884 885 /// 886 /// Maximum Proximity Domain Information Structure Definition 887 /// 888 typedef struct { 889 UINT8 Revision; 890 UINT8 Length; 891 UINT32 ProximityDomainRangeLow; 892 UINT32 ProximityDomainRangeHigh; 893 UINT32 MaximumProcessorCapacity; 894 UINT64 MaximumMemoryCapacity; 895 } EFI_ACPI_6_2_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 896 897 /// 898 /// ACPI RAS Feature Table definition. 899 /// 900 typedef struct { 901 EFI_ACPI_DESCRIPTION_HEADER Header; 902 UINT8 PlatformCommunicationChannelIdentifier[12]; 903 } EFI_ACPI_6_2_RAS_FEATURE_TABLE; 904 905 /// 906 /// RASF Version (as defined in ACPI 6.2 spec.) 907 /// 908 #define EFI_ACPI_6_2_RAS_FEATURE_TABLE_REVISION 0x01 909 910 /// 911 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 912 /// 913 typedef struct { 914 UINT32 Signature; 915 UINT16 Command; 916 UINT16 Status; 917 UINT16 Version; 918 UINT8 RASCapabilities[16]; 919 UINT8 SetRASCapabilities[16]; 920 UINT16 NumberOfRASFParameterBlocks; 921 UINT32 SetRASCapabilitiesStatus; 922 } EFI_ACPI_6_2_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 923 924 /// 925 /// ACPI RASF PCC command code 926 /// 927 #define EFI_ACPI_6_2_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 928 929 /// 930 /// ACPI RASF Platform RAS Capabilities 931 /// 932 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0 933 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1 934 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2 935 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3 936 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4 937 938 /// 939 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 940 /// 941 typedef struct { 942 UINT16 Type; 943 UINT16 Version; 944 UINT16 Length; 945 UINT16 PatrolScrubCommand; 946 UINT64 RequestedAddressRange[2]; 947 UINT64 ActualAddressRange[2]; 948 UINT16 Flags; 949 UINT8 RequestedSpeed; 950 } EFI_ACPI_6_2_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 951 952 /// 953 /// ACPI RASF Patrol Scrub command 954 /// 955 #define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 956 #define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 957 #define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 958 959 /// 960 /// Memory Power State Table definition. 961 /// 962 typedef struct { 963 EFI_ACPI_DESCRIPTION_HEADER Header; 964 UINT8 PlatformCommunicationChannelIdentifier; 965 UINT8 Reserved[3]; 966 // Memory Power Node Structure 967 // Memory Power State Characteristics 968 } EFI_ACPI_6_2_MEMORY_POWER_STATUS_TABLE; 969 970 /// 971 /// MPST Version (as defined in ACPI 6.2 spec.) 972 /// 973 #define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_REVISION 0x01 974 975 /// 976 /// MPST Platform Communication Channel Shared Memory Region definition. 977 /// 978 typedef struct { 979 UINT32 Signature; 980 UINT16 Command; 981 UINT16 Status; 982 UINT32 MemoryPowerCommandRegister; 983 UINT32 MemoryPowerStatusRegister; 984 UINT32 PowerStateId; 985 UINT32 MemoryPowerNodeId; 986 UINT64 MemoryEnergyConsumed; 987 UINT64 ExpectedAveragePowerComsuned; 988 } EFI_ACPI_6_2_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 989 990 /// 991 /// ACPI MPST PCC command code 992 /// 993 #define EFI_ACPI_6_2_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 994 995 /// 996 /// ACPI MPST Memory Power command 997 /// 998 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 999 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 1000 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 1001 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 1002 1003 /// 1004 /// MPST Memory Power Node Table 1005 /// 1006 typedef struct { 1007 UINT8 PowerStateValue; 1008 UINT8 PowerStateInformationIndex; 1009 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE; 1010 1011 typedef struct { 1012 UINT8 Flag; 1013 UINT8 Reserved; 1014 UINT16 MemoryPowerNodeId; 1015 UINT32 Length; 1016 UINT64 AddressBase; 1017 UINT64 AddressLength; 1018 UINT32 NumberOfPowerStates; 1019 UINT32 NumberOfPhysicalComponents; 1020 // EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 1021 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 1022 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE; 1023 1024 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 1025 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 1026 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 1027 1028 typedef struct { 1029 UINT16 MemoryPowerNodeCount; 1030 UINT8 Reserved[2]; 1031 } EFI_ACPI_6_2_MPST_MEMORY_POWER_NODE_TABLE; 1032 1033 /// 1034 /// MPST Memory Power State Characteristics Table 1035 /// 1036 typedef struct { 1037 UINT8 PowerStateStructureID; 1038 UINT8 Flag; 1039 UINT16 Reserved; 1040 UINT32 AveragePowerConsumedInMPS0; 1041 UINT32 RelativePowerSavingToMPS0; 1042 UINT64 ExitLatencyToMPS0; 1043 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 1044 1045 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 1046 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 1047 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 1048 1049 typedef struct { 1050 UINT16 MemoryPowerStateCharacteristicsCount; 1051 UINT8 Reserved[2]; 1052 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 1053 1054 /// 1055 /// Memory Topology Table definition. 1056 /// 1057 typedef struct { 1058 EFI_ACPI_DESCRIPTION_HEADER Header; 1059 UINT32 Reserved; 1060 } EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE; 1061 1062 /// 1063 /// PMTT Version (as defined in ACPI 6.2 spec.) 1064 /// 1065 #define EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 1066 1067 /// 1068 /// Common Memory Aggregator Device Structure. 1069 /// 1070 typedef struct { 1071 UINT8 Type; 1072 UINT8 Reserved; 1073 UINT16 Length; 1074 UINT16 Flags; 1075 UINT16 Reserved1; 1076 } EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1077 1078 /// 1079 /// Memory Aggregator Device Type 1080 /// 1081 #define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0 1082 #define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 1083 #define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2 1084 1085 /// 1086 /// Socket Memory Aggregator Device Structure. 1087 /// 1088 typedef struct { 1089 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1090 UINT16 SocketIdentifier; 1091 UINT16 Reserved; 1092 // EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 1093 } EFI_ACPI_6_2_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1094 1095 /// 1096 /// MemoryController Memory Aggregator Device Structure. 1097 /// 1098 typedef struct { 1099 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1100 UINT32 ReadLatency; 1101 UINT32 WriteLatency; 1102 UINT32 ReadBandwidth; 1103 UINT32 WriteBandwidth; 1104 UINT16 OptimalAccessUnit; 1105 UINT16 OptimalAccessAlignment; 1106 UINT16 Reserved; 1107 UINT16 NumberOfProximityDomains; 1108 // UINT32 ProximityDomain[NumberOfProximityDomains]; 1109 // EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 1110 } EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1111 1112 /// 1113 /// DIMM Memory Aggregator Device Structure. 1114 /// 1115 typedef struct { 1116 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1117 UINT16 PhysicalComponentIdentifier; 1118 UINT16 Reserved; 1119 UINT32 SizeOfDimm; 1120 UINT32 SmbiosHandle; 1121 } EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1122 1123 /// 1124 /// Boot Graphics Resource Table definition. 1125 /// 1126 typedef struct { 1127 EFI_ACPI_DESCRIPTION_HEADER Header; 1128 /// 1129 /// 2-bytes (16 bit) version ID. This value must be 1. 1130 /// 1131 UINT16 Version; 1132 /// 1133 /// 1-byte status field indicating current status about the table. 1134 /// Bits[7:1] = Reserved (must be zero) 1135 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1136 /// 1137 UINT8 Status; 1138 /// 1139 /// 1-byte enumerated type field indicating format of the image. 1140 /// 0 = Bitmap 1141 /// 1 - 255 Reserved (for future use) 1142 /// 1143 UINT8 ImageType; 1144 /// 1145 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1146 /// of the image bitmap. 1147 /// 1148 UINT64 ImageAddress; 1149 /// 1150 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1151 /// (X, Y) display offset of the top left corner of the boot image. 1152 /// The top left corner of the display is at offset (0, 0). 1153 /// 1154 UINT32 ImageOffsetX; 1155 /// 1156 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1157 /// (X, Y) display offset of the top left corner of the boot image. 1158 /// The top left corner of the display is at offset (0, 0). 1159 /// 1160 UINT32 ImageOffsetY; 1161 } EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE; 1162 1163 /// 1164 /// BGRT Revision 1165 /// 1166 #define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1167 1168 /// 1169 /// BGRT Version 1170 /// 1171 #define EFI_ACPI_6_2_BGRT_VERSION 0x01 1172 1173 /// 1174 /// BGRT Status 1175 /// 1176 #define EFI_ACPI_6_2_BGRT_STATUS_NOT_DISPLAYED 0x00 1177 #define EFI_ACPI_6_2_BGRT_STATUS_DISPLAYED 0x01 1178 1179 /// 1180 /// BGRT Image Type 1181 /// 1182 #define EFI_ACPI_6_2_BGRT_IMAGE_TYPE_BMP 0x00 1183 1184 /// 1185 /// FPDT Version (as defined in ACPI 6.2 spec.) 1186 /// 1187 #define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1188 1189 /// 1190 /// FPDT Performance Record Types 1191 /// 1192 #define EFI_ACPI_6_2_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1193 #define EFI_ACPI_6_2_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1194 1195 /// 1196 /// FPDT Performance Record Revision 1197 /// 1198 #define EFI_ACPI_6_2_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1199 #define EFI_ACPI_6_2_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1200 1201 /// 1202 /// FPDT Runtime Performance Record Types 1203 /// 1204 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1205 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1206 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1207 1208 /// 1209 /// FPDT Runtime Performance Record Revision 1210 /// 1211 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1212 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1213 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1214 1215 /// 1216 /// FPDT Performance Record header 1217 /// 1218 typedef struct { 1219 UINT16 Type; 1220 UINT8 Length; 1221 UINT8 Revision; 1222 } EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER; 1223 1224 /// 1225 /// FPDT Performance Table header 1226 /// 1227 typedef struct { 1228 UINT32 Signature; 1229 UINT32 Length; 1230 } EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER; 1231 1232 /// 1233 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1234 /// 1235 typedef struct { 1236 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header; 1237 UINT32 Reserved; 1238 /// 1239 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1240 /// 1241 UINT64 BootPerformanceTablePointer; 1242 } EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1243 1244 /// 1245 /// FPDT S3 Performance Table Pointer Record Structure 1246 /// 1247 typedef struct { 1248 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header; 1249 UINT32 Reserved; 1250 /// 1251 /// 64-bit processor-relative physical address of the S3 Performance Table. 1252 /// 1253 UINT64 S3PerformanceTablePointer; 1254 } EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1255 1256 /// 1257 /// FPDT Firmware Basic Boot Performance Record Structure 1258 /// 1259 typedef struct { 1260 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header; 1261 UINT32 Reserved; 1262 /// 1263 /// Timer value logged at the beginning of firmware image execution. 1264 /// This may not always be zero or near zero. 1265 /// 1266 UINT64 ResetEnd; 1267 /// 1268 /// Timer value logged just prior to loading the OS boot loader into memory. 1269 /// For non-UEFI compatible boots, this field must be zero. 1270 /// 1271 UINT64 OsLoaderLoadImageStart; 1272 /// 1273 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1274 /// For non-UEFI compatible boots, the timer value logged will be just prior 1275 /// to the INT 19h handler invocation. 1276 /// 1277 UINT64 OsLoaderStartImageStart; 1278 /// 1279 /// Timer value logged at the point when the OS loader calls the 1280 /// ExitBootServices function for UEFI compatible firmware. 1281 /// For non-UEFI compatible boots, this field must be zero. 1282 /// 1283 UINT64 ExitBootServicesEntry; 1284 /// 1285 /// Timer value logged at the point just prior to when the OS loader gaining 1286 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1287 /// For non-UEFI compatible boots, this field must be zero. 1288 /// 1289 UINT64 ExitBootServicesExit; 1290 } EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1291 1292 /// 1293 /// FPDT Firmware Basic Boot Performance Table signature 1294 /// 1295 #define EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1296 1297 // 1298 // FPDT Firmware Basic Boot Performance Table 1299 // 1300 typedef struct { 1301 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header; 1302 // 1303 // one or more Performance Records. 1304 // 1305 } EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1306 1307 /// 1308 /// FPDT "S3PT" S3 Performance Table 1309 /// 1310 #define EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1311 1312 // 1313 // FPDT Firmware S3 Boot Performance Table 1314 // 1315 typedef struct { 1316 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header; 1317 // 1318 // one or more Performance Records. 1319 // 1320 } EFI_ACPI_6_2_FPDT_FIRMWARE_S3_BOOT_TABLE; 1321 1322 /// 1323 /// FPDT Basic S3 Resume Performance Record 1324 /// 1325 typedef struct { 1326 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header; 1327 /// 1328 /// A count of the number of S3 resume cycles since the last full boot sequence. 1329 /// 1330 UINT32 ResumeCount; 1331 /// 1332 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1333 /// OS waking vector. Only the most recent resume cycle's time is retained. 1334 /// 1335 UINT64 FullResume; 1336 /// 1337 /// Average timer value of all resume cycles logged since the last full boot 1338 /// sequence, including the most recent resume. Note that the entire log of 1339 /// timer values does not need to be retained in order to calculate this average. 1340 /// 1341 UINT64 AverageResume; 1342 } EFI_ACPI_6_2_FPDT_S3_RESUME_RECORD; 1343 1344 /// 1345 /// FPDT Basic S3 Suspend Performance Record 1346 /// 1347 typedef struct { 1348 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header; 1349 /// 1350 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1351 /// Only the most recent suspend cycle's timer value is retained. 1352 /// 1353 UINT64 SuspendStart; 1354 /// 1355 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1356 /// mechanism) used to trigger hardware entry to S3. 1357 /// Only the most recent suspend cycle's timer value is retained. 1358 /// 1359 UINT64 SuspendEnd; 1360 } EFI_ACPI_6_2_FPDT_S3_SUSPEND_RECORD; 1361 1362 /// 1363 /// Firmware Performance Record Table definition. 1364 /// 1365 typedef struct { 1366 EFI_ACPI_DESCRIPTION_HEADER Header; 1367 } EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1368 1369 /// 1370 /// Generic Timer Description Table definition. 1371 /// 1372 typedef struct { 1373 EFI_ACPI_DESCRIPTION_HEADER Header; 1374 UINT64 CntControlBasePhysicalAddress; 1375 UINT32 Reserved; 1376 UINT32 SecurePL1TimerGSIV; 1377 UINT32 SecurePL1TimerFlags; 1378 UINT32 NonSecurePL1TimerGSIV; 1379 UINT32 NonSecurePL1TimerFlags; 1380 UINT32 VirtualTimerGSIV; 1381 UINT32 VirtualTimerFlags; 1382 UINT32 NonSecurePL2TimerGSIV; 1383 UINT32 NonSecurePL2TimerFlags; 1384 UINT64 CntReadBasePhysicalAddress; 1385 UINT32 PlatformTimerCount; 1386 UINT32 PlatformTimerOffset; 1387 } EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE; 1388 1389 /// 1390 /// GTDT Version (as defined in ACPI 6.2 spec.) 1391 /// 1392 #define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1393 1394 /// 1395 /// Timer Flags. All other bits are reserved and must be 0. 1396 /// 1397 #define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1398 #define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1399 #define EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1400 1401 /// 1402 /// Platform Timer Type 1403 /// 1404 #define EFI_ACPI_6_2_GTDT_GT_BLOCK 0 1405 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG 1 1406 1407 /// 1408 /// GT Block Structure 1409 /// 1410 typedef struct { 1411 UINT8 Type; 1412 UINT16 Length; 1413 UINT8 Reserved; 1414 UINT64 CntCtlBase; 1415 UINT32 GTBlockTimerCount; 1416 UINT32 GTBlockTimerOffset; 1417 } EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE; 1418 1419 /// 1420 /// GT Block Timer Structure 1421 /// 1422 typedef struct { 1423 UINT8 GTFrameNumber; 1424 UINT8 Reserved[3]; 1425 UINT64 CntBaseX; 1426 UINT64 CntEL0BaseX; 1427 UINT32 GTxPhysicalTimerGSIV; 1428 UINT32 GTxPhysicalTimerFlags; 1429 UINT32 GTxVirtualTimerGSIV; 1430 UINT32 GTxVirtualTimerFlags; 1431 UINT32 GTxCommonFlags; 1432 } EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1433 1434 /// 1435 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1436 /// 1437 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1438 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1439 1440 /// 1441 /// Common Flags Flags. All other bits are reserved and must be 0. 1442 /// 1443 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1444 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1445 1446 /// 1447 /// SBSA Generic Watchdog Structure 1448 /// 1449 typedef struct { 1450 UINT8 Type; 1451 UINT16 Length; 1452 UINT8 Reserved; 1453 UINT64 RefreshFramePhysicalAddress; 1454 UINT64 WatchdogControlFramePhysicalAddress; 1455 UINT32 WatchdogTimerGSIV; 1456 UINT32 WatchdogTimerFlags; 1457 } EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1458 1459 /// 1460 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1461 /// 1462 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1463 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1464 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1465 1466 // 1467 // NVDIMM Firmware Interface Table definition. 1468 // 1469 typedef struct { 1470 EFI_ACPI_DESCRIPTION_HEADER Header; 1471 UINT32 Reserved; 1472 } EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE; 1473 1474 // 1475 // NFIT Version (as defined in ACPI 6.2 spec.) 1476 // 1477 #define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1 1478 1479 // 1480 // Definition for NFIT Table Structure Types 1481 // 1482 #define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0 1483 #define EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1 1484 #define EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE_TYPE 2 1485 #define EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3 1486 #define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4 1487 #define EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5 1488 #define EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6 1489 1490 // 1491 // Definition for NFIT Structure Header 1492 // 1493 typedef struct { 1494 UINT16 Type; 1495 UINT16 Length; 1496 } EFI_ACPI_6_2_NFIT_STRUCTURE_HEADER; 1497 1498 // 1499 // Definition for System Physical Address Range Structure 1500 // 1501 #define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0 1502 #define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1 1503 #define EFI_ACPI_6_2_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }} 1504 #define EFI_ACPI_6_2_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }} 1505 #define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }} 1506 #define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }} 1507 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }} 1508 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }} 1509 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }} 1510 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }} 1511 typedef struct { 1512 UINT16 Type; 1513 UINT16 Length; 1514 UINT16 SPARangeStructureIndex; 1515 UINT16 Flags; 1516 UINT32 Reserved_8; 1517 UINT32 ProximityDomain; 1518 GUID AddressRangeTypeGUID; 1519 UINT64 SystemPhysicalAddressRangeBase; 1520 UINT64 SystemPhysicalAddressRangeLength; 1521 UINT64 AddressRangeMemoryMappingAttribute; 1522 } EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE; 1523 1524 // 1525 // Definition for Memory Device to System Physical Address Range Mapping Structure 1526 // 1527 typedef struct { 1528 UINT32 DIMMNumber : 4; 1529 UINT32 MemoryChannelNumber : 4; 1530 UINT32 MemoryControllerID : 4; 1531 UINT32 SocketID : 4; 1532 UINT32 NodeControllerID : 12; 1533 UINT32 Reserved_28 : 4; 1534 } EFI_ACPI_6_2_NFIT_DEVICE_HANDLE; 1535 1536 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0 1537 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1 1538 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2 1539 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3 1540 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4 1541 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5 1542 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6 1543 typedef struct { 1544 UINT16 Type; 1545 UINT16 Length; 1546 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1547 UINT16 NVDIMMPhysicalID; 1548 UINT16 NVDIMMRegionID; 1549 UINT16 SPARangeStructureIndex; 1550 UINT16 NVDIMMControlRegionStructureIndex; 1551 UINT64 NVDIMMRegionSize; 1552 UINT64 RegionOffset; 1553 UINT64 NVDIMMPhysicalAddressRegionBase; 1554 UINT16 InterleaveStructureIndex; 1555 UINT16 InterleaveWays; 1556 UINT16 NVDIMMStateFlags; 1557 UINT16 Reserved_46; 1558 } EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE; 1559 1560 // 1561 // Definition for Interleave Structure 1562 // 1563 typedef struct { 1564 UINT16 Type; 1565 UINT16 Length; 1566 UINT16 InterleaveStructureIndex; 1567 UINT16 Reserved_6; 1568 UINT32 NumberOfLines; 1569 UINT32 LineSize; 1570 // UINT32 LineOffset[NumberOfLines]; 1571 } EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE; 1572 1573 // 1574 // Definition for SMBIOS Management Information Structure 1575 // 1576 typedef struct { 1577 UINT16 Type; 1578 UINT16 Length; 1579 UINT32 Reserved_4; 1580 // UINT8 Data[]; 1581 } EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE; 1582 1583 // 1584 // Definition for NVDIMM Control Region Structure 1585 // 1586 #define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0 1587 1588 #define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0 1589 typedef struct { 1590 UINT16 Type; 1591 UINT16 Length; 1592 UINT16 NVDIMMControlRegionStructureIndex; 1593 UINT16 VendorID; 1594 UINT16 DeviceID; 1595 UINT16 RevisionID; 1596 UINT16 SubsystemVendorID; 1597 UINT16 SubsystemDeviceID; 1598 UINT16 SubsystemRevisionID; 1599 UINT8 ValidFields; 1600 UINT8 ManufacturingLocation; 1601 UINT16 ManufacturingDate; 1602 UINT8 Reserved_22[2]; 1603 UINT32 SerialNumber; 1604 UINT16 RegionFormatInterfaceCode; 1605 UINT16 NumberOfBlockControlWindows; 1606 UINT64 SizeOfBlockControlWindow; 1607 UINT64 CommandRegisterOffsetInBlockControlWindow; 1608 UINT64 SizeOfCommandRegisterInBlockControlWindows; 1609 UINT64 StatusRegisterOffsetInBlockControlWindow; 1610 UINT64 SizeOfStatusRegisterInBlockControlWindows; 1611 UINT16 NVDIMMControlRegionFlag; 1612 UINT8 Reserved_74[6]; 1613 } EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE; 1614 1615 // 1616 // Definition for NVDIMM Block Data Window Region Structure 1617 // 1618 typedef struct { 1619 UINT16 Type; 1620 UINT16 Length; 1621 UINT16 NVDIMMControlRegionStructureIndex; 1622 UINT16 NumberOfBlockDataWindows; 1623 UINT64 BlockDataWindowStartOffset; 1624 UINT64 SizeOfBlockDataWindow; 1625 UINT64 BlockAccessibleMemoryCapacity; 1626 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory; 1627 } EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE; 1628 1629 // 1630 // Definition for Flush Hint Address Structure 1631 // 1632 typedef struct { 1633 UINT16 Type; 1634 UINT16 Length; 1635 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1636 UINT16 NumberOfFlushHintAddresses; 1637 UINT8 Reserved_10[6]; 1638 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses]; 1639 } EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE; 1640 1641 /// 1642 /// Secure DEVices Table (SDEV) 1643 /// 1644 typedef struct { 1645 EFI_ACPI_DESCRIPTION_HEADER Header; 1646 } EFI_ACPI_6_2_SECURE_DEVICES_TABLE_HEADER; 1647 1648 /// 1649 /// SDEV Revision (as defined in ACPI 6.2 spec.) 1650 /// 1651 #define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_REVISION 0x01 1652 1653 /// 1654 /// Secure Device types 1655 /// 1656 #define EFI_ACPI_6_2_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01 1657 #define EFI_ACPI_6_2_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00 1658 1659 /// 1660 /// Secure Device flags 1661 /// 1662 #define EFI_ACPI_6_2_SDEV_FLAG_ALLOW_HANDOFF BIT0 1663 1664 /// 1665 /// SDEV Structure Header 1666 /// 1667 typedef struct { 1668 UINT8 Type; 1669 UINT8 Flags; 1670 UINT16 Length; 1671 } EFI_ACPI_6_2_SDEV_STRUCTURE_HEADER; 1672 1673 /// 1674 /// PCIe Endpoint Device based Secure Device Structure 1675 /// 1676 typedef struct { 1677 UINT8 Type; 1678 UINT8 Flags; 1679 UINT16 Length; 1680 UINT16 PciSegmentNumber; 1681 UINT16 StartBusNumber; 1682 UINT16 PciPathOffset; 1683 UINT16 PciPathLength; 1684 UINT16 VendorSpecificDataOffset; 1685 UINT16 VendorSpecificDataLength; 1686 } EFI_ACPI_6_2_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE; 1687 1688 /// 1689 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure 1690 /// 1691 typedef struct { 1692 UINT8 Type; 1693 UINT8 Flags; 1694 UINT16 Length; 1695 UINT16 DeviceIdentifierOffset; 1696 UINT16 DeviceIdentifierLength; 1697 UINT16 VendorSpecificDataOffset; 1698 UINT16 VendorSpecificDataLength; 1699 } EFI_ACPI_6_2_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE; 1700 1701 /// 1702 /// Boot Error Record Table (BERT) 1703 /// 1704 typedef struct { 1705 EFI_ACPI_DESCRIPTION_HEADER Header; 1706 UINT32 BootErrorRegionLength; 1707 UINT64 BootErrorRegion; 1708 } EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_HEADER; 1709 1710 /// 1711 /// BERT Version (as defined in ACPI 6.2 spec.) 1712 /// 1713 #define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1714 1715 /// 1716 /// Boot Error Region Block Status Definition 1717 /// 1718 typedef struct { 1719 UINT32 UncorrectableErrorValid : 1; 1720 UINT32 CorrectableErrorValid : 1; 1721 UINT32 MultipleUncorrectableErrors : 1; 1722 UINT32 MultipleCorrectableErrors : 1; 1723 UINT32 ErrorDataEntryCount : 10; 1724 UINT32 Reserved : 18; 1725 } EFI_ACPI_6_2_ERROR_BLOCK_STATUS; 1726 1727 /// 1728 /// Boot Error Region Definition 1729 /// 1730 typedef struct { 1731 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus; 1732 UINT32 RawDataOffset; 1733 UINT32 RawDataLength; 1734 UINT32 DataLength; 1735 UINT32 ErrorSeverity; 1736 } EFI_ACPI_6_2_BOOT_ERROR_REGION_STRUCTURE; 1737 1738 // 1739 // Boot Error Severity types 1740 // 1741 #define EFI_ACPI_6_2_ERROR_SEVERITY_RECOVERABLE 0x00 1742 #define EFI_ACPI_6_2_ERROR_SEVERITY_FATAL 0x01 1743 #define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTED 0x02 1744 #define EFI_ACPI_6_2_ERROR_SEVERITY_NONE 0x03 1745 // 1746 // The term 'Correctable' is no longer being used as an error severity of the 1747 // reported error since ACPI Specification Version 5.1 Errata B. 1748 // The below macro is considered as deprecated and should no longer be used. 1749 // 1750 #define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00 1751 1752 /// 1753 /// Generic Error Data Entry Definition 1754 /// 1755 typedef struct { 1756 UINT8 SectionType[16]; 1757 UINT32 ErrorSeverity; 1758 UINT16 Revision; 1759 UINT8 ValidationBits; 1760 UINT8 Flags; 1761 UINT32 ErrorDataLength; 1762 UINT8 FruId[16]; 1763 UINT8 FruText[20]; 1764 UINT8 Timestamp[8]; 1765 } EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1766 1767 /// 1768 /// Generic Error Data Entry Version (as defined in ACPI 6.2 spec.) 1769 /// 1770 #define EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300 1771 1772 /// 1773 /// HEST - Hardware Error Source Table 1774 /// 1775 typedef struct { 1776 EFI_ACPI_DESCRIPTION_HEADER Header; 1777 UINT32 ErrorSourceCount; 1778 } EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1779 1780 /// 1781 /// HEST Version (as defined in ACPI 6.2 spec.) 1782 /// 1783 #define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1784 1785 // 1786 // Error Source structure types. 1787 // 1788 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1789 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1790 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR 0x02 1791 #define EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER 0x06 1792 #define EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER 0x07 1793 #define EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER 0x08 1794 #define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR 0x09 1795 #define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A 1796 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B 1797 1798 // 1799 // Error Source structure flags. 1800 // 1801 #define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1802 #define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1803 #define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2) 1804 1805 /// 1806 /// IA-32 Architecture Machine Check Exception Structure Definition 1807 /// 1808 typedef struct { 1809 UINT16 Type; 1810 UINT16 SourceId; 1811 UINT8 Reserved0[2]; 1812 UINT8 Flags; 1813 UINT8 Enabled; 1814 UINT32 NumberOfRecordsToPreAllocate; 1815 UINT32 MaxSectionsPerRecord; 1816 UINT64 GlobalCapabilityInitData; 1817 UINT64 GlobalControlInitData; 1818 UINT8 NumberOfHardwareBanks; 1819 UINT8 Reserved1[7]; 1820 } EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1821 1822 /// 1823 /// IA-32 Architecture Machine Check Bank Structure Definition 1824 /// 1825 typedef struct { 1826 UINT8 BankNumber; 1827 UINT8 ClearStatusOnInitialization; 1828 UINT8 StatusDataFormat; 1829 UINT8 Reserved0; 1830 UINT32 ControlRegisterMsrAddress; 1831 UINT64 ControlInitData; 1832 UINT32 StatusRegisterMsrAddress; 1833 UINT32 AddressRegisterMsrAddress; 1834 UINT32 MiscRegisterMsrAddress; 1835 } EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1836 1837 /// 1838 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1839 /// 1840 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1841 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1842 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1843 1844 // 1845 // Hardware Error Notification types. All other values are reserved 1846 // 1847 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1848 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1849 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1850 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1851 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1852 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05 1853 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_MCE 0x06 1854 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07 1855 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08 1856 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09 1857 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A 1858 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B 1859 1860 /// 1861 /// Hardware Error Notification Configuration Write Enable Structure Definition 1862 /// 1863 typedef struct { 1864 UINT16 Type : 1; 1865 UINT16 PollInterval : 1; 1866 UINT16 SwitchToPollingThresholdValue : 1; 1867 UINT16 SwitchToPollingThresholdWindow : 1; 1868 UINT16 ErrorThresholdValue : 1; 1869 UINT16 ErrorThresholdWindow : 1; 1870 UINT16 Reserved : 10; 1871 } EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1872 1873 /// 1874 /// Hardware Error Notification Structure Definition 1875 /// 1876 typedef struct { 1877 UINT8 Type; 1878 UINT8 Length; 1879 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1880 UINT32 PollInterval; 1881 UINT32 Vector; 1882 UINT32 SwitchToPollingThresholdValue; 1883 UINT32 SwitchToPollingThresholdWindow; 1884 UINT32 ErrorThresholdValue; 1885 UINT32 ErrorThresholdWindow; 1886 } EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1887 1888 /// 1889 /// IA-32 Architecture Corrected Machine Check Structure Definition 1890 /// 1891 typedef struct { 1892 UINT16 Type; 1893 UINT16 SourceId; 1894 UINT8 Reserved0[2]; 1895 UINT8 Flags; 1896 UINT8 Enabled; 1897 UINT32 NumberOfRecordsToPreAllocate; 1898 UINT32 MaxSectionsPerRecord; 1899 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1900 UINT8 NumberOfHardwareBanks; 1901 UINT8 Reserved1[3]; 1902 } EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1903 1904 /// 1905 /// IA-32 Architecture NMI Error Structure Definition 1906 /// 1907 typedef struct { 1908 UINT16 Type; 1909 UINT16 SourceId; 1910 UINT8 Reserved0[2]; 1911 UINT32 NumberOfRecordsToPreAllocate; 1912 UINT32 MaxSectionsPerRecord; 1913 UINT32 MaxRawDataLength; 1914 } EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1915 1916 /// 1917 /// PCI Express Root Port AER Structure Definition 1918 /// 1919 typedef struct { 1920 UINT16 Type; 1921 UINT16 SourceId; 1922 UINT8 Reserved0[2]; 1923 UINT8 Flags; 1924 UINT8 Enabled; 1925 UINT32 NumberOfRecordsToPreAllocate; 1926 UINT32 MaxSectionsPerRecord; 1927 UINT32 Bus; 1928 UINT16 Device; 1929 UINT16 Function; 1930 UINT16 DeviceControl; 1931 UINT8 Reserved1[2]; 1932 UINT32 UncorrectableErrorMask; 1933 UINT32 UncorrectableErrorSeverity; 1934 UINT32 CorrectableErrorMask; 1935 UINT32 AdvancedErrorCapabilitiesAndControl; 1936 UINT32 RootErrorCommand; 1937 } EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1938 1939 /// 1940 /// PCI Express Device AER Structure Definition 1941 /// 1942 typedef struct { 1943 UINT16 Type; 1944 UINT16 SourceId; 1945 UINT8 Reserved0[2]; 1946 UINT8 Flags; 1947 UINT8 Enabled; 1948 UINT32 NumberOfRecordsToPreAllocate; 1949 UINT32 MaxSectionsPerRecord; 1950 UINT32 Bus; 1951 UINT16 Device; 1952 UINT16 Function; 1953 UINT16 DeviceControl; 1954 UINT8 Reserved1[2]; 1955 UINT32 UncorrectableErrorMask; 1956 UINT32 UncorrectableErrorSeverity; 1957 UINT32 CorrectableErrorMask; 1958 UINT32 AdvancedErrorCapabilitiesAndControl; 1959 } EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1960 1961 /// 1962 /// PCI Express Bridge AER Structure Definition 1963 /// 1964 typedef struct { 1965 UINT16 Type; 1966 UINT16 SourceId; 1967 UINT8 Reserved0[2]; 1968 UINT8 Flags; 1969 UINT8 Enabled; 1970 UINT32 NumberOfRecordsToPreAllocate; 1971 UINT32 MaxSectionsPerRecord; 1972 UINT32 Bus; 1973 UINT16 Device; 1974 UINT16 Function; 1975 UINT16 DeviceControl; 1976 UINT8 Reserved1[2]; 1977 UINT32 UncorrectableErrorMask; 1978 UINT32 UncorrectableErrorSeverity; 1979 UINT32 CorrectableErrorMask; 1980 UINT32 AdvancedErrorCapabilitiesAndControl; 1981 UINT32 SecondaryUncorrectableErrorMask; 1982 UINT32 SecondaryUncorrectableErrorSeverity; 1983 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1984 } EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1985 1986 /// 1987 /// Generic Hardware Error Source Structure Definition 1988 /// 1989 typedef struct { 1990 UINT16 Type; 1991 UINT16 SourceId; 1992 UINT16 RelatedSourceId; 1993 UINT8 Flags; 1994 UINT8 Enabled; 1995 UINT32 NumberOfRecordsToPreAllocate; 1996 UINT32 MaxSectionsPerRecord; 1997 UINT32 MaxRawDataLength; 1998 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1999 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 2000 UINT32 ErrorStatusBlockLength; 2001 } EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 2002 2003 /// 2004 /// Generic Hardware Error Source Version 2 Structure Definition 2005 /// 2006 typedef struct { 2007 UINT16 Type; 2008 UINT16 SourceId; 2009 UINT16 RelatedSourceId; 2010 UINT8 Flags; 2011 UINT8 Enabled; 2012 UINT32 NumberOfRecordsToPreAllocate; 2013 UINT32 MaxSectionsPerRecord; 2014 UINT32 MaxRawDataLength; 2015 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 2016 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 2017 UINT32 ErrorStatusBlockLength; 2018 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ReadAckRegister; 2019 UINT64 ReadAckPreserve; 2020 UINT64 ReadAckWrite; 2021 } EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE; 2022 2023 /// 2024 /// Generic Error Status Definition 2025 /// 2026 typedef struct { 2027 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus; 2028 UINT32 RawDataOffset; 2029 UINT32 RawDataLength; 2030 UINT32 DataLength; 2031 UINT32 ErrorSeverity; 2032 } EFI_ACPI_6_2_GENERIC_ERROR_STATUS_STRUCTURE; 2033 2034 /// 2035 /// IA-32 Architecture Deferred Machine Check Structure Definition 2036 /// 2037 typedef struct { 2038 UINT16 Type; 2039 UINT16 SourceId; 2040 UINT8 Reserved0[2]; 2041 UINT8 Flags; 2042 UINT8 Enabled; 2043 UINT32 NumberOfRecordsToPreAllocate; 2044 UINT32 MaxSectionsPerRecord; 2045 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 2046 UINT8 NumberOfHardwareBanks; 2047 UINT8 Reserved1[3]; 2048 } EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE; 2049 2050 /// 2051 /// HMAT - Heterogeneous Memory Attribute Table 2052 /// 2053 typedef struct { 2054 EFI_ACPI_DESCRIPTION_HEADER Header; 2055 UINT8 Reserved[4]; 2056 } EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER; 2057 2058 /// 2059 /// HMAT Revision (as defined in ACPI 6.2 spec.) 2060 /// 2061 #define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x01 2062 2063 /// 2064 /// HMAT types 2065 /// 2066 #define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SUBSYSTEM_ADDRESS_RANGE 0x00 2067 #define EFI_ACPI_6_2_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01 2068 #define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02 2069 2070 /// 2071 /// HMAT Structure Header 2072 /// 2073 typedef struct { 2074 UINT16 Type; 2075 UINT8 Reserved[2]; 2076 UINT32 Length; 2077 } EFI_ACPI_6_2_HMAT_STRUCTURE_HEADER; 2078 2079 /// 2080 /// Memory Subsystem Address Range Structure flags 2081 /// 2082 typedef struct { 2083 UINT16 ProcessorProximityDomainValid : 1; 2084 UINT16 MemoryProximityDomainValid : 1; 2085 UINT16 ReservationHint : 1; 2086 UINT16 Reserved : 13; 2087 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS; 2088 2089 /// 2090 /// Memory Subsystem Address Range Structure 2091 /// 2092 typedef struct { 2093 UINT16 Type; 2094 UINT8 Reserved[2]; 2095 UINT32 Length; 2096 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS Flags; 2097 UINT8 Reserved1[2]; 2098 UINT32 ProcessorProximityDomain; 2099 UINT32 MemoryProximityDomain; 2100 UINT8 Reserved2[4]; 2101 UINT64 SystemPhysicalAddressRangeBase; 2102 UINT64 SystemPhysicalAddressRangeLength; 2103 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE; 2104 2105 /// 2106 /// System Locality Latency and Bandwidth Information Structure flags 2107 /// 2108 typedef struct { 2109 UINT8 MemoryHierarchy : 5; 2110 UINT8 Reserved : 3; 2111 } EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS; 2112 2113 /// 2114 /// System Locality Latency and Bandwidth Information Structure 2115 /// 2116 typedef struct { 2117 UINT16 Type; 2118 UINT8 Reserved[2]; 2119 UINT32 Length; 2120 EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags; 2121 UINT8 DataType; 2122 UINT8 Reserved1[2]; 2123 UINT32 NumberOfInitiatorProximityDomains; 2124 UINT32 NumberOfTargetProximityDomains; 2125 UINT8 Reserved2[4]; 2126 UINT64 EntryBaseUnit; 2127 } EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO; 2128 2129 /// 2130 /// Memory Side Cache Information Structure cache attributes 2131 /// 2132 typedef struct { 2133 UINT32 TotalCacheLevels : 4; 2134 UINT32 CacheLevel : 4; 2135 UINT32 CacheAssociativity : 4; 2136 UINT32 WritePolicy : 4; 2137 UINT32 CacheLineSize : 16; 2138 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES; 2139 2140 /// 2141 /// Memory Side Cache Information Structure 2142 /// 2143 typedef struct { 2144 UINT16 Type; 2145 UINT8 Reserved[2]; 2146 UINT32 Length; 2147 UINT32 MemoryProximityDomain; 2148 UINT8 Reserved1[4]; 2149 UINT64 MemorySideCacheSize; 2150 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes; 2151 UINT8 Reserved2[2]; 2152 UINT16 NumberOfSmbiosHandles; 2153 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO; 2154 2155 /// 2156 /// ERST - Error Record Serialization Table 2157 /// 2158 typedef struct { 2159 EFI_ACPI_DESCRIPTION_HEADER Header; 2160 UINT32 SerializationHeaderSize; 2161 UINT8 Reserved0[4]; 2162 UINT32 InstructionEntryCount; 2163 } EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 2164 2165 /// 2166 /// ERST Version (as defined in ACPI 6.2 spec.) 2167 /// 2168 #define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 2169 2170 /// 2171 /// ERST Serialization Actions 2172 /// 2173 #define EFI_ACPI_6_2_ERST_BEGIN_WRITE_OPERATION 0x00 2174 #define EFI_ACPI_6_2_ERST_BEGIN_READ_OPERATION 0x01 2175 #define EFI_ACPI_6_2_ERST_BEGIN_CLEAR_OPERATION 0x02 2176 #define EFI_ACPI_6_2_ERST_END_OPERATION 0x03 2177 #define EFI_ACPI_6_2_ERST_SET_RECORD_OFFSET 0x04 2178 #define EFI_ACPI_6_2_ERST_EXECUTE_OPERATION 0x05 2179 #define EFI_ACPI_6_2_ERST_CHECK_BUSY_STATUS 0x06 2180 #define EFI_ACPI_6_2_ERST_GET_COMMAND_STATUS 0x07 2181 #define EFI_ACPI_6_2_ERST_GET_RECORD_IDENTIFIER 0x08 2182 #define EFI_ACPI_6_2_ERST_SET_RECORD_IDENTIFIER 0x09 2183 #define EFI_ACPI_6_2_ERST_GET_RECORD_COUNT 0x0A 2184 #define EFI_ACPI_6_2_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 2185 #define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 2186 #define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 2187 #define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 2188 #define EFI_ACPI_6_2_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10 2189 2190 /// 2191 /// ERST Action Command Status 2192 /// 2193 #define EFI_ACPI_6_2_ERST_STATUS_SUCCESS 0x00 2194 #define EFI_ACPI_6_2_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 2195 #define EFI_ACPI_6_2_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 2196 #define EFI_ACPI_6_2_ERST_STATUS_FAILED 0x03 2197 #define EFI_ACPI_6_2_ERST_STATUS_RECORD_STORE_EMPTY 0x04 2198 #define EFI_ACPI_6_2_ERST_STATUS_RECORD_NOT_FOUND 0x05 2199 2200 /// 2201 /// ERST Serialization Instructions 2202 /// 2203 #define EFI_ACPI_6_2_ERST_READ_REGISTER 0x00 2204 #define EFI_ACPI_6_2_ERST_READ_REGISTER_VALUE 0x01 2205 #define EFI_ACPI_6_2_ERST_WRITE_REGISTER 0x02 2206 #define EFI_ACPI_6_2_ERST_WRITE_REGISTER_VALUE 0x03 2207 #define EFI_ACPI_6_2_ERST_NOOP 0x04 2208 #define EFI_ACPI_6_2_ERST_LOAD_VAR1 0x05 2209 #define EFI_ACPI_6_2_ERST_LOAD_VAR2 0x06 2210 #define EFI_ACPI_6_2_ERST_STORE_VAR1 0x07 2211 #define EFI_ACPI_6_2_ERST_ADD 0x08 2212 #define EFI_ACPI_6_2_ERST_SUBTRACT 0x09 2213 #define EFI_ACPI_6_2_ERST_ADD_VALUE 0x0A 2214 #define EFI_ACPI_6_2_ERST_SUBTRACT_VALUE 0x0B 2215 #define EFI_ACPI_6_2_ERST_STALL 0x0C 2216 #define EFI_ACPI_6_2_ERST_STALL_WHILE_TRUE 0x0D 2217 #define EFI_ACPI_6_2_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 2218 #define EFI_ACPI_6_2_ERST_GOTO 0x0F 2219 #define EFI_ACPI_6_2_ERST_SET_SRC_ADDRESS_BASE 0x10 2220 #define EFI_ACPI_6_2_ERST_SET_DST_ADDRESS_BASE 0x11 2221 #define EFI_ACPI_6_2_ERST_MOVE_DATA 0x12 2222 2223 /// 2224 /// ERST Instruction Flags 2225 /// 2226 #define EFI_ACPI_6_2_ERST_PRESERVE_REGISTER 0x01 2227 2228 /// 2229 /// ERST Serialization Instruction Entry 2230 /// 2231 typedef struct { 2232 UINT8 SerializationAction; 2233 UINT8 Instruction; 2234 UINT8 Flags; 2235 UINT8 Reserved0; 2236 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 2237 UINT64 Value; 2238 UINT64 Mask; 2239 } EFI_ACPI_6_2_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 2240 2241 /// 2242 /// EINJ - Error Injection Table 2243 /// 2244 typedef struct { 2245 EFI_ACPI_DESCRIPTION_HEADER Header; 2246 UINT32 InjectionHeaderSize; 2247 UINT8 InjectionFlags; 2248 UINT8 Reserved0[3]; 2249 UINT32 InjectionEntryCount; 2250 } EFI_ACPI_6_2_ERROR_INJECTION_TABLE_HEADER; 2251 2252 /// 2253 /// EINJ Version (as defined in ACPI 6.2 spec.) 2254 /// 2255 #define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_REVISION 0x01 2256 2257 /// 2258 /// EINJ Error Injection Actions 2259 /// 2260 #define EFI_ACPI_6_2_EINJ_BEGIN_INJECTION_OPERATION 0x00 2261 #define EFI_ACPI_6_2_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 2262 #define EFI_ACPI_6_2_EINJ_SET_ERROR_TYPE 0x02 2263 #define EFI_ACPI_6_2_EINJ_GET_ERROR_TYPE 0x03 2264 #define EFI_ACPI_6_2_EINJ_END_OPERATION 0x04 2265 #define EFI_ACPI_6_2_EINJ_EXECUTE_OPERATION 0x05 2266 #define EFI_ACPI_6_2_EINJ_CHECK_BUSY_STATUS 0x06 2267 #define EFI_ACPI_6_2_EINJ_GET_COMMAND_STATUS 0x07 2268 #define EFI_ACPI_6_2_EINJ_TRIGGER_ERROR 0xFF 2269 2270 /// 2271 /// EINJ Action Command Status 2272 /// 2273 #define EFI_ACPI_6_2_EINJ_STATUS_SUCCESS 0x00 2274 #define EFI_ACPI_6_2_EINJ_STATUS_UNKNOWN_FAILURE 0x01 2275 #define EFI_ACPI_6_2_EINJ_STATUS_INVALID_ACCESS 0x02 2276 2277 /// 2278 /// EINJ Error Type Definition 2279 /// 2280 #define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 2281 #define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 2282 #define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 2283 #define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 2284 #define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 2285 #define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 2286 #define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 2287 #define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 2288 #define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 2289 #define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 2290 #define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 2291 #define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 2292 2293 /// 2294 /// EINJ Injection Instructions 2295 /// 2296 #define EFI_ACPI_6_2_EINJ_READ_REGISTER 0x00 2297 #define EFI_ACPI_6_2_EINJ_READ_REGISTER_VALUE 0x01 2298 #define EFI_ACPI_6_2_EINJ_WRITE_REGISTER 0x02 2299 #define EFI_ACPI_6_2_EINJ_WRITE_REGISTER_VALUE 0x03 2300 #define EFI_ACPI_6_2_EINJ_NOOP 0x04 2301 2302 /// 2303 /// EINJ Instruction Flags 2304 /// 2305 #define EFI_ACPI_6_2_EINJ_PRESERVE_REGISTER 0x01 2306 2307 /// 2308 /// EINJ Injection Instruction Entry 2309 /// 2310 typedef struct { 2311 UINT8 InjectionAction; 2312 UINT8 Instruction; 2313 UINT8 Flags; 2314 UINT8 Reserved0; 2315 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 2316 UINT64 Value; 2317 UINT64 Mask; 2318 } EFI_ACPI_6_2_EINJ_INJECTION_INSTRUCTION_ENTRY; 2319 2320 /// 2321 /// EINJ Trigger Action Table 2322 /// 2323 typedef struct { 2324 UINT32 HeaderSize; 2325 UINT32 Revision; 2326 UINT32 TableSize; 2327 UINT32 EntryCount; 2328 } EFI_ACPI_6_2_EINJ_TRIGGER_ACTION_TABLE; 2329 2330 /// 2331 /// Platform Communications Channel Table (PCCT) 2332 /// 2333 typedef struct { 2334 EFI_ACPI_DESCRIPTION_HEADER Header; 2335 UINT32 Flags; 2336 UINT64 Reserved; 2337 } EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 2338 2339 /// 2340 /// PCCT Version (as defined in ACPI 6.2 spec.) 2341 /// 2342 #define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02 2343 2344 /// 2345 /// PCCT Global Flags 2346 /// 2347 #define EFI_ACPI_6_2_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0 2348 2349 // 2350 // PCCT Subspace type 2351 // 2352 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_GENERIC 0x00 2353 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01 2354 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02 2355 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03 2356 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04 2357 2358 /// 2359 /// PCC Subspace Structure Header 2360 /// 2361 typedef struct { 2362 UINT8 Type; 2363 UINT8 Length; 2364 } EFI_ACPI_6_2_PCCT_SUBSPACE_HEADER; 2365 2366 /// 2367 /// Generic Communications Subspace Structure 2368 /// 2369 typedef struct { 2370 UINT8 Type; 2371 UINT8 Length; 2372 UINT8 Reserved[6]; 2373 UINT64 BaseAddress; 2374 UINT64 AddressLength; 2375 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2376 UINT64 DoorbellPreserve; 2377 UINT64 DoorbellWrite; 2378 UINT32 NominalLatency; 2379 UINT32 MaximumPeriodicAccessRate; 2380 UINT16 MinimumRequestTurnaroundTime; 2381 } EFI_ACPI_6_2_PCCT_SUBSPACE_GENERIC; 2382 2383 /// 2384 /// Generic Communications Channel Shared Memory Region 2385 /// 2386 2387 typedef struct { 2388 UINT8 Command; 2389 UINT8 Reserved : 7; 2390 UINT8 NotifyOnCompletion : 1; 2391 } EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 2392 2393 typedef struct { 2394 UINT8 CommandComplete : 1; 2395 UINT8 PlatformInterrupt : 1; 2396 UINT8 Error : 1; 2397 UINT8 PlatformNotification : 1; 2398 UINT8 Reserved : 4; 2399 UINT8 Reserved1; 2400 } EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 2401 2402 typedef struct { 2403 UINT32 Signature; 2404 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 2405 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 2406 } EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 2407 2408 #define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0 2409 #define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1 2410 2411 /// 2412 /// Type 1 HW-Reduced Communications Subspace Structure 2413 /// 2414 typedef struct { 2415 UINT8 Type; 2416 UINT8 Length; 2417 UINT32 PlatformInterrupt; 2418 UINT8 PlatformInterruptFlags; 2419 UINT8 Reserved; 2420 UINT64 BaseAddress; 2421 UINT64 AddressLength; 2422 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2423 UINT64 DoorbellPreserve; 2424 UINT64 DoorbellWrite; 2425 UINT32 NominalLatency; 2426 UINT32 MaximumPeriodicAccessRate; 2427 UINT16 MinimumRequestTurnaroundTime; 2428 } EFI_ACPI_6_2_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS; 2429 2430 /// 2431 /// Type 2 HW-Reduced Communications Subspace Structure 2432 /// 2433 typedef struct { 2434 UINT8 Type; 2435 UINT8 Length; 2436 UINT32 PlatformInterrupt; 2437 UINT8 PlatformInterruptFlags; 2438 UINT8 Reserved; 2439 UINT64 BaseAddress; 2440 UINT64 AddressLength; 2441 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2442 UINT64 DoorbellPreserve; 2443 UINT64 DoorbellWrite; 2444 UINT32 NominalLatency; 2445 UINT32 MaximumPeriodicAccessRate; 2446 UINT16 MinimumRequestTurnaroundTime; 2447 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister; 2448 UINT64 PlatformInterruptAckPreserve; 2449 UINT64 PlatformInterruptAckWrite; 2450 } EFI_ACPI_6_2_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS; 2451 2452 /// 2453 /// Type 3 Extended PCC Subspace Structure 2454 /// 2455 typedef struct { 2456 UINT8 Type; 2457 UINT8 Length; 2458 UINT32 PlatformInterrupt; 2459 UINT8 PlatformInterruptFlags; 2460 UINT8 Reserved; 2461 UINT64 BaseAddress; 2462 UINT32 AddressLength; 2463 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2464 UINT64 DoorbellPreserve; 2465 UINT64 DoorbellWrite; 2466 UINT32 NominalLatency; 2467 UINT32 MaximumPeriodicAccessRate; 2468 UINT32 MinimumRequestTurnaroundTime; 2469 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister; 2470 UINT64 PlatformInterruptAckPreserve; 2471 UINT64 PlatformInterruptAckSet; 2472 UINT8 Reserved1[8]; 2473 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister; 2474 UINT64 CommandCompleteCheckMask; 2475 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister; 2476 UINT64 CommandCompleteUpdatePreserve; 2477 UINT64 CommandCompleteUpdateSet; 2478 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister; 2479 UINT64 ErrorStatusMask; 2480 } EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC; 2481 2482 /// 2483 /// Type 4 Extended PCC Subspace Structure 2484 /// 2485 typedef EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_2_PCCT_SUBSPACE_4_EXTENDED_PCC; 2486 2487 #define EFI_ACPI_6_2_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0 2488 2489 typedef struct { 2490 UINT32 Signature; 2491 UINT32 Flags; 2492 UINT32 Length; 2493 UINT32 Command; 2494 } EFI_ACPI_6_2_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER; 2495 2496 /// 2497 /// Platform Debug Trigger Table (PDTT) 2498 /// 2499 typedef struct { 2500 EFI_ACPI_DESCRIPTION_HEADER Header; 2501 UINT8 TriggerCount; 2502 UINT8 Reserved[3]; 2503 UINT32 TriggerIdentifierArrayOffset; 2504 } EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER; 2505 2506 /// 2507 /// PDTT Revision (as defined in ACPI 6.2 spec.) 2508 /// 2509 #define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00 2510 2511 /// 2512 /// PDTT Platform Communication Channel Identifier Structure 2513 /// 2514 typedef struct { 2515 UINT16 SubChannelIdentifer : 8; 2516 UINT16 Runtime : 1; 2517 UINT16 WaitForCompletion : 1; 2518 UINT16 Reserved : 6; 2519 } EFI_ACPI_6_2_PDTT_PCC_IDENTIFIER; 2520 2521 /// 2522 /// PCC Commands Codes used by Platform Debug Trigger Table 2523 /// 2524 #define EFI_ACPI_6_2_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00 2525 #define EFI_ACPI_6_2_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01 2526 2527 /// 2528 /// PPTT Platform Communication Channel 2529 /// 2530 typedef EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_2_PDTT_PCC; 2531 2532 /// 2533 /// Processor Properties Topology Table (PPTT) 2534 /// 2535 typedef struct { 2536 EFI_ACPI_DESCRIPTION_HEADER Header; 2537 } EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER; 2538 2539 /// 2540 /// PPTT Revision (as defined in ACPI 6.2 spec.) 2541 /// 2542 #define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01 2543 2544 /// 2545 /// PPTT types 2546 /// 2547 #define EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR 0x00 2548 #define EFI_ACPI_6_2_PPTT_TYPE_CACHE 0x01 2549 #define EFI_ACPI_6_2_PPTT_TYPE_ID 0x02 2550 2551 /// 2552 /// PPTT Structure Header 2553 /// 2554 typedef struct { 2555 UINT8 Type; 2556 UINT8 Length; 2557 UINT8 Reserved[2]; 2558 } EFI_ACPI_6_2_PPTT_STRUCTURE_HEADER; 2559 2560 /// 2561 /// For PPTT struct processor flags 2562 /// 2563 #define EFI_ACPI_6_2_PPTT_PROCESSOR_ID_INVALID 0x0 2564 #define EFI_ACPI_6_2_PPTT_PROCESSOR_ID_VALID 0x1 2565 2566 /// 2567 /// Processor hierarchy node structure flags 2568 /// 2569 typedef struct { 2570 UINT32 PhysicalPackage : 1; 2571 UINT32 AcpiProcessorIdValid : 1; 2572 UINT32 Reserved : 30; 2573 } EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS; 2574 2575 /// 2576 /// Processor hierarchy node structure 2577 /// 2578 typedef struct { 2579 UINT8 Type; 2580 UINT8 Length; 2581 UINT8 Reserved[2]; 2582 EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags; 2583 UINT32 Parent; 2584 UINT32 AcpiProcessorId; 2585 UINT32 NumberOfPrivateResources; 2586 } EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR; 2587 2588 /// 2589 /// Cache Type Structure flags 2590 /// 2591 typedef struct { 2592 UINT32 SizePropertyValid : 1; 2593 UINT32 NumberOfSetsValid : 1; 2594 UINT32 AssociativityValid : 1; 2595 UINT32 AllocationTypeValid : 1; 2596 UINT32 CacheTypeValid : 1; 2597 UINT32 WritePolicyValid : 1; 2598 UINT32 LineSizeValid : 1; 2599 UINT32 Reserved : 25; 2600 } EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS; 2601 2602 /// 2603 /// For cache attributes 2604 /// 2605 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0 2606 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1 2607 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2 2608 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0 2609 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1 2610 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2 2611 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0 2612 #define EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1 2613 2614 /// 2615 /// Cache Type Structure cache attributes 2616 /// 2617 typedef struct { 2618 UINT8 AllocationType : 2; 2619 UINT8 CacheType : 2; 2620 UINT8 WritePolicy : 1; 2621 UINT8 Reserved : 3; 2622 } EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES; 2623 2624 /// 2625 /// Cache Type Structure 2626 /// 2627 typedef struct { 2628 UINT8 Type; 2629 UINT8 Length; 2630 UINT8 Reserved[2]; 2631 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS Flags; 2632 UINT32 NextLevelOfCache; 2633 UINT32 Size; 2634 UINT32 NumberOfSets; 2635 UINT8 Associativity; 2636 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes; 2637 UINT16 LineSize; 2638 } EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE; 2639 2640 /// 2641 /// ID structure 2642 /// 2643 typedef struct { 2644 UINT8 Type; 2645 UINT8 Length; 2646 UINT8 Reserved[2]; 2647 UINT32 VendorId; 2648 UINT64 Level1Id; 2649 UINT64 Level2Id; 2650 UINT16 MajorRev; 2651 UINT16 MinorRev; 2652 UINT16 SpinRev; 2653 } EFI_ACPI_6_2_PPTT_STRUCTURE_ID; 2654 2655 // 2656 // Known table signatures 2657 // 2658 2659 /// 2660 /// "RSD PTR " Root System Description Pointer 2661 /// 2662 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 2663 2664 /// 2665 /// "APIC" Multiple APIC Description Table 2666 /// 2667 #define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 2668 2669 /// 2670 /// "BERT" Boot Error Record Table 2671 /// 2672 #define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 2673 2674 /// 2675 /// "BGRT" Boot Graphics Resource Table 2676 /// 2677 #define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 2678 2679 /// 2680 /// "CPEP" Corrected Platform Error Polling Table 2681 /// 2682 #define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 2683 2684 /// 2685 /// "DSDT" Differentiated System Description Table 2686 /// 2687 #define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 2688 2689 /// 2690 /// "ECDT" Embedded Controller Boot Resources Table 2691 /// 2692 #define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 2693 2694 /// 2695 /// "EINJ" Error Injection Table 2696 /// 2697 #define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 2698 2699 /// 2700 /// "ERST" Error Record Serialization Table 2701 /// 2702 #define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 2703 2704 /// 2705 /// "FACP" Fixed ACPI Description Table 2706 /// 2707 #define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 2708 2709 /// 2710 /// "FACS" Firmware ACPI Control Structure 2711 /// 2712 #define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 2713 2714 /// 2715 /// "FPDT" Firmware Performance Data Table 2716 /// 2717 #define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 2718 2719 /// 2720 /// "GTDT" Generic Timer Description Table 2721 /// 2722 #define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 2723 2724 /// 2725 /// "HEST" Hardware Error Source Table 2726 /// 2727 #define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 2728 2729 /// 2730 /// "HMAT" Heterogeneous Memory Attribute Table 2731 /// 2732 #define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T') 2733 2734 /// 2735 /// "MPST" Memory Power State Table 2736 /// 2737 #define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 2738 2739 /// 2740 /// "MSCT" Maximum System Characteristics Table 2741 /// 2742 #define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 2743 2744 /// 2745 /// "NFIT" NVDIMM Firmware Interface Table 2746 /// 2747 #define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T') 2748 2749 /// 2750 /// "PDTT" Platform Debug Trigger Table 2751 /// 2752 #define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T') 2753 2754 /// 2755 /// "PMTT" Platform Memory Topology Table 2756 /// 2757 #define EFI_ACPI_6_2_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 2758 2759 /// 2760 /// "PPTT" Processor Properties Topology Table 2761 /// 2762 #define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T') 2763 2764 /// 2765 /// "PSDT" Persistent System Description Table 2766 /// 2767 #define EFI_ACPI_6_2_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 2768 2769 /// 2770 /// "RASF" ACPI RAS Feature Table 2771 /// 2772 #define EFI_ACPI_6_2_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 2773 2774 /// 2775 /// "RSDT" Root System Description Table 2776 /// 2777 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 2778 2779 /// 2780 /// "SBST" Smart Battery Specification Table 2781 /// 2782 #define EFI_ACPI_6_2_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 2783 2784 /// 2785 /// "SDEV" Secure DEVices Table 2786 /// 2787 #define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V') 2788 2789 /// 2790 /// "SLIT" System Locality Information Table 2791 /// 2792 #define EFI_ACPI_6_2_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2793 2794 /// 2795 /// "SRAT" System Resource Affinity Table 2796 /// 2797 #define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2798 2799 /// 2800 /// "SSDT" Secondary System Description Table 2801 /// 2802 #define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2803 2804 /// 2805 /// "XSDT" Extended System Description Table 2806 /// 2807 #define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2808 2809 /// 2810 /// "BOOT" MS Simple Boot Spec 2811 /// 2812 #define EFI_ACPI_6_2_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2813 2814 /// 2815 /// "CSRT" MS Core System Resource Table 2816 /// 2817 #define EFI_ACPI_6_2_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2818 2819 /// 2820 /// "DBG2" MS Debug Port 2 Spec 2821 /// 2822 #define EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2823 2824 /// 2825 /// "DBGP" MS Debug Port Spec 2826 /// 2827 #define EFI_ACPI_6_2_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2828 2829 /// 2830 /// "DMAR" DMA Remapping Table 2831 /// 2832 #define EFI_ACPI_6_2_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2833 2834 /// 2835 /// "DPPT" DMA Protection Policy Table 2836 /// 2837 #define EFI_ACPI_6_2_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T') 2838 2839 /// 2840 /// "DRTM" Dynamic Root of Trust for Measurement Table 2841 /// 2842 #define EFI_ACPI_6_2_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2843 2844 /// 2845 /// "ETDT" Event Timer Description Table 2846 /// 2847 #define EFI_ACPI_6_2_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2848 2849 /// 2850 /// "HPET" IA-PC High Precision Event Timer Table 2851 /// 2852 #define EFI_ACPI_6_2_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2853 2854 /// 2855 /// "iBFT" iSCSI Boot Firmware Table 2856 /// 2857 #define EFI_ACPI_6_2_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2858 2859 /// 2860 /// "IORT" I/O Remapping Table 2861 /// 2862 #define EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T') 2863 2864 /// 2865 /// "IVRS" I/O Virtualization Reporting Structure 2866 /// 2867 #define EFI_ACPI_6_2_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2868 2869 /// 2870 /// "LPIT" Low Power Idle Table 2871 /// 2872 #define EFI_ACPI_6_2_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2873 2874 /// 2875 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2876 /// 2877 #define EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2878 2879 /// 2880 /// "MCHI" Management Controller Host Interface Table 2881 /// 2882 #define EFI_ACPI_6_2_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2883 2884 /// 2885 /// "MSDM" MS Data Management Table 2886 /// 2887 #define EFI_ACPI_6_2_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2888 2889 /// 2890 /// "PCCT" Platform Communications Channel Table 2891 /// 2892 #define EFI_ACPI_6_2_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') 2893 2894 /// 2895 /// "SDEI" Software Delegated Exceptions Interface Table 2896 /// 2897 #define EFI_ACPI_6_2_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I') 2898 2899 /// 2900 /// "SLIC" MS Software Licensing Table Specification 2901 /// 2902 #define EFI_ACPI_6_2_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2903 2904 /// 2905 /// "SPCR" Serial Port Console Redirection Table 2906 /// 2907 #define EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2908 2909 /// 2910 /// "SPMI" Server Platform Management Interface Table 2911 /// 2912 #define EFI_ACPI_6_2_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2913 2914 /// 2915 /// "STAO" _STA Override Table 2916 /// 2917 #define EFI_ACPI_6_2_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O') 2918 2919 /// 2920 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2921 /// 2922 #define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2923 2924 /// 2925 /// "TPM2" Trusted Computing Platform 1 Table 2926 /// 2927 #define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2928 2929 /// 2930 /// "UEFI" UEFI ACPI Data Table 2931 /// 2932 #define EFI_ACPI_6_2_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2933 2934 /// 2935 /// "WAET" Windows ACPI Emulated Devices Table 2936 /// 2937 #define EFI_ACPI_6_2_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2938 2939 /// 2940 /// "WDAT" Watchdog Action Table 2941 /// 2942 #define EFI_ACPI_6_2_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2943 2944 /// 2945 /// "WDRT" Watchdog Resource Table 2946 /// 2947 #define EFI_ACPI_6_2_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2948 2949 /// 2950 /// "WPBT" MS Platform Binary Table 2951 /// 2952 #define EFI_ACPI_6_2_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2953 2954 /// 2955 /// "WSMT" Windows SMM Security Mitigation Table 2956 /// 2957 #define EFI_ACPI_6_2_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T') 2958 2959 /// 2960 /// "XENV" Xen Project Table 2961 /// 2962 #define EFI_ACPI_6_2_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V') 2963 2964 #pragma pack() 2965 2966 #endif 2967