1 /** @file 2 ACPI 6.0 definitions from the ACPI Specification Revision 6.0 Errata A January, 2016. 3 4 Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR> 5 (C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP<BR> 6 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> 7 SPDX-License-Identifier: BSD-2-Clause-Patent 8 **/ 9 10 #ifndef _ACPI_6_0_H_ 11 #define _ACPI_6_0_H_ 12 13 #include <IndustryStandard/Acpi51.h> 14 15 // 16 // Ensure proper structure formats 17 // 18 #pragma pack(1) 19 20 /// 21 /// ACPI 6.0 Generic Address Space definition 22 /// 23 typedef struct { 24 UINT8 AddressSpaceId; 25 UINT8 RegisterBitWidth; 26 UINT8 RegisterBitOffset; 27 UINT8 AccessSize; 28 UINT64 Address; 29 } EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE; 30 31 // 32 // Generic Address Space Address IDs 33 // 34 #define EFI_ACPI_6_0_SYSTEM_MEMORY 0 35 #define EFI_ACPI_6_0_SYSTEM_IO 1 36 #define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2 37 #define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3 38 #define EFI_ACPI_6_0_SMBUS 4 39 #define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A 40 #define EFI_ACPI_6_0_FUNCTIONAL_FIXED_HARDWARE 0x7F 41 42 // 43 // Generic Address Space Access Sizes 44 // 45 #define EFI_ACPI_6_0_UNDEFINED 0 46 #define EFI_ACPI_6_0_BYTE 1 47 #define EFI_ACPI_6_0_WORD 2 48 #define EFI_ACPI_6_0_DWORD 3 49 #define EFI_ACPI_6_0_QWORD 4 50 51 // 52 // ACPI 6.0 table structures 53 // 54 55 /// 56 /// Root System Description Pointer Structure 57 /// 58 typedef struct { 59 UINT64 Signature; 60 UINT8 Checksum; 61 UINT8 OemId[6]; 62 UINT8 Revision; 63 UINT32 RsdtAddress; 64 UINT32 Length; 65 UINT64 XsdtAddress; 66 UINT8 ExtendedChecksum; 67 UINT8 Reserved[3]; 68 } EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER; 69 70 /// 71 /// RSD_PTR Revision (as defined in ACPI 6.0 spec.) 72 /// 73 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2 74 75 /// 76 /// Common table header, this prefaces all ACPI tables, including FACS, but 77 /// excluding the RSD PTR structure 78 /// 79 typedef struct { 80 UINT32 Signature; 81 UINT32 Length; 82 } EFI_ACPI_6_0_COMMON_HEADER; 83 84 // 85 // Root System Description Table 86 // No definition needed as it is a common description table header, the same with 87 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 88 // 89 90 /// 91 /// RSDT Revision (as defined in ACPI 6.0 spec.) 92 /// 93 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 94 95 // 96 // Extended System Description Table 97 // No definition needed as it is a common description table header, the same with 98 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 99 // 100 101 /// 102 /// XSDT Revision (as defined in ACPI 6.0 spec.) 103 /// 104 #define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 105 106 /// 107 /// Fixed ACPI Description Table Structure (FADT) 108 /// 109 typedef struct { 110 EFI_ACPI_DESCRIPTION_HEADER Header; 111 UINT32 FirmwareCtrl; 112 UINT32 Dsdt; 113 UINT8 Reserved0; 114 UINT8 PreferredPmProfile; 115 UINT16 SciInt; 116 UINT32 SmiCmd; 117 UINT8 AcpiEnable; 118 UINT8 AcpiDisable; 119 UINT8 S4BiosReq; 120 UINT8 PstateCnt; 121 UINT32 Pm1aEvtBlk; 122 UINT32 Pm1bEvtBlk; 123 UINT32 Pm1aCntBlk; 124 UINT32 Pm1bCntBlk; 125 UINT32 Pm2CntBlk; 126 UINT32 PmTmrBlk; 127 UINT32 Gpe0Blk; 128 UINT32 Gpe1Blk; 129 UINT8 Pm1EvtLen; 130 UINT8 Pm1CntLen; 131 UINT8 Pm2CntLen; 132 UINT8 PmTmrLen; 133 UINT8 Gpe0BlkLen; 134 UINT8 Gpe1BlkLen; 135 UINT8 Gpe1Base; 136 UINT8 CstCnt; 137 UINT16 PLvl2Lat; 138 UINT16 PLvl3Lat; 139 UINT16 FlushSize; 140 UINT16 FlushStride; 141 UINT8 DutyOffset; 142 UINT8 DutyWidth; 143 UINT8 DayAlrm; 144 UINT8 MonAlrm; 145 UINT8 Century; 146 UINT16 IaPcBootArch; 147 UINT8 Reserved1; 148 UINT32 Flags; 149 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg; 150 UINT8 ResetValue; 151 UINT16 ArmBootArch; 152 UINT8 MinorVersion; 153 UINT64 XFirmwareCtrl; 154 UINT64 XDsdt; 155 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 156 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 157 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 158 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 159 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 160 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 161 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 162 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 163 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 164 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 165 UINT64 HypervisorVendorIdentity; 166 } EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE; 167 168 /// 169 /// FADT Version (as defined in ACPI 6.0 spec.) 170 /// 171 #define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06 172 #define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x00 173 174 // 175 // Fixed ACPI Description Table Preferred Power Management Profile 176 // 177 #define EFI_ACPI_6_0_PM_PROFILE_UNSPECIFIED 0 178 #define EFI_ACPI_6_0_PM_PROFILE_DESKTOP 1 179 #define EFI_ACPI_6_0_PM_PROFILE_MOBILE 2 180 #define EFI_ACPI_6_0_PM_PROFILE_WORKSTATION 3 181 #define EFI_ACPI_6_0_PM_PROFILE_ENTERPRISE_SERVER 4 182 #define EFI_ACPI_6_0_PM_PROFILE_SOHO_SERVER 5 183 #define EFI_ACPI_6_0_PM_PROFILE_APPLIANCE_PC 6 184 #define EFI_ACPI_6_0_PM_PROFILE_PERFORMANCE_SERVER 7 185 #define EFI_ACPI_6_0_PM_PROFILE_TABLET 8 186 187 // 188 // Fixed ACPI Description Table Boot Architecture Flags 189 // All other bits are reserved and must be set to 0. 190 // 191 #define EFI_ACPI_6_0_LEGACY_DEVICES BIT0 192 #define EFI_ACPI_6_0_8042 BIT1 193 #define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2 194 #define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3 195 #define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4 196 #define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5 197 198 // 199 // Fixed ACPI Description Table Arm Boot Architecture Flags 200 // All other bits are reserved and must be set to 0. 201 // 202 #define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0 203 #define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1 204 205 // 206 // Fixed ACPI Description Table Fixed Feature Flags 207 // All other bits are reserved and must be set to 0. 208 // 209 #define EFI_ACPI_6_0_WBINVD BIT0 210 #define EFI_ACPI_6_0_WBINVD_FLUSH BIT1 211 #define EFI_ACPI_6_0_PROC_C1 BIT2 212 #define EFI_ACPI_6_0_P_LVL2_UP BIT3 213 #define EFI_ACPI_6_0_PWR_BUTTON BIT4 214 #define EFI_ACPI_6_0_SLP_BUTTON BIT5 215 #define EFI_ACPI_6_0_FIX_RTC BIT6 216 #define EFI_ACPI_6_0_RTC_S4 BIT7 217 #define EFI_ACPI_6_0_TMR_VAL_EXT BIT8 218 #define EFI_ACPI_6_0_DCK_CAP BIT9 219 #define EFI_ACPI_6_0_RESET_REG_SUP BIT10 220 #define EFI_ACPI_6_0_SEALED_CASE BIT11 221 #define EFI_ACPI_6_0_HEADLESS BIT12 222 #define EFI_ACPI_6_0_CPU_SW_SLP BIT13 223 #define EFI_ACPI_6_0_PCI_EXP_WAK BIT14 224 #define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15 225 #define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16 226 #define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17 227 #define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18 228 #define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 229 #define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20 230 #define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21 231 232 /// 233 /// Firmware ACPI Control Structure 234 /// 235 typedef struct { 236 UINT32 Signature; 237 UINT32 Length; 238 UINT32 HardwareSignature; 239 UINT32 FirmwareWakingVector; 240 UINT32 GlobalLock; 241 UINT32 Flags; 242 UINT64 XFirmwareWakingVector; 243 UINT8 Version; 244 UINT8 Reserved0[3]; 245 UINT32 OspmFlags; 246 UINT8 Reserved1[24]; 247 } EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE; 248 249 /// 250 /// FACS Version (as defined in ACPI 6.0 spec.) 251 /// 252 #define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 253 254 /// 255 /// Firmware Control Structure Feature Flags 256 /// All other bits are reserved and must be set to 0. 257 /// 258 #define EFI_ACPI_6_0_S4BIOS_F BIT0 259 #define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1 260 261 /// 262 /// OSPM Enabled Firmware Control Structure Flags 263 /// All other bits are reserved and must be set to 0. 264 /// 265 #define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0 266 267 // 268 // Differentiated System Description Table, 269 // Secondary System Description Table 270 // and Persistent System Description Table, 271 // no definition needed as they are common description table header, the same with 272 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 273 // 274 #define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 275 #define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 276 277 /// 278 /// Multiple APIC Description Table header definition. The rest of the table 279 /// must be defined in a platform specific manner. 280 /// 281 typedef struct { 282 EFI_ACPI_DESCRIPTION_HEADER Header; 283 UINT32 LocalApicAddress; 284 UINT32 Flags; 285 } EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 286 287 /// 288 /// MADT Revision (as defined in ACPI 6.0 Errata A spec.) 289 /// 290 #define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04 291 292 /// 293 /// Multiple APIC Flags 294 /// All other bits are reserved and must be set to 0. 295 /// 296 #define EFI_ACPI_6_0_PCAT_COMPAT BIT0 297 298 // 299 // Multiple APIC Description Table APIC structure types 300 // All other values between 0x0D and 0x7F are reserved and 301 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 302 // 303 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC 0x00 304 #define EFI_ACPI_6_0_IO_APIC 0x01 305 #define EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE 0x02 306 #define EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03 307 #define EFI_ACPI_6_0_LOCAL_APIC_NMI 0x04 308 #define EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 309 #define EFI_ACPI_6_0_IO_SAPIC 0x06 310 #define EFI_ACPI_6_0_LOCAL_SAPIC 0x07 311 #define EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES 0x08 312 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC 0x09 313 #define EFI_ACPI_6_0_LOCAL_X2APIC_NMI 0x0A 314 #define EFI_ACPI_6_0_GIC 0x0B 315 #define EFI_ACPI_6_0_GICD 0x0C 316 #define EFI_ACPI_6_0_GIC_MSI_FRAME 0x0D 317 #define EFI_ACPI_6_0_GICR 0x0E 318 #define EFI_ACPI_6_0_GIC_ITS 0x0F 319 320 // 321 // APIC Structure Definitions 322 // 323 324 /// 325 /// Processor Local APIC Structure Definition 326 /// 327 typedef struct { 328 UINT8 Type; 329 UINT8 Length; 330 UINT8 AcpiProcessorUid; 331 UINT8 ApicId; 332 UINT32 Flags; 333 } EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_STRUCTURE; 334 335 /// 336 /// Local APIC Flags. All other bits are reserved and must be 0. 337 /// 338 #define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0 339 340 /// 341 /// IO APIC Structure 342 /// 343 typedef struct { 344 UINT8 Type; 345 UINT8 Length; 346 UINT8 IoApicId; 347 UINT8 Reserved; 348 UINT32 IoApicAddress; 349 UINT32 GlobalSystemInterruptBase; 350 } EFI_ACPI_6_0_IO_APIC_STRUCTURE; 351 352 /// 353 /// Interrupt Source Override Structure 354 /// 355 typedef struct { 356 UINT8 Type; 357 UINT8 Length; 358 UINT8 Bus; 359 UINT8 Source; 360 UINT32 GlobalSystemInterrupt; 361 UINT16 Flags; 362 } EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 363 364 /// 365 /// Platform Interrupt Sources Structure Definition 366 /// 367 typedef struct { 368 UINT8 Type; 369 UINT8 Length; 370 UINT16 Flags; 371 UINT8 InterruptType; 372 UINT8 ProcessorId; 373 UINT8 ProcessorEid; 374 UINT8 IoSapicVector; 375 UINT32 GlobalSystemInterrupt; 376 UINT32 PlatformInterruptSourceFlags; 377 UINT8 CpeiProcessorOverride; 378 UINT8 Reserved[31]; 379 } EFI_ACPI_6_0_PLATFORM_INTERRUPT_APIC_STRUCTURE; 380 381 // 382 // MPS INTI flags. 383 // All other bits are reserved and must be set to 0. 384 // 385 #define EFI_ACPI_6_0_POLARITY (3 << 0) 386 #define EFI_ACPI_6_0_TRIGGER_MODE (3 << 2) 387 388 /// 389 /// Non-Maskable Interrupt Source Structure 390 /// 391 typedef struct { 392 UINT8 Type; 393 UINT8 Length; 394 UINT16 Flags; 395 UINT32 GlobalSystemInterrupt; 396 } EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 397 398 /// 399 /// Local APIC NMI Structure 400 /// 401 typedef struct { 402 UINT8 Type; 403 UINT8 Length; 404 UINT8 AcpiProcessorUid; 405 UINT16 Flags; 406 UINT8 LocalApicLint; 407 } EFI_ACPI_6_0_LOCAL_APIC_NMI_STRUCTURE; 408 409 /// 410 /// Local APIC Address Override Structure 411 /// 412 typedef struct { 413 UINT8 Type; 414 UINT8 Length; 415 UINT16 Reserved; 416 UINT64 LocalApicAddress; 417 } EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 418 419 /// 420 /// IO SAPIC Structure 421 /// 422 typedef struct { 423 UINT8 Type; 424 UINT8 Length; 425 UINT8 IoApicId; 426 UINT8 Reserved; 427 UINT32 GlobalSystemInterruptBase; 428 UINT64 IoSapicAddress; 429 } EFI_ACPI_6_0_IO_SAPIC_STRUCTURE; 430 431 /// 432 /// Local SAPIC Structure 433 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 434 /// 435 typedef struct { 436 UINT8 Type; 437 UINT8 Length; 438 UINT8 AcpiProcessorId; 439 UINT8 LocalSapicId; 440 UINT8 LocalSapicEid; 441 UINT8 Reserved[3]; 442 UINT32 Flags; 443 UINT32 ACPIProcessorUIDValue; 444 } EFI_ACPI_6_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 445 446 /// 447 /// Platform Interrupt Sources Structure 448 /// 449 typedef struct { 450 UINT8 Type; 451 UINT8 Length; 452 UINT16 Flags; 453 UINT8 InterruptType; 454 UINT8 ProcessorId; 455 UINT8 ProcessorEid; 456 UINT8 IoSapicVector; 457 UINT32 GlobalSystemInterrupt; 458 UINT32 PlatformInterruptSourceFlags; 459 } EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 460 461 /// 462 /// Platform Interrupt Source Flags. 463 /// All other bits are reserved and must be set to 0. 464 /// 465 #define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0 466 467 /// 468 /// Processor Local x2APIC Structure Definition 469 /// 470 typedef struct { 471 UINT8 Type; 472 UINT8 Length; 473 UINT8 Reserved[2]; 474 UINT32 X2ApicId; 475 UINT32 Flags; 476 UINT32 AcpiProcessorUid; 477 } EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 478 479 /// 480 /// Local x2APIC NMI Structure 481 /// 482 typedef struct { 483 UINT8 Type; 484 UINT8 Length; 485 UINT16 Flags; 486 UINT32 AcpiProcessorUid; 487 UINT8 LocalX2ApicLint; 488 UINT8 Reserved[3]; 489 } EFI_ACPI_6_0_LOCAL_X2APIC_NMI_STRUCTURE; 490 491 /// 492 /// GIC Structure 493 /// 494 typedef struct { 495 UINT8 Type; 496 UINT8 Length; 497 UINT16 Reserved; 498 UINT32 CPUInterfaceNumber; 499 UINT32 AcpiProcessorUid; 500 UINT32 Flags; 501 UINT32 ParkingProtocolVersion; 502 UINT32 PerformanceInterruptGsiv; 503 UINT64 ParkedAddress; 504 UINT64 PhysicalBaseAddress; 505 UINT64 GICV; 506 UINT64 GICH; 507 UINT32 VGICMaintenanceInterrupt; 508 UINT64 GICRBaseAddress; 509 UINT64 MPIDR; 510 UINT8 ProcessorPowerEfficiencyClass; 511 UINT8 Reserved2[3]; 512 } EFI_ACPI_6_0_GIC_STRUCTURE; 513 514 /// 515 /// GIC Flags. All other bits are reserved and must be 0. 516 /// 517 #define EFI_ACPI_6_0_GIC_ENABLED BIT0 518 #define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1 519 #define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 520 521 /// 522 /// GIC Distributor Structure 523 /// 524 typedef struct { 525 UINT8 Type; 526 UINT8 Length; 527 UINT16 Reserved1; 528 UINT32 GicId; 529 UINT64 PhysicalBaseAddress; 530 UINT32 SystemVectorBase; 531 UINT8 GicVersion; 532 UINT8 Reserved2[3]; 533 } EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE; 534 535 /// 536 /// GIC Version 537 /// 538 #define EFI_ACPI_6_0_GIC_V1 0x01 539 #define EFI_ACPI_6_0_GIC_V2 0x02 540 #define EFI_ACPI_6_0_GIC_V3 0x03 541 #define EFI_ACPI_6_0_GIC_V4 0x04 542 543 /// 544 /// GIC MSI Frame Structure 545 /// 546 typedef struct { 547 UINT8 Type; 548 UINT8 Length; 549 UINT16 Reserved1; 550 UINT32 GicMsiFrameId; 551 UINT64 PhysicalBaseAddress; 552 UINT32 Flags; 553 UINT16 SPICount; 554 UINT16 SPIBase; 555 } EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE; 556 557 /// 558 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 559 /// 560 #define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0 561 562 /// 563 /// GICR Structure 564 /// 565 typedef struct { 566 UINT8 Type; 567 UINT8 Length; 568 UINT16 Reserved; 569 UINT64 DiscoveryRangeBaseAddress; 570 UINT32 DiscoveryRangeLength; 571 } EFI_ACPI_6_0_GICR_STRUCTURE; 572 573 /// 574 /// GIC Interrupt Translation Service Structure 575 /// 576 typedef struct { 577 UINT8 Type; 578 UINT8 Length; 579 UINT16 Reserved; 580 UINT32 GicItsId; 581 UINT64 PhysicalBaseAddress; 582 UINT32 Reserved2; 583 } EFI_ACPI_6_0_GIC_ITS_STRUCTURE; 584 585 /// 586 /// Smart Battery Description Table (SBST) 587 /// 588 typedef struct { 589 EFI_ACPI_DESCRIPTION_HEADER Header; 590 UINT32 WarningEnergyLevel; 591 UINT32 LowEnergyLevel; 592 UINT32 CriticalEnergyLevel; 593 } EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE; 594 595 /// 596 /// SBST Version (as defined in ACPI 6.0 spec.) 597 /// 598 #define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 599 600 /// 601 /// Embedded Controller Boot Resources Table (ECDT) 602 /// The table is followed by a null terminated ASCII string that contains 603 /// a fully qualified reference to the name space object. 604 /// 605 typedef struct { 606 EFI_ACPI_DESCRIPTION_HEADER Header; 607 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl; 608 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData; 609 UINT32 Uid; 610 UINT8 GpeBit; 611 } EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 612 613 /// 614 /// ECDT Version (as defined in ACPI 6.0 spec.) 615 /// 616 #define EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 617 618 /// 619 /// System Resource Affinity Table (SRAT). The rest of the table 620 /// must be defined in a platform specific manner. 621 /// 622 typedef struct { 623 EFI_ACPI_DESCRIPTION_HEADER Header; 624 UINT32 Reserved1; ///< Must be set to 1 625 UINT64 Reserved2; 626 } EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 627 628 /// 629 /// SRAT Version (as defined in ACPI 6.0 spec.) 630 /// 631 #define EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 632 633 // 634 // SRAT structure types. 635 // All other values between 0x04 an 0xFF are reserved and 636 // will be ignored by OSPM. 637 // 638 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 639 #define EFI_ACPI_6_0_MEMORY_AFFINITY 0x01 640 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 641 #define EFI_ACPI_6_0_GICC_AFFINITY 0x03 642 643 /// 644 /// Processor Local APIC/SAPIC Affinity Structure Definition 645 /// 646 typedef struct { 647 UINT8 Type; 648 UINT8 Length; 649 UINT8 ProximityDomain7To0; 650 UINT8 ApicId; 651 UINT32 Flags; 652 UINT8 LocalSapicEid; 653 UINT8 ProximityDomain31To8[3]; 654 UINT32 ClockDomain; 655 } EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 656 657 /// 658 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 659 /// 660 #define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 661 662 /// 663 /// Memory Affinity Structure Definition 664 /// 665 typedef struct { 666 UINT8 Type; 667 UINT8 Length; 668 UINT32 ProximityDomain; 669 UINT16 Reserved1; 670 UINT32 AddressBaseLow; 671 UINT32 AddressBaseHigh; 672 UINT32 LengthLow; 673 UINT32 LengthHigh; 674 UINT32 Reserved2; 675 UINT32 Flags; 676 UINT64 Reserved3; 677 } EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE; 678 679 // 680 // Memory Flags. All other bits are reserved and must be 0. 681 // 682 #define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0) 683 #define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1) 684 #define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2) 685 686 /// 687 /// Processor Local x2APIC Affinity Structure Definition 688 /// 689 typedef struct { 690 UINT8 Type; 691 UINT8 Length; 692 UINT8 Reserved1[2]; 693 UINT32 ProximityDomain; 694 UINT32 X2ApicId; 695 UINT32 Flags; 696 UINT32 ClockDomain; 697 UINT8 Reserved2[4]; 698 } EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 699 700 /// 701 /// GICC Affinity Structure Definition 702 /// 703 typedef struct { 704 UINT8 Type; 705 UINT8 Length; 706 UINT32 ProximityDomain; 707 UINT32 AcpiProcessorUid; 708 UINT32 Flags; 709 UINT32 ClockDomain; 710 } EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE; 711 712 /// 713 /// GICC Flags. All other bits are reserved and must be 0. 714 /// 715 #define EFI_ACPI_6_0_GICC_ENABLED (1 << 0) 716 717 /// 718 /// System Locality Distance Information Table (SLIT). 719 /// The rest of the table is a matrix. 720 /// 721 typedef struct { 722 EFI_ACPI_DESCRIPTION_HEADER Header; 723 UINT64 NumberOfSystemLocalities; 724 } EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 725 726 /// 727 /// SLIT Version (as defined in ACPI 6.0 spec.) 728 /// 729 #define EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 730 731 /// 732 /// Corrected Platform Error Polling Table (CPEP) 733 /// 734 typedef struct { 735 EFI_ACPI_DESCRIPTION_HEADER Header; 736 UINT8 Reserved[8]; 737 } EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 738 739 /// 740 /// CPEP Version (as defined in ACPI 6.0 spec.) 741 /// 742 #define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 743 744 // 745 // CPEP processor structure types. 746 // 747 #define EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC 0x00 748 749 /// 750 /// Corrected Platform Error Polling Processor Structure Definition 751 /// 752 typedef struct { 753 UINT8 Type; 754 UINT8 Length; 755 UINT8 ProcessorId; 756 UINT8 ProcessorEid; 757 UINT32 PollingInterval; 758 } EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 759 760 /// 761 /// Maximum System Characteristics Table (MSCT) 762 /// 763 typedef struct { 764 EFI_ACPI_DESCRIPTION_HEADER Header; 765 UINT32 OffsetProxDomInfo; 766 UINT32 MaximumNumberOfProximityDomains; 767 UINT32 MaximumNumberOfClockDomains; 768 UINT64 MaximumPhysicalAddress; 769 } EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 770 771 /// 772 /// MSCT Version (as defined in ACPI 6.0 spec.) 773 /// 774 #define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 775 776 /// 777 /// Maximum Proximity Domain Information Structure Definition 778 /// 779 typedef struct { 780 UINT8 Revision; 781 UINT8 Length; 782 UINT32 ProximityDomainRangeLow; 783 UINT32 ProximityDomainRangeHigh; 784 UINT32 MaximumProcessorCapacity; 785 UINT64 MaximumMemoryCapacity; 786 } EFI_ACPI_6_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 787 788 /// 789 /// ACPI RAS Feature Table definition. 790 /// 791 typedef struct { 792 EFI_ACPI_DESCRIPTION_HEADER Header; 793 UINT8 PlatformCommunicationChannelIdentifier[12]; 794 } EFI_ACPI_6_0_RAS_FEATURE_TABLE; 795 796 /// 797 /// RASF Version (as defined in ACPI 6.0 spec.) 798 /// 799 #define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01 800 801 /// 802 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 803 /// 804 typedef struct { 805 UINT32 Signature; 806 UINT16 Command; 807 UINT16 Status; 808 UINT16 Version; 809 UINT8 RASCapabilities[16]; 810 UINT8 SetRASCapabilities[16]; 811 UINT16 NumberOfRASFParameterBlocks; 812 UINT32 SetRASCapabilitiesStatus; 813 } EFI_ACPI_6_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 814 815 /// 816 /// ACPI RASF PCC command code 817 /// 818 #define EFI_ACPI_6_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 819 820 /// 821 /// ACPI RASF Platform RAS Capabilities 822 /// 823 #define EFI_ACPI_6_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 824 #define EFI_ACPI_6_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 825 826 /// 827 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 828 /// 829 typedef struct { 830 UINT16 Type; 831 UINT16 Version; 832 UINT16 Length; 833 UINT16 PatrolScrubCommand; 834 UINT64 RequestedAddressRange[2]; 835 UINT64 ActualAddressRange[2]; 836 UINT16 Flags; 837 UINT8 RequestedSpeed; 838 } EFI_ACPI_6_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 839 840 /// 841 /// ACPI RASF Patrol Scrub command 842 /// 843 #define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 844 #define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 845 #define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 846 847 /// 848 /// Memory Power State Table definition. 849 /// 850 typedef struct { 851 EFI_ACPI_DESCRIPTION_HEADER Header; 852 UINT8 PlatformCommunicationChannelIdentifier; 853 UINT8 Reserved[3]; 854 // Memory Power Node Structure 855 // Memory Power State Characteristics 856 } EFI_ACPI_6_0_MEMORY_POWER_STATUS_TABLE; 857 858 /// 859 /// MPST Version (as defined in ACPI 6.0 spec.) 860 /// 861 #define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01 862 863 /// 864 /// MPST Platform Communication Channel Shared Memory Region definition. 865 /// 866 typedef struct { 867 UINT32 Signature; 868 UINT16 Command; 869 UINT16 Status; 870 UINT32 MemoryPowerCommandRegister; 871 UINT32 MemoryPowerStatusRegister; 872 UINT32 PowerStateId; 873 UINT32 MemoryPowerNodeId; 874 UINT64 MemoryEnergyConsumed; 875 UINT64 ExpectedAveragePowerComsuned; 876 } EFI_ACPI_6_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 877 878 /// 879 /// ACPI MPST PCC command code 880 /// 881 #define EFI_ACPI_6_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 882 883 /// 884 /// ACPI MPST Memory Power command 885 /// 886 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 887 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 888 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 889 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 890 891 /// 892 /// MPST Memory Power Node Table 893 /// 894 typedef struct { 895 UINT8 PowerStateValue; 896 UINT8 PowerStateInformationIndex; 897 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE; 898 899 typedef struct { 900 UINT8 Flag; 901 UINT8 Reserved; 902 UINT16 MemoryPowerNodeId; 903 UINT32 Length; 904 UINT64 AddressBase; 905 UINT64 AddressLength; 906 UINT32 NumberOfPowerStates; 907 UINT32 NumberOfPhysicalComponents; 908 // EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 909 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 910 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE; 911 912 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 913 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 914 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 915 916 typedef struct { 917 UINT16 MemoryPowerNodeCount; 918 UINT8 Reserved[2]; 919 } EFI_ACPI_6_0_MPST_MEMORY_POWER_NODE_TABLE; 920 921 /// 922 /// MPST Memory Power State Characteristics Table 923 /// 924 typedef struct { 925 UINT8 PowerStateStructureID; 926 UINT8 Flag; 927 UINT16 Reserved; 928 UINT32 AveragePowerConsumedInMPS0; 929 UINT32 RelativePowerSavingToMPS0; 930 UINT64 ExitLatencyToMPS0; 931 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 932 933 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 934 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 935 #define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 936 937 typedef struct { 938 UINT16 MemoryPowerStateCharacteristicsCount; 939 UINT8 Reserved[2]; 940 } EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 941 942 /// 943 /// Memory Topology Table definition. 944 /// 945 typedef struct { 946 EFI_ACPI_DESCRIPTION_HEADER Header; 947 UINT32 Reserved; 948 } EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE; 949 950 /// 951 /// PMTT Version (as defined in ACPI 6.0 spec.) 952 /// 953 #define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 954 955 /// 956 /// Common Memory Aggregator Device Structure. 957 /// 958 typedef struct { 959 UINT8 Type; 960 UINT8 Reserved; 961 UINT16 Length; 962 UINT16 Flags; 963 UINT16 Reserved1; 964 } EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 965 966 /// 967 /// Memory Aggregator Device Type 968 /// 969 #define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0 970 #define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 971 #define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2 972 973 /// 974 /// Socket Memory Aggregator Device Structure. 975 /// 976 typedef struct { 977 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 978 UINT16 SocketIdentifier; 979 UINT16 Reserved; 980 // EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 981 } EFI_ACPI_6_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 982 983 /// 984 /// MemoryController Memory Aggregator Device Structure. 985 /// 986 typedef struct { 987 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 988 UINT32 ReadLatency; 989 UINT32 WriteLatency; 990 UINT32 ReadBandwidth; 991 UINT32 WriteBandwidth; 992 UINT16 OptimalAccessUnit; 993 UINT16 OptimalAccessAlignment; 994 UINT16 Reserved; 995 UINT16 NumberOfProximityDomains; 996 // UINT32 ProximityDomain[NumberOfProximityDomains]; 997 // EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 998 } EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 999 1000 /// 1001 /// DIMM Memory Aggregator Device Structure. 1002 /// 1003 typedef struct { 1004 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1005 UINT16 PhysicalComponentIdentifier; 1006 UINT16 Reserved; 1007 UINT32 SizeOfDimm; 1008 UINT32 SmbiosHandle; 1009 } EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1010 1011 /// 1012 /// Boot Graphics Resource Table definition. 1013 /// 1014 typedef struct { 1015 EFI_ACPI_DESCRIPTION_HEADER Header; 1016 /// 1017 /// 2-bytes (16 bit) version ID. This value must be 1. 1018 /// 1019 UINT16 Version; 1020 /// 1021 /// 1-byte status field indicating current status about the table. 1022 /// Bits[7:1] = Reserved (must be zero) 1023 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1024 /// 1025 UINT8 Status; 1026 /// 1027 /// 1-byte enumerated type field indicating format of the image. 1028 /// 0 = Bitmap 1029 /// 1 - 255 Reserved (for future use) 1030 /// 1031 UINT8 ImageType; 1032 /// 1033 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1034 /// of the image bitmap. 1035 /// 1036 UINT64 ImageAddress; 1037 /// 1038 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1039 /// (X, Y) display offset of the top left corner of the boot image. 1040 /// The top left corner of the display is at offset (0, 0). 1041 /// 1042 UINT32 ImageOffsetX; 1043 /// 1044 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1045 /// (X, Y) display offset of the top left corner of the boot image. 1046 /// The top left corner of the display is at offset (0, 0). 1047 /// 1048 UINT32 ImageOffsetY; 1049 } EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE; 1050 1051 /// 1052 /// BGRT Revision 1053 /// 1054 #define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1055 1056 /// 1057 /// BGRT Version 1058 /// 1059 #define EFI_ACPI_6_0_BGRT_VERSION 0x01 1060 1061 /// 1062 /// BGRT Status 1063 /// 1064 #define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00 1065 #define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01 1066 1067 /// 1068 /// BGRT Image Type 1069 /// 1070 #define EFI_ACPI_6_0_BGRT_IMAGE_TYPE_BMP 0x00 1071 1072 /// 1073 /// FPDT Version (as defined in ACPI 6.0 spec.) 1074 /// 1075 #define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1076 1077 /// 1078 /// FPDT Performance Record Types 1079 /// 1080 #define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1081 #define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1082 1083 /// 1084 /// FPDT Performance Record Revision 1085 /// 1086 #define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1087 #define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1088 1089 /// 1090 /// FPDT Runtime Performance Record Types 1091 /// 1092 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1093 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1094 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1095 1096 /// 1097 /// FPDT Runtime Performance Record Revision 1098 /// 1099 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1100 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1101 #define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1102 1103 /// 1104 /// FPDT Performance Record header 1105 /// 1106 typedef struct { 1107 UINT16 Type; 1108 UINT8 Length; 1109 UINT8 Revision; 1110 } EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER; 1111 1112 /// 1113 /// FPDT Performance Table header 1114 /// 1115 typedef struct { 1116 UINT32 Signature; 1117 UINT32 Length; 1118 } EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER; 1119 1120 /// 1121 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1122 /// 1123 typedef struct { 1124 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1125 UINT32 Reserved; 1126 /// 1127 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1128 /// 1129 UINT64 BootPerformanceTablePointer; 1130 } EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1131 1132 /// 1133 /// FPDT S3 Performance Table Pointer Record Structure 1134 /// 1135 typedef struct { 1136 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1137 UINT32 Reserved; 1138 /// 1139 /// 64-bit processor-relative physical address of the S3 Performance Table. 1140 /// 1141 UINT64 S3PerformanceTablePointer; 1142 } EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1143 1144 /// 1145 /// FPDT Firmware Basic Boot Performance Record Structure 1146 /// 1147 typedef struct { 1148 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1149 UINT32 Reserved; 1150 /// 1151 /// Timer value logged at the beginning of firmware image execution. 1152 /// This may not always be zero or near zero. 1153 /// 1154 UINT64 ResetEnd; 1155 /// 1156 /// Timer value logged just prior to loading the OS boot loader into memory. 1157 /// For non-UEFI compatible boots, this field must be zero. 1158 /// 1159 UINT64 OsLoaderLoadImageStart; 1160 /// 1161 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1162 /// For non-UEFI compatible boots, the timer value logged will be just prior 1163 /// to the INT 19h handler invocation. 1164 /// 1165 UINT64 OsLoaderStartImageStart; 1166 /// 1167 /// Timer value logged at the point when the OS loader calls the 1168 /// ExitBootServices function for UEFI compatible firmware. 1169 /// For non-UEFI compatible boots, this field must be zero. 1170 /// 1171 UINT64 ExitBootServicesEntry; 1172 /// 1173 /// Timer value logged at the point just prior to when the OS loader gaining 1174 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1175 /// For non-UEFI compatible boots, this field must be zero. 1176 /// 1177 UINT64 ExitBootServicesExit; 1178 } EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1179 1180 /// 1181 /// FPDT Firmware Basic Boot Performance Table signature 1182 /// 1183 #define EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1184 1185 // 1186 // FPDT Firmware Basic Boot Performance Table 1187 // 1188 typedef struct { 1189 EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header; 1190 // 1191 // one or more Performance Records. 1192 // 1193 } EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1194 1195 /// 1196 /// FPDT "S3PT" S3 Performance Table 1197 /// 1198 #define EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1199 1200 // 1201 // FPDT Firmware S3 Boot Performance Table 1202 // 1203 typedef struct { 1204 EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header; 1205 // 1206 // one or more Performance Records. 1207 // 1208 } EFI_ACPI_6_0_FPDT_FIRMWARE_S3_BOOT_TABLE; 1209 1210 /// 1211 /// FPDT Basic S3 Resume Performance Record 1212 /// 1213 typedef struct { 1214 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1215 /// 1216 /// A count of the number of S3 resume cycles since the last full boot sequence. 1217 /// 1218 UINT32 ResumeCount; 1219 /// 1220 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1221 /// OS waking vector. Only the most recent resume cycle's time is retained. 1222 /// 1223 UINT64 FullResume; 1224 /// 1225 /// Average timer value of all resume cycles logged since the last full boot 1226 /// sequence, including the most recent resume. Note that the entire log of 1227 /// timer values does not need to be retained in order to calculate this average. 1228 /// 1229 UINT64 AverageResume; 1230 } EFI_ACPI_6_0_FPDT_S3_RESUME_RECORD; 1231 1232 /// 1233 /// FPDT Basic S3 Suspend Performance Record 1234 /// 1235 typedef struct { 1236 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 1237 /// 1238 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1239 /// Only the most recent suspend cycle's timer value is retained. 1240 /// 1241 UINT64 SuspendStart; 1242 /// 1243 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1244 /// mechanism) used to trigger hardware entry to S3. 1245 /// Only the most recent suspend cycle's timer value is retained. 1246 /// 1247 UINT64 SuspendEnd; 1248 } EFI_ACPI_6_0_FPDT_S3_SUSPEND_RECORD; 1249 1250 /// 1251 /// Firmware Performance Record Table definition. 1252 /// 1253 typedef struct { 1254 EFI_ACPI_DESCRIPTION_HEADER Header; 1255 } EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1256 1257 /// 1258 /// Generic Timer Description Table definition. 1259 /// 1260 typedef struct { 1261 EFI_ACPI_DESCRIPTION_HEADER Header; 1262 UINT64 CntControlBasePhysicalAddress; 1263 UINT32 Reserved; 1264 UINT32 SecurePL1TimerGSIV; 1265 UINT32 SecurePL1TimerFlags; 1266 UINT32 NonSecurePL1TimerGSIV; 1267 UINT32 NonSecurePL1TimerFlags; 1268 UINT32 VirtualTimerGSIV; 1269 UINT32 VirtualTimerFlags; 1270 UINT32 NonSecurePL2TimerGSIV; 1271 UINT32 NonSecurePL2TimerFlags; 1272 UINT64 CntReadBasePhysicalAddress; 1273 UINT32 PlatformTimerCount; 1274 UINT32 PlatformTimerOffset; 1275 } EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE; 1276 1277 /// 1278 /// GTDT Version (as defined in ACPI 6.0 spec.) 1279 /// 1280 #define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1281 1282 /// 1283 /// Timer Flags. All other bits are reserved and must be 0. 1284 /// 1285 #define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1286 #define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1287 #define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1288 1289 /// 1290 /// Platform Timer Type 1291 /// 1292 #define EFI_ACPI_6_0_GTDT_GT_BLOCK 0 1293 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1 1294 1295 /// 1296 /// GT Block Structure 1297 /// 1298 typedef struct { 1299 UINT8 Type; 1300 UINT16 Length; 1301 UINT8 Reserved; 1302 UINT64 CntCtlBase; 1303 UINT32 GTBlockTimerCount; 1304 UINT32 GTBlockTimerOffset; 1305 } EFI_ACPI_6_0_GTDT_GT_BLOCK_STRUCTURE; 1306 1307 /// 1308 /// GT Block Timer Structure 1309 /// 1310 typedef struct { 1311 UINT8 GTFrameNumber; 1312 UINT8 Reserved[3]; 1313 UINT64 CntBaseX; 1314 UINT64 CntEL0BaseX; 1315 UINT32 GTxPhysicalTimerGSIV; 1316 UINT32 GTxPhysicalTimerFlags; 1317 UINT32 GTxVirtualTimerGSIV; 1318 UINT32 GTxVirtualTimerFlags; 1319 UINT32 GTxCommonFlags; 1320 } EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1321 1322 /// 1323 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1324 /// 1325 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1326 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1327 1328 /// 1329 /// Common Flags Flags. All other bits are reserved and must be 0. 1330 /// 1331 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1332 #define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1333 1334 /// 1335 /// SBSA Generic Watchdog Structure 1336 /// 1337 typedef struct { 1338 UINT8 Type; 1339 UINT16 Length; 1340 UINT8 Reserved; 1341 UINT64 RefreshFramePhysicalAddress; 1342 UINT64 WatchdogControlFramePhysicalAddress; 1343 UINT32 WatchdogTimerGSIV; 1344 UINT32 WatchdogTimerFlags; 1345 } EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1346 1347 /// 1348 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1349 /// 1350 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1351 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1352 #define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1353 1354 // 1355 // NVDIMM Firmware Interface Table definition. 1356 // 1357 typedef struct { 1358 EFI_ACPI_DESCRIPTION_HEADER Header; 1359 UINT32 Reserved; 1360 } EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE; 1361 1362 // 1363 // NFIT Version (as defined in ACPI 6.0 spec.) 1364 // 1365 #define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1 1366 1367 // 1368 // Definition for NFIT Table Structure Types 1369 // 1370 #define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0 1371 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE_TYPE 1 1372 #define EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE_TYPE 2 1373 #define EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3 1374 #define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4 1375 #define EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5 1376 #define EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6 1377 1378 // 1379 // Definition for NFIT Structure Header 1380 // 1381 typedef struct { 1382 UINT16 Type; 1383 UINT16 Length; 1384 } EFI_ACPI_6_0_NFIT_STRUCTURE_HEADER; 1385 1386 // 1387 // Definition for System Physical Address Range Structure 1388 // 1389 #define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0 1390 #define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1 1391 #define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }} 1392 #define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }} 1393 #define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }} 1394 #define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }} 1395 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }} 1396 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }} 1397 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }} 1398 #define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }} 1399 typedef struct { 1400 UINT16 Type; 1401 UINT16 Length; 1402 UINT16 SPARangeStructureIndex; 1403 UINT16 Flags; 1404 UINT32 Reserved_8; 1405 UINT32 ProximityDomain; 1406 GUID AddressRangeTypeGUID; 1407 UINT64 SystemPhysicalAddressRangeBase; 1408 UINT64 SystemPhysicalAddressRangeLength; 1409 UINT64 AddressRangeMemoryMappingAttribute; 1410 } EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE; 1411 1412 // 1413 // Definition for Memory Device to System Physical Address Range Mapping Structure 1414 // 1415 typedef struct { 1416 UINT32 DIMMNumber : 4; 1417 UINT32 MemoryChannelNumber : 4; 1418 UINT32 MemoryControllerID : 4; 1419 UINT32 SocketID : 4; 1420 UINT32 NodeControllerID : 12; 1421 UINT32 Reserved_28 : 4; 1422 } EFI_ACPI_6_0_NFIT_DEVICE_HANDLE; 1423 1424 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0 1425 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1 1426 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2 1427 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3 1428 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4 1429 #define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5 1430 typedef struct { 1431 UINT16 Type; 1432 UINT16 Length; 1433 EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1434 UINT16 MemoryDevicePhysicalID; 1435 UINT16 MemoryDeviceRegionID; 1436 UINT16 SPARangeStructureIndex; 1437 UINT16 NVDIMMControlRegionStructureIndex; 1438 UINT64 MemoryDeviceRegionSize; 1439 UINT64 RegionOffset; 1440 UINT64 MemoryDevicePhysicalAddressRegionBase; 1441 UINT16 InterleaveStructureIndex; 1442 UINT16 InterleaveWays; 1443 UINT16 MemoryDeviceStateFlags; 1444 UINT16 Reserved_46; 1445 } EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE; 1446 1447 // 1448 // Definition for Interleave Structure 1449 // 1450 typedef struct { 1451 UINT16 Type; 1452 UINT16 Length; 1453 UINT16 InterleaveStructureIndex; 1454 UINT16 Reserved_6; 1455 UINT32 NumberOfLines; 1456 UINT32 LineSize; 1457 // UINT32 LineOffset[NumberOfLines]; 1458 } EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE; 1459 1460 // 1461 // Definition for SMBIOS Management Information Structure 1462 // 1463 typedef struct { 1464 UINT16 Type; 1465 UINT16 Length; 1466 UINT32 Reserved_4; 1467 // UINT8 Data[]; 1468 } EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE; 1469 1470 // 1471 // Definition for NVDIMM Control Region Structure 1472 // 1473 #define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0 1474 typedef struct { 1475 UINT16 Type; 1476 UINT16 Length; 1477 UINT16 NVDIMMControlRegionStructureIndex; 1478 UINT16 VendorID; 1479 UINT16 DeviceID; 1480 UINT16 RevisionID; 1481 UINT16 SubsystemVendorID; 1482 UINT16 SubsystemDeviceID; 1483 UINT16 SubsystemRevisionID; 1484 UINT8 Reserved_18[6]; 1485 UINT32 SerialNumber; 1486 UINT16 RegionFormatInterfaceCode; 1487 UINT16 NumberOfBlockControlWindows; 1488 UINT64 SizeOfBlockControlWindow; 1489 UINT64 CommandRegisterOffsetInBlockControlWindow; 1490 UINT64 SizeOfCommandRegisterInBlockControlWindows; 1491 UINT64 StatusRegisterOffsetInBlockControlWindow; 1492 UINT64 SizeOfStatusRegisterInBlockControlWindows; 1493 UINT16 NVDIMMControlRegionFlag; 1494 UINT8 Reserved_74[6]; 1495 } EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE; 1496 1497 // 1498 // Definition for NVDIMM Block Data Window Region Structure 1499 // 1500 typedef struct { 1501 UINT16 Type; 1502 UINT16 Length; 1503 UINT16 NVDIMMControlRegionStructureIndex; 1504 UINT16 NumberOfBlockDataWindows; 1505 UINT64 BlockDataWindowStartOffset; 1506 UINT64 SizeOfBlockDataWindow; 1507 UINT64 BlockAccessibleMemoryCapacity; 1508 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory; 1509 } EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE; 1510 1511 // 1512 // Definition for Flush Hint Address Structure 1513 // 1514 typedef struct { 1515 UINT16 Type; 1516 UINT16 Length; 1517 EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1518 UINT16 NumberOfFlushHintAddresses; 1519 UINT8 Reserved_10[6]; 1520 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses]; 1521 } EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE; 1522 1523 /// 1524 /// Boot Error Record Table (BERT) 1525 /// 1526 typedef struct { 1527 EFI_ACPI_DESCRIPTION_HEADER Header; 1528 UINT32 BootErrorRegionLength; 1529 UINT64 BootErrorRegion; 1530 } EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER; 1531 1532 /// 1533 /// BERT Version (as defined in ACPI 6.0 spec.) 1534 /// 1535 #define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1536 1537 /// 1538 /// Boot Error Region Block Status Definition 1539 /// 1540 typedef struct { 1541 UINT32 UncorrectableErrorValid : 1; 1542 UINT32 CorrectableErrorValid : 1; 1543 UINT32 MultipleUncorrectableErrors : 1; 1544 UINT32 MultipleCorrectableErrors : 1; 1545 UINT32 ErrorDataEntryCount : 10; 1546 UINT32 Reserved : 18; 1547 } EFI_ACPI_6_0_ERROR_BLOCK_STATUS; 1548 1549 /// 1550 /// Boot Error Region Definition 1551 /// 1552 typedef struct { 1553 EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus; 1554 UINT32 RawDataOffset; 1555 UINT32 RawDataLength; 1556 UINT32 DataLength; 1557 UINT32 ErrorSeverity; 1558 } EFI_ACPI_6_0_BOOT_ERROR_REGION_STRUCTURE; 1559 1560 // 1561 // Boot Error Severity types 1562 // 1563 #define EFI_ACPI_6_0_ERROR_SEVERITY_RECOVERABLE 0x00 1564 #define EFI_ACPI_6_0_ERROR_SEVERITY_FATAL 0x01 1565 #define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTED 0x02 1566 #define EFI_ACPI_6_0_ERROR_SEVERITY_NONE 0x03 1567 // 1568 // The term 'Correctable' is no longer being used as an error severity of the 1569 // reported error since ACPI Specification Version 5.1 Errata B. 1570 // The below macro is considered as deprecated and should no longer be used. 1571 // 1572 #define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00 1573 1574 /// 1575 /// Generic Error Data Entry Definition 1576 /// 1577 typedef struct { 1578 UINT8 SectionType[16]; 1579 UINT32 ErrorSeverity; 1580 UINT16 Revision; 1581 UINT8 ValidationBits; 1582 UINT8 Flags; 1583 UINT32 ErrorDataLength; 1584 UINT8 FruId[16]; 1585 UINT8 FruText[20]; 1586 } EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1587 1588 /// 1589 /// Generic Error Data Entry Version (as defined in ACPI 6.0 spec.) 1590 /// 1591 #define EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1592 1593 /// 1594 /// HEST - Hardware Error Source Table 1595 /// 1596 typedef struct { 1597 EFI_ACPI_DESCRIPTION_HEADER Header; 1598 UINT32 ErrorSourceCount; 1599 } EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1600 1601 /// 1602 /// HEST Version (as defined in ACPI 6.0 spec.) 1603 /// 1604 #define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1605 1606 // 1607 // Error Source structure types. 1608 // 1609 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1610 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1611 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR 0x02 1612 #define EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER 0x06 1613 #define EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER 0x07 1614 #define EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER 0x08 1615 #define EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR 0x09 1616 1617 // 1618 // Error Source structure flags. 1619 // 1620 #define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1621 #define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1622 1623 /// 1624 /// IA-32 Architecture Machine Check Exception Structure Definition 1625 /// 1626 typedef struct { 1627 UINT16 Type; 1628 UINT16 SourceId; 1629 UINT8 Reserved0[2]; 1630 UINT8 Flags; 1631 UINT8 Enabled; 1632 UINT32 NumberOfRecordsToPreAllocate; 1633 UINT32 MaxSectionsPerRecord; 1634 UINT64 GlobalCapabilityInitData; 1635 UINT64 GlobalControlInitData; 1636 UINT8 NumberOfHardwareBanks; 1637 UINT8 Reserved1[7]; 1638 } EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1639 1640 /// 1641 /// IA-32 Architecture Machine Check Bank Structure Definition 1642 /// 1643 typedef struct { 1644 UINT8 BankNumber; 1645 UINT8 ClearStatusOnInitialization; 1646 UINT8 StatusDataFormat; 1647 UINT8 Reserved0; 1648 UINT32 ControlRegisterMsrAddress; 1649 UINT64 ControlInitData; 1650 UINT32 StatusRegisterMsrAddress; 1651 UINT32 AddressRegisterMsrAddress; 1652 UINT32 MiscRegisterMsrAddress; 1653 } EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1654 1655 /// 1656 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1657 /// 1658 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1659 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1660 #define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1661 1662 // 1663 // Hardware Error Notification types. All other values are reserved 1664 // 1665 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1666 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1667 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1668 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1669 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1670 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05 1671 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_MCE 0x06 1672 #define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07 1673 1674 /// 1675 /// Hardware Error Notification Configuration Write Enable Structure Definition 1676 /// 1677 typedef struct { 1678 UINT16 Type : 1; 1679 UINT16 PollInterval : 1; 1680 UINT16 SwitchToPollingThresholdValue : 1; 1681 UINT16 SwitchToPollingThresholdWindow : 1; 1682 UINT16 ErrorThresholdValue : 1; 1683 UINT16 ErrorThresholdWindow : 1; 1684 UINT16 Reserved : 10; 1685 } EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1686 1687 /// 1688 /// Hardware Error Notification Structure Definition 1689 /// 1690 typedef struct { 1691 UINT8 Type; 1692 UINT8 Length; 1693 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1694 UINT32 PollInterval; 1695 UINT32 Vector; 1696 UINT32 SwitchToPollingThresholdValue; 1697 UINT32 SwitchToPollingThresholdWindow; 1698 UINT32 ErrorThresholdValue; 1699 UINT32 ErrorThresholdWindow; 1700 } EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1701 1702 /// 1703 /// IA-32 Architecture Corrected Machine Check Structure Definition 1704 /// 1705 typedef struct { 1706 UINT16 Type; 1707 UINT16 SourceId; 1708 UINT8 Reserved0[2]; 1709 UINT8 Flags; 1710 UINT8 Enabled; 1711 UINT32 NumberOfRecordsToPreAllocate; 1712 UINT32 MaxSectionsPerRecord; 1713 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1714 UINT8 NumberOfHardwareBanks; 1715 UINT8 Reserved1[3]; 1716 } EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1717 1718 /// 1719 /// IA-32 Architecture NMI Error Structure Definition 1720 /// 1721 typedef struct { 1722 UINT16 Type; 1723 UINT16 SourceId; 1724 UINT8 Reserved0[2]; 1725 UINT32 NumberOfRecordsToPreAllocate; 1726 UINT32 MaxSectionsPerRecord; 1727 UINT32 MaxRawDataLength; 1728 } EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1729 1730 /// 1731 /// PCI Express Root Port AER Structure Definition 1732 /// 1733 typedef struct { 1734 UINT16 Type; 1735 UINT16 SourceId; 1736 UINT8 Reserved0[2]; 1737 UINT8 Flags; 1738 UINT8 Enabled; 1739 UINT32 NumberOfRecordsToPreAllocate; 1740 UINT32 MaxSectionsPerRecord; 1741 UINT32 Bus; 1742 UINT16 Device; 1743 UINT16 Function; 1744 UINT16 DeviceControl; 1745 UINT8 Reserved1[2]; 1746 UINT32 UncorrectableErrorMask; 1747 UINT32 UncorrectableErrorSeverity; 1748 UINT32 CorrectableErrorMask; 1749 UINT32 AdvancedErrorCapabilitiesAndControl; 1750 UINT32 RootErrorCommand; 1751 } EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1752 1753 /// 1754 /// PCI Express Device AER Structure Definition 1755 /// 1756 typedef struct { 1757 UINT16 Type; 1758 UINT16 SourceId; 1759 UINT8 Reserved0[2]; 1760 UINT8 Flags; 1761 UINT8 Enabled; 1762 UINT32 NumberOfRecordsToPreAllocate; 1763 UINT32 MaxSectionsPerRecord; 1764 UINT32 Bus; 1765 UINT16 Device; 1766 UINT16 Function; 1767 UINT16 DeviceControl; 1768 UINT8 Reserved1[2]; 1769 UINT32 UncorrectableErrorMask; 1770 UINT32 UncorrectableErrorSeverity; 1771 UINT32 CorrectableErrorMask; 1772 UINT32 AdvancedErrorCapabilitiesAndControl; 1773 } EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1774 1775 /// 1776 /// PCI Express Bridge AER Structure Definition 1777 /// 1778 typedef struct { 1779 UINT16 Type; 1780 UINT16 SourceId; 1781 UINT8 Reserved0[2]; 1782 UINT8 Flags; 1783 UINT8 Enabled; 1784 UINT32 NumberOfRecordsToPreAllocate; 1785 UINT32 MaxSectionsPerRecord; 1786 UINT32 Bus; 1787 UINT16 Device; 1788 UINT16 Function; 1789 UINT16 DeviceControl; 1790 UINT8 Reserved1[2]; 1791 UINT32 UncorrectableErrorMask; 1792 UINT32 UncorrectableErrorSeverity; 1793 UINT32 CorrectableErrorMask; 1794 UINT32 AdvancedErrorCapabilitiesAndControl; 1795 UINT32 SecondaryUncorrectableErrorMask; 1796 UINT32 SecondaryUncorrectableErrorSeverity; 1797 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1798 } EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1799 1800 /// 1801 /// Generic Hardware Error Source Structure Definition 1802 /// 1803 typedef struct { 1804 UINT16 Type; 1805 UINT16 SourceId; 1806 UINT16 RelatedSourceId; 1807 UINT8 Flags; 1808 UINT8 Enabled; 1809 UINT32 NumberOfRecordsToPreAllocate; 1810 UINT32 MaxSectionsPerRecord; 1811 UINT32 MaxRawDataLength; 1812 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1813 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1814 UINT32 ErrorStatusBlockLength; 1815 } EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1816 1817 /// 1818 /// Generic Error Status Definition 1819 /// 1820 typedef struct { 1821 EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus; 1822 UINT32 RawDataOffset; 1823 UINT32 RawDataLength; 1824 UINT32 DataLength; 1825 UINT32 ErrorSeverity; 1826 } EFI_ACPI_6_0_GENERIC_ERROR_STATUS_STRUCTURE; 1827 1828 /// 1829 /// ERST - Error Record Serialization Table 1830 /// 1831 typedef struct { 1832 EFI_ACPI_DESCRIPTION_HEADER Header; 1833 UINT32 SerializationHeaderSize; 1834 UINT8 Reserved0[4]; 1835 UINT32 InstructionEntryCount; 1836 } EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1837 1838 /// 1839 /// ERST Version (as defined in ACPI 6.0 spec.) 1840 /// 1841 #define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1842 1843 /// 1844 /// ERST Serialization Actions 1845 /// 1846 #define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00 1847 #define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01 1848 #define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02 1849 #define EFI_ACPI_6_0_ERST_END_OPERATION 0x03 1850 #define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04 1851 #define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05 1852 #define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06 1853 #define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07 1854 #define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08 1855 #define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09 1856 #define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A 1857 #define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1858 #define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1859 #define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1860 #define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1861 1862 /// 1863 /// ERST Action Command Status 1864 /// 1865 #define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00 1866 #define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1867 #define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1868 #define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03 1869 #define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1870 #define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05 1871 1872 /// 1873 /// ERST Serialization Instructions 1874 /// 1875 #define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00 1876 #define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01 1877 #define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02 1878 #define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03 1879 #define EFI_ACPI_6_0_ERST_NOOP 0x04 1880 #define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05 1881 #define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06 1882 #define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07 1883 #define EFI_ACPI_6_0_ERST_ADD 0x08 1884 #define EFI_ACPI_6_0_ERST_SUBTRACT 0x09 1885 #define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A 1886 #define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B 1887 #define EFI_ACPI_6_0_ERST_STALL 0x0C 1888 #define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D 1889 #define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1890 #define EFI_ACPI_6_0_ERST_GOTO 0x0F 1891 #define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10 1892 #define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11 1893 #define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12 1894 1895 /// 1896 /// ERST Instruction Flags 1897 /// 1898 #define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01 1899 1900 /// 1901 /// ERST Serialization Instruction Entry 1902 /// 1903 typedef struct { 1904 UINT8 SerializationAction; 1905 UINT8 Instruction; 1906 UINT8 Flags; 1907 UINT8 Reserved0; 1908 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1909 UINT64 Value; 1910 UINT64 Mask; 1911 } EFI_ACPI_6_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1912 1913 /// 1914 /// EINJ - Error Injection Table 1915 /// 1916 typedef struct { 1917 EFI_ACPI_DESCRIPTION_HEADER Header; 1918 UINT32 InjectionHeaderSize; 1919 UINT8 InjectionFlags; 1920 UINT8 Reserved0[3]; 1921 UINT32 InjectionEntryCount; 1922 } EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER; 1923 1924 /// 1925 /// EINJ Version (as defined in ACPI 6.0 spec.) 1926 /// 1927 #define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01 1928 1929 /// 1930 /// EINJ Error Injection Actions 1931 /// 1932 #define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00 1933 #define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1934 #define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02 1935 #define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03 1936 #define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04 1937 #define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05 1938 #define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06 1939 #define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07 1940 #define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF 1941 1942 /// 1943 /// EINJ Action Command Status 1944 /// 1945 #define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00 1946 #define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1947 #define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02 1948 1949 /// 1950 /// EINJ Error Type Definition 1951 /// 1952 #define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1953 #define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1954 #define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1955 #define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1956 #define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1957 #define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1958 #define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1959 #define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1960 #define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1961 #define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1962 #define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1963 #define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1964 1965 /// 1966 /// EINJ Injection Instructions 1967 /// 1968 #define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00 1969 #define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01 1970 #define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02 1971 #define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03 1972 #define EFI_ACPI_6_0_EINJ_NOOP 0x04 1973 1974 /// 1975 /// EINJ Instruction Flags 1976 /// 1977 #define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01 1978 1979 /// 1980 /// EINJ Injection Instruction Entry 1981 /// 1982 typedef struct { 1983 UINT8 InjectionAction; 1984 UINT8 Instruction; 1985 UINT8 Flags; 1986 UINT8 Reserved0; 1987 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1988 UINT64 Value; 1989 UINT64 Mask; 1990 } EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY; 1991 1992 /// 1993 /// EINJ Trigger Action Table 1994 /// 1995 typedef struct { 1996 UINT32 HeaderSize; 1997 UINT32 Revision; 1998 UINT32 TableSize; 1999 UINT32 EntryCount; 2000 } EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE; 2001 2002 /// 2003 /// Platform Communications Channel Table (PCCT) 2004 /// 2005 typedef struct { 2006 EFI_ACPI_DESCRIPTION_HEADER Header; 2007 UINT32 Flags; 2008 UINT64 Reserved; 2009 } EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 2010 2011 /// 2012 /// PCCT Version (as defined in ACPI 6.0 spec.) 2013 /// 2014 #define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 2015 2016 /// 2017 /// PCCT Global Flags 2018 /// 2019 #define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0 2020 2021 // 2022 // PCCT Subspace type 2023 // 2024 #define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00 2025 #define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01 2026 #define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02 2027 2028 /// 2029 /// PCC Subspace Structure Header 2030 /// 2031 typedef struct { 2032 UINT8 Type; 2033 UINT8 Length; 2034 } EFI_ACPI_6_0_PCCT_SUBSPACE_HEADER; 2035 2036 /// 2037 /// Generic Communications Subspace Structure 2038 /// 2039 typedef struct { 2040 UINT8 Type; 2041 UINT8 Length; 2042 UINT8 Reserved[6]; 2043 UINT64 BaseAddress; 2044 UINT64 AddressLength; 2045 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2046 UINT64 DoorbellPreserve; 2047 UINT64 DoorbellWrite; 2048 UINT32 NominalLatency; 2049 UINT32 MaximumPeriodicAccessRate; 2050 UINT16 MinimumRequestTurnaroundTime; 2051 } EFI_ACPI_6_0_PCCT_SUBSPACE_GENERIC; 2052 2053 /// 2054 /// Generic Communications Channel Shared Memory Region 2055 /// 2056 2057 typedef struct { 2058 UINT8 Command; 2059 UINT8 Reserved : 7; 2060 UINT8 GenerateSci : 1; 2061 } EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 2062 2063 typedef struct { 2064 UINT8 CommandComplete : 1; 2065 UINT8 SciDoorbell : 1; 2066 UINT8 Error : 1; 2067 UINT8 PlatformNotification : 1; 2068 UINT8 Reserved : 4; 2069 UINT8 Reserved1; 2070 } EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 2071 2072 typedef struct { 2073 UINT32 Signature; 2074 EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 2075 EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 2076 } EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 2077 2078 #define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_POLARITY BIT0 2079 #define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_MODE BIT1 2080 2081 /// 2082 /// Type 1 HW-Reduced Communications Subspace Structure 2083 /// 2084 typedef struct { 2085 UINT8 Type; 2086 UINT8 Length; 2087 UINT32 DoorbellInterrupt; 2088 UINT8 DoorbellInterruptFlags; 2089 UINT8 Reserved; 2090 UINT64 BaseAddress; 2091 UINT64 AddressLength; 2092 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2093 UINT64 DoorbellPreserve; 2094 UINT64 DoorbellWrite; 2095 UINT32 NominalLatency; 2096 UINT32 MaximumPeriodicAccessRate; 2097 UINT16 MinimumRequestTurnaroundTime; 2098 } EFI_ACPI_6_0_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS; 2099 2100 /// 2101 /// Type 2 HW-Reduced Communications Subspace Structure 2102 /// 2103 typedef struct { 2104 UINT8 Type; 2105 UINT8 Length; 2106 UINT32 DoorbellInterrupt; 2107 UINT8 DoorbellInterruptFlags; 2108 UINT8 Reserved; 2109 UINT64 BaseAddress; 2110 UINT64 AddressLength; 2111 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2112 UINT64 DoorbellPreserve; 2113 UINT64 DoorbellWrite; 2114 UINT32 NominalLatency; 2115 UINT32 MaximumPeriodicAccessRate; 2116 UINT16 MinimumRequestTurnaroundTime; 2117 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellAckRegister; 2118 UINT64 DoorbellAckPreserve; 2119 UINT64 DoorbellAckWrite; 2120 } EFI_ACPI_6_0_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS; 2121 2122 // 2123 // Known table signatures 2124 // 2125 2126 /// 2127 /// "RSD PTR " Root System Description Pointer 2128 /// 2129 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 2130 2131 /// 2132 /// "APIC" Multiple APIC Description Table 2133 /// 2134 #define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 2135 2136 /// 2137 /// "BERT" Boot Error Record Table 2138 /// 2139 #define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 2140 2141 /// 2142 /// "BGRT" Boot Graphics Resource Table 2143 /// 2144 #define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 2145 2146 /// 2147 /// "CPEP" Corrected Platform Error Polling Table 2148 /// 2149 #define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 2150 2151 /// 2152 /// "DSDT" Differentiated System Description Table 2153 /// 2154 #define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 2155 2156 /// 2157 /// "ECDT" Embedded Controller Boot Resources Table 2158 /// 2159 #define EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 2160 2161 /// 2162 /// "EINJ" Error Injection Table 2163 /// 2164 #define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 2165 2166 /// 2167 /// "ERST" Error Record Serialization Table 2168 /// 2169 #define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 2170 2171 /// 2172 /// "FACP" Fixed ACPI Description Table 2173 /// 2174 #define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 2175 2176 /// 2177 /// "FACS" Firmware ACPI Control Structure 2178 /// 2179 #define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 2180 2181 /// 2182 /// "FPDT" Firmware Performance Data Table 2183 /// 2184 #define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 2185 2186 /// 2187 /// "GTDT" Generic Timer Description Table 2188 /// 2189 #define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 2190 2191 /// 2192 /// "HEST" Hardware Error Source Table 2193 /// 2194 #define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 2195 2196 /// 2197 /// "MPST" Memory Power State Table 2198 /// 2199 #define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 2200 2201 /// 2202 /// "MSCT" Maximum System Characteristics Table 2203 /// 2204 #define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 2205 2206 /// 2207 /// "NFIT" NVDIMM Firmware Interface Table 2208 /// 2209 #define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T') 2210 2211 /// 2212 /// "PMTT" Platform Memory Topology Table 2213 /// 2214 #define EFI_ACPI_6_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 2215 2216 /// 2217 /// "PSDT" Persistent System Description Table 2218 /// 2219 #define EFI_ACPI_6_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 2220 2221 /// 2222 /// "RASF" ACPI RAS Feature Table 2223 /// 2224 #define EFI_ACPI_6_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 2225 2226 /// 2227 /// "RSDT" Root System Description Table 2228 /// 2229 #define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 2230 2231 /// 2232 /// "SBST" Smart Battery Specification Table 2233 /// 2234 #define EFI_ACPI_6_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 2235 2236 /// 2237 /// "SLIT" System Locality Information Table 2238 /// 2239 #define EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2240 2241 /// 2242 /// "SRAT" System Resource Affinity Table 2243 /// 2244 #define EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2245 2246 /// 2247 /// "SSDT" Secondary System Description Table 2248 /// 2249 #define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2250 2251 /// 2252 /// "XSDT" Extended System Description Table 2253 /// 2254 #define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2255 2256 /// 2257 /// "BOOT" MS Simple Boot Spec 2258 /// 2259 #define EFI_ACPI_6_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2260 2261 /// 2262 /// "CSRT" MS Core System Resource Table 2263 /// 2264 #define EFI_ACPI_6_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2265 2266 /// 2267 /// "DBG2" MS Debug Port 2 Spec 2268 /// 2269 #define EFI_ACPI_6_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2270 2271 /// 2272 /// "DBGP" MS Debug Port Spec 2273 /// 2274 #define EFI_ACPI_6_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2275 2276 /// 2277 /// "DMAR" DMA Remapping Table 2278 /// 2279 #define EFI_ACPI_6_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2280 2281 /// 2282 /// "DRTM" Dynamic Root of Trust for Measurement Table 2283 /// 2284 #define EFI_ACPI_6_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2285 2286 /// 2287 /// "ETDT" Event Timer Description Table 2288 /// 2289 #define EFI_ACPI_6_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2290 2291 /// 2292 /// "HPET" IA-PC High Precision Event Timer Table 2293 /// 2294 #define EFI_ACPI_6_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2295 2296 /// 2297 /// "iBFT" iSCSI Boot Firmware Table 2298 /// 2299 #define EFI_ACPI_6_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2300 2301 /// 2302 /// "IORT" I/O Remapping Table 2303 /// 2304 #define EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T') 2305 2306 /// 2307 /// "IVRS" I/O Virtualization Reporting Structure 2308 /// 2309 #define EFI_ACPI_6_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2310 2311 /// 2312 /// "LPIT" Low Power Idle Table 2313 /// 2314 #define EFI_ACPI_6_0_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2315 2316 /// 2317 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2318 /// 2319 #define EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2320 2321 /// 2322 /// "MCHI" Management Controller Host Interface Table 2323 /// 2324 #define EFI_ACPI_6_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2325 2326 /// 2327 /// "MSDM" MS Data Management Table 2328 /// 2329 #define EFI_ACPI_6_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2330 2331 /// 2332 /// "PCCT" Platform Communications Channel Table 2333 /// 2334 #define EFI_ACPI_6_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') 2335 2336 /// 2337 /// "SLIC" MS Software Licensing Table Specification 2338 /// 2339 #define EFI_ACPI_6_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2340 2341 /// 2342 /// "SPCR" Serial Port Console Redirection Table 2343 /// 2344 #define EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2345 2346 /// 2347 /// "SPMI" Server Platform Management Interface Table 2348 /// 2349 #define EFI_ACPI_6_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2350 2351 /// 2352 /// "STAO" _STA Override Table 2353 /// 2354 #define EFI_ACPI_6_0_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O') 2355 2356 /// 2357 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2358 /// 2359 #define EFI_ACPI_6_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2360 2361 /// 2362 /// "TPM2" Trusted Computing Platform 1 Table 2363 /// 2364 #define EFI_ACPI_6_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2365 2366 /// 2367 /// "UEFI" UEFI ACPI Data Table 2368 /// 2369 #define EFI_ACPI_6_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2370 2371 /// 2372 /// "WAET" Windows ACPI Emulated Devices Table 2373 /// 2374 #define EFI_ACPI_6_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2375 2376 /// 2377 /// "WDAT" Watchdog Action Table 2378 /// 2379 #define EFI_ACPI_6_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2380 2381 /// 2382 /// "WDRT" Watchdog Resource Table 2383 /// 2384 #define EFI_ACPI_6_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2385 2386 /// 2387 /// "WPBT" MS Platform Binary Table 2388 /// 2389 #define EFI_ACPI_6_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2390 2391 /// 2392 /// "XENV" Xen Project Table 2393 /// 2394 #define EFI_ACPI_6_0_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V') 2395 2396 #pragma pack() 2397 2398 #endif 2399