xref: /freebsd/usr.sbin/pciconf/err.c (revision b9f654b163bce26de79705e77b872427c9f2afa1)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2012 Hudson River Trading LLC
5  * Written by: John H. Baldwin <jhb@FreeBSD.org>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #ifndef lint
31 static const char rcsid[] =
32     "$FreeBSD$";
33 #endif /* not lint */
34 
35 #include <sys/param.h>
36 #include <sys/pciio.h>
37 
38 #include <err.h>
39 #include <stdio.h>
40 
41 #include <dev/pci/pcireg.h>
42 
43 #include "pciconf.h"
44 
45 struct bit_table {
46 	uint32_t mask;
47 	const char *desc;
48 };
49 
50 /* Error indicators in the PCI status register (PCIR_STATUS). */
51 static struct bit_table pci_status[] = {
52 	{ PCIM_STATUS_MDPERR, "Master Data Parity Error" },
53 	{ PCIM_STATUS_STABORT, "Sent Target-Abort" },
54 	{ PCIM_STATUS_RTABORT, "Received Target-Abort" },
55 	{ PCIM_STATUS_RMABORT, "Received Master-Abort" },
56 	{ PCIM_STATUS_SERR, "Signalled System Error" },
57 	{ PCIM_STATUS_PERR, "Detected Parity Error" },
58 	{ 0, NULL },
59 };
60 
61 /* Valid error indicator bits in PCIR_STATUS. */
62 #define	PCI_ERRORS	(PCIM_STATUS_MDPERR | PCIM_STATUS_STABORT |	\
63 			 PCIM_STATUS_RTABORT | PCIM_STATUS_RMABORT |	\
64 			 PCIM_STATUS_SERR | PCIM_STATUS_PERR)
65 
66 /* Error indicators in the PCI-Express device status register. */
67 static struct bit_table pcie_device_status[] = {
68 	{ PCIEM_STA_CORRECTABLE_ERROR, "Correctable Error Detected" },
69 	{ PCIEM_STA_NON_FATAL_ERROR, "Non-Fatal Error Detected" },
70 	{ PCIEM_STA_FATAL_ERROR, "Fatal Error Detected" },
71 	{ PCIEM_STA_UNSUPPORTED_REQ, "Unsupported Request Detected" },
72 	{ 0, NULL },
73 };
74 
75 /* Valid error indicator bits in the PCI-Express device status register. */
76 #define	PCIE_ERRORS	(PCIEM_STA_CORRECTABLE_ERROR |		\
77 			 PCIEM_STA_NON_FATAL_ERROR |			\
78 			 PCIEM_STA_FATAL_ERROR |			\
79 			 PCIEM_STA_UNSUPPORTED_REQ)
80 
81 /* AER Uncorrected errors. */
82 static struct bit_table aer_uc[] = {
83 	{ PCIM_AER_UC_TRAINING_ERROR, "Link Training Error" },
84 	{ PCIM_AER_UC_DL_PROTOCOL_ERROR, "Data Link Protocol Error" },
85 	{ PCIM_AER_UC_SURPRISE_LINK_DOWN, "Surprise Link Down Error" },
86 	{ PCIM_AER_UC_POISONED_TLP, "Poisoned TLP" },
87 	{ PCIM_AER_UC_FC_PROTOCOL_ERROR, "Flow Control Protocol Error" },
88 	{ PCIM_AER_UC_COMPLETION_TIMEOUT, "Completion Timeout" },
89 	{ PCIM_AER_UC_COMPLETER_ABORT, "Completer Abort" },
90 	{ PCIM_AER_UC_UNEXPECTED_COMPLETION, "Unexpected Completion" },
91 	{ PCIM_AER_UC_RECEIVER_OVERFLOW, "Receiver Overflow Error" },
92 	{ PCIM_AER_UC_MALFORMED_TLP, "Malformed TLP" },
93 	{ PCIM_AER_UC_ECRC_ERROR, "ECRC Error" },
94 	{ PCIM_AER_UC_UNSUPPORTED_REQUEST, "Unsupported Request" },
95 	{ PCIM_AER_UC_ACS_VIOLATION, "ACS Violation" },
96 	{ PCIM_AER_UC_INTERNAL_ERROR, "Uncorrectable Internal Error" },
97 	{ PCIM_AER_UC_MC_BLOCKED_TLP, "MC Blocked TLP" },
98 	{ PCIM_AER_UC_ATOMIC_EGRESS_BLK, "AtomicOp Egress Blocked" },
99 	{ PCIM_AER_UC_TLP_PREFIX_BLOCKED, "TLP Prefix Blocked Error" },
100 	{ 0, NULL },
101 };
102 
103 /* AER Corrected errors. */
104 static struct bit_table aer_cor[] = {
105 	{ PCIM_AER_COR_RECEIVER_ERROR, "Receiver Error" },
106 	{ PCIM_AER_COR_BAD_TLP, "Bad TLP" },
107 	{ PCIM_AER_COR_BAD_DLLP, "Bad DLLP" },
108 	{ PCIM_AER_COR_REPLAY_ROLLOVER, "REPLAY_NUM Rollover" },
109 	{ PCIM_AER_COR_REPLAY_TIMEOUT, "Replay Timer Timeout" },
110 	{ PCIM_AER_COR_ADVISORY_NF_ERROR, "Advisory Non-Fatal Error" },
111 	{ PCIM_AER_COR_INTERNAL_ERROR, "Corrected Internal Error" },
112 	{ PCIM_AER_COR_HEADER_LOG_OVFLOW, "Header Log Overflow" },
113 	{ 0, NULL },
114 };
115 
116 static void
117 print_bits(const char *header, struct bit_table *table, uint32_t mask)
118 {
119 	int first;
120 
121 	first = 1;
122 	for (; table->desc != NULL; table++)
123 		if (mask & table->mask) {
124 			if (first) {
125 				printf("%14s = ", header);
126 				first = 0;
127 			} else
128 				printf("                 ");
129 			printf("%s\n", table->desc);
130 			mask &= ~table->mask;
131 		}
132 	if (mask != 0) {
133 		if (first)
134 			printf("%14s = ", header);
135 		else
136 			printf("                 ");
137 		printf("Unknown: 0x%08x\n", mask);
138 	}
139 }
140 
141 void
142 list_errors(int fd, struct pci_conf *p)
143 {
144 	uint32_t mask, severity;
145 	uint16_t sta, aer;
146 	uint8_t pcie;
147 
148 	/* First check for standard PCI errors. */
149 	sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2);
150 	print_bits("PCI errors", pci_status, sta & PCI_ERRORS);
151 
152 	/* See if this is a PCI-express device. */
153 	pcie = pci_find_cap(fd, p, PCIY_EXPRESS);
154 	if (pcie == 0)
155 		return;
156 
157 	/* Check for PCI-e errors. */
158 	sta = read_config(fd, &p->pc_sel, pcie + PCIER_DEVICE_STA, 2);
159 	print_bits("PCI-e errors", pcie_device_status, sta & PCIE_ERRORS);
160 
161 	/* See if this device supports AER. */
162 	aer = pcie_find_cap(fd, p, PCIZ_AER);
163 	if (aer == 0)
164 		return;
165 
166 	/* Check for uncorrected errors. */
167 	mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_STATUS, 4);
168         severity = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_SEVERITY, 4);
169 	print_bits("Fatal", aer_uc, mask & severity);
170 	print_bits("Non-fatal", aer_uc, mask & ~severity);
171 
172 	/* Check for corrected errors. */
173 	mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_COR_STATUS, 4);
174 	print_bits("Corrected", aer_cor, mask);
175 }
176