xref: /freebsd/usr.sbin/memcontrol/memcontrol.8 (revision f4b37ed0f8b307b1f3f0f630ca725d68f1dff30d)
1.\" Copyright (c) 1999 Chris Costello
2.\" All rights reserved.
3.\"
4.\" Redistribution and use in source and binary forms, with or without
5.\" modification, are permitted provided that the following conditions
6.\" are met:
7.\" 1. Redistributions of source code must retain the above copyright
8.\"    notice, this list of conditions and the following disclaimer.
9.\" 2. Redistributions in binary form must reproduce the above copyright
10.\"    notice, this list of conditions and the following disclaimer in the
11.\"    documentation and/or other materials provided with the distribution.
12.\"
13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23.\" SUCH DAMAGE.
24.\"
25.\" $FreeBSD$
26.\"
27.Dd September 15, 2002
28.Dt MEMCONTROL 8
29.Os
30.Sh NAME
31.Nm memcontrol
32.Nd "control system cache behaviour with respect to memory"
33.Sh SYNOPSIS
34.Nm
35.Cm list
36.Op Fl a
37.Nm
38.Cm set
39.Fl b Ar base
40.Fl l Ar length
41.Fl o Ar owner
42.Ar attribute
43.Nm
44.Cm clear
45.Fl o Ar owner
46.Nm
47.Cm clear
48.Fl b Ar base
49.Fl l Ar length
50.Sh DESCRIPTION
51A number of supported system architectures allow the behaviour of the CPU
52cache to be programmed to behave differently depending on the region being
53written.
54.Pp
55The
56.Nm
57utility
58provides an interface to this facility, allowing CPU cache behavior to
59be altered for ranges of system physical memory.
60.Pp
61These ranges are typically power-of-2 aligned and sized, however the specific
62rules governing their layout vary between architectures.
63The
64.Nm
65utility does not attempt to enforce these rules, however the system will
66reject any attempt to set an illegal combination.
67.Bl -tag -width ".Cm clear"
68.It Cm list
69List range slots.
70.Bl -tag -width indent
71.It Fl a
72List all range slots, even those that are inactive.
73.El
74.It Cm set
75Set memory range attributes.
76.Bl -tag -width indent
77.It Fl b Ar base
78Memory range base address.
79.It Fl l Ar length
80Length of memory range in bytes, power of 2.
81.It Fl o Ar owner
82Text identifier for this setting (7 char max).
83.It Ar attribute
84Attributes applied to this range; combinations of
85.Cm force , uncacheable , write-combine , write-through , write-back ,
86and
87.Cm write-protect .
88.El
89.It Cm clear
90Clear memory range attributes.
91Ranges may be cleared by owner or by
92base/length combination.
93.Pp
94To clear based on ownership:
95.Bl -tag -width indent
96.It Fl o Ar owner
97All ranges with this owner will be cleared.
98.El
99.Pp
100To clear based on the base/length combination:
101.Bl -tag -width indent
102.It Fl b Ar base
103Memory range base address.
104.It Fl l Ar length
105Length of memory range in bytes, power of 2.
106.El
107.Pp
108Base and length must exactly match an existing range.
109.El
110.Sh SEE ALSO
111.Xr mem 4
112