1.\" 2.\" Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17.\" ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24.\" SUCH DAMAGE. 25.\" 26.Dd May 22, 2019 27.Dt I2C 8 28.Os 29.Sh NAME 30.Nm i2c 31.Nd test I2C bus and slave devices 32.Sh SYNOPSIS 33.Nm 34.Cm -a Ar address 35.Op Fl f Ar device 36.Op Fl d Ar r|w 37.Op Fl w Ar 0|8|16|16LE|16BE 38.Op Fl o Ar offset 39.Op Fl c Ar count 40.Op Fl m Ar tr|ss|rs|no 41.Op Fl b 42.Op Fl v 43.Nm 44.Cm -h 45.Nm 46.Cm -i 47.Op Fl v 48.Op Ar cmd ... 49.Op Ar - 50.Nm 51.Cm -r 52.Op Fl f Ar device 53.Op Fl v 54.Nm 55.Cm -s 56.Op Fl f Ar device 57.Op Fl n Ar skip_addr 58.Op Fl v 59.Sh DESCRIPTION 60The 61.Nm 62utility can be used to perform raw data transfers (read or write) to devices 63on an I2C bus. 64It can also scan the bus for available devices and reset the I2C controller. 65.Pp 66The options are as follows: 67.Bl -tag -width ".Fl d Ar direction" 68.It Fl a Ar address 697-bit address on the I2C device to operate on (hex). 70.It Fl b 71binary mode - when performing a read operation, the data read from the device 72is output in binary format on stdout. 73.It Fl c Ar count 74number of bytes to transfer (decimal). 75.It Fl d Ar r|w 76transfer direction: r - read, w - write. 77Data to be written is read from stdin as binary bytes. 78.It Fl f Ar device 79I2C bus to use (default is /dev/iic0). 80.It Fl i 81Interpreted mode 82.It Fl h 83Help 84.It Fl m Ar tr|ss|rs|no 85addressing mode, i.e., I2C bus operations performed after the offset for the 86transfer has been written to the device and before the actual read/write 87operation. 88.Bl -tag -compact -offset indent 89.It Va tr 90complete-transfer 91.It Va ss 92stop then start 93.It Va rs 94repeated start 95.It Va no 96none 97.El 98Some I2C bus hardware does not provide control over the individual start, 99repeat-start, and stop operations. 100Such hardware can only perform a complete transfer of the offset and the 101data as a single operation. 102The 103.Va tr 104mode creates control structures describing the transfer and submits them 105to the driver as a single complete transaction. 106This mode works on all types of I2C hardware. 107.It Fl n Ar skip_addr 108address(es) to be skipped during bus scan. 109One or more addresses ([0x]xx) or ranges of addresses 110([0x]xx-[0x]xx or [0x]xx..[0x]xx) separated by commas or colons. 111.It Fl o Ar offset 112offset within the device for data transfer (hex). 113The default is zero. 114Use 115.Dq -w 0 116to disable writing of the offset to the slave. 117.It Fl r 118reset the controller. 119.It Fl s 120scan the bus for devices. 121.It Fl v 122be verbose. 123.It Fl w Ar 0|8|16|16LE|16BE 124device offset width (in bits). 125This is used to determine how to pass 126.Ar offset 127specified with 128.Fl o 129to the slave. 130Zero means that the offset is ignored and not passed to the slave at all. 131The endianness defaults to little-endian. 132.El 133.Sh INTERPRETED MODE 134When started with 135.Fl i 136any remaining arguments are interpreted as commands, and 137if the last argument is '-', or there are no arguments, 138commands will (also) be read from stdin. 139.Pp 140Available commands: 141.Bl -tag -compact 142.It 'r' bus address [0|8|16|16LE|16BE] offset count 143Read command, count bytes are read and hexdumped to stdout. 144.It 'w' bus address [0|8|16|16LE|16BE] offset hexstring 145Write command, hexstring (white-space is allowed) is written to device. 146.It 'p' anything 147Print command, the entire line is printed to stdout. (This can be used 148for synchronization.) 149.El 150.Pp 151All numeric fields accept canonical decimal/octal/hex notation. 152.Pp 153Without the 154.Fl v 155option, all errors are fatal with non-zero exit status. 156.Pp 157With the 158.Fl v 159option, no errors are fatal, and all commands will return 160either "OK\en" or "ERROR\en" on stdout. 161In case of error, detailed diagnostics will precede that on stderr. 162.Pp 163Blank lines and lines starting with '#' are ignored. 164.Sh EXAMPLES 165.Bl -bullet 166.It 167Scan the default bus (/dev/iic0) for devices: 168.Pp 169i2c -s 170.It 171Scan the default bus (/dev/iic0) for devices and skip addresses 1720x45 to 0x47 (inclusive) and 0x56. 173.Pp 174i2c -s -n 0x56,45-47 175.It 176Read 8 bytes of data from device at address 0x56 (e.g., an EEPROM): 177.Pp 178i2c -a 0x56 -d r -c 8 179.It 180Write 16 bytes of data from file data.bin to device 0x56 at offset 0x10: 181.Pp 182i2c -a 0x56 -d w -c 16 -o 0x10 -b < data.bin 183.It 184Copy 4 bytes between two EEPROMs (0x56 on /dev/iic1 to 0x57 on /dev/iic0): 185.Pp 186i2c -a 0x56 -f /dev/iic1 -d r -c 0x4 -b | i2c -a 0x57 -f /dev/iic0 -d w -c 4 -b 187.It 188Reset the controller: 189.Pp 190i2c -f /dev/iic1 -r 191.It 192Read 8 bytes at address 24 in an EEPROM: 193.Pp 194i2c -i 'r 0 0x50 16BE 24 8' 195.It 196Read 2x8 bytes at address 24 and 48 in an EEPROM: 197.Pp 198echo 'r 0 0x50 16BE 48 8' | i2c -i 'r 0 0x50 16BE 24 8' - 199.El 200.Sh WARNING 201Many systems store critical low-level information in I2C memories, and 202may contain other I2C devices, such as temperature or voltage sensors. 203Reading these can disturb the firmware's operation and writing to them 204can "brick" the hardware. 205.Sh SEE ALSO 206.Xr iic 4 , 207.Xr iicbus 4 208.Xr smbus 4 209.Sh HISTORY 210The 211.Nm 212utility appeared in 213.Fx 8.0 . 214.Sh AUTHORS 215.An -nosplit 216The 217.Nm 218utility and this manual page were written by 219.An Bartlomiej Sieka Aq Mt tur@semihalf.com 220and 221.An Michal Hajduk Aq Mt mih@semihalf.com . 222.Pp 223.An Poul-Henning Kamp Aq Mt phk@FreeBSD.org 224added interpreted mode. 225