xref: /freebsd/usr.sbin/cxgbetool/reg_defs_t7.c (revision 24e4dcf4ba5e9dedcf89efd358ea3e1fe5867020)

/* This file is automatically generated --- changes will be lost */
/* Generation Date : Thu Sep 11 05:26:14 PM IST 2025 */
/* Directory name: t7_reg.txt, Changeset: 5945:1487219ecb20 */

struct reg_info t7_sge_regs[] = {
	{ "SGE_PF_KDOORBELL", 0x1e000, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1e004, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1e400, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1e404, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1e408, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1e40c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1e800, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1e804, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1e808, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1e80c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1ec00, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1ec04, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1ec08, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1ec0c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1f000, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1f004, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1f008, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1f00c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1f400, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1f404, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1f408, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1f40c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1f800, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1f804, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1f808, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1f80c, 0 },
	{ "SGE_PF_KDOORBELL", 0x1fc00, 0 },
		{ "QID", 15, 17 },
		{ "Sync", 14, 1 },
		{ "Type", 13, 1 },
		{ "PIDX", 0, 13 },
	{ "SGE_PF_GTS", 0x1fc04, 0 },
		{ "IngressQID", 16, 16 },
		{ "TimerReg", 13, 3 },
		{ "SEIntArm", 12, 1 },
		{ "CIDXInc", 0, 12 },
	{ "SGE_PF_KTIMESTAMP_LO", 0x1fc08, 0 },
	{ "SGE_PF_KTIMESTAMP_HI", 0x1fc0c, 0 },
	{ "SGE_CONTROL", 0x1008, 0 },
		{ "IgrAllCPLtoFL", 31, 1 },
		{ "FLSplitMin", 22, 9 },
		{ "NumOfFid", 19, 3 },
		{ "RxPktCPLMode", 18, 1 },
		{ "EgrStatusPageSize", 17, 1 },
		{ "IngHintEnable2", 16, 1 },
		{ "IngHintEnable1", 15, 1 },
		{ "IngHintEnable0", 14, 1 },
		{ "IngIntCompareIDX", 13, 1 },
		{ "PktShift", 10, 3 },
		{ "IngPCIeBoundary", 7, 3 },
		{ "IngPadBoundary", 4, 3 },
		{ "IngHintEnable3", 3, 1 },
		{ "tf_mode", 1, 2 },
		{ "GlobalEnable", 0, 1 },
	{ "SGE_HOST_PAGE_SIZE", 0x100c, 0 },
		{ "HostPageSizePF7", 28, 4 },
		{ "HostPageSizePF6", 24, 4 },
		{ "HostPageSizePF5", 20, 4 },
		{ "HostPageSizePF4", 16, 4 },
		{ "HostPageSizePF3", 12, 4 },
		{ "HostPageSizePF2", 8, 4 },
		{ "HostPageSizePF1", 4, 4 },
		{ "HostPageSizePF0", 0, 4 },
	{ "SGE_EGRESS_QUEUES_PER_PAGE_PF", 0x1010, 0 },
		{ "QueuesPerPagePF7", 28, 4 },
		{ "QueuesPerPagePF6", 24, 4 },
		{ "QueuesPerPagePF5", 20, 4 },
		{ "QueuesPerPagePF4", 16, 4 },
		{ "QueuesPerPagePF3", 12, 4 },
		{ "QueuesPerPagePF2", 8, 4 },
		{ "QueuesPerPagePF1", 4, 4 },
		{ "QueuesPerPagePF0", 0, 4 },
	{ "SGE_EGRESS_QUEUES_PER_PAGE_VF", 0x1014, 0 },
		{ "QueuesPerPageVFPF7", 28, 4 },
		{ "QueuesPerPageVFPF6", 24, 4 },
		{ "QueuesPerPageVFPF5", 20, 4 },
		{ "QueuesPerPageVFPF4", 16, 4 },
		{ "QueuesPerPageVFPF3", 12, 4 },
		{ "QueuesPerPageVFPF2", 8, 4 },
		{ "QueuesPerPageVFPF1", 4, 4 },
		{ "QueuesPerPageVFPF0", 0, 4 },
	{ "SGE_USER_MODE_LIMITS", 0x1018, 0 },
		{ "Opcode_Min", 24, 8 },
		{ "Opcode_Max", 16, 8 },
		{ "Length_Min", 8, 8 },
		{ "Length_Max", 0, 8 },
	{ "SGE_WR_ERROR", 0x101c, 0 },
		{ "WR_Sendpath_Error_Opcode", 16, 8 },
		{ "WR_Sendpath_Opcode", 8, 8 },
		{ "WR_Error_Opcode", 0, 8 },
	{ "SGE_INT_CAUSE1", 0x1024, 0 },
		{ "perr_flm_CreditFifo", 30, 1 },
		{ "perr_imsg_hint_fifo", 29, 1 },
		{ "perr_headersplit_fifo3", 28, 1 },
		{ "perr_headersplit_fifo2", 27, 1 },
		{ "perr_payload_fifo3", 26, 1 },
		{ "perr_payload_fifo2", 25, 1 },
		{ "perr_pc_rsp", 23, 1 },
		{ "perr_pc_req", 22, 1 },
		{ "perr_dbp_pc_rsp_fifo3", 21, 1 },
		{ "perr_dbp_pc_rsp_fifo2", 20, 1 },
		{ "perr_dbp_pc_rsp_fifo1", 19, 1 },
		{ "perr_dbp_pc_rsp_fifo0", 18, 1 },
		{ "perr_dmarbt", 17, 1 },
		{ "perr_flm_DbpFifo", 16, 1 },
		{ "perr_flm_MCReq_fifo", 15, 1 },
		{ "perr_flm_HintFifo", 14, 1 },
		{ "perr_align_ctl_fifo3", 13, 1 },
		{ "perr_align_ctl_fifo2", 12, 1 },
		{ "perr_align_ctl_fifo1", 11, 1 },
		{ "perr_align_ctl_fifo0", 10, 1 },
		{ "perr_edma_fifo3", 9, 1 },
		{ "perr_edma_fifo2", 8, 1 },
		{ "perr_edma_fifo1", 7, 1 },
		{ "perr_edma_fifo0", 6, 1 },
		{ "perr_pd_fifo3", 5, 1 },
		{ "perr_pd_fifo2", 4, 1 },
		{ "perr_pd_fifo1", 3, 1 },
		{ "perr_pd_fifo0", 2, 1 },
		{ "perr_ing_ctxt_mifrsp", 1, 1 },
		{ "perr_egr_ctxt_mifrsp", 0, 1 },
	{ "SGE_INT_ENABLE1", 0x1028, 0 },
		{ "perr_flm_CreditFifo", 30, 1 },
		{ "perr_imsg_hint_fifo", 29, 1 },
		{ "perr_headersplit_fifo3", 28, 1 },
		{ "perr_headersplit_fifo2", 27, 1 },
		{ "perr_payload_fifo3", 26, 1 },
		{ "perr_payload_fifo2", 25, 1 },
		{ "perr_pc_rsp", 23, 1 },
		{ "perr_pc_req", 22, 1 },
		{ "perr_dbp_pc_rsp_fifo3", 21, 1 },
		{ "perr_dbp_pc_rsp_fifo2", 20, 1 },
		{ "perr_dbp_pc_rsp_fifo1", 19, 1 },
		{ "perr_dbp_pc_rsp_fifo0", 18, 1 },
		{ "perr_dmarbt", 17, 1 },
		{ "perr_flm_DbpFifo", 16, 1 },
		{ "perr_flm_MCReq_fifo", 15, 1 },
		{ "perr_flm_HintFifo", 14, 1 },
		{ "perr_align_ctl_fifo3", 13, 1 },
		{ "perr_align_ctl_fifo2", 12, 1 },
		{ "perr_align_ctl_fifo1", 11, 1 },
		{ "perr_align_ctl_fifo0", 10, 1 },
		{ "perr_edma_fifo3", 9, 1 },
		{ "perr_edma_fifo2", 8, 1 },
		{ "perr_edma_fifo1", 7, 1 },
		{ "perr_edma_fifo0", 6, 1 },
		{ "perr_pd_fifo3", 5, 1 },
		{ "perr_pd_fifo2", 4, 1 },
		{ "perr_pd_fifo1", 3, 1 },
		{ "perr_pd_fifo0", 2, 1 },
		{ "perr_ing_ctxt_mifrsp", 1, 1 },
		{ "perr_egr_ctxt_mifrsp", 0, 1 },
	{ "SGE_PERR_ENABLE1", 0x102c, 0 },
		{ "perr_flm_CreditFifo", 30, 1 },
		{ "perr_imsg_hint_fifo", 29, 1 },
		{ "perr_headersplit_fifo3", 28, 1 },
		{ "perr_headersplit_fifo2", 27, 1 },
		{ "perr_payload_fifo3", 26, 1 },
		{ "perr_payload_fifo2", 25, 1 },
		{ "perr_pc_rsp", 23, 1 },
		{ "perr_pc_req", 22, 1 },
		{ "perr_dbp_pc_rsp_fifo3", 21, 1 },
		{ "perr_dbp_pc_rsp_fifo2", 20, 1 },
		{ "perr_dbp_pc_rsp_fifo1", 19, 1 },
		{ "perr_dbp_pc_rsp_fifo0", 18, 1 },
		{ "perr_dmarbt", 17, 1 },
		{ "perr_flm_DbpFifo", 16, 1 },
		{ "perr_flm_MCReq_fifo", 15, 1 },
		{ "perr_flm_HintFifo", 14, 1 },
		{ "perr_align_ctl_fifo3", 13, 1 },
		{ "perr_align_ctl_fifo2", 12, 1 },
		{ "perr_align_ctl_fifo1", 11, 1 },
		{ "perr_align_ctl_fifo0", 10, 1 },
		{ "perr_edma_fifo3", 9, 1 },
		{ "perr_edma_fifo2", 8, 1 },
		{ "perr_edma_fifo1", 7, 1 },
		{ "perr_edma_fifo0", 6, 1 },
		{ "perr_pd_fifo3", 5, 1 },
		{ "perr_pd_fifo2", 4, 1 },
		{ "perr_pd_fifo1", 3, 1 },
		{ "perr_pd_fifo0", 2, 1 },
		{ "perr_ing_ctxt_mifrsp", 1, 1 },
		{ "perr_egr_ctxt_mifrsp", 0, 1 },
	{ "SGE_INT_CAUSE2", 0x1030, 0 },
		{ "tf_fifo_perr", 24, 1 },
		{ "perr_egr_dbp_tx_coal", 23, 1 },
		{ "perr_dbp_fl_fifo", 22, 1 },
		{ "deq_ll_perr", 21, 1 },
		{ "enq_perr", 20, 1 },
		{ "deq_out_perr", 19, 1 },
		{ "buf_perr", 18, 1 },
		{ "perr_isw_idma3_fifo", 15, 1 },
		{ "perr_conm_sram", 14, 1 },
		{ "perr_isw_idma2_fifo", 13, 1 },
		{ "perr_isw_idma0_fifo", 12, 1 },
		{ "perr_isw_idma1_fifo", 11, 1 },
		{ "perr_isw_dbp_fifo", 10, 1 },
		{ "perr_isw_gts_fifo", 9, 1 },
		{ "perr_itp_evr", 8, 1 },
		{ "perr_flm_cntxmem", 7, 1 },
		{ "perr_flm_l1Cache", 6, 1 },
		{ "sge_ipp_fifo_perr", 5, 1 },
		{ "perr_dbp_hp_fifo", 4, 1 },
		{ "perr_db_fifo", 3, 1 },
		{ "perr_ing_ctxt_cache", 2, 1 },
		{ "perr_egr_ctxt_cache", 1, 1 },
		{ "perr_base_size", 0, 1 },
	{ "SGE_INT_ENABLE2", 0x1034, 0 },
		{ "tf_fifo_perr", 24, 1 },
		{ "perr_egr_dbp_tx_coal", 23, 1 },
		{ "perr_dbp_fl_fifo", 22, 1 },
		{ "deq_ll_perr", 21, 1 },
		{ "enq_perr", 20, 1 },
		{ "deq_out_perr", 19, 1 },
		{ "buf_perr", 18, 1 },
		{ "perr_isw_idma3_fifo", 15, 1 },
		{ "perr_conm_sram", 14, 1 },
		{ "perr_isw_idma2_fifo", 13, 1 },
		{ "perr_isw_idma0_fifo", 12, 1 },
		{ "perr_isw_idma1_fifo", 11, 1 },
		{ "perr_isw_dbp_fifo", 10, 1 },
		{ "perr_isw_gts_fifo", 9, 1 },
		{ "perr_itp_evr", 8, 1 },
		{ "perr_flm_cntxmem", 7, 1 },
		{ "perr_flm_l1Cache", 6, 1 },
		{ "sge_ipp_fifo_perr", 5, 1 },
		{ "perr_dbp_hp_fifo", 4, 1 },
		{ "perr_db_fifo", 3, 1 },
		{ "perr_ing_ctxt_cache", 2, 1 },
		{ "perr_egr_ctxt_cache", 1, 1 },
		{ "perr_base_size", 0, 1 },
	{ "SGE_PERR_ENABLE2", 0x1038, 0 },
		{ "tf_fifo_perr", 24, 1 },
		{ "perr_egr_dbp_tx_coal", 23, 1 },
		{ "perr_dbp_fl_fifo", 22, 1 },
		{ "deq_ll_perr", 21, 1 },
		{ "enq_perr", 20, 1 },
		{ "deq_out_perr", 19, 1 },
		{ "buf_perr", 18, 1 },
		{ "perr_isw_idma3_fifo", 15, 1 },
		{ "perr_conm_sram", 14, 1 },
		{ "perr_isw_idma2_fifo", 13, 1 },
		{ "perr_isw_idma0_fifo", 12, 1 },
		{ "perr_isw_idma1_fifo", 11, 1 },
		{ "perr_isw_dbp_fifo", 10, 1 },
		{ "perr_isw_gts_fifo", 9, 1 },
		{ "perr_itp_evr", 8, 1 },
		{ "perr_flm_cntxmem", 7, 1 },
		{ "perr_flm_l1Cache", 6, 1 },
		{ "sge_ipp_fifo_perr", 5, 1 },
		{ "perr_dbp_hp_fifo", 4, 1 },
		{ "perr_dbp_lp_fifo", 3, 1 },
		{ "perr_ing_ctxt_cache", 2, 1 },
		{ "perr_egr_ctxt_cache", 1, 1 },
		{ "perr_base_size", 0, 1 },
	{ "SGE_INT_CAUSE3", 0x103c, 0 },
		{ "err_flm_dbp", 31, 1 },
		{ "err_flm_idma1", 30, 1 },
		{ "err_flm_idma0", 29, 1 },
		{ "err_flm_hint", 28, 1 },
		{ "err_pcie_error3", 27, 1 },
		{ "err_pcie_error2", 26, 1 },
		{ "err_pcie_error1", 25, 1 },
		{ "err_pcie_error0", 24, 1 },
		{ "err_timer_above_max_qid", 23, 1 },
		{ "err_cpl_exceed_iqe_size", 22, 1 },
		{ "err_invalid_cidx_inc", 21, 1 },
		{ "err_itp_time_paused", 20, 1 },
		{ "err_cpl_opcode_0", 19, 1 },
		{ "err_dropped_db", 18, 1 },
		{ "err_data_cpl_on_high_qid1", 17, 1 },
		{ "err_data_cpl_on_high_qid0", 16, 1 },
		{ "err_bad_db_pidx3", 15, 1 },
		{ "err_bad_db_pidx2", 14, 1 },
		{ "err_bad_db_pidx1", 13, 1 },
		{ "err_bad_db_pidx0", 12, 1 },
		{ "err_ing_pcie_chan", 11, 1 },
		{ "err_ing_ctxt_prio", 10, 1 },
		{ "err_egr_ctxt_prio", 9, 1 },
		{ "dbp_tbuf_full", 8, 1 },
		{ "fatal_wre_len", 7, 1 },
		{ "reg_address_err", 6, 1 },
		{ "ingress_size_err", 5, 1 },
		{ "egress_size_err", 4, 1 },
		{ "err_inv_ctxt3", 3, 1 },
		{ "err_inv_ctxt2", 2, 1 },
		{ "err_inv_ctxt1", 1, 1 },
		{ "err_inv_ctxt0", 0, 1 },
	{ "SGE_INT_ENABLE3", 0x1040, 0 },
		{ "err_flm_dbp", 31, 1 },
		{ "err_flm_idma1", 30, 1 },
		{ "err_flm_idma0", 29, 1 },
		{ "err_flm_hint", 28, 1 },
		{ "err_pcie_error3", 27, 1 },
		{ "err_pcie_error2", 26, 1 },
		{ "err_pcie_error1", 25, 1 },
		{ "err_pcie_error0", 24, 1 },
		{ "err_timer_above_max_qid", 23, 1 },
		{ "err_cpl_exceed_iqe_size", 22, 1 },
		{ "err_invalid_cidx_inc", 21, 1 },
		{ "err_itp_time_paused", 20, 1 },
		{ "err_cpl_opcode_0", 19, 1 },
		{ "err_dropped_db", 18, 1 },
		{ "err_data_cpl_on_high_qid1", 17, 1 },
		{ "err_data_cpl_on_high_qid0", 16, 1 },
		{ "err_bad_db_pidx3", 15, 1 },
		{ "err_bad_db_pidx2", 14, 1 },
		{ "err_bad_db_pidx1", 13, 1 },
		{ "err_bad_db_pidx0", 12, 1 },
		{ "err_ing_pcie_chan", 11, 1 },
		{ "err_ing_ctxt_prio", 10, 1 },
		{ "err_egr_ctxt_prio", 9, 1 },
		{ "dbp_tbuf_full", 8, 1 },
		{ "fatal_wre_len", 7, 1 },
		{ "reg_address_err", 6, 1 },
		{ "ingress_size_err", 5, 1 },
		{ "egress_size_err", 4, 1 },
		{ "err_inv_ctxt3", 3, 1 },
		{ "err_inv_ctxt2", 2, 1 },
		{ "err_inv_ctxt1", 1, 1 },
		{ "err_inv_ctxt0", 0, 1 },
	{ "SGE_FL_BUFFER_SIZE0", 0x1044, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE1", 0x1048, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE2", 0x104c, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE3", 0x1050, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE4", 0x1054, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE5", 0x1058, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE6", 0x105c, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE7", 0x1060, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE8", 0x1064, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE9", 0x1068, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE10", 0x106c, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE11", 0x1070, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE12", 0x1074, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE13", 0x1078, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE14", 0x107c, 0 },
		{ "Size", 4, 20 },
	{ "SGE_FL_BUFFER_SIZE15", 0x1080, 0 },
		{ "Size", 4, 20 },
	{ "SGE_DBQ_CTXT_BADDR", 0x1084, 0 },
		{ "BaseAddr", 3, 29 },
	{ "SGE_IMSG_CTXT_BADDR", 0x1088, 0 },
		{ "BaseAddr", 3, 29 },
	{ "SGE_FLM_CACHE_BADDR", 0x108c, 0 },
		{ "BaseAddr", 3, 29 },
	{ "SGE_FLM_CFG", 0x1090, 0 },
		{ "OpMode", 26, 6 },
		{ "NullPtr", 20, 4 },
		{ "NullPtrEn", 19, 1 },
		{ "NoHdr", 18, 1 },
		{ "CachePtrCnt", 16, 2 },
		{ "EDRAMPtrCnt", 14, 2 },
		{ "HdrStartFLQ", 11, 3 },
		{ "FetchThresh", 6, 5 },
		{ "CreditCnt", 4, 2 },
		{ "CreditCntPacking", 2, 2 },
		{ "HdrStartFLQ4K", 1, 1 },
		{ "NoEDRAM", 0, 1 },
	{ "SGE_CONM_CTRL", 0x1094, 0 },
		{ "EgrThresholdPacking", 16, 8 },
		{ "EgrThreshold", 8, 8 },
		{ "IngThreshold", 2, 6 },
	{ "SGE_TIMESTAMP_LO", 0x1098, 0 },
	{ "SGE_TIMESTAMP_HI", 0x109c, 0 },
		{ "Opcode", 28, 2 },
		{ "Value", 0, 28 },
	{ "SGE_INGRESS_RX_THRESHOLD", 0x10a0, 0 },
		{ "Threshold_0", 24, 6 },
		{ "Threshold_1", 16, 6 },
		{ "Threshold_2", 8, 6 },
		{ "Threshold_3", 0, 6 },
	{ "SGE_DBFIFO_STATUS", 0x10a4, 0 },
		{ "vfifo_cnt", 15, 17 },
		{ "coal_ctl_fifo_cnt", 8, 6 },
		{ "merge_fifo_cnt", 0, 6 },
	{ "SGE_DOORBELL_CONTROL", 0x10a8, 0 },
		{ "HintDepthCtl", 27, 5 },
		{ "NoCoalesce", 26, 1 },
		{ "HP_Weight", 24, 2 },
		{ "HP_Disable", 23, 1 },
		{ "ForceUserDBtoLP", 22, 1 },
		{ "ForceVFPF0DBtoLP", 21, 1 },
		{ "ForceVFPF1DBtoLP", 20, 1 },
		{ "ForceVFPF2DBtoLP", 19, 1 },
		{ "ForceVFPF3DBtoLP", 18, 1 },
		{ "ForceVFPF4DBtoLP", 17, 1 },
		{ "ForceVFPF5DBtoLP", 16, 1 },
		{ "ForceVFPF6DBtoLP", 15, 1 },
		{ "ForceVFPF7DBtoLP", 14, 1 },
		{ "Enable_Drop", 13, 1 },
		{ "Drop_Timeout", 7, 6 },
		{ "InvOnDBSync", 6, 1 },
		{ "InvOnGTSSync", 5, 1 },
		{ "db_dbg_en", 4, 1 },
		{ "gts_dbg_timer_reg", 1, 3 },
		{ "gts_dbg_en", 0, 1 },
	{ "SGE_ITP_CONTROL", 0x10b4, 0 },
		{ "TScale", 28, 4 },
		{ "Critical_Time", 10, 15 },
		{ "LL_Empty", 4, 6 },
		{ "LL_Read_Wait_Disable", 0, 1 },
	{ "SGE_TIMER_VALUE_0_AND_1", 0x10b8, 0 },
		{ "TimerValue0", 16, 16 },
		{ "TimerValue1", 0, 16 },
	{ "SGE_TIMER_VALUE_2_AND_3", 0x10bc, 0 },
		{ "TimerValue2", 16, 16 },
		{ "TimerValue3", 0, 16 },
	{ "SGE_TIMER_VALUE_4_AND_5", 0x10c0, 0 },
		{ "TimerValue4", 16, 16 },
		{ "TimerValue5", 0, 16 },
	{ "SGE_GK_CONTROL", 0x10c4, 0 },
		{ "en_flm_fifth", 29, 1 },
		{ "fl_prog_thresh", 20, 9 },
		{ "coal_all_thread", 19, 1 },
		{ "en_pshb", 18, 1 },
		{ "en_db_fifth", 17, 1 },
		{ "db_prog_thresh", 8, 9 },
		{ "100ns_timer", 0, 8 },
	{ "SGE_GK_CONTROL2", 0x10c8, 0 },
		{ "dbq_timer_tick", 16, 16 },
		{ "fl_merge_cnt_thresh", 8, 4 },
		{ "merge_cnt_thresh", 0, 6 },
	{ "SGE_DEBUG_INDEX", 0x10cc, 0 },
	{ "SGE_DEBUG_DATA_HIGH", 0x10d0, 0 },
	{ "SGE_DEBUG_DATA_LOW", 0x10d4, 0 },
	{ "SGE_REVISION", 0x10d8, 0 },
	{ "SGE_INT_CAUSE4", 0x10dc, 0 },
		{ "err_ishift_ur1", 31, 1 },
		{ "err_ishift_ur0", 30, 1 },
		{ "bar2_egress_len_or_addr_err", 29, 1 },
		{ "err_cpl_exceed_max_iqe_size1", 28, 1 },
		{ "err_cpl_exceed_max_iqe_size0", 27, 1 },
		{ "err_wr_len_too_large3", 26, 1 },
		{ "err_wr_len_too_large2", 25, 1 },
		{ "err_wr_len_too_large1", 24, 1 },
		{ "err_wr_len_too_large0", 23, 1 },
		{ "err_large_minfetch_with_txcoal3", 22, 1 },
		{ "err_large_minfetch_with_txcoal2", 21, 1 },
		{ "err_large_minfetch_with_txcoal1", 20, 1 },
		{ "err_large_minfetch_with_txcoal0", 19, 1 },
		{ "coal_with_hp_disable_err", 18, 1 },
		{ "bar2_egress_coal0_err", 17, 1 },
		{ "bar2_egress_size_err", 16, 1 },
		{ "flm_pc_rsp_err", 15, 1 },
		{ "err_th3_max_fetch", 14, 1 },
		{ "err_th2_max_fetch", 13, 1 },
		{ "err_th1_max_fetch", 12, 1 },
		{ "err_th0_max_fetch", 11, 1 },
		{ "err_rx_cpl_packet_size1", 10, 1 },
		{ "err_rx_cpl_packet_size0", 9, 1 },
		{ "err_bad_upfl_inc_credit3", 8, 1 },
		{ "err_bad_upfl_inc_credit2", 7, 1 },
		{ "err_bad_upfl_inc_credit1", 6, 1 },
		{ "err_bad_upfl_inc_credit0", 5, 1 },
		{ "err_physaddr_len0_idma1", 4, 1 },
		{ "err_physaddr_len0_idma0", 3, 1 },
		{ "err_flm_invalid_pkt_drop1", 2, 1 },
		{ "err_flm_invalid_pkt_drop0", 1, 1 },
		{ "err_unexpected_timer", 0, 1 },
	{ "SGE_INT_ENABLE4", 0x10e0, 0 },
		{ "err_ishift_ur1", 31, 1 },
		{ "err_ishift_ur0", 30, 1 },
		{ "bar2_egress_len_or_addr_err", 29, 1 },
		{ "err_cpl_exceed_max_iqe_size1", 28, 1 },
		{ "err_cpl_exceed_max_iqe_size0", 27, 1 },
		{ "err_wr_len_too_large3", 26, 1 },
		{ "err_wr_len_too_large2", 25, 1 },
		{ "err_wr_len_too_large1", 24, 1 },
		{ "err_wr_len_too_large0", 23, 1 },
		{ "err_large_minfetch_with_txcoal3", 22, 1 },
		{ "err_large_minfetch_with_txcoal2", 21, 1 },
		{ "err_large_minfetch_with_txcoal1", 20, 1 },
		{ "err_large_minfetch_with_txcoal0", 19, 1 },
		{ "coal_with_hp_disable_err", 18, 1 },
		{ "bar2_egress_coal0_err", 17, 1 },
		{ "bar2_egress_size_err", 16, 1 },
		{ "flm_pc_rsp_err", 15, 1 },
		{ "err_th3_max_fetch", 14, 1 },
		{ "err_th2_max_fetch", 13, 1 },
		{ "err_th1_max_fetch", 12, 1 },
		{ "err_th0_max_fetch", 11, 1 },
		{ "err_rx_cpl_packet_size1", 10, 1 },
		{ "err_rx_cpl_packet_size0", 9, 1 },
		{ "err_bad_upfl_inc_credit3", 8, 1 },
		{ "err_bad_upfl_inc_credit2", 7, 1 },
		{ "err_bad_upfl_inc_credit1", 6, 1 },
		{ "err_bad_upfl_inc_credit0", 5, 1 },
		{ "err_physaddr_len0_idma1", 4, 1 },
		{ "err_physaddr_len0_idma0", 3, 1 },
		{ "err_flm_invalid_pkt_drop1", 2, 1 },
		{ "err_flm_invalid_pkt_drop0", 1, 1 },
		{ "err_unexpected_timer", 0, 1 },
	{ "SGE_STAT_TOTAL", 0x10e4, 0 },
	{ "SGE_STAT_MATCH", 0x10e8, 0 },
	{ "SGE_STAT_CFG", 0x10ec, 0 },
		{ "StatSource", 9, 4 },
		{ "ITPOpMode", 8, 1 },
		{ "EgrCtxtOpMode", 6, 2 },
		{ "IngCtxtOpMode", 4, 2 },
		{ "StatMode", 0, 4 },
	{ "SGE_HINT_CFG", 0x10f0, 0 },
		{ "uPCutoffThreshLp", 12, 11 },
		{ "HintsAllowedNoHdr", 6, 6 },
		{ "HintsAllowedHdr", 0, 6 },
	{ "SGE_INGRESS_QUEUES_PER_PAGE_PF", 0x10f4, 0 },
		{ "QueuesPerPagePF7", 28, 4 },
		{ "QueuesPerPagePF6", 24, 4 },
		{ "QueuesPerPagePF5", 20, 4 },
		{ "QueuesPerPagePF4", 16, 4 },
		{ "QueuesPerPagePF3", 12, 4 },
		{ "QueuesPerPagePF2", 8, 4 },
		{ "QueuesPerPagePF1", 4, 4 },
		{ "QueuesPerPagePF0", 0, 4 },
	{ "SGE_INGRESS_QUEUES_PER_PAGE_VF", 0x10f8, 0 },
		{ "QueuesPerPageVFPF7", 28, 4 },
		{ "QueuesPerPageVFPF6", 24, 4 },
		{ "QueuesPerPageVFPF5", 20, 4 },
		{ "QueuesPerPageVFPF4", 16, 4 },
		{ "QueuesPerPageVFPF3", 12, 4 },
		{ "QueuesPerPageVFPF2", 8, 4 },
		{ "QueuesPerPageVFPF1", 4, 4 },
		{ "QueuesPerPageVFPF0", 0, 4 },
	{ "SGE_ERROR_STATS", 0x1100, 0 },
		{ "Cause_Register", 24, 3 },
		{ "Cause_Bit", 19, 5 },
		{ "Uncaptured_Error", 18, 1 },
		{ "Error_QID_Valid", 17, 1 },
		{ "Error_QID", 0, 17 },
	{ "SGE_IDMA0_DROP_CNT", 0x1104, 0 },
	{ "SGE_IDMA1_DROP_CNT", 0x1108, 0 },
	{ "SGE_INT_CAUSE5", 0x110c, 0 },
		{ "err_T_RxCRC", 31, 1 },
		{ "perr_MC_RspData", 30, 1 },
		{ "perr_PC_RspData", 29, 1 },
		{ "perr_PD_RdRspData", 28, 1 },
		{ "perr_U_RxData", 27, 1 },
		{ "perr_UD_RxData", 26, 1 },
		{ "perr_uP_Data", 25, 1 },
		{ "perr_CIM2SGE_RxData", 24, 1 },
		{ "perr_imsg_pd_fifo", 21, 1 },
		{ "perr_ulptx_fifo1", 20, 1 },
		{ "perr_ulptx_fifo0", 19, 1 },
		{ "perr_idma2imsg_fifo1", 18, 1 },
		{ "perr_idma2imsg_fifo0", 17, 1 },
		{ "perr_pointer_data_fifo0", 16, 1 },
		{ "perr_pointer_data_fifo1", 15, 1 },
		{ "perr_pointer_hdr_fifo0", 14, 1 },
		{ "perr_pointer_hdr_fifo1", 13, 1 },
		{ "perr_payload_fifo0", 12, 1 },
		{ "perr_payload_fifo1", 11, 1 },
		{ "perr_pointer_hdr_fifo3", 10, 1 },
		{ "perr_pointer_hdr_fifo2", 9, 1 },
		{ "perr_pointer_data_fifo3", 8, 1 },
		{ "perr_pointer_data_fifo2", 7, 1 },
		{ "perr_mgt_bar2_fifo", 6, 1 },
		{ "perr_headersplit_fifo1", 5, 1 },
		{ "perr_headersplit_fifo0", 4, 1 },
		{ "perr_idma2imsg_fifo3", 3, 1 },
		{ "perr_idma2imsg_fifo2", 2, 1 },
		{ "perr_hint_delay_fifo", 0, 1 },
	{ "SGE_INT_ENABLE5", 0x1110, 0 },
		{ "err_T_RxCRC", 31, 1 },
		{ "perr_MC_RspData", 30, 1 },
		{ "perr_PC_RspData", 29, 1 },
		{ "perr_PD_RdRspData", 28, 1 },
		{ "perr_U_RxData", 27, 1 },
		{ "perr_UD_RxData", 26, 1 },
		{ "perr_uP_Data", 25, 1 },
		{ "perr_CIM2SGE_RxData", 24, 1 },
		{ "perr_imsg_pd_fifo", 21, 1 },
		{ "perr_ulptx_fifo1", 20, 1 },
		{ "perr_ulptx_fifo0", 19, 1 },
		{ "perr_idma2imsg_fifo1", 18, 1 },
		{ "perr_idma2imsg_fifo0", 17, 1 },
		{ "perr_pointer_data_fifo0", 16, 1 },
		{ "perr_pointer_data_fifo1", 15, 1 },
		{ "perr_pointer_hdr_fifo0", 14, 1 },
		{ "perr_pointer_hdr_fifo1", 13, 1 },
		{ "perr_payload_fifo0", 12, 1 },
		{ "perr_payload_fifo1", 11, 1 },
		{ "perr_pointer_hdr_fifo3", 10, 1 },
		{ "perr_pointer_hdr_fifo2", 9, 1 },
		{ "perr_pointer_data_fifo3", 8, 1 },
		{ "perr_pointer_data_fifo2", 7, 1 },
		{ "perr_mgt_bar2_fifo", 6, 1 },
		{ "perr_headersplit_fifo1", 5, 1 },
		{ "perr_headersplit_fifo0", 4, 1 },
		{ "perr_idma2imsg_fifo3", 3, 1 },
		{ "perr_idma2imsg_fifo2", 2, 1 },
		{ "perr_hint_delay_fifo", 0, 1 },
	{ "SGE_PERR_ENABLE5", 0x1114, 0 },
		{ "err_T_RxCRC", 31, 1 },
		{ "perr_MC_RspData", 30, 1 },
		{ "perr_PC_RspData", 29, 1 },
		{ "perr_PD_RdRspData", 28, 1 },
		{ "perr_U_RxData", 27, 1 },
		{ "perr_UD_RxData", 26, 1 },
		{ "perr_uP_Data", 25, 1 },
		{ "perr_CIM2SGE_RxData", 24, 1 },
		{ "perr_imsg_pd_fifo", 21, 1 },
		{ "perr_ulptx_fifo1", 20, 1 },
		{ "perr_ulptx_fifo0", 19, 1 },
		{ "perr_idma2imsg_fifo1", 18, 1 },
		{ "perr_idma2imsg_fifo0", 17, 1 },
		{ "perr_pointer_data_fifo0", 16, 1 },
		{ "perr_pointer_data_fifo1", 15, 1 },
		{ "perr_pointer_hdr_fifo0", 14, 1 },
		{ "perr_pointer_hdr_fifo1", 13, 1 },
		{ "perr_payload_fifo0", 12, 1 },
		{ "perr_payload_fifo1", 11, 1 },
		{ "perr_pointer_hdr_fifo3", 10, 1 },
		{ "perr_pointer_hdr_fifo2", 9, 1 },
		{ "perr_pointer_data_fifo3", 8, 1 },
		{ "perr_pointer_data_fifo2", 7, 1 },
		{ "perr_mgt_bar2_fifo", 6, 1 },
		{ "perr_headersplit_fifo1", 5, 1 },
		{ "perr_headersplit_fifo0", 4, 1 },
		{ "perr_idma2imsg_fifo3", 3, 1 },
		{ "perr_idma2imsg_fifo2", 2, 1 },
		{ "perr_hint_delay_fifo", 0, 1 },
	{ "SGE_FETCH_BURST_MAX_0_AND_1", 0x111c, 0 },
		{ "FetchBurstMax0", 16, 10 },
		{ "FetchBurstMax1", 0, 10 },
	{ "SGE_FETCH_BURST_MAX_2_AND_3", 0x1120, 0 },
		{ "FetchBurstMax2", 16, 10 },
		{ "FetchBurstMax3", 0, 10 },
	{ "SGE_CONTROL2", 0x1124, 0 },
		{ "hint_sge_sel", 31, 1 },
		{ "hint_sel", 30, 1 },
		{ "hint_disable", 29, 1 },
		{ "rxcplmode_iscsi", 28, 1 },
		{ "rxcplmode_nvmt", 27, 1 },
		{ "wre_replay_inorder", 26, 1 },
		{ "Eth2xEn", 25, 1 },
		{ "ArmDbEndDis", 24, 1 },
		{ "PackPadT7", 23, 1 },
		{ "wre_upFLCredit", 22, 1 },
		{ "uPFLCutoffDis", 21, 1 },
		{ "RxCplSizeAutocorrect", 20, 1 },
		{ "IdmaArbRoundRobin", 19, 1 },
		{ "IngPackBoundary", 16, 3 },
		{ "CGEN_Egress_Context", 15, 1 },
		{ "CGEN_Ingress_Context", 14, 1 },
		{ "CGEN_IDMA", 13, 1 },
		{ "CGEN_DBP", 12, 1 },
		{ "CGEN_EDMA", 11, 1 },
		{ "VFIFO_Enable", 10, 1 },
		{ "FLM_Reschedule_Mode", 9, 1 },
		{ "HintDepthCtlFL", 4, 5 },
		{ "Force_Ordering", 3, 1 },
		{ "TX_Coalesce_Size", 2, 1 },
		{ "Coal_Strict_CIM_Pri", 1, 1 },
		{ "TX_Coalesce_Pri", 0, 1 },
	{ "SGE_INT_CAUSE6", 0x1128, 0 },
		{ "fatal_deq0_drdy", 29, 3 },
		{ "fatal_out0_drdy", 26, 3 },
		{ "imsg_dbg3_stuck", 25, 1 },
		{ "imsg_dbg2_stuck", 24, 1 },
		{ "imsg_dbg1_stuck", 23, 1 },
		{ "imsg_dbg0_stuck", 22, 1 },
		{ "err_db_sync", 21, 1 },
		{ "err_gts_sync", 20, 1 },
		{ "fatal_large_coal", 19, 1 },
		{ "pl_bar2_frm_err", 18, 1 },
		{ "silent_drop_tx_coal", 17, 1 },
		{ "err_inv_ctxt4", 16, 1 },
		{ "err_bad_db_pidx4", 15, 1 },
		{ "err_bad_upfl_inc_credit4", 14, 1 },
		{ "fatal_tag_mismatch", 13, 1 },
		{ "fatal_enq_ctl_rdy", 12, 1 },
		{ "err_pc_rsp_len3", 11, 1 },
		{ "err_pc_rsp_len2", 10, 1 },
		{ "err_pc_rsp_len1", 9, 1 },
		{ "err_pc_rsp_len0", 8, 1 },
		{ "fatal_enq2ll_vld", 7, 1 },
		{ "fatal_ll_empty", 6, 1 },
		{ "fatal_off_wdenq", 5, 1 },
		{ "fatal_deq1_drdy", 3, 2 },
		{ "fatal_out1_drdy", 1, 2 },
		{ "fatal_deq", 0, 1 },
	{ "SGE_INT_ENABLE6", 0x112c, 0 },
		{ "imsg_dbg3_stuck", 25, 1 },
		{ "imsg_dbg2_stuck", 24, 1 },
		{ "imsg_dbg1_stuck", 23, 1 },
		{ "imsg_dbg0_stuck", 22, 1 },
		{ "err_db_sync", 21, 1 },
		{ "err_gts_sync", 20, 1 },
		{ "fatal_large_coal", 19, 1 },
		{ "pl_bar2_frm_err", 18, 1 },
		{ "silent_drop_tx_coal", 17, 1 },
		{ "err_inv_ctxt4", 16, 1 },
		{ "err_bad_db_pidx4", 15, 1 },
		{ "err_bad_upfl_inc_credit4", 14, 1 },
		{ "fatal_tag_mismatch", 13, 1 },
		{ "fatal_enq_ctl_rdy", 12, 1 },
		{ "err_pc_rsp_len3", 11, 1 },
		{ "err_pc_rsp_len2", 10, 1 },
		{ "err_pc_rsp_len1", 9, 1 },
		{ "err_pc_rsp_len0", 8, 1 },
		{ "fatal_enq2ll_vld", 7, 1 },
		{ "fatal_ll_empty", 6, 1 },
		{ "fatal_off_wdenq", 5, 1 },
		{ "fatal_deq_drdy", 3, 2 },
		{ "fatal_outp_drdy", 1, 2 },
		{ "fatal_deq", 0, 1 },
	{ "SGE_DBVFIFO_BADDR", 0x1138, 0 },
		{ "BaseAddr", 3, 29 },
	{ "SGE_DBVFIFO_SIZE", 0x113c, 0 },
	{ "SGE_CHANGESET", 0x1144, 0 },
	{ "SGE_PC_RSP_ERROR", 0x1148, 0 },
	{ "SGE_TBUF_CONTROL0", 0x114c, 0 },
		{ "DbpTbufRsv1", 9, 9 },
		{ "DbpTbufRsv0", 0, 9 },
	{ "SGE_TBUF_CONTROL1", 0x1150, 0 },
		{ "DbpTbufRsv3", 9, 9 },
		{ "DbpTbufRsv2", 0, 9 },
	{ "SGE_TBUF_CONTROL2", 0x1154, 0 },
		{ "DbpTbufRsv5", 9, 9 },
		{ "DbpTbufRsv4", 0, 9 },
	{ "SGE_TBUF_CONTROL3", 0x1158, 0 },
		{ "DbpTbufRsv7", 9, 9 },
		{ "DbpTbufRsv6", 0, 9 },
	{ "SGE_TBUF_CONTROL4", 0x115c, 0 },
		{ "DbpTbufRsv9", 9, 9 },
		{ "DbpTbufRsv8", 0, 9 },
	{ "SGE_PC0_REQ_BIST_CMD", 0x1180, 0 },
	{ "SGE_PC0_REQ_BIST_ERROR_CNT", 0x1184, 0 },
	{ "SGE_PC1_REQ_BIST_CMD", 0x1190, 0 },
	{ "SGE_PC1_REQ_BIST_ERROR_CNT", 0x1194, 0 },
	{ "SGE_PC0_RSP_BIST_CMD", 0x11a0, 0 },
	{ "SGE_PC0_RSP_BIST_ERROR_CNT", 0x11a4, 0 },
	{ "SGE_PC1_RSP_BIST_CMD", 0x11b0, 0 },
	{ "SGE_PC1_RSP_BIST_ERROR_CNT", 0x11b4, 0 },
	{ "SGE_DBQ_TIMER_THRESH0", 0x11b8, 0 },
		{ "TxTimeTh3", 24, 6 },
		{ "TxTimeTh2", 16, 6 },
		{ "TxTimeTh1", 8, 6 },
		{ "TxTimeTh0", 0, 6 },
	{ "SGE_DBQ_TIMER_THRESH1", 0x11bc, 0 },
		{ "TxTimeTh7", 24, 6 },
		{ "TxTimeTh6", 16, 6 },
		{ "TxTimeTh5", 8, 6 },
		{ "TxTimeTh4", 0, 6 },
	{ "SGE_DBQ_TIMER_CONFIG", 0x11c0, 0 },
	{ "SGE_DBQ_TIMER_DBG", 0x11c4, 0 },
		{ "dbq_timer_cmd", 31, 1 },
		{ "dbq_timer_index", 24, 6 },
		{ "dbq_timer_qcnt", 0, 17 },
	{ "SGE_INT_CAUSE8", 0x11c8, 0 },
		{ "Trace_RxPerr", 8, 1 },
		{ "U3_RxPerr", 7, 1 },
		{ "U2_RxPerr", 6, 1 },
		{ "U1_RxPerr", 5, 1 },
		{ "U0_RxPerr", 4, 1 },
		{ "T3_RxPerr", 3, 1 },
		{ "T2_RxPerr", 2, 1 },
		{ "T1_RxPerr", 1, 1 },
		{ "T0_RxPerr", 0, 1 },
	{ "SGE_INT_ENABLE8", 0x11cc, 0 },
		{ "Trace_RxPerr", 8, 1 },
		{ "U3_RxPerr", 7, 1 },
		{ "U2_RxPerr", 6, 1 },
		{ "U1_RxPerr", 5, 1 },
		{ "U0_RxPerr", 4, 1 },
		{ "T3_RxPerr", 3, 1 },
		{ "T2_RxPerr", 2, 1 },
		{ "T1_RxPerr", 1, 1 },
		{ "T0_RxPerr", 0, 1 },
	{ "SGE_PERR_ENABLE8", 0x11d0, 0 },
		{ "Trace_RxPerr", 8, 1 },
		{ "U3_RxPerr", 7, 1 },
		{ "U2_RxPerr", 6, 1 },
		{ "U1_RxPerr", 5, 1 },
		{ "U0_RxPerr", 4, 1 },
		{ "T3_RxPerr", 3, 1 },
		{ "T2_RxPerr", 2, 1 },
		{ "T1_RxPerr", 1, 1 },
		{ "T0_RxPerr", 0, 1 },
	{ "SGE_CTXT_CMD", 0x11fc, 0 },
		{ "Busy", 31, 1 },
		{ "Opcode", 28, 2 },
		{ "CtxtType", 24, 2 },
		{ "QID", 0, 17 },
	{ "SGE_CTXT_DATA0", 0x1200, 0 },
	{ "SGE_CTXT_DATA1", 0x1204, 0 },
	{ "SGE_CTXT_DATA2", 0x1208, 0 },
	{ "SGE_CTXT_DATA3", 0x120c, 0 },
	{ "SGE_CTXT_DATA4", 0x1210, 0 },
	{ "SGE_CTXT_DATA5", 0x1214, 0 },
	{ "SGE_CTXT_DATA6", 0x1218, 0 },
		{ "Data_Unused", 7, 25 },
		{ "Data", 0, 7 },
	{ "SGE_CTXT_DATA7", 0x121c, 0 },
	{ "SGE_CTXT_MASK0", 0x1220, 0 },
	{ "SGE_CTXT_MASK1", 0x1224, 0 },
	{ "SGE_CTXT_MASK2", 0x1228, 0 },
	{ "SGE_CTXT_MASK3", 0x122c, 0 },
	{ "SGE_CTXT_MASK4", 0x1230, 0 },
	{ "SGE_CTXT_MASK5", 0x1234, 0 },
	{ "SGE_CTXT_MASK6", 0x1238, 0 },
		{ "Mask_Unused", 7, 25 },
		{ "Mask", 0, 7 },
	{ "SGE_CTXT_MASK7", 0x123c, 0 },
	{ "SGE_QBASE_MAP0", 0x1240, 0 },
		{ "Destination", 31, 1 },
		{ "Egress0_Size", 24, 5 },
		{ "Egress1_Size", 16, 5 },
		{ "Ingress0_Size", 8, 5 },
		{ "Ingress1_Size", 0, 5 },
	{ "SGE_QBASE_MAP1", 0x1244, 0 },
	{ "SGE_QBASE_MAP2", 0x1248, 0 },
	{ "SGE_QBASE_MAP3", 0x124c, 0 },
		{ "Ingress1_Base", 16, 16 },
		{ "Ingress0_Base", 0, 16 },
	{ "SGE_QBASE_INDEX", 0x1250, 0 },
	{ "SGE_CONM_CTRL2", 0x1254, 0 },
		{ "FlmThreshPack", 8, 7 },
		{ "ConEnMiddle", 7, 1 },
		{ "FlmThresh", 0, 7 },
	{ "SGE_DEBUG_CONM", 0x1258, 0 },
		{ "ch_cng", 16, 16 },
		{ "ch_sel", 14, 2 },
		{ "st_cong", 12, 2 },
		{ "last_xoff", 10, 1 },
		{ "last_qid", 0, 10 },
	{ "SGE_DBG_QUEUE_STAT0_CTRL", 0x125c, 0 },
		{ "imsg_gts_sel", 18, 1 },
		{ "mgt_sel", 17, 1 },
		{ "db_gts_qid", 0, 17 },
	{ "SGE_DBG_QUEUE_STAT1_CTRL", 0x1260, 0 },
		{ "imsg_gts_sel", 18, 1 },
		{ "mgt_sel", 17, 1 },
		{ "db_gts_qid", 0, 17 },
	{ "SGE_DBG_QUEUE_STAT0", 0x1264, 0 },
	{ "SGE_DBG_QUEUE_STAT1", 0x1268, 0 },
	{ "SGE_DBG_BAR2_PKT_CNT", 0x126c, 0 },
	{ "SGE_DBG_DB_PKT_CNT", 0x1270, 0 },
	{ "SGE_DBG_GTS_PKT_CNT", 0x1274, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_16", 0x1278, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_0", 0x1280, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_1", 0x1284, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_2", 0x1288, 0 },
	{ "SGE_DEBUG1_DBP_THREAD", 0x128c, 0 },
	{ "SGE_DEBUG1_DBP_THREAD", 0x1290, 0 },
	{ "SGE_DEBUG1_DBP_THREAD", 0x1294, 0 },
	{ "SGE_DEBUG1_DBP_THREAD", 0x1298, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_7", 0x129c, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_8", 0x12a0, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_9", 0x12a4, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_10", 0x12a8, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_11", 0x12ac, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_12", 0x12b0, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_13", 0x12b4, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_14", 0x12b8, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_15", 0x12bc, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_0", 0x12c0, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_1", 0x12c4, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_2", 0x12c8, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_3", 0x12cc, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_4", 0x12d0, 0 },
	{ "SGE_DEBUG0_DBP_THREAD", 0x12d4, 0 },
	{ "SGE_DEBUG0_DBP_THREAD", 0x12d8, 0 },
	{ "SGE_DEBUG0_DBP_THREAD", 0x12dc, 0 },
	{ "SGE_DEBUG0_DBP_THREAD", 0x12e0, 0 },
	{ "SGE_DEBUG0_DBP_THREAD", 0x12e4, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_10", 0x12e8, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_11", 0x12ec, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_12", 0x12f0, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_13", 0x12f4, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_14", 0x12f8, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_15", 0x12fc, 0 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1300, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1304, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1308, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x130c, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1310, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1314, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1318, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x131c, 0 },
		{ "PfIQsPerPage", 28, 4 },
		{ "PfEQsPerPage", 24, 4 },
		{ "PfWCQsPerPage", 20, 4 },
		{ "PfWCOffEn", 19, 1 },
		{ "PfMaxWCSize", 17, 2 },
		{ "PfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1320, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1324, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1328, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x132c, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1330, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1334, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1338, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x133c, 0 },
		{ "VfIQsPerPage", 28, 4 },
		{ "VfEQsPerPage", 24, 4 },
		{ "VfWCQsPerPage", 20, 4 },
		{ "VfWCOffEn", 19, 1 },
		{ "VfMaxWCSize", 17, 2 },
		{ "VfWCOffset", 0, 17 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_17", 0x1340, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_18", 0x1344, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_19", 0x1348, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_20", 0x134c, 0 },
	{ "SGE_DEBUG_DATA_HIGH_INDEX_21", 0x1350, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_16", 0x1354, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_17", 0x1358, 0 },
	{ "SGE_DEBUG_DATA_LOW_INDEX_18", 0x135c, 0 },
	{ "SGE_INT_CAUSE7", 0x1360, 0 },
		{ "hint_fifo_full", 25, 1 },
		{ "cerr_hint_delay_fifo", 24, 1 },
		{ "coal_timer_fifo_perr", 23, 1 },
		{ "cmp_fifo_perr", 22, 1 },
		{ "sge_ipp_fifo_cerr", 21, 1 },
		{ "cerr_ing_ctxt_cache", 20, 1 },
		{ "imsg_cntx_perr", 19, 1 },
		{ "pd_fifo_perr", 18, 1 },
		{ "imsg_512_fifo_perr", 17, 1 },
		{ "cplsw_fifo_perr", 16, 1 },
		{ "imsg_fifo_perr", 15, 1 },
		{ "cerr_itp_evr", 14, 1 },
		{ "cerr_conm_sram", 13, 1 },
		{ "cerr_egr_ctxt_cache", 12, 1 },
		{ "cerr_flm_cntxmem", 11, 1 },
		{ "cerr_func_qbase", 10, 1 },
		{ "imsg_cntx_cerr", 9, 1 },
		{ "pd_fifo_cerr", 8, 1 },
		{ "imsg_512_fifo_cerr", 7, 1 },
		{ "cplsw_fifo_cerr", 6, 1 },
		{ "imsg_fifo_cerr", 5, 1 },
		{ "cerr_headersplit_fifo3", 4, 1 },
		{ "cerr_headersplit_fifo2", 3, 1 },
		{ "cerr_headersplit_fifo1", 2, 1 },
		{ "cerr_headersplit_fifo0", 1, 1 },
		{ "cerr_flm_l1Cache", 0, 1 },
	{ "SGE_INT_ENABLE7", 0x1364, 0 },
		{ "hint_fifo_full", 25, 1 },
		{ "cerr_hint_delay_fifo", 24, 1 },
		{ "coal_timer_fifo_perr", 23, 1 },
		{ "cmp_fifo_perr", 22, 1 },
		{ "sge_ipp_fifo_cerr", 21, 1 },
		{ "cerr_ing_ctxt_cache", 20, 1 },
		{ "imsg_cntx_perr", 19, 1 },
		{ "pd_fifo_perr", 18, 1 },
		{ "imsg_512_fifo_perr", 17, 1 },
		{ "cplsw_fifo_perr", 16, 1 },
		{ "imsg_fifo_perr", 15, 1 },
		{ "cerr_itp_evr", 14, 1 },
		{ "cerr_conm_sram", 13, 1 },
		{ "cerr_egr_ctxt_cache", 12, 1 },
		{ "cerr_flm_cntxmem", 11, 1 },
		{ "cerr_func_qbase", 10, 1 },
		{ "imsg_cntx_cerr", 9, 1 },
		{ "pd_fifo_cerr", 8, 1 },
		{ "imsg_512_fifo_cerr", 7, 1 },
		{ "cplsw_fifo_cerr", 6, 1 },
		{ "imsg_fifo_cerr", 5, 1 },
		{ "cerr_headersplit_fifo3", 4, 1 },
		{ "cerr_headersplit_fifo2", 3, 1 },
		{ "cerr_headersplit_fifo1", 2, 1 },
		{ "cerr_headersplit_fifo0", 1, 1 },
		{ "cerr_flm_l1Cache", 0, 1 },
	{ "SGE_PERR_ENABLE7", 0x1368, 0 },
		{ "coal_timer_fifo_perr", 23, 1 },
		{ "cmp_fifo_perr", 22, 1 },
		{ "imsg_cntx_perr", 19, 1 },
		{ "pd_fifo_perr", 18, 1 },
		{ "imsg_512_fifo_perr", 17, 1 },
		{ "cplsw_fifo_perr", 16, 1 },
		{ "imsg_fifo_perr", 15, 1 },
	{ "SGE_ING_COMP_COAL_CFG", 0x1700, 0 },
		{ "use_ptp_timer", 27, 1 },
		{ "imsg_set_oflow_all_entries_43060", 26, 1 },
		{ "imsg_stuck_indirect_queue_42907", 25, 1 },
		{ "comp_coal_pidx_incr", 24, 1 },
		{ "comp_coal_timer_cnt", 16, 8 },
		{ "comp_coal_cntr_th", 8, 8 },
		{ "comp_coal_opcode", 0, 8 },
	{ "SGE_ING_IMSG_DBG", 0x1704, 0 },
		{ "stuck_ctr_th", 1, 8 },
		{ "stuck_int_en", 0, 1 },
	{ "SGE_ING_IMSG_RSP0_DBG", 0x1708, 0 },
		{ "idma1_qid", 16, 16 },
		{ "idma0_qid", 0, 16 },
	{ "SGE_ING_IMSG_RSP1_DBG", 0x170c, 0 },
		{ "idma3_qid", 16, 16 },
		{ "idma2_qid", 0, 16 },
	{ "SGE_LB_MODE", 0x1710, 0 },
	{ "SGE_IMSG_QUESCENT", 0x1714, 0 },
	{ "SGE_LA_CTRL", 0x1718, 0 },
		{ "la_global_en", 8, 1 },
		{ "ptp_timestamp_sel", 7, 1 },
		{ "cim2sge_id_chk_vld", 6, 1 },
		{ "cplsw_id_chk_vld", 5, 1 },
		{ "flm_id_chk_vld", 4, 1 },
		{ "iq_dbp_id_chk_vld", 3, 1 },
		{ "up_obq_id_chk_vld", 2, 1 },
		{ "cim_id_chk_vld", 1, 1 },
		{ "dbp_id_chk_vld", 0, 1 },
	{ "SGE_LA_CTRL_EQID_LOW", 0x171c, 0 },
	{ "SGE_LA_CTRL_EQID_HIGH", 0x1720, 0 },
	{ "SGE_LA_CTRL_IQID", 0x1724, 0 },
		{ "iq_id_chk_high", 16, 16 },
		{ "iq_id_chk_low", 0, 16 },
	{ "SGE_LA_CTRL_TID_LOW", 0x1728, 0 },
	{ "SGE_LA_CTRL_TID_HIGH", 0x172c, 0 },
	{ "SGE_CFG_TP_ERR", 0x173c, 0 },
		{ "tp_err_status_ch3", 30, 2 },
		{ "tp_err_status_ch2", 28, 2 },
		{ "tp_err_status_ch1", 26, 2 },
		{ "tp_err_status_ch0", 24, 2 },
		{ "cpl0_size", 16, 8 },
		{ "cpl1_size", 8, 8 },
		{ "size_latch_clr", 3, 1 },
		{ "ext_latch_clr", 2, 1 },
		{ "ext_change_42875", 1, 1 },
		{ "size_change_42913", 0, 1 },
	{ "SGE_CHNL0_CTX_ERROR_COUNT_PER_TID", 0x1740, 0 },
	{ "SGE_CHNL1_CTX_ERROR_COUNT_PER_TID", 0x1744, 0 },
	{ "SGE_CHNL2_CTX_ERROR_COUNT_PER_TID", 0x1748, 0 },
	{ "SGE_CHNL3_CTX_ERROR_COUNT_PER_TID", 0x174c, 0 },
	{ "SGE_CTX_ACC_CH0", 0x1750, 0 },
		{ "RDMA_INV_Handling", 24, 2 },
		{ "terminate_status_en", 23, 1 },
		{ "DISABLE", 22, 1 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "SGE_CTX_ACC_CH1", 0x1754, 0 },
		{ "RDMA_INV_Handling", 24, 2 },
		{ "terminate_status_en", 23, 1 },
		{ "DISABLE", 22, 1 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "SGE_CTX_ACC_CH2", 0x1758, 0 },
		{ "RDMA_INV_Handling", 24, 2 },
		{ "terminate_status_en", 23, 1 },
		{ "DISABLE", 22, 1 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "SGE_CTX_ACC_CH3", 0x175c, 0 },
		{ "RDMA_INV_Handling", 24, 2 },
		{ "terminate_status_en", 23, 1 },
		{ "DISABLE", 22, 1 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "SGE_CTX_BASE", 0x1760, 0 },
	{ "SGE_LA_RDPTR_0", 0x1800, 0 },
	{ "SGE_LA_RDDATA_0", 0x1804, 0 },
	{ "SGE_LA_WRPTR_0", 0x1808, 0 },
	{ "SGE_LA_RESERVED_0", 0x180c, 0 },
	{ "SGE_LA_RDPTR_1", 0x1810, 0 },
	{ "SGE_LA_RDDATA_1", 0x1814, 0 },
	{ "SGE_LA_WRPTR_1", 0x1818, 0 },
	{ "SGE_LA_RESERVED_1", 0x181c, 0 },
	{ "SGE_LA_RDPTR_2", 0x1820, 0 },
	{ "SGE_LA_RDDATA_2", 0x1824, 0 },
	{ "SGE_LA_WRPTR_2", 0x1828, 0 },
	{ "SGE_LA_RESERVED_2", 0x182c, 0 },
	{ "SGE_LA_RDPTR_3", 0x1830, 0 },
	{ "SGE_LA_RDDATA_3", 0x1834, 0 },
	{ "SGE_LA_WRPTR_3", 0x1838, 0 },
	{ "SGE_LA_RESERVED_3", 0x183c, 0 },
	{ "SGE_LA_RDPTR_4", 0x1840, 0 },
	{ "SGE_LA_RDDATA_4", 0x1844, 0 },
	{ "SGE_LA_WRPTR_4", 0x1848, 0 },
	{ "SGE_LA_RESERVED_4", 0x184c, 0 },
	{ "SGE_LA_RDPTR_5", 0x1850, 0 },
	{ "SGE_LA_RDDATA_5", 0x1854, 0 },
	{ "SGE_LA_WRPTR_5", 0x1858, 0 },
	{ "SGE_LA_RESERVED_5", 0x185c, 0 },
	{ "SGE_LA_RDPTR_6", 0x1860, 0 },
	{ "SGE_LA_RDDATA_6", 0x1864, 0 },
	{ "SGE_LA_WRPTR_6", 0x1868, 0 },
	{ "SGE_LA_RESERVED_6", 0x186c, 0 },
	{ "SGE_LA_RDPTR_7", 0x1870, 0 },
	{ "SGE_LA_RDDATA_7", 0x1874, 0 },
	{ "SGE_LA_WRPTR_7", 0x1878, 0 },
	{ "SGE_LA_RESERVED_7", 0x187c, 0 },
	{ "SGE_LA_RDPTR_8", 0x1880, 0 },
	{ "SGE_LA_RDDATA_8", 0x1884, 0 },
	{ "SGE_LA_WRPTR_8", 0x1888, 0 },
	{ "SGE_LA_RESERVED_8", 0x188c, 0 },
	{ "SGE_LA_RDPTR_9", 0x1890, 0 },
	{ "SGE_LA_RDDATA_9", 0x1894, 0 },
	{ "SGE_LA_WRPTR_9", 0x1898, 0 },
	{ "SGE_LA_RESERVED_9", 0x189c, 0 },
	{ "SGE_LA_RDPTR_10", 0x18a0, 0 },
	{ "SGE_LA_RDDATA_10", 0x18a4, 0 },
	{ "SGE_LA_WRPTR_10", 0x18a8, 0 },
	{ "SGE_LA_RESERVED_10", 0x18ac, 0 },
	{ "SGE_LA_RDPTR_11", 0x18b0, 0 },
	{ "SGE_LA_RDDATA_11", 0x18b4, 0 },
	{ "SGE_LA_WRPTR_11", 0x18b8, 0 },
	{ "SGE_LA_RESERVED_11", 0x18bc, 0 },
	{ "SGE_LA_RDPTR_12", 0x18c0, 0 },
	{ "SGE_LA_RDDATA_12", 0x18c4, 0 },
	{ "SGE_LA_WRPTR_12", 0x18c8, 0 },
	{ "SGE_LA_RESERVED_12", 0x18cc, 0 },
	{ "SGE_LA_RDPTR_13", 0x18d0, 0 },
	{ "SGE_LA_RDDATA_13", 0x18d4, 0 },
	{ "SGE_LA_WRPTR_13", 0x18d8, 0 },
	{ "SGE_LA_RESERVED_13", 0x18dc, 0 },
	{ "SGE_LA_RDPTR_14", 0x18e0, 0 },
	{ "SGE_LA_RDDATA_14", 0x18e4, 0 },
	{ "SGE_LA_WRPTR_14", 0x18e8, 0 },
	{ "SGE_LA_RESERVED_14", 0x18ec, 0 },
	{ "SGE_LA_RDPTR_15", 0x18f0, 0 },
	{ "SGE_LA_RDDATA_15", 0x18f4, 0 },
	{ "SGE_LA_WRPTR_15", 0x18f8, 0 },
	{ "SGE_LA_RESERVED_15", 0x18fc, 0 },
	{ NULL }
};

struct reg_info t7_pcie_regs[] = {
	{ "PCIE_INT_ENABLE", 0x3000, 0 },
		{ "IPGrpPerr", 31, 1 },
		{ "NonFatalErr", 30, 1 },
		{ "RdRspErr", 29, 1 },
		{ "TRGT1GrpPerr", 28, 1 },
		{ "IPSOTPerr", 27, 1 },
		{ "IPRetryPerr", 26, 1 },
		{ "IPRxDataGrpPerr", 25, 1 },
		{ "IPRxHdrGrpPerr", 24, 1 },
		{ "PIOTagQPerr", 23, 1 },
		{ "MAGrpPerr", 22, 1 },
		{ "VFIDPerr", 21, 1 },
		{ "FIDPerr", 20, 1 },
		{ "CfgSnpPerr", 19, 1 },
		{ "HRspPerr", 18, 1 },
		{ "HReqRdPerr", 17, 1 },
		{ "HReqWrPerr", 16, 1 },
		{ "DRspPerr", 15, 1 },
		{ "DReqRdPerr", 14, 1 },
		{ "DReqWrPerr", 13, 1 },
		{ "CRspPerr", 12, 1 },
		{ "CReqRdPerr", 11, 1 },
		{ "MstTagQPerr", 10, 1 },
		{ "TgtTagQPerr", 9, 1 },
		{ "PIOReqGrpPerr", 8, 1 },
		{ "PIOCplGrpPerr", 7, 1 },
		{ "MSIXDIPerr", 6, 1 },
		{ "MSIXDataPerr", 5, 1 },
		{ "MSIXAddrHPerr", 4, 1 },
		{ "MSIXAddrLPerr", 3, 1 },
		{ "MSIXStiPerr", 2, 1 },
		{ "MstTimeoutPerr", 1, 1 },
		{ "MstGrpPerr", 0, 1 },
	{ "PCIE_INT_ENABLE_EXT", 0x3030, 0 },
		{ "TcamRspErr", 31, 1 },
		{ "IPFormQPerr", 30, 1 },
		{ "IPFormQCerr", 29, 1 },
		{ "TRGT1GrpCerr", 28, 1 },
		{ "IPSOTCerr", 27, 1 },
		{ "IPRetryCerr", 26, 1 },
		{ "IPRxDataGrpCerr", 25, 1 },
		{ "IPRxHdrGrpCerr", 24, 1 },
		{ "A0arbrspordfifoPerr", 19, 1 },
		{ "HRspCerr", 18, 1 },
		{ "HReqRdCerr", 17, 1 },
		{ "HReqWrCerr", 16, 1 },
		{ "DRspCerr", 15, 1 },
		{ "DReqRdCerr", 14, 1 },
		{ "DReqWrCerr", 13, 1 },
		{ "CRspCerr", 12, 1 },
		{ "ARspPerr", 11, 1 },
		{ "AReqRdPerr", 10, 1 },
		{ "AReqWrPerr", 9, 1 },
		{ "PIOReqGrpCerr", 8, 1 },
		{ "ARspCerr", 7, 1 },
		{ "AReqRdCerr", 6, 1 },
		{ "AReqWrCerr", 5, 1 },
		{ "MARspPerr", 4, 1 },
		{ "inicmawdataordPerr", 3, 1 },
		{ "emuPerr", 2, 1 },
		{ "ERRspPerr", 1, 1 },
		{ "MstGrpCerr", 0, 1 },
	{ "PCIE_INT_ENABLE_X8", 0x3034, 0 },
		{ "x8TGTGrpPerr", 23, 1 },
		{ "x8IPSOTPerr", 22, 1 },
		{ "x8IPRetryPerr", 21, 1 },
		{ "x8IPRxDataGrpPerr", 20, 1 },
		{ "x8IPRxHdrGrpPerr", 19, 1 },
		{ "x8IPCoreCerr", 3, 1 },
		{ "x8MstGrpPerr", 2, 1 },
		{ "x8MstGrpCerr", 1, 1 },
	{ "PCIE_INT_CAUSE", 0x3004, 0 },
		{ "IPGrpPerr", 31, 1 },
		{ "NonFatalErr", 30, 1 },
		{ "RdRspErr", 29, 1 },
		{ "TRGT1GrpPerr", 28, 1 },
		{ "IPSOTPerr", 27, 1 },
		{ "IPRetryPerr", 26, 1 },
		{ "IPRxDataGrpPerr", 25, 1 },
		{ "IPRxHdrGrpPerr", 24, 1 },
		{ "PIOTagQPerr", 23, 1 },
		{ "MAGrpPerr", 22, 1 },
		{ "VFIDPerr", 21, 1 },
		{ "FIDPerr", 20, 1 },
		{ "CfgSnpPerr", 19, 1 },
		{ "HRspPerr", 18, 1 },
		{ "HReqRdPerr", 17, 1 },
		{ "HReqWrPerr", 16, 1 },
		{ "DRspPerr", 15, 1 },
		{ "DReqRdPerr", 14, 1 },
		{ "DReqWrPerr", 13, 1 },
		{ "CRspPerr", 12, 1 },
		{ "CReqRdPerr", 11, 1 },
		{ "MstTagQPerr", 10, 1 },
		{ "TgtTagQPerr", 9, 1 },
		{ "PIOReqGrpPerr", 8, 1 },
		{ "PIOCplGrpPerr", 7, 1 },
		{ "MSIXDIPerr", 6, 1 },
		{ "MSIXDataPerr", 5, 1 },
		{ "MSIXAddrHPerr", 4, 1 },
		{ "MSIXAddrLPerr", 3, 1 },
		{ "MSIXStiPerr", 2, 1 },
		{ "MstTimeoutPerr", 1, 1 },
		{ "MstGrpPerr", 0, 1 },
	{ "PCIE_INT_CAUSE_EXT", 0x3038, 0 },
		{ "IPFormQPerr", 30, 1 },
		{ "IPFormQCerr", 29, 1 },
		{ "TRGT1GrpCerr", 28, 1 },
		{ "IPSOTCerr", 27, 1 },
		{ "IPRetryCerr", 26, 1 },
		{ "IPRxDataGrpCerr", 25, 1 },
		{ "IPRxHdrGrpCerr", 24, 1 },
		{ "A0arbrspordfifoPerr", 19, 1 },
		{ "HRspCerr", 18, 1 },
		{ "HReqRdCerr", 17, 1 },
		{ "HReqWrCerr", 16, 1 },
		{ "DRspCerr", 15, 1 },
		{ "DReqRdCerr", 14, 1 },
		{ "DReqWrCerr", 13, 1 },
		{ "CRspCerr", 12, 1 },
		{ "ARspPerr", 11, 1 },
		{ "AReqRdPerr", 10, 1 },
		{ "AReqWrPerr", 9, 1 },
		{ "PIOReqGrpCerr", 8, 1 },
		{ "ARspCerr", 7, 1 },
		{ "AReqRdCerr", 6, 1 },
		{ "AReqWrCerr", 5, 1 },
		{ "MARspPerr", 4, 1 },
		{ "inicmawdataordPerr", 3, 1 },
		{ "emuPerr", 2, 1 },
		{ "ERRspPerr", 1, 1 },
		{ "MstGrpCerr", 0, 1 },
	{ "PCIE_INT_CAUSE_X8", 0x303c, 0 },
		{ "x8TGTGrpPerr", 23, 1 },
		{ "x8IPSOTPerr", 22, 1 },
		{ "x8IPRetryPerr", 21, 1 },
		{ "x8IPRxDataGrpPerr", 20, 1 },
		{ "x8IPRxHdrGrpPerr", 19, 1 },
		{ "x8IPCoreCerr", 3, 1 },
		{ "x8MstGrpPerr", 2, 1 },
		{ "x8MstGrpCerr", 1, 1 },
	{ "PCIE_PERR_ENABLE", 0x3008, 0 },
		{ "IPGrpPerr", 31, 1 },
		{ "TgtTagQCLIENT1Perr", 29, 1 },
		{ "TRGT1GrpPerr", 28, 1 },
		{ "IPSOTPerr", 27, 1 },
		{ "IPRetryPerr", 26, 1 },
		{ "IPRxDataGrpPerr", 25, 1 },
		{ "IPRxHdrGrpPerr", 24, 1 },
		{ "PIOTagQPerr", 23, 1 },
		{ "MAGrpPerr", 22, 1 },
		{ "VFIDPerr", 21, 1 },
		{ "FIDPerr", 20, 1 },
		{ "CfgSnpPerr", 19, 1 },
		{ "HRspPerr", 18, 1 },
		{ "HReqRdPerr", 17, 1 },
		{ "HReqWrPerr", 16, 1 },
		{ "DRspPerr", 15, 1 },
		{ "DReqRdPerr", 14, 1 },
		{ "DReqWrPerr", 13, 1 },
		{ "CRspPerr", 12, 1 },
		{ "CReqRdPerr", 11, 1 },
		{ "MstTagQPerr", 10, 1 },
		{ "TgtTagQPerr", 9, 1 },
		{ "PIOReqGrpPerr", 8, 1 },
		{ "PIOCplGrpPerr", 7, 1 },
		{ "MSIXDIPerr", 6, 1 },
		{ "MSIXDataPerr", 5, 1 },
		{ "MSIXAddrHPerr", 4, 1 },
		{ "MSIXAddrLPerr", 3, 1 },
		{ "MSIXStiPerr", 2, 1 },
		{ "MstTimeoutPerr", 1, 1 },
		{ "MstGrpPerr", 0, 1 },
	{ "PCIE_PERR_ENABLE_EXT", 0x3040, 0 },
		{ "TcamRspErr", 31, 1 },
		{ "IPFormQPerr", 30, 1 },
		{ "ARspPerr", 18, 1 },
		{ "AReqRdPerr", 17, 1 },
		{ "AReqWrPerr", 16, 1 },
		{ "A0arbrspordfifoPerr", 15, 1 },
		{ "MARspPerr", 14, 1 },
		{ "inicmawdataordPerr", 13, 1 },
		{ "emuPerr", 12, 1 },
		{ "ERRspPerr", 11, 1 },
	{ "PCIE_PERR_ENABLE_X8", 0x3044, 0 },
		{ "x8TGTGrpPerr", 28, 1 },
		{ "x8IPSOTPerr", 27, 1 },
		{ "x8IPRetryPerr", 26, 1 },
		{ "x8IPRxDataGrpPerr", 25, 1 },
		{ "x8IPRxHdrGrpPerr", 24, 1 },
		{ "x8MstGrpPerr", 0, 1 },
	{ "PCIE_PERR_INJECT", 0x300c, 0 },
		{ "MemSel", 1, 5 },
		{ "IDE", 0, 1 },
	{ "PCIE_NONFAT_ERR", 0x3010, 0 },
		{ "MARspUE", 30, 1 },
		{ "MAReqTimeout", 29, 1 },
		{ "TRGT1BARTypeErr", 28, 1 },
		{ "MAExtraRspErr", 27, 1 },
		{ "MARspTimeout", 26, 1 },
		{ "INTVFAllMSIDisErr", 25, 1 },
		{ "INTVFRangeErr", 24, 1 },
		{ "INTPLIRspErr", 23, 1 },
		{ "MEMReqRdTagErr", 22, 1 },
		{ "CFGInitDoneErr", 21, 1 },
		{ "BAR2Timeout", 20, 1 },
		{ "VPDTimeout", 19, 1 },
		{ "MEMRspRdTagErr", 18, 1 },
		{ "MEMRspWrTagErr", 17, 1 },
		{ "PIORspRdTagErr", 16, 1 },
		{ "PIORspWrTagErr", 15, 1 },
		{ "DBITimeout", 14, 1 },
		{ "PIOUnAlindWr", 13, 1 },
		{ "BAR2RdErr", 12, 1 },
		{ "MAWrEOPErr", 11, 1 },
		{ "MARdEOPErr", 10, 1 },
		{ "RdRspErr", 9, 1 },
		{ "VPDRspErr", 8, 1 },
		{ "KDBEOPErr", 7, 1 },
		{ "MemReq", 4, 1 },
		{ "PIOReq", 3, 1 },
		{ "BAR2Req", 2, 1 },
		{ "CfgSnp", 0, 1 },
	{ "PCIE_CFG", 0x3014, 0 },
		{ "PIOStopEn", 31, 1 },
		{ "DiagCtrlBus", 28, 3 },
		{ "IPPerrEn", 27, 1 },
		{ "CfgdExtTagEn", 26, 1 },
		{ "CfgdMaxPyldSz", 23, 3 },
		{ "CfgdMaxRdReqSz", 20, 3 },
		{ "DCAEn", 17, 1 },
		{ "CMDReqPriority", 16, 1 },
		{ "VPDReqProtect", 14, 2 },
		{ "DroppedRdRspData", 12, 1 },
		{ "AI_INTX_ReAssertEn", 11, 1 },
		{ "AutoTxnDisable", 10, 1 },
		{ "TC0_Stamp", 9, 1 },
		{ "AI_TCVal", 6, 3 },
		{ "DMAStopEn", 5, 1 },
		{ "DevStateRstMode", 4, 1 },
		{ "LinkReqRstPCIeCRstMode", 3, 1 },
		{ "LinkDnRstEn", 0, 1 },
	{ "PCIE_CFG2", 0x3018, 0 },
		{ "reg_vdm_only", 17, 1 },
		{ "Mult_ReqID_Sup", 16, 1 },
		{ "BAR2Timer", 4, 12 },
		{ "MstReqRdRRASimple", 3, 1 },
		{ "TotMaxTag", 0, 3 },
	{ "PCIE_CFG3", 0x301c, 0 },
		{ "ARMDCASTFirstOnly", 7, 1 },
		{ "AutoPIOCookieMatch", 6, 1 },
		{ "FLRPndCplMode", 4, 2 },
		{ "HMADCASTFirstOnly", 2, 1 },
		{ "CMDDCASTFirstOnly", 1, 1 },
		{ "DMADCASTFirstOnly", 0, 1 },
	{ "PCIE_CFG4", 0x3020, 0 },
		{ "L1ClkRemovalEn", 17, 1 },
		{ "ReadyEnterL23", 16, 1 },
		{ "ExitL1", 12, 1 },
		{ "EnterL1", 8, 1 },
		{ "GenPME", 0, 8 },
	{ "PCIE_CFG5", 0x3024, 0 },
		{ "EnableSKPParityFix", 2, 1 },
		{ "EnableL2EntryInL1", 1, 1 },
		{ "HoldCplEnteringL1", 0, 1 },
	{ "PCIE_CFG6", 0x3028, 0 },
		{ "PERstTimerCount", 12, 14 },
		{ "PERstTimeout", 8, 1 },
		{ "PERstTimer", 0, 4 },
	{ "PCIE_CFG7", 0x302c, 0 },
	{ "PCIE_CFG_SPACE_REQ", 0x3060, 0 },
		{ "Enable", 31, 1 },
		{ "AI", 30, 1 },
		{ "CS2", 29, 1 },
		{ "WrBE", 25, 4 },
		{ "VFVld", 24, 1 },
		{ "RVF", 16, 8 },
		{ "PF", 12, 3 },
		{ "ExtRegister", 8, 4 },
		{ "Register", 0, 8 },
	{ "PCIE_CFG_SPACE_DATA", 0x3064, 0 },
	{ "PCIE_MAILBOX_BASE_WIN", 0x30a4, 0 },
		{ "PCIEOfst", 6, 26 },
		{ "BIR", 4, 2 },
		{ "Window", 0, 2 },
	{ "PCIE_MAILBOX_OFFSET0", 0x30a8, 0 },
		{ "MemOfst0", 3, 29 },
	{ "PCIE_MAILBOX_OFFSET1", 0x30ac, 0 },
	{ "PCIE_MA_CTRL", 0x30b0, 0 },
		{ "TagFree", 29, 1 },
		{ "MaxRspCnt", 24, 5 },
		{ "MaxReqCnt", 16, 7 },
		{ "MaxReqSize", 8, 3 },
		{ "MaxTag", 0, 5 },
	{ "PCIE_FW", 0x30b8, 0 },
	{ "PCIE_FW_PF", 0x30bc, 0 },
	{ "PCIE_FW_PF", 0x30c0, 0 },
	{ "PCIE_FW_PF", 0x30c4, 0 },
	{ "PCIE_FW_PF", 0x30c8, 0 },
	{ "PCIE_FW_PF", 0x30cc, 0 },
	{ "PCIE_FW_PF", 0x30d0, 0 },
	{ "PCIE_FW_PF", 0x30d4, 0 },
	{ "PCIE_FW_PF", 0x30d8, 0 },
	{ "PCIE_PIO_PAUSE", 0x30dc, 0 },
		{ "PIOPauseDone", 31, 1 },
		{ "MSTPauseDone", 30, 1 },
		{ "PauseTime", 4, 24 },
		{ "MSTPause", 1, 1 },
		{ "PIOPause", 0, 1 },
	{ "PCIE_MA_STAT", 0x30e0, 0 },
	{ "PCIE_STATIC_CFG1", 0x30e4, 0 },
		{ "AUXPOWER_DETECTED", 27, 1 },
	{ "PCIE_STATIC_CFG2", 0x30e8, 0 },
		{ "PL_CONTROL", 16, 16 },
		{ "STATIC_SPARE3", 0, 15 },
	{ "PCIE_DBG_INDIR_REQ", 0x30ec, 0 },
		{ "Enable", 31, 1 },
		{ "AI", 30, 1 },
		{ "Pointer", 8, 16 },
		{ "Select", 0, 4 },
	{ "PCIE_DBG_INDIR_DATA_0", 0x30f0, 0 },
	{ "PCIE_DBG_INDIR_DATA_1", 0x30f4, 0 },
	{ "PCIE_DBG_INDIR_DATA_2", 0x30f8, 0 },
	{ "PCIE_DBG_INDIR_DATA_3", 0x30fc, 0 },
	{ "PCIE_PF_INT_CFG", 0x3140, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x3144, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3148, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x314c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3150, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x3154, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3158, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x315c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3160, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x3164, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3168, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x316c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3170, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x3174, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_INT_CFG", 0x3178, 0 },
		{ "PBAOfst", 28, 4 },
		{ "TABOfst", 24, 4 },
		{ "VecNum", 12, 11 },
		{ "VecBase", 0, 12 },
	{ "PCIE_PF_INT_CFG2", 0x317c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3180, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3184, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3188, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x318c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3190, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3194, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3198, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x319c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31a0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31a4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31a8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31ac, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31b0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31b4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31b8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31bc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31c0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31c4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31c8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31cc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31d0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31d4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31d8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31dc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31e0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31e4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31e8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31ec, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31f0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31f4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x31f8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x31fc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3200, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3204, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3208, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x320c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3210, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3214, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3218, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x321c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3220, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3224, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3228, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x322c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3230, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3234, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3238, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x323c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3240, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3244, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3248, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x324c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3250, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3254, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3258, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x325c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3260, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3264, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3268, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x326c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3270, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3274, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3278, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x327c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3280, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3284, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3288, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x328c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3290, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3294, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3298, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x329c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32a0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32a4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32a8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32ac, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32b0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32b4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32b8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32bc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32c0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32c4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32c8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32cc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32d0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32d4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32d8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32dc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32e0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32e4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32e8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32ec, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32f0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32f4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x32f8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x32fc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3300, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3304, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3308, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x330c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3310, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3314, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3318, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x331c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3320, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3324, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3328, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x332c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3330, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3334, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3338, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x333c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3340, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3344, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3348, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x334c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3350, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3354, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3358, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x335c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3360, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3364, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3368, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x336c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3370, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3374, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3378, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x337c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3380, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3384, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3388, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x338c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3390, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3394, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3398, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x339c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33a0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33a4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33a8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33ac, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33b0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33b4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33b8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33bc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33c0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33c4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33c8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33cc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33d0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33d4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33d8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33dc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33e0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33e4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33e8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33ec, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33f0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33f4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x33f8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x33fc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3400, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3404, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3408, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x340c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3410, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3414, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3418, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x341c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3420, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3424, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3428, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x342c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3430, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3434, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3438, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x343c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3440, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3444, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3448, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x344c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3450, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3454, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3458, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x345c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3460, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3464, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3468, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x346c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3470, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3474, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3478, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x347c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3480, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3484, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3488, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x348c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3490, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3494, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3498, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x349c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34a0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34a4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34a8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34ac, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34b0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34b4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34b8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34bc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34c0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34c4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34c8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34cc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34d0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34d4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34d8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34dc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34e0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34e4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34e8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34ec, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34f0, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34f4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x34f8, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x34fc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3500, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3504, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3508, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x350c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3510, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3514, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3518, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x351c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3520, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3524, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3528, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x352c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3530, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3534, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3538, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x353c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3540, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3544, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3548, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x354c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3550, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3554, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3558, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x355c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3560, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3564, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3568, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x356c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3570, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x3574, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_INT_CFG", 0x3578, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 11 },
	{ "PCIE_VF_INT_CFG2", 0x357c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_PF_MSI_EN", 0x35a8, 0 },
	{ "PCIE_VF_MSI_EN_0", 0x35ac, 0 },
	{ "PCIE_VF_MSI_EN_1", 0x35b0, 0 },
	{ "PCIE_VF_MSI_EN_2", 0x35b4, 0 },
	{ "PCIE_VF_MSI_EN_3", 0x35b8, 0 },
	{ "PCIE_PF_MSIX_EN", 0x35bc, 0 },
	{ "PCIE_VF_MSIX_EN_0", 0x35c0, 0 },
	{ "PCIE_VF_MSIX_EN_1", 0x35c4, 0 },
	{ "PCIE_VF_MSIX_EN_2", 0x35c8, 0 },
	{ "PCIE_VF_MSIX_EN_3", 0x35cc, 0 },
	{ "PCIE_FID_VFID_CTL", 0x35e4, 0 },
	{ "PCIE_FID_PASID", 0x35e0, 0 },
	{ "PCIE_FID_VFID_SEL", 0x35e8, 0 },
		{ "Addr", 2, 13 },
		{ "Select", 0, 2 },
	{ "PCIE_FID_VFID", 0x35ec, 0 },
		{ "Select", 30, 2 },
		{ "NvmeGroupEn", 29, 1 },
		{ "GroupSel", 25, 4 },
		{ "IDO", 24, 1 },
		{ "VFID", 15, 9 },
		{ "TC", 12, 3 },
		{ "VFVld", 11, 1 },
		{ "PF", 8, 3 },
		{ "RVF", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3700, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3704, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3708, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x370c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3710, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3714, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3718, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x371c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3720, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3724, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3728, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x372c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3730, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3734, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3738, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x373c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3740, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3744, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3748, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x374c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3750, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3754, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3758, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x375c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3760, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3764, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3768, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x376c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3770, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3774, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3778, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x377c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3780, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3784, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3788, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x378c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3790, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x3794, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x3798, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x379c, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x37a0, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x37a4, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x37a8, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x37ac, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x37b0, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x37b4, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x37b8, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x37bc, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x37c0, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x37c4, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x37c8, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x37cc, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x37d0, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x37d4, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x37d8, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x37dc, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x37e0, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x37e4, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x37e8, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x37ec, 0 },
	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x37f0, 0 },
		{ "PCIEOfst", 10, 22 },
		{ "BIR", 8, 2 },
		{ "Window", 0, 8 },
	{ "PCIE_MEM_ACCESS_BASE_WIN1", 0x37f4, 0 },
	{ "PCIE_MEM_ACCESS_OFFSET0", 0x37f8, 0 },
		{ "MemOfst0", 3, 29 },
		{ "PFNum", 0, 3 },
	{ "PCIE_MEM_ACCESS_OFFSET1", 0x37fc, 0 },
	{ "PCIE_COOKIE_STAT", 0x5600, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x5604, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x5608, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x560c, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x5610, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x5614, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x5618, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_COOKIE_STAT", 0x561c, 0 },
		{ "CookieB", 16, 10 },
		{ "CookieA", 0, 10 },
	{ "PCIE_FLR_PIO", 0x5620, 0 },
		{ "RcvdBAR2Cookie", 24, 8 },
		{ "RcvdMARspCookie", 16, 8 },
		{ "RcvdPIORspCookie", 8, 8 },
		{ "ExpdCookie", 0, 8 },
	{ "PCIE_FLR_PIO2", 0x5624, 0 },
		{ "RcvdVDMRxCookie", 24, 8 },
		{ "RcvdVDMTxCookie", 16, 8 },
		{ "RcvdMAReqCookie", 8, 8 },
		{ "RcvdPIOReqCookie", 0, 8 },
	{ "PCIE_VC0_CDTS0", 0x56c4, 0 },
		{ "CPLD0", 16, 16 },
		{ "CPLH0", 0, 12 },
	{ "PCIE_VC0_CDTS1", 0x56c8, 0 },
		{ "PD0", 16, 16 },
		{ "PH0", 0, 12 },
	{ "PCIE_VC0_CDTS2", 0x56cc, 0 },
		{ "NPD0", 16, 16 },
		{ "NPH0", 0, 12 },
	{ "PCIE_VC1_CDTS0", 0x56d0, 0 },
		{ "CPLD0", 16, 16 },
		{ "CPLH0", 0, 12 },
	{ "PCIE_VC1_CDTS1", 0x56d4, 0 },
		{ "PD0", 16, 16 },
		{ "PH0", 0, 12 },
	{ "PCIE_VC1_CDTS2", 0x56d8, 0 },
		{ "NPD0", 16, 16 },
		{ "NPH0", 0, 12 },
	{ "PCIE_FLR_PF_STATUS", 0x56dc, 0 },
	{ "PCIE_FLR_VF0_STATUS", 0x56e0, 0 },
	{ "PCIE_FLR_VF1_STATUS", 0x56e4, 0 },
	{ "PCIE_FLR_VF2_STATUS", 0x56e8, 0 },
	{ "PCIE_FLR_VF3_STATUS", 0x56ec, 0 },
	{ "PCIE_STAT", 0x56f4, 0 },
		{ "PM_Status", 24, 8 },
		{ "PM_CurrentState", 20, 3 },
		{ "LTSSMEnable", 12, 1 },
		{ "StateCfgInitF", 4, 8 },
		{ "StateCfgInit", 0, 4 },
	{ "PCIE_CRS", 0x56f8, 0 },
	{ "PCIE_LTSSM", 0x56fc, 0 },
		{ "Stall_Disable", 1, 1 },
		{ "Enable", 0, 1 },
	{ "PCIE_PF_CFG", 0x1e040, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1e044, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1e04c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1e440, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1e444, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1e44c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1e840, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1e844, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1e84c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1ec40, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1ec44, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1ec4c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1f040, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1f044, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1f04c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1f440, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1f444, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1f44c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1f840, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1f844, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1f84c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_PF_CFG", 0x1fc40, 0 },
		{ "INTXStat", 16, 1 },
		{ "AIVec", 4, 10 },
		{ "D3HotEn", 1, 1 },
		{ "CLIDecEn", 0, 1 },
	{ "PCIE_PF_CLI", 0x1fc44, 0 },
	{ "PCIE_PF_EXPROM_OFST", 0x1fc4c, 0 },
		{ "Offset", 10, 14 },
	{ "PCIE_CORE_ACK_LATENCY_TIMER_REPLAY_TIMER", 0x5700, 0 },
		{ "Replay_Time_Limit", 16, 16 },
		{ "Ack_Latency_Timer_Limit", 0, 16 },
	{ "PCIE_CORE_VENDOR_SPECIFIC_DLLP", 0x5704, 0 },
	{ "PCIE_CORE_PORT_FORCE_LINK", 0x5708, 0 },
		{ "Low_Power_Entrance_Count", 24, 8 },
		{ "Link_State", 16, 6 },
		{ "Force_Link", 15, 1 },
		{ "Link_Number", 0, 8 },
	{ "PCIE_CORE_ACK_FREQUENCY_L0L1_ASPM_CONTROL", 0x570c, 0 },
		{ "Enter_ASPM_L1_wo_L0s", 30, 1 },
		{ "L1_Entrance_Latency", 27, 3 },
		{ "L0s_Entrance_Latency", 24, 3 },
		{ "Common_Clock_N_FTS", 16, 8 },
		{ "N_FTS", 8, 8 },
		{ "Ack_Frequency", 0, 8 },
	{ "PCIE_CORE_PORT_LINK_CONTROL", 0x5710, 0 },
		{ "Crosslink_Active", 23, 1 },
		{ "Crosslink_Enable", 22, 1 },
		{ "Link_Mode_Enable", 16, 6 },
		{ "Fast_Link_Mode", 7, 1 },
		{ "DLL_Link_Enable", 5, 1 },
		{ "Reset_Assert", 3, 1 },
		{ "Loopback_Enable", 2, 1 },
		{ "Scramble_Disable", 1, 1 },
		{ "Vendor_Specific_DLLP_Request", 0, 1 },
	{ "PCIE_CORE_LANE_SKEW", 0x5714, 0 },
		{ "Disable_DeSkew", 31, 1 },
		{ "Ack_Nak_Disable", 25, 1 },
		{ "Flow_Control_Disable", 24, 1 },
		{ "Insert_TxSkew", 0, 24 },
	{ "PCIE_CORE_SYMBOL_NUMBER", 0x5718, 0 },
		{ "Ack_Nak_Timer_Modifier", 19, 5 },
		{ "Replay_Timer_Modifier", 14, 5 },
		{ "MaxFunc", 0, 3 },
	{ "PCIE_CORE_SYMBOL_TIMER_FILTER_MASK1", 0x571c, 0 },
		{ "Mask_RADM_Filter", 16, 16 },
		{ "Disable_FC_Watchdog", 15, 1 },
		{ "SKP_Interval", 0, 11 },
	{ "PCIE_CORE_FILTER_MASK2", 0x5720, 0 },
	{ "PCIE_CORE_DEBUG_0", 0x5728, 0 },
	{ "PCIE_CORE_DEBUG_1", 0x572c, 0 },
	{ "PCIE_CORE_TRANSMIT_POSTED_FC_CREDIT_STATUS", 0x5730, 0 },
		{ "TxPH_FC", 12, 8 },
		{ "TxPD_FC", 0, 12 },
	{ "PCIE_CORE_TRANSMIT_NONPOSTED_FC_CREDIT_STATUS", 0x5734, 0 },
		{ "TxNPH_FC", 12, 8 },
		{ "TxNPD_FC", 0, 12 },
	{ "PCIE_CORE_TRANSMIT_COMPLETION_FC_CREDIT_STATUS", 0x5738, 0 },
		{ "TxCPLH_FC", 12, 8 },
		{ "TxCPLD_FC", 0, 12 },
	{ "PCIE_CORE_QUEUE_STATUS", 0x573c, 0 },
		{ "RxQueue_Not_Empty", 2, 1 },
		{ "TxRetryBuf_Not_Empty", 1, 1 },
		{ "RxTLP_FC_Not_Returned", 0, 1 },
	{ "PCIE_CORE_VC_TRANSMIT_ARBITRATION_1", 0x5740, 0 },
		{ "VC3_WRR", 24, 8 },
		{ "VC2_WRR", 16, 8 },
		{ "VC1_WRR", 8, 8 },
		{ "VC0_WRR", 0, 8 },
	{ "PCIE_CORE_VC_TRANSMIT_ARBITRATION_2", 0x5744, 0 },
		{ "VC7_WRR", 24, 8 },
		{ "VC6_WRR", 16, 8 },
		{ "VC5_WRR", 8, 8 },
		{ "VC4_WRR", 0, 8 },
	{ "PCIE_CORE_VC0_POSTED_RECEIVE_QUEUE_CONTROL", 0x5748, 0 },
		{ "VC0_Rx_Ordering", 31, 1 },
		{ "VC0_TLP_Ordering", 30, 1 },
		{ "VC0_PTLP_Queue_Mode", 21, 3 },
		{ "VC0_PH_Credits", 12, 8 },
		{ "VC0_PD_Credits", 0, 12 },
	{ "PCIE_CORE_VC0_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x574c, 0 },
		{ "VC0_NPTLP_Queue_Mode", 21, 3 },
		{ "VC0_NPH_Credits", 12, 8 },
		{ "VC0_NPD_Credits", 0, 12 },
	{ "PCIE_CORE_VC0_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x5750, 0 },
		{ "VC0_CPLTLP_Queue_Mode", 21, 3 },
		{ "VC0_CPLH_Credits", 12, 8 },
		{ "VC0_CPLD_Credits", 0, 12 },
	{ "PCIE_CORE_VC1_POSTED_RECEIVE_QUEUE_CONTROL", 0x5754, 0 },
		{ "VC1_TLP_Ordering", 30, 1 },
		{ "VC1_PTLP_Queue_Mode", 21, 3 },
		{ "VC1_PH_Credits", 12, 8 },
		{ "VC1_PD_Credits", 0, 12 },
	{ "PCIE_CORE_VC1_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x5758, 0 },
		{ "VC1_NPTLP_Queue_Mode", 21, 3 },
		{ "VC1_NPH_Credits", 12, 8 },
		{ "VC1_NPD_Credits", 0, 12 },
	{ "PCIE_CORE_VC1_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x575c, 0 },
		{ "VC1_CPLTLP_Queue_Mode", 21, 3 },
		{ "VC1_CPLH_Credits", 12, 8 },
		{ "VC1_CPLD_Credits", 0, 12 },
	{ "PCIE_CORE_LINK_WIDTH_SPEED_CHANGE", 0x580c, 0 },
		{ "Sel_DeEmphasis", 20, 1 },
		{ "TxCmplRcv", 19, 1 },
		{ "PhyTxSwing", 18, 1 },
		{ "DirSpdChange", 17, 1 },
		{ "Auto_Lane_Flip_Ctrl_En", 16, 1 },
		{ "Num_Lanes", 8, 5 },
		{ "NFTS_Gen2_3", 0, 8 },
	{ "PCIE_CORE_PHY_STATUS", 0x5810, 0 },
	{ "PCIE_CORE_PHY_CONTROL", 0x5814, 0 },
	{ "PCIE_CORE_GEN3_CONTROL", 0x5890, 0 },
		{ "Rate_Shadow_Sel", 24, 2 },
		{ "DC_Balance_Disable", 18, 1 },
		{ "DLLP_Delay_Disable", 17, 1 },
		{ "Eql_Disable", 16, 1 },
		{ "Eql_Redo_Disable", 11, 1 },
		{ "Eql_EIEOS_CntRst_Disable", 10, 1 },
		{ "Eql_PH2_PH3_Disable", 9, 1 },
		{ "Disable_Scrambler", 8, 1 },
	{ "PCIE_CORE_GEN3_EQ_FS_LF", 0x5894, 0 },
		{ "Full_Swing", 6, 6 },
		{ "Low_Frequency", 0, 6 },
	{ "PCIE_CORE_GEN3_EQ_PRESET_COEFF", 0x5898, 0 },
		{ "PostCursor", 12, 6 },
		{ "Cursor", 6, 6 },
		{ "PreCursor", 0, 6 },
	{ "PCIE_CORE_GEN3_EQ_PRESET_INDEX", 0x589c, 0 },
	{ "PCIE_CORE_GEN3_EQ_STATUS", 0x58a4, 0 },
	{ "PCIE_CORE_GEN3_EQ_CONTROL", 0x58a8, 0 },
		{ "Include_Initial_FOM", 24, 1 },
		{ "Preset_Request_Vector", 8, 16 },
		{ "Phase23_2ms_Timeout_Disable", 5, 1 },
		{ "After24ms", 4, 1 },
		{ "Feedback_Mode", 0, 4 },
	{ "PCIE_CORE_GEN3_EQ_DIRCHANGE_FEEDBACK", 0x58ac, 0 },
		{ "WinAperture_CPlus1", 14, 4 },
		{ "WinAperture_CMins1", 10, 4 },
		{ "Convergence_WinDepth", 5, 5 },
		{ "EQMasterPhase_MinTime", 0, 5 },
	{ "PCIE_CORE_PIPE_CONTROL", 0x58b8, 0 },
		{ "Loopback_Enable", 31, 1 },
	{ "PCIE_CORE_DBI_RO_WE", 0x58bc, 0 },
	{ "PCIE_X8_CORE_ACK_LATENCY_TIMER_REPLAY_TIMER", 0x4700, 0 },
		{ "Replay_Time_Limit", 16, 16 },
		{ "Ack_Latency_Timer_Limit", 0, 16 },
	{ "PCIE_X8_CORE_VENDOR_SPECIFIC_DLLP", 0x4704, 0 },
	{ "PCIE_X8_CORE_PORT_FORCE_LINK", 0x4708, 0 },
		{ "Low_Power_Entrance_Count", 24, 8 },
		{ "Link_State", 16, 6 },
		{ "Force_Link", 15, 1 },
		{ "Link_Number", 0, 8 },
	{ "PCIE_X8_CORE_ACK_FREQUENCY_L0L1_ASPM_CONTROL", 0x470c, 0 },
		{ "Enter_ASPM_L1_wo_L0s", 30, 1 },
		{ "L1_Entrance_Latency", 27, 3 },
		{ "L0s_Entrance_Latency", 24, 3 },
		{ "Common_Clock_N_FTS", 16, 8 },
		{ "N_FTS", 8, 8 },
		{ "Ack_Frequency", 0, 8 },
	{ "PCIE_X8_CORE_PORT_LINK_CONTROL", 0x4710, 0 },
		{ "Crosslink_Active", 23, 1 },
		{ "Crosslink_Enable", 22, 1 },
		{ "Link_Mode_Enable", 16, 6 },
		{ "Fast_Link_Mode", 7, 1 },
		{ "DLL_Link_Enable", 5, 1 },
		{ "Reset_Assert", 3, 1 },
		{ "Loopback_Enable", 2, 1 },
		{ "Scramble_Disable", 1, 1 },
		{ "Vendor_Specific_DLLP_Request", 0, 1 },
	{ "PCIE_X8_CORE_LANE_SKEW", 0x4714, 0 },
		{ "Disable_DeSkew", 31, 1 },
		{ "Ack_Nak_Disable", 25, 1 },
		{ "Flow_Control_Disable", 24, 1 },
		{ "Insert_TxSkew", 0, 24 },
	{ "PCIE_X8_CORE_SYMBOL_NUMBER", 0x4718, 0 },
		{ "Ack_Nak_Timer_Modifier", 19, 5 },
		{ "Replay_Timer_Modifier", 14, 5 },
		{ "MaxFunc", 0, 3 },
	{ "PCIE_X8_CORE_SYMBOL_TIMER_FILTER_MASK1", 0x471c, 0 },
		{ "Mask_RADM_Filter", 16, 16 },
		{ "Disable_FC_Watchdog", 15, 1 },
		{ "SKP_Interval", 0, 11 },
	{ "PCIE_X8_CORE_FILTER_MASK2", 0x4720, 0 },
	{ "PCIE_X8_CORE_DEBUG_0", 0x4728, 0 },
	{ "PCIE_X8_CORE_DEBUG_1", 0x472c, 0 },
	{ "PCIE_X8_CORE_TRANSMIT_POSTED_FC_CREDIT_STATUS", 0x4730, 0 },
		{ "TxPH_FC", 12, 8 },
		{ "TxPD_FC", 0, 12 },
	{ "PCIE_X8_CORE_TRANSMIT_NONPOSTED_FC_CREDIT_STATUS", 0x4734, 0 },
		{ "TxNPH_FC", 12, 8 },
		{ "TxNPD_FC", 0, 12 },
	{ "PCIE_X8_CORE_TRANSMIT_COMPLETION_FC_CREDIT_STATUS", 0x4738, 0 },
		{ "TxCPLH_FC", 12, 8 },
		{ "TxCPLD_FC", 0, 12 },
	{ "PCIE_X8_CORE_QUEUE_STATUS", 0x473c, 0 },
		{ "RxQueue_Not_Empty", 2, 1 },
		{ "TxRetryBuf_Not_Empty", 1, 1 },
		{ "RxTLP_FC_Not_Returned", 0, 1 },
	{ "PCIE_X8_CORE_VC_TRANSMIT_ARBITRATION_1", 0x4740, 0 },
		{ "VC3_WRR", 24, 8 },
		{ "VC2_WRR", 16, 8 },
		{ "VC1_WRR", 8, 8 },
		{ "VC0_WRR", 0, 8 },
	{ "PCIE_X8_CORE_VC_TRANSMIT_ARBITRATION_2", 0x4744, 0 },
		{ "VC7_WRR", 24, 8 },
		{ "VC6_WRR", 16, 8 },
		{ "VC5_WRR", 8, 8 },
		{ "VC4_WRR", 0, 8 },
	{ "PCIE_X8_CORE_VC0_POSTED_RECEIVE_QUEUE_CONTROL", 0x4748, 0 },
		{ "VC0_Rx_Ordering", 31, 1 },
		{ "VC0_TLP_Ordering", 30, 1 },
		{ "VC0_PTLP_Queue_Mode", 21, 3 },
		{ "VC0_PH_Credits", 12, 8 },
		{ "VC0_PD_Credits", 0, 12 },
	{ "PCIE_X8_CORE_VC0_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x474c, 0 },
		{ "VC0_NPTLP_Queue_Mode", 21, 3 },
		{ "VC0_NPH_Credits", 12, 8 },
		{ "VC0_NPD_Credits", 0, 12 },
	{ "PCIE_X8_CORE_VC0_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x4750, 0 },
		{ "VC0_CPLTLP_Queue_Mode", 21, 3 },
		{ "VC0_CPLH_Credits", 12, 8 },
		{ "VC0_CPLD_Credits", 0, 12 },
	{ "PCIE_X8_CORE_VC1_POSTED_RECEIVE_QUEUE_CONTROL", 0x4754, 0 },
		{ "VC1_TLP_Ordering", 30, 1 },
		{ "VC1_PTLP_Queue_Mode", 21, 3 },
		{ "VC1_PH_Credits", 12, 8 },
		{ "VC1_PD_Credits", 0, 12 },
	{ "PCIE_X8_CORE_VC1_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x4758, 0 },
		{ "VC1_NPTLP_Queue_Mode", 21, 3 },
		{ "VC1_NPH_Credits", 12, 8 },
		{ "VC1_NPD_Credits", 0, 12 },
	{ "PCIE_X8_CORE_VC1_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x475c, 0 },
		{ "VC1_CPLTLP_Queue_Mode", 21, 3 },
		{ "VC1_CPLH_Credits", 12, 8 },
		{ "VC1_CPLD_Credits", 0, 12 },
	{ "PCIE_X8_CORE_LINK_WIDTH_SPEED_CHANGE", 0x480c, 0 },
		{ "Sel_DeEmphasis", 20, 1 },
		{ "TxCmplRcv", 19, 1 },
		{ "PhyTxSwing", 18, 1 },
		{ "DirSpdChange", 17, 1 },
		{ "Auto_Lane_Flip_Ctrl_En", 16, 1 },
		{ "Num_Lanes", 8, 5 },
		{ "NFTS_Gen2_3", 0, 8 },
	{ "PCIE_X8_CORE_PHY_STATUS", 0x4810, 0 },
	{ "PCIE_X8_CORE_PHY_CONTROL", 0x4814, 0 },
	{ "PCIE_X8_CORE_GEN3_CONTROL", 0x4890, 0 },
		{ "Rate_Shadow_Sel", 24, 2 },
		{ "DC_Balance_Disable", 18, 1 },
		{ "DLLP_Delay_Disable", 17, 1 },
		{ "Eql_Disable", 16, 1 },
		{ "Eql_Redo_Disable", 11, 1 },
		{ "Eql_EIEOS_CntRst_Disable", 10, 1 },
		{ "Eql_PH2_PH3_Disable", 9, 1 },
		{ "Disable_Scrambler", 8, 1 },
	{ "PCIE_X8_CORE_GEN3_EQ_FS_LF", 0x4894, 0 },
		{ "Full_Swing", 6, 6 },
		{ "Low_Frequency", 0, 6 },
	{ "PCIE_X8_CORE_GEN3_EQ_PRESET_COEFF", 0x4898, 0 },
		{ "PostCursor", 12, 6 },
		{ "Cursor", 6, 6 },
		{ "PreCursor", 0, 6 },
	{ "PCIE_X8_CORE_GEN3_EQ_PRESET_INDEX", 0x489c, 0 },
	{ "PCIE_X8_CORE_GEN3_EQ_STATUS", 0x48a4, 0 },
	{ "PCIE_X8_CORE_GEN3_EQ_CONTROL", 0x48a8, 0 },
		{ "Include_Initial_FOM", 24, 1 },
		{ "Preset_Request_Vector", 8, 16 },
		{ "Phase23_2ms_Timeout_Disable", 5, 1 },
		{ "After24ms", 4, 1 },
		{ "Feedback_Mode", 0, 4 },
	{ "PCIE_X8_CORE_GEN3_EQ_DIRCHANGE_FEEDBACK", 0x48ac, 0 },
		{ "WinAperture_CPlus1", 14, 4 },
		{ "WinAperture_CMins1", 10, 4 },
		{ "Convergence_WinDepth", 5, 5 },
		{ "EQMasterPhase_MinTime", 0, 5 },
	{ "PCIE_X8_CORE_PIPE_CONTROL", 0x48b8, 0 },
		{ "Loopback_Enable", 31, 1 },
	{ "PCIE_X8_CORE_DBI_RO_WE", 0x48bc, 0 },
	{ "PCIE_X8_CFG_SPACE_REQ", 0x48c0, 0 },
		{ "Enable", 31, 1 },
		{ "AI", 30, 1 },
		{ "CS2", 29, 1 },
		{ "WrBE", 25, 4 },
		{ "ExtRegister", 8, 4 },
		{ "Register", 0, 8 },
	{ "PCIE_X8_CFG_SPACE_DATA", 0x48c4, 0 },
	{ "PCIE_X8_CFG_MPS_MRS", 0x4900, 0 },
		{ "MRS", 3, 3 },
		{ "MPS", 0, 3 },
	{ "PCIE_X8_CFG_ATTRIBUTES", 0x4904, 0 },
		{ "DcaEn", 2, 1 },
		{ "DcaStFitTraOnlEn", 1, 1 },
		{ "ReqCtlDynStClkEn", 0, 1 },
	{ "PCIE_X8_CFG_LTSSM", 0x4908, 0 },
	{ "PCIE_ARM_REQUESTER_ID_X8", 0x490c, 0 },
		{ "PrimBusnumber", 16, 8 },
		{ "RequesterId", 0, 16 },
	{ "PCIE_SWAP_DATA_B2L_X8", 0x4910, 0 },
		{ "cfgrd_swap_en", 1, 1 },
		{ "cfgwr_swap_en", 0, 1 },
	{ "PCIE_PDEBUG_DATA0_X8", 0x4914, 0 },
	{ "PCIE_PDEBUG_DATA1_X8", 0x4918, 0 },
	{ "PCIE_PDEBUG_DATA2_X8", 0x491c, 0 },
	{ "PCIE_PDEBUG_CTRL_X8", 0x4920, 0 },
	{ "PCIE_PDEBUG_DATA_X8", 0x4924, 0 },
	{ "PCIE_SPARE_REGISTER_SPACES_X8", 0x4ffc, 0 },
	{ "PCIE_DMA_CFG", 0x5940, 0 },
		{ "MaxPyldSize", 28, 3 },
		{ "MaxReqCnt", 20, 7 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 8 },
		{ "SeqChkDis", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_DMA_STAT", 0x5944, 0 },
		{ "RspCnt", 20, 10 },
		{ "RdReqCnt", 12, 6 },
		{ "WrReqCnt", 0, 9 },
	{ "PCIE_DMA_STAT2", 0x5948, 0 },
		{ "CookieCnt", 24, 4 },
		{ "RdSeqNumUpdCnt", 20, 4 },
		{ "SIReqCnt", 16, 4 },
		{ "WrEOPMatchSOP", 12, 1 },
		{ "WrSOPCnt", 8, 4 },
		{ "RdSOPCnt", 0, 8 },
	{ "PCIE_DMA_STAT3", 0x594c, 0 },
		{ "AtmReqSOPCnt", 24, 8 },
		{ "AtmEOPMatchSOP", 17, 1 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_DMA_CFG", 0x5950, 0 },
		{ "MaxPyldSize", 28, 3 },
		{ "MaxReqCnt", 20, 7 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 8 },
		{ "SeqChkDis", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_DMA_STAT", 0x5954, 0 },
		{ "RspCnt", 20, 10 },
		{ "RdReqCnt", 12, 6 },
		{ "WrReqCnt", 0, 9 },
	{ "PCIE_DMA_STAT2", 0x5958, 0 },
		{ "CookieCnt", 24, 4 },
		{ "RdSeqNumUpdCnt", 20, 4 },
		{ "SIReqCnt", 16, 4 },
		{ "WrEOPMatchSOP", 12, 1 },
		{ "WrSOPCnt", 8, 4 },
		{ "RdSOPCnt", 0, 8 },
	{ "PCIE_DMA_STAT3", 0x595c, 0 },
		{ "AtmReqSOPCnt", 24, 8 },
		{ "AtmEOPMatchSOP", 17, 1 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_DMA_CFG", 0x5960, 0 },
		{ "MaxPyldSize", 28, 3 },
		{ "MaxReqCnt", 20, 7 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 8 },
		{ "SeqChkDis", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_DMA_STAT", 0x5964, 0 },
		{ "RspCnt", 20, 10 },
		{ "RdReqCnt", 12, 6 },
		{ "WrReqCnt", 0, 9 },
	{ "PCIE_DMA_STAT2", 0x5968, 0 },
		{ "CookieCnt", 24, 4 },
		{ "RdSeqNumUpdCnt", 20, 4 },
		{ "SIReqCnt", 16, 4 },
		{ "WrEOPMatchSOP", 12, 1 },
		{ "WrSOPCnt", 8, 4 },
		{ "RdSOPCnt", 0, 8 },
	{ "PCIE_DMA_STAT3", 0x596c, 0 },
		{ "AtmReqSOPCnt", 24, 8 },
		{ "AtmEOPMatchSOP", 17, 1 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_DMA_CFG", 0x5970, 0 },
		{ "MaxPyldSize", 28, 3 },
		{ "MaxReqCnt", 20, 7 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 8 },
		{ "SeqChkDis", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_DMA_STAT", 0x5974, 0 },
		{ "RspCnt", 20, 10 },
		{ "RdReqCnt", 12, 6 },
		{ "WrReqCnt", 0, 9 },
	{ "PCIE_DMA_STAT2", 0x5978, 0 },
		{ "CookieCnt", 24, 4 },
		{ "RdSeqNumUpdCnt", 20, 4 },
		{ "SIReqCnt", 16, 4 },
		{ "WrEOPMatchSOP", 12, 1 },
		{ "WrSOPCnt", 8, 4 },
		{ "RdSOPCnt", 0, 8 },
	{ "PCIE_DMA_STAT3", 0x597c, 0 },
		{ "AtmReqSOPCnt", 24, 8 },
		{ "AtmEOPMatchSOP", 17, 1 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_CMD_CFG", 0x5980, 0 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 6 },
		{ "UseCmdPool", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_CMD_STAT", 0x5984, 0 },
		{ "RspCnt", 20, 8 },
		{ "RdReqCnt", 12, 4 },
	{ "PCIE_CMD_STAT2", 0x5988, 0 },
	{ "PCIE_CMD_STAT3", 0x598c, 0 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_HMA_CFG", 0x59b0, 0 },
		{ "MaxPyldSize", 28, 3 },
		{ "MaxReqCnt", 20, 7 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 8 },
		{ "SeqChkDis", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_HMA_STAT", 0x59b4, 0 },
		{ "RspCnt", 20, 10 },
		{ "RdReqCnt", 12, 6 },
		{ "WrReqCnt", 0, 9 },
	{ "PCIE_HMA_STAT2", 0x59b8, 0 },
		{ "CookieCnt", 24, 4 },
		{ "RdSeqNumUpdCnt", 20, 4 },
		{ "WrEOPMatchSOP", 12, 1 },
		{ "WrSOPCnt", 8, 4 },
		{ "RdSOPCnt", 0, 8 },
	{ "PCIE_HMA_STAT3", 0x59bc, 0 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_CGEN", 0x59c0, 0 },
		{ "ARM_Static_CGEN", 28, 1 },
		{ "ARM_Dynamic_CGEN", 27, 1 },
		{ "VPD_Dynamic_CGEN", 26, 1 },
		{ "MA_Dynamic_CGEN", 25, 1 },
		{ "Tagq_Dynamic_CGEN", 24, 1 },
		{ "ReqCtl_Dynamic_CGEN", 23, 1 },
		{ "RspDataProc_Dynamic_CGEN", 22, 1 },
		{ "RspRdq_Dynamic_CGEN", 21, 1 },
		{ "RspIPif_Dynamic_CGEN", 20, 1 },
		{ "HMA_Static_CGEN", 19, 1 },
		{ "HMA_Dynamic_CGEN", 18, 1 },
		{ "CMD_Static_CGEN", 16, 1 },
		{ "CMD_Dynamic_CGEN", 15, 1 },
		{ "DMA_Static_CGEN", 13, 1 },
		{ "DMA_Dynamic_CGEN", 12, 1 },
		{ "VFID_SleepStatus", 10, 1 },
		{ "VC1_SleepStatus", 9, 1 },
		{ "STI_SleepStatus", 8, 1 },
		{ "VFID_SleepReq", 2, 1 },
		{ "VC1_SleepReq", 1, 1 },
		{ "STI_SleepReq", 0, 1 },
	{ "PCIE_MA_RSP", 0x59c4, 0 },
		{ "TimerValue", 8, 24 },
		{ "MAReqTimerEn", 1, 1 },
		{ "TimerEn", 0, 1 },
	{ "PCIE_HPRD", 0x59c8, 0 },
		{ "NPH_CreditsAvailVC0", 19, 2 },
		{ "NPD_CreditsAvailVC0", 17, 2 },
		{ "NPH_CreditsAvailVC1", 15, 2 },
		{ "NPD_CreditsAvailVC1", 13, 2 },
		{ "NPH_CreditsRequired", 11, 2 },
		{ "NPD_CreditsRequired", 9, 2 },
		{ "ReqBurstCount", 5, 4 },
		{ "ReqBurstFrequency", 1, 4 },
		{ "EnableVC1", 0, 1 },
	{ "PCIE_PERR_GROUP", 0x59d0, 0 },
		{ "TGT1_MEM_Perr", 28, 1 },
		{ "TGT2_MEM_Perr", 27, 1 },
		{ "MA_RspCtlPerr", 26, 1 },
		{ "MST_DataPathPerr", 25, 1 },
		{ "MST_RspRdQPerr", 24, 1 },
		{ "TRGT1_FIDLkUpHdrPerr", 20, 1 },
		{ "TRGT1_AlindDataPerr", 19, 1 },
		{ "TRGT1_UnAlinDataPerr", 18, 1 },
		{ "TRGT1_ReqDataPerr", 17, 1 },
		{ "TRGT1_ReqHdrPerr", 16, 1 },
		{ "IPRxData_VC0Perr", 15, 1 },
		{ "IPRxHdr_VC0Perr", 14, 1 },
		{ "PIOCpl_VDMTxCtlPerr", 13, 1 },
		{ "PIOCpl_VDMTxDataPerr", 12, 1 },
		{ "MA_RspDataPerr", 11, 1 },
		{ "MA_CplTagQPerr", 10, 1 },
		{ "MA_ReqTagQPerr", 9, 1 },
		{ "PIOReq_BAR2CtlPerr", 8, 1 },
		{ "PIOReq_MEMCtlPerr", 7, 1 },
		{ "PIOReq_PLMCtlPerr", 6, 1 },
		{ "PIOReq_BAR2DataPerr", 5, 1 },
		{ "PIOReq_MEMDataPerr", 4, 1 },
		{ "PIOReq_PLMDataPerr", 3, 1 },
		{ "PIOCpl_CtlPerr", 2, 1 },
		{ "PIOCpl_DataPerr", 1, 1 },
		{ "PIOCpl_PLMRspPerr", 0, 1 },
	{ "PCIE_RSP_ERR_INT_LOG_EN", 0x59d4, 0 },
		{ "CplStatusIntEn", 12, 1 },
		{ "TimeoutIntEn", 11, 1 },
		{ "DisabledIntEn", 10, 1 },
		{ "RspDropFLRIntEn", 9, 1 },
		{ "ReqUnderFLRIntEn", 8, 1 },
		{ "CplStatusLogEn", 4, 1 },
		{ "TimeoutLogEn", 3, 1 },
		{ "DisabledLogEn", 2, 1 },
		{ "RspDropFLRLogEn", 1, 1 },
		{ "ReqUnderFLRLogEn", 0, 1 },
	{ "PCIE_RSP_ERR_LOG1", 0x59d8, 0 },
		{ "Tag", 25, 7 },
		{ "CID", 22, 3 },
		{ "ChNum", 19, 3 },
		{ "ByteLen", 6, 13 },
		{ "Reason", 3, 3 },
		{ "CplStatus", 0, 3 },
	{ "PCIE_RSP_ERR_LOG2", 0x59dc, 0 },
		{ "Valid", 31, 1 },
		{ "Addr10b", 9, 10 },
		{ "VFID", 0, 9 },
	{ "PCIE_REVISION", 0x5a00, 0 },
	{ "PCIE_PDEBUG_INDEX", 0x5a04, 0 },
		{ "PDEBUGSelH", 16, 8 },
		{ "PDEBUGSelL", 0, 8 },
	{ "PCIE_PDEBUG_DATA_HIGH", 0x5a08, 0 },
	{ "PCIE_PDEBUG_DATA_LOW", 0x5a0c, 0 },
	{ "PCIE_CDEBUG_INDEX", 0x5a10, 0 },
		{ "CDEBUGSelH", 16, 8 },
		{ "CDEBUGSelL", 0, 8 },
	{ "PCIE_CDEBUG_DATA_HIGH", 0x5a14, 0 },
	{ "PCIE_CDEBUG_DATA_LOW", 0x5a18, 0 },
	{ "PCIE_BUS_MST_STAT_0", 0x5a60, 0 },
	{ "PCIE_BUS_MST_STAT_1", 0x5a64, 0 },
	{ "PCIE_BUS_MST_STAT_2", 0x5a68, 0 },
	{ "PCIE_BUS_MST_STAT_3", 0x5a6c, 0 },
	{ "PCIE_RSP_ERR_STAT_0", 0x5a80, 0 },
	{ "PCIE_RSP_ERR_STAT_1", 0x5a84, 0 },
	{ "PCIE_RSP_ERR_STAT_2", 0x5a88, 0 },
	{ "PCIE_RSP_ERR_STAT_3", 0x5a8c, 0 },
	{ "PCIE_DBI_TIMEOUT_CTL", 0x5a94, 0 },
	{ "PCIE_DBI_TIMEOUT_STATUS0", 0x5a98, 0 },
	{ "PCIE_DBI_TIMEOUT_STATUS1", 0x5a9c, 0 },
		{ "Valid", 31, 1 },
		{ "Source", 17, 2 },
		{ "Write", 13, 4 },
		{ "CS2", 12, 1 },
		{ "PF", 9, 3 },
		{ "VFVld", 8, 1 },
		{ "VF", 0, 8 },
	{ "PCIE_PB_CTL", 0x5b94, 0 },
		{ "PB_Sel", 16, 8 },
		{ "PB_SelReg", 8, 8 },
		{ "PB_Func", 0, 3 },
	{ "PCIE_PB_DATA", 0x5b98, 0 },
	{ "PCIE_CHANGESET", 0x59fc, 0 },
	{ "PCIE_CUR_LINK", 0x5b9c, 0 },
		{ "CfgInitCoeffDoneSeen", 22, 1 },
		{ "CfgInitCoeffDone", 21, 1 },
		{ "xmlh_link_up", 20, 1 },
		{ "pm_linkst_in_l0s", 19, 1 },
		{ "pm_linkst_in_l1", 18, 1 },
		{ "pm_linkst_in_l2", 17, 1 },
		{ "pm_linkst_l2_exit", 16, 1 },
		{ "xmlh_in_rl0s", 15, 1 },
		{ "xmlh_ltssm_state_rcvry_eq", 14, 1 },
		{ "NegotiatedWidth", 8, 6 },
		{ "ActiveLanes", 0, 8 },
	{ "PCIE_PHY_REQRXPWR", 0x5ba0, 0 },
		{ "Req_LnH_RxStateDone", 31, 1 },
		{ "Req_LnH_RxStateReq", 30, 1 },
		{ "Req_LnH_RxPwrState", 28, 2 },
		{ "Req_LnG_RxStateDone", 27, 1 },
		{ "Req_LnG_RxStateReq", 26, 1 },
		{ "Req_LnG_RxPwrState", 24, 2 },
		{ "Req_LnF_RxStateDone", 23, 1 },
		{ "Req_LnF_RxStateReq", 22, 1 },
		{ "Req_LnF_RxPwrState", 20, 2 },
		{ "Req_LnE_RxStateDone", 19, 1 },
		{ "Req_LnE_RxStateReq", 18, 1 },
		{ "Req_LnE_RxPwrState", 16, 2 },
		{ "Req_LnD_RxStateDone", 15, 1 },
		{ "Req_LnD_RxStateReq", 14, 1 },
		{ "Req_LnD_RxPwrState", 12, 2 },
		{ "Req_LnC_RxStateDone", 11, 1 },
		{ "Req_LnC_RxStateReq", 10, 1 },
		{ "Req_LnC_RxPwrState", 8, 2 },
		{ "Req_LnB_RxStateDone", 7, 1 },
		{ "Req_LnB_RxStateReq", 6, 1 },
		{ "Req_LnB_RxPwrState", 4, 2 },
		{ "Req_LnA_RxStateDone", 3, 1 },
		{ "Req_LnA_RxStateReq", 2, 1 },
		{ "Req_LnA_RxPwrState", 0, 2 },
	{ "PCIE_PHY_CURRXPWR", 0x5ba4, 0 },
		{ "Cur_LnH_RxPwrState", 28, 3 },
		{ "Cur_LnG_RxPwrState", 24, 3 },
		{ "Cur_LnF_RxPwrState", 20, 3 },
		{ "Cur_LnE_RxPwrState", 16, 3 },
		{ "Cur_LnD_RxPwrState", 12, 3 },
		{ "Cur_LnC_RxPwrState", 8, 3 },
		{ "Cur_LnB_RxPwrState", 4, 3 },
		{ "Cur_LnA_RxPwrState", 0, 3 },
	{ "PCIE_PHY_GEN3_AE0", 0x5ba8, 0 },
		{ "LnD_STAT", 28, 3 },
		{ "LnD_CMD", 24, 3 },
		{ "LnC_STAT", 20, 3 },
		{ "LnC_CMD", 16, 3 },
		{ "LnB_STAT", 12, 3 },
		{ "LnB_CMD", 8, 3 },
		{ "LnA_STAT", 4, 3 },
		{ "LnA_CMD", 0, 3 },
	{ "PCIE_PHY_GEN3_AE1", 0x5bac, 0 },
		{ "LnH_STAT", 28, 3 },
		{ "LnH_CMD", 24, 3 },
		{ "LnG_STAT", 20, 3 },
		{ "LnG_CMD", 16, 3 },
		{ "LnF_STAT", 12, 3 },
		{ "LnF_CMD", 8, 3 },
		{ "LnE_STAT", 4, 3 },
		{ "LnE_CMD", 0, 3 },
	{ "PCIE_PHY_FS_LF0", 0x5bb0, 0 },
		{ "Lane1LF", 24, 6 },
		{ "Lane1FS", 16, 6 },
		{ "Lane0LF", 8, 6 },
		{ "Lane0FS", 0, 6 },
	{ "PCIE_PHY_FS_LF1", 0x5bb4, 0 },
		{ "Lane3LF", 24, 6 },
		{ "Lane3FS", 16, 6 },
		{ "Lane2LF", 8, 6 },
		{ "Lane2FS", 0, 6 },
	{ "PCIE_PHY_FS_LF2", 0x5bb8, 0 },
		{ "Lane5LF", 24, 6 },
		{ "Lane5FS", 16, 6 },
		{ "Lane4LF", 8, 6 },
		{ "Lane4FS", 0, 6 },
	{ "PCIE_PHY_FS_LF3", 0x5bbc, 0 },
		{ "Lane7LF", 24, 6 },
		{ "Lane7FS", 16, 6 },
		{ "Lane6LF", 8, 6 },
		{ "Lane6FS", 0, 6 },
	{ "PCIE_PHY_PRESET_REQ", 0x5bc0, 0 },
		{ "CoeffDone", 16, 1 },
		{ "CoeffLane", 8, 4 },
		{ "CoeffStart", 0, 1 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bc4, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bc8, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bcc, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bd0, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bd4, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bd8, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bdc, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5be0, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5be4, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5be8, 0 },
	{ "PCIE_PHY_PRESET_COEFF", 0x5bec, 0 },
	{ "PCIE_PHY_INDIR_REQ", 0x5bf0, 0 },
		{ "Enable", 31, 1 },
		{ "RegAddr", 0, 16 },
	{ "PCIE_PHY_INDIR_DATA", 0x5bf4, 0 },
	{ "PCIE_STATIC_SPARE1", 0x5bf8, 0 },
	{ "PCIE_STATIC_SPARE2", 0x5bfc, 0 },
		{ "x8_sw_en", 30, 1 },
		{ "SwitchCfg", 28, 2 },
		{ "STATIC_SPARE2", 0, 28 },
	{ "PCIE_KDOORBELL_GTS_PF_BASE_LEN", 0x5c10, 0 },
		{ "KDB_PF_Len", 24, 5 },
		{ "KDB_PF_BaseAddr", 0, 20 },
	{ "PCIE_KDOORBELL_GTS_VF_BASE_LEN", 0x5c14, 0 },
		{ "KDB_VF_Len", 24, 5 },
		{ "KDB_VF_BaseAddr", 0, 20 },
	{ "PCIE_KDOORBELL_GTS_VF_OFFSET", 0x5c18, 0 },
	{ "PCIE_PHY_REQRXPWR1", 0x5c1c, 0 },
		{ "Req_LnP_RxStateDone", 31, 1 },
		{ "Req_LnP_RxStateReq", 30, 1 },
		{ "Req_LnP_RxPwrState", 28, 2 },
		{ "Req_LnO_RxStateDone", 27, 1 },
		{ "Req_LnO_RxStateReq", 26, 1 },
		{ "Req_LnO_RxPwrState", 24, 2 },
		{ "Req_LnN_RxStateDone", 23, 1 },
		{ "Req_LnN_RxStateReq", 22, 1 },
		{ "Req_LnN_RxPwrState", 20, 2 },
		{ "Req_LnM_RxStateDone", 19, 1 },
		{ "Req_LnM_RxStateReq", 18, 1 },
		{ "Req_LnM_RxPwrState", 16, 2 },
		{ "Req_LnL_RxStateDone", 15, 1 },
		{ "Req_LnL_RxStateReq", 14, 1 },
		{ "Req_LnL_RxPwrState", 12, 2 },
		{ "Req_LnK_RxStateDone", 11, 1 },
		{ "Req_LnK_RxStateReq", 10, 1 },
		{ "Req_LnK_RxPwrState", 8, 2 },
		{ "Req_LnJ_RxStateDone", 7, 1 },
		{ "Req_LnJ_RxStateReq", 6, 1 },
		{ "Req_LnJ_RxPwrState", 4, 2 },
		{ "Req_LnI_RxStateDone", 3, 1 },
		{ "Req_LnI_RxStateReq", 2, 1 },
		{ "Req_LnI_RxPwrState", 0, 2 },
	{ "PCIE_PHY_CURRXPWR1", 0x5c20, 0 },
		{ "Cur_LnP_RxPwrState", 28, 3 },
		{ "Cur_LnO_RxPwrState", 24, 3 },
		{ "Cur_LnN_RxPwrState", 20, 3 },
		{ "Cur_LnM_RxPwrState", 16, 3 },
		{ "Cur_LnL_RxPwrState", 12, 3 },
		{ "Cur_LnK_RxPwrState", 8, 3 },
		{ "Cur_LnJ_RxPwrState", 4, 3 },
		{ "Cur_LnI_RxPwrState", 0, 3 },
	{ "PCIE_PHY_GEN3_AE2", 0x5c24, 0 },
		{ "LnL_STAT", 28, 3 },
		{ "LnL_CMD", 24, 3 },
		{ "LnK_STAT", 20, 3 },
		{ "LnK_CMD", 16, 3 },
		{ "LnJ_STAT", 12, 3 },
		{ "LnJ_CMD", 8, 3 },
		{ "LnI_STAT", 4, 3 },
		{ "LnI_CMD", 0, 3 },
	{ "PCIE_PHY_GEN3_AE3", 0x5c28, 0 },
		{ "LnP_STAT", 28, 3 },
		{ "LnP_CMD", 24, 3 },
		{ "LnO_STAT", 20, 3 },
		{ "LnO_CMD", 16, 3 },
		{ "LnN_STAT", 12, 3 },
		{ "LnN_CMD", 8, 3 },
		{ "LnM_STAT", 4, 3 },
		{ "LnM_CMD", 0, 3 },
	{ "PCIE_PHY_FS_LF4", 0x5c2c, 0 },
		{ "Lane9LF", 24, 6 },
		{ "Lane9FS", 16, 6 },
		{ "Lane8LF", 8, 6 },
		{ "Lane8FS", 0, 6 },
	{ "PCIE_PHY_FS_LF5", 0x5c30, 0 },
		{ "Lane11LF", 24, 6 },
		{ "Lane11FS", 16, 6 },
		{ "Lane10LF", 8, 6 },
		{ "Lane10FS", 0, 6 },
	{ "PCIE_PHY_FS_LF6", 0x5c34, 0 },
		{ "Lane13LF", 24, 6 },
		{ "Lane13FS", 16, 6 },
		{ "Lane12LF", 8, 6 },
		{ "Lane12FS", 0, 6 },
	{ "PCIE_PHY_FS_LF7", 0x5c38, 0 },
		{ "Lane15LF", 24, 6 },
		{ "Lane15FS", 16, 6 },
		{ "Lane14LF", 8, 6 },
		{ "Lane14FS", 0, 6 },
	{ "PCIE_MULTI_PHY_INDIR_REQ", 0x5c3c, 0 },
		{ "Phy_Reg_Enable", 31, 1 },
		{ "Phy_Reg_Select", 22, 2 },
		{ "Phy_Reg_RegAddr", 0, 16 },
	{ "PCIE_MULTI_PHY_INDIR_DATA", 0x5c40, 0 },
	{ "PCIE_VF_INT_INDIR_REQ", 0x5c44, 0 },
		{ "Enable", 24, 1 },
		{ "AI", 23, 1 },
		{ "VFID", 0, 10 },
	{ "PCIE_VF_INT_INDIR_DATA", 0x5c48, 0 },
		{ "VecNum", 12, 10 },
		{ "VecBase", 0, 12 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c4c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c50, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c54, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c58, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c5c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c60, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c64, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c68, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c6c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c70, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c74, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c78, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c7c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c80, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c84, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c88, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c8c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c90, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c94, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c98, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5c9c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ca0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ca4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ca8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cac, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cb0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cb4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cb8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cbc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cc0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cc4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cc8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ccc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cd0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cd4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cd8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cdc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ce0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ce4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ce8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cec, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cf0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cf4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cf8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5cfc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d00, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d04, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d08, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d0c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d10, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d14, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d18, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d1c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d20, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d24, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d28, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d2c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d30, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d34, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d38, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d3c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d40, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d44, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d48, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d4c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d50, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d54, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d58, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d5c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d60, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d64, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d68, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d6c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d70, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d74, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d78, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d7c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d80, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d84, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d88, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d8c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d90, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d94, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d98, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5d9c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5da0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5da4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5da8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dac, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5db0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5db4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5db8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dbc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dc0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dc4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dc8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dcc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dd0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dd4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dd8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5ddc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5de0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5de4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5de8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dec, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5df0, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5df4, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5df8, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5dfc, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e00, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e04, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e08, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e0c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e10, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e14, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e18, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e1c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e20, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e24, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e28, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e2c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e30, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e34, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e38, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e3c, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e40, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e44, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_256_INT_CFG2", 0x5e48, 0 },
		{ "SendFLRRsp", 31, 1 },
		{ "ImmFLRRsp", 24, 1 },
		{ "TxnDisable", 20, 1 },
	{ "PCIE_VF_MSI_EN_4", 0x5e50, 0 },
	{ "PCIE_VF_MSI_EN_5", 0x5e54, 0 },
	{ "PCIE_VF_MSI_EN_6", 0x5e58, 0 },
	{ "PCIE_VF_MSI_EN_7", 0x5e5c, 0 },
	{ "PCIE_VF_MSIX_EN_4", 0x5e60, 0 },
	{ "PCIE_VF_MSIX_EN_5", 0x5e64, 0 },
	{ "PCIE_VF_MSIX_EN_6", 0x5e68, 0 },
	{ "PCIE_VF_MSIX_EN_7", 0x5e6c, 0 },
	{ "PCIE_FLR_VF4_STATUS", 0x5e70, 0 },
	{ "PCIE_FLR_VF5_STATUS", 0x5e74, 0 },
	{ "PCIE_FLR_VF6_STATUS", 0x5e78, 0 },
	{ "PCIE_FLR_VF7_STATUS", 0x5e7c, 0 },
	{ "PCIE_BUS_MST_STAT_4", 0x5e80, 0 },
	{ "PCIE_BUS_MST_STAT_5", 0x5e84, 0 },
	{ "PCIE_BUS_MST_STAT_6", 0x5e88, 0 },
	{ "PCIE_BUS_MST_STAT_7", 0x5e8c, 0 },
	{ "PCIE_BUS_MST_STAT_8", 0x5e90, 0 },
	{ "PCIE_TGT_SKID_FIFO", 0x5e94, 0 },
		{ "HdrFreeCnt", 16, 12 },
		{ "DataFreeCnt", 0, 12 },
	{ "PCIE_RSP_ERR_STAT_4", 0x5ea0, 0 },
	{ "PCIE_RSP_ERR_STAT_5", 0x5ea4, 0 },
	{ "PCIE_RSP_ERR_STAT_6", 0x5ea8, 0 },
	{ "PCIE_RSP_ERR_STAT_7", 0x5eac, 0 },
	{ "PCIE_RSP_ERR_STAT_8", 0x5eb0, 0 },
	{ "PCIE_PHY_STAT1", 0x5ec0, 0 },
		{ "PHY0_RTune_Ack", 31, 1 },
		{ "PHY1_RTune_Ack", 30, 1 },
	{ "PCIE_PHY_CTRL1", 0x5ec4, 0 },
		{ "PHY0_RTune_Req", 31, 1 },
		{ "PHY1_RTune_Req", 30, 1 },
		{ "TxDeemph_gen1", 16, 8 },
		{ "TxDeemph_gen2_3p5db", 8, 8 },
		{ "TxDeemph_gen2_6db", 0, 8 },
	{ "PCIE_PCIE_SPARE0", 0x5ec8, 0 },
	{ "PCIE_RESET_STAT", 0x5ecc, 0 },
		{ "PON_RST_STATE_flag", 11, 1 },
		{ "BUS_RST_STATE_flag", 10, 1 },
		{ "DL_DOWN_PCIeCRST_MODE0_STATE_flag", 9, 1 },
		{ "DL_DOWN_PCIeCRST_MODE1_STATE_flag", 8, 1 },
		{ "PCIe_WARM_RST_MODE0_STATE_flag", 7, 1 },
		{ "PCIe_WARM_RST_MODE1_STATE_flag", 6, 1 },
		{ "PIO_WARM_RST_MODE0_STATE_flag", 5, 1 },
		{ "PIO_WARM_RST_MODE1_STATE_flag", 4, 1 },
		{ "LastResetState", 0, 3 },
	{ "PCIE_FUNC_DSTATE", 0x5ed0, 0 },
		{ "PF7_DState", 21, 3 },
		{ "PF6_DState", 18, 3 },
		{ "PF5_DState", 15, 3 },
		{ "PF4_DState", 12, 3 },
		{ "PF3_DState", 9, 3 },
		{ "PF2_DState", 6, 3 },
		{ "PF1_DState", 3, 3 },
		{ "PF0_DState", 0, 3 },
	{ "PCIE_DEBUG_ADDR_RANGE1", 0x5ee0, 0 },
	{ "PCIE_DEBUG_ADDR_RANGE2", 0x5ef0, 0 },
	{ "PCIE_DEBUG_ADDR_RANGE_CNT", 0x5f00, 0 },
	{ "PCIE_PHY_PGM_LOAD_CTRL", 0x5f04, 0 },
		{ "HSS_PMLD_ACC_EN", 31, 1 },
		{ "HSS_PmRdWr_Addr", 0, 18 },
	{ "PCIE_PHY_PGM_LOAD_DATA", 0x5f08, 0 },
	{ "PCIE_HSS_CFG", 0x5f0c, 0 },
		{ "HSS_PCS_AGGREGATION_MODE", 30, 2 },
		{ "HSS_PCS_FURCATE_MODE", 28, 2 },
		{ "HSS_PCS_PCLK_ON_IN_P2", 27, 1 },
		{ "HSS0_PHY_CTRL_REFCLK", 17, 5 },
		{ "HSS1_PHY_CTRL_REFCLK", 12, 5 },
		{ "HSS0_PHY_REXT_MASTER", 11, 1 },
		{ "HSS1_PHY_REXT_MASTER", 10, 1 },
		{ "HSS0_PHY_CTRL_VDDA_SEL", 9, 1 },
		{ "HSS0_PHY_CTRL_VDDHA_SEL", 8, 1 },
		{ "HSS1_PHY_CTRL_VDDA_SEL", 7, 1 },
		{ "HSS1_PHY_CTRL_VDDHA_SEL", 6, 1 },
		{ "HSS1_CPU_MEMPSACK", 5, 1 },
		{ "HSS1_CPU_MEMACK", 4, 1 },
		{ "HSS0_CPU_MEMPSACK", 3, 1 },
		{ "HSS0_CPU_MEMACK", 2, 1 },
		{ "HSS_PM_IS_ROM", 1, 1 },
	{ "PCIE_HSS_RST", 0x5f10, 0 },
		{ "HSS_RST_CTRL_BY_FW", 31, 1 },
		{ "HSS_PIPE0_RESET_N", 30, 1 },
		{ "HSS0_POR_N", 29, 1 },
		{ "HSS1_POR_N", 28, 1 },
		{ "HSS0_CPU_RESET", 27, 1 },
		{ "HSS1_CPU_RESET", 26, 1 },
		{ "HSS_PCS_POR_N", 25, 1 },
		{ "SW_CRst_", 24, 1 },
		{ "SW_PCIeCRst_", 23, 1 },
		{ "SW_PCIePipeRst_", 22, 1 },
		{ "SW_PCIePhyRst_", 21, 1 },
		{ "HSS1_ERR_O", 3, 1 },
		{ "HSS0_ERR_O", 2, 1 },
		{ "HSS1_PLL_LOCK", 1, 1 },
		{ "HSS0_PLL_LOCK", 0, 1 },
	{ "PCIE_ARM_CFG", 0x5f20, 0 },
		{ "MaxPyldSize", 28, 3 },
		{ "MaxReqCnt", 20, 7 },
		{ "MaxRdReqSize", 17, 3 },
		{ "MaxRspCnt", 9, 8 },
		{ "SeqChkDis", 8, 1 },
		{ "MinTag", 0, 8 },
	{ "PCIE_ARM_STAT", 0x5f24, 0 },
		{ "RspCnt", 20, 9 },
		{ "RdReqCnt", 12, 6 },
		{ "WrReqCnt", 0, 9 },
	{ "PCIE_ARM_STAT2", 0x5f28, 0 },
		{ "CookieCnt", 24, 4 },
		{ "RdSeqNumUpdCnt", 20, 4 },
		{ "SIReqCnt", 16, 4 },
		{ "WrEOPMatchSOP", 12, 1 },
		{ "WrSOPCnt", 8, 4 },
		{ "RdSOPCnt", 0, 8 },
	{ "PCIE_ARM_STAT3", 0x5f2c, 0 },
		{ "AtmReqSOPCnt", 24, 8 },
		{ "AtmEOPMatchSOP", 17, 1 },
		{ "RspEOPMatchSOP", 16, 1 },
		{ "RspErrCnt", 8, 8 },
		{ "RspSOPCnt", 0, 8 },
	{ "PCIE_ARM_REQUESTER_ID", 0x5f30, 0 },
		{ "PrimBusnumber", 16, 8 },
		{ "RequesterId", 0, 16 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ0", 0x5f34, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 19, 1 },
		{ "ByteEnable", 15, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA0", 0x5f38, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ1", 0x5f3c, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA1", 0x5f40, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ2", 0x5f44, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA2", 0x5f48, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ3", 0x5f4c, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA3", 0x5f50, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ4", 0x5f54, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA4", 0x5f58, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ5", 0x5f5c, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA5", 0x5f60, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ6", 0x5f64, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA6", 0x5f68, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ7", 0x5f6c, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA7", 0x5f70, 0 },
	{ "PCIE_SWITCH_CFG_SPACE_REQ8", 0x5f74, 0 },
		{ "ReqEnable", 31, 1 },
		{ "RdReqType", 30, 1 },
		{ "ByteEnable", 26, 4 },
		{ "RegAddr", 0, 15 },
	{ "PCIE_SWITCH_CFG_SPACE_DATA8", 0x5f78, 0 },
	{ "PCIE_SNPS_G5_PHY_CR_REQ", 0x5f7c, 0 },
		{ "RegSel", 31, 1 },
		{ "RdEnable", 30, 1 },
		{ "WrEnable", 29, 1 },
		{ "AutoIncrVal", 21, 2 },
		{ "AutoIncr", 20, 1 },
		{ "PhySel", 16, 4 },
		{ "RegAddr", 0, 16 },
	{ "PCIE_SNPS_G5_PHY_CR_DATA", 0x5f80, 0 },
	{ "PCIE_SNPS_G5_PHY_SRAM_CFG", 0x5f84, 0 },
		{ "phy3_sram_bootload_bypass", 27, 1 },
		{ "phy3_sram_bypass", 26, 1 },
		{ "phy3_sram_ecc_en", 25, 1 },
		{ "phy3_sram_ext_ld_done", 24, 1 },
		{ "phy2_sram_bootload_bypass", 19, 1 },
		{ "phy2_sram_bypass", 18, 1 },
		{ "phy2_sram_ecc_en", 17, 1 },
		{ "phy2_sram_ext_ld_done", 16, 1 },
		{ "phy1_sram_bootload_bypass", 11, 1 },
		{ "phy1_sram_bypass", 10, 1 },
		{ "phy1_sram_ecc_en", 9, 1 },
		{ "phy1_sram_ext_ld_done", 8, 1 },
		{ "phy_cr_para_sel", 4, 4 },
		{ "phy0_sram_bootload_bypass", 3, 1 },
		{ "phy0_sram_bypass", 2, 1 },
		{ "phy0_sram_ecc_en", 1, 1 },
		{ "phy0_sram_ext_ld_done", 0, 1 },
	{ "PCIE_SNPS_G5_PHY_SRAM_STS", 0x5f88, 0 },
		{ "phy3_sram_init_done", 3, 1 },
		{ "phy2_sram_init_done", 2, 1 },
		{ "phy1_sram_init_done", 1, 1 },
		{ "phy0_sram_init_done", 0, 1 },
	{ "PCIE_SNPS_G5_PHY_CTRL_PHY_0_TO_3", 0x5f90, 0 },
	{ "PCIE_SNPS_G5_PHY_CTRL_PHY_0_DATA", 0x5f94, 0 },
	{ "PCIE_SNPS_G5_PHY_CTRL_PHY_1_DATA", 0x5f98, 0 },
	{ "PCIE_SNPS_G5_PHY_CTRL_PHY_2_DATA", 0x5f9c, 0 },
	{ "PCIE_SNPS_G5_PHY_CTRL_PHY_3_DATA", 0x5fa0, 0 },
	{ "PCIE_SNPS_G5_PHY_DEFAULTS", 0x5fa4, 0 },
	{ "PCIE_SNPS_G5_PHY_0_VALUES", 0x5fa8, 0 },
		{ "rx_term_offset", 28, 1 },
		{ "refb_raw_clk_div2_en", 27, 1 },
		{ "refb_range", 23, 4 },
		{ "refb_lane_clk_en", 22, 1 },
		{ "refb_clk_div2_en", 21, 1 },
		{ "refa_raw_clk_div2_en", 20, 1 },
		{ "refa_range", 16, 4 },
		{ "refa_lane_clk_en", 15, 1 },
		{ "refa_clk_div2_en", 14, 1 },
		{ "nominal_vph_sel", 10, 2 },
		{ "nominal_vp_sel", 8, 2 },
		{ "mpllb_word_clk_en", 7, 1 },
		{ "mpllb_ssc_en", 6, 1 },
		{ "mpllb_short_lock_en", 5, 1 },
		{ "mpllb_force_en", 4, 1 },
		{ "mplla_word_clk_en", 3, 1 },
		{ "mplla_ssc_en", 2, 1 },
		{ "mplla_short_lock_en", 1, 1 },
		{ "mplla_force_en", 0, 1 },
	{ "PCIE_SNPS_G5_PHY_1_VALUES", 0x5fac, 0 },
		{ "rx_term_offset", 28, 1 },
		{ "refb_raw_clk_div2_en", 27, 1 },
		{ "refb_range", 23, 4 },
		{ "refb_lane_clk_en", 22, 1 },
		{ "refb_clk_div2_en", 21, 1 },
		{ "refa_raw_clk_div2_en", 20, 1 },
		{ "refa_range", 16, 4 },
		{ "refa_lane_clk_en", 15, 1 },
		{ "refa_clk_div2_en", 14, 1 },
		{ "ref_alt1_clk_m", 13, 1 },
		{ "ref_alt1_clk_p", 12, 1 },
		{ "nominal_vph_sel", 10, 2 },
		{ "nominal_vp_sel", 8, 2 },
		{ "mpllb_word_clk_en", 7, 1 },
		{ "mpllb_ssc_en", 6, 1 },
		{ "mpllb_short_lock_en", 5, 1 },
		{ "mpllb_force_en", 4, 1 },
		{ "mplla_word_clk_en", 3, 1 },
		{ "mplla_ssc_en", 2, 1 },
		{ "mplla_short_lock_en", 1, 1 },
		{ "mplla_force_en", 0, 1 },
	{ "PCIE_SNPS_G5_PHY_2_VALUES", 0x5fb0, 0 },
		{ "rx_term_offset", 28, 1 },
		{ "refb_raw_clk_div2_en", 27, 1 },
		{ "refb_range", 23, 4 },
		{ "refb_lane_clk_en", 22, 1 },
		{ "refb_clk_div2_en", 21, 1 },
		{ "refa_raw_clk_div2_en", 20, 1 },
		{ "refa_range", 16, 4 },
		{ "refa_lane_clk_en", 15, 1 },
		{ "refa_clk_div2_en", 14, 1 },
		{ "ref_alt1_clk_m", 13, 1 },
		{ "ref_alt1_clk_p", 12, 1 },
		{ "nominal_vph_sel", 10, 2 },
		{ "nominal_vp_sel", 8, 2 },
		{ "mpllb_word_clk_en", 7, 1 },
		{ "mpllb_ssc_en", 6, 1 },
		{ "mpllb_short_lock_en", 5, 1 },
		{ "mpllb_force_en", 4, 1 },
		{ "mplla_word_clk_en", 3, 1 },
		{ "mplla_ssc_en", 2, 1 },
		{ "mplla_short_lock_en", 1, 1 },
		{ "mplla_force_en", 0, 1 },
	{ "PCIE_SNPS_G5_PHY_3_VALUES", 0x5fb4, 0 },
		{ "rx_term_offset", 28, 1 },
		{ "refb_raw_clk_div2_en", 27, 1 },
		{ "refb_range", 23, 4 },
		{ "refb_lane_clk_en", 22, 1 },
		{ "refb_clk_div2_en", 21, 1 },
		{ "refa_raw_clk_div2_en", 20, 1 },
		{ "refa_range", 16, 4 },
		{ "refa_lane_clk_en", 15, 1 },
		{ "refa_clk_div2_en", 14, 1 },
		{ "ref_alt1_clk_m", 13, 1 },
		{ "ref_alt1_clk_p", 12, 1 },
		{ "nominal_vph_sel", 10, 2 },
		{ "nominal_vp_sel", 8, 2 },
		{ "mpllb_word_clk_en", 7, 1 },
		{ "mpllb_ssc_en", 6, 1 },
		{ "mpllb_short_lock_en", 5, 1 },
		{ "mpllb_force_en", 4, 1 },
		{ "mplla_word_clk_en", 3, 1 },
		{ "mplla_ssc_en", 2, 1 },
		{ "mplla_short_lock_en", 1, 1 },
		{ "mplla_force_en", 0, 1 },
	{ "PCIE_SNPS_G5_PHY_0_RX_LANEPLL_BYPASS_MODE", 0x5fb8, 0 },
		{ "lane3", 15, 5 },
		{ "lane2", 10, 5 },
		{ "lane1", 5, 5 },
		{ "lane0", 0, 5 },
	{ "PCIE_SNPS_G5_PHY_1_RX_LANEPLL_BYPASS_MODE", 0x5fbc, 0 },
		{ "lane3", 15, 5 },
		{ "lane2", 10, 5 },
		{ "lane1", 5, 5 },
		{ "lane0", 0, 5 },
	{ "PCIE_SNPS_G5_PHY_2_RX_LANEPLL_BYPASS_MODE", 0x5fc0, 0 },
		{ "lane3", 15, 5 },
		{ "lane2", 10, 5 },
		{ "lane1", 5, 5 },
		{ "lane0", 0, 5 },
	{ "PCIE_SNPS_G5_PHY_3_RX_LANEPLL_BYPASS_MODE", 0x5fc4, 0 },
		{ "lane3", 15, 5 },
		{ "lane2", 10, 5 },
		{ "lane1", 5, 5 },
		{ "lane0", 0, 5 },
	{ "PCIE_SNPS_G5_PHY_0_1_RX_LANEPLL_SRC_SEL", 0x5fc8, 0 },
		{ "lane7_lanepll_src_sel", 28, 4 },
		{ "lane6_lanepll_src_sel", 24, 4 },
		{ "lane5_lanepll_src_sel", 20, 4 },
		{ "lane4_lanepll_src_sel", 16, 4 },
		{ "lane3_lanepll_src_sel", 12, 4 },
		{ "lane2_lanepll_src_sel", 8, 4 },
		{ "lane1_lanepll_src_sel", 4, 4 },
		{ "lane0_lanepll_src_sel", 0, 4 },
	{ "PCIE_SNPS_G5_PHY_2_3_RX_LANEPLL_SRC_SEL", 0x5fcc, 0 },
		{ "lane7_lanepll_src_sel", 28, 4 },
		{ "lane6_lanepll_src_sel", 24, 4 },
		{ "lane5_lanepll_src_sel", 20, 4 },
		{ "lane4_lanepll_src_sel", 16, 4 },
		{ "lane3_lanepll_src_sel", 12, 4 },
		{ "lane2_lanepll_src_sel", 8, 4 },
		{ "lane1_lanepll_src_sel", 4, 4 },
		{ "lane0_lanepll_src_sel", 0, 4 },
	{ "PCIE_SNPS_G5_PHY_RX_DECERR", 0x5fd0, 0 },
		{ "lane15_rec_ovrd_8b10b_decerr", 30, 2 },
		{ "lane14_rec_ovrd_8b10b_decerr", 28, 2 },
		{ "lane13_rec_ovrd_8b10b_decerr", 26, 2 },
		{ "lane12_rec_ovrd_8b10b_decerr", 24, 2 },
		{ "lane11_rec_ovrd_8b10b_decerr", 22, 2 },
		{ "lane10_rec_ovrd_8b10b_decerr", 20, 2 },
		{ "lane9_rec_ovrd_8b10b_decerr", 18, 2 },
		{ "lane8_rec_ovrd_8b10b_decerr", 16, 2 },
		{ "lane7_rec_ovrd_8b10b_decerr", 14, 2 },
		{ "lane6_rec_ovrd_8b10b_decerr", 12, 2 },
		{ "lane5_rec_ovrd_8b10b_decerr", 10, 2 },
		{ "lane4_rec_ovrd_8b10b_decerr", 8, 2 },
		{ "lane3_rec_ovrd_8b10b_decerr", 6, 2 },
		{ "lane2_rec_ovrd_8b10b_decerr", 4, 2 },
		{ "lane1_rec_ovrd_8b10b_decerr", 2, 2 },
		{ "lane0_rec_ovrd_8b10b_decerr", 0, 2 },
	{ "PCIE_SNPS_G5_PHY_TX2RX_LOOPBK_REC_OVRD_EN", 0x5fd4, 0 },
		{ "lane15_rec_ovrd_en", 31, 1 },
		{ "lane14_rec_ovrd_en", 30, 1 },
		{ "lane13_rec_ovrd_en", 29, 1 },
		{ "lane12_rec_ovrd_en", 28, 1 },
		{ "lane11_rec_ovrd_en", 27, 1 },
		{ "lane10_rec_ovrd_en", 26, 1 },
		{ "lane9_rec_ovrd_en", 25, 1 },
		{ "lane8_rec_ovrd_en", 24, 1 },
		{ "lane7_rec_ovrd_en", 23, 1 },
		{ "lane6_rec_ovrd_en", 22, 1 },
		{ "lane5_rec_ovrd_en", 21, 1 },
		{ "lane4_rec_ovrd_en", 20, 1 },
		{ "lane3_rec_ovrd_en", 19, 1 },
		{ "lane2_rec_ovrd_en", 18, 1 },
		{ "lane1_rec_ovrd_en", 17, 1 },
		{ "lane0_rec_ovrd_en", 16, 1 },
		{ "lane15_tx2rx_loopbk", 15, 1 },
		{ "lane14_tx2rx_loopbk", 14, 1 },
		{ "lane13_tx2rx_loopbk", 13, 1 },
		{ "lane12_tx2rx_loopbk", 12, 1 },
		{ "lane11_tx2rx_loopbk", 11, 1 },
		{ "lane10_tx2rx_loopbk", 10, 1 },
		{ "lane9_tx2rx_loopbk", 9, 1 },
		{ "lane8_tx2rx_loopbk", 8, 1 },
		{ "lane7_tx2rx_loopbk", 7, 1 },
		{ "lane6_tx2rx_loopbk", 6, 1 },
		{ "lane5_tx2rx_loopbk", 5, 1 },
		{ "lane4_tx2rx_loopbk", 4, 1 },
		{ "lane3_tx2rx_loopbk", 3, 1 },
		{ "lane2_tx2rx_loopbk", 2, 1 },
		{ "lane1_tx2rx_loopbk", 1, 1 },
		{ "lane0_tx2rx_loopbk", 0, 1 },
	{ "PCIE_PHY_TX_DISABLE_UPCS_PIPE_CONFIG", 0x5fd8, 0 },
		{ "upcs_pipe_config", 16, 16 },
		{ "tx15_disable", 15, 1 },
		{ "tx14_disable", 14, 1 },
		{ "tx13_disable", 13, 1 },
		{ "tx12_disable", 12, 1 },
		{ "tx11_disable", 11, 1 },
		{ "tx10_disable", 10, 1 },
		{ "tx9_disable", 9, 1 },
		{ "tx8_disable", 8, 1 },
		{ "tx7_disable", 7, 1 },
		{ "tx6_disable", 6, 1 },
		{ "tx5_disable", 5, 1 },
		{ "tx4_disable", 4, 1 },
		{ "tx3_disable", 3, 1 },
		{ "tx2_disable", 2, 1 },
		{ "tx1_disable", 1, 1 },
		{ "tx0_disable", 0, 1 },
	{ "PCIE_PIPE_LANE0_REG0", 0x5500, 0 },
	{ "PCIE_PIPE_LANE0_REG1", 0x5504, 0 },
	{ "PCIE_PIPE_LANE0_REG2", 0x5508, 0 },
	{ "PCIE_PIPE_LANE0_REG3", 0x550c, 0 },
	{ "PCIE_PIPE_LANE1_REG0", 0x5510, 0 },
	{ "PCIE_PIPE_LANE1_REG1", 0x5514, 0 },
	{ "PCIE_PIPE_LANE1_REG2", 0x5518, 0 },
	{ "PCIE_PIPE_LANE1_REG3", 0x551c, 0 },
	{ "PCIE_PIPE_LANE2_REG0", 0x5520, 0 },
	{ "PCIE_PIPE_LANE2_REG1", 0x5524, 0 },
	{ "PCIE_PIPE_LANE2_REG2", 0x5528, 0 },
	{ "PCIE_PIPE_LANE2_REG3", 0x552c, 0 },
	{ "PCIE_PIPE_LANE3_REG0", 0x5530, 0 },
	{ "PCIE_PIPE_LANE3_REG1", 0x5534, 0 },
	{ "PCIE_PIPE_LANE3_REG2", 0x5538, 0 },
	{ "PCIE_PIPE_LANE3_REG3", 0x553c, 0 },
	{ "PCIE_PIPE_LANE4_REG0", 0x5540, 0 },
	{ "PCIE_PIPE_LANE4_REG1", 0x5544, 0 },
	{ "PCIE_PIPE_LANE4_REG2", 0x5548, 0 },
	{ "PCIE_PIPE_LANE4_REG3", 0x554c, 0 },
	{ "PCIE_PIPE_LANE5_REG0", 0x5550, 0 },
	{ "PCIE_PIPE_LANE5_REG1", 0x5554, 0 },
	{ "PCIE_PIPE_LANE5_REG2", 0x5558, 0 },
	{ "PCIE_PIPE_LANE5_REG3", 0x555c, 0 },
	{ "PCIE_PIPE_LANE6_REG0", 0x5560, 0 },
	{ "PCIE_PIPE_LANE6_REG1", 0x5564, 0 },
	{ "PCIE_PIPE_LANE6_REG2", 0x5568, 0 },
	{ "PCIE_PIPE_LANE6_REG3", 0x556c, 0 },
	{ "PCIE_PIPE_LANE7_REG0", 0x5570, 0 },
	{ "PCIE_PIPE_LANE7_REG1", 0x5574, 0 },
	{ "PCIE_PIPE_LANE7_REG2", 0x5578, 0 },
	{ "PCIE_PIPE_LANE7_REG3", 0x557c, 0 },
	{ "PCIE_PIPE_LANE8_REG0", 0x5580, 0 },
	{ "PCIE_PIPE_LANE8_REG1", 0x5584, 0 },
	{ "PCIE_PIPE_LANE8_REG2", 0x5588, 0 },
	{ "PCIE_PIPE_LANE8_REG3", 0x558c, 0 },
	{ "PCIE_PIPE_LANE9_REG0", 0x5590, 0 },
	{ "PCIE_PIPE_LANE9_REG1", 0x5594, 0 },
	{ "PCIE_PIPE_LANE9_REG2", 0x5598, 0 },
	{ "PCIE_PIPE_LANE9_REG3", 0x559c, 0 },
	{ "PCIE_PIPE_LANE10_REG0", 0x55a0, 0 },
	{ "PCIE_PIPE_LANE10_REG1", 0x55a4, 0 },
	{ "PCIE_PIPE_LANE10_REG2", 0x55a8, 0 },
	{ "PCIE_PIPE_LANE10_REG3", 0x55ac, 0 },
	{ "PCIE_PIPE_LANE11_REG0", 0x55b0, 0 },
	{ "PCIE_PIPE_LANE11_REG1", 0x55b4, 0 },
	{ "PCIE_PIPE_LANE11_REG2", 0x55b8, 0 },
	{ "PCIE_PIPE_LANE11_REG3", 0x55bc, 0 },
	{ "PCIE_PIPE_LANE12_REG0", 0x55c0, 0 },
	{ "PCIE_PIPE_LANE12_REG1", 0x55c4, 0 },
	{ "PCIE_PIPE_LANE12_REG2", 0x55c8, 0 },
	{ "PCIE_PIPE_LANE12_REG3", 0x55cc, 0 },
	{ "PCIE_PIPE_LANE13_REG0", 0x55d0, 0 },
	{ "PCIE_PIPE_LANE13_REG1", 0x55d4, 0 },
	{ "PCIE_PIPE_LANE13_REG2", 0x55d8, 0 },
	{ "PCIE_PIPE_LANE13_REG3", 0x55dc, 0 },
	{ "PCIE_PIPE_LANE14_REG0", 0x55e0, 0 },
	{ "PCIE_PIPE_LANE14_REG1", 0x55e4, 0 },
	{ "PCIE_PIPE_LANE14_REG2", 0x55e8, 0 },
	{ "PCIE_PIPE_LANE14_REG3", 0x55ec, 0 },
	{ "PCIE_PIPE_LANE15_REG0", 0x55f0, 0 },
	{ "PCIE_PIPE_LANE15_REG1", 0x55f4, 0 },
	{ "PCIE_PIPE_LANE15_REG2", 0x55f8, 0 },
	{ "PCIE_PIPE_LANE15_REG3", 0x55fc, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3600, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3604, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3608, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x360c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3610, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3614, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3618, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x361c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3620, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3624, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3628, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x362c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3630, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3634, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3638, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x363c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3640, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3644, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3648, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x364c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3650, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3654, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3658, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x365c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3660, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3664, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3668, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x366c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3670, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3674, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3678, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x367c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3680, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3684, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3688, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x368c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x3690, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x3694, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x3698, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x369c, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36a0, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36a4, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x36a8, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x36ac, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36b0, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36b4, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x36b8, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x36bc, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36c0, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36c4, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x36c8, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x36cc, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36d0, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36d4, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x36d8, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x36dc, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36e0, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36e4, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x36e8, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x36ec, 0 },
	{ "PCIE_JBOF_NVME_HIGH_DW_START_ADDR", 0x36f0, 0 },
	{ "PCIE_JBOF_NVME_LOW_DW_START_ADDR", 0x36f4, 0 },
	{ "PCIE_JBOF_NVME_LENGTH", 0x36f8, 0 },
		{ "NVMeDisable", 31, 1 },
		{ "NVMeLength", 0, 30 },
	{ "PCIE_JBOF_NVME_GROUP", 0x36fc, 0 },
	{ "PCIE_PTM_EP_EXT_STROBE", 0x3804, 0 },
		{ "ptm_auto_update", 1, 1 },
		{ "ptm_ext_strobe", 0, 1 },
	{ "PCIE_PTM_EP_EXT_TIME0", 0x3808, 0 },
	{ "PCIE_PTM_EP_EXT_TIME1", 0x380c, 0 },
	{ "PCIE_PTM_MAN_UPD_PULSE", 0x3810, 0 },
	{ "PCIE_SWAP_DATA_B2L_X16", 0x3814, 0 },
		{ "cfgrd_swap_en", 1, 1 },
		{ "cfgwr_swap_en", 0, 1 },
	{ "PCIE_PCIE_RC_RST", 0x3818, 0 },
	{ "PCIE_PCIE_LN_CLKSEL", 0x3880, 0 },
		{ "ds8_sel", 30, 2 },
		{ "ds7_sel", 28, 2 },
		{ "ds6_sel", 26, 2 },
		{ "ds5_sel", 24, 2 },
		{ "ds4_sel", 22, 2 },
		{ "ds3_sel", 20, 2 },
		{ "ds2_sel", 18, 2 },
		{ "ds1_sel", 16, 2 },
		{ "ln14_sel", 14, 2 },
		{ "ln12_sel", 12, 2 },
		{ "ln10_sel", 10, 2 },
		{ "ln8_sel", 8, 2 },
		{ "ln6_sel", 6, 2 },
		{ "ln4_sel", 4, 2 },
		{ "ln2_sel", 2, 2 },
		{ "ln0_sel", 0, 2 },
	{ "PCIE_PCIE_MSIX_EN", 0x3884, 0 },
	{ "PCIE_LFSR_WRCTRL", 0x3888, 0 },
		{ "wr_lfsr_cmp_data", 16, 16 },
		{ "wr_lfsr_rsvd", 2, 14 },
		{ "wr_lfsr_en", 1, 1 },
		{ "wr_lfsr_start", 0, 1 },
	{ "PCIE_LFSR_RDCTRL", 0x388c, 0 },
		{ "cmd_lfsr_cmp_data", 24, 8 },
		{ "rd_lfsr_cmd_data", 16, 8 },
		{ "rd_lfsr_rsvd", 10, 6 },
		{ "rd3_lfsr_en", 9, 1 },
		{ "rd3_lfsr_start", 8, 1 },
		{ "rd2_lfsr_en", 7, 1 },
		{ "rd2_lfsr_start", 6, 1 },
		{ "rd1_lfsr_en", 5, 1 },
		{ "rd1_lfsr_start", 4, 1 },
		{ "rd0_lfsr_en", 3, 1 },
		{ "rd0_lfsr_start", 2, 1 },
		{ "cmd_lfsr_en", 1, 1 },
		{ "cmd_lfsr_start", 0, 1 },
	{ "PCIE_EMU_ADDR", 0x3900, 0 },
	{ "PCIE_EMU_CFG", 0x3904, 0 },
		{ "EmuEnable", 16, 1 },
		{ "EmuType", 14, 2 },
		{ "BAR0Target", 12, 2 },
		{ "BAR2Target", 10, 2 },
		{ "BAR4Target", 8, 2 },
		{ "ReleativeEmuID", 0, 8 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET0_BAR0", 0x3910, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG0_BAR0", 0x3914, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET1_BAR0", 0x3918, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG1_BAR0", 0x391c, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET2_BAR0", 0x3920, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG2_BAR0", 0x3924, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET3_BAR0", 0x3928, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG3_BAR0", 0x392c, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET0_BAR0", 0x3930, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG0_BAR0", 0x3934, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET1_BAR0", 0x3938, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG1_BAR0", 0x393c, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET2_BAR0", 0x3940, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG2_BAR0", 0x3944, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET3_BAR0", 0x3948, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG3_BAR0", 0x394c, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET0_BAR0", 0x3950, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG0_BAR0", 0x3954, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET1_BAR0", 0x3958, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG1_BAR0", 0x395c, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET2_BAR0", 0x3960, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG2_BAR0", 0x3964, 0 },
	{ "PCIE_EMUADRRMAP_MEM_OFFSET3_BAR0", 0x3968, 0 },
	{ "PCIE_EMUADRRMAP_MEM_CFG3_BAR0", 0x396c, 0 },
	{ "PCIE_TCAM_DATA", 0x3970, 0 },
	{ "PCIE_TCAM_CTL", 0x3974, 0 },
		{ "TcamAddr", 8, 10 },
		{ "CamEn", 0, 1 },
	{ "PCIE_TCAM_DBG", 0x3978, 0 },
		{ "CbPass", 24, 1 },
		{ "CbBusy", 20, 1 },
		{ "CbStart", 17, 1 },
		{ "RstCb", 16, 1 },
		{ "tcam_dbg_data", 0, 16 },
	{ "PCIE_TEST_CTRL0", 0x3980, 0 },
	{ "PCIE_TEST_CTRL1", 0x3984, 0 },
	{ "PCIE_TEST_CTRL2", 0x3988, 0 },
	{ "PCIE_TEST_CTRL3", 0x398c, 0 },
	{ "PCIE_TEST_STS0", 0x3990, 0 },
	{ "PCIE_TEST_STS1", 0x3994, 0 },
	{ "PCIE_TEST_STS2", 0x3998, 0 },
	{ "PCIE_TEST_STS3", 0x399c, 0 },
	{ NULL }
};

struct reg_info t7_dbg_regs[] = {
	{ "DBG_DBG0_CFG", 0x6000, 0 },
		{ "ModuleSelect", 12, 8 },
		{ "RegSelect", 4, 8 },
		{ "ClkSelect", 0, 4 },
	{ "DBG_DBG0_EN", 0x6004, 0 },
		{ "SDRHalfWord0", 8, 1 },
		{ "DDREn", 4, 1 },
		{ "PortEn", 0, 1 },
	{ "DBG_DBG1_CFG", 0x6008, 0 },
		{ "ModuleSelect", 12, 8 },
		{ "RegSelect", 4, 8 },
		{ "ClkSelect", 0, 4 },
	{ "DBG_DBG1_EN", 0x600c, 0 },
		{ "Clk_en_on_dbg1", 20, 1 },
		{ "SDRHalfWord0", 8, 1 },
		{ "DDREn", 4, 1 },
		{ "PortEn", 0, 1 },
	{ "DBG_GPIO_OUT", 0x6010, 0 },
		{ "GPIO23_Out_Val", 23, 1 },
		{ "GPIO22_Out_Val", 22, 1 },
		{ "GPIO21_Out_Val", 21, 1 },
		{ "GPIO20_Out_Val", 20, 1 },
		{ "GPIO19_Out_Val", 19, 1 },
		{ "GPIO18_Out_Val", 18, 1 },
		{ "GPIO17_Out_Val", 17, 1 },
		{ "GPIO16_Out_Val", 16, 1 },
		{ "GPIO15_Out_Val", 15, 1 },
		{ "GPIO14_Out_Val", 14, 1 },
		{ "GPIO13_Out_Val", 13, 1 },
		{ "GPIO12_Out_Val", 12, 1 },
		{ "GPIO11_Out_Val", 11, 1 },
		{ "GPIO10_Out_Val", 10, 1 },
		{ "GPIO9_Out_Val", 9, 1 },
		{ "GPIO8_Out_Val", 8, 1 },
		{ "GPIO7_Out_Val", 7, 1 },
		{ "GPIO6_Out_Val", 6, 1 },
		{ "GPIO5_Out_Val", 5, 1 },
		{ "GPIO4_Out_Val", 4, 1 },
		{ "GPIO3_Out_Val", 3, 1 },
		{ "GPIO2_Out_Val", 2, 1 },
		{ "GPIO1_Out_Val", 1, 1 },
		{ "GPIO0_Out_Val", 0, 1 },
	{ "DBG_GPIO_IN", 0x6014, 0 },
		{ "GPIO23_IN", 23, 1 },
		{ "GPIO22_IN", 22, 1 },
		{ "GPIO21_IN", 21, 1 },
		{ "GPIO20_IN", 20, 1 },
		{ "GPIO19_IN", 19, 1 },
		{ "GPIO18_IN", 18, 1 },
		{ "GPIO17_IN", 17, 1 },
		{ "GPIO16_IN", 16, 1 },
		{ "GPIO15_IN", 15, 1 },
		{ "GPIO14_IN", 14, 1 },
		{ "GPIO13_IN", 13, 1 },
		{ "GPIO12_IN", 12, 1 },
		{ "GPIO11_IN", 11, 1 },
		{ "GPIO10_IN", 10, 1 },
		{ "GPIO9_IN", 9, 1 },
		{ "GPIO8_IN", 8, 1 },
		{ "GPIO7_IN", 7, 1 },
		{ "GPIO6_IN", 6, 1 },
		{ "GPIO5_IN", 5, 1 },
		{ "GPIO4_IN", 4, 1 },
		{ "GPIO3_IN", 3, 1 },
		{ "GPIO2_IN", 2, 1 },
		{ "GPIO1_IN", 1, 1 },
		{ "GPIO0_IN", 0, 1 },
	{ "DBG_GPIO_OEN", 0x6100, 0 },
		{ "GPIO23_OEn", 23, 1 },
		{ "GPIO22_OEn", 22, 1 },
		{ "GPIO21_OEn", 21, 1 },
		{ "GPIO20_OEn", 20, 1 },
		{ "GPIO19_OEn", 19, 1 },
		{ "GPIO18_OEn", 18, 1 },
		{ "GPIO17_OEn", 17, 1 },
		{ "GPIO16_OEn", 16, 1 },
		{ "GPIO15_OEn", 15, 1 },
		{ "GPIO14_OEn", 14, 1 },
		{ "GPIO13_OEn", 13, 1 },
		{ "GPIO12_OEn", 12, 1 },
		{ "GPIO11_OEn", 11, 1 },
		{ "GPIO10_OEn", 10, 1 },
		{ "GPIO9_OEn", 9, 1 },
		{ "GPIO8_OEn", 8, 1 },
		{ "GPIO7_OEn", 7, 1 },
		{ "GPIO6_OEn", 6, 1 },
		{ "GPIO5_OEn", 5, 1 },
		{ "GPIO4_OEn", 4, 1 },
		{ "GPIO3_OEn", 3, 1 },
		{ "GPIO2_OEn", 2, 1 },
		{ "GPIO1_OEn", 1, 1 },
		{ "GPIO0_OEn", 0, 1 },
	{ "DBG_GPIO_CHG_DET", 0x6104, 0 },
		{ "GPIO23_CHG_DET", 23, 1 },
		{ "GPIO22_CHG_DET", 22, 1 },
		{ "GPIO21_CHG_DET", 21, 1 },
		{ "GPIO20_CHG_DET", 20, 1 },
		{ "GPIO19_CHG_DET", 19, 1 },
		{ "GPIO18_CHG_DET", 18, 1 },
		{ "GPIO17_CHG_DET", 17, 1 },
		{ "GPIO16_CHG_DET", 16, 1 },
		{ "GPIO15_CHG_DET", 15, 1 },
		{ "GPIO14_CHG_DET", 14, 1 },
		{ "GPIO13_CHG_DET", 13, 1 },
		{ "GPIO12_CHG_DET", 12, 1 },
		{ "GPIO11_CHG_DET", 11, 1 },
		{ "GPIO10_CHG_DET", 10, 1 },
		{ "GPIO9_CHG_DET", 9, 1 },
		{ "GPIO8_CHG_DET", 8, 1 },
		{ "GPIO7_CHG_DET", 7, 1 },
		{ "GPIO6_CHG_DET", 6, 1 },
		{ "GPIO5_CHG_DET", 5, 1 },
		{ "GPIO4_CHG_DET", 4, 1 },
		{ "GPIO3_CHG_DET", 3, 1 },
		{ "GPIO2_CHG_DET", 2, 1 },
		{ "GPIO1_CHG_DET", 1, 1 },
		{ "GPIO0_CHG_DET", 0, 1 },
	{ "DBG_INT_ENABLE", 0x6018, 0 },
		{ "USBFifoParErr", 12, 1 },
		{ "IBM_FDL_FAIL_int_enbl", 11, 1 },
		{ "pll_lock_lost_int_enbl", 10, 1 },
		{ "M1_LOCK", 9, 1 },
		{ "PCIE_LOCK", 8, 1 },
		{ "U_LOCK", 7, 1 },
		{ "MAC_LOCK", 6, 1 },
		{ "ARM_LOCK", 5, 1 },
		{ "M0_LOCK", 4, 1 },
		{ "XGPBUS_LOCK", 3, 1 },
		{ "XGPHY_LOCK", 2, 1 },
		{ "USB_LOCK", 1, 1 },
		{ "C_LOCK", 0, 1 },
	{ "DBG_INT_CAUSE", 0x601c, 0 },
		{ "USBFifoParErr", 12, 1 },
		{ "IBM_FDL_FAIL_int_cause", 11, 1 },
		{ "pll_lock_lost_int_cause", 10, 1 },
		{ "M1_LOCK", 9, 1 },
		{ "PCIE_LOCK", 8, 1 },
		{ "U_LOCK", 7, 1 },
		{ "MAC_LOCK", 6, 1 },
		{ "ARM_LOCK", 5, 1 },
		{ "M0_LOCK", 4, 1 },
		{ "XGPBUS_LOCK", 3, 1 },
		{ "XGPHY_LOCK", 2, 1 },
		{ "USB_LOCK", 1, 1 },
		{ "C_LOCK", 0, 1 },
	{ "DBG_GPIO_INT_ENABLE", 0x6180, 0 },
		{ "GPIO23", 23, 1 },
		{ "GPIO22", 22, 1 },
		{ "GPIO21", 21, 1 },
		{ "GPIO20", 20, 1 },
		{ "GPIO19", 19, 1 },
		{ "GPIO18", 18, 1 },
		{ "GPIO17", 17, 1 },
		{ "GPIO16", 16, 1 },
		{ "GPIO15", 15, 1 },
		{ "GPIO14", 14, 1 },
		{ "GPIO13", 13, 1 },
		{ "GPIO12", 12, 1 },
		{ "GPIO11", 11, 1 },
		{ "GPIO10", 10, 1 },
		{ "GPIO9", 9, 1 },
		{ "GPIO8", 8, 1 },
		{ "GPIO7", 7, 1 },
		{ "GPIO6", 6, 1 },
		{ "GPIO5", 5, 1 },
		{ "GPIO4", 4, 1 },
		{ "GPIO3", 3, 1 },
		{ "GPIO2", 2, 1 },
		{ "GPIO1", 1, 1 },
		{ "GPIO0", 0, 1 },
	{ "DBG_GPIO_INT_CAUSE", 0x6184, 0 },
		{ "GPIO23", 23, 1 },
		{ "GPIO22", 22, 1 },
		{ "GPIO21", 21, 1 },
		{ "GPIO20", 20, 1 },
		{ "GPIO19", 19, 1 },
		{ "GPIO18", 18, 1 },
		{ "GPIO17", 17, 1 },
		{ "GPIO16", 16, 1 },
		{ "GPIO15", 15, 1 },
		{ "GPIO14", 14, 1 },
		{ "GPIO13", 13, 1 },
		{ "GPIO12", 12, 1 },
		{ "GPIO11", 11, 1 },
		{ "GPIO10", 10, 1 },
		{ "GPIO9", 9, 1 },
		{ "GPIO8", 8, 1 },
		{ "GPIO7", 7, 1 },
		{ "GPIO6", 6, 1 },
		{ "GPIO5", 5, 1 },
		{ "GPIO4", 4, 1 },
		{ "GPIO3", 3, 1 },
		{ "GPIO2", 2, 1 },
		{ "GPIO1", 1, 1 },
		{ "GPIO0", 0, 1 },
	{ "DBG_GPIO_ACT_LOW", 0x6188, 0 },
		{ "GPIO23_ACT_LOW", 23, 1 },
		{ "GPIO22_ACT_LOW", 22, 1 },
		{ "GPIO21_ACT_LOW", 21, 1 },
		{ "GPIO20_ACT_LOW", 20, 1 },
		{ "GPIO19_ACT_LOW", 19, 1 },
		{ "GPIO18_ACT_LOW", 18, 1 },
		{ "GPIO17_ACT_LOW", 17, 1 },
		{ "GPIO16_ACT_LOW", 16, 1 },
		{ "GPIO15_ACT_LOW", 15, 1 },
		{ "GPIO14_ACT_LOW", 14, 1 },
		{ "GPIO13_ACT_LOW", 13, 1 },
		{ "GPIO12_ACT_LOW", 12, 1 },
		{ "GPIO11_ACT_LOW", 11, 1 },
		{ "GPIO10_ACT_LOW", 10, 1 },
		{ "GPIO9_ACT_LOW", 9, 1 },
		{ "GPIO8_ACT_LOW", 8, 1 },
		{ "GPIO7_ACT_LOW", 7, 1 },
		{ "GPIO6_ACT_LOW", 6, 1 },
		{ "GPIO5_ACT_LOW", 5, 1 },
		{ "GPIO4_ACT_LOW", 4, 1 },
		{ "GPIO3_ACT_LOW", 3, 1 },
		{ "GPIO2_ACT_LOW", 2, 1 },
		{ "GPIO1_ACT_LOW", 1, 1 },
		{ "GPIO0_ACT_LOW", 0, 1 },
	{ "DBG_DDR_CAL", 0x618c, 0 },
		{ "CAL_ENDC", 9, 1 },
		{ "CAL_MODE", 8, 1 },
		{ "CAL_REFSEL", 7, 1 },
		{ "PD", 6, 1 },
		{ "CAL_RST", 5, 1 },
		{ "CAL_READ", 4, 1 },
		{ "CAL_SC", 3, 1 },
		{ "CAL_LC", 2, 1 },
		{ "CAL_CCAL", 1, 1 },
		{ "CAL_RES", 0, 1 },
	{ "DBG_EFUSE_CTL_0", 0x6190, 0 },
		{ "EFUSE_CSB", 31, 1 },
		{ "EFUSE_STROBE", 30, 1 },
		{ "EFUSE_LOAD", 29, 1 },
		{ "EFUSE_PGENB", 28, 1 },
		{ "EFUSE_PS", 27, 1 },
		{ "EFUSE_MR", 26, 1 },
		{ "EFUSE_PD", 25, 1 },
		{ "EFUSE_RWL", 24, 1 },
		{ "EFUSE_RSB", 23, 1 },
		{ "EFUSE_TRCS", 22, 1 },
		{ "EFUSE_AT", 20, 2 },
		{ "EFUSE_RD_STATE", 16, 4 },
		{ "EFUSE_BUSY", 15, 1 },
		{ "EFUSE_WR_RD", 13, 2 },
		{ "EFUSE_A", 0, 11 },
	{ "DBG_EFUSE_CTL_1", 0x6194, 0 },
		{ "EFUSE_CSB", 31, 1 },
		{ "EFUSE_STROBE", 30, 1 },
		{ "EFUSE_LOAD", 29, 1 },
		{ "EFUSE_PGENB", 28, 1 },
		{ "EFUSE_PS", 27, 1 },
		{ "EFUSE_MR", 26, 1 },
		{ "EFUSE_PD", 25, 1 },
		{ "EFUSE_RWL", 24, 1 },
		{ "EFUSE_RSB", 23, 1 },
		{ "EFUSE_TRCS", 22, 1 },
		{ "EFUSE_AT", 20, 2 },
		{ "EFUSE_RD_STATE", 16, 4 },
		{ "EFUSE_BUSY", 15, 1 },
		{ "EFUSE_WR_RD", 13, 2 },
		{ "EFUSE_A", 0, 11 },
	{ "DBG_EFUSE_RD_CTL", 0x6198, 0 },
		{ "EFUSE_RD_ID", 6, 2 },
		{ "EFUSE_RD_ADDR", 0, 6 },
	{ "DBG_EFUSE_RD_DATA", 0x619c, 0 },
	{ "DBG_EFUSE_TIME_0", 0x61a0, 0 },
		{ "EFUSE_TIME_1", 16, 16 },
		{ "EFUSE_TIME_0", 0, 16 },
	{ "DBG_EFUSE_TIME_1", 0x61a4, 0 },
		{ "EFUSE_TIME_3", 16, 16 },
		{ "EFUSE_TIME_2", 0, 16 },
	{ "DBG_EFUSE_TIME_2", 0x61a8, 0 },
		{ "EFUSE_TIME_5", 16, 16 },
		{ "EFUSE_TIME_4", 0, 16 },
	{ "DBG_EFUSE_TIME_3", 0x61ac, 0 },
		{ "EFUSE_TIME_7", 16, 16 },
		{ "EFUSE_TIME_6", 0, 16 },
	{ "DBG_VREF_CTL", 0x61b0, 0 },
		{ "VREF_SEL_1", 15, 1 },
		{ "VREF_R_1", 8, 7 },
		{ "VREF_SEL_0", 7, 1 },
		{ "VREF_R_0", 0, 7 },
	{ "DBG_FPGA_EFUSE_CTL", 0x61b4, 0 },
	{ "DBG_FPGA_EFUSE_DATA", 0x61b8, 0 },
	{ "DBG_DBG0_RST_VALUE", 0x6020, 0 },
	{ "DBG_PLL_OCLK_PAD_EN", 0x6028, 0 },
	{ "DBG_PLL_LOCK", 0x602c, 0 },
		{ "M1_LOCK", 9, 1 },
		{ "PCIE_LOCK", 8, 1 },
		{ "U_LOCK", 7, 1 },
		{ "MAC_LOCK", 6, 1 },
		{ "ARM_LOCK", 5, 1 },
		{ "M0_LOCK", 4, 1 },
		{ "XGPBUS_LOCK", 3, 1 },
		{ "XGPHY_LOCK", 2, 1 },
		{ "USB_LOCK", 1, 1 },
		{ "C_LOCK", 0, 1 },
	{ "DBG_PLL_LOCK_ACT_LOW", 0x6030, 0 },
		{ "M1_LOCK_ACT_LOW", 9, 1 },
		{ "PCIE_LOCK_ACT_LOW", 8, 1 },
		{ "U_LOCK_ACT_LOW", 7, 1 },
		{ "MAC_LOCK_ACT_LOW", 6, 1 },
		{ "ARM_LOCK_ACT_LOW", 5, 1 },
		{ "M0_LOCK_ACT_LOW", 4, 1 },
		{ "XGPBUS_LOCK_ACT_LOW", 3, 1 },
		{ "XGPHY_LOCK_ACT_LOW", 2, 1 },
		{ "USB_LOCK_ACT_LOW", 1, 1 },
		{ "C_LOCK_ACT_LOW", 0, 1 },
	{ "DBG_STATIC_U_PLL_CONF1", 0x6044, 0 },
		{ "STATIC_U_PLL_RANGE", 22, 3 },
		{ "STATIC_U_PLL_DIVQ", 17, 5 },
		{ "STATIC_U_PLL_DIVFI", 8, 9 },
		{ "STATIC_U_PLL_DIVR", 2, 6 },
		{ "STATIC_U_PLL_BYPASS", 1, 1 },
	{ "DBG_STATIC_U_PLL_CONF2", 0x6048, 0 },
		{ "STATIC_U_PLL_SSMF", 5, 4 },
		{ "STATIC_U_PLL_SSMD", 2, 3 },
		{ "STATIC_U_PLL_SSDS", 1, 1 },
		{ "STATIC_U_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_C_PLL_CONF1", 0x604c, 0 },
		{ "STATIC_C_PLL_RANGE", 22, 3 },
		{ "STATIC_C_PLL_DIVQ", 17, 5 },
		{ "STATIC_C_PLL_DIVFI", 8, 9 },
		{ "STATIC_C_PLL_DIVR", 2, 6 },
		{ "STATIC_C_PLL_BYPASS", 1, 1 },
	{ "DBG_STATIC_C_PLL_CONF2", 0x6050, 0 },
		{ "STATIC_C_PLL_SSMF", 5, 4 },
		{ "STATIC_C_PLL_SSMD", 2, 3 },
		{ "STATIC_C_PLL_SSDS", 1, 1 },
		{ "STATIC_C_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_PLL_DFS_CONF", 0x6054, 0 },
		{ "STATIC_U_DFS_ACK", 23, 1 },
		{ "STATIC_C_DFS_ACK", 22, 1 },
		{ "STATIC_U_DFS_DIVFI", 13, 9 },
		{ "STATIC_U_DFS_NEWDIV", 12, 1 },
		{ "STATIC_U_DFS_ENABLE", 11, 1 },
		{ "STATIC_C_DFS_DIVFI", 2, 9 },
		{ "STATIC_C_DFS_NEWDIV", 1, 1 },
		{ "STATIC_C_DFS_ENABLE", 0, 1 },
	{ "DBG_EXTRA_STATIC_BITS_CONF", 0x6058, 0 },
		{ "STATIC_LVDS_CLKOUT_EN", 21, 1 },
		{ "ExPHYClk_sel_en", 16, 1 },
	{ "DBG_STATIC_OCLK_MUXSEL_CONF", 0x605c, 0 },
		{ "P_OCLK_MUXSEL", 13, 4 },
	{ "DBG_TRACE0_CONF_COMPREG0", 0x6060, 0 },
	{ "DBG_TRACE0_CONF_COMPREG1", 0x6064, 0 },
	{ "DBG_TRACE1_CONF_COMPREG0", 0x6068, 0 },
	{ "DBG_TRACE1_CONF_COMPREG1", 0x606c, 0 },
	{ "DBG_TRACE0_CONF_MASKREG0", 0x6070, 0 },
	{ "DBG_TRACE0_CONF_MASKREG1", 0x6074, 0 },
	{ "DBG_TRACE1_CONF_MASKREG0", 0x6078, 0 },
	{ "DBG_TRACE1_CONF_MASKREG1", 0x607c, 0 },
	{ "DBG_TRACE_COUNTER", 0x6080, 0 },
		{ "Counter1", 16, 16 },
		{ "Counter0", 0, 16 },
	{ "DBG_STATIC_REFCLK_PERIOD", 0x6084, 0 },
	{ "DBG_TRACE_CONF", 0x6088, 0 },
		{ "dbg_trace_operate_with_trg", 5, 1 },
		{ "dbg_trace_operate_en", 4, 1 },
		{ "dbg_operate_indv_combined", 3, 1 },
		{ "dbg_operate_order_of_trigger", 2, 1 },
		{ "dbg_operate_sgl_dbl_trigger", 1, 1 },
		{ "dbg_operate0_or_1", 0, 1 },
	{ "DBG_TRACE_RDEN", 0x608c, 0 },
		{ "RD_ADDR1", 11, 9 },
		{ "RD_ADDR0", 2, 9 },
		{ "Rd_en1", 1, 1 },
		{ "Rd_en0", 0, 1 },
	{ "DBG_TRACE_WRADDR", 0x6090, 0 },
		{ "Wr_pointer_addr1", 16, 9 },
		{ "Wr_pointer_addr0", 0, 9 },
	{ "DBG_TRACE0_DATA_OUT", 0x6094, 0 },
	{ "DBG_TRACE1_DATA_OUT", 0x6098, 0 },
	{ "DBG_FUSE_SENSE_DONE", 0x609c, 0 },
		{ "PSRO_sel", 1, 4 },
		{ "FUSE_DONE_SENSE", 0, 1 },
	{ "DBG_PVT_EN1", 0x60a8, 0 },
		{ "PVT_TRIMO", 18, 6 },
		{ "PVT_TRIMG", 13, 5 },
		{ "PVT_VSAMPLE", 12, 1 },
		{ "PVT_PSAMPLE", 10, 2 },
		{ "PVT_ENA", 9, 1 },
		{ "PVT_RESET", 8, 1 },
		{ "PVT_DIV", 0, 8 },
	{ "DBG_PVT_EN2", 0x60ac, 0 },
		{ "PVT_DATA_OUT", 1, 10 },
		{ "PVT_DATA_VALID", 0, 1 },
	{ "DBG_STATIC_M0_PLL_CONF1", 0x60b8, 0 },
		{ "STATIC_M0_PLL_RANGE", 22, 3 },
		{ "STATIC_M0_PLL_DIVQ", 17, 5 },
		{ "STATIC_M0_PLL_DIVFI", 8, 9 },
		{ "STATIC_M0_PLL_DIVR", 2, 6 },
		{ "STATIC_M0_PLL_BYPASS", 1, 1 },
		{ "STATIC_M0_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_M0_PLL_CONF2", 0x60bc, 0 },
		{ "STATIC_SWMC1Rst_", 14, 1 },
		{ "STATIC_SWMC1CfgRst_", 13, 1 },
		{ "STATIC_PHY0RecRst_", 12, 1 },
		{ "STATIC_PHY1RecRst_", 11, 1 },
		{ "STATIC_SWMC0Rst_", 10, 1 },
		{ "STATIC_SWMC0CfgRst_", 9, 1 },
		{ "STATIC_M0_PLL_SSMF", 5, 4 },
		{ "STATIC_M0_PLL_SSMD", 2, 3 },
		{ "STATIC_M0_PLL_SSDS", 1, 1 },
		{ "STATIC_M0_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_MAC_PLL_CONF1", 0x60c0, 0 },
		{ "STATIC_MAC_PLL_RANGE", 22, 3 },
		{ "STATIC_MAC_PLL_DIVQ", 17, 5 },
		{ "STATIC_MAC_PLL_DIVFI", 8, 9 },
		{ "STATIC_MAC_PLL_DIVR", 2, 6 },
		{ "STATIC_MAC_PLL_BYPASS", 1, 1 },
		{ "STATIC_MAC_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_MAC_PLL_CONF2", 0x60c4, 0 },
		{ "STATIC_MAC_PLL_SSMF", 5, 4 },
		{ "STATIC_MAC_PLL_SSMD", 2, 3 },
		{ "STATIC_MAC_PLL_SSDS", 1, 1 },
		{ "STATIC_MAC_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_ARM_PLL_CONF1", 0x60c8, 0 },
		{ "STATIC_ARM_PLL_RANGE", 22, 3 },
		{ "STATIC_ARM_PLL_DIVQ", 17, 5 },
		{ "STATIC_ARM_PLL_DIVFI", 8, 9 },
		{ "STATIC_ARM_PLL_DIVR", 2, 6 },
		{ "STATIC_ARM_PLL_BYPASS", 1, 1 },
		{ "STATIC_ARM_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_ARM_PLL_CONF2", 0x60cc, 0 },
		{ "STATIC_ARM_PLL_SSMF", 5, 4 },
		{ "STATIC_ARM_PLL_SSMD", 2, 3 },
		{ "STATIC_ARM_PLL_SSDS", 1, 1 },
		{ "STATIC_ARM_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_USB_PLL_CONF1", 0x60d0, 0 },
		{ "STATIC_USB_PLL_RANGE", 22, 3 },
		{ "STATIC_USB_PLL_DIVQ", 17, 5 },
		{ "STATIC_USB_PLL_DIVFI", 8, 9 },
		{ "STATIC_USB_PLL_DIVR", 2, 6 },
		{ "STATIC_USB_PLL_BYPASS", 1, 1 },
		{ "STATIC_USB_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_USB_PLL_CONF2", 0x60d4, 0 },
		{ "STATIC_USB_PLL_SSMF", 5, 4 },
		{ "STATIC_USB_PLL_SSMD", 2, 3 },
		{ "STATIC_USB_PLL_SSDS", 1, 1 },
		{ "STATIC_USB_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_XGPHY_PLL_CONF1", 0x60d8, 0 },
		{ "STATIC_XGPHY_PLL_RANGE", 22, 3 },
		{ "STATIC_XGPHY_PLL_DIVQ", 17, 5 },
		{ "STATIC_XGPHY_PLL_DIVFI", 8, 9 },
		{ "STATIC_XGPHY_PLL_DIVR", 2, 6 },
		{ "STATIC_XGPHY_PLL_BYPASS", 1, 1 },
		{ "STATIC_XGPHY_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_XGPHY_PLL_CONF2", 0x60dc, 0 },
		{ "STATIC_XGPHY_PLL_SSMF", 5, 4 },
		{ "STATIC_XGPHY_PLL_SSMD", 2, 3 },
		{ "STATIC_XGPHY_PLL_SSDS", 1, 1 },
		{ "STATIC_XGPHY_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_XGPBUS_PLL_CONF1", 0x60e0, 0 },
		{ "STATIC_XGPBUS_SWRst_", 25, 1 },
		{ "STATIC_XGPBUS_PLL_RANGE", 22, 3 },
		{ "STATIC_XGPBUS_PLL_DIVQ", 17, 5 },
		{ "STATIC_XGPBUS_PLL_DIVFI", 8, 9 },
		{ "STATIC_XGPBUS_PLL_DIVR", 2, 6 },
		{ "STATIC_XGPBUS_PLL_BYPASS", 1, 1 },
		{ "STATIC_XGPBUS_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_XGPBUS_PLL_CONF2", 0x60e4, 0 },
		{ "STATIC_XGPBUS_PLL_SSMF", 5, 4 },
		{ "STATIC_XGPBUS_PLL_SSMD", 2, 3 },
		{ "STATIC_XGPBUS_PLL_SSDS", 1, 1 },
		{ "STATIC_XGPBUS_PLL_SSE", 0, 1 },
	{ "DBG_STATIC_M1_PLL_CONF1", 0x60e8, 0 },
		{ "STATIC_M1_PLL_RANGE", 22, 3 },
		{ "STATIC_M1_PLL_DIVQ", 17, 5 },
		{ "STATIC_M1_PLL_DIVFI", 8, 9 },
		{ "STATIC_M1_PLL_DIVR", 2, 6 },
		{ "STATIC_M1_PLL_BYPASS", 1, 1 },
		{ "STATIC_M1_PLL_RESET", 0, 1 },
	{ "DBG_STATIC_M1_PLL_CONF2", 0x60ec, 0 },
		{ "STATIC_M1_PLL_SSMF", 5, 4 },
		{ "STATIC_M1_PLL_SSMD", 2, 3 },
		{ "STATIC_M1_PLL_SSDS", 1, 1 },
		{ "STATIC_M1_PLL_SSE", 0, 1 },
	{ "DBG_GPIO_PE_EN", 0x6118, 0 },
		{ "GPIO23_PE_En", 23, 1 },
		{ "GPIO22_PE_En", 22, 1 },
		{ "GPIO21_PE_En", 21, 1 },
		{ "GPIO20_PE_En", 20, 1 },
		{ "GPIO19_PE_En", 19, 1 },
		{ "GPIO18_PE_En", 18, 1 },
		{ "GPIO17_PE_En", 17, 1 },
		{ "GPIO16_PE_En", 16, 1 },
		{ "GPIO15_PE_En", 15, 1 },
		{ "GPIO14_PE_En", 14, 1 },
		{ "GPIO13_PE_En", 13, 1 },
		{ "GPIO12_PE_En", 12, 1 },
		{ "GPIO11_PE_En", 11, 1 },
		{ "GPIO10_PE_En", 10, 1 },
		{ "GPIO9_PE_En", 9, 1 },
		{ "GPIO8_PE_En", 8, 1 },
		{ "GPIO7_PE_En", 7, 1 },
		{ "GPIO6_PE_En", 6, 1 },
		{ "GPIO5_PE_En", 5, 1 },
		{ "GPIO4_PE_En", 4, 1 },
		{ "GPIO3_PE_En", 3, 1 },
		{ "GPIO2_PE_En", 2, 1 },
		{ "GPIO1_PE_En", 1, 1 },
		{ "GPIO0_PE_En", 0, 1 },
	{ "DBG_GPIO_PS_EN", 0x611c, 0 },
		{ "GPIO23_PS_En", 23, 1 },
		{ "GPIO22_PS_En", 22, 1 },
		{ "GPIO21_PS_En", 21, 1 },
		{ "GPIO20_PS_En", 20, 1 },
		{ "GPIO19_PS_En", 19, 1 },
		{ "GPIO18_PS_En", 18, 1 },
		{ "GPIO17_PS_En", 17, 1 },
		{ "GPIO16_PS_En", 16, 1 },
		{ "GPIO15_PS_En", 15, 1 },
		{ "GPIO14_PS_En", 14, 1 },
		{ "GPIO13_PS_En", 13, 1 },
		{ "GPIO12_PS_En", 12, 1 },
		{ "GPIO11_PS_En", 11, 1 },
		{ "GPIO10_PS_En", 10, 1 },
		{ "GPIO9_PS_En", 9, 1 },
		{ "GPIO8_PS_En", 8, 1 },
		{ "GPIO7_PS_En", 7, 1 },
		{ "GPIO6_PS_En", 6, 1 },
		{ "GPIO5_PS_En", 5, 1 },
		{ "GPIO4_PS_En", 4, 1 },
		{ "GPIO3_PS_En", 3, 1 },
		{ "GPIO2_PS_En", 2, 1 },
		{ "GPIO1_PS_En", 1, 1 },
		{ "GPIO0_PS_En", 0, 1 },
	{ "DBG_STATIC_PLL_LOCK_WAIT_CONF", 0x6150, 0 },
		{ "STATIC_WAIT_LOCK", 24, 1 },
		{ "STATIC_LOCK_WAIT_TIME", 0, 24 },
	{ NULL }
};

struct reg_info t7_ma_regs[] = {
	{ "MA_CLIENT0_PR_THRESHOLD", 0x7700, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT0_CR_THRESHOLD", 0x7704, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT1_PR_THRESHOLD", 0x7708, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT1_CR_THRESHOLD", 0x770c, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT2_PR_THRESHOLD", 0x7710, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT2_CR_THRESHOLD", 0x7714, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT3_PR_THRESHOLD", 0x7718, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT3_CR_THRESHOLD", 0x771c, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT4_PR_THRESHOLD", 0x7720, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT4_CR_THRESHOLD", 0x7724, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT5_PR_THRESHOLD", 0x7728, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT5_CR_THRESHOLD", 0x772c, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT6_PR_THRESHOLD", 0x7730, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT6_CR_THRESHOLD", 0x7734, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT7_PR_THRESHOLD", 0x7738, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT7_CR_THRESHOLD", 0x773c, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT8_PR_THRESHOLD", 0x7740, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT8_CR_THRESHOLD", 0x7744, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT9_PR_THRESHOLD", 0x7748, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT9_CR_THRESHOLD", 0x774c, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT10_PR_THRESHOLD", 0x7750, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT10_CR_THRESHOLD", 0x7754, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT11_PR_THRESHOLD", 0x7758, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT11_CR_THRESHOLD", 0x775c, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CLIENT12_PR_THRESHOLD", 0x7760, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT12_CR_THRESHOLD", 0x7764, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_SGE_TH0_DEBUG_CNT", 0x7768, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_SGE_TH1_DEBUG_CNT", 0x776c, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_ULPTX_DEBUG_CNT", 0x7770, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_ULPRX_DEBUG_CNT", 0x7774, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_ULPTXRX_DEBUG_CNT", 0x7778, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_TP_TH0_DEBUG_CNT", 0x777c, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_TP_TH1_DEBUG_CNT", 0x7780, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_LE_DEBUG_CNT", 0x7784, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_CIM_TH0_DEBUG_CNT", 0x7788, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_PCIE_DEBUG_CNT", 0x778c, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_PMTX_DEBUG_CNT", 0x7790, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_PMRX_DEBUG_CNT", 0x7794, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_HMA_DEBUG_CNT", 0x7798, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_EDRAM0_BAR", 0x77c0, 0 },
		{ "EDRAM0_BASE", 16, 16 },
		{ "EDRAM0_SIZE", 0, 16 },
	{ "MA_EDRAM1_BAR", 0x77c4, 0 },
		{ "EDRAM1_BASE", 16, 16 },
		{ "EDRAM1_SIZE", 0, 16 },
	{ "MA_EXT_MEMORY0_BAR", 0x77c8, 0 },
		{ "EXT_MEM0_BASE", 16, 16 },
		{ "EXT_MEM0_SIZE", 0, 16 },
	{ "MA_HOST_MEMORY_BAR", 0x77cc, 0 },
		{ "HMA_BASE", 16, 16 },
		{ "HMA_SIZE", 0, 16 },
	{ "MA_EXT_MEM_PAGE_SIZE", 0x77d0, 0 },
		{ "BRBC_MODE", 4, 1 },
		{ "BRC_MODE", 3, 1 },
		{ "EXT_MEM_PAGE_SIZE", 0, 3 },
	{ "MA_ARB_CTRL", 0x77d4, 0 },
		{ "HMA_WRT_EN", 26, 1 },
		{ "HMA_NUM_PG_128B_FDBK", 21, 5 },
		{ "HMA_DIS_128B_PG_CNT_FDBK", 20, 1 },
		{ "HMA_DIS_BG_ARB", 19, 1 },
		{ "HMA_DIS_BANK_FAIR", 18, 1 },
		{ "HMA_DIS_PAGE_HINT", 17, 1 },
		{ "HMA_DIS_ADV_ARB", 16, 1 },
		{ "NUM_PG_128B_FDBK", 5, 5 },
		{ "DIS_128B_PG_CNT_FDBK", 4, 1 },
		{ "DIS_BG_ARB", 3, 1 },
		{ "DIS_BANK_FAIR", 2, 1 },
		{ "DIS_PAGE_HINT", 1, 1 },
		{ "DIS_ADV_ARB", 0, 1 },
	{ "MA_TARGET_MEM_ENABLE", 0x77d8, 0 },
		{ "EDC512", 8, 1 },
		{ "MC_SPLIT_BOUNDARY", 7, 1 },
		{ "MC_SPLIT", 6, 1 },
		{ "HMA_MUX", 5, 1 },
		{ "EXT_MEM1_ENABLE", 4, 1 },
		{ "HMA_ENABLE", 3, 1 },
		{ "EXT_MEM0_ENABLE", 2, 1 },
		{ "EDRAM1_ENABLE", 1, 1 },
		{ "EDRAM0_ENABLE", 0, 1 },
	{ "MA_INT_ENABLE", 0x77dc, 0 },
		{ "MEM_TO_INT_ENABLE", 2, 1 },
		{ "MEM_PERR_INT_ENABLE", 1, 1 },
		{ "MEM_WRAP_INT_ENABLE", 0, 1 },
	{ "MA_INT_CAUSE", 0x77e0, 0 },
		{ "MEM_TO_INT_CAUSE", 2, 1 },
		{ "MEM_PERR_INT_CAUSE", 1, 1 },
		{ "MEM_WRAP_INT_CAUSE", 0, 1 },
	{ "MA_INT_WRAP_STATUS", 0x77e4, 0 },
		{ "MEM_WRAP_ADDRESS", 4, 28 },
		{ "MEM_WRAP_CLIENT_NUM", 0, 4 },
	{ "MA_TP_THREAD1_MAPPER", 0x77e8, 0 },
	{ "MA_SGE_THREAD1_MAPPER", 0x77ec, 0 },
	{ "MA_PARITY_ERROR_ENABLE1", 0x77f0, 0 },
		{ "ARB4_PAR_WRQUEUE_ERROR_EN", 11, 1 },
		{ "ARB3_PAR_WRQUEUE_ERROR_EN", 10, 1 },
		{ "ARB2_PAR_WRQUEUE_ERROR_EN", 9, 1 },
		{ "ARB1_PAR_WRQUEUE_ERROR_EN", 8, 1 },
		{ "ARB0_PAR_WRQUEUE_ERROR_EN", 7, 1 },
		{ "ARB4_PAR_RDQUEUE_ERROR_EN", 6, 1 },
		{ "ARB3_PAR_RDQUEUE_ERROR_EN", 5, 1 },
		{ "ARB2_PAR_RDQUEUE_ERROR_EN", 4, 1 },
		{ "ARB1_PAR_RDQUEUE_ERROR_EN", 3, 1 },
		{ "ARB0_PAR_RDQUEUE_ERROR_EN", 2, 1 },
		{ "TP_DMARBT_PAR_ERROR_EN", 1, 1 },
		{ "LOGIC_FIFO_PAR_ERROR_EN", 0, 1 },
	{ "MA_PARITY_ERROR_STATUS1", 0x77f4, 0 },
		{ "ARB4_PAR_WRQUEUE_ERROR", 11, 1 },
		{ "ARB3_PAR_WRQUEUE_ERROR", 10, 1 },
		{ "ARB2_PAR_WRQUEUE_ERROR", 9, 1 },
		{ "ARB1_PAR_WRQUEUE_ERROR", 8, 1 },
		{ "ARB0_PAR_WRQUEUE_ERROR", 7, 1 },
		{ "ARB4_PAR_RDQUEUE_ERROR", 6, 1 },
		{ "ARB3_PAR_RDQUEUE_ERROR", 5, 1 },
		{ "ARB2_PAR_RDQUEUE_ERROR", 4, 1 },
		{ "ARB1_PAR_RDQUEUE_ERROR", 3, 1 },
		{ "ARB0_PAR_RDQUEUE_ERROR", 2, 1 },
		{ "TP_DMARBT_PAR_ERROR", 1, 1 },
		{ "LOGIC_FIFO_PAR_ERROR", 0, 1 },
	{ "MA_COR_ERROR_ENABLE1", 0x779c, 0 },
		{ "ARB4_COR_WRQUEUE_ERROR_EN", 9, 1 },
		{ "ARB3_COR_WRQUEUE_ERROR_EN", 8, 1 },
		{ "ARB2_COR_WRQUEUE_ERROR_EN", 7, 1 },
		{ "ARB1_COR_WRQUEUE_ERROR_EN", 6, 1 },
		{ "ARB0_COR_WRQUEUE_ERROR_EN", 5, 1 },
		{ "ARB4_COR_RDQUEUE_ERROR_EN", 4, 1 },
		{ "ARB3_COR_RDQUEUE_ERROR_EN", 3, 1 },
		{ "ARB2_COR_RDQUEUE_ERROR_EN", 2, 1 },
		{ "ARB1_COR_RDQUEUE_ERROR_EN", 1, 1 },
		{ "ARB0_COR_RDQUEUE_ERROR_EN", 0, 1 },
	{ "MA_COR_ERROR_STATUS1", 0x77a0, 0 },
		{ "ARB4_COR_WRQUEUE_ERROR", 9, 1 },
		{ "ARB3_COR_WRQUEUE_ERROR", 8, 1 },
		{ "ARB2_COR_WRQUEUE_ERROR", 7, 1 },
		{ "ARB1_COR_WRQUEUE_ERROR", 6, 1 },
		{ "ARB0_COR_WRQUEUE_ERROR", 5, 1 },
		{ "ARB4_COR_RDQUEUE_ERROR", 4, 1 },
		{ "ARB3_COR_RDQUEUE_ERROR", 3, 1 },
		{ "ARB2_COR_RDQUEUE_ERROR", 2, 1 },
		{ "ARB1_COR_RDQUEUE_ERROR", 1, 1 },
		{ "ARB0_COR_RDQUEUE_ERROR", 0, 1 },
	{ "MA_PARITY_ERROR_ENABLE2", 0x7800, 0 },
		{ "CL14_PAR_WRQUEUE_ERROR_EN", 14, 1 },
		{ "CL13_PAR_WRQUEUE_ERROR_EN", 13, 1 },
		{ "CL12_PAR_WRQUEUE_ERROR_EN", 12, 1 },
		{ "CL11_PAR_WRQUEUE_ERROR_EN", 11, 1 },
		{ "CL10_PAR_WRQUEUE_ERROR_EN", 10, 1 },
		{ "CL9_PAR_WRQUEUE_ERROR_EN", 9, 1 },
		{ "CL8_PAR_WRQUEUE_ERROR_EN", 8, 1 },
		{ "CL7_PAR_WRQUEUE_ERROR_EN", 7, 1 },
		{ "CL6_PAR_WRQUEUE_ERROR_EN", 6, 1 },
		{ "CL5_PAR_WRQUEUE_ERROR_EN", 5, 1 },
		{ "CL4_PAR_WRQUEUE_ERROR_EN", 4, 1 },
		{ "CL3_PAR_WRQUEUE_ERROR_EN", 3, 1 },
		{ "CL2_PAR_WRQUEUE_ERROR_EN", 2, 1 },
		{ "CL1_PAR_WRQUEUE_ERROR_EN", 1, 1 },
		{ "CL0_PAR_WRQUEUE_ERROR_EN", 0, 1 },
	{ "MA_PARITY_ERROR_STATUS2", 0x7804, 0 },
		{ "CL14_PAR_WRQUEUE_ERROR", 14, 1 },
		{ "CL13_PAR_WRQUEUE_ERROR", 13, 1 },
		{ "CL12_PAR_WRQUEUE_ERROR", 12, 1 },
		{ "CL11_PAR_WRQUEUE_ERROR", 11, 1 },
		{ "CL10_PAR_WRQUEUE_ERROR", 10, 1 },
		{ "CL9_PAR_WRQUEUE_ERROR", 9, 1 },
		{ "CL8_PAR_WRQUEUE_ERROR", 8, 1 },
		{ "CL7_PAR_WRQUEUE_ERROR", 7, 1 },
		{ "CL6_PAR_WRQUEUE_ERROR", 6, 1 },
		{ "CL5_PAR_WRQUEUE_ERROR", 5, 1 },
		{ "CL4_PAR_WRQUEUE_ERROR", 4, 1 },
		{ "CL3_PAR_WRQUEUE_ERROR", 3, 1 },
		{ "CL2_PAR_WRQUEUE_ERROR", 2, 1 },
		{ "CL1_PAR_WRQUEUE_ERROR", 1, 1 },
		{ "CL0_PAR_WRQUEUE_ERROR", 0, 1 },
	{ "MA_PARITY_ERROR_ENABLE3", 0x7884, 0 },
		{ "CL14_PAR_RDQUEUE_ERROR_EN", 14, 1 },
		{ "CL13_PAR_RDQUEUE_ERROR_EN", 13, 1 },
		{ "CL12_PAR_RDQUEUE_ERROR_EN", 12, 1 },
		{ "CL11_PAR_RDQUEUE_ERROR_EN", 11, 1 },
		{ "CL10_PAR_RDQUEUE_ERROR_EN", 10, 1 },
		{ "CL9_PAR_RDQUEUE_ERROR_EN", 9, 1 },
		{ "CL8_PAR_RDQUEUE_ERROR_EN", 8, 1 },
		{ "CL7_PAR_RDQUEUE_ERROR_EN", 7, 1 },
		{ "CL6_PAR_RDQUEUE_ERROR_EN", 6, 1 },
		{ "CL5_PAR_RDQUEUE_ERROR_EN", 5, 1 },
		{ "CL4_PAR_RDQUEUE_ERROR_EN", 4, 1 },
		{ "CL3_PAR_RDQUEUE_ERROR_EN", 3, 1 },
		{ "CL2_PAR_RDQUEUE_ERROR_EN", 2, 1 },
		{ "CL1_PAR_RDQUEUE_ERROR_EN", 1, 1 },
		{ "CL0_PAR_RDQUEUE_ERROR_EN", 0, 1 },
	{ "MA_PARITY_ERROR_STATUS3", 0x7888, 0 },
		{ "CL14_PAR_RDQUEUE_ERROR", 14, 1 },
		{ "CL13_PAR_RDQUEUE_ERROR", 13, 1 },
		{ "CL12_PAR_RDQUEUE_ERROR", 12, 1 },
		{ "CL11_PAR_RDQUEUE_ERROR", 11, 1 },
		{ "CL10_PAR_RDQUEUE_ERROR", 10, 1 },
		{ "CL9_PAR_RDQUEUE_ERROR", 9, 1 },
		{ "CL8_PAR_RDQUEUE_ERROR", 8, 1 },
		{ "CL7_PAR_RDQUEUE_ERROR", 7, 1 },
		{ "CL6_PAR_RDQUEUE_ERROR", 6, 1 },
		{ "CL5_PAR_RDQUEUE_ERROR", 5, 1 },
		{ "CL4_PAR_RDQUEUE_ERROR", 4, 1 },
		{ "CL3_PAR_RDQUEUE_ERROR", 3, 1 },
		{ "CL2_PAR_RDQUEUE_ERROR", 2, 1 },
		{ "CL1_PAR_RDQUEUE_ERROR", 1, 1 },
		{ "CL0_PAR_RDQUEUE_ERROR", 0, 1 },
	{ "MA_COR_ERROR_ENABLE2", 0x77b0, 0 },
		{ "CL14_COR_WRQUEUE_ERROR_EN", 14, 1 },
		{ "CL13_COR_WRQUEUE_ERROR_EN", 13, 1 },
		{ "CL12_COR_WRQUEUE_ERROR_EN", 12, 1 },
		{ "CL11_COR_WRQUEUE_ERROR_EN", 11, 1 },
		{ "CL10_COR_WRQUEUE_ERROR_EN", 10, 1 },
		{ "CL9_COR_WRQUEUE_ERROR_EN", 9, 1 },
		{ "CL8_COR_WRQUEUE_ERROR_EN", 8, 1 },
		{ "CL7_COR_WRQUEUE_ERROR_EN", 7, 1 },
		{ "CL6_COR_WRQUEUE_ERROR_EN", 6, 1 },
		{ "CL5_COR_WRQUEUE_ERROR_EN", 5, 1 },
		{ "CL4_COR_WRQUEUE_ERROR_EN", 4, 1 },
		{ "CL3_COR_WRQUEUE_ERROR_EN", 3, 1 },
		{ "CL2_COR_WRQUEUE_ERROR_EN", 2, 1 },
		{ "CL1_COR_WRQUEUE_ERROR_EN", 1, 1 },
		{ "CL0_COR_WRQUEUE_ERROR_EN", 0, 1 },
	{ "MA_COR_ERROR_STATUS2", 0x77b4, 0 },
		{ "CL14_COR_WRQUEUE_ERROR", 14, 1 },
		{ "CL13_COR_WRQUEUE_ERROR", 13, 1 },
		{ "CL12_COR_WRQUEUE_ERROR", 12, 1 },
		{ "CL11_COR_WRQUEUE_ERROR", 11, 1 },
		{ "CL10_COR_WRQUEUE_ERROR", 10, 1 },
		{ "CL9_COR_WRQUEUE_ERROR", 9, 1 },
		{ "CL8_COR_WRQUEUE_ERROR", 8, 1 },
		{ "CL7_COR_WRQUEUE_ERROR", 7, 1 },
		{ "CL6_COR_WRQUEUE_ERROR", 6, 1 },
		{ "CL5_COR_WRQUEUE_ERROR", 5, 1 },
		{ "CL4_COR_WRQUEUE_ERROR", 4, 1 },
		{ "CL3_COR_WRQUEUE_ERROR", 3, 1 },
		{ "CL2_COR_WRQUEUE_ERROR", 2, 1 },
		{ "CL1_COR_WRQUEUE_ERROR", 1, 1 },
		{ "CL0_COR_WRQUEUE_ERROR", 0, 1 },
	{ "MA_COR_ERROR_ENABLE3", 0x77b8, 0 },
		{ "CL14_COR_RDQUEUE_ERROR_EN", 14, 1 },
		{ "CL13_COR_RDQUEUE_ERROR_EN", 13, 1 },
		{ "CL12_COR_RDQUEUE_ERROR_EN", 12, 1 },
		{ "CL11_COR_RDQUEUE_ERROR_EN", 11, 1 },
		{ "CL10_COR_RDQUEUE_ERROR_EN", 10, 1 },
		{ "CL9_COR_RDQUEUE_ERROR_EN", 9, 1 },
		{ "CL8_COR_RDQUEUE_ERROR_EN", 8, 1 },
		{ "CL7_COR_RDQUEUE_ERROR_EN", 7, 1 },
		{ "CL6_COR_RDQUEUE_ERROR_EN", 6, 1 },
		{ "CL5_COR_RDQUEUE_ERROR_EN", 5, 1 },
		{ "CL4_COR_RDQUEUE_ERROR_EN", 4, 1 },
		{ "CL3_COR_RDQUEUE_ERROR_EN", 3, 1 },
		{ "CL2_COR_RDQUEUE_ERROR_EN", 2, 1 },
		{ "CL1_COR_RDQUEUE_ERROR_EN", 1, 1 },
		{ "CL0_COR_RDQUEUE_ERROR_EN", 0, 1 },
	{ "MA_COR_ERROR_STATUS3", 0x77bc, 0 },
		{ "CL14_COR_RDQUEUE_ERROR", 14, 1 },
		{ "CL13_COR_RDQUEUE_ERROR", 13, 1 },
		{ "CL12_COR_RDQUEUE_ERROR", 12, 1 },
		{ "CL11_COR_RDQUEUE_ERROR", 11, 1 },
		{ "CL10_COR_RDQUEUE_ERROR", 10, 1 },
		{ "CL9_COR_RDQUEUE_ERROR", 9, 1 },
		{ "CL8_COR_RDQUEUE_ERROR", 8, 1 },
		{ "CL7_COR_RDQUEUE_ERROR", 7, 1 },
		{ "CL6_COR_RDQUEUE_ERROR", 6, 1 },
		{ "CL5_COR_RDQUEUE_ERROR", 5, 1 },
		{ "CL4_COR_RDQUEUE_ERROR", 4, 1 },
		{ "CL3_COR_RDQUEUE_ERROR", 3, 1 },
		{ "CL2_COR_RDQUEUE_ERROR", 2, 1 },
		{ "CL1_COR_RDQUEUE_ERROR", 1, 1 },
		{ "CL0_COR_RDQUEUE_ERROR", 0, 1 },
	{ "MA_SGE_PCIE_COHERANCY_CTRL", 0x77f8, 0 },
		{ "BONUS_REG", 6, 26 },
		{ "COHERANCY_CMD_TYPE", 4, 2 },
		{ "COHERANCY_THREAD_NUM", 1, 3 },
		{ "COHERANCY_ENABLE", 0, 1 },
	{ "MA_ERROR_ENABLE", 0x77fc, 0 },
		{ "FUTURE_EXPANSION_EE", 1, 31 },
		{ "UE_ENABLE", 0, 1 },
	{ "MA_EXT_MEMORY1_BAR", 0x7808, 0 },
		{ "EXT_MEM1_BASE", 16, 16 },
		{ "EXT_MEM1_SIZE", 0, 16 },
	{ "MA_PMTX_THROTTLE", 0x780c, 0 },
		{ "FL_ENABLE", 31, 1 },
		{ "FL_LIMIT", 0, 8 },
	{ "MA_PMRX_THROTTLE", 0x7810, 0 },
		{ "FL_ENABLE", 31, 1 },
		{ "FL_LIMIT", 0, 8 },
	{ "MA_SGE_TH0_WRDATA_CNT", 0x7814, 0 },
	{ "MA_SGE_TH1_WRDATA_CNT", 0x7818, 0 },
	{ "MA_ULPTX_WRDATA_CNT", 0x781c, 0 },
	{ "MA_ULPRX_WRDATA_CNT", 0x7820, 0 },
	{ "MA_ULPTXRX_WRDATA_CNT", 0x7824, 0 },
	{ "MA_TP_TH0_WRDATA_CNT", 0x7828, 0 },
	{ "MA_TP_TH1_WRDATA_CNT", 0x782c, 0 },
	{ "MA_LE_WRDATA_CNT", 0x7830, 0 },
	{ "MA_CIM_TH0_WRDATA_CNT", 0x7834, 0 },
	{ "MA_PCIE_WRDATA_CNT", 0x7838, 0 },
	{ "MA_PMTX_WRDATA_CNT", 0x783c, 0 },
	{ "MA_PMRX_WRDATA_CNT", 0x7840, 0 },
	{ "MA_HMA_WRDATA_CNT", 0x7844, 0 },
	{ "MA_SGE_TH0_RDDATA_CNT", 0x7848, 0 },
	{ "MA_SGE_TH1_RDDATA_CNT", 0x784c, 0 },
	{ "MA_ULPTX_RDDATA_CNT", 0x7850, 0 },
	{ "MA_ULPRX_RDDATA_CNT", 0x7854, 0 },
	{ "MA_ULPTXRX_RDDATA_CNT", 0x7858, 0 },
	{ "MA_TP_TH0_RDDATA_CNT", 0x785c, 0 },
	{ "MA_TP_TH1_RDDATA_CNT", 0x7860, 0 },
	{ "MA_LE_RDDATA_CNT", 0x7864, 0 },
	{ "MA_CIM_TH0_RDDATA_CNT", 0x7868, 0 },
	{ "MA_PCIE_RDDATA_CNT", 0x786c, 0 },
	{ "MA_PMTX_RDDATA_CNT", 0x7870, 0 },
	{ "MA_PMRX_RDDATA_CNT", 0x7874, 0 },
	{ "MA_HMA_RDDATA_CNT", 0x7878, 0 },
	{ "MA_EXIT_ADDR_FAULT", 0x787c, 0 },
	{ "MA_DDR_DEVICE_CFG", 0x7880, 0 },
		{ "MEM_WIDTH", 1, 3 },
		{ "DDR_MODE", 0, 1 },
	{ "MA_TIMEOUT_CFG", 0x78cc, 0 },
		{ "CLR", 31, 1 },
		{ "CNT_LOCK", 30, 1 },
		{ "WRN", 24, 1 },
		{ "DIR", 23, 1 },
		{ "TYPE", 22, 1 },
		{ "CLIENT", 16, 4 },
		{ "DELAY", 0, 16 },
	{ "MA_TIMEOUT_CNT", 0x78d0, 0 },
		{ "DIR", 23, 1 },
		{ "TYPE", 22, 1 },
		{ "CLIENT", 16, 4 },
		{ "CNT_VAL", 0, 16 },
	{ "MA_WRITE_TIMEOUT_ERROR_ENABLE", 0x78d4, 0 },
		{ "FUTURE_CEXPANSION_WTE", 31, 1 },
		{ "CL14_WR_CMD_TO_EN", 30, 1 },
		{ "CL13_WR_CMD_TO_EN", 29, 1 },
		{ "CL12_WR_CMD_TO_EN", 28, 1 },
		{ "CL11_WR_CMD_TO_EN", 27, 1 },
		{ "CL10_WR_CMD_TO_EN", 26, 1 },
		{ "CL9_WR_CMD_TO_EN", 25, 1 },
		{ "CL8_WR_CMD_TO_EN", 24, 1 },
		{ "CL7_WR_CMD_TO_EN", 23, 1 },
		{ "CL6_WR_CMD_TO_EN", 22, 1 },
		{ "CL5_WR_CMD_TO_EN", 21, 1 },
		{ "CL4_WR_CMD_TO_EN", 20, 1 },
		{ "CL3_WR_CMD_TO_EN", 19, 1 },
		{ "CL2_WR_CMD_TO_EN", 18, 1 },
		{ "CL1_WR_CMD_TO_EN", 17, 1 },
		{ "CL0_WR_CMD_TO_EN", 16, 1 },
		{ "FUTURE_DEXPANSION_WTE", 15, 1 },
		{ "CL14_WR_DATA_TO_EN", 14, 1 },
		{ "CL13_WR_DATA_TO_EN", 13, 1 },
		{ "CL12_WR_DATA_TO_EN", 12, 1 },
		{ "CL11_WR_DATA_TO_EN", 11, 1 },
		{ "CL10_WR_DATA_TO_EN", 10, 1 },
		{ "CL9_WR_DATA_TO_EN", 9, 1 },
		{ "CL8_WR_DATA_TO_EN", 8, 1 },
		{ "CL7_WR_DATA_TO_EN", 7, 1 },
		{ "CL6_WR_DATA_TO_EN", 6, 1 },
		{ "CL5_WR_DATA_TO_EN", 5, 1 },
		{ "CL4_WR_DATA_TO_EN", 4, 1 },
		{ "CL3_WR_DATA_TO_EN", 3, 1 },
		{ "CL2_WR_DATA_TO_EN", 2, 1 },
		{ "CL1_WR_DATA_TO_EN", 1, 1 },
		{ "CL0_WR_DATA_TO_EN", 0, 1 },
	{ "MA_WRITE_TIMEOUT_ERROR_STATUS", 0x78d8, 0 },
		{ "FUTURE_CEXPANSION_WTS", 31, 1 },
		{ "CL14_WR_CMD_TO_ERROR", 30, 1 },
		{ "CL13_WR_CMD_TO_ERROR", 29, 1 },
		{ "CL12_WR_CMD_TO_ERROR", 28, 1 },
		{ "CL11_WR_CMD_TO_ERROR", 27, 1 },
		{ "CL10_WR_CMD_TO_ERROR", 26, 1 },
		{ "CL9_WR_CMD_TO_ERROR", 25, 1 },
		{ "CL8_WR_CMD_TO_ERROR", 24, 1 },
		{ "CL7_WR_CMD_TO_ERROR", 23, 1 },
		{ "CL6_WR_CMD_TO_ERROR", 22, 1 },
		{ "CL5_WR_CMD_TO_ERROR", 21, 1 },
		{ "CL4_WR_CMD_TO_ERROR", 20, 1 },
		{ "CL3_WR_CMD_TO_ERROR", 19, 1 },
		{ "CL2_WR_CMD_TO_ERROR", 18, 1 },
		{ "CL1_WR_CMD_TO_ERROR", 17, 1 },
		{ "CL0_WR_CMD_TO_ERROR", 16, 1 },
		{ "FUTURE_DEXPANSION_WTS", 15, 1 },
		{ "CL14_WR_DATA_TO_ERROR", 14, 1 },
		{ "CL13_WR_DATA_TO_ERROR", 13, 1 },
		{ "CL12_WR_DATA_TO_ERROR", 12, 1 },
		{ "CL11_WR_DATA_TO_ERROR", 11, 1 },
		{ "CL10_WR_DATA_TO_ERROR", 10, 1 },
		{ "CL9_WR_DATA_TO_ERROR", 9, 1 },
		{ "CL8_WR_DATA_TO_ERROR", 8, 1 },
		{ "CL7_WR_DATA_TO_ERROR", 7, 1 },
		{ "CL6_WR_DATA_TO_ERROR", 6, 1 },
		{ "CL5_WR_DATA_TO_ERROR", 5, 1 },
		{ "CL4_WR_DATA_TO_ERROR", 4, 1 },
		{ "CL3_WR_DATA_TO_ERROR", 3, 1 },
		{ "CL2_WR_DATA_TO_ERROR", 2, 1 },
		{ "CL1_WR_DATA_TO_ERROR", 1, 1 },
		{ "CL0_WR_DATA_TO_ERROR", 0, 1 },
	{ "MA_READ_TIMEOUT_ERROR_ENABLE", 0x78dc, 0 },
		{ "FUTURE_CEXPANSION_RTE", 31, 1 },
		{ "CL14_RD_CMD_TO_EN", 30, 1 },
		{ "CL13_RD_CMD_TO_EN", 29, 1 },
		{ "CL12_RD_CMD_TO_EN", 28, 1 },
		{ "CL11_RD_CMD_TO_EN", 27, 1 },
		{ "CL10_RD_CMD_TO_EN", 26, 1 },
		{ "CL9_RD_CMD_TO_EN", 25, 1 },
		{ "CL8_RD_CMD_TO_EN", 24, 1 },
		{ "CL7_RD_CMD_TO_EN", 23, 1 },
		{ "CL6_RD_CMD_TO_EN", 22, 1 },
		{ "CL5_RD_CMD_TO_EN", 21, 1 },
		{ "CL4_RD_CMD_TO_EN", 20, 1 },
		{ "CL3_RD_CMD_TO_EN", 19, 1 },
		{ "CL2_RD_CMD_TO_EN", 18, 1 },
		{ "CL1_RD_CMD_TO_EN", 17, 1 },
		{ "CL0_RD_CMD_TO_EN", 16, 1 },
		{ "FUTURE_DEXPANSION_RTE", 15, 1 },
		{ "CL14_RD_DATA_TO_EN", 14, 1 },
		{ "CL13_RD_DATA_TO_EN", 13, 1 },
		{ "CL12_RD_DATA_TO_EN", 12, 1 },
		{ "CL11_RD_DATA_TO_EN", 11, 1 },
		{ "CL10_RD_DATA_TO_EN", 10, 1 },
		{ "CL9_RD_DATA_TO_EN", 9, 1 },
		{ "CL8_RD_DATA_TO_EN", 8, 1 },
		{ "CL7_RD_DATA_TO_EN", 7, 1 },
		{ "CL6_RD_DATA_TO_EN", 6, 1 },
		{ "CL5_RD_DATA_TO_EN", 5, 1 },
		{ "CL4_RD_DATA_TO_EN", 4, 1 },
		{ "CL3_RD_DATA_TO_EN", 3, 1 },
		{ "CL2_RD_DATA_TO_EN", 2, 1 },
		{ "CL1_RD_DATA_TO_EN", 1, 1 },
		{ "CL0_RD_DATA_TO_EN", 0, 1 },
	{ "MA_READ_TIMEOUT_ERROR_STATUS", 0x78e0, 0 },
		{ "FUTURE_CEXPANSION_RTS", 31, 1 },
		{ "CL14_RD_CMD_TO_ERROR", 30, 1 },
		{ "CL13_RD_CMD_TO_ERROR", 29, 1 },
		{ "CL12_RD_CMD_TO_ERROR", 28, 1 },
		{ "CL11_RD_CMD_TO_ERROR", 27, 1 },
		{ "CL10_RD_CMD_TO_ERROR", 26, 1 },
		{ "CL9_RD_CMD_TO_ERROR", 25, 1 },
		{ "CL8_RD_CMD_TO_ERROR", 24, 1 },
		{ "CL7_RD_CMD_TO_ERROR", 23, 1 },
		{ "CL6_RD_CMD_TO_ERROR", 22, 1 },
		{ "CL5_RD_CMD_TO_ERROR", 21, 1 },
		{ "CL4_RD_CMD_TO_ERROR", 20, 1 },
		{ "CL3_RD_CMD_TO_ERROR", 19, 1 },
		{ "CL2_RD_CMD_TO_ERROR", 18, 1 },
		{ "CL1_RD_CMD_TO_ERROR", 17, 1 },
		{ "CL0_RD_CMD_TO_ERROR", 16, 1 },
		{ "FUTURE_DEXPANSION_RTS", 14, 2 },
		{ "CL13_RD_DATA_TO_ERROR", 13, 1 },
		{ "CL12_RD_DATA_TO_ERROR", 12, 1 },
		{ "CL11_RD_DATA_TO_ERROR", 11, 1 },
		{ "CL10_RD_DATA_TO_ERROR", 10, 1 },
		{ "CL9_RD_DATA_TO_ERROR", 9, 1 },
		{ "CL8_RD_DATA_TO_ERROR", 8, 1 },
		{ "CL7_RD_DATA_TO_ERROR", 7, 1 },
		{ "CL6_RD_DATA_TO_ERROR", 6, 1 },
		{ "CL5_RD_DATA_TO_ERROR", 5, 1 },
		{ "CL4_RD_DATA_TO_ERROR", 4, 1 },
		{ "CL3_RD_DATA_TO_ERROR", 3, 1 },
		{ "CL2_RD_DATA_TO_ERROR", 2, 1 },
		{ "CL1_RD_DATA_TO_ERROR", 1, 1 },
		{ "CL0_RD_DATA_TO_ERROR", 0, 1 },
	{ "MA_BKP_CNT_SEL", 0x78e4, 0 },
		{ "TYPE", 30, 2 },
		{ "CLIENT", 24, 4 },
	{ "MA_BKP_CNT", 0x78e8, 0 },
	{ "MA_WRT_ARB", 0x78ec, 0 },
		{ "WRT_EN", 31, 1 },
		{ "WR_TIM", 16, 8 },
		{ "RD_WIN", 8, 8 },
		{ "WR_WIN", 0, 8 },
	{ "MA_IF_PARITY_ERROR_ENABLE", 0x78f0, 0 },
		{ "FUTURE_DEXPANSION_IPE", 14, 18 },
		{ "CL13_IF_PAR_EN", 13, 1 },
		{ "CL12_IF_PAR_EN", 12, 1 },
		{ "CL11_IF_PAR_EN", 11, 1 },
		{ "CL10_IF_PAR_EN", 10, 1 },
		{ "CL9_IF_PAR_EN", 9, 1 },
		{ "CL8_IF_PAR_EN", 8, 1 },
		{ "CL7_IF_PAR_EN", 7, 1 },
		{ "CL6_IF_PAR_EN", 6, 1 },
		{ "CL5_IF_PAR_EN", 5, 1 },
		{ "CL4_IF_PAR_EN", 4, 1 },
		{ "CL3_IF_PAR_EN", 3, 1 },
		{ "CL2_IF_PAR_EN", 2, 1 },
		{ "CL1_IF_PAR_EN", 1, 1 },
		{ "CL0_IF_PAR_EN", 0, 1 },
	{ "MA_IF_PARITY_ERROR_STATUS", 0x78f4, 0 },
		{ "FUTURE_DEXPANSION_IPS", 14, 18 },
		{ "CL13_IF_PAR_ERROR", 13, 1 },
		{ "CL12_IF_PAR_ERROR", 12, 1 },
		{ "CL11_IF_PAR_ERROR", 11, 1 },
		{ "CL10_IF_PAR_ERROR", 10, 1 },
		{ "CL9_IF_PAR_ERROR", 9, 1 },
		{ "CL8_IF_PAR_ERROR", 8, 1 },
		{ "CL7_IF_PAR_ERROR", 7, 1 },
		{ "CL6_IF_PAR_ERROR", 6, 1 },
		{ "CL5_IF_PAR_ERROR", 5, 1 },
		{ "CL4_IF_PAR_ERROR", 4, 1 },
		{ "CL3_IF_PAR_ERROR", 3, 1 },
		{ "CL2_IF_PAR_ERROR", 2, 1 },
		{ "CL1_IF_PAR_ERROR", 1, 1 },
		{ "CL0_IF_PAR_ERROR", 0, 1 },
	{ "MA_LOCAL_DEBUG_CFG", 0x78f8, 0 },
		{ "DEBUG_OR", 15, 1 },
		{ "DEBUG_HI", 14, 1 },
		{ "DEBUG_RPT", 13, 1 },
		{ "DEBUGPAGE", 10, 3 },
		{ "DEBUGSELH", 5, 5 },
		{ "DEBUGSELL", 0, 5 },
	{ "MA_LOCAL_DEBUG_RPT", 0x78fc, 0 },
	{ "MA_DBG_CTL", 0x77a4, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG", 16, 1 },
		{ "SEL", 0, 8 },
	{ "MA_DBG_DATA", 0x77a8, 0 },
	{ "MA_CLIENT13_PR_THRESHOLD", 0x7900, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT13_CR_THRESHOLD", 0x7904, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CRYPTO_DEBUG_CNT", 0x7908, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_CRYPTO_WRDATA_CNT", 0x790c, 0 },
	{ "MA_CRYPTO_RDDATA_CNT", 0x7910, 0 },
	{ "MA_LOCAL_DEBUG_PERF_CFG", 0x7914, 0 },
		{ "DEBUG_OR", 15, 1 },
		{ "DEBUG_HI", 14, 1 },
		{ "DEBUG_RPT", 13, 1 },
		{ "DEBUGPAGE", 10, 3 },
		{ "DEBUGSELH", 5, 5 },
		{ "DEBUGSELL", 0, 5 },
	{ "MA_LOCAL_DEBUG_PERF_RPT", 0x7918, 0 },
	{ "MA_PCIE_THROTTLE", 0x791c, 0 },
		{ "FL_ENABLE", 31, 1 },
		{ "FL_LIMIT", 0, 8 },
	{ "MA_CLIENT14_PR_THRESHOLD", 0x7920, 0 },
		{ "THRESHOLD1_EN", 31, 1 },
		{ "THRESHOLD1", 16, 15 },
		{ "THRESHOLD0_EN", 15, 1 },
		{ "THRESHOLD0", 0, 15 },
	{ "MA_CLIENT14_CR_THRESHOLD", 0x7924, 0 },
		{ "CREDITSHAPER_EN", 31, 1 },
		{ "CREDIT_MAX", 16, 12 },
		{ "CREDIT_VAL", 0, 12 },
	{ "MA_CIM_TH1_DEBUG_CNT", 0x7928, 0 },
		{ "DBG_READ_DATA_CNT", 24, 8 },
		{ "DBG_READ_REQ_CNT", 16, 8 },
		{ "DBG_WRITE_DATA_CNT", 8, 8 },
		{ "DBG_WRITE_REQ_CNT", 0, 8 },
	{ "MA_CIM_TH1_WRDATA_CNT", 0x792c, 0 },
	{ "MA_CIM_TH1_RDDATA_CNT", 0x7930, 0 },
	{ "MA_CIM_THREAD1_MAPPER", 0x7934, 0 },
	{ "MA_PIO_CI_SGE_TH0_BASE", 0x7938, 0 },
	{ "MA_PIO_CI_SGE_TH1_BASE", 0x793c, 0 },
	{ "MA_PIO_CI_ULPTX_BASE", 0x7940, 0 },
	{ "MA_PIO_CI_ULPRX_BASE", 0x7944, 0 },
	{ "MA_PIO_CI_ULPTXRX_BASE", 0x7948, 0 },
	{ "MA_PIO_CI_TP_TH0_BASE", 0x794c, 0 },
	{ "MA_PIO_CI_TP_TH1_BASE", 0x7950, 0 },
	{ "MA_PIO_CI_LE_BASE", 0x7954, 0 },
	{ "MA_PIO_CI_CIM_TH0_BASE", 0x7958, 0 },
	{ "MA_PIO_CI_PCIE_BASE", 0x795c, 0 },
	{ "MA_PIO_CI_PMTX_BASE", 0x7960, 0 },
	{ "MA_PIO_CI_PMRX_BASE", 0x7964, 0 },
	{ "MA_PIO_CI_HMA_BASE", 0x7968, 0 },
	{ "MA_PIO_CI_CRYPTO_BASE", 0x796c, 0 },
	{ "MA_PIO_CI_CIM_TH1_BASE", 0x7970, 0 },
	{ NULL }
};

struct reg_info t7_cim_regs[] = {
	{ "CIM_BOOT_CFG", 0x7b00, 0 },
		{ "BootAddr", 8, 24 },
		{ "uPGen", 2, 6 },
		{ "BootSdram", 1, 1 },
		{ "uPCRst", 0, 1 },
	{ "CIM_BOOT_LEN", 0x7bf0, 0 },
		{ "BootLen", 4, 28 },
	{ "CIM_PERR_ENABLE", 0x7b08, 0 },
		{ "ma_cim_IntfPerr", 31, 1 },
		{ "MBHostParErr", 30, 1 },
		{ "MaArbInvRspTag", 29, 1 },
		{ "MaArbFIFOParErr", 28, 1 },
		{ "SemSramParErr", 27, 1 },
		{ "RSACParErr", 26, 1 },
		{ "RSADParErr", 25, 1 },
		{ "PLCIM_MstRspDataParErr", 24, 1 },
		{ "PCIE2CIMIntfParErr", 23, 1 },
		{ "NCSI2CIMIntfParErr", 22, 1 },
		{ "SGE2CIMIntfParErr", 21, 1 },
		{ "ULP2CIMIntfParErr", 20, 1 },
		{ "TP2CIMIntfParErr", 19, 1 },
		{ "Core7ParErr", 18, 1 },
		{ "Core6ParErr", 17, 1 },
		{ "Core5ParErr", 16, 1 },
		{ "Core4ParErr", 15, 1 },
		{ "Core3ParErr", 14, 1 },
		{ "Core2ParErr", 13, 1 },
		{ "Core1ParErr", 12, 1 },
		{ "GftParErr", 10, 1 },
		{ "MPSRspDataParErr", 9, 1 },
		{ "ER_RspDataParErr", 8, 1 },
		{ "FlowFIFOParErr", 7, 1 },
		{ "ObqSramParErr", 6, 1 },
		{ "TieQOutParErr", 3, 1 },
		{ "TieQInParErr", 2, 1 },
		{ "PifRspParErr", 1, 1 },
		{ "PifReqParErr", 0, 1 },
	{ "CIM_PERR_CAUSE", 0x7b0c, 0 },
		{ "ma_cim_IntfPerr", 31, 1 },
		{ "MBHostParErr", 30, 1 },
		{ "MaArbInvRspTag", 29, 1 },
		{ "MaArbFIFOParErr", 28, 1 },
		{ "SemSramParErr", 27, 1 },
		{ "RSACParErr", 26, 1 },
		{ "RSADParErr", 25, 1 },
		{ "PLCIM_MstRspDataParErr", 24, 1 },
		{ "PCIE2CIMIntfParErr", 23, 1 },
		{ "NCSI2CIMIntfParErr", 22, 1 },
		{ "SGE2CIMIntfParErr", 21, 1 },
		{ "ULP2CIMIntfParErr", 20, 1 },
		{ "TP2CIMIntfParErr", 19, 1 },
		{ "Core7ParErr", 18, 1 },
		{ "Core6ParErr", 17, 1 },
		{ "Core5ParErr", 16, 1 },
		{ "Core4ParErr", 15, 1 },
		{ "Core3ParErr", 14, 1 },
		{ "Core2ParErr", 13, 1 },
		{ "Core1ParErr", 12, 1 },
		{ "GftParErr", 10, 1 },
		{ "MPSRspDataParErr", 9, 1 },
		{ "ER_RspDataParErr", 8, 1 },
		{ "FlowFIFOParErr", 7, 1 },
		{ "ObqSramParErr", 6, 1 },
		{ "TieQOutParErr", 3, 1 },
		{ "TieQInParErr", 2, 1 },
		{ "PifRspParErr", 1, 1 },
		{ "PifReqParErr", 0, 1 },
	{ "CIM_UP_SPARE_INT", 0x7b24, 0 },
		{ "TDebugInt", 4, 1 },
		{ "BootVecSel", 3, 1 },
		{ "uPSpareInt", 0, 3 },
	{ "CIM_HOST_INT_ENABLE", 0x7b28, 0 },
		{ "Core7AccInt", 22, 1 },
		{ "Core6AccInt", 21, 1 },
		{ "Core5AccInt", 20, 1 },
		{ "Core4AccInt", 19, 1 },
		{ "Core3AccInt", 18, 1 },
		{ "Core2AccInt", 17, 1 },
		{ "Core1AccInt", 16, 1 },
		{ "Timer1IntEn", 3, 1 },
		{ "Timer0IntEn", 2, 1 },
		{ "PErrNonZero", 1, 1 },
	{ "CIM_HOST_INT_CAUSE", 0x7b2c, 0 },
		{ "Core7AccInt", 22, 1 },
		{ "Core6AccInt", 21, 1 },
		{ "Core5AccInt", 20, 1 },
		{ "Core4AccInt", 19, 1 },
		{ "Core3AccInt", 18, 1 },
		{ "Core2AccInt", 17, 1 },
		{ "Core1AccInt", 16, 1 },
		{ "Timer1Int", 3, 1 },
		{ "Timer0Int", 2, 1 },
		{ "PErrNonZero", 1, 1 },
		{ "uPAccNonZero", 0, 1 },
	{ "CIM_HOST_UPACC_INT_ENABLE", 0x7b30, 0 },
		{ "ConWrErrIntEn", 31, 1 },
		{ "EEPROMWRIntEn", 30, 1 },
		{ "TimeOutMAIntEn", 29, 1 },
		{ "TimeOutIntEn", 28, 1 },
		{ "RspOvrLookupIntEn", 27, 1 },
		{ "ReqOvrLookupIntEn", 26, 1 },
		{ "BlkWrPlIntEn", 25, 1 },
		{ "BlkRdPlIntEn", 24, 1 },
		{ "SglWrPlIntEn", 23, 1 },
		{ "SglRdPlIntEn", 22, 1 },
		{ "BlkWrCtlIntEn", 21, 1 },
		{ "BlkRdCtlIntEn", 20, 1 },
		{ "SglWrCtlIntEn", 19, 1 },
		{ "SglRdCtlIntEn", 18, 1 },
		{ "BlkWrEEPROMIntEn", 17, 1 },
		{ "BlkRdEEPROMIntEn", 16, 1 },
		{ "SglWrEEPROMIntEn", 15, 1 },
		{ "SglRdEEPROMIntEn", 14, 1 },
		{ "BlkWrFlashIntEn", 13, 1 },
		{ "BlkRdFlashIntEn", 12, 1 },
		{ "SglWrFlashIntEn", 11, 1 },
		{ "SglRdFlashIntEn", 10, 1 },
		{ "BlkWrBootIntEn", 9, 1 },
		{ "BlkRdBootIntEn", 8, 1 },
		{ "SglWrBootIntEn", 7, 1 },
		{ "SglRdBootIntEn", 6, 1 },
		{ "IllWrBEIntEn", 5, 1 },
		{ "IllRdBEIntEn", 4, 1 },
		{ "IllRdIntEn", 3, 1 },
		{ "IllWrIntEn", 2, 1 },
		{ "IllTransIntEn", 1, 1 },
		{ "RsvdSpaceIntEn", 0, 1 },
	{ "CIM_HOST_UPACC_INT_CAUSE", 0x7b34, 0 },
		{ "ConWrErrInt", 31, 1 },
		{ "EEPROMWRInt", 30, 1 },
		{ "TimeOutMAInt", 29, 1 },
		{ "TimeOutInt", 28, 1 },
		{ "RspOvrLookupInt", 27, 1 },
		{ "ReqOvrLookupInt", 26, 1 },
		{ "BlkWrPlInt", 25, 1 },
		{ "BlkRdPlInt", 24, 1 },
		{ "SglWrPlInt", 23, 1 },
		{ "SglRdPlInt", 22, 1 },
		{ "BlkWrCtlInt", 21, 1 },
		{ "BlkRdCtlInt", 20, 1 },
		{ "SglWrCtlInt", 19, 1 },
		{ "SglRdCtlInt", 18, 1 },
		{ "BlkWrEEPROMInt", 17, 1 },
		{ "BlkRdEEPROMInt", 16, 1 },
		{ "SglWrEEPROMInt", 15, 1 },
		{ "SglRdEEPROMInt", 14, 1 },
		{ "BlkWrFlashInt", 13, 1 },
		{ "BlkRdFlashInt", 12, 1 },
		{ "SglWrFlashInt", 11, 1 },
		{ "SglRdFlashInt", 10, 1 },
		{ "BlkWrBootInt", 9, 1 },
		{ "BlkRdBootInt", 8, 1 },
		{ "SglWrBootInt", 7, 1 },
		{ "SglRdBootInt", 6, 1 },
		{ "IllWrBEInt", 5, 1 },
		{ "IllRdBEInt", 4, 1 },
		{ "IllRdInt", 3, 1 },
		{ "IllWrInt", 2, 1 },
		{ "IllTransInt", 1, 1 },
		{ "RsvdSpaceInt", 0, 1 },
	{ "CIM_UP_INT_ENABLE", 0x7b38, 0 },
		{ "Core7AccInt", 22, 1 },
		{ "Core6AccInt", 21, 1 },
		{ "Core5AccInt", 20, 1 },
		{ "Core4AccInt", 19, 1 },
		{ "Core3AccInt", 18, 1 },
		{ "Core2AccInt", 17, 1 },
		{ "Core1AccInt", 16, 1 },
		{ "SemInt", 8, 1 },
		{ "RSAInt", 7, 1 },
		{ "TrngInt", 6, 1 },
		{ "PeerHaltInt", 5, 1 },
		{ "MstPlIntEn", 4, 1 },
		{ "Timer1IntEn", 3, 1 },
		{ "Timer0IntEn", 2, 1 },
		{ "PErrNonZero", 1, 1 },
	{ "CIM_UP_INT_CAUSE", 0x7b3c, 0 },
		{ "Core7AccInt", 22, 1 },
		{ "Core6AccInt", 21, 1 },
		{ "Core5AccInt", 20, 1 },
		{ "Core4AccInt", 19, 1 },
		{ "Core3AccInt", 18, 1 },
		{ "Core2AccInt", 17, 1 },
		{ "Core1AccInt", 16, 1 },
		{ "SemInt", 8, 1 },
		{ "RSAInt", 7, 1 },
		{ "TrngInt", 6, 1 },
		{ "PeerHaltInt", 5, 1 },
		{ "MstPlInt", 4, 1 },
		{ "Timer1Int", 3, 1 },
		{ "Timer0Int", 2, 1 },
		{ "PErrNonZero", 1, 1 },
		{ "uPAccNonZero", 0, 1 },
	{ "CIM_UP_ACC_INT_ENABLE", 0x7b40, 0 },
		{ "ConWrErrInt", 31, 1 },
		{ "EEPROMWRIntEn", 30, 1 },
		{ "TimeOutMAIntEn", 29, 1 },
		{ "TimeOutIntEn", 28, 1 },
		{ "RspOvrLookupIntEn", 27, 1 },
		{ "ReqOvrLookupIntEn", 26, 1 },
		{ "BlkWrPlIntEn", 25, 1 },
		{ "BlkRdPlIntEn", 24, 1 },
		{ "SglWrPlIntEn", 23, 1 },
		{ "SglRdPlIntEn", 22, 1 },
		{ "BlkWrCtlIntEn", 21, 1 },
		{ "BlkRdCtlIntEn", 20, 1 },
		{ "SglWrCtlIntEn", 19, 1 },
		{ "SglRdCtlIntEn", 18, 1 },
		{ "BlkWrEEPROMIntEn", 17, 1 },
		{ "BlkRdEEPROMIntEn", 16, 1 },
		{ "SglWrEEPROMIntEn", 15, 1 },
		{ "SglRdEEPROMIntEn", 14, 1 },
		{ "BlkWrFlashIntEn", 13, 1 },
		{ "BlkRdFlashIntEn", 12, 1 },
		{ "SglWrFlashIntEn", 11, 1 },
		{ "SglRdFlashIntEn", 10, 1 },
		{ "BlkWrBootIntEn", 9, 1 },
		{ "BlkRdBootIntEn", 8, 1 },
		{ "SglWrBootIntEn", 7, 1 },
		{ "SglRdBootIntEn", 6, 1 },
		{ "IllWrBEIntEn", 5, 1 },
		{ "IllRdBEIntEn", 4, 1 },
		{ "IllRdIntEn", 3, 1 },
		{ "IllWrIntEn", 2, 1 },
		{ "IllTransIntEn", 1, 1 },
		{ "RsvdSpaceIntEn", 0, 1 },
	{ "CIM_UP_ACC_INT_CAUSE", 0x7b44, 0 },
		{ "ConWrErrInt", 31, 1 },
		{ "EEPROMWRInt", 30, 1 },
		{ "TimeOutMAInt", 29, 1 },
		{ "TimeOutInt", 28, 1 },
		{ "RspOvrLookupInt", 27, 1 },
		{ "ReqOvrLookupInt", 26, 1 },
		{ "BlkWrPlInt", 25, 1 },
		{ "BlkRdPlInt", 24, 1 },
		{ "SglWrPlInt", 23, 1 },
		{ "SglRdPlInt", 22, 1 },
		{ "BlkWrCtlInt", 21, 1 },
		{ "BlkRdCtlInt", 20, 1 },
		{ "SglWrCtlInt", 19, 1 },
		{ "SglRdCtlInt", 18, 1 },
		{ "BlkWrEEPROMInt", 17, 1 },
		{ "BlkRdEEPROMInt", 16, 1 },
		{ "SglWrEEPROMInt", 15, 1 },
		{ "SglRdEEPROMInt", 14, 1 },
		{ "BlkWrFlashInt", 13, 1 },
		{ "BlkRdFlashInt", 12, 1 },
		{ "SglWrFlashInt", 11, 1 },
		{ "SglRdFlashInt", 10, 1 },
		{ "BlkWrBootInt", 9, 1 },
		{ "BlkRdBootInt", 8, 1 },
		{ "SglWrBootInt", 7, 1 },
		{ "SglRdBootInt", 6, 1 },
		{ "IllWrBEInt", 5, 1 },
		{ "IllRdBEInt", 4, 1 },
		{ "IllRdInt", 3, 1 },
		{ "IllWrInt", 2, 1 },
		{ "IllTransInt", 1, 1 },
		{ "RsvdSpaceInt", 0, 1 },
	{ "CIM_QUEUE_CONFIG_REF", 0x7b48, 0 },
		{ "MapOffset", 11, 5 },
		{ "MapSelect", 10, 1 },
		{ "CoreSelect", 6, 4 },
		{ "OBQSelect", 5, 1 },
		{ "IBQSelect", 4, 1 },
		{ "QueNumSelect", 0, 4 },
	{ "CIM_QUEUE_CONFIG_CTRL", 0x7b4c, 0 },
		{ "Que1KEn", 30, 1 },
		{ "QueSize", 24, 6 },
		{ "QueBase", 16, 6 },
		{ "QueFullThrsh", 0, 9 },
	{ "CIM_HOST_ACC_CTRL", 0x7b50, 0 },
		{ "HostBusy", 31, 1 },
		{ "HostWrite", 30, 1 },
		{ "HostGrpSel", 28, 2 },
		{ "HostCoreSel", 24, 4 },
		{ "HostAddr", 0, 24 },
	{ "CIM_HOST_ACC_DATA", 0x7b54, 0 },
	{ "CIM_DEBUG_CFG", 0x7b58, 0 },
		{ "OR_EN", 20, 1 },
		{ "USEL", 19, 1 },
		{ "HI", 18, 1 },
		{ "SELH", 9, 9 },
		{ "SELL", 0, 9 },
	{ "CIM_DEBUG_DATA", 0x7b5c, 0 },
	{ "CIM_IBQ_DBG_CFG", 0x7b60, 0 },
		{ "IbqDbgCore", 28, 4 },
		{ "IbqDbgAddr", 12, 13 },
		{ "IbqDbgState", 4, 2 },
		{ "PerrAddrClr", 3, 1 },
		{ "IbqDbgBusy", 1, 1 },
		{ "IbqDbgEn", 0, 1 },
	{ "CIM_OBQ_DBG_CFG", 0x7b64, 0 },
		{ "ObqDbgCore", 28, 4 },
		{ "ObqDbgAddr", 12, 13 },
		{ "ObqDbgState", 4, 2 },
		{ "ObqDbgBusy", 1, 1 },
		{ "ObqDbgEn", 0, 1 },
	{ "CIM_IBQ_DBG_DATA", 0x7b68, 0 },
	{ "CIM_OBQ_DBG_DATA", 0x7b6c, 0 },
	{ "CIM_DEBUGCFG", 0x7b70, 0 },
		{ "POLADbgRdPtr", 23, 9 },
		{ "PILADbgRdPtr", 14, 9 },
		{ "LAMaskTrig", 13, 1 },
		{ "LADbgEn", 12, 1 },
		{ "LAFillOnce", 11, 1 },
		{ "LAMaskStop", 10, 1 },
	{ "CIM_DEBUGSTS", 0x7b74, 0 },
		{ "LAReset", 31, 1 },
		{ "POLADbgWrPtr", 16, 9 },
		{ "PILADbgWrPtr", 0, 9 },
	{ "CIM_PO_LA_DEBUGDATA", 0x7b78, 0 },
	{ "CIM_PI_LA_DEBUGDATA", 0x7b7c, 0 },
	{ "CIM_PO_LA_MADEBUGDATA", 0x7b80, 0 },
	{ "CIM_PI_LA_MADEBUGDATA", 0x7b84, 0 },
	{ "CIM_PO_LA_PIFSMDEBUGDATA", 0x7b8c, 0 },
	{ "CIM_MEM_ZONE0_VA", 0x7b90, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE0_BA", 0x7b94, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE0_LEN", 0x7b98, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE1_VA", 0x7b9c, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE1_BA", 0x7ba0, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE1_LEN", 0x7ba4, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE2_VA", 0x7ba8, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE2_BA", 0x7bac, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE2_LEN", 0x7bb0, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE3_VA", 0x7bb4, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE3_BA", 0x7bb8, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE3_LEN", 0x7bbc, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE4_VA", 0x7bc0, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE4_BA", 0x7bc4, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE4_LEN", 0x7bc8, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE5_VA", 0x7bcc, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE5_BA", 0x7bd0, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE5_LEN", 0x7bd4, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE6_VA", 0x7bd8, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE6_BA", 0x7bdc, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE6_LEN", 0x7be0, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_MEM_ZONE7_VA", 0x7be4, 0 },
		{ "MEM_ZONE_VA", 4, 28 },
	{ "CIM_MEM_ZONE7_BA", 0x7be8, 0 },
		{ "MEM_ZONE_BA", 6, 26 },
		{ "THREAD_ID", 2, 3 },
		{ "ZONE_DST", 0, 2 },
	{ "CIM_MEM_ZONE7_LEN", 0x7bec, 0 },
		{ "MEM_ZONE_LEN", 4, 28 },
	{ "CIM_GLB_TIMER_CTL", 0x7bf4, 0 },
		{ "Timer1En", 4, 1 },
		{ "Timer0En", 3, 1 },
		{ "TimerEn", 1, 1 },
	{ "CIM_GLB_TIMER", 0x7bf8, 0 },
	{ "CIM_GLB_TIMER_TICK", 0x7bfc, 0 },
	{ "CIM_TIMER0", 0x7c00, 0 },
	{ "CIM_TIMER1", 0x7c04, 0 },
	{ "CIM_DEBUG_ADDR_TIMEOUT", 0x7c08, 0 },
		{ "DAddrTimeOut", 2, 30 },
		{ "DAddrTimeOutType", 0, 2 },
	{ "CIM_DEBUG_ADDR_ILLEGAL", 0x7c0c, 0 },
		{ "DAddrIllegal", 2, 30 },
		{ "DAddrIllegalType", 0, 2 },
	{ "CIM_DEBUG_PIF_CAUSE_MASK", 0x7c10, 0 },
	{ "CIM_DEBUG_PIF_UPACC_CAUSE_MASK", 0x7c14, 0 },
	{ "CIM_DEBUG_UP_CAUSE_MASK", 0x7c18, 0 },
	{ "CIM_DEBUG_UP_UPACC_CAUSE_MASK", 0x7c1c, 0 },
	{ "CIM_FPGA_ROM_EFUSE_CMD", 0x7c20, 0 },
	{ "CIM_FPGA_ROM_EFUSE_DATA", 0x7c24, 0 },
	{ "CIM_EEPROM_BUSY_BIT", 0x7c28, 0 },
	{ "CIM_MA_TIMER_EN", 0x7c2c, 0 },
		{ "FlashWrPageMore", 5, 1 },
		{ "FlashWrEnable", 4, 1 },
		{ "FlashMoreEnable", 3, 1 },
		{ "wr_resp_enable", 2, 1 },
		{ "slow_timer_enable", 1, 1 },
		{ "ma_timer_enable", 0, 1 },
	{ "CIM_CIM_DEBUG_SPARE", 0x7c34, 0 },
	{ "CIM_UP_OPERATION_FREQ", 0x7c38, 0 },
	{ "CIM_CIM_IBQ_ERR_CODE", 0x7c3c, 0 },
		{ "CIM_ULP_TX_PKT_ERR_CODE", 16, 8 },
		{ "CIM_PCIE_PKT_ERR_CODE", 8, 8 },
		{ "CIM_SGE0_PKT_ERR_CODE", 0, 8 },
	{ "CIM_QUE_PERR_ADDR", 0x7c40, 0 },
		{ "IbqPerrAddr", 16, 12 },
		{ "ObqPerrAddr", 0, 12 },
	{ "CIM_CGEN", 0x7c48, 0 },
	{ "CIM_QUEUE_FEATURE_DISABLE", 0x7c4c, 0 },
		{ "ulp_obq_size", 8, 2 },
		{ "tp_ibq_size", 6, 2 },
		{ "obq_eom_enable", 5, 1 },
		{ "obq_throuttle_on_eop", 4, 1 },
		{ "obq_read_ctl_perf_mode_disable", 3, 1 },
		{ "obq_wait_for_eop_flush_disable", 2, 1 },
		{ "ibq_rra_dsbl", 1, 1 },
		{ "ibq_skid_fifo_eop_flsh_dsbl", 0, 1 },
	{ "CIM_CGEN_GLOBAL", 0x7c50, 0 },
	{ "CIM_DPSLP_EN", 0x7c54, 0 },
	{ "CIM_GFT_CMM_CONFIG", 0x7c58, 0 },
		{ "GlFl", 31, 1 },
		{ "WrCntIdle", 16, 15 },
		{ "RdThreshold", 8, 6 },
		{ "WrThrLevel2", 7, 1 },
		{ "WrThrLevel1", 6, 1 },
		{ "WrThrThreshEn", 5, 1 },
		{ "WrThrThresh", 0, 5 },
	{ "CIM_GFT_CONFIG", 0x7c5c, 0 },
		{ "GftMaBase", 16, 16 },
		{ "GftHashTblSize", 12, 4 },
		{ "GftTcamPriority", 11, 1 },
		{ "GftMaThreadId", 8, 3 },
		{ "GftTcamInit", 7, 1 },
		{ "GftTcamInitDone", 6, 1 },
		{ "GftTblModeEn", 0, 1 },
	{ "CIM_TCAM_BIST_CTRL", 0x7c60, 0 },
		{ "rst_cb", 31, 1 },
		{ "cb_start", 0, 28 },
	{ "CIM_TCAM_BIST_CB_PASS", 0x7c64, 0 },
	{ "CIM_TCAM_BIST_CB_BUSY", 0x7c68, 0 },
	{ "CIM_GFT_MASK", 0x7c70, 0 },
	{ "CIM_GFT_MASK", 0x7c74, 0 },
	{ "CIM_GFT_MASK", 0x7c78, 0 },
	{ "CIM_GFT_MASK", 0x7c7c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e240, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e244, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e248, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e24c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e250, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e254, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e258, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e25c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e260, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e264, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e268, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e26c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e270, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e274, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e278, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e27c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1e280, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1e284, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1e288, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1e28c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1e290, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e640, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e644, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e648, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e64c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e650, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e654, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e658, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e65c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e660, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e664, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e668, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e66c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e670, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e674, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e678, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1e67c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1e680, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1e684, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1e688, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1e68c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1e690, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea40, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea44, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea48, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea4c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea50, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea54, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea58, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea5c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea60, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea64, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea68, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea6c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea70, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea74, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea78, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ea7c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1ea80, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1ea84, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1ea88, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1ea8c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1ea90, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee40, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee44, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee48, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee4c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee50, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee54, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee58, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee5c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee60, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee64, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee68, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee6c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee70, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee74, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee78, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1ee7c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1ee80, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1ee84, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1ee88, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1ee8c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1ee90, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f240, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f244, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f248, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f24c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f250, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f254, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f258, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f25c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f260, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f264, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f268, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f26c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f270, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f274, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f278, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f27c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1f280, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1f284, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1f288, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1f28c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1f290, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f640, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f644, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f648, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f64c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f650, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f654, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f658, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f65c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f660, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f664, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f668, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f66c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f670, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f674, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f678, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1f67c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1f680, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1f684, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1f688, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1f68c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1f690, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa40, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa44, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa48, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa4c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa50, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa54, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa58, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa5c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa60, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa64, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa68, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa6c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa70, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa74, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa78, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fa7c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1fa80, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1fa84, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1fa88, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1fa8c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1fa90, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe40, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe44, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe48, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe4c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe50, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe54, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe58, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe5c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe60, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe64, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe68, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe6c, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe70, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe74, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe78, 0 },
	{ "CIM_PF_MAILBOX_DATA", 0x1fe7c, 0 },
	{ "CIM_PF_MAILBOX_CTRL", 0x1fe80, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1fe84, 0 },
		{ "MBWrBusy", 31, 1 },
	{ "CIM_PF_HOST_INT_ENABLE", 0x1fe88, 0 },
		{ "MBMsgRdyIntEn", 19, 1 },
	{ "CIM_PF_HOST_INT_CAUSE", 0x1fe8c, 0 },
		{ "MBMsgRdyInt", 19, 1 },
	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1fe90, 0 },
		{ "MBGeneric", 4, 28 },
		{ "MBMsgValid", 3, 1 },
		{ "MBIntReq", 2, 1 },
		{ "MBOwner", 0, 2 },
	{ NULL }
};

struct reg_info t7_tp_regs[] = {
	{ "TP_IN_CONFIG", 0x7d00, 0 },
		{ "VLANExtEnPort3", 31, 1 },
		{ "VLANExtEnPort2", 30, 1 },
		{ "VLANExtEnPort1", 29, 1 },
		{ "VLANExtEnPort0", 28, 1 },
		{ "TcpOptParserDisCh3", 27, 1 },
		{ "TcpOptParserDisCh2", 26, 1 },
		{ "TcpOptParserDisCh1", 25, 1 },
		{ "TcpOptParserDisCh0", 24, 1 },
		{ "CrcPassPrt3", 23, 1 },
		{ "CrcPassPrt2", 22, 1 },
		{ "CrcPassPrt1", 21, 1 },
		{ "CrcPassPrt0", 20, 1 },
		{ "VepaMode", 19, 1 },
		{ "FipUpEn", 18, 1 },
		{ "FcoeUpEn", 17, 1 },
		{ "FcoeEnable", 16, 1 },
		{ "IPv6Enable", 15, 1 },
		{ "NICMode", 14, 1 },
		{ "VnTagDefaultVal", 13, 1 },
		{ "ECheckUDPLen", 12, 1 },
		{ "EReportUdpHdrLen", 11, 1 },
		{ "FcoeFPMA", 10, 1 },
		{ "VnTagEnable", 9, 1 },
		{ "VnTagEthEnable", 8, 1 },
		{ "CChecksumCheckIP", 7, 1 },
		{ "CChecksumCheckUDP", 6, 1 },
		{ "CChecksumCheckTCP", 5, 1 },
		{ "CTag", 4, 1 },
		{ "CXoffOverride", 3, 1 },
		{ "EthUpEn", 2, 1 },
		{ "EGreDropEn", 1, 1 },
		{ "CFastDemuxEn", 0, 1 },
	{ "TP_OUT_CONFIG", 0x7d04, 0 },
		{ "PortQfcEn", 28, 4 },
		{ "EPktDistChn3", 23, 1 },
		{ "EPktDistChn2", 22, 1 },
		{ "EPktDistChn1", 21, 1 },
		{ "EPktDistChn0", 20, 1 },
		{ "TtlMode", 19, 1 },
		{ "EQfcDmac", 18, 1 },
		{ "ELpbkIncMpsStat", 17, 1 },
		{ "IPIDSplitMode", 16, 1 },
		{ "ETOEBypCSumNoWait", 15, 1 },
		{ "ENICCSumNoWait", 14, 1 },
		{ "CCplAckMode", 13, 1 },
		{ "RMWHintEnable", 12, 1 },
		{ "EChecksumInsertTCP", 11, 1 },
		{ "EChecksumInsertIP", 10, 1 },
		{ "EVnTagEn", 9, 1 },
		{ "EV6FlwEn", 8, 1 },
		{ "EPriority", 7, 1 },
		{ "EVlanPrio", 6, 1 },
		{ "CChecksumInsertTCP", 5, 1 },
		{ "CChecksumInsertIP", 4, 1 },
		{ "CRxPktEnc", 3, 1 },
		{ "CCPL", 2, 1 },
		{ "CRxPktXt", 1, 1 },
		{ "CEthernet", 0, 1 },
	{ "TP_GLOBAL_CONFIG", 0x7d08, 0 },
		{ "RXSACKParse", 31, 1 },
		{ "RXSACKFwdMode", 29, 2 },
		{ "SrvrChRssEn", 26, 1 },
		{ "RXFlowControlDisable", 25, 1 },
		{ "TXPacingEnable", 24, 1 },
		{ "LBChnDistEn", 23, 1 },
		{ "ActiveFilterCounts", 22, 1 },
		{ "ProtectedMode", 21, 1 },
		{ "EthTnlLen2x", 20, 1 },
		{ "EgLBChnDistEn", 19, 1 },
		{ "FiveTupleLookup", 17, 2 },
		{ "OfdMpsStats", 16, 1 },
		{ "DontFragment", 15, 1 },
		{ "IPIdentSplit", 14, 1 },
		{ "RssSynSteerEnable", 12, 1 },
		{ "IssFromCplEnable", 11, 1 },
		{ "RssLoopbackEnable", 10, 1 },
		{ "TCAMServerUse", 8, 2 },
		{ "IPTTL", 0, 8 },
	{ "TP_DB_CONFIG", 0x7d0c, 0 },
		{ "DBMaxOpCnt", 24, 8 },
		{ "CxMaxOpCntDisable", 23, 1 },
		{ "CxMaxOpCnt", 16, 7 },
		{ "TxMaxOpCntDisable", 15, 1 },
		{ "TxMaxOpCnt", 8, 7 },
		{ "RxMaxOpCntDisable", 7, 1 },
		{ "RxMaxOpCnt", 0, 7 },
	{ "TP_CMM_TCB_BASE", 0x7d10, 0 },
	{ "TP_CMM_MM_BASE", 0x7d14, 0 },
	{ "TP_CMM_TIMER_BASE", 0x7d18, 0 },
	{ "TP_CMM_MM_FLST_SIZE", 0x7d1c, 0 },
		{ "RxPoolSize", 16, 16 },
		{ "TxPoolSize", 0, 16 },
	{ "TP_PMM_TX_BASE", 0x7d20, 0 },
	{ "TP_PMM_DEFRAG_BASE", 0x7d24, 0 },
	{ "TP_PMM_RX_BASE", 0x7d28, 0 },
	{ "TP_PMM_RX_PAGE_SIZE", 0x7d2c, 0 },
	{ "TP_PMM_RX_MAX_PAGE", 0x7d30, 0 },
		{ "PMRxNumChn", 29, 3 },
		{ "PMRxMaxPage", 0, 21 },
	{ "TP_PMM_TX_PAGE_SIZE", 0x7d34, 0 },
	{ "TP_PMM_TX_MAX_PAGE", 0x7d38, 0 },
		{ "PMTxNumChn", 29, 3 },
		{ "PMTxMaxPage", 0, 21 },
	{ "TP_EXT_CONFIG", 0x7d3c, 0 },
		{ "TnlErrorIpSecARW", 29, 1 },
		{ "TnlErrorIpSecICV", 28, 1 },
		{ "DropErrorIpSecARW", 25, 1 },
		{ "DropErrorIpSecICV", 24, 1 },
		{ "MibRdmaRoceEn", 19, 1 },
		{ "MibRdmaiWarpEn", 18, 1 },
		{ "BypTxDataAckAllEn", 17, 1 },
		{ "DataAckExtEn", 16, 1 },
		{ "MacMatch11Fwd", 11, 1 },
		{ "UserTmstpEn", 10, 1 },
		{ "MmgrCacheDis", 9, 1 },
		{ "TxPktPackOutUdpEn", 8, 1 },
		{ "IPSecRoCECRCMode", 6, 2 },
		{ "IPSecIdxLoc", 5, 1 },
		{ "IPSecIdxCapEn", 4, 1 },
		{ "IPSecOfEn", 3, 1 },
		{ "IPSecCfg", 0, 3 },
	{ "TP_TCP_OPTIONS", 0x7d40, 0 },
		{ "MTUDefault", 16, 16 },
		{ "MTUEnable", 10, 1 },
		{ "SACKTx", 9, 1 },
		{ "SACKRx", 8, 1 },
		{ "SACKMode", 4, 2 },
		{ "WindowScaleMode", 2, 2 },
		{ "TimestampsMode", 0, 2 },
	{ "TP_DACK_CONFIG", 0x7d44, 0 },
		{ "AutoState3", 30, 2 },
		{ "AutoState2", 28, 2 },
		{ "AutoState1", 26, 2 },
		{ "ByteThreshold", 8, 18 },
		{ "MSSThreshold", 4, 3 },
		{ "AutoCareful", 2, 1 },
		{ "AutoEnable", 1, 1 },
		{ "Mode", 0, 1 },
	{ "TP_PC_CONFIG", 0x7d48, 0 },
		{ "EnableFinCheck", 31, 1 },
		{ "EnableOcspiFull", 30, 1 },
		{ "EnableFLMErrorDDP", 29, 1 },
		{ "LockTid", 28, 1 },
		{ "DisableInvPend", 27, 1 },
		{ "EnableFilterCount", 26, 1 },
		{ "RddpCongEn", 25, 1 },
		{ "EnableOnFlyPDU", 24, 1 },
		{ "EnableMinRcvWnd", 23, 1 },
		{ "EnableMaxRcvWnd", 22, 1 },
		{ "EnableMibVfPld", 21, 1 },
		{ "TxDeferEnable", 20, 1 },
		{ "RxCongestionMode", 19, 1 },
		{ "HearbeatOnceDACK", 18, 1 },
		{ "HearbeatOnceHeap", 17, 1 },
		{ "HearbeatDACK", 16, 1 },
		{ "TxCongestionMode", 15, 1 },
		{ "AcceptLatestRcvAdv", 14, 1 },
		{ "DisableSYNData", 13, 1 },
		{ "DisableWindowPSH", 12, 1 },
		{ "DisableFINOldData", 11, 1 },
		{ "EnableFLMError", 10, 1 },
		{ "EnableOptMtu", 9, 1 },
		{ "FilterPeerFIN", 8, 1 },
		{ "EnableFeedbackSend", 7, 1 },
		{ "EnableRDMAError", 6, 1 },
		{ "EnableFilterNat", 5, 1 },
		{ "DisableSepPshFlag", 4, 1 },
		{ "EnableOfdoVLAN", 3, 1 },
		{ "DisableTimeWait", 2, 1 },
		{ "EnableVlanCheck", 1, 1 },
		{ "TxDataAckPageEnable", 0, 1 },
	{ "TP_PC_CONFIG2", 0x7d4c, 0 },
		{ "EnableMtuVfMode", 31, 1 },
		{ "EnableMibVfMode", 30, 1 },
		{ "DisableLbkCheck", 29, 1 },
		{ "EnableUrgDdpOff", 28, 1 },
		{ "EnableFilterLpbk", 27, 1 },
		{ "DisableTblMmgr", 26, 1 },
		{ "CngRecSndNxt", 25, 1 },
		{ "EnableLbkChn", 24, 1 },
		{ "EnableLroEcn", 23, 1 },
		{ "EnablePcmdCheck", 22, 1 },
		{ "EnableELbkAFull", 21, 1 },
		{ "EnableCLbkAFull", 20, 1 },
		{ "EnableOespiFull", 19, 1 },
		{ "DisableHitCheck", 18, 1 },
		{ "EnableRssErrCheck", 17, 1 },
		{ "DisableNewPshFlag", 16, 1 },
		{ "EnableRddpRcvAdvClr", 15, 1 },
		{ "EnableFinDdpOff", 14, 1 },
		{ "EnableArpMiss", 13, 1 },
		{ "EnableRstPaws", 12, 1 },
		{ "EnableIPv6RSS", 11, 1 },
		{ "EnableNonOfdHybRss", 10, 1 },
		{ "EnableUDP4TupRss", 9, 1 },
		{ "EnableRxPktTmstpRss", 8, 1 },
		{ "EnableEPCMDAFull", 7, 1 },
		{ "EnableCPCMDAFull", 6, 1 },
		{ "EnableEHdrAFull", 5, 1 },
		{ "EnableCHdrAFull", 4, 1 },
		{ "EnableEMacAFull", 3, 1 },
		{ "EnableNonOfdTidRss", 2, 1 },
		{ "EnableNonOfdTcbRss", 1, 1 },
		{ "EnableTnlOfdClosed", 0, 1 },
	{ "TP_TCP_BACKOFF_REG0", 0x7d50, 0 },
		{ "TimerBackoffIndex3", 24, 8 },
		{ "TimerBackoffIndex2", 16, 8 },
		{ "TimerBackoffIndex1", 8, 8 },
		{ "TimerBackoffIndex0", 0, 8 },
	{ "TP_TCP_BACKOFF_REG1", 0x7d54, 0 },
		{ "TimerBackoffIndex7", 24, 8 },
		{ "TimerBackoffIndex6", 16, 8 },
		{ "TimerBackoffIndex5", 8, 8 },
		{ "TimerBackoffIndex4", 0, 8 },
	{ "TP_TCP_BACKOFF_REG2", 0x7d58, 0 },
		{ "TimerBackoffIndex11", 24, 8 },
		{ "TimerBackoffIndex10", 16, 8 },
		{ "TimerBackoffIndex9", 8, 8 },
		{ "TimerBackoffIndex8", 0, 8 },
	{ "TP_TCP_BACKOFF_REG3", 0x7d5c, 0 },
		{ "TimerBackoffIndex15", 24, 8 },
		{ "TimerBackoffIndex14", 16, 8 },
		{ "TimerBackoffIndex13", 8, 8 },
		{ "TimerBackoffIndex12", 0, 8 },
	{ "TP_PARA_REG0", 0x7d60, 0 },
		{ "LimTxThresh", 28, 4 },
		{ "InitCwndIdle", 27, 1 },
		{ "InitCwnd", 24, 3 },
		{ "DupAckThresh", 20, 4 },
		{ "EcnCngFifo", 19, 1 },
		{ "EcnSynAck", 18, 1 },
		{ "EcnThresh", 16, 2 },
		{ "EcnMode", 15, 1 },
		{ "EcnModeCwr", 14, 1 },
		{ "SetTimeEnable", 13, 1 },
		{ "CplErrEnable", 12, 1 },
		{ "FastTnlCnt", 11, 1 },
		{ "ForceShove", 10, 1 },
		{ "TpTcamKey", 9, 1 },
		{ "SwsMode", 8, 1 },
		{ "TsmpMode", 6, 2 },
		{ "ByteCountLimit", 4, 2 },
		{ "SwsShove", 3, 1 },
		{ "TblTimer", 2, 1 },
		{ "RxtPace", 1, 1 },
		{ "SwsTimer", 0, 1 },
	{ "TP_PARA_REG1", 0x7d64, 0 },
		{ "InitRwnd", 16, 16 },
		{ "InitialSSThresh", 0, 16 },
	{ "TP_PARA_REG2", 0x7d68, 0 },
		{ "MaxRxData", 16, 16 },
		{ "RxCoalesceSize", 0, 16 },
	{ "TP_PARA_REG3", 0x7d6c, 0 },
		{ "EnableTnlCngLpbk", 31, 1 },
		{ "EnableTnlCngFifo", 30, 1 },
		{ "EnableTnlCngHdr", 29, 1 },
		{ "EnableTnlCngSge", 28, 1 },
		{ "RxMacCheck", 27, 1 },
		{ "RxSynFilter", 26, 1 },
		{ "CngCtrlECN", 25, 1 },
		{ "RxDdpOffInit", 24, 1 },
		{ "TunnelCngDrop3", 23, 1 },
		{ "TunnelCngDrop2", 22, 1 },
		{ "TunnelCngDrop1", 21, 1 },
		{ "TunnelCngDrop0", 20, 1 },
		{ "TxDataAckIdx", 16, 4 },
		{ "RxFragEnable", 12, 3 },
		{ "TxPaceFixedStrict", 11, 1 },
		{ "TxPaceAutoStrict", 10, 1 },
		{ "TxPaceFixed", 9, 1 },
		{ "TxPaceAuto", 8, 1 },
		{ "RxChnTunnel", 7, 1 },
		{ "RxUrgTunnel", 6, 1 },
		{ "RxUrgMode", 5, 1 },
		{ "TxUrgMode", 4, 1 },
		{ "CngCtrlMode", 2, 2 },
		{ "RxCoalesceEnable", 1, 1 },
		{ "RxCoalescePshEn", 0, 1 },
	{ "TP_PARA_REG4", 0x7d70, 0 },
		{ "IdleCwndHighSpeed", 28, 1 },
		{ "RxmtCwndHighSpeed", 27, 1 },
		{ "OverdriveHighSpeed", 25, 2 },
		{ "ByteCountHighSpeed", 24, 1 },
		{ "IdleCwndNewReno", 20, 1 },
		{ "RxmtCwndNewReno", 19, 1 },
		{ "OverdriveNewReno", 17, 2 },
		{ "ByteCountNewReno", 16, 1 },
		{ "IdleCwndTahoe", 12, 1 },
		{ "RxmtCwndTahoe", 11, 1 },
		{ "OverdriveTahoe", 9, 2 },
		{ "ByteCountTahoe", 8, 1 },
		{ "IdleCwndReno", 4, 1 },
		{ "RxmtCwndReno", 3, 1 },
		{ "OverdriveReno", 1, 2 },
		{ "ByteCountReno", 0, 1 },
	{ "TP_PARA_REG5", 0x7d74, 0 },
		{ "IndicateSize", 16, 16 },
		{ "MaxProxySize", 12, 4 },
		{ "EnableReadPdu", 11, 1 },
		{ "EnableReadAhead", 10, 1 },
		{ "EmptyRqEnable", 9, 1 },
		{ "SchdEnable", 8, 1 },
		{ "EnableXoffPdu", 7, 1 },
		{ "EnableFcoeCheck", 6, 1 },
		{ "EnableFragCheck", 5, 1 },
		{ "RearmDdpOffset", 4, 1 },
		{ "ResetDdpOffset", 3, 1 },
		{ "OnFlyDDPEnable", 2, 1 },
		{ "EnableRdmaFix", 1, 1 },
		{ "PushTimerEnable", 0, 1 },
	{ "TP_PARA_REG6", 0x7d78, 0 },
		{ "TxPDUSizeAdj", 24, 8 },
		{ "TxTcamKey", 22, 1 },
		{ "EnableCByp", 21, 1 },
		{ "DisablePDUAck", 20, 1 },
		{ "EnableCSav", 19, 1 },
		{ "EnableDeferPDU", 18, 1 },
		{ "EnableFlush", 17, 1 },
		{ "EnableBytePersist", 16, 1 },
		{ "DisableTmoCng", 15, 1 },
		{ "EnableReadAhead", 14, 1 },
		{ "AllowExeption", 13, 1 },
		{ "EnableDeferACK", 12, 1 },
		{ "EnableESnd", 11, 1 },
		{ "EnableCSnd", 10, 1 },
		{ "EnablePDUE", 9, 1 },
		{ "EnablePDUC", 8, 1 },
		{ "EnableBUFI", 7, 1 },
		{ "EnableBUFE", 6, 1 },
		{ "EnableDefer", 5, 1 },
		{ "EnableClearRxmtOos", 4, 1 },
		{ "DisablePDUCng", 3, 1 },
		{ "DisablePDUTimeout", 2, 1 },
		{ "DisablePDURxmt", 1, 1 },
		{ "DisablePDUxmt", 0, 1 },
	{ "TP_PARA_REG7", 0x7d7c, 0 },
		{ "PMMaxXferLen1", 16, 16 },
		{ "PMMaxXferLen0", 0, 16 },
	{ "TP_ENG_CONFIG", 0x7d80, 0 },
		{ "TableLatencyDone", 28, 4 },
		{ "TableLatencyStart", 24, 4 },
		{ "EngineLatencyDelta", 16, 4 },
		{ "EngineLatencyMmgr", 12, 4 },
		{ "EngineLatencyWireIp6", 8, 4 },
		{ "EngineLatencyWire", 4, 4 },
		{ "EngineLatencyBase", 0, 4 },
	{ "TP_PARA_REG8", 0x7d84, 0 },
		{ "EcnAckEct", 2, 1 },
		{ "EcnFinEct", 1, 1 },
		{ "EcnSynEct", 0, 1 },
	{ "TP_PARA_REG9", 0x7d88, 0 },
		{ "PMMaxXferLen3", 16, 16 },
		{ "PMMaxXferLen2", 0, 16 },
	{ "TP_ERR_CONFIG", 0x7d8c, 0 },
		{ "TnlErrorFPMA", 31, 1 },
		{ "TnlErrorPing", 30, 1 },
		{ "TnlErrorCsum", 29, 1 },
		{ "TnlErrorCsumIP", 28, 1 },
		{ "TnlErrorOpaque", 27, 1 },
		{ "TnlErrorIp6Opt", 26, 1 },
		{ "TnlErrorTcpOpt", 25, 1 },
		{ "TnlErrorPktLen", 24, 1 },
		{ "TnlErrorTcpHdrLen", 23, 1 },
		{ "TnlErrorIpHdrLen", 22, 1 },
		{ "TnlErrorEthHdrLen", 21, 1 },
		{ "TnlErrorAttack", 20, 1 },
		{ "TnlErrorFrag", 19, 1 },
		{ "TnlErrorIpVer", 18, 1 },
		{ "TnlErrorMac", 17, 1 },
		{ "TnlErrorAny", 16, 1 },
		{ "DropErrorFPMA", 15, 1 },
		{ "DropErrorPing", 14, 1 },
		{ "DropErrorCsum", 13, 1 },
		{ "DropErrorCsumIP", 12, 1 },
		{ "DropErrorOpaque", 11, 1 },
		{ "DropErrorIp6Opt", 10, 1 },
		{ "DropErrorTcpOpt", 9, 1 },
		{ "DropErrorPktLen", 8, 1 },
		{ "DropErrorTcpHdrLen", 7, 1 },
		{ "DropErrorIpHdrLen", 6, 1 },
		{ "DropErrorEthHdrLen", 5, 1 },
		{ "DropErrorAttack", 4, 1 },
		{ "DropErrorFrag", 3, 1 },
		{ "DropErrorIpVer", 2, 1 },
		{ "DropErrorMac", 1, 1 },
		{ "DropErrorAny", 0, 1 },
	{ "TP_TIMER_RESOLUTION", 0x7d90, 0 },
		{ "RoceTimerResolution", 24, 8 },
		{ "TimerResolution", 16, 8 },
		{ "TimestampResolution", 8, 8 },
		{ "DelayedACKResolution", 0, 8 },
	{ "TP_MSL", 0x7d94, 0 },
	{ "TP_RXT_MIN", 0x7d98, 0 },
	{ "TP_RXT_MAX", 0x7d9c, 0 },
	{ "TP_PERS_MIN", 0x7da0, 0 },
	{ "TP_PERS_MAX", 0x7da4, 0 },
	{ "TP_KEEP_IDLE", 0x7da8, 0 },
	{ "TP_KEEP_INTVL", 0x7dac, 0 },
	{ "TP_INIT_SRTT", 0x7db0, 0 },
		{ "MaxRtt", 16, 16 },
		{ "InitSrtt", 0, 16 },
	{ "TP_DACK_TIMER", 0x7db4, 0 },
	{ "TP_FINWAIT2_TIMER", 0x7db8, 0 },
	{ "TP_FAST_FINWAIT2_TIMER", 0x7dbc, 0 },
	{ "TP_SHIFT_CNT", 0x7dc0, 0 },
		{ "SynShiftMax", 24, 4 },
		{ "RxtShiftMaxR1", 20, 4 },
		{ "RxtShiftMaxR2", 16, 4 },
		{ "PerShiftBackoffMax", 12, 4 },
		{ "PerShiftMax", 8, 4 },
		{ "KeepaliveMaxR1", 4, 4 },
		{ "KeepaliveMaxR2", 0, 4 },
	{ "TP_TM_CONFIG", 0x7dc4, 0 },
	{ "TP_TIME_LO", 0x7dc8, 0 },
	{ "TP_TIME_HI", 0x7dcc, 0 },
	{ "TP_PORT_MTU_0", 0x7dd0, 0 },
		{ "Port1MTUValue", 16, 16 },
		{ "Port0MTUValue", 0, 16 },
	{ "TP_PORT_MTU_1", 0x7dd4, 0 },
		{ "Port3MTUValue", 16, 16 },
		{ "Port2MTUValue", 0, 16 },
	{ "TP_PACE_TABLE", 0x7dd8, 0 },
	{ "TP_CCTRL_TABLE", 0x7ddc, 0 },
		{ "RowIndex", 16, 16 },
		{ "RowValue", 0, 16 },
	{ "TP_MTU_TABLE", 0x7de4, 0 },
		{ "MTUIndex", 24, 8 },
		{ "MTUWidth", 16, 4 },
		{ "MTUValue", 0, 14 },
	{ "TP_ULP_TABLE", 0x7de8, 0 },
		{ "ULPType7Length", 31, 1 },
		{ "ULPType7Offset", 28, 3 },
		{ "ULPType6Length", 27, 1 },
		{ "ULPType6Offset", 24, 3 },
		{ "ULPType5Length", 23, 1 },
		{ "ULPType5Offset", 20, 3 },
		{ "ULPType4Length", 19, 1 },
		{ "ULPType4Offset", 16, 3 },
		{ "ULPType3Length", 15, 1 },
		{ "ULPType3Offset", 12, 3 },
		{ "ULPType2Length", 11, 1 },
		{ "ULPType2Offset", 8, 3 },
		{ "ULPType1Length", 7, 1 },
		{ "ULPType1Offset", 4, 3 },
		{ "ULPType0Length", 3, 1 },
		{ "ULPType0Offset", 0, 3 },
	{ "TP_RSS_LKP_TABLE", 0x7dec, 0 },
		{ "LkpTblQueue1", 10, 10 },
		{ "LkpTblQueue0", 0, 10 },
	{ "TP_RSS_CONFIG", 0x7df0, 0 },
		{ "TNL4tupEnIpv6", 31, 1 },
		{ "TNL2tupEnIpv6", 30, 1 },
		{ "TNL4tupEnIpv4", 29, 1 },
		{ "TNL2tupEnIpv4", 28, 1 },
		{ "TNLTcpSel", 27, 1 },
		{ "TNLIp6Sel", 26, 1 },
		{ "TNLVrtSel", 25, 1 },
		{ "TNLMapEn", 24, 1 },
		{ "TNLFcoeMode", 23, 1 },
		{ "TNLFcoeSid", 22, 1 },
		{ "TNLFcoeEn", 21, 1 },
		{ "HashXor", 20, 1 },
		{ "OFDHashSave", 19, 1 },
		{ "OFDVrtSel", 18, 1 },
		{ "OFDMapEn", 17, 1 },
		{ "OFDLkpEn", 16, 1 },
		{ "SYN4tupEnIpv6", 15, 1 },
		{ "SYN2tupEnIpv6", 14, 1 },
		{ "SYN4tupEnIpv4", 13, 1 },
		{ "SYN2tupEnIpv4", 12, 1 },
		{ "SYNIp6Sel", 11, 1 },
		{ "SYNVrtSel", 10, 1 },
		{ "SYNMapEn", 9, 1 },
		{ "SYNLkpEn", 8, 1 },
		{ "ChannelEnable", 7, 1 },
		{ "PortEnable", 6, 1 },
		{ "TNLAllLookup", 5, 1 },
		{ "VirtEnable", 4, 1 },
		{ "CongestionEnable", 3, 1 },
		{ "HashToeplitz", 2, 1 },
		{ "UdpEnable", 1, 1 },
		{ "Disable", 0, 1 },
	{ "TP_RSS_CONFIG_TNL", 0x7df4, 0 },
		{ "MaskSize", 28, 4 },
		{ "MaskFilter", 16, 11 },
		{ "HashAll", 2, 1 },
		{ "HashEth", 1, 1 },
		{ "UseWireCh", 0, 1 },
	{ "TP_RSS_CONFIG_OFD", 0x7df8, 0 },
		{ "MaskSize", 28, 4 },
		{ "RRCPLMapEn", 20, 1 },
		{ "RRCPLQueWidth", 16, 4 },
		{ "FrmwrQueMask", 12, 4 },
		{ "RRCPLOpt1SMSelEn", 11, 1 },
		{ "RRCPLOpt1BQEn", 10, 1 },
	{ "TP_RSS_CONFIG_SYN", 0x7dfc, 0 },
		{ "MaskSize", 28, 4 },
		{ "UseWireCh", 0, 1 },
	{ "TP_RSS_CONFIG_VRT", 0x7e00, 0 },
		{ "VfPerrEn", 23, 1 },
		{ "KeyPerrEn", 22, 1 },
		{ "VfVlanEn", 21, 1 },
		{ "VfFwEn", 20, 1 },
		{ "HashDelay", 16, 4 },
		{ "KeyMode", 6, 2 },
	{ "TP_RSS_CONFIG_CNG", 0x7e04, 0 },
		{ "ChnCount3", 31, 1 },
		{ "ChnCount2", 30, 1 },
		{ "ChnCount1", 29, 1 },
		{ "ChnCount0", 28, 1 },
		{ "ChnUndFlow3", 27, 1 },
		{ "ChnUndFlow2", 26, 1 },
		{ "ChnUndFlow1", 25, 1 },
		{ "ChnUndFlow0", 24, 1 },
		{ "ChnOvrFlow3", 23, 1 },
		{ "ChnOvrFlow2", 22, 1 },
		{ "ChnOvrFlow1", 21, 1 },
		{ "ChnOvrFlow0", 20, 1 },
		{ "UpdVld", 19, 1 },
		{ "Xoff", 18, 1 },
		{ "UpdChn3", 17, 1 },
		{ "UpdChn2", 16, 1 },
		{ "UpdChn1", 15, 1 },
		{ "UpdChn0", 14, 1 },
		{ "Queue", 0, 14 },
	{ "TP_RSS_CONFIG_4CH", 0x7e08, 0 },
		{ "BaseQIDEn", 1, 1 },
		{ "200GMode", 0, 1 },
	{ "TP_RSS_CONFIG_SRAM", 0x7e0c, 0 },
		{ "SramRdDis", 20, 1 },
		{ "SramStart", 19, 1 },
		{ "SramWrite", 18, 1 },
		{ "SramSel", 16, 2 },
		{ "SramAddr", 0, 14 },
	{ "TP_LA_TABLE_0", 0x7e10, 0 },
		{ "VirtPort1Table", 16, 16 },
		{ "VirtPort0Table", 0, 16 },
	{ "TP_LA_TABLE_1", 0x7e14, 0 },
		{ "VirtPort3Table", 16, 16 },
		{ "VirtPort2Table", 0, 16 },
	{ "TP_TM_PIO_ADDR", 0x7e18, 0 },
	{ "TP_TM_PIO_DATA", 0x7e1c, 0 },
	{ "TP_RX_MOD_CONFIG_CH3_CH2", 0x7e20, 0 },
		{ "RxChannelWeight3", 8, 8 },
		{ "RXChannelWeight2", 0, 8 },
	{ "TP_MOD_CONFIG", 0x7e24, 0 },
		{ "RxChannelWeight1", 24, 8 },
		{ "RXChannelWeight0", 16, 8 },
		{ "TimerMode", 8, 8 },
		{ "TxChannelXoffEn", 0, 4 },
	{ "TP_TX_MOD_QUEUE_REQ_MAP", 0x7e28, 0 },
		{ "RX_MOD_WEIGHT", 24, 8 },
		{ "TX_MOD_WEIGHT", 16, 8 },
		{ "TX_MOD_QUEUE_REQ_MAP", 0, 16 },
	{ "TP_TX_MOD_QUEUE_WEIGHT1", 0x7e2c, 0 },
		{ "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 },
		{ "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 },
		{ "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 },
		{ "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 },
	{ "TP_TX_MOD_QUEUE_WEIGHT0", 0x7e30, 0 },
		{ "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 },
		{ "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 },
		{ "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 },
		{ "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 },
	{ "TP_TX_MOD_CHANNEL_WEIGHT", 0x7e34, 0 },
		{ "CH3", 24, 8 },
		{ "CH2", 16, 8 },
		{ "CH1", 8, 8 },
		{ "CH0", 0, 8 },
	{ "TP_MOD_RATE_LIMIT", 0x7e38, 0 },
		{ "RX_MOD_RATE_LIMIT_INC", 24, 8 },
		{ "RX_MOD_RATE_LIMIT_TICK", 16, 8 },
		{ "TX_MOD_RATE_LIMIT_INC", 8, 8 },
		{ "TX_MOD_RATE_LIMIT_TICK", 0, 8 },
	{ "TP_PIO_ADDR", 0x7e40, 0 },
	{ "TP_PIO_DATA", 0x7e44, 0 },
	{ "TP_RESET", 0x7e4c, 0 },
		{ "FlstInitEnable", 1, 1 },
		{ "TPReset", 0, 1 },
	{ "TP_MIB_INDEX", 0x7e50, 0 },
	{ "TP_MIB_DATA", 0x7e54, 0 },
	{ "TP_SYNC_TIME_HI", 0x7e58, 0 },
	{ "TP_SYNC_TIME_LO", 0x7e5c, 0 },
	{ "TP_CMM_MM_RX_FLST_BASE", 0x7e60, 0 },
	{ "TP_CMM_MM_TX_FLST_BASE", 0x7e64, 0 },
	{ "TP_CMM_MM_PS_FLST_BASE", 0x7e68, 0 },
	{ "TP_CMM_MM_MAX_PSTRUCT", 0x7e6c, 0 },
	{ "TP_INT_ENABLE", 0x7e70, 0 },
		{ "FlmTxFlstEmpty", 30, 1 },
		{ "TpCerr", 5, 1 },
		{ "OtherPerr", 4, 1 },
		{ "TpeIng1Perr", 3, 1 },
		{ "TpeIng0Perr", 2, 1 },
		{ "TpeEgPerr", 1, 1 },
		{ "TpcPerr", 0, 1 },
	{ "TP_INT_CAUSE", 0x7e74, 0 },
		{ "FlmTxFlstEmpty", 30, 1 },
		{ "TpCerr", 5, 1 },
		{ "OtherPerr", 4, 1 },
		{ "TpeIng1Perr", 3, 1 },
		{ "TpeIng0Perr", 2, 1 },
		{ "TpeEgPerr", 1, 1 },
		{ "TpcPerr", 0, 1 },
	{ "TP_FLM_FREE_PS_CNT", 0x7e80, 0 },
	{ "TP_FLM_FREE_RX_CNT", 0x7e84, 0 },
		{ "FreeRxPageChn", 28, 3 },
		{ "FreeRxPageCount", 0, 21 },
	{ "TP_FLM_FREE_TX_CNT", 0x7e88, 0 },
		{ "FreeTxPageChn", 28, 3 },
		{ "FreeTxPageCount", 0, 21 },
	{ "TP_TM_HEAP_PUSH_CNT", 0x7e8c, 0 },
	{ "TP_TM_HEAP_POP_CNT", 0x7e90, 0 },
	{ "TP_TM_DACK_PUSH_CNT", 0x7e94, 0 },
	{ "TP_TM_DACK_POP_CNT", 0x7e98, 0 },
	{ "TP_TM_MOD_PUSH_CNT", 0x7e9c, 0 },
	{ "TP_MOD_POP_CNT", 0x7ea0, 0 },
	{ "TP_TIMER_SEPARATOR", 0x7ea4, 0 },
		{ "TimerSeparator", 16, 16 },
		{ "DisableTimeFreeze", 0, 1 },
	{ "TP_STAMP_TIME", 0x7ea8, 0 },
	{ "TP_DEBUG_FLAGS", 0x7eac, 0 },
		{ "RxTimerCompBuffer", 27, 1 },
		{ "RxTimerDackFirst", 26, 1 },
		{ "RxTimerDack", 25, 1 },
		{ "RxTimerHeartbeat", 24, 1 },
		{ "RxPawsDrop", 23, 1 },
		{ "RxUrgDataDrop", 22, 1 },
		{ "RxFutureData", 21, 1 },
		{ "RxRcvRxmData", 20, 1 },
		{ "RxRcvOooDataFin", 19, 1 },
		{ "RxRcvOooData", 18, 1 },
		{ "RxRcvWndZero", 17, 1 },
		{ "RxRcvWndLtMss", 16, 1 },
		{ "TxDfrFast", 13, 1 },
		{ "TxRxmMisc", 12, 1 },
		{ "TxDupAckInc", 11, 1 },
		{ "TxRxmUrg", 10, 1 },
		{ "TxRxmFin", 9, 1 },
		{ "TxRxmSyn", 8, 1 },
		{ "TxRxmNewReno", 7, 1 },
		{ "TxRxmFast", 6, 1 },
		{ "TxRxmTimer", 5, 1 },
		{ "TxRxmTimerKeepalive", 4, 1 },
		{ "TxRxmTimerPersist", 3, 1 },
		{ "TxRcvAdvShrunk", 2, 1 },
		{ "TxRcvAdvZero", 1, 1 },
		{ "TxRcvAdvLtMss", 0, 1 },
	{ "TP_RX_SCHED", 0x7eb0, 0 },
		{ "CommitReset3", 7, 1 },
		{ "CommitReset2", 6, 1 },
		{ "CommitReset1", 5, 1 },
		{ "CommitReset0", 4, 1 },
		{ "ForceCong3", 3, 1 },
		{ "ForceCong2", 2, 1 },
		{ "ForceCong1", 1, 1 },
		{ "ForceCong0", 0, 1 },
	{ "TP_TX_SCHED", 0x7eb4, 0 },
		{ "CommitReset3", 31, 1 },
		{ "CommitReset2", 30, 1 },
		{ "CommitReset1", 29, 1 },
		{ "CommitReset0", 28, 1 },
		{ "ForceCong3", 27, 1 },
		{ "ForceCong2", 26, 1 },
		{ "ForceCong1", 25, 1 },
		{ "ForceCong0", 24, 1 },
		{ "CommitLimit3", 18, 6 },
		{ "CommitLimit2", 12, 6 },
		{ "CommitLimit1", 6, 6 },
		{ "CommitLimit0", 0, 6 },
	{ "TP_FX_SCHED", 0x7eb8, 0 },
		{ "TxChnXoff3", 19, 1 },
		{ "TxChnXoff2", 18, 1 },
		{ "TxChnXoff1", 17, 1 },
		{ "TxChnXoff0", 16, 1 },
		{ "TxModXoff7", 15, 1 },
		{ "TxModXoff6", 14, 1 },
		{ "TxModXoff5", 13, 1 },
		{ "TxModXoff4", 12, 1 },
		{ "TxModXoff3", 11, 1 },
		{ "TxModXoff2", 10, 1 },
		{ "TxModXoff1", 9, 1 },
		{ "TxModXoff0", 8, 1 },
		{ "RxChnXoff3", 7, 1 },
		{ "RxChnXoff2", 6, 1 },
		{ "RxChnXoff1", 5, 1 },
		{ "RxChnXoff0", 4, 1 },
		{ "RxModXoff3", 3, 1 },
		{ "RxModXoff2", 2, 1 },
		{ "RxModXoff1", 1, 1 },
		{ "RxModXoff0", 0, 1 },
	{ "TP_TX_ORATE", 0x7ebc, 0 },
		{ "OfdRate3", 24, 8 },
		{ "OfdRate2", 16, 8 },
		{ "OfdRate1", 8, 8 },
		{ "OfdRate0", 0, 8 },
	{ "TP_IX_SCHED0", 0x7ec0, 0 },
	{ "TP_IX_SCHED1", 0x7ec4, 0 },
	{ "TP_IX_SCHED2", 0x7ec8, 0 },
	{ "TP_IX_SCHED3", 0x7ecc, 0 },
	{ "TP_TX_TRATE", 0x7ed0, 0 },
		{ "TnlRate3", 24, 8 },
		{ "TnlRate2", 16, 8 },
		{ "TnlRate1", 8, 8 },
		{ "TnlRate0", 0, 8 },
	{ "TP_DBG_LA_CONFIG", 0x7ed4, 0 },
		{ "DbgLaOpcEnable", 24, 8 },
		{ "DbgLaWhlf", 23, 1 },
		{ "DbgLaWptr", 16, 7 },
		{ "DbgLaMode", 14, 2 },
		{ "DbgLaFatalFreeze", 13, 1 },
		{ "DbgLaEnable", 12, 1 },
		{ "DbgLaRptr", 0, 7 },
	{ "TP_DBG_LA_DATAL", 0x7ed8, 0 },
	{ "TP_DBG_LA_DATAH", 0x7edc, 0 },
	{ "TP_DBG_LA_FILTER", 0x7ee0, 0 },
		{ "FilterTid", 12, 20 },
		{ "EnTidFilter", 5, 1 },
		{ "EnOffload", 4, 1 },
		{ "EnTunnel", 3, 1 },
		{ "EnI", 2, 1 },
		{ "EnC", 1, 1 },
		{ "EnE", 0, 1 },
	{ "TP_PROTOCOL_CNTRL", 0x7ee8, 0 },
		{ "WriteEnable", 31, 1 },
		{ "TcamEnable", 10, 1 },
		{ "BlockSelect", 8, 2 },
		{ "LineAddress", 1, 7 },
		{ "RequestDone", 0, 1 },
	{ "TP_PROTOCOL_DATA0", 0x7eec, 0 },
	{ "TP_PROTOCOL_DATA1", 0x7ef0, 0 },
	{ "TP_PROTOCOL_DATA2", 0x7ef4, 0 },
	{ "TP_PROTOCOL_DATA3", 0x7ef8, 0 },
	{ "TP_PROTOCOL_DATA4", 0x7efc, 0 },
	{ "TP_INIC_CTRL0", 0x7f00, 0 },
	{ "TP_INIC_DBG", 0x7f04, 0 },
	{ "TP_INIC_PERR_ENABLE", 0x7f08, 0 },
		{ "inicMac1_err", 16, 6 },
		{ "inicMac0_err", 0, 6 },
	{ "TP_INIC_PERR_CAUSE", 0x7f0c, 0 },
		{ "inicMac1_err", 16, 6 },
		{ "inicMac0_err", 0, 6 },
	{ "TP_PARA_REG10", 0x7f20, 0 },
		{ "Dis39320Fix", 20, 1 },
		{ "iWARPMaxPduLen", 16, 4 },
		{ "TlsMaxRxData", 0, 16 },
	{ "TP_TCAM_BIST_CTRL", 0x7f24, 0 },
		{ "rst_cb", 31, 1 },
		{ "cb_start", 0, 28 },
	{ "TP_TCAM_BIST_CB_PASS", 0x7f28, 0 },
	{ "TP_TCAM_BIST_CB_BUSY", 0x7f2c, 0 },
	{ "TP_C_PERR_ENABLE", 0x7f30, 0 },
		{ "DmxFifoOvfl", 26, 1 },
		{ "URx2TpcDdpIntf", 25, 1 },
		{ "TpcDispTokenFifo", 24, 1 },
		{ "TpcDispCplFifo3", 23, 1 },
		{ "TpcDispCplFifo2", 22, 1 },
		{ "TpcDispCplFifo1", 21, 1 },
		{ "TpcDispCplFifo0", 20, 1 },
		{ "URxPldIntfCrc3", 19, 1 },
		{ "URxPldIntfCrc2", 18, 1 },
		{ "URxPldIntfCrc1", 17, 1 },
		{ "URxPldIntfCrc0", 16, 1 },
		{ "DmxDbFifo", 15, 1 },
		{ "DmxDbSram", 14, 1 },
		{ "DmxCplFifo", 13, 1 },
		{ "DmxCplSram", 12, 1 },
		{ "DmxCsumFifo", 11, 1 },
		{ "DmxLenFifo", 10, 1 },
		{ "DmxCheckFifo", 9, 1 },
		{ "DmxWinFifo", 8, 1 },
		{ "EgTokenFifo", 7, 1 },
		{ "EgDataFifo", 6, 1 },
		{ "Utx2TpcIntf3", 5, 1 },
		{ "Utx2TpcIntf2", 4, 1 },
		{ "Utx2TpcIntf1", 3, 1 },
		{ "Utx2TpcIntf0", 2, 1 },
		{ "LbkTokenFifo", 1, 1 },
		{ "LbkDataFifo", 0, 1 },
	{ "TP_C_PERR_CAUSE", 0x7f34, 0 },
		{ "DmxFifoOvfl", 26, 1 },
		{ "URx2TpcDdpIntf", 25, 1 },
		{ "TpcDispTokenFifo", 24, 1 },
		{ "TpcDispCplFifo3", 23, 1 },
		{ "TpcDispCplFifo2", 22, 1 },
		{ "TpcDispCplFifo1", 21, 1 },
		{ "TpcDispCplFifo0", 20, 1 },
		{ "URxPldIntfCrc3", 19, 1 },
		{ "URxPldIntfCrc2", 18, 1 },
		{ "URxPldIntfCrc1", 17, 1 },
		{ "URxPldIntfCrc0", 16, 1 },
		{ "DmxDbFifo", 15, 1 },
		{ "DmxDbSram", 14, 1 },
		{ "DmxCplFifo", 13, 1 },
		{ "DmxCplSram", 12, 1 },
		{ "DmxCsumFifo", 11, 1 },
		{ "DmxLenFifo", 10, 1 },
		{ "DmxCheckFifo", 9, 1 },
		{ "DmxWinFifo", 8, 1 },
		{ "EgTokenFifo", 7, 1 },
		{ "EgDataFifo", 6, 1 },
		{ "Utx2TpcIntf3", 5, 1 },
		{ "Utx2TpcIntf2", 4, 1 },
		{ "Utx2TpcIntf1", 3, 1 },
		{ "Utx2TpcIntf0", 2, 1 },
		{ "LbkTokenFifo", 1, 1 },
		{ "LbkDataFifo", 0, 1 },
	{ "TP_E_EG_PERR_ENABLE", 0x7f38, 0 },
		{ "MpsLpbkTokenFifo", 25, 1 },
		{ "MpsMacTokenFifo", 24, 1 },
		{ "DispIpSecFifo3", 23, 1 },
		{ "DispTcpFifo3", 22, 1 },
		{ "DispIpFifo3", 21, 1 },
		{ "DispEthFifo3", 20, 1 },
		{ "DispGreFifo3", 19, 1 },
		{ "DispCpl5Fifo3", 18, 1 },
		{ "DispIpSecFifo2", 17, 1 },
		{ "DispTcpFifo2", 16, 1 },
		{ "DispIpFifo2", 15, 1 },
		{ "DispEthFifo2", 14, 1 },
		{ "DispGreFifo2", 13, 1 },
		{ "DispCpl5Fifo2", 12, 1 },
		{ "DispIpSecFifo1", 11, 1 },
		{ "DispTcpFifo1", 10, 1 },
		{ "DispIpFifo1", 9, 1 },
		{ "DispEthFifo1", 8, 1 },
		{ "DispGreFifo1", 7, 1 },
		{ "DispCpl5Fifo1", 6, 1 },
		{ "DispIpSecFifo0", 5, 1 },
		{ "DispTcpFifo0", 4, 1 },
		{ "DispIpFifo0", 3, 1 },
		{ "DispEthFifo0", 2, 1 },
		{ "DispGreFifo0", 1, 1 },
		{ "DispCpl5Fifo0", 0, 1 },
	{ "TP_E_EG_PERR_CAUSE", 0x7f3c, 0 },
		{ "MpsLpbkTokenFifo", 25, 1 },
		{ "MpsMacTokenFifo", 24, 1 },
		{ "DispIpSecFifo3", 23, 1 },
		{ "DispTcpFifo3", 22, 1 },
		{ "DispIpFifo3", 21, 1 },
		{ "DispEthFifo3", 20, 1 },
		{ "DispGreFifo3", 19, 1 },
		{ "DispCpl5Fifo3", 18, 1 },
		{ "DispIpSecFifo2", 17, 1 },
		{ "DispTcpFifo2", 16, 1 },
		{ "DispIpFifo2", 15, 1 },
		{ "DispEthFifo2", 14, 1 },
		{ "DispGreFifo2", 13, 1 },
		{ "DispCpl5Fifo2", 12, 1 },
		{ "DispIpSecFifo1", 11, 1 },
		{ "DispTcpFifo1", 10, 1 },
		{ "DispIpFifo1", 9, 1 },
		{ "DispEthFifo1", 8, 1 },
		{ "DispGreFifo1", 7, 1 },
		{ "DispCpl5Fifo1", 6, 1 },
		{ "DispIpSecFifo0", 5, 1 },
		{ "DispTcpFifo0", 4, 1 },
		{ "DispIpFifo0", 3, 1 },
		{ "DispEthFifo0", 2, 1 },
		{ "DispGreFifo0", 1, 1 },
		{ "DispCpl5Fifo0", 0, 1 },
	{ "TP_E_IN0_PERR_ENABLE", 0x7f40, 0 },
		{ "DmxIssFifo", 30, 1 },
		{ "DmxErrFifo", 29, 1 },
		{ "DmxAttFifo", 28, 1 },
		{ "DmxTcpFifo", 27, 1 },
		{ "DmxMpaFifo", 26, 1 },
		{ "DmxOptFifo", 25, 1 },
		{ "IngTokenFifo", 24, 1 },
		{ "DmxPldChkOvfl1", 21, 1 },
		{ "DmxPldChkFifo1", 20, 1 },
		{ "DmxOptFifo1", 19, 1 },
		{ "DmxMpaFifo1", 18, 1 },
		{ "DmxDbFifo1", 17, 1 },
		{ "DmxAttFifo1", 16, 1 },
		{ "DmxIssFifo1", 15, 1 },
		{ "DmxTcpFifo1", 14, 1 },
		{ "DmxErrFifo1", 13, 1 },
		{ "Mps2TpIntf1", 12, 1 },
		{ "DmxPldChkOvfl0", 9, 1 },
		{ "DmxPldChkFifo0", 8, 1 },
		{ "DmxOptFifo0", 7, 1 },
		{ "DmxMpaFifo0", 6, 1 },
		{ "DmxDbFifo0", 5, 1 },
		{ "DmxAttFifo0", 4, 1 },
		{ "DmxIssFifo0", 3, 1 },
		{ "DmxTcpFifo0", 2, 1 },
		{ "DmxErrFifo0", 1, 1 },
		{ "Mps2TpIntf0", 0, 1 },
	{ "TP_E_IN0_PERR_CAUSE", 0x7f44, 0 },
		{ "DmxIssFifo", 30, 1 },
		{ "DmxErrFifo", 29, 1 },
		{ "DmxAttFifo", 28, 1 },
		{ "DmxTcpFifo", 27, 1 },
		{ "DmxMpaFifo", 26, 1 },
		{ "DmxOptFifo", 25, 1 },
		{ "IngTokenFifo", 24, 1 },
		{ "DmxPldChkOvfl1", 21, 1 },
		{ "DmxPldChkFifo1", 20, 1 },
		{ "DmxOptFifo1", 19, 1 },
		{ "DmxMpaFifo1", 18, 1 },
		{ "DmxDbFifo1", 17, 1 },
		{ "DmxAttFifo1", 16, 1 },
		{ "DmxIssFifo1", 15, 1 },
		{ "DmxTcpFifo1", 14, 1 },
		{ "DmxErrFifo1", 13, 1 },
		{ "Mps2TpIntf1", 12, 1 },
		{ "DmxPldChkOvfl0", 9, 1 },
		{ "DmxPldChkFifo0", 8, 1 },
		{ "DmxOptFifo0", 7, 1 },
		{ "DmxMpaFifo0", 6, 1 },
		{ "DmxDbFifo0", 5, 1 },
		{ "DmxAttFifo0", 4, 1 },
		{ "DmxIssFifo0", 3, 1 },
		{ "DmxTcpFifo0", 2, 1 },
		{ "DmxErrFifo0", 1, 1 },
		{ "Mps2TpIntf0", 0, 1 },
	{ "TP_E_IN1_PERR_ENABLE", 0x7f48, 0 },
		{ "DmxPldChkOvfl3", 21, 1 },
		{ "DmxPldChkFifo3", 20, 1 },
		{ "DmxOptFifo3", 19, 1 },
		{ "DmxMpaFifo3", 18, 1 },
		{ "DmxDbFifo3", 17, 1 },
		{ "DmxAttFifo3", 16, 1 },
		{ "DmxIssFifo3", 15, 1 },
		{ "DmxTcpFifo3", 14, 1 },
		{ "DmxErrFifo3", 13, 1 },
		{ "Mps2TpIntf3", 12, 1 },
		{ "DmxPldChkOvfl2", 9, 1 },
		{ "DmxPldChkFifo2", 8, 1 },
		{ "DmxOptFifo2", 7, 1 },
		{ "DmxMpaFifo2", 6, 1 },
		{ "DmxDbFifo2", 5, 1 },
		{ "DmxAttFifo2", 4, 1 },
		{ "DmxIssFifo2", 3, 1 },
		{ "DmxTcpFifo2", 2, 1 },
		{ "DmxErrFifo2", 1, 1 },
		{ "Mps2TpIntf2", 0, 1 },
	{ "TP_E_IN1_PERR_CAUSE", 0x7f4c, 0 },
		{ "DmxPldChkOvfl3", 21, 1 },
		{ "DmxPldChkFifo3", 20, 1 },
		{ "DmxOptFifo3", 19, 1 },
		{ "DmxMpaFifo3", 18, 1 },
		{ "DmxDbFifo3", 17, 1 },
		{ "DmxAttFifo3", 16, 1 },
		{ "DmxIssFifo3", 15, 1 },
		{ "DmxTcpFifo3", 14, 1 },
		{ "DmxErrFifo3", 13, 1 },
		{ "Mps2TpIntf3", 12, 1 },
		{ "DmxPldChkOvfl2", 9, 1 },
		{ "DmxPldChkFifo2", 8, 1 },
		{ "DmxOptFifo2", 7, 1 },
		{ "DmxMpaFifo2", 6, 1 },
		{ "DmxDbFifo2", 5, 1 },
		{ "DmxAttFifo2", 4, 1 },
		{ "DmxIssFifo2", 3, 1 },
		{ "DmxTcpFifo2", 2, 1 },
		{ "DmxErrFifo2", 1, 1 },
		{ "Mps2TpIntf2", 0, 1 },
	{ "TP_O_PERR_ENABLE", 0x7f50, 0 },
		{ "DmarbtPerr", 31, 1 },
		{ "FlmPerrSet", 28, 1 },
		{ "MmgrCacheDataSram", 24, 1 },
		{ "MmgrCacheTagFifo", 23, 1 },
		{ "DbL2tLutPerr", 22, 1 },
		{ "DbTxTidPerr", 21, 1 },
		{ "DbExtPerr", 20, 1 },
		{ "DbOpPerr", 19, 1 },
		{ "TmCachePerr", 18, 1 },
		{ "TpProtoSram", 16, 1 },
		{ "HspSram", 15, 1 },
		{ "RateGrpSram", 14, 1 },
		{ "TxFbSeqFifo", 13, 1 },
		{ "CmDataSram", 12, 1 },
		{ "CmTagFifo", 11, 1 },
		{ "RfcOpFifo", 10, 1 },
		{ "DelInvFifo", 9, 1 },
		{ "RssCfgSram", 8, 1 },
		{ "RssKeySram", 7, 1 },
		{ "RssLkpSram", 6, 1 },
		{ "SrqSram", 5, 1 },
		{ "ArpDaSram", 4, 1 },
		{ "ArpSaSram", 3, 1 },
		{ "ArpGreSram", 2, 1 },
		{ "ArpIpsecSram1", 1, 1 },
		{ "ArpIpsecSram0", 0, 1 },
	{ "TP_O_PERR_CAUSE", 0x7f54, 0 },
		{ "DmarbtPerr", 31, 1 },
		{ "FlmPerrSet", 28, 1 },
		{ "MmgrCacheDataSram", 24, 1 },
		{ "MmgrCacheTagFifo", 23, 1 },
		{ "DbL2tLutPerr", 22, 1 },
		{ "DbTxTidPerr", 21, 1 },
		{ "DbExtPerr", 20, 1 },
		{ "DbOpPerr", 19, 1 },
		{ "TmCachePerr", 18, 1 },
		{ "TpProtoSram", 16, 1 },
		{ "HspSram", 15, 1 },
		{ "RateGrpSram", 14, 1 },
		{ "TxFbSeqFifo", 13, 1 },
		{ "CmDataSram", 12, 1 },
		{ "CmTagFifo", 11, 1 },
		{ "RfcOpFifo", 10, 1 },
		{ "DelInvFifo", 9, 1 },
		{ "RssCfgSram", 8, 1 },
		{ "RssKeySram", 7, 1 },
		{ "RssLkpSram", 6, 1 },
		{ "SrqSram", 5, 1 },
		{ "ArpDaSram", 4, 1 },
		{ "ArpSaSram", 3, 1 },
		{ "ArpGreSram", 2, 1 },
		{ "ArpIpsecSram1", 1, 1 },
		{ "ArpIpsecSram0", 0, 1 },
	{ "TP_CERR_ENABLE", 0x7f58, 0 },
		{ "TpcEgDataFifo", 8, 1 },
		{ "TpcLbkDataFifo", 7, 1 },
		{ "RssLkpSram", 6, 1 },
		{ "SrqSram", 5, 1 },
		{ "ArpDaSram", 4, 1 },
		{ "ArpSaSram", 3, 1 },
		{ "ArpGreSram", 2, 1 },
		{ "ArpIpsecSram1", 1, 1 },
		{ "ArpIpsecSram0", 0, 1 },
	{ "TP_CERR_CAUSE", 0x7f5c, 0 },
		{ "TpcEgDataFifo", 8, 1 },
		{ "TpcLbkDataFifo", 7, 1 },
		{ "RssLkpSram", 6, 1 },
		{ "SrqSram", 5, 1 },
		{ "ArpDaSram", 4, 1 },
		{ "ArpSaSram", 3, 1 },
		{ "ArpGreSram", 2, 1 },
		{ "ArpIpsecSram1", 1, 1 },
		{ "ArpIpsecSram0", 0, 1 },
	{ NULL }
};

struct reg_info t7_ulp_tx_regs[] = {
	{ "ULP_TX_CONFIG", 0x8dc0, 0 },
		{ "LB_LEN_SEL", 28, 1 },
		{ "Disable_Tpt_Credit_Chk", 27, 1 },
		{ "ReqSrc", 26, 1 },
		{ "Err2uP", 25, 1 },
		{ "SGE_Invalidate_Dis", 24, 1 },
		{ "RoCE_AckReq_Ctrl", 23, 1 },
		{ "Mem_Addr_Ctrl", 21, 2 },
		{ "Tpt_Extension_Mode", 20, 1 },
		{ "xrc_indication", 19, 1 },
		{ "lso_1seg_len_upd_en", 18, 1 },
		{ "PKT_ISGL_ERR_ST_EN", 17, 1 },
		{ "ULIMIT_EXCLUSIVE_FIX", 16, 1 },
		{ "ISO_A_FLAG_EN", 15, 1 },
		{ "IWARP_SEQ_FLIT_DIS", 14, 1 },
		{ "T10_ISO_FIX_EN", 12, 1 },
		{ "CPL_FLAGS_UPDATE_EN", 11, 1 },
		{ "IWARP_SEQ_UPDATE_EN", 10, 1 },
		{ "SEQ_UPDATE_EN", 9, 1 },
		{ "ERR_ITT_EN", 8, 1 },
		{ "atomic_fix_dis", 7, 1 },
		{ "PHYS_ADDR_RESP_EN", 6, 1 },
		{ "ENDIANESS_CHANGE", 5, 1 },
		{ "ERR_RTAG_EN", 4, 1 },
		{ "TSO_ETHLEN_EN", 3, 1 },
		{ "emsg_more_info", 2, 1 },
		{ "LOSDR", 1, 1 },
		{ "extra_tag_insertion_enable", 0, 1 },
	{ "ULP_TX_PERR_INJECT", 0x8dc4, 0 },
		{ "MemSel", 1, 7 },
		{ "InjectDataErr", 0, 1 },
	{ "ULP_TX_INT_ENABLE_1", 0x8dc8, 0 },
		{ "Pbl_bound_err_ch3", 31, 1 },
		{ "Pbl_bound_err_ch2", 30, 1 },
		{ "Pbl_bound_err_ch1", 29, 1 },
		{ "Pbl_bound_err_ch0", 28, 1 },
		{ "sge2ulp_fifo_perr_set3", 27, 1 },
		{ "sge2ulp_fifo_perr_set2", 26, 1 },
		{ "sge2ulp_fifo_perr_set1", 25, 1 },
		{ "sge2ulp_fifo_perr_set0", 24, 1 },
		{ "cim2ulp_fifo_perr_set3", 23, 1 },
		{ "cim2ulp_fifo_perr_set2", 22, 1 },
		{ "cim2ulp_fifo_perr_set1", 21, 1 },
		{ "cim2ulp_fifo_perr_set0", 20, 1 },
		{ "CQE_fifo_perr_set3", 19, 1 },
		{ "CQE_fifo_perr_set2", 18, 1 },
		{ "CQE_fifo_perr_set1", 17, 1 },
		{ "CQE_fifo_perr_set0", 16, 1 },
		{ "pbl_fifo_perr_set3", 15, 1 },
		{ "pbl_fifo_perr_set2", 14, 1 },
		{ "pbl_fifo_perr_set1", 13, 1 },
		{ "pbl_fifo_perr_set0", 12, 1 },
		{ "cmd_fifo_perr_set3", 11, 1 },
		{ "cmd_fifo_perr_set2", 10, 1 },
		{ "cmd_fifo_perr_set1", 9, 1 },
		{ "cmd_fifo_perr_set0", 8, 1 },
		{ "lso_hdr_sram_perr_set3", 7, 1 },
		{ "lso_hdr_sram_perr_set2", 6, 1 },
		{ "lso_hdr_sram_perr_set1", 5, 1 },
		{ "lso_hdr_sram_perr_set0", 4, 1 },
		{ "tls_dsgl_ParErr3", 3, 1 },
		{ "tls_dsgl_ParErr2", 2, 1 },
		{ "tls_dsgl_ParErr1", 1, 1 },
		{ "tls_dsgl_ParErr0", 0, 1 },
	{ "ULP_TX_INT_CAUSE_1", 0x8dcc, 0 },
		{ "Pbl_bound_err_ch3", 31, 1 },
		{ "Pbl_bound_err_ch2", 30, 1 },
		{ "Pbl_bound_err_ch1", 29, 1 },
		{ "Pbl_bound_err_ch0", 28, 1 },
		{ "sge2ulp_fifo_perr_set3", 27, 1 },
		{ "sge2ulp_fifo_perr_set2", 26, 1 },
		{ "sge2ulp_fifo_perr_set1", 25, 1 },
		{ "sge2ulp_fifo_perr_set0", 24, 1 },
		{ "cim2ulp_fifo_perr_set3", 23, 1 },
		{ "cim2ulp_fifo_perr_set2", 22, 1 },
		{ "cim2ulp_fifo_perr_set1", 21, 1 },
		{ "cim2ulp_fifo_perr_set0", 20, 1 },
		{ "CQE_fifo_perr_set3", 19, 1 },
		{ "CQE_fifo_perr_set2", 18, 1 },
		{ "CQE_fifo_perr_set1", 17, 1 },
		{ "CQE_fifo_perr_set0", 16, 1 },
		{ "pbl_fifo_perr_set3", 15, 1 },
		{ "pbl_fifo_perr_set2", 14, 1 },
		{ "pbl_fifo_perr_set1", 13, 1 },
		{ "pbl_fifo_perr_set0", 12, 1 },
		{ "cmd_fifo_perr_set3", 11, 1 },
		{ "cmd_fifo_perr_set2", 10, 1 },
		{ "cmd_fifo_perr_set1", 9, 1 },
		{ "cmd_fifo_perr_set0", 8, 1 },
		{ "lso_hdr_sram_perr_set3", 7, 1 },
		{ "lso_hdr_sram_perr_set2", 6, 1 },
		{ "lso_hdr_sram_perr_set1", 5, 1 },
		{ "lso_hdr_sram_perr_set0", 4, 1 },
		{ "tls_dsgl_ParErr3", 3, 1 },
		{ "tls_dsgl_ParErr2", 2, 1 },
		{ "tls_dsgl_ParErr1", 1, 1 },
		{ "tls_dsgl_ParErr0", 0, 1 },
	{ "ULP_TX_PERR_ENABLE_1", 0x8dd0, 0 },
		{ "sge2ulp_fifo_perr_set3", 27, 1 },
		{ "sge2ulp_fifo_perr_set2", 26, 1 },
		{ "sge2ulp_fifo_perr_set1", 25, 1 },
		{ "sge2ulp_fifo_perr_set0", 24, 1 },
		{ "cim2ulp_fifo_perr_set3", 23, 1 },
		{ "cim2ulp_fifo_perr_set2", 22, 1 },
		{ "cim2ulp_fifo_perr_set1", 21, 1 },
		{ "cim2ulp_fifo_perr_set0", 20, 1 },
		{ "CQE_fifo_perr_set3", 19, 1 },
		{ "CQE_fifo_perr_set2", 18, 1 },
		{ "CQE_fifo_perr_set1", 17, 1 },
		{ "CQE_fifo_perr_set0", 16, 1 },
		{ "pbl_fifo_perr_set3", 15, 1 },
		{ "pbl_fifo_perr_set2", 14, 1 },
		{ "pbl_fifo_perr_set1", 13, 1 },
		{ "pbl_fifo_perr_set0", 12, 1 },
		{ "cmd_fifo_perr_set3", 11, 1 },
		{ "cmd_fifo_perr_set2", 10, 1 },
		{ "cmd_fifo_perr_set1", 9, 1 },
		{ "cmd_fifo_perr_set0", 8, 1 },
		{ "lso_hdr_sram_perr_set3", 7, 1 },
		{ "lso_hdr_sram_perr_set2", 6, 1 },
		{ "lso_hdr_sram_perr_set1", 5, 1 },
		{ "lso_hdr_sram_perr_set0", 4, 1 },
		{ "tls_dsgl_ParErr3", 3, 1 },
		{ "tls_dsgl_ParErr2", 2, 1 },
		{ "tls_dsgl_ParErr1", 1, 1 },
		{ "tls_dsgl_ParErr0", 0, 1 },
	{ "ULP_TX_TPT_LLIMIT", 0x8dd4, 0 },
	{ "ULP_TX_TPT_ULIMIT", 0x8dd8, 0 },
	{ "ULP_TX_PBL_LLIMIT", 0x8ddc, 0 },
	{ "ULP_TX_PBL_ULIMIT", 0x8de0, 0 },
	{ "ULP_TX_NVME_TCP_TPT_LLIMIT", 0x8fa4, 0 },
	{ "ULP_TX_NVME_TCP_TPT_ULIMIT", 0x8fa8, 0 },
	{ "ULP_TX_NVME_TCP_PBL_LLIMIT", 0x8fac, 0 },
	{ "ULP_TX_NVME_TCP_PBL_ULIMIT", 0x8fb0, 0 },
	{ "ULP_TX_DBG_CTL", 0x8fb8, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG_L", 16, 1 },
		{ "SEL_L", 0, 8 },
	{ "ULP_TX_DBG_DATA", 0x8fbc, 0 },
	{ "ULP_TX_TLS_CTL", 0x8de4, 0 },
		{ "TlsPerrEn", 4, 1 },
		{ "TlsDisableIFuse", 2, 1 },
		{ "TlsDisableCFuse", 1, 1 },
		{ "TlsDisable", 0, 1 },
	{ "ULP_TX_FID_1", 0x8de8, 0 },
	{ "ULP_TX_CPL_PACK_SIZE1", 0x8df8, 0 },
		{ "Ch3Size1", 24, 8 },
		{ "Ch2Size1", 16, 8 },
		{ "Ch1Size1", 8, 8 },
		{ "Ch0Size1", 0, 8 },
	{ "ULP_TX_CPL_PACK_SIZE2", 0x8dfc, 0 },
		{ "Ch3Size2", 24, 8 },
		{ "Ch2Size2", 16, 8 },
		{ "Ch1Size2", 8, 8 },
		{ "Ch0Size2", 0, 8 },
	{ "ULP_TX_ERR_MSG2CIM", 0x8e00, 0 },
	{ "ULP_TX_ERR_TABLE_BASE", 0x8e04, 0 },
	{ "ULP_TX_ERR_CNT_CH0", 0x8e10, 0 },
	{ "ULP_TX_ERR_CNT_CH1", 0x8e14, 0 },
	{ "ULP_TX_ERR_CNT_CH2", 0x8e18, 0 },
	{ "ULP_TX_ERR_CNT_CH3", 0x8e1c, 0 },
	{ "ULP_TX_FC_SOF", 0x8e20, 0 },
		{ "SOF_FS3", 24, 8 },
		{ "SOF_FS2", 16, 8 },
		{ "SOF_3", 8, 8 },
		{ "SOF_2", 0, 8 },
	{ "ULP_TX_FC_EOF", 0x8e24, 0 },
		{ "EOF_LS3", 24, 8 },
		{ "EOF_LS2", 16, 8 },
		{ "EOF_3", 8, 8 },
		{ "EOF_2", 0, 8 },
	{ "ULP_TX_CGEN_GLOBAL", 0x8e28, 0 },
	{ "ULP_TX_CGEN", 0x8e2c, 0 },
		{ "ULP_TX_CGEN_Storage", 8, 4 },
		{ "ULP_TX_CGEN_RDMA", 4, 4 },
		{ "ULP_TX_CGEN_Channel", 0, 4 },
	{ "ULP_TX_MEM_CFG", 0x8e30, 0 },
		{ "GlobalEnable", 31, 1 },
		{ "RDREQ_SZ", 3, 3 },
		{ "WRREQ_SZ", 0, 3 },
	{ "ULP_TX_INT_ENABLE_2", 0x8e7c, 0 },
		{ "edma_in_fifo_perr_set3", 31, 1 },
		{ "edma_in_fifo_perr_set2", 30, 1 },
		{ "edma_in_fifo_perr_set1", 29, 1 },
		{ "edma_in_fifo_perr_set0", 28, 1 },
		{ "align_ctl_fifo_perr_set3", 27, 1 },
		{ "align_ctl_fifo_perr_set2", 26, 1 },
		{ "align_ctl_fifo_perr_set1", 25, 1 },
		{ "align_ctl_fifo_perr_set0", 24, 1 },
		{ "sge_fifo_perr_set3", 23, 1 },
		{ "sge_fifo_perr_set2", 22, 1 },
		{ "sge_fifo_perr_set1", 21, 1 },
		{ "sge_fifo_perr_set0", 20, 1 },
		{ "stag_fifo_perr_set3", 19, 1 },
		{ "stag_fifo_perr_set2", 18, 1 },
		{ "stag_fifo_perr_set1", 17, 1 },
		{ "stag_fifo_perr_set0", 16, 1 },
		{ "map_fifo_perr_set3", 15, 1 },
		{ "map_fifo_perr_set2", 14, 1 },
		{ "map_fifo_perr_set1", 13, 1 },
		{ "map_fifo_perr_set0", 12, 1 },
		{ "dma_fifo_perr_set3", 11, 1 },
		{ "dma_fifo_perr_set2", 10, 1 },
		{ "dma_fifo_perr_set1", 9, 1 },
		{ "dma_fifo_perr_set0", 8, 1 },
		{ "fso_hdr_sram_perr_set3", 7, 1 },
		{ "fso_hdr_sram_perr_set2", 6, 1 },
		{ "fso_hdr_sram_perr_set1", 5, 1 },
		{ "fso_hdr_sram_perr_set0", 4, 1 },
		{ "t10_pi_sram_perr_set3", 3, 1 },
		{ "t10_pi_sram_perr_set2", 2, 1 },
		{ "t10_pi_sram_perr_set1", 1, 1 },
		{ "t10_pi_sram_perr_set0", 0, 1 },
	{ "ULP_TX_INT_CAUSE_2", 0x8e80, 0 },
		{ "edma_in_fifo_perr_set3", 31, 1 },
		{ "edma_in_fifo_perr_set2", 30, 1 },
		{ "edma_in_fifo_perr_set1", 29, 1 },
		{ "edma_in_fifo_perr_set0", 28, 1 },
		{ "align_ctl_fifo_perr_set3", 27, 1 },
		{ "align_ctl_fifo_perr_set2", 26, 1 },
		{ "align_ctl_fifo_perr_set1", 25, 1 },
		{ "align_ctl_fifo_perr_set0", 24, 1 },
		{ "sge_fifo_perr_set3", 23, 1 },
		{ "sge_fifo_perr_set2", 22, 1 },
		{ "sge_fifo_perr_set1", 21, 1 },
		{ "sge_fifo_perr_set0", 20, 1 },
		{ "stag_fifo_perr_set3", 19, 1 },
		{ "stag_fifo_perr_set2", 18, 1 },
		{ "stag_fifo_perr_set1", 17, 1 },
		{ "stag_fifo_perr_set0", 16, 1 },
		{ "map_fifo_perr_set3", 15, 1 },
		{ "map_fifo_perr_set2", 14, 1 },
		{ "map_fifo_perr_set1", 13, 1 },
		{ "map_fifo_perr_set0", 12, 1 },
		{ "dma_fifo_perr_set3", 11, 1 },
		{ "dma_fifo_perr_set2", 10, 1 },
		{ "dma_fifo_perr_set1", 9, 1 },
		{ "dma_fifo_perr_set0", 8, 1 },
		{ "fso_hdr_sram_perr_set3", 7, 1 },
		{ "fso_hdr_sram_perr_set2", 6, 1 },
		{ "fso_hdr_sram_perr_set1", 5, 1 },
		{ "fso_hdr_sram_perr_set0", 4, 1 },
		{ "t10_pi_sram_perr_set3", 3, 1 },
		{ "t10_pi_sram_perr_set2", 2, 1 },
		{ "t10_pi_sram_perr_set1", 1, 1 },
		{ "t10_pi_sram_perr_set0", 0, 1 },
	{ "ULP_TX_PERR_ENABLE_2", 0x8e84, 0 },
		{ "edma_in_fifo_perr_set3", 31, 1 },
		{ "edma_in_fifo_perr_set2", 30, 1 },
		{ "edma_in_fifo_perr_set1", 29, 1 },
		{ "edma_in_fifo_perr_set0", 28, 1 },
		{ "align_ctl_fifo_perr_set3", 27, 1 },
		{ "align_ctl_fifo_perr_set2", 26, 1 },
		{ "align_ctl_fifo_perr_set1", 25, 1 },
		{ "align_ctl_fifo_perr_set0", 24, 1 },
		{ "sge_fifo_perr_set3", 23, 1 },
		{ "sge_fifo_perr_set2", 22, 1 },
		{ "sge_fifo_perr_set1", 21, 1 },
		{ "sge_fifo_perr_set0", 20, 1 },
		{ "stag_fifo_perr_set3", 19, 1 },
		{ "stag_fifo_perr_set2", 18, 1 },
		{ "stag_fifo_perr_set1", 17, 1 },
		{ "stag_fifo_perr_set0", 16, 1 },
		{ "map_fifo_perr_set3", 15, 1 },
		{ "map_fifo_perr_set2", 14, 1 },
		{ "map_fifo_perr_set1", 13, 1 },
		{ "map_fifo_perr_set0", 12, 1 },
		{ "dma_fifo_perr_set3", 11, 1 },
		{ "dma_fifo_perr_set2", 10, 1 },
		{ "dma_fifo_perr_set1", 9, 1 },
		{ "dma_fifo_perr_set0", 8, 1 },
		{ "fso_hdr_sram_perr_set3", 7, 1 },
		{ "fso_hdr_sram_perr_set2", 6, 1 },
		{ "fso_hdr_sram_perr_set1", 5, 1 },
		{ "fso_hdr_sram_perr_set0", 4, 1 },
		{ "t10_pi_sram_perr_set3", 3, 1 },
		{ "t10_pi_sram_perr_set2", 2, 1 },
		{ "t10_pi_sram_perr_set1", 1, 1 },
		{ "t10_pi_sram_perr_set0", 0, 1 },
	{ "ULP_TX_INT_ENABLE_3", 0x8e88, 0 },
		{ "gf_sge_fifo_ParErr3", 31, 1 },
		{ "gf_sge_fifo_ParErr2", 30, 1 },
		{ "gf_sge_fifo_ParErr1", 29, 1 },
		{ "gf_sge_fifo_ParErr0", 28, 1 },
		{ "dedupe_sge_fifo_ParErr3", 27, 1 },
		{ "dedupe_sge_fifo_ParErr2", 26, 1 },
		{ "dedupe_sge_fifo_ParErr1", 25, 1 },
		{ "dedupe_sge_fifo_ParErr0", 24, 1 },
		{ "gf3_dsgl_fifo_ParErr", 23, 1 },
		{ "gf2_dsgl_fifo_ParErr", 22, 1 },
		{ "gf1_dsgl_fifo_ParErr", 21, 1 },
		{ "gf0_dsgl_fifo_ParErr", 20, 1 },
		{ "dedupe3_dsgl_fifo_ParErr", 19, 1 },
		{ "dedupe2_dsgl_fifo_ParErr", 18, 1 },
		{ "dedupe1_dsgl_fifo_ParErr", 17, 1 },
		{ "dedupe0_dsgl_fifo_ParErr", 16, 1 },
		{ "xp10_sge_fifo_ParErr", 15, 1 },
		{ "dsgl_par_err", 14, 1 },
		{ "cddip_int", 13, 1 },
		{ "cceip_int", 12, 1 },
		{ "tls_sge_fifo_ParErr3", 11, 1 },
		{ "tls_sge_fifo_ParErr2", 10, 1 },
		{ "tls_sge_fifo_ParErr1", 9, 1 },
		{ "tls_sge_fifo_ParErr0", 8, 1 },
		{ "ulp2smarbt_rsp_perr", 6, 1 },
		{ "ulptx2ma_rsp_perr", 5, 1 },
		{ "pcie2ulp_perr3", 4, 1 },
		{ "pcie2ulp_perr2", 3, 1 },
		{ "pcie2ulp_perr1", 2, 1 },
		{ "pcie2ulp_perr0", 1, 1 },
		{ "cim2ulp_perr", 0, 1 },
	{ "ULP_TX_INT_CAUSE_3", 0x8e8c, 0 },
		{ "gf_sge_fifo_ParErr3", 31, 1 },
		{ "gf_sge_fifo_ParErr2", 30, 1 },
		{ "gf_sge_fifo_ParErr1", 29, 1 },
		{ "gf_sge_fifo_ParErr0", 28, 1 },
		{ "dedupe_sge_fifo_ParErr3", 27, 1 },
		{ "dedupe_sge_fifo_ParErr2", 26, 1 },
		{ "dedupe_sge_fifo_ParErr1", 25, 1 },
		{ "dedupe_sge_fifo_ParErr0", 24, 1 },
		{ "gf3_dsgl_fifo_ParErr", 23, 1 },
		{ "gf2_dsgl_fifo_ParErr", 22, 1 },
		{ "gf1_dsgl_fifo_ParErr", 21, 1 },
		{ "gf0_dsgl_fifo_ParErr", 20, 1 },
		{ "dedupe3_dsgl_fifo_ParErr", 19, 1 },
		{ "dedupe2_dsgl_fifo_ParErr", 18, 1 },
		{ "dedupe1_dsgl_fifo_ParErr", 17, 1 },
		{ "dedupe0_dsgl_fifo_ParErr", 16, 1 },
		{ "xp10_sge_fifo_ParErr", 15, 1 },
		{ "dsgl_par_err", 14, 1 },
		{ "cddip_int", 13, 1 },
		{ "cceip_int", 12, 1 },
		{ "tls_sge_fifo_ParErr3", 11, 1 },
		{ "tls_sge_fifo_ParErr2", 10, 1 },
		{ "tls_sge_fifo_ParErr1", 9, 1 },
		{ "tls_sge_fifo_ParErr0", 8, 1 },
		{ "ulp2smarbt_rsp_perr", 6, 1 },
		{ "ulptx2ma_rsp_perr", 5, 1 },
		{ "pcie2ulp_perr3", 4, 1 },
		{ "pcie2ulp_perr2", 3, 1 },
		{ "pcie2ulp_perr1", 2, 1 },
		{ "pcie2ulp_perr0", 1, 1 },
		{ "cim2ulp_perr", 0, 1 },
	{ "ULP_TX_PERR_ENABLE_3", 0x8e90, 0 },
		{ "gf_sge_fifo_ParErr3", 31, 1 },
		{ "gf_sge_fifo_ParErr2", 30, 1 },
		{ "gf_sge_fifo_ParErr1", 29, 1 },
		{ "gf_sge_fifo_ParErr0", 28, 1 },
		{ "dedupe_sge_fifo_ParErr3", 27, 1 },
		{ "dedupe_sge_fifo_ParErr2", 26, 1 },
		{ "dedupe_sge_fifo_ParErr1", 25, 1 },
		{ "dedupe_sge_fifo_ParErr0", 24, 1 },
		{ "gf3_dsgl_fifo_ParErr", 23, 1 },
		{ "gf2_dsgl_fifo_ParErr", 22, 1 },
		{ "gf1_dsgl_fifo_ParErr", 21, 1 },
		{ "gf0_dsgl_fifo_ParErr", 20, 1 },
		{ "dedupe3_dsgl_fifo_ParErr", 19, 1 },
		{ "dedupe2_dsgl_fifo_ParErr", 18, 1 },
		{ "dedupe1_dsgl_fifo_ParErr", 17, 1 },
		{ "dedupe0_dsgl_fifo_ParErr", 16, 1 },
		{ "xp10_sge_fifo_ParErr", 15, 1 },
		{ "dsgl_par_err", 14, 1 },
		{ "cddip_int", 13, 1 },
		{ "cceip_int", 12, 1 },
		{ "tls_sge_fifo_ParErr3", 11, 1 },
		{ "tls_sge_fifo_ParErr2", 10, 1 },
		{ "tls_sge_fifo_ParErr1", 9, 1 },
		{ "tls_sge_fifo_ParErr0", 8, 1 },
		{ "ulp2smarbt_rsp_perr", 6, 1 },
		{ "ulptx2ma_rsp_perr", 5, 1 },
		{ "pcie2ulp_perr3", 4, 1 },
		{ "pcie2ulp_perr2", 3, 1 },
		{ "pcie2ulp_perr1", 2, 1 },
		{ "pcie2ulp_perr0", 1, 1 },
		{ "cim2ulp_perr", 0, 1 },
	{ "ULP_TX_INT_ENABLE_4", 0x8e94, 0 },
		{ "dma_par_err3", 28, 4 },
		{ "dma_par_err2", 24, 4 },
		{ "dma_par_err1", 20, 4 },
		{ "dma_par_err0", 16, 4 },
		{ "core_cmd_fifo_lb1", 12, 4 },
		{ "core_cmd_fifo_lb0", 8, 4 },
		{ "xp10_2_ulp_perr", 7, 1 },
		{ "ulp_2_xp10_perr", 6, 1 },
		{ "cmd_fifo_lb1", 5, 1 },
		{ "cmd_fifo_lb0", 4, 1 },
		{ "tf_tp_perr", 3, 1 },
		{ "tf_sge_perr", 2, 1 },
		{ "tf_mem_perr", 1, 1 },
		{ "tf_mp_perr", 0, 1 },
	{ "ULP_TX_INT_CAUSE_4", 0x8e98, 0 },
		{ "dma_par_err3", 28, 4 },
		{ "dma_par_err2", 24, 4 },
		{ "dma_par_err1", 20, 4 },
		{ "dma_par_err0", 16, 4 },
		{ "core_cmd_fifo_lb1", 12, 4 },
		{ "core_cmd_fifo_lb0", 8, 4 },
		{ "xp10_2_ulp_perr", 7, 1 },
		{ "ulp_2_xp10_perr", 6, 1 },
		{ "cmd_fifo_lb1", 5, 1 },
		{ "cmd_fifo_lb0", 4, 1 },
		{ "tf_tp_perr", 3, 1 },
		{ "tf_sge_perr", 2, 1 },
		{ "tf_mem_perr", 1, 1 },
		{ "tf_mp_perr", 0, 1 },
	{ "ULP_TX_PERR_ENABLE_4", 0x8e9c, 0 },
		{ "dma_par_err3", 28, 4 },
		{ "dma_par_err2", 24, 4 },
		{ "dma_par_err1", 20, 4 },
		{ "dma_par_err0", 16, 4 },
		{ "core_cmd_fifo_lb1", 12, 4 },
		{ "core_cmd_fifo_lb0", 8, 4 },
		{ "xp10_2_ulp_perr", 7, 1 },
		{ "ulp_2_xp10_perr", 6, 1 },
		{ "cmd_fifo_lb1", 5, 1 },
		{ "cmd_fifo_lb0", 4, 1 },
		{ "tf_tp_perr", 3, 1 },
		{ "tf_sge_perr", 2, 1 },
		{ "tf_mem_perr", 1, 1 },
		{ "tf_mp_perr", 0, 1 },
	{ "ULP_TX_INT_ENABLE_5", 0x8ec4, 0 },
		{ "DeDupe_Perr3", 23, 1 },
		{ "DeDupe_Perr2", 22, 1 },
		{ "DeDupe_Perr1", 21, 1 },
		{ "DeDupe_Perr0", 20, 1 },
		{ "GF_Perr3", 19, 1 },
		{ "GF_Perr2", 18, 1 },
		{ "GF_Perr1", 17, 1 },
		{ "GF_Perr0", 16, 1 },
		{ "SGE2ULP_inv_perr", 13, 1 },
		{ "PL_BusPerr", 12, 1 },
		{ "TLSTX2ULPTX_Perr3", 11, 1 },
		{ "TLSTX2ULPTX_Perr2", 10, 1 },
		{ "TLSTX2ULPTX_Perr1", 9, 1 },
		{ "TLSTX2ULPTX_Perr0", 8, 1 },
		{ "xp10_2_ulp_pl_perr", 1, 1 },
		{ "ulp_2_xp10_pl_perr", 0, 1 },
	{ "ULP_TX_INT_CAUSE_5", 0x8ec8, 0 },
		{ "DeDupe_Perr3", 23, 1 },
		{ "DeDupe_Perr2", 22, 1 },
		{ "DeDupe_Perr1", 21, 1 },
		{ "DeDupe_Perr0", 20, 1 },
		{ "GF_Perr3", 19, 1 },
		{ "GF_Perr2", 18, 1 },
		{ "GF_Perr1", 17, 1 },
		{ "GF_Perr0", 16, 1 },
		{ "SGE2ULP_inv_perr", 13, 1 },
		{ "PL_BusPerr", 12, 1 },
		{ "TLSTX2ULPTX_Perr3", 11, 1 },
		{ "TLSTX2ULPTX_Perr2", 10, 1 },
		{ "TLSTX2ULPTX_Perr1", 9, 1 },
		{ "TLSTX2ULPTX_Perr0", 8, 1 },
		{ "xp10_2_ulp_pl_perr", 1, 1 },
		{ "ulp_2_xp10_pl_perr", 0, 1 },
	{ "ULP_TX_PERR_ENABLE_5", 0x8ecc, 0 },
		{ "DeDupe_Perr3", 23, 1 },
		{ "DeDupe_Perr2", 22, 1 },
		{ "DeDupe_Perr1", 21, 1 },
		{ "DeDupe_Perr0", 20, 1 },
		{ "GF_Perr3", 19, 1 },
		{ "GF_Perr2", 18, 1 },
		{ "GF_Perr1", 17, 1 },
		{ "GF_Perr0", 16, 1 },
		{ "SGE2ULP_inv_perr", 13, 1 },
		{ "PL_BusPerr", 12, 1 },
		{ "TLSTX2ULPTX_Perr3", 11, 1 },
		{ "TLSTX2ULPTX_Perr2", 10, 1 },
		{ "TLSTX2ULPTX_Perr1", 9, 1 },
		{ "TLSTX2ULPTX_Perr0", 8, 1 },
		{ "xp10_2_ulp_pl_perr", 1, 1 },
		{ "ulp_2_xp10_pl_perr", 0, 1 },
	{ "ULP_TX_INT_CAUSE_6", 0x8ed0, 0 },
		{ "DDR_hdr_fifo_perr_set3", 12, 1 },
		{ "DDR_hdr_fifo_perr_set2", 11, 1 },
		{ "DDR_hdr_fifo_perr_set1", 10, 1 },
		{ "DDR_hdr_fifo_perr_set0", 9, 1 },
		{ "pre_MP_rsp_perr_set3", 8, 1 },
		{ "pre_MP_rsp_perr_set2", 7, 1 },
		{ "pre_MP_rsp_perr_set1", 6, 1 },
		{ "pre_MP_rsp_perr_set0", 5, 1 },
		{ "pre_CQE_fifo_perr_set3", 4, 1 },
		{ "pre_CQE_fifo_perr_set2", 3, 1 },
		{ "pre_CQE_fifo_perr_set1", 2, 1 },
		{ "pre_CQE_fifo_perr_set0", 1, 1 },
		{ "rsp_fifo_perr_set", 0, 1 },
	{ "ULP_TX_INT_ENABLE_6", 0x8ed4, 0 },
		{ "DDR_hdr_fifo_perr_set3", 12, 1 },
		{ "DDR_hdr_fifo_perr_set2", 11, 1 },
		{ "DDR_hdr_fifo_perr_set1", 10, 1 },
		{ "DDR_hdr_fifo_perr_set0", 9, 1 },
		{ "pre_MP_rsp_perr_set3", 8, 1 },
		{ "pre_MP_rsp_perr_set2", 7, 1 },
		{ "pre_MP_rsp_perr_set1", 6, 1 },
		{ "pre_MP_rsp_perr_set0", 5, 1 },
		{ "pre_CQE_fifo_perr_set3", 4, 1 },
		{ "pre_CQE_fifo_perr_set2", 3, 1 },
		{ "pre_CQE_fifo_perr_set1", 2, 1 },
		{ "pre_CQE_fifo_perr_set0", 1, 1 },
		{ "rsp_fifo_perr_set", 0, 1 },
	{ "ULP_TX_PERR_ENABLE_6", 0x8ed8, 0 },
		{ "DDR_hdr_fifo_perr_set3", 12, 1 },
		{ "DDR_hdr_fifo_perr_set2", 11, 1 },
		{ "DDR_hdr_fifo_perr_set1", 10, 1 },
		{ "DDR_hdr_fifo_perr_set0", 9, 1 },
		{ "pre_MP_rsp_perr_set3", 8, 1 },
		{ "pre_MP_rsp_perr_set2", 7, 1 },
		{ "pre_MP_rsp_perr_set1", 6, 1 },
		{ "pre_MP_rsp_perr_set0", 5, 1 },
		{ "pre_CQE_fifo_perr_set3", 4, 1 },
		{ "pre_CQE_fifo_perr_set2", 3, 1 },
		{ "pre_CQE_fifo_perr_set1", 2, 1 },
		{ "pre_CQE_fifo_perr_set0", 1, 1 },
		{ "rsp_fifo_perr_set", 0, 1 },
	{ "ULP_TX_INT_CAUSE_7", 0x8edc, 0 },
		{ "tls_sge_fifo_CorErr3", 23, 1 },
		{ "tls_sge_fifo_CorErr2", 22, 1 },
		{ "tls_sge_fifo_CorErr1", 21, 1 },
		{ "tls_sge_fifo_CorErr0", 20, 1 },
		{ "lso_hdr_sram_cerr_set3", 19, 1 },
		{ "lso_hdr_sram_cerr_set2", 18, 1 },
		{ "lso_hdr_sram_cerr_set1", 17, 1 },
		{ "lso_hdr_sram_cerr_set0", 16, 1 },
		{ "core_cmd_fifo_cerr_set_ch3_lb1", 15, 1 },
		{ "core_cmd_fifo_cerr_set_ch2_lb1", 14, 1 },
		{ "core_cmd_fifo_cerr_set_ch1_lb1", 13, 1 },
		{ "core_cmd_fifo_cerr_set_ch0_lb1", 12, 1 },
		{ "core_cmd_fifo_cerr_set_ch3_lb0", 11, 1 },
		{ "core_cmd_fifo_cerr_set_ch2_lb0", 10, 1 },
		{ "core_cmd_fifo_cerr_set_ch1_lb0", 9, 1 },
		{ "core_cmd_fifo_cerr_set_ch0_lb0", 8, 1 },
		{ "CQE_fifo_cerr_set3", 7, 1 },
		{ "CQE_fifo_cerr_set2", 6, 1 },
		{ "CQE_fifo_cerr_set1", 5, 1 },
		{ "CQE_fifo_cerr_set0", 4, 1 },
		{ "pre_CQE_fifo_cerr_set3", 3, 1 },
		{ "pre_CQE_fifo_cerr_set2", 2, 1 },
		{ "pre_CQE_fifo_cerr_set1", 1, 1 },
		{ "pre_CQE_fifo_cerr_set0", 0, 1 },
	{ "ULP_TX_INT_ENABLE_7", 0x8ee0, 0 },
		{ "tls_sge_fifo_CorErr3", 23, 1 },
		{ "tls_sge_fifo_CorErr2", 22, 1 },
		{ "tls_sge_fifo_CorErr1", 21, 1 },
		{ "tls_sge_fifo_CorErr0", 20, 1 },
		{ "lso_hdr_sram_cerr_set3", 19, 1 },
		{ "lso_hdr_sram_cerr_set2", 18, 1 },
		{ "lso_hdr_sram_cerr_set1", 17, 1 },
		{ "lso_hdr_sram_cerr_set0", 16, 1 },
		{ "core_cmd_fifo_cerr_set_ch3_lb1", 15, 1 },
		{ "core_cmd_fifo_cerr_set_ch2_lb1", 14, 1 },
		{ "core_cmd_fifo_cerr_set_ch1_lb1", 13, 1 },
		{ "core_cmd_fifo_cerr_set_ch0_lb1", 12, 1 },
		{ "core_cmd_fifo_cerr_set_ch3_lb0", 11, 1 },
		{ "core_cmd_fifo_cerr_set_ch2_lb0", 10, 1 },
		{ "core_cmd_fifo_cerr_set_ch1_lb0", 9, 1 },
		{ "core_cmd_fifo_cerr_set_ch0_lb0", 8, 1 },
		{ "CQE_fifo_cerr_set3", 7, 1 },
		{ "CQE_fifo_cerr_set2", 6, 1 },
		{ "CQE_fifo_cerr_set1", 5, 1 },
		{ "CQE_fifo_cerr_set0", 4, 1 },
		{ "pre_CQE_fifo_cerr_set3", 3, 1 },
		{ "pre_CQE_fifo_cerr_set2", 2, 1 },
		{ "pre_CQE_fifo_cerr_set1", 1, 1 },
		{ "pre_CQE_fifo_cerr_set0", 0, 1 },
	{ "ULP_TX_INT_CAUSE_8", 0x8ee4, 0 },
		{ "mem_rsp_fifo_cerr_set3", 28, 1 },
		{ "mem_rsp_fifo_cerr_set2", 27, 1 },
		{ "mem_rsp_fifo_cerr_set1", 26, 1 },
		{ "mem_rsp_fifo_cerr_set0", 25, 1 },
		{ "pi_sram_cerr_set3", 24, 1 },
		{ "pi_sram_cerr_set2", 23, 1 },
		{ "pi_sram_cerr_set1", 22, 1 },
		{ "pi_sram_cerr_set0", 21, 1 },
		{ "pre_MP_rsp_cerr_set3", 20, 1 },
		{ "pre_MP_rsp_cerr_set2", 19, 1 },
		{ "pre_MP_rsp_cerr_set1", 18, 1 },
		{ "pre_MP_rsp_cerr_set0", 17, 1 },
		{ "DDR_hdr_fifo_cerr_set3", 16, 1 },
		{ "DDR_hdr_fifo_cerr_set2", 15, 1 },
		{ "DDR_hdr_fifo_cerr_set1", 14, 1 },
		{ "DDR_hdr_fifo_cerr_set0", 13, 1 },
		{ "cmd_fifo_cerr_set3", 12, 1 },
		{ "cmd_fifo_cerr_set2", 11, 1 },
		{ "cmd_fifo_cerr_set1", 10, 1 },
		{ "cmd_fifo_cerr_set0", 9, 1 },
		{ "gf_sge_fifo_CorErr3", 8, 1 },
		{ "gf_sge_fifo_CorErr2", 7, 1 },
		{ "gf_sge_fifo_CorErr1", 6, 1 },
		{ "gf_sge_fifo_CorErr0", 5, 1 },
		{ "dedupe_sge_fifo_CorErr3", 4, 1 },
		{ "dedupe_sge_fifo_CorErr2", 3, 1 },
		{ "dedupe_sge_fifo_CorErr1", 2, 1 },
		{ "dedupe_sge_fifo_CorErr0", 1, 1 },
		{ "rsp_fifo_cerr_set", 0, 1 },
	{ "ULP_TX_INT_ENABLE_8", 0x8ee8, 0 },
		{ "mem_rsp_fifo_cerr_set3", 28, 1 },
		{ "mem_rsp_fifo_cerr_set2", 27, 1 },
		{ "mem_rsp_fifo_cerr_set1", 26, 1 },
		{ "mem_rsp_fifo_cerr_set0", 25, 1 },
		{ "pi_sram_cerr_set3", 24, 1 },
		{ "pi_sram_cerr_set2", 23, 1 },
		{ "pi_sram_cerr_set1", 22, 1 },
		{ "pi_sram_cerr_set0", 21, 1 },
		{ "pre_MP_rsp_cerr_set3", 20, 1 },
		{ "pre_MP_rsp_cerr_set2", 19, 1 },
		{ "pre_MP_rsp_cerr_set1", 18, 1 },
		{ "pre_MP_rsp_cerr_set0", 17, 1 },
		{ "DDR_hdr_fifo_cerr_set3", 16, 1 },
		{ "DDR_hdr_fifo_cerr_set2", 15, 1 },
		{ "DDR_hdr_fifo_cerr_set1", 14, 1 },
		{ "DDR_hdr_fifo_cerr_set0", 13, 1 },
		{ "cmd_fifo_cerr_set3", 12, 1 },
		{ "cmd_fifo_cerr_set2", 11, 1 },
		{ "cmd_fifo_cerr_set1", 10, 1 },
		{ "cmd_fifo_cerr_set0", 9, 1 },
		{ "gf_sge_fifo_CorErr3", 8, 1 },
		{ "gf_sge_fifo_CorErr2", 7, 1 },
		{ "gf_sge_fifo_CorErr1", 6, 1 },
		{ "gf_sge_fifo_CorErr0", 5, 1 },
		{ "dedupe_sge_fifo_CorErr3", 4, 1 },
		{ "dedupe_sge_fifo_CorErr2", 3, 1 },
		{ "dedupe_sge_fifo_CorErr1", 2, 1 },
		{ "dedupe_sge_fifo_CorErr0", 1, 1 },
		{ "rsp_fifo_cerr_set", 0, 1 },
	{ "ULP_TX_SE_CNT_ERR", 0x8ea0, 0 },
		{ "ERR_CH3", 12, 4 },
		{ "ERR_CH2", 8, 4 },
		{ "ERR_CH1", 4, 4 },
		{ "ERR_CH0", 0, 4 },
	{ "ULP_TX_SE_CNT_CLR", 0x8ea4, 0 },
		{ "CLR_DROP", 16, 4 },
		{ "CLR_CH3", 12, 4 },
		{ "CLR_CH2", 8, 4 },
		{ "CLR_CH1", 4, 4 },
		{ "CLR_CH0", 0, 4 },
	{ "ULP_TX_SE_CNT_CH0", 0x8ea8, 0 },
		{ "SOP_CNT_ULP2TP", 28, 4 },
		{ "EOP_CNT_ULP2TP", 24, 4 },
		{ "SOP_CNT_LSO_IN", 20, 4 },
		{ "EOP_CNT_LSO_IN", 16, 4 },
		{ "SOP_CNT_ALG_IN", 12, 4 },
		{ "EOP_CNT_ALG_IN", 8, 4 },
		{ "SOP_CNT_CIM2ULP", 4, 4 },
		{ "EOP_CNT_CIM2ULP", 0, 4 },
	{ "ULP_TX_SE_CNT_CH1", 0x8eac, 0 },
		{ "SOP_CNT_ULP2TP", 28, 4 },
		{ "EOP_CNT_ULP2TP", 24, 4 },
		{ "SOP_CNT_LSO_IN", 20, 4 },
		{ "EOP_CNT_LSO_IN", 16, 4 },
		{ "SOP_CNT_ALG_IN", 12, 4 },
		{ "EOP_CNT_ALG_IN", 8, 4 },
		{ "SOP_CNT_CIM2ULP", 4, 4 },
		{ "EOP_CNT_CIM2ULP", 0, 4 },
	{ "ULP_TX_SE_CNT_CH2", 0x8eb0, 0 },
		{ "SOP_CNT_ULP2TP", 28, 4 },
		{ "EOP_CNT_ULP2TP", 24, 4 },
		{ "SOP_CNT_LSO_IN", 20, 4 },
		{ "EOP_CNT_LSO_IN", 16, 4 },
		{ "SOP_CNT_ALG_IN", 12, 4 },
		{ "EOP_CNT_ALG_IN", 8, 4 },
		{ "SOP_CNT_CIM2ULP", 4, 4 },
		{ "EOP_CNT_CIM2ULP", 0, 4 },
	{ "ULP_TX_SE_CNT_CH3", 0x8eb4, 0 },
		{ "SOP_CNT_ULP2TP", 28, 4 },
		{ "EOP_CNT_ULP2TP", 24, 4 },
		{ "SOP_CNT_LSO_IN", 20, 4 },
		{ "EOP_CNT_LSO_IN", 16, 4 },
		{ "SOP_CNT_ALG_IN", 12, 4 },
		{ "EOP_CNT_ALG_IN", 8, 4 },
		{ "SOP_CNT_CIM2ULP", 4, 4 },
		{ "EOP_CNT_CIM2ULP", 0, 4 },
	{ "ULP_TX_DROP_CNT", 0x8eb8, 0 },
		{ "DROP_INVLD_MC_CH3", 28, 4 },
		{ "DROP_INVLD_MC_CH2", 24, 4 },
		{ "DROP_INVLD_MC_CH1", 20, 4 },
		{ "DROP_INVLD_MC_CH0", 16, 4 },
		{ "DROP_CH3", 12, 4 },
		{ "DROP_CH2", 8, 4 },
		{ "DROP_CH1", 4, 4 },
		{ "DROP_CH0", 0, 4 },
	{ "ULP_TX_CSU_REVISION", 0x8ebc, 0 },
	{ "ULP_TX_CPL_TX_DATA_FLAGS_MASK", 0x8f88, 0 },
		{ "bypass_first", 26, 1 },
		{ "bypass_middle", 25, 1 },
		{ "bypass_last", 24, 1 },
		{ "push_first", 22, 1 },
		{ "push_middle", 21, 1 },
		{ "push_last", 20, 1 },
		{ "save_first", 18, 1 },
		{ "save_middle", 17, 1 },
		{ "save_last", 16, 1 },
		{ "flush_first", 14, 1 },
		{ "flush_middle", 13, 1 },
		{ "flush_last", 12, 1 },
		{ "urgent_first", 10, 1 },
		{ "urgent_middle", 9, 1 },
		{ "urgent_last", 8, 1 },
		{ "more_first", 6, 1 },
		{ "more_middle", 5, 1 },
		{ "more_last", 4, 1 },
		{ "shove_first", 2, 1 },
		{ "shove_middle", 1, 1 },
		{ "shove_last", 0, 1 },
	{ "ULP_TX_ACCELERATOR_CTL", 0x8f90, 0 },
		{ "Fifo_Threshold", 8, 5 },
		{ "compression_xp10DisableCFuse", 5, 1 },
		{ "compression_xp10Disable", 4, 1 },
		{ "DeDupeDisableCFuse", 3, 1 },
		{ "DeDupeDisable", 2, 1 },
		{ "GFDisableCFuse", 1, 1 },
		{ "GFDisable", 0, 1 },
	{ "ULP_TX_XP10_IND_ADDR", 0x8f94, 0 },
		{ "xp10_control", 31, 1 },
		{ "xp10_addr", 0, 20 },
	{ "ULP_TX_XP10_IND_DATA", 0x8f98, 0 },
	{ "ULP_TX_IWARP_PMOF_OPCODES_1", 0x8f9c, 0 },
		{ "Rdma_Verify_Response", 24, 5 },
		{ "Rdma_Verify_Request", 16, 5 },
		{ "Rdma_Flush_Response", 8, 5 },
		{ "Rdma_Flush_Request", 0, 5 },
	{ "ULP_TX_IWARP_PMOF_OPCODES_2", 0x8fa0, 0 },
		{ "Rdma_Send_With_SE_Immediate", 24, 5 },
		{ "Rdma_Send_With_Immediate", 16, 5 },
		{ "Rdma_Atomic_Write_Response", 8, 5 },
		{ "Rdma_Atomic_Write_Request", 0, 5 },
	{ "ULP_TX_PL2APB_INFO", 0x8ec0, 0 },
		{ "pl2apb_bridge_hung", 27, 1 },
		{ "pl2apb_bridge_state", 26, 1 },
		{ "pl2apb_bridge_hung_type", 25, 1 },
		{ "pl2apb_bridge_hung_id", 24, 1 },
		{ "pl2apb_bridge_hung_addr", 0, 20 },
	{ NULL }
};

struct reg_info t7_pm_rx_regs[] = {
	{ "PM_RX_CFG", 0x8fc0, 0 },
		{ "ch1_output", 27, 5 },
		{ "ch2_output", 22, 5 },
		{ "ch3_output", 17, 5 },
		{ "strobe1", 16, 1 },
		{ "ch1_input", 11, 5 },
		{ "ch2_input", 6, 5 },
		{ "ch3_input", 1, 5 },
		{ "strobe0", 0, 1 },
	{ "PM_RX_MODE", 0x8fc4, 0 },
		{ "cache_hold", 13, 1 },
		{ "cache_init_done", 12, 1 },
		{ "cache_depth", 8, 4 },
		{ "cache_init", 7, 1 },
		{ "cache_sleep", 6, 1 },
		{ "cache_bypass", 5, 1 },
		{ "use_bundle_len", 4, 1 },
		{ "stat_to_ch", 3, 1 },
		{ "stat_from_ch", 1, 2 },
		{ "prefetch_enable", 0, 1 },
	{ "PM_RX_STAT_CONFIG", 0x8fc8, 0 },
	{ "PM_RX_STAT_COUNT", 0x8fcc, 0 },
	{ "PM_RX_DBG_CTRL", 0x8fd0, 0 },
		{ "OspiWrBusy", 21, 4 },
		{ "IspiWrBusy", 17, 4 },
		{ "PMDbgAddr", 0, 17 },
	{ "PM_RX_DBG_DATA", 0x8fd4, 0 },
	{ "PM_RX_INT_ENABLE", 0x8fd8, 0 },
		{ "master_perr", 31, 1 },
		{ "ospi_overflow3", 30, 1 },
		{ "ospi_overflow2", 29, 1 },
		{ "ospi_overflow1", 28, 1 },
		{ "ospi_overflow0", 27, 1 },
		{ "ma_intf_sdc_err", 26, 1 },
		{ "bundle_len_ParErr", 25, 1 },
		{ "bundle_len_ovfl", 24, 1 },
		{ "sdc_err", 23, 1 },
		{ "zero_e_cmd_error", 22, 1 },
		{ "iespi0_fifo2x_Rx_framing_error", 21, 1 },
		{ "iespi1_fifo2x_Rx_framing_error", 20, 1 },
		{ "iespi2_fifo2x_Rx_framing_error", 19, 1 },
		{ "iespi3_fifo2x_Rx_framing_error", 18, 1 },
		{ "iespi0_Rx_framing_error", 17, 1 },
		{ "iespi1_Rx_framing_error", 16, 1 },
		{ "iespi2_Rx_framing_error", 15, 1 },
		{ "iespi3_Rx_framing_error", 14, 1 },
		{ "iespi0_Tx_framing_error", 13, 1 },
		{ "iespi1_Tx_framing_error", 12, 1 },
		{ "iespi2_Tx_framing_error", 11, 1 },
		{ "iespi3_Tx_framing_error", 10, 1 },
		{ "ocspi0_Rx_framing_error", 9, 1 },
		{ "ocspi1_Rx_framing_error", 8, 1 },
		{ "ocspi0_Tx_framing_error", 7, 1 },
		{ "ocspi1_Tx_framing_error", 6, 1 },
		{ "ocspi0_ofifo2x_Tx_framing_error", 5, 1 },
		{ "ocspi1_ofifo2x_Tx_framing_error", 4, 1 },
		{ "ocspi_par_error", 3, 1 },
		{ "db_options_par_error", 2, 1 },
		{ "iespi_par_error", 1, 1 },
		{ "e_pcmd_par_error", 0, 1 },
	{ "PM_RX_INT_CAUSE", 0x8fdc, 0 },
		{ "master_perr", 31, 1 },
		{ "ospi_overflow3", 30, 1 },
		{ "ospi_overflow2", 29, 1 },
		{ "ospi_overflow1", 28, 1 },
		{ "ospi_overflow0", 27, 1 },
		{ "bundle_len_ovfl", 24, 1 },
		{ "sdc_err", 23, 1 },
		{ "zero_e_cmd_error", 22, 1 },
		{ "iespi0_fifo2x_Rx_framing_error", 21, 1 },
		{ "iespi1_fifo2x_Rx_framing_error", 20, 1 },
		{ "iespi2_fifo2x_Rx_framing_error", 19, 1 },
		{ "iespi3_fifo2x_Rx_framing_error", 18, 1 },
		{ "iespi0_Rx_framing_error", 17, 1 },
		{ "iespi1_Rx_framing_error", 16, 1 },
		{ "iespi2_Rx_framing_error", 15, 1 },
		{ "iespi3_Rx_framing_error", 14, 1 },
		{ "iespi0_Tx_framing_error", 13, 1 },
		{ "iespi1_Tx_framing_error", 12, 1 },
		{ "iespi2_Tx_framing_error", 11, 1 },
		{ "iespi3_Tx_framing_error", 10, 1 },
		{ "ocspi0_Rx_framing_error", 9, 1 },
		{ "ocspi1_Rx_framing_error", 8, 1 },
		{ "ocspi0_Tx_framing_error", 7, 1 },
		{ "ocspi1_Tx_framing_error", 6, 1 },
		{ "ocspi0_ofifo2x_Tx_framing_error", 5, 1 },
		{ "ocspi1_ofifo2x_Tx_framing_error", 4, 1 },
		{ "cache_sram_error", 3, 1 },
		{ "cache_lru_error", 2, 1 },
		{ "cache_island_error", 1, 1 },
		{ "cache_ctrl_error", 0, 1 },
	{ NULL }
};

struct reg_info t7_pm_tx_regs[] = {
	{ "PM_TX_CFG", 0x8fe0, 0 },
		{ "ch1_output", 27, 5 },
		{ "ch2_output", 22, 5 },
		{ "ch3_output", 17, 5 },
		{ "strobe1", 16, 1 },
		{ "ch1_input", 11, 5 },
		{ "ch2_input", 6, 5 },
		{ "ch3_input", 1, 5 },
		{ "strobe0", 0, 1 },
	{ "PM_TX_MODE", 0x8fe4, 0 },
		{ "cong_thresh3", 25, 7 },
		{ "cong_thresh2", 18, 7 },
		{ "cong_thresh1", 11, 7 },
		{ "cong_thresh0", 4, 7 },
		{ "use_bundle_len", 3, 1 },
		{ "stat_channel", 1, 2 },
		{ "prefetch_enable", 0, 1 },
	{ "PM_TX_STAT_CONFIG", 0x8fe8, 0 },
	{ "PM_TX_STAT_COUNT", 0x8fec, 0 },
	{ "PM_TX_DBG_CTRL", 0x8ff0, 0 },
		{ "OspiWrBusy", 21, 4 },
		{ "IspiWrBusy", 17, 4 },
		{ "PMDbgAddr", 0, 17 },
	{ "PM_TX_DBG_DATA", 0x8ff4, 0 },
	{ "PM_TX_INT_ENABLE", 0x8ff8, 0 },
		{ "master_perr", 31, 1 },
		{ "zero_c_cmd_error", 30, 1 },
		{ "oespi_cor_err", 29, 1 },
		{ "icspi_cor_err", 28, 1 },
		{ "icspi_ovfl", 24, 1 },
		{ "pcmd_len_ovfl3", 23, 1 },
		{ "pcmd_len_ovfl2", 22, 1 },
		{ "pcmd_len_ovfl1", 21, 1 },
		{ "pcmd_len_ovfl0", 20, 1 },
		{ "icspi0_fifo2x_Rx_framing_error", 19, 1 },
		{ "icspi1_fifo2x_Rx_framing_error", 18, 1 },
		{ "icspi2_fifo2x_Rx_framing_error", 17, 1 },
		{ "icspi3_fifo2x_Rx_framing_error", 16, 1 },
		{ "icspi0_Tx_framing_error", 15, 1 },
		{ "icspi1_Tx_framing_error", 14, 1 },
		{ "icspi2_Tx_framing_error", 13, 1 },
		{ "icspi3_Tx_framing_error", 12, 1 },
		{ "oespi0_Rx_framing_error", 11, 1 },
		{ "oespi1_Rx_framing_error", 10, 1 },
		{ "oespi2_Rx_framing_error", 9, 1 },
		{ "oespi3_Rx_framing_error", 8, 1 },
		{ "oespi0_Tx_framing_error", 7, 1 },
		{ "oespi1_Tx_framing_error", 6, 1 },
		{ "oespi2_Tx_framing_error", 5, 1 },
		{ "oespi3_Tx_framing_error", 4, 1 },
		{ "oespi0_ofifo2x_Tx_framing_error", 3, 1 },
		{ "oespi1_ofifo2x_Tx_framing_error", 2, 1 },
		{ "oespi2_ofifo2x_Tx_framing_error", 1, 1 },
		{ "oespi3_ofifo2x_Tx_framing_error", 0, 1 },
	{ "PM_TX_INT_CAUSE", 0x8ffc, 0 },
		{ "master_perr", 31, 1 },
		{ "zero_c_cmd_error", 30, 1 },
		{ "oespi_cor_err", 29, 1 },
		{ "icspi_cor_err", 28, 1 },
		{ "icspi_ovfl", 24, 1 },
		{ "pcmd_len_ovfl3", 23, 1 },
		{ "pcmd_len_ovfl2", 22, 1 },
		{ "pcmd_len_ovfl1", 21, 1 },
		{ "pcmd_len_ovfl0", 20, 1 },
		{ "icspi0_fifo2x_Rx_framing_error", 19, 1 },
		{ "icspi1_fifo2x_Rx_framing_error", 18, 1 },
		{ "icspi2_fifo2x_Rx_framing_error", 17, 1 },
		{ "icspi3_fifo2x_Rx_framing_error", 16, 1 },
		{ "icspi0_Tx_framing_error", 15, 1 },
		{ "icspi1_Tx_framing_error", 14, 1 },
		{ "icspi2_Tx_framing_error", 13, 1 },
		{ "icspi3_Tx_framing_error", 12, 1 },
		{ "oespi0_Rx_framing_error", 11, 1 },
		{ "oespi1_Rx_framing_error", 10, 1 },
		{ "oespi2_Rx_framing_error", 9, 1 },
		{ "oespi3_Rx_framing_error", 8, 1 },
		{ "oespi0_Tx_framing_error", 7, 1 },
		{ "oespi1_Tx_framing_error", 6, 1 },
		{ "oespi2_Tx_framing_error", 5, 1 },
		{ "oespi3_Tx_framing_error", 4, 1 },
		{ "oespi0_ofifo2x_Tx_framing_error", 3, 1 },
		{ "oespi1_ofifo2x_Tx_framing_error", 2, 1 },
		{ "oespi2_ofifo2x_Tx_framing_error", 1, 1 },
		{ "oespi3_ofifo2x_Tx_framing_error", 0, 1 },
	{ NULL }
};

struct reg_info t7_mps_regs[] = {
	{ "MPS_CMN_CTL", 0x9000, 0 },
		{ "pt1_sel_cfg", 21, 1 },
		{ "Bug_42938_en", 20, 1 },
		{ "no_bypass_pause", 19, 1 },
		{ "bypass_pause", 18, 1 },
		{ "PBUS_En", 16, 2 },
		{ "INIC_En", 14, 2 },
		{ "SBA_En", 12, 2 },
		{ "BG2TP_MAP_MODE", 11, 1 },
		{ "LB_Mode", 9, 2 },
		{ "TX_PORT_STATS_MODE", 8, 1 },
		{ "T5Mode", 7, 1 },
		{ "SpeedMode", 5, 2 },
		{ "LpbkCrdtCtrl", 4, 1 },
		{ "Detect8023", 3, 1 },
		{ "VFDirectAccess", 2, 1 },
		{ "NumPorts", 0, 2 },
	{ "MPS_INT_ENABLE", 0x9004, 0 },
		{ "StatIntEnb", 5, 1 },
		{ "TxIntEnb", 4, 1 },
		{ "RxIntEnb", 3, 1 },
		{ "TrcIntEnb", 2, 1 },
		{ "ClsIntEnb", 1, 1 },
		{ "PLIntEnb", 0, 1 },
	{ "MPS_INT_CAUSE", 0x9008, 0 },
		{ "StatInt", 5, 1 },
		{ "TxInt", 4, 1 },
		{ "RxInt", 3, 1 },
		{ "TrcInt", 2, 1 },
		{ "ClsInt", 1, 1 },
		{ "PLInt", 0, 1 },
	{ "MPS_CGEN_GLOBAL", 0x900c, 0 },
	{ "MPS_VF_TX_CTL_31_0", 0x9010, 0 },
	{ "MPS_VF_TX_CTL_63_32", 0x9014, 0 },
	{ "MPS_VF_TX_CTL_95_64", 0x9018, 0 },
	{ "MPS_VF_TX_CTL_127_96", 0x901c, 0 },
	{ "MPS_VF_TX_CTL_159_128", 0x9100, 0 },
	{ "MPS_VF_TX_CTL_191_160", 0x9104, 0 },
	{ "MPS_VF_TX_CTL_223_192", 0x9108, 0 },
	{ "MPS_VF_TX_CTL_255_224", 0x910c, 0 },
	{ "MPS_VF_RX_CTL_31_0", 0x9020, 0 },
	{ "MPS_VF_RX_CTL_63_32", 0x9024, 0 },
	{ "MPS_VF_RX_CTL_95_64", 0x9028, 0 },
	{ "MPS_VF_RX_CTL_127_96", 0x902c, 0 },
	{ "MPS_VF_RX_CTL_159_128", 0x9110, 0 },
	{ "MPS_VF_RX_CTL_191_160", 0x9114, 0 },
	{ "MPS_VF_RX_CTL_223_192", 0x9118, 0 },
	{ "MPS_VF_RX_CTL_255_224", 0x911c, 0 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP0", 0x9030, 0 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP1", 0x9034, 0 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP2", 0x9038, 0 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP3", 0x903c, 0 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP0", 0x9040, 0 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP1", 0x9044, 0 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP2", 0x9048, 0 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP3", 0x904c, 0 },
	{ "MPS_TP_CSIDE_MUX_CTL_P0", 0x9050, 0 },
	{ "MPS_TP_CSIDE_MUX_CTL_P1", 0x9054, 0 },
	{ "MPS_TP_CSIDE_MUX_CTL_P2", 0x9138, 0 },
	{ "MPS_TP_CSIDE_MUX_CTL_P3", 0x913c, 0 },
	{ "MPS_WOL_CTL_MODE", 0x9058, 0 },
	{ "MPS_TOP_SPARE", 0x9074, 0 },
		{ "TopSpare", 8, 24 },
		{ "oVlanSelLpbk3", 7, 1 },
		{ "oVlanSelLpbk2", 6, 1 },
		{ "oVlanSelLpbk1", 5, 1 },
		{ "oVlanSelLpbk0", 4, 1 },
		{ "oVlanSelMac3", 3, 1 },
		{ "oVlanSelMac2", 2, 1 },
		{ "oVlanSelMac1", 1, 1 },
		{ "oVlanSelMac0", 0, 1 },
	{ "MPS_BUILD_REVISION", 0x9078, 0 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH0", 0x907c, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH1", 0x9080, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH2", 0x9084, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH3", 0x9088, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH4", 0x908c, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH5", 0x9090, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH6", 0x9094, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH7", 0x9098, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH8", 0x909c, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH9", 0x90a0, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH10", 0x90a4, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH11", 0x90a8, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH12", 0x90ac, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH13", 0x90b0, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH14", 0x90b4, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH15", 0x90b8, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH0", 0x90bc, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH1", 0x90c0, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH2", 0x90c4, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH3", 0x90c8, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH4", 0x90cc, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH5", 0x90d0, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH6", 0x90d4, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH7", 0x90d8, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH8", 0x90dc, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH9", 0x90e0, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH10", 0x90e4, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH11", 0x90e8, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH12", 0x90ec, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH13", 0x90f0, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH14", 0x90f4, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH15", 0x90f8, 0 },
		{ "Value_1", 16, 16 },
		{ "Value_0", 0, 16 },
	{ "MPS_FPGA_BIST_CFG_P0", 0x9120, 0 },
		{ "AddrMask", 16, 16 },
		{ "BaseAddr", 0, 16 },
	{ "MPS_FPGA_BIST_CFG_P1", 0x9124, 0 },
		{ "AddrMask", 16, 16 },
		{ "BaseAddr", 0, 16 },
	{ "MPS_FPGA_BIST_CFG_P2", 0x9128, 0 },
		{ "AddrMask", 16, 16 },
		{ "BaseAddr", 0, 16 },
	{ "MPS_FPGA_BIST_CFG_P3", 0x912c, 0 },
		{ "AddrMask", 16, 16 },
		{ "BaseAddr", 0, 16 },
	{ "MPS_INIC_CTL", 0x9130, 0 },
		{ "RD_WRN", 16, 1 },
		{ "ADDR", 0, 16 },
	{ "MPS_INIC_DATA", 0x9134, 0 },
	{ "MPS_RED_CTL", 0x9140, 0 },
		{ "LPBK_SHIFT_0", 28, 4 },
		{ "LPBK_SHIFT_1", 24, 4 },
		{ "LPBK_SHIFT_2", 20, 4 },
		{ "LPBK_SHIFT_3", 16, 4 },
		{ "MAC_SHIFT_0", 12, 4 },
		{ "MAC_SHIFT_1", 8, 4 },
		{ "MAC_SHIFT_2", 4, 4 },
		{ "MAC_SHIFT_3", 0, 4 },
	{ "MPS_RED_EN", 0x9144, 0 },
		{ "LPBK_EN3", 7, 1 },
		{ "LPBK_EN2", 6, 1 },
		{ "LPBK_EN1", 5, 1 },
		{ "LPBK_EN0", 4, 1 },
		{ "MAC_EN3", 3, 1 },
		{ "MAC_EN2", 2, 1 },
		{ "MAC_EN1", 1, 1 },
		{ "MAC_EN0", 0, 1 },
	{ "MPS_MAC0_RED_DROP_CNT_H", 0x9148, 0 },
	{ "MPS_MAC0_RED_DROP_CNT_L", 0x914c, 0 },
	{ "MPS_MAC1_RED_DROP_CNT_H", 0x9150, 0 },
	{ "MPS_MAC1_RED_DROP_CNT_L", 0x9154, 0 },
	{ "MPS_MAC2_RED_DROP_CNT_H", 0x9158, 0 },
	{ "MPS_MAC2_RED_DROP_CNT_L", 0x915c, 0 },
	{ "MPS_MAC3_RED_DROP_CNT_H", 0x9160, 0 },
	{ "MPS_MAC3_RED_DROP_CNT_L", 0x9164, 0 },
	{ "MPS_LPBK0_RED_DROP_CNT_H", 0x9168, 0 },
	{ "MPS_LPBK0_RED_DROP_CNT_L", 0x916c, 0 },
	{ "MPS_LPBK1_RED_DROP_CNT_H", 0x9170, 0 },
	{ "MPS_LPBK1_RED_DROP_CNT_L", 0x9174, 0 },
	{ "MPS_LPBK2_RED_DROP_CNT_H", 0x9178, 0 },
	{ "MPS_LPBK2_RED_DROP_CNT_L", 0x917c, 0 },
	{ "MPS_LPBK3_RED_DROP_CNT_H", 0x9180, 0 },
	{ "MPS_LPBK3_RED_DROP_CNT_L", 0x9184, 0 },
	{ "MPS_MAC_RED_PP_DROP_EN", 0x9188, 0 },
		{ "MAC3", 24, 8 },
		{ "MAC2", 16, 8 },
		{ "MAC1", 8, 8 },
		{ "MAC0", 0, 8 },
	{ "MPS_PORT_CTL", 0x30000, 0 },
		{ "LpbkEn", 31, 1 },
		{ "TxEn", 30, 1 },
		{ "RxEn", 29, 1 },
		{ "PPPEn", 28, 1 },
		{ "FCSStripEn", 27, 1 },
		{ "PPPAndPause", 26, 1 },
		{ "PrioPPPEnMap", 16, 8 },
	{ "MPS_PORT_PAUSE_CTL", 0x30004, 0 },
	{ "MPS_PORT_TX_PAUSE_CTL", 0x30008, 0 },
		{ "RegSendOff", 24, 8 },
		{ "RegSendOn", 16, 8 },
		{ "SgeSendEn", 8, 8 },
		{ "RxSendEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_CTL2", 0x3000c, 0 },
	{ "MPS_PORT_RX_PAUSE_CTL", 0x30010, 0 },
		{ "RegHaltOn", 8, 8 },
		{ "RxHaltEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_STATUS", 0x30014, 0 },
		{ "RegSending", 16, 8 },
		{ "SgeSending", 8, 8 },
		{ "RxSending", 0, 8 },
	{ "MPS_PORT_RX_PAUSE_STATUS", 0x30018, 0 },
		{ "RegHalted", 8, 8 },
		{ "RxHalted", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_DEST_L", 0x3001c, 0 },
	{ "MPS_PORT_TX_PAUSE_DEST_H", 0x30020, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_L", 0x30024, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_H", 0x30028, 0 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3002c, 0 },
		{ "Prty7", 14, 2 },
		{ "Prty6", 12, 2 },
		{ "Prty5", 10, 2 },
		{ "Prty4", 8, 2 },
		{ "Prty3", 6, 2 },
		{ "Prty2", 4, 2 },
		{ "Prty1", 2, 2 },
		{ "Prty0", 0, 2 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x30030, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_PRTY_GROUP_MAP", 0x30034, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x30038, 0 },
		{ "TX2RX", 6, 3 },
		{ "MAC2MPS", 3, 3 },
		{ "MPS2MAC", 0, 3 },
	{ "MPS_PORT_CTL", 0x32000, 0 },
		{ "LpbkEn", 31, 1 },
		{ "TxEn", 30, 1 },
		{ "RxEn", 29, 1 },
		{ "PPPEn", 28, 1 },
		{ "FCSStripEn", 27, 1 },
		{ "PPPAndPause", 26, 1 },
		{ "PrioPPPEnMap", 16, 8 },
	{ "MPS_PORT_PAUSE_CTL", 0x32004, 0 },
	{ "MPS_PORT_TX_PAUSE_CTL", 0x32008, 0 },
		{ "RegSendOff", 24, 8 },
		{ "RegSendOn", 16, 8 },
		{ "SgeSendEn", 8, 8 },
		{ "RxSendEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_CTL2", 0x3200c, 0 },
	{ "MPS_PORT_RX_PAUSE_CTL", 0x32010, 0 },
		{ "RegHaltOn", 8, 8 },
		{ "RxHaltEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_STATUS", 0x32014, 0 },
		{ "RegSending", 16, 8 },
		{ "SgeSending", 8, 8 },
		{ "RxSending", 0, 8 },
	{ "MPS_PORT_RX_PAUSE_STATUS", 0x32018, 0 },
		{ "RegHalted", 8, 8 },
		{ "RxHalted", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_DEST_L", 0x3201c, 0 },
	{ "MPS_PORT_TX_PAUSE_DEST_H", 0x32020, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_L", 0x32024, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_H", 0x32028, 0 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3202c, 0 },
		{ "Prty7", 14, 2 },
		{ "Prty6", 12, 2 },
		{ "Prty5", 10, 2 },
		{ "Prty4", 8, 2 },
		{ "Prty3", 6, 2 },
		{ "Prty2", 4, 2 },
		{ "Prty1", 2, 2 },
		{ "Prty0", 0, 2 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x32030, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_PRTY_GROUP_MAP", 0x32034, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x32038, 0 },
		{ "TX2RX", 6, 3 },
		{ "MAC2MPS", 3, 3 },
		{ "MPS2MAC", 0, 3 },
	{ "MPS_PORT_CTL", 0x34000, 0 },
		{ "LpbkEn", 31, 1 },
		{ "TxEn", 30, 1 },
		{ "RxEn", 29, 1 },
		{ "PPPEn", 28, 1 },
		{ "FCSStripEn", 27, 1 },
		{ "PPPAndPause", 26, 1 },
		{ "PrioPPPEnMap", 16, 8 },
	{ "MPS_PORT_PAUSE_CTL", 0x34004, 0 },
	{ "MPS_PORT_TX_PAUSE_CTL", 0x34008, 0 },
		{ "RegSendOff", 24, 8 },
		{ "RegSendOn", 16, 8 },
		{ "SgeSendEn", 8, 8 },
		{ "RxSendEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_CTL2", 0x3400c, 0 },
	{ "MPS_PORT_RX_PAUSE_CTL", 0x34010, 0 },
		{ "RegHaltOn", 8, 8 },
		{ "RxHaltEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_STATUS", 0x34014, 0 },
		{ "RegSending", 16, 8 },
		{ "SgeSending", 8, 8 },
		{ "RxSending", 0, 8 },
	{ "MPS_PORT_RX_PAUSE_STATUS", 0x34018, 0 },
		{ "RegHalted", 8, 8 },
		{ "RxHalted", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_DEST_L", 0x3401c, 0 },
	{ "MPS_PORT_TX_PAUSE_DEST_H", 0x34020, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_L", 0x34024, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_H", 0x34028, 0 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3402c, 0 },
		{ "Prty7", 14, 2 },
		{ "Prty6", 12, 2 },
		{ "Prty5", 10, 2 },
		{ "Prty4", 8, 2 },
		{ "Prty3", 6, 2 },
		{ "Prty2", 4, 2 },
		{ "Prty1", 2, 2 },
		{ "Prty0", 0, 2 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x34030, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_PRTY_GROUP_MAP", 0x34034, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x34038, 0 },
		{ "TX2RX", 6, 3 },
		{ "MAC2MPS", 3, 3 },
		{ "MPS2MAC", 0, 3 },
	{ "MPS_PORT_CTL", 0x36000, 0 },
		{ "LpbkEn", 31, 1 },
		{ "TxEn", 30, 1 },
		{ "RxEn", 29, 1 },
		{ "PPPEn", 28, 1 },
		{ "FCSStripEn", 27, 1 },
		{ "PPPAndPause", 26, 1 },
		{ "PrioPPPEnMap", 16, 8 },
	{ "MPS_PORT_PAUSE_CTL", 0x36004, 0 },
	{ "MPS_PORT_TX_PAUSE_CTL", 0x36008, 0 },
		{ "RegSendOff", 24, 8 },
		{ "RegSendOn", 16, 8 },
		{ "SgeSendEn", 8, 8 },
		{ "RxSendEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_CTL2", 0x3600c, 0 },
	{ "MPS_PORT_RX_PAUSE_CTL", 0x36010, 0 },
		{ "RegHaltOn", 8, 8 },
		{ "RxHaltEn", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_STATUS", 0x36014, 0 },
		{ "RegSending", 16, 8 },
		{ "SgeSending", 8, 8 },
		{ "RxSending", 0, 8 },
	{ "MPS_PORT_RX_PAUSE_STATUS", 0x36018, 0 },
		{ "RegHalted", 8, 8 },
		{ "RxHalted", 0, 8 },
	{ "MPS_PORT_TX_PAUSE_DEST_L", 0x3601c, 0 },
	{ "MPS_PORT_TX_PAUSE_DEST_H", 0x36020, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_L", 0x36024, 0 },
	{ "MPS_PORT_TX_PAUSE_SOURCE_H", 0x36028, 0 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3602c, 0 },
		{ "Prty7", 14, 2 },
		{ "Prty6", 12, 2 },
		{ "Prty5", 10, 2 },
		{ "Prty4", 8, 2 },
		{ "Prty3", 6, 2 },
		{ "Prty2", 4, 2 },
		{ "Prty1", 2, 2 },
		{ "Prty0", 0, 2 },
	{ "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x36030, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_PRTY_GROUP_MAP", 0x36034, 0 },
		{ "Prty7", 28, 4 },
		{ "Prty6", 24, 4 },
		{ "Prty5", 20, 4 },
		{ "Prty4", 16, 4 },
		{ "Prty3", 12, 4 },
		{ "Prty2", 8, 4 },
		{ "Prty1", 4, 4 },
		{ "Prty0", 0, 4 },
	{ "MPS_PORT_TRACE_MAX_CAPTURE_SIZE", 0x36038, 0 },
		{ "TX2RX", 6, 3 },
		{ "MAC2MPS", 3, 3 },
		{ "MPS2MAC", 0, 3 },
	{ "MPS_PF_CTL", 0x1e2c0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1e6c0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1eac0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1eec0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1f2c0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1f6c0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1fac0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_PF_CTL", 0x1fec0, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "MPS_RX_CTL", 0x11000, 0 },
		{ "HASH_TCAM_EN", 19, 1 },
		{ "SND_ORG_PFVF", 18, 1 },
		{ "FILT_VLAN_SEL", 17, 1 },
		{ "CBA_EN", 16, 1 },
		{ "BLK_SNDR", 12, 4 },
		{ "CMPRS", 8, 4 },
		{ "SNF", 0, 8 },
	{ "MPS_RX_PORT_MUX_CTL", 0x11004, 0 },
		{ "CTL_P3", 12, 4 },
		{ "CTL_P2", 8, 4 },
		{ "CTL_P1", 4, 4 },
		{ "CTL_P0", 0, 4 },
	{ "MPS_RX_FIFO_0_CTL", 0x11008, 0 },
	{ "MPS_RX_FIFO_1_CTL", 0x1100c, 0 },
	{ "MPS_RX_FIFO_2_CTL", 0x11010, 0 },
	{ "MPS_RX_FIFO_3_CTL", 0x11014, 0 },
	{ "MPS_RX_PG_HYST_BG0", 0x11048, 0 },
		{ "EN", 31, 1 },
		{ "TH", 0, 11 },
	{ "MPS_RX_PG_HYST_BG1", 0x1104c, 0 },
		{ "EN", 31, 1 },
		{ "TH", 0, 11 },
	{ "MPS_RX_PG_HYST_BG2", 0x11050, 0 },
		{ "EN", 31, 1 },
		{ "TH", 0, 11 },
	{ "MPS_RX_PG_HYST_BG3", 0x11054, 0 },
		{ "EN", 31, 1 },
		{ "TH", 0, 11 },
	{ "MPS_RX_OCH_CTL", 0x11058, 0 },
		{ "DROP_WT", 27, 5 },
		{ "TRUNC_WT", 22, 5 },
		{ "DRAIN", 13, 5 },
		{ "DROP", 8, 5 },
		{ "STOP", 0, 5 },
	{ "MPS_RX_LPBK_BP0", 0x1105c, 0 },
	{ "MPS_RX_LPBK_BP1", 0x11060, 0 },
	{ "MPS_RX_LPBK_BP2", 0x11064, 0 },
	{ "MPS_RX_LPBK_BP3", 0x11068, 0 },
	{ "MPS_RX_PORT_GAP", 0x1106c, 0 },
	{ "MPS_CTL_STAT", 0x11070, 0 },
	{ "MPS_RX_PERR_INT_CAUSE", 0x11074, 0 },
		{ "MAC_IN_FIFO_768b", 30, 1 },
		{ "INT_ERR_INT", 29, 1 },
		{ "FLOP_PERR", 28, 1 },
		{ "ATRB", 18, 1 },
		{ "RPLC_MAP", 13, 5 },
		{ "TKN_RUNT_DROP_FIFO", 12, 1 },
		{ "PPM3", 9, 3 },
		{ "PPM2", 6, 3 },
		{ "PPM1", 3, 3 },
		{ "PPM0", 0, 3 },
	{ "MPS_RX_PERR_INT_ENABLE", 0x11078, 0 },
		{ "INT_ERR_INT", 30, 1 },
		{ "FLOP_PERR", 28, 1 },
		{ "ATRB", 18, 1 },
		{ "RPLC_MAP", 13, 5 },
		{ "PPM3", 9, 3 },
		{ "PPM2", 6, 3 },
		{ "PPM1", 3, 3 },
		{ "PPM0", 0, 3 },
	{ "MPS_RX_PERR_ENABLE", 0x1107c, 0 },
		{ "INT_ERR_INT", 30, 1 },
		{ "FLOP_PERR", 28, 1 },
		{ "ATRB", 18, 1 },
		{ "RPLC_MAP", 13, 5 },
		{ "PPM3", 9, 3 },
		{ "PPM2", 6, 3 },
		{ "PPM1", 3, 3 },
		{ "PPM0", 0, 3 },
	{ "MPS_RX_PERR_INT_CAUSE2", 0x1108c, 0 },
		{ "crypt2mps_rx_intf_fifo", 28, 4 },
		{ "inic2mps_tx0_perr", 27, 1 },
		{ "inic2mps_tx1_perr", 26, 1 },
		{ "xgmac2mps_rx0_perr", 25, 1 },
		{ "xgmac2mps_rx1_perr", 24, 1 },
		{ "mps2crypto_rx_intf_fifo", 20, 4 },
		{ "RX_PRE_PROC_PERR", 9, 11 },
	{ "MPS_RX_PERR_INT_ENABLE2", 0x11090, 0 },
		{ "crypt2mps_rx_intf_fifo", 28, 4 },
		{ "inic2mps_tx0_perr", 27, 1 },
		{ "inic2mps_tx1_perr", 26, 1 },
		{ "xgmac2mps_rx0_perr", 25, 1 },
		{ "xgmac2mps_rx1_perr", 24, 1 },
		{ "mps2crypto_rx_intf_fifo", 20, 4 },
		{ "RX_PRE_PROC_PERR", 9, 11 },
	{ "MPS_RX_PERR_ENABLE2", 0x11094, 0 },
		{ "crypt2mps_rx_intf_fifo", 28, 4 },
		{ "inic2mps_tx0_perr", 27, 1 },
		{ "inic2mps_tx1_perr", 26, 1 },
		{ "xgmac2mps_rx0_perr", 25, 1 },
		{ "xgmac2mps_rx1_perr", 24, 1 },
		{ "mps2crypto_rx_intf_fifo", 20, 4 },
		{ "RX_PRE_PROC_PERR", 9, 11 },
	{ "MPS_RX_PERR_INT_CAUSE3", 0x11310, 0 },
	{ "MPS_RX_PERR_INT_ENABLE3", 0x11314, 0 },
	{ "MPS_RX_PERR_ENABLE3", 0x11318, 0 },
	{ "MPS_RX_PERR_INT_CAUSE4", 0x1131c, 0 },
		{ "CLS", 20, 6 },
		{ "rx_pre_proc", 16, 4 },
		{ "pproc3", 12, 4 },
		{ "pproc2", 8, 4 },
		{ "pproc1", 4, 4 },
		{ "pproc0", 0, 4 },
	{ "MPS_RX_PERR_INT_ENABLE4", 0x11320, 0 },
		{ "CLS", 20, 6 },
		{ "rx_pre_proc", 16, 4 },
		{ "pproc3", 12, 4 },
		{ "pproc2", 8, 4 },
		{ "pproc1", 4, 4 },
		{ "pproc0", 0, 4 },
	{ "MPS_RX_PERR_ENABLE4", 0x11324, 0 },
		{ "CLS", 20, 6 },
		{ "rx_pre_proc", 16, 4 },
		{ "pproc3", 12, 4 },
		{ "pproc2", 8, 4 },
		{ "pproc1", 4, 4 },
		{ "pproc0", 0, 4 },
	{ "MPS_RX_PERR_INT_CAUSE5", 0x11328, 0 },
		{ "mps2cryp_rx_fifo", 26, 4 },
		{ "rx_out", 20, 6 },
		{ "MEM_WRAP", 0, 20 },
	{ "MPS_RX_PERR_INT_ENABLE5", 0x1132c, 0 },
		{ "mps2cryp_rx_fifo", 26, 4 },
		{ "rx_out", 20, 6 },
		{ "MEM_WRAP", 0, 20 },
	{ "MPS_RX_PERR_ENABLE5", 0x11330, 0 },
		{ "mps2cryp_rx_fifo", 26, 4 },
		{ "rx_out", 20, 6 },
		{ "MEM_WRAP", 0, 20 },
	{ "MPS_RX_PERR_INJECT", 0x11080, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "MPS_RX_PERR_INT_CAUSE6", 0x11334, 0 },
	{ "MPS_RX_PERR_INT_ENABLE6", 0x11338, 0 },
	{ "MPS_RX_PERR_ENABLE6", 0x1133c, 0 },
	{ "MPS_RX_FUNC_INT_CAUSE", 0x11084, 0 },
		{ "MTU_ERR_INT3", 19, 1 },
		{ "MTU_ERR_INT2", 18, 1 },
		{ "MTU_ERR_INT1", 17, 1 },
		{ "MTU_ERR_INT0", 16, 1 },
		{ "SE_CNT_ERR_INT", 15, 1 },
		{ "FRM_ERR_INT", 14, 1 },
		{ "LEN_ERR_INT", 13, 1 },
		{ "INT_ERR_INT", 8, 5 },
		{ "PG_TH_INT7", 7, 1 },
		{ "PG_TH_INT6", 6, 1 },
		{ "PG_TH_INT5", 5, 1 },
		{ "PG_TH_INT4", 4, 1 },
		{ "PG_TH_INT3", 3, 1 },
		{ "PG_TH_INT2", 2, 1 },
		{ "PG_TH_INT1", 1, 1 },
		{ "PG_TH_INT0", 0, 1 },
	{ "MPS_RX_FUNC_INT_ENABLE", 0x11088, 0 },
		{ "MTU_ERR_INT3", 19, 1 },
		{ "MTU_ERR_INT2", 18, 1 },
		{ "MTU_ERR_INT1", 17, 1 },
		{ "MTU_ERR_INT0", 16, 1 },
		{ "SE_CNT_ERR_INT", 15, 1 },
		{ "FRM_ERR_INT", 14, 1 },
		{ "LEN_ERR_INT", 13, 1 },
		{ "INT_ERR_INT", 8, 5 },
		{ "PG_TH_INT7", 7, 1 },
		{ "PG_TH_INT6", 6, 1 },
		{ "PG_TH_INT5", 5, 1 },
		{ "PG_TH_INT4", 4, 1 },
		{ "PG_TH_INT3", 3, 1 },
		{ "PG_TH_INT2", 2, 1 },
		{ "PG_TH_INT1", 1, 1 },
		{ "PG_TH_INT0", 0, 1 },
	{ "MPS_RX_REPL_CTL", 0x11098, 0 },
	{ "MPS_RX_PPP_ATRB", 0x1109c, 0 },
		{ "ETYPE", 16, 16 },
		{ "OPCODE", 0, 16 },
	{ "MPS_RX_QFC0_ATRB", 0x110a0, 0 },
		{ "ETYPE", 16, 16 },
		{ "DA", 0, 16 },
	{ "MPS_RX_QFC1_ATRB", 0x110a4, 0 },
	{ "MPS_RX_PT_ARB0", 0x110a8, 0 },
		{ "LPBK_WT", 16, 14 },
		{ "MAC_WT", 0, 14 },
	{ "MPS_RX_PT_ARB1", 0x110ac, 0 },
		{ "LPBK_WT", 16, 14 },
		{ "MAC_WT", 0, 14 },
	{ "MPS_RX_PT_ARB2", 0x11468, 0 },
		{ "LPBK_WT", 16, 14 },
		{ "MAC_WT", 0, 14 },
	{ "MPS_RX_PT_ARB3", 0x1146c, 0 },
		{ "LPBK_WT", 16, 14 },
		{ "MAC_WT", 0, 14 },
	{ "MPS_RX_PT_ARB4", 0x110b0, 0 },
		{ "LPBK_WT", 16, 14 },
		{ "MAC_WT", 0, 14 },
	{ "MPS_PF_OUT_EN", 0x110b4, 0 },
	{ "MPS_BMC_MTU", 0x110b8, 0 },
	{ "MPS_BMC_PKT_CNT", 0x110bc, 0 },
	{ "MPS_BMC_BYTE_CNT", 0x110c0, 0 },
	{ "MPS_PFVF_ATRB_CTL", 0x110c4, 0 },
		{ "RD_WRN", 31, 1 },
		{ "PFVF", 0, 9 },
	{ "MPS_PFVF_ATRB", 0x110c8, 0 },
		{ "EXTRACT_DEL_VLAN", 31, 1 },
		{ "PF", 28, 3 },
		{ "OFF", 18, 1 },
		{ "NV_DROP", 17, 1 },
		{ "MODE", 16, 1 },
		{ "FULL_FRAME_MODE", 14, 1 },
		{ "MTU", 0, 14 },
	{ "MPS_PFVF_ATRB2", 0x120fc, 0 },
		{ "EXTRACT_DEL_ENCAP", 31, 1 },
	{ "MPS_PFVF_ATRB_FLTR0", 0x110cc, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR1", 0x110d0, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR2", 0x110d4, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR3", 0x110d8, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR4", 0x110dc, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR5", 0x110e0, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR6", 0x110e4, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR7", 0x110e8, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR8", 0x110ec, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR9", 0x110f0, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR10", 0x110f4, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR11", 0x110f8, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR12", 0x110fc, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR13", 0x11100, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR14", 0x11104, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PFVF_ATRB_FLTR15", 0x11108, 0 },
		{ "VLAN_EN", 16, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_RPLC_MAP_CTL", 0x1110c, 0 },
		{ "RD_WRN", 31, 1 },
		{ "ADDR", 0, 12 },
	{ "MPS_PF_RPLCT_MAP", 0x11110, 0 },
	{ "MPS_VF_RPLCT_MAP0", 0x11114, 0 },
	{ "MPS_VF_RPLCT_MAP1", 0x11118, 0 },
	{ "MPS_VF_RPLCT_MAP2", 0x1111c, 0 },
	{ "MPS_VF_RPLCT_MAP3", 0x11120, 0 },
	{ "MPS_VF_RPLCT_MAP4", 0x11300, 0 },
	{ "MPS_VF_RPLCT_MAP5", 0x11304, 0 },
	{ "MPS_VF_RPLCT_MAP6", 0x11308, 0 },
	{ "MPS_VF_RPLCT_MAP7", 0x1130c, 0 },
	{ "MPS_PKD_MEM_DATA0", 0x11130, 0 },
	{ "MPS_PKD_MEM_DATA1", 0x11134, 0 },
	{ "MPS_PKD_MEM_DATA2", 0x11138, 0 },
	{ "MPS_PGD_MEM_DATA", 0x1113c, 0 },
	{ "MPS_RX_SE_CNT_ERR", 0x11140, 0 },
	{ "MPS_RX_SE_CNT_CLR", 0x11144, 0 },
	{ "MPS_RX_IN_BUS_STATE", 0x11174, 0 },
		{ "ST3", 24, 8 },
		{ "ST2", 16, 8 },
		{ "ST1", 8, 8 },
		{ "ST0", 0, 8 },
	{ "MPS_RX_OUT_BUS_STATE", 0x11178, 0 },
		{ "ST_NCSI", 23, 9 },
		{ "ST_TP", 0, 23 },
	{ "MPS_RX_SPARE", 0x11190, 0 },
	{ "MPS_RX_PTP_ETYPE", 0x11194, 0 },
		{ "PETYPE2", 16, 16 },
		{ "PETYPE1", 0, 16 },
	{ "MPS_RX_PTP_TCP", 0x11198, 0 },
		{ "PTCPORT2", 16, 16 },
		{ "PTCPORT1", 0, 16 },
	{ "MPS_RX_PTP_UDP", 0x1119c, 0 },
		{ "PUDPORT2", 16, 16 },
		{ "PUDPORT1", 0, 16 },
	{ "MPS_RX_PTP_CTL", 0x111a0, 0 },
		{ "MIN_PTP_SPACE", 24, 7 },
		{ "PUDP2EN", 20, 4 },
		{ "PUDP1EN", 16, 4 },
		{ "PTCP2EN", 12, 4 },
		{ "PTCP1EN", 8, 4 },
		{ "PETYPE2EN", 4, 4 },
		{ "PETYPE1EN", 0, 4 },
	{ "MPS_RX_PAUSE_GEN_TH_0_0", 0x12104, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_1", 0x12108, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_2", 0x1210c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_3", 0x12110, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_4", 0x12114, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_5", 0x12118, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_6", 0x1211c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_0_7", 0x12120, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_0", 0x12124, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_1", 0x12128, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_2", 0x1212c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_3", 0x12130, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_4", 0x12134, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_5", 0x12138, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_6", 0x1213c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1_7", 0x12140, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_0", 0x12144, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_1", 0x12148, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_2", 0x1214c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_3", 0x12150, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_4", 0x12154, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_5", 0x12158, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_6", 0x1215c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2_7", 0x12160, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_0", 0x12164, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_1", 0x12168, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_2", 0x1216c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_3", 0x12170, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_4", 0x12174, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_5", 0x12178, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_6", 0x1217c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3_7", 0x12180, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_DROP_0_0", 0x12184, 0 },
	{ "MPS_RX_DROP_0_1", 0x12188, 0 },
	{ "MPS_RX_DROP_0_2", 0x1218c, 0 },
	{ "MPS_RX_DROP_0_3", 0x12190, 0 },
	{ "MPS_RX_DROP_0_4", 0x12194, 0 },
	{ "MPS_RX_DROP_0_5", 0x12198, 0 },
	{ "MPS_RX_DROP_0_6", 0x1219c, 0 },
	{ "MPS_RX_DROP_0_7", 0x121a0, 0 },
	{ "MPS_RX_DROP_1_0", 0x121a4, 0 },
	{ "MPS_RX_DROP_1_1", 0x121a8, 0 },
	{ "MPS_RX_DROP_1_2", 0x121ac, 0 },
	{ "MPS_RX_DROP_1_3", 0x121b0, 0 },
	{ "MPS_RX_DROP_1_4", 0x121b4, 0 },
	{ "MPS_RX_DROP_1_5", 0x121b8, 0 },
	{ "MPS_RX_DROP_1_6", 0x121bc, 0 },
	{ "MPS_RX_DROP_1_7", 0x121c0, 0 },
	{ "MPS_RX_DROP_2_0", 0x121c4, 0 },
	{ "MPS_RX_DROP_2_1", 0x121c8, 0 },
	{ "MPS_RX_DROP_2_2", 0x121cc, 0 },
	{ "MPS_RX_DROP_2_3", 0x121d0, 0 },
	{ "MPS_RX_DROP_2_4", 0x121d4, 0 },
	{ "MPS_RX_DROP_2_5", 0x121d8, 0 },
	{ "MPS_RX_DROP_2_6", 0x121dc, 0 },
	{ "MPS_RX_DROP_2_7", 0x121e0, 0 },
	{ "MPS_RX_DROP_3_0", 0x121e4, 0 },
	{ "MPS_RX_DROP_3_1", 0x121e8, 0 },
	{ "MPS_RX_DROP_3_2", 0x121ec, 0 },
	{ "MPS_RX_DROP_3_3", 0x121f0, 0 },
	{ "MPS_RX_DROP_3_4", 0x121f4, 0 },
	{ "MPS_RX_DROP_3_5", 0x121f8, 0 },
	{ "MPS_RX_DROP_3_6", 0x121fc, 0 },
	{ "MPS_RX_DROP_3_7", 0x12200, 0 },
	{ "MPS_RX_MAC_BG_PG_CNT0_0", 0x12204, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_1", 0x12208, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_2", 0x1220c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_3", 0x12210, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_4", 0x12214, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_5", 0x12218, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_6", 0x1221c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT0_7", 0x12220, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_0", 0x12224, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_1", 0x12228, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_2", 0x1222c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_3", 0x12230, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_4", 0x12234, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_5", 0x12238, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_6", 0x1223c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1_7", 0x12240, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_0", 0x12244, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_1", 0x12248, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_2", 0x1224c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_3", 0x12250, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_4", 0x12254, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_5", 0x12258, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_6", 0x1225c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2_7", 0x12260, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_0", 0x12264, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_1", 0x12268, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_2", 0x1226c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_3", 0x12270, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_4", 0x12274, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_5", 0x12278, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_6", 0x1227c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3_7", 0x12280, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_PAUSE_GEN_TH_0", 0x12284, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_1", 0x12288, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_2", 0x1228c, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_PAUSE_GEN_TH_3", 0x12290, 0 },
		{ "TH_HIGH", 16, 16 },
		{ "TH_LOW", 0, 16 },
	{ "MPS_RX_MAC_CLS_DROP_CNT0", 0x111e4, 0 },
	{ "MPS_RX_MAC_CLS_DROP_CNT1", 0x111e8, 0 },
	{ "MPS_RX_MAC_CLS_DROP_CNT2", 0x111ec, 0 },
	{ "MPS_RX_MAC_CLS_DROP_CNT3", 0x111f0, 0 },
	{ "MPS_RX_LPBK_CLS_DROP_CNT0", 0x111f4, 0 },
	{ "MPS_RX_LPBK_CLS_DROP_CNT1", 0x111f8, 0 },
	{ "MPS_RX_LPBK_CLS_DROP_CNT2", 0x111fc, 0 },
	{ "MPS_RX_LPBK_CLS_DROP_CNT3", 0x11200, 0 },
	{ "MPS_RX_CGEN", 0x11204, 0 },
		{ "MPS_RX_CGEN_NCSI", 12, 1 },
		{ "MPS_RX_CGEN_OUT", 8, 4 },
		{ "MPS_RX_CGEN_LPBK_IN", 4, 4 },
		{ "MPS_RX_CGEN_MAC_IN", 0, 4 },
	{ "MPS_RX_MAC_BG_PG_CNT0", 0x11208, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT1", 0x1120c, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT2", 0x11210, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_MAC_BG_PG_CNT3", 0x11214, 0 },
		{ "MAC_USED", 16, 11 },
		{ "MAC_ALLOC", 0, 11 },
	{ "MPS_RX_LPBK_BG_PG_CNT0", 0x11218, 0 },
		{ "LPBK_USED", 16, 11 },
		{ "LPBK_ALLOC", 0, 11 },
	{ "MPS_RX_LPBK_BG_PG_CNT1", 0x1121c, 0 },
		{ "LPBK_USED", 16, 11 },
		{ "LPBK_ALLOC", 0, 11 },
	{ "MPS_RX_LPBK_BG_PG_CNT2", 0x11220, 0 },
		{ "LPBK_USED", 16, 11 },
		{ "LPBK_ALLOC", 0, 11 },
	{ "MPS_RX_LPBK_BG_PG_CNT3", 0x11224, 0 },
		{ "LPBK_USED", 16, 11 },
		{ "LPBK_ALLOC", 0, 11 },
	{ "MPS_RX_CONGESTION_THRESHOLD_BG0", 0x11228, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_CONGESTION_THRESHOLD_BG1", 0x1122c, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_CONGESTION_THRESHOLD_BG2", 0x11230, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_CONGESTION_THRESHOLD_BG3", 0x11234, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG0", 0x122b4, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG1", 0x122b8, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG2", 0x122bc, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_LPBK_CONGESTION_THRESHOLD_BG3", 0x122c0, 0 },
		{ "CONG_EN", 31, 1 },
		{ "CONG_TH", 0, 20 },
	{ "MPS_RX_GRE_PROT_TYPE", 0x11238, 0 },
		{ "NVGRE_EN", 9, 1 },
		{ "GRE_EN", 8, 1 },
		{ "GRE", 0, 8 },
	{ "MPS_RX_VXLAN_TYPE", 0x1123c, 0 },
		{ "VXLAN_EN", 16, 1 },
		{ "VXLAN", 0, 16 },
	{ "MPS_RX_GENEVE_TYPE", 0x11240, 0 },
		{ "GENEVE_EN", 16, 1 },
		{ "GENEVE", 0, 16 },
	{ "MPS_RX_INNER_HDR_IVLAN", 0x11244, 0 },
		{ "IVLAN_EN", 16, 1 },
		{ "IVLAN_ETYPE", 0, 16 },
	{ "MPS_RX_ENCAP_NVGRE", 0x11248, 0 },
		{ "ETYPE_EN", 16, 1 },
		{ "ETYPE", 0, 16 },
	{ "MPS_RX_ENCAP_GENEVE", 0x1124c, 0 },
		{ "ETYPE_EN", 16, 1 },
		{ "ETYPE", 0, 16 },
	{ "MPS_RX_ENCAP_VXLAN", 0x120f0, 0 },
		{ "ETYPE_EN", 16, 1 },
		{ "ETYPE", 0, 16 },
	{ "MPS_RX_INT_VXLAN", 0x120f4, 0 },
		{ "INT_TYPE_EN", 16, 1 },
		{ "INT_TYPE", 0, 16 },
	{ "MPS_RX_INT_GENEVE", 0x120f8, 0 },
		{ "INT_TYPE_EN", 16, 1 },
		{ "INT_TYPE", 0, 16 },
	{ "MPS_RX_TCP", 0x11250, 0 },
		{ "PROT_TYPE_EN", 8, 1 },
		{ "PROT_TYPE", 0, 8 },
	{ "MPS_RX_UDP", 0x11254, 0 },
		{ "PROT_TYPE_EN", 8, 1 },
		{ "PROT_TYPE", 0, 8 },
	{ "MPS_RX_PAUSE", 0x11258, 0 },
	{ "MPS_RX_LENGTH", 0x1125c, 0 },
		{ "SAP_VALUE", 16, 16 },
		{ "LENGTH_ETYPE", 0, 16 },
	{ "MPS_RX_CTL_ORG", 0x11260, 0 },
		{ "CTL_VALUE", 24, 8 },
		{ "ORG_VALUE", 0, 24 },
	{ "MPS_RX_IPV4", 0x11264, 0 },
	{ "MPS_RX_IPV6", 0x11268, 0 },
	{ "MPS_RX_TTL", 0x1126c, 0 },
		{ "TTL_IPV4", 10, 8 },
		{ "TTL_IPV6", 2, 8 },
		{ "TTL_CHK_EN_IPV4", 1, 1 },
		{ "TTL_CHK_EN_IPV6", 0, 1 },
	{ "MPS_RX_DEFAULT_VNI", 0x11270, 0 },
	{ "MPS_RX_PRS_CTL", 0x11274, 0 },
		{ "CTL_CHK_EN", 28, 1 },
		{ "ORG_CHK_EN", 27, 1 },
		{ "SAP_CHK_EN", 26, 1 },
		{ "VXLAN_FLAG_CHK_EN", 25, 1 },
		{ "VXLAN_FLAG_MASK", 17, 8 },
		{ "VXLAN_FLAG", 9, 8 },
		{ "GRE_VER_CHK_EN", 8, 1 },
		{ "GRE_VER", 5, 3 },
		{ "GENEVE_VER_CHK_EN", 4, 1 },
		{ "GENEVE_VER", 2, 2 },
		{ "DIP_EN", 1, 1 },
	{ "MPS_RX_PRS_CTL_2", 0x11278, 0 },
		{ "IP_EXT_HDR_EN", 5, 1 },
		{ "EN_UDP_CSUM_CHK", 4, 1 },
		{ "EN_UDP_LEN_CHK", 3, 1 },
		{ "EN_IP_CSUM_CHK", 2, 1 },
		{ "EN_IP_PAYLOAD_LEN_CHK", 1, 1 },
		{ "IPV6_UDP_CSUM_COMPAT", 0, 1 },
	{ "MPS_RX_MPS2NCSI_CNT", 0x1127c, 0 },
	{ "MPS_RX_MAX_TNL_HDR_LEN", 0x11280, 0 },
		{ "MODE", 9, 1 },
		{ "LEN", 0, 9 },
	{ "MPS_RX_PAUSE_DA_H", 0x11284, 0 },
	{ "MPS_RX_PAUSE_DA_L", 0x11288, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_MAC0", 0x1128c, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_MAC0", 0x11290, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_MAC0", 0x11294, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_MAC0", 0x11298, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_MAC1", 0x1129c, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_MAC1", 0x112a0, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_MAC1", 0x112a4, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_MAC1", 0x112a8, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_MAC2", 0x11408, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_MAC2", 0x1140c, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_MAC2", 0x11410, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_MAC2", 0x11414, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_MAC3", 0x11418, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_MAC3", 0x1141c, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_MAC3", 0x11420, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_MAC3", 0x11424, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_LPBK0", 0x112ac, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_LPBK0", 0x112b0, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_LPBK0", 0x112b4, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_LPBK0", 0x112b8, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_LPBK1", 0x112bc, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_LPBK1", 0x112c0, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_LPBK1", 0x112c4, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_LPBK1", 0x112c8, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_LPBK2", 0x11428, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_LPBK2", 0x1142c, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_LPBK2", 0x11430, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_LPBK2", 0x11434, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_LPBK3", 0x11438, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_LPBK3", 0x1143c, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_LPBK3", 0x11440, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_LPBK3", 0x11444, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_TO_TP0", 0x112cc, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_TO_TP0", 0x112d0, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_TO_TP0", 0x112d4, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_TO_TP0", 0x112d8, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_TO_TP1", 0x112dc, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_TO_TP1", 0x112e0, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_TO_TP1", 0x112e4, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_TO_TP1", 0x112e8, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_TO_TP2", 0x11448, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_TO_TP2", 0x1144c, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_TO_TP2", 0x11450, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_TO_TP2", 0x11454, 0 },
	{ "MPS_RX_CNT_NVGRE_PKT_TO_TP3", 0x11458, 0 },
	{ "MPS_RX_CNT_VXLAN_PKT_TO_TP3", 0x1145c, 0 },
	{ "MPS_RX_CNT_GENEVE_PKT_TO_TP3", 0x11460, 0 },
	{ "MPS_RX_CNT_TNL_ERR_PKT_TO_TP3", 0x11464, 0 },
	{ "MPS_RX_ESP", 0x112ec, 0 },
		{ "PROT_TYPE_EN", 8, 1 },
		{ "PROT_TYPE", 0, 8 },
	{ "MPS_EN_LPBK_BLK_SNDR", 0x112f0, 0 },
		{ "EN_CH3", 3, 1 },
		{ "EN_CH2", 2, 1 },
		{ "EN_CH1", 1, 1 },
		{ "EN_CH0", 0, 1 },
	{ "MPS_CLS_DROP_DMAC0_L", 0x12070, 0 },
	{ "MPS_CLS_DROP_DMAC0_H", 0x12074, 0 },
	{ "MPS_CLS_DROP_DMAC1_L", 0x12078, 0 },
	{ "MPS_CLS_DROP_DMAC1_H", 0x1207c, 0 },
	{ "MPS_CLS_DROP_DMAC2_L", 0x12080, 0 },
	{ "MPS_CLS_DROP_DMAC2_H", 0x12084, 0 },
	{ "MPS_CLS_DROP_DMAC3_L", 0x12088, 0 },
	{ "MPS_CLS_DROP_DMAC3_H", 0x1208c, 0 },
	{ "MPS_CLS_DROP_DMAC4_L", 0x12090, 0 },
	{ "MPS_CLS_DROP_DMAC4_H", 0x12094, 0 },
	{ "MPS_CLS_DROP_DMAC5_L", 0x12098, 0 },
	{ "MPS_CLS_DROP_DMAC5_H", 0x1209c, 0 },
	{ "MPS_CLS_DROP_DMAC6_L", 0x120a0, 0 },
	{ "MPS_CLS_DROP_DMAC6_H", 0x120a4, 0 },
	{ "MPS_CLS_DROP_DMAC7_L", 0x120a8, 0 },
	{ "MPS_CLS_DROP_DMAC7_H", 0x120ac, 0 },
	{ "MPS_CLS_DROP_DMAC8_L", 0x120b0, 0 },
	{ "MPS_CLS_DROP_DMAC8_H", 0x120b4, 0 },
	{ "MPS_CLS_DROP_DMAC9_L", 0x120b8, 0 },
	{ "MPS_CLS_DROP_DMAC9_H", 0x120bc, 0 },
	{ "MPS_CLS_DROP_DMAC10_L", 0x120c0, 0 },
	{ "MPS_CLS_DROP_DMAC10_H", 0x120c4, 0 },
	{ "MPS_CLS_DROP_DMAC11_L", 0x120c8, 0 },
	{ "MPS_CLS_DROP_DMAC11_H", 0x120cc, 0 },
	{ "MPS_CLS_DROP_DMAC12_L", 0x120d0, 0 },
	{ "MPS_CLS_DROP_DMAC12_H", 0x120d4, 0 },
	{ "MPS_CLS_DROP_DMAC13_L", 0x120d8, 0 },
	{ "MPS_CLS_DROP_DMAC13_H", 0x120dc, 0 },
	{ "MPS_CLS_DROP_DMAC14_L", 0x120e0, 0 },
	{ "MPS_CLS_DROP_DMAC14_H", 0x120e4, 0 },
	{ "MPS_CLS_DROP_DMAC15_L", 0x120e8, 0 },
	{ "MPS_CLS_DROP_DMAC15_H", 0x120ec, 0 },
	{ "MPS_RX_TRANS_ENCAP_FLTR_CTL", 0x12100, 0 },
		{ "TIMEOUT_FLT_CLR_EN", 8, 1 },
		{ "FLTR_TIMOUT_VAL", 0, 8 },
	{ "MPS_RX_BG0_IPSEC_CNT", 0x12294, 0 },
	{ "MPS_RX_BG1_IPSEC_CNT", 0x12298, 0 },
	{ "MPS_RX_BG2_IPSEC_CNT", 0x1229c, 0 },
	{ "MPS_RX_BG3_IPSEC_CNT", 0x122a0, 0 },
	{ "MPS_RX_MEM_FIFO_CONFIG0", 0x122a4, 0 },
		{ "FIFO_CONFIG2", 16, 16 },
		{ "FIFO_CONFIG1", 0, 16 },
	{ "MPS_RX_MEM_FIFO_CONFIG1", 0x122a8, 0 },
	{ "MPS_LPBK_MEM_FIFO_CONFIG0", 0x122ac, 0 },
		{ "FIFO_CONFIG2", 16, 16 },
		{ "FIFO_CONFIG1", 0, 16 },
	{ "MPS_LPBK_MEM_FIFO_CONFIG1", 0x122b0, 0 },
	{ "MPS_BG_PAUSE_CTL", 0x122c4, 0 },
		{ "bg0_pause_en", 3, 1 },
		{ "bg1_pause_en", 2, 1 },
		{ "bg2_pause_en", 1, 1 },
		{ "bg3_pause_en", 0, 1 },
	{ "MPS_PORT_RX_CTL", 0x30100, 0 },
		{ "TRANS_ENCAP_EN", 30, 1 },
		{ "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 },
		{ "PASS_HPROM", 28, 1 },
		{ "PASS_PROM", 27, 1 },
		{ "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 },
		{ "HASH_PRIO_SEL_LPBK", 25, 1 },
		{ "HASH_PRIO_SEL_MAC", 24, 1 },
		{ "HASH_EN_LPBK", 23, 1 },
		{ "HASH_EN_MAC", 22, 1 },
		{ "PTP_FWD_UP", 21, 1 },
		{ "NO_RPLCT_M", 20, 1 },
		{ "RPLCT_SEL_L", 18, 2 },
		{ "FLTR_VLAN_SEL", 17, 1 },
		{ "PRIO_VLAN_SEL", 16, 1 },
		{ "CHK_8023_LEN_M", 15, 1 },
		{ "CHK_8023_LEN_L", 14, 1 },
		{ "NIV_DROP", 13, 1 },
		{ "NOV_DROP", 12, 1 },
		{ "CLS_PRT", 11, 1 },
		{ "RX_QFC_EN", 10, 1 },
		{ "QFC_FWD_UP", 9, 1 },
		{ "PPP_FWD_UP", 8, 1 },
		{ "PAUSE_FWD_UP", 7, 1 },
		{ "LPBK_BP", 6, 1 },
		{ "PASS_NO_MATCH", 5, 1 },
		{ "IVLAN_EN", 4, 1 },
		{ "OVLAN_EN3", 3, 1 },
		{ "OVLAN_EN2", 2, 1 },
		{ "OVLAN_EN1", 1, 1 },
		{ "OVLAN_EN0", 0, 1 },
	{ "MPS_PORT_RX_MTU", 0x30104, 0 },
	{ "MPS_PORT_RX_PF_MAP", 0x30108, 0 },
	{ "MPS_PORT_RX_VF_MAP0", 0x3010c, 0 },
	{ "MPS_PORT_RX_VF_MAP1", 0x30110, 0 },
	{ "MPS_PORT_RX_VF_MAP2", 0x30114, 0 },
	{ "MPS_PORT_RX_VF_MAP3", 0x30118, 0 },
	{ "MPS_PORT_RX_VF_MAP4", 0x30150, 0 },
	{ "MPS_PORT_RX_VF_MAP5", 0x30154, 0 },
	{ "MPS_PORT_RX_VF_MAP6", 0x30158, 0 },
	{ "MPS_PORT_RX_VF_MAP7", 0x3015c, 0 },
	{ "MPS_PORT_RX_IVLAN", 0x3011c, 0 },
	{ "MPS_PORT_RX_OVLAN0", 0x30120, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN1", 0x30124, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN2", 0x30128, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN3", 0x3012c, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_RSS_HASH", 0x30130, 0 },
	{ "MPS_PORT_RX_RSS_CONTROL", 0x30134, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_INT_RSS_HASH", 0x30170, 0 },
	{ "MPS_PORT_RX_INT_RSS_CONTROL", 0x30174, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_CTL1", 0x30138, 0 },
		{ "FIXED_PFVF_MAC", 14, 1 },
		{ "FIXED_PFVF_LPBK", 13, 1 },
		{ "FIXED_PFVF_LPBK_OV", 12, 1 },
		{ "FIXED_PF", 9, 3 },
		{ "FIXED_VF_VLD", 8, 1 },
		{ "FIXED_VF", 0, 8 },
	{ "MPS_PORT_RX_SPARE", 0x3013c, 0 },
	{ "MPS_PORT_RX_PTP_RSS_HASH", 0x30140, 0 },
	{ "MPS_PORT_RX_PTP_RSS_CONTROL", 0x30144, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_TS_VLD", 0x30148, 0 },
	{ "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3014c, 0 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x30160, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "non_runt_frame", 10, 1 },
		{ "Inner_VLAN_VLD", 9, 1 },
		{ "Err_IP_Payload_Len", 8, 1 },
		{ "Err_UDP_Payload_Len", 7, 1 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x30164, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "Inner_VLAN_VLD", 10, 1 },
		{ "Err_IP_Payload_Len", 9, 1 },
		{ "Err_UDP_Payload_Len", 8, 1 },
	{ "MPS_PORT_RX_REPL_VECT_SEL", 0x30168, 0 },
		{ "DIS_REPL_VECT_SEL", 4, 1 },
		{ "REPL_VECT_SEL", 0, 4 },
	{ "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3016c, 0 },
	{ "MPS_PORT_RX_CNT_DBG_CTL", 0x30178, 0 },
	{ "MPS_PORT_RX_CNT_DBG", 0x3017c, 0 },
	{ "MPS_PORT_RX_CTL", 0x32100, 0 },
		{ "TRANS_ENCAP_EN", 30, 1 },
		{ "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 },
		{ "PASS_HPROM", 28, 1 },
		{ "PASS_PROM", 27, 1 },
		{ "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 },
		{ "HASH_PRIO_SEL_LPBK", 25, 1 },
		{ "HASH_PRIO_SEL_MAC", 24, 1 },
		{ "HASH_EN_LPBK", 23, 1 },
		{ "HASH_EN_MAC", 22, 1 },
		{ "PTP_FWD_UP", 21, 1 },
		{ "NO_RPLCT_M", 20, 1 },
		{ "RPLCT_SEL_L", 18, 2 },
		{ "FLTR_VLAN_SEL", 17, 1 },
		{ "PRIO_VLAN_SEL", 16, 1 },
		{ "CHK_8023_LEN_M", 15, 1 },
		{ "CHK_8023_LEN_L", 14, 1 },
		{ "NIV_DROP", 13, 1 },
		{ "NOV_DROP", 12, 1 },
		{ "CLS_PRT", 11, 1 },
		{ "RX_QFC_EN", 10, 1 },
		{ "QFC_FWD_UP", 9, 1 },
		{ "PPP_FWD_UP", 8, 1 },
		{ "PAUSE_FWD_UP", 7, 1 },
		{ "LPBK_BP", 6, 1 },
		{ "PASS_NO_MATCH", 5, 1 },
		{ "IVLAN_EN", 4, 1 },
		{ "OVLAN_EN3", 3, 1 },
		{ "OVLAN_EN2", 2, 1 },
		{ "OVLAN_EN1", 1, 1 },
		{ "OVLAN_EN0", 0, 1 },
	{ "MPS_PORT_RX_MTU", 0x32104, 0 },
	{ "MPS_PORT_RX_PF_MAP", 0x32108, 0 },
	{ "MPS_PORT_RX_VF_MAP0", 0x3210c, 0 },
	{ "MPS_PORT_RX_VF_MAP1", 0x32110, 0 },
	{ "MPS_PORT_RX_VF_MAP2", 0x32114, 0 },
	{ "MPS_PORT_RX_VF_MAP3", 0x32118, 0 },
	{ "MPS_PORT_RX_VF_MAP4", 0x32150, 0 },
	{ "MPS_PORT_RX_VF_MAP5", 0x32154, 0 },
	{ "MPS_PORT_RX_VF_MAP6", 0x32158, 0 },
	{ "MPS_PORT_RX_VF_MAP7", 0x3215c, 0 },
	{ "MPS_PORT_RX_IVLAN", 0x3211c, 0 },
	{ "MPS_PORT_RX_OVLAN0", 0x32120, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN1", 0x32124, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN2", 0x32128, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN3", 0x3212c, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_RSS_HASH", 0x32130, 0 },
	{ "MPS_PORT_RX_RSS_CONTROL", 0x32134, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_INT_RSS_HASH", 0x32170, 0 },
	{ "MPS_PORT_RX_INT_RSS_CONTROL", 0x32174, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_CTL1", 0x32138, 0 },
		{ "FIXED_PFVF_MAC", 14, 1 },
		{ "FIXED_PFVF_LPBK", 13, 1 },
		{ "FIXED_PFVF_LPBK_OV", 12, 1 },
		{ "FIXED_PF", 9, 3 },
		{ "FIXED_VF_VLD", 8, 1 },
		{ "FIXED_VF", 0, 8 },
	{ "MPS_PORT_RX_SPARE", 0x3213c, 0 },
	{ "MPS_PORT_RX_PTP_RSS_HASH", 0x32140, 0 },
	{ "MPS_PORT_RX_PTP_RSS_CONTROL", 0x32144, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_TS_VLD", 0x32148, 0 },
	{ "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3214c, 0 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x32160, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "non_runt_frame", 10, 1 },
		{ "Inner_VLAN_VLD", 9, 1 },
		{ "Err_IP_Payload_Len", 8, 1 },
		{ "Err_UDP_Payload_Len", 7, 1 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x32164, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "Inner_VLAN_VLD", 10, 1 },
		{ "Err_IP_Payload_Len", 9, 1 },
		{ "Err_UDP_Payload_Len", 8, 1 },
	{ "MPS_PORT_RX_REPL_VECT_SEL", 0x32168, 0 },
		{ "DIS_REPL_VECT_SEL", 4, 1 },
		{ "REPL_VECT_SEL", 0, 4 },
	{ "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3216c, 0 },
	{ "MPS_PORT_RX_CNT_DBG_CTL", 0x32178, 0 },
	{ "MPS_PORT_RX_CNT_DBG", 0x3217c, 0 },
	{ "MPS_PORT_RX_CTL", 0x34100, 0 },
		{ "TRANS_ENCAP_EN", 30, 1 },
		{ "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 },
		{ "PASS_HPROM", 28, 1 },
		{ "PASS_PROM", 27, 1 },
		{ "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 },
		{ "HASH_PRIO_SEL_LPBK", 25, 1 },
		{ "HASH_PRIO_SEL_MAC", 24, 1 },
		{ "HASH_EN_LPBK", 23, 1 },
		{ "HASH_EN_MAC", 22, 1 },
		{ "PTP_FWD_UP", 21, 1 },
		{ "NO_RPLCT_M", 20, 1 },
		{ "RPLCT_SEL_L", 18, 2 },
		{ "FLTR_VLAN_SEL", 17, 1 },
		{ "PRIO_VLAN_SEL", 16, 1 },
		{ "CHK_8023_LEN_M", 15, 1 },
		{ "CHK_8023_LEN_L", 14, 1 },
		{ "NIV_DROP", 13, 1 },
		{ "NOV_DROP", 12, 1 },
		{ "CLS_PRT", 11, 1 },
		{ "RX_QFC_EN", 10, 1 },
		{ "QFC_FWD_UP", 9, 1 },
		{ "PPP_FWD_UP", 8, 1 },
		{ "PAUSE_FWD_UP", 7, 1 },
		{ "LPBK_BP", 6, 1 },
		{ "PASS_NO_MATCH", 5, 1 },
		{ "IVLAN_EN", 4, 1 },
		{ "OVLAN_EN3", 3, 1 },
		{ "OVLAN_EN2", 2, 1 },
		{ "OVLAN_EN1", 1, 1 },
		{ "OVLAN_EN0", 0, 1 },
	{ "MPS_PORT_RX_MTU", 0x34104, 0 },
	{ "MPS_PORT_RX_PF_MAP", 0x34108, 0 },
	{ "MPS_PORT_RX_VF_MAP0", 0x3410c, 0 },
	{ "MPS_PORT_RX_VF_MAP1", 0x34110, 0 },
	{ "MPS_PORT_RX_VF_MAP2", 0x34114, 0 },
	{ "MPS_PORT_RX_VF_MAP3", 0x34118, 0 },
	{ "MPS_PORT_RX_VF_MAP4", 0x34150, 0 },
	{ "MPS_PORT_RX_VF_MAP5", 0x34154, 0 },
	{ "MPS_PORT_RX_VF_MAP6", 0x34158, 0 },
	{ "MPS_PORT_RX_VF_MAP7", 0x3415c, 0 },
	{ "MPS_PORT_RX_IVLAN", 0x3411c, 0 },
	{ "MPS_PORT_RX_OVLAN0", 0x34120, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN1", 0x34124, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN2", 0x34128, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN3", 0x3412c, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_RSS_HASH", 0x34130, 0 },
	{ "MPS_PORT_RX_RSS_CONTROL", 0x34134, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_INT_RSS_HASH", 0x34170, 0 },
	{ "MPS_PORT_RX_INT_RSS_CONTROL", 0x34174, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_CTL1", 0x34138, 0 },
		{ "FIXED_PFVF_MAC", 14, 1 },
		{ "FIXED_PFVF_LPBK", 13, 1 },
		{ "FIXED_PFVF_LPBK_OV", 12, 1 },
		{ "FIXED_PF", 9, 3 },
		{ "FIXED_VF_VLD", 8, 1 },
		{ "FIXED_VF", 0, 8 },
	{ "MPS_PORT_RX_SPARE", 0x3413c, 0 },
	{ "MPS_PORT_RX_PTP_RSS_HASH", 0x34140, 0 },
	{ "MPS_PORT_RX_PTP_RSS_CONTROL", 0x34144, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_TS_VLD", 0x34148, 0 },
	{ "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3414c, 0 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x34160, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "non_runt_frame", 10, 1 },
		{ "Inner_VLAN_VLD", 9, 1 },
		{ "Err_IP_Payload_Len", 8, 1 },
		{ "Err_UDP_Payload_Len", 7, 1 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x34164, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "Inner_VLAN_VLD", 10, 1 },
		{ "Err_IP_Payload_Len", 9, 1 },
		{ "Err_UDP_Payload_Len", 8, 1 },
	{ "MPS_PORT_RX_REPL_VECT_SEL", 0x34168, 0 },
		{ "DIS_REPL_VECT_SEL", 4, 1 },
		{ "REPL_VECT_SEL", 0, 4 },
	{ "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3416c, 0 },
	{ "MPS_PORT_RX_CNT_DBG_CTL", 0x34178, 0 },
	{ "MPS_PORT_RX_CNT_DBG", 0x3417c, 0 },
	{ "MPS_PORT_RX_CTL", 0x36100, 0 },
		{ "TRANS_ENCAP_EN", 30, 1 },
		{ "CRYPTO_DUMMY_PKT_CHK_EN", 29, 1 },
		{ "PASS_HPROM", 28, 1 },
		{ "PASS_PROM", 27, 1 },
		{ "ENCAP_ONLY_IF_OUTER_HIT", 26, 1 },
		{ "HASH_PRIO_SEL_LPBK", 25, 1 },
		{ "HASH_PRIO_SEL_MAC", 24, 1 },
		{ "HASH_EN_LPBK", 23, 1 },
		{ "HASH_EN_MAC", 22, 1 },
		{ "PTP_FWD_UP", 21, 1 },
		{ "NO_RPLCT_M", 20, 1 },
		{ "RPLCT_SEL_L", 18, 2 },
		{ "FLTR_VLAN_SEL", 17, 1 },
		{ "PRIO_VLAN_SEL", 16, 1 },
		{ "CHK_8023_LEN_M", 15, 1 },
		{ "CHK_8023_LEN_L", 14, 1 },
		{ "NIV_DROP", 13, 1 },
		{ "NOV_DROP", 12, 1 },
		{ "CLS_PRT", 11, 1 },
		{ "RX_QFC_EN", 10, 1 },
		{ "QFC_FWD_UP", 9, 1 },
		{ "PPP_FWD_UP", 8, 1 },
		{ "PAUSE_FWD_UP", 7, 1 },
		{ "LPBK_BP", 6, 1 },
		{ "PASS_NO_MATCH", 5, 1 },
		{ "IVLAN_EN", 4, 1 },
		{ "OVLAN_EN3", 3, 1 },
		{ "OVLAN_EN2", 2, 1 },
		{ "OVLAN_EN1", 1, 1 },
		{ "OVLAN_EN0", 0, 1 },
	{ "MPS_PORT_RX_MTU", 0x36104, 0 },
	{ "MPS_PORT_RX_PF_MAP", 0x36108, 0 },
	{ "MPS_PORT_RX_VF_MAP0", 0x3610c, 0 },
	{ "MPS_PORT_RX_VF_MAP1", 0x36110, 0 },
	{ "MPS_PORT_RX_VF_MAP2", 0x36114, 0 },
	{ "MPS_PORT_RX_VF_MAP3", 0x36118, 0 },
	{ "MPS_PORT_RX_VF_MAP4", 0x36150, 0 },
	{ "MPS_PORT_RX_VF_MAP5", 0x36154, 0 },
	{ "MPS_PORT_RX_VF_MAP6", 0x36158, 0 },
	{ "MPS_PORT_RX_VF_MAP7", 0x3615c, 0 },
	{ "MPS_PORT_RX_IVLAN", 0x3611c, 0 },
	{ "MPS_PORT_RX_OVLAN0", 0x36120, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN1", 0x36124, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN2", 0x36128, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_OVLAN3", 0x3612c, 0 },
		{ "OVLAN_MASK", 16, 16 },
		{ "OVLAN_ETYPE", 0, 16 },
	{ "MPS_PORT_RX_RSS_HASH", 0x36130, 0 },
	{ "MPS_PORT_RX_RSS_CONTROL", 0x36134, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_INT_RSS_HASH", 0x36170, 0 },
	{ "MPS_PORT_RX_INT_RSS_CONTROL", 0x36174, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_CTL1", 0x36138, 0 },
		{ "FIXED_PFVF_MAC", 14, 1 },
		{ "FIXED_PFVF_LPBK", 13, 1 },
		{ "FIXED_PFVF_LPBK_OV", 12, 1 },
		{ "FIXED_PF", 9, 3 },
		{ "FIXED_VF_VLD", 8, 1 },
		{ "FIXED_VF", 0, 8 },
	{ "MPS_PORT_RX_SPARE", 0x3613c, 0 },
	{ "MPS_PORT_RX_PTP_RSS_HASH", 0x36140, 0 },
	{ "MPS_PORT_RX_PTP_RSS_CONTROL", 0x36144, 0 },
		{ "RSS_CTRL", 16, 8 },
		{ "QUE_NUM", 0, 16 },
	{ "MPS_PORT_RX_TS_VLD", 0x36148, 0 },
	{ "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3614c, 0 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x36160, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "non_runt_frame", 10, 1 },
		{ "Inner_VLAN_VLD", 9, 1 },
		{ "Err_IP_Payload_Len", 8, 1 },
		{ "Err_UDP_Payload_Len", 7, 1 },
	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x36164, 0 },
		{ "Outer_IPv4_n_Inner_IPv4", 31, 1 },
		{ "Outer_IPv4_n_Inner_IPv6", 30, 1 },
		{ "Outer_IPv6_n_Inner_IPv4", 29, 1 },
		{ "Outer_IPv6_n_Inner_IPv6", 28, 1 },
		{ "Outer_IPv4_n_VLAN_NVGRE", 27, 1 },
		{ "Outer_IPv6_n_VLAN_NVGRE", 26, 1 },
		{ "Outer_IPv4_n_Double_VLAN_NVGRE", 25, 1 },
		{ "Outer_IPv6_n_Double_VLAN_NVGRE", 24, 1 },
		{ "Outer_IPv4_n_VLAN_GRE", 23, 1 },
		{ "Outer_IPv6_n_VLAN_GRE", 22, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GRE", 21, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GRE", 20, 1 },
		{ "Outer_IPv4_n_VLAN_VXLAN", 19, 1 },
		{ "Outer_IPv6_n_VLAN_VXLAN", 18, 1 },
		{ "Outer_IPv4_n_Double_VLAN_VXLAN", 17, 1 },
		{ "Outer_IPv6_n_Double_VLAN_VXLAN", 16, 1 },
		{ "Outer_IPv4_n_VLAN_GENEVE", 15, 1 },
		{ "Outer_IPv6_n_VLAN_GENEVE", 14, 1 },
		{ "Outer_IPv4_n_Double_VLAN_GENEVE", 13, 1 },
		{ "Outer_IPv6_n_Double_VLAN_GENEVE", 12, 1 },
		{ "Err_Tnl_Hdr_Len", 11, 1 },
		{ "Inner_VLAN_VLD", 10, 1 },
		{ "Err_IP_Payload_Len", 9, 1 },
		{ "Err_UDP_Payload_Len", 8, 1 },
	{ "MPS_PORT_RX_REPL_VECT_SEL", 0x36168, 0 },
		{ "DIS_REPL_VECT_SEL", 4, 1 },
		{ "REPL_VECT_SEL", 0, 4 },
	{ "MPS_PORT_MAC_RX_DROP_EN_PP", 0x3616c, 0 },
	{ "MPS_PORT_RX_CNT_DBG_CTL", 0x36178, 0 },
	{ "MPS_PORT_RX_CNT_DBG", 0x3617c, 0 },
	{ "MPS_TX_PRTY_SEL", 0x9400, 0 },
		{ "Ch4_Prty", 16, 3 },
		{ "Ch3_Prty", 13, 3 },
		{ "Ch2_Prty", 10, 3 },
		{ "Ch1_Prty", 7, 3 },
		{ "Ch0_Prty", 4, 3 },
		{ "TP_Source", 2, 2 },
		{ "NCSI_Source", 0, 2 },
	{ "MPS_TX_INT_ENABLE", 0x9404, 0 },
		{ "PortErr", 28, 1 },
		{ "FRMERR", 27, 1 },
		{ "SECNTERR", 26, 1 },
		{ "BUBBLE", 25, 1 },
		{ "TxTokenFifo", 15, 10 },
		{ "PERR_TP2MPS_TFIFO", 13, 2 },
		{ "TxDescFifo", 9, 4 },
		{ "TxDataFifo", 5, 4 },
		{ "Ncsi", 4, 1 },
		{ "TP", 0, 4 },
	{ "MPS_TX_INT_CAUSE", 0x9408, 0 },
		{ "PortErr", 28, 1 },
		{ "FRMERR", 27, 1 },
		{ "SECNTERR", 26, 1 },
		{ "BUBBLE", 25, 1 },
		{ "TxTokenFifo", 15, 10 },
		{ "PERR_TP2MPS_TFIFO", 13, 2 },
		{ "TxDescFifo", 9, 4 },
		{ "TxDataFifo", 5, 4 },
		{ "Ncsi", 4, 1 },
		{ "TP", 0, 4 },
	{ "MPS_TX_NCSI2MPS_CNT", 0x940c, 0 },
	{ "MPS_TX_PERR_ENABLE", 0x9410, 0 },
		{ "PortErrInt", 28, 1 },
		{ "FramingErrInt", 27, 1 },
		{ "SeCntErrInt", 26, 1 },
		{ "BubbleErrInt", 25, 1 },
		{ "TxTokenFifo", 15, 10 },
		{ "PERR_TP2MPS_TFIFO", 13, 2 },
		{ "TxDescFifo", 9, 4 },
		{ "TxDataFifo", 5, 4 },
		{ "Ncsi", 4, 1 },
		{ "TP", 0, 4 },
	{ "MPS_TX_PERR_INJECT", 0x9414, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "MPS_TX_PORT_ERR", 0x9430, 0 },
		{ "Lpbkpt3", 7, 1 },
		{ "Lpbkpt2", 6, 1 },
		{ "Lpbkpt1", 5, 1 },
		{ "Lpbkpt0", 4, 1 },
		{ "pt3", 3, 1 },
		{ "pt2", 2, 1 },
		{ "pt1", 1, 1 },
		{ "pt0", 0, 1 },
	{ "MPS_TX_LPBK_DROP_BP_CTL_CH0", 0x9434, 0 },
		{ "BpEn", 1, 1 },
		{ "DropEn", 0, 1 },
	{ "MPS_TX_LPBK_DROP_BP_CTL_CH1", 0x9438, 0 },
		{ "BpEn", 1, 1 },
		{ "DropEn", 0, 1 },
	{ "MPS_TX_LPBK_DROP_BP_CTL_CH2", 0x943c, 0 },
		{ "BpEn", 1, 1 },
		{ "DropEn", 0, 1 },
	{ "MPS_TX_LPBK_DROP_BP_CTL_CH3", 0x9440, 0 },
		{ "BpEn", 1, 1 },
		{ "DropEn", 0, 1 },
	{ "MPS_TX_SGE_CH_PAUSE_IGNR", 0x9454, 0 },
	{ "MPS_TX_PAD_CTL", 0x945c, 0 },
		{ "LpbkPadEnPt3", 7, 1 },
		{ "LpbkPadEnPt2", 6, 1 },
		{ "LpbkPadEnPt1", 5, 1 },
		{ "LpbkPadEnPt0", 4, 1 },
		{ "MacPadEnPt3", 3, 1 },
		{ "MacPadEnPt2", 2, 1 },
		{ "MacPadEnPt1", 1, 1 },
		{ "MacPadEnPt0", 0, 1 },
	{ "MPS_TX_PFVF_PORT_DROP_TP", 0x9460, 0 },
		{ "TP2MPS_Ch3", 24, 8 },
		{ "TP2MPS_Ch2", 16, 8 },
		{ "TP2MPS_Ch1", 8, 8 },
		{ "TP2MPS_Ch0", 0, 8 },
	{ "MPS_TX_PFVF_PORT_DROP_NCSI", 0x9464, 0 },
	{ "MPS_TX_PFVF_PORT_DROP_CTL", 0x9468, 0 },
		{ "PFNOVFDROP", 5, 1 },
		{ "NCSI_Ch4_CLR", 4, 1 },
		{ "TP2MPS_Ch3_CLR", 3, 1 },
		{ "TP2MPS_Ch2_CLR", 2, 1 },
		{ "TP2MPS_Ch1_CLR", 1, 1 },
		{ "TP2MPS_Ch0_CLR", 0, 1 },
	{ "MPS_TX_CGEN", 0x946c, 0 },
		{ "TxOutLpbk3_CGEN", 31, 1 },
		{ "TxOutLpbk2_CGEN", 30, 1 },
		{ "TxOutLpbk1_CGEN", 29, 1 },
		{ "TxOutLpbk0_CGEN", 28, 1 },
		{ "TxOutMAC3_CGEN", 27, 1 },
		{ "TxOutMAC2_CGEN", 26, 1 },
		{ "TxOutMAC1_CGEN", 25, 1 },
		{ "TxOutMAC0_CGEN", 24, 1 },
		{ "TxSchLpbk3_CGEN", 23, 1 },
		{ "TxSchLpbk2_CGEN", 22, 1 },
		{ "TxSchLpbk1_CGEN", 21, 1 },
		{ "TxSchLpbk0_CGEN", 20, 1 },
		{ "TxSchMAC3_CGEN", 19, 1 },
		{ "TxSchMAC2_CGEN", 18, 1 },
		{ "TxSchMAC1_CGEN", 17, 1 },
		{ "TxSchMAC0_CGEN", 16, 1 },
		{ "TxInCh4_CGEN", 15, 1 },
		{ "TxInCh3_CGEN", 14, 1 },
		{ "TxInCh2_CGEN", 13, 1 },
		{ "TxInCh1_CGEN", 12, 1 },
		{ "TxInCh0_CGEN", 11, 1 },
	{ "MPS_TX_CGEN_DYNAMIC", 0x9470, 0 },
		{ "TxOutLpbk3_CGEN", 31, 1 },
		{ "TxOutLpbk2_CGEN", 30, 1 },
		{ "TxOutLpbk1_CGEN", 29, 1 },
		{ "TxOutLpbk0_CGEN", 28, 1 },
		{ "TxOutMAC3_CGEN", 27, 1 },
		{ "TxOutMAC2_CGEN", 26, 1 },
		{ "TxOutMAC1_CGEN", 25, 1 },
		{ "TxOutMAC0_CGEN", 24, 1 },
		{ "TxSchLpbk3_CGEN", 23, 1 },
		{ "TxSchLpbk2_CGEN", 22, 1 },
		{ "TxSchLpbk1_CGEN", 21, 1 },
		{ "TxSchLpbk0_CGEN", 20, 1 },
		{ "TxSchMAC3_CGEN", 19, 1 },
		{ "TxSchMAC2_CGEN", 18, 1 },
		{ "TxSchMAC1_CGEN", 17, 1 },
		{ "TxSchMAC0_CGEN", 16, 1 },
		{ "TxInCh4_CGEN", 15, 1 },
		{ "TxInCh3_CGEN", 14, 1 },
		{ "TxInCh2_CGEN", 13, 1 },
		{ "TxInCh1_CGEN", 12, 1 },
		{ "TxInCh0_CGEN", 11, 1 },
	{ "MPS_TX2RX_CH_MAP", 0x9474, 0 },
		{ "EnableLbk_Ch3", 3, 1 },
		{ "EnableLbk_Ch2", 2, 1 },
		{ "EnableLbk_Ch1", 1, 1 },
		{ "EnableLbk_Ch0", 0, 1 },
	{ "MPS_TX_DBG_CNT_CTL", 0x9478, 0 },
	{ "MPS_TX_DBG_CNT", 0x947c, 0 },
	{ "MPS_TX_INT2_ENABLE", 0x9498, 0 },
	{ "MPS_TX_INT2_CAUSE", 0x949c, 0 },
	{ "MPS_TX_PERR2_ENABLE", 0x94a0, 0 },
	{ "MPS_TX_INT3_ENABLE", 0x94a4, 0 },
	{ "MPS_TX_INT3_CAUSE", 0x94a8, 0 },
	{ "MPS_TX_PERR3_ENABLE", 0x94ac, 0 },
	{ "MPS_TX_INT4_ENABLE", 0x94b0, 0 },
	{ "MPS_TX_INT4_CAUSE", 0x94b4, 0 },
	{ "MPS_TX_PERR4_ENABLE", 0x94b8, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1e2e0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1e2e4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1e6e0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1e6e4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1eae0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1eae4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1eee0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1eee4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1f2e0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1f2e4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1f6e0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1f6e4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1fae0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1fae4, 0 },
	{ "MPS_PF_TX_QINQ_VLAN", 0x1fee0, 0 },
		{ "ProtocolID", 16, 16 },
		{ "Priority", 13, 3 },
		{ "CFI", 12, 1 },
		{ "Tag", 0, 12 },
	{ "MPS_PF_TX_MAC_DROP_PP", 0x1fee4, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH0", 0x30190, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH1", 0x30194, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH2", 0x30198, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3019c, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH4", 0x301a0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x301a8, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x301ac, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x301b0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x301b4, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x301b8, 0 },
	{ "MPS_PORT_TX_FIFO_CTL", 0x301c4, 0 },
		{ "OUT_TH", 22, 8 },
		{ "IN_TH", 14, 8 },
		{ "FifoTh", 5, 9 },
		{ "FifoEn", 4, 1 },
		{ "MaxPktCnt", 0, 4 },
	{ "MPS_PORT_FPGA_PAUSE_CTL", 0x301c8, 0 },
	{ "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x301d0, 0 },
		{ "off_pending", 8, 8 },
		{ "on_pending", 0, 8 },
	{ "MPS_PORT_TX_MAC_DROP_PP", 0x301d4, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_PP", 0x301d8, 0 },
	{ "MPS_PORT_TX_MAC_DROP_CNT", 0x301dc, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_CNT", 0x301e0, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH0", 0x32190, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH1", 0x32194, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH2", 0x32198, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3219c, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH4", 0x321a0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x321a8, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x321ac, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x321b0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x321b4, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x321b8, 0 },
	{ "MPS_PORT_TX_FIFO_CTL", 0x321c4, 0 },
		{ "OUT_TH", 22, 8 },
		{ "IN_TH", 14, 8 },
		{ "FifoTh", 5, 9 },
		{ "FifoEn", 4, 1 },
		{ "MaxPktCnt", 0, 4 },
	{ "MPS_PORT_FPGA_PAUSE_CTL", 0x321c8, 0 },
	{ "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x321d0, 0 },
		{ "off_pending", 8, 8 },
		{ "on_pending", 0, 8 },
	{ "MPS_PORT_TX_MAC_DROP_PP", 0x321d4, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_PP", 0x321d8, 0 },
	{ "MPS_PORT_TX_MAC_DROP_CNT", 0x321dc, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_CNT", 0x321e0, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH0", 0x34190, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH1", 0x34194, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH2", 0x34198, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3419c, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH4", 0x341a0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x341a8, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x341ac, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x341b0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x341b4, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x341b8, 0 },
	{ "MPS_PORT_TX_FIFO_CTL", 0x341c4, 0 },
		{ "OUT_TH", 22, 8 },
		{ "IN_TH", 14, 8 },
		{ "FifoTh", 5, 9 },
		{ "FifoEn", 4, 1 },
		{ "MaxPktCnt", 0, 4 },
	{ "MPS_PORT_FPGA_PAUSE_CTL", 0x341c8, 0 },
	{ "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x341d0, 0 },
		{ "off_pending", 8, 8 },
		{ "on_pending", 0, 8 },
	{ "MPS_PORT_TX_MAC_DROP_PP", 0x341d4, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_PP", 0x341d8, 0 },
	{ "MPS_PORT_TX_MAC_DROP_CNT", 0x341dc, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_CNT", 0x341e0, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH0", 0x36190, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH1", 0x36194, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH2", 0x36198, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3619c, 0 },
	{ "MPS_PORT_TX_MAC_RELOAD_CH4", 0x361a0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x361a8, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x361ac, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x361b0, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x361b4, 0 },
	{ "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x361b8, 0 },
	{ "MPS_PORT_TX_FIFO_CTL", 0x361c4, 0 },
		{ "OUT_TH", 22, 8 },
		{ "IN_TH", 14, 8 },
		{ "FifoTh", 5, 9 },
		{ "FifoEn", 4, 1 },
		{ "MaxPktCnt", 0, 4 },
	{ "MPS_PORT_FPGA_PAUSE_CTL", 0x361c8, 0 },
	{ "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x361d0, 0 },
		{ "off_pending", 8, 8 },
		{ "on_pending", 0, 8 },
	{ "MPS_PORT_TX_MAC_DROP_PP", 0x361d4, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_PP", 0x361d8, 0 },
	{ "MPS_PORT_TX_MAC_DROP_CNT", 0x361dc, 0 },
	{ "MPS_PORT_TX_LPBK_DROP_CNT", 0x361e0, 0 },
	{ "MPS_TRC_CFG", 0x9800, 0 },
		{ "TrcMultiRSSFilter", 5, 1 },
		{ "TrcFifoEmpty", 4, 1 },
		{ "TrcIgnoreDropInput", 3, 1 },
		{ "TrcKeepDuplicates", 2, 1 },
		{ "TrcEn", 1, 1 },
		{ "TrcMultiFilter", 0, 1 },
	{ "MPS_TRC_FILTER0_RSS_HASH", 0xa3f0, 0 },
	{ "MPS_TRC_FILTER0_RSS_CONTROL", 0xa3f4, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER1_RSS_HASH", 0xa3f8, 0 },
	{ "MPS_TRC_FILTER1_RSS_CONTROL", 0xa3fc, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER2_RSS_HASH", 0xa400, 0 },
	{ "MPS_TRC_FILTER2_RSS_CONTROL", 0xa404, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER3_RSS_HASH", 0xa408, 0 },
	{ "MPS_TRC_FILTER3_RSS_CONTROL", 0xa40c, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER4_RSS_HASH", 0xa410, 0 },
	{ "MPS_TRC_FILTER4_RSS_CONTROL", 0xa414, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER5_RSS_HASH", 0xa418, 0 },
	{ "MPS_TRC_FILTER5_RSS_CONTROL", 0xa41c, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER6_RSS_HASH", 0xa420, 0 },
	{ "MPS_TRC_FILTER6_RSS_CONTROL", 0xa424, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_FILTER7_RSS_HASH", 0xa428, 0 },
	{ "MPS_TRC_FILTER7_RSS_CONTROL", 0xa42c, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_RSS_HASH", 0xa430, 0 },
	{ "MPS_TRC_RSS_CONTROL", 0xa434, 0 },
		{ "RssControl", 16, 8 },
		{ "QueueNumber", 0, 16 },
	{ "MPS_TRC_VF_OFF_FILTER_0", 0xa438, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_1", 0xa43c, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_2", 0xa440, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_3", 0xa444, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_4", 0xa448, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_5", 0xa44c, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_6", 0xa450, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_VF_OFF_FILTER_7", 0xa454, 0 },
		{ "TrcMPS2TP_MacOnly", 22, 1 },
		{ "TrcAllMPS2TP", 21, 1 },
		{ "TrcAllTP2MPS", 20, 1 },
		{ "TrcAllVf", 19, 1 },
		{ "OffEn", 18, 1 },
		{ "VfFiltEn", 17, 1 },
		{ "VfFiltMask", 9, 8 },
		{ "VfFiltValid", 8, 1 },
		{ "VfFiltData", 0, 8 },
	{ "MPS_TRC_CGEN", 0xa458, 0 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa460, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa464, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa468, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa46c, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa470, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa474, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa478, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0xa47c, 0 },
		{ "TfInsertActLen", 27, 1 },
		{ "TfInsertTimer", 26, 1 },
		{ "TfInvertMatch", 25, 1 },
		{ "TfPktTooLarge", 24, 1 },
		{ "TfEn", 23, 1 },
		{ "TfPort", 18, 5 },
		{ "TfDrop", 17, 1 },
		{ "TfSopEopErr", 16, 1 },
		{ "TfLength", 8, 5 },
		{ "TfOffset", 0, 5 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa480, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa484, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa488, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa48c, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa490, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa494, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa498, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0xa49c, 0 },
		{ "TfMinPktSize", 16, 9 },
		{ "TfCaptureMax", 0, 14 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4a0, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4a4, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4a8, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4ac, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4b0, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4b4, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4b8, 0 },
	{ "MPS_TRC_FILTER_RUNT_CTL", 0xa4bc, 0 },
	{ "MPS_TRC_FILTER_DROP", 0xa4c0, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4c4, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4c8, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4cc, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4d0, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4d4, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4d8, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_FILTER_DROP", 0xa4dc, 0 },
		{ "TfDropInpCount", 16, 16 },
		{ "TfDropBufferCount", 0, 16 },
	{ "MPS_TRC_PERR_INJECT", 0x9804, 0 },
		{ "MemSel", 1, 4 },
		{ "InjectDataErr", 0, 1 },
	{ "MPS_TRC_PERR_ENABLE", 0x9854, 0 },
		{ "MiscPerr", 16, 1 },
		{ "PktFifo", 8, 8 },
		{ "FiltMem", 0, 8 },
	{ "MPS_TRC_INT_ENABLE", 0xa4e0, 0 },
		{ "PLErrEnb", 17, 1 },
		{ "MiscPerr", 16, 1 },
		{ "PktFifo", 8, 8 },
		{ "FiltMem", 0, 8 },
	{ "MPS_TRC_INT_CAUSE", 0xa4e4, 0 },
		{ "PLErrEnb", 17, 1 },
		{ "MiscPerr", 16, 1 },
		{ "PktFifo", 8, 8 },
		{ "FiltMem", 0, 8 },
	{ "MPS_TRC_PERR_ENABLE2", 0xa4f0, 0 },
		{ "trc_tf_ecc", 24, 8 },
		{ "mps2mac_conv_trc_cerr", 22, 2 },
		{ "mps2mac_conv_trc", 18, 4 },
		{ "TF0_perr_1", 17, 1 },
		{ "TF1_perr_1", 16, 1 },
		{ "TF2_perr_1", 15, 1 },
		{ "TF3_perr_1", 14, 1 },
		{ "TF4_perr_1", 13, 1 },
		{ "TF0_perr_0", 12, 1 },
		{ "TF1_perr_0", 11, 1 },
		{ "TF2_perr_0", 10, 1 },
		{ "TF3_perr_0", 9, 1 },
		{ "TF4_perr_0", 8, 1 },
		{ "Perr_tf_in_ctl", 0, 8 },
	{ "MPS_TRC_INT_ENABLE2", 0xa4f4, 0 },
		{ "trc_tf_ecc", 24, 8 },
		{ "mps2mac_conv_trc_cerr", 22, 2 },
		{ "mps2mac_conv_trc", 18, 4 },
		{ "TF0_perr_1", 17, 1 },
		{ "TF1_perr_1", 16, 1 },
		{ "TF2_perr_1", 15, 1 },
		{ "TF3_perr_1", 14, 1 },
		{ "TF4_perr_1", 13, 1 },
		{ "TF0_perr_0", 12, 1 },
		{ "TF1_perr_0", 11, 1 },
		{ "TF2_perr_0", 10, 1 },
		{ "TF3_perr_0", 9, 1 },
		{ "TF4_perr_0", 8, 1 },
		{ "Perr_tf_in_ctl", 0, 8 },
	{ "MPS_TRC_INT_CAUSE2", 0xa4f8, 0 },
		{ "trc_tf_ecc", 22, 8 },
		{ "mps2mac_conv_trc", 18, 4 },
		{ "TF0_perr_1", 17, 1 },
		{ "TF1_perr_1", 16, 1 },
		{ "TF2_perr_1", 15, 1 },
		{ "TF3_perr_1", 14, 1 },
		{ "TF4_perr_1", 13, 1 },
		{ "TF0_perr_0", 12, 1 },
		{ "TF1_perr_0", 11, 1 },
		{ "TF2_perr_0", 10, 1 },
		{ "TF3_perr_0", 9, 1 },
		{ "TF4_perr_0", 8, 1 },
		{ "Perr_tf_in_ctl", 0, 8 },
	{ "MPS_TRC_TIMESTAMP_L", 0xa4e8, 0 },
	{ "MPS_TRC_TIMESTAMP_H", 0xa4ec, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c00, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c04, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c08, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c0c, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c10, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c14, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c18, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c1c, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c20, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c24, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c28, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c2c, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c30, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c34, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c38, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c3c, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c40, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c44, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c48, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c4c, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c50, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c54, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c58, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c5c, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c60, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c64, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c68, 0 },
	{ "MPS_TRC_FILTER0_MATCH", 0x9c6c, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c80, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c84, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c88, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c8c, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c90, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c94, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c98, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c9c, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ca0, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ca4, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ca8, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cac, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cb0, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cb4, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cb8, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cbc, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cc0, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cc4, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cc8, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ccc, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cd0, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cd4, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cd8, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cdc, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ce0, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ce4, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ce8, 0 },
	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cec, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d00, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d04, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d08, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d0c, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d10, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d14, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d18, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d1c, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d20, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d24, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d28, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d2c, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d30, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d34, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d38, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d3c, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d40, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d44, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d48, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d4c, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d50, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d54, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d58, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d5c, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d60, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d64, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d68, 0 },
	{ "MPS_TRC_FILTER1_MATCH", 0x9d6c, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d80, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d84, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d88, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d8c, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d90, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d94, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d98, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d9c, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9da0, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9da4, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9da8, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dac, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9db0, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9db4, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9db8, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dbc, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dc0, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dc4, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dc8, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dcc, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dd0, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dd4, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dd8, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9ddc, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9de0, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9de4, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9de8, 0 },
	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dec, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e00, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e04, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e08, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e0c, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e10, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e14, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e18, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e1c, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e20, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e24, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e28, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e2c, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e30, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e34, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e38, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e3c, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e40, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e44, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e48, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e4c, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e50, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e54, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e58, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e5c, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e60, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e64, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e68, 0 },
	{ "MPS_TRC_FILTER2_MATCH", 0x9e6c, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e80, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e84, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e88, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e8c, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e90, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e94, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e98, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e9c, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ea0, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ea4, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ea8, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eac, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eb0, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eb4, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eb8, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ebc, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ec0, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ec4, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ec8, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ecc, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ed0, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ed4, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ed8, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9edc, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ee0, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ee4, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ee8, 0 },
	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eec, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f00, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f04, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f08, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f0c, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f10, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f14, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f18, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f1c, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f20, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f24, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f28, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f2c, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f30, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f34, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f38, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f3c, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f40, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f44, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f48, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f4c, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f50, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f54, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f58, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f5c, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f60, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f64, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f68, 0 },
	{ "MPS_TRC_FILTER3_MATCH", 0x9f6c, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f80, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f84, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f88, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f8c, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f90, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f94, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f98, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f9c, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fa0, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fa4, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fa8, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fac, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fb0, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fb4, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fb8, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fbc, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fc0, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fc4, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fc8, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fcc, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fd0, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fd4, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fd8, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fdc, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fe0, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fe4, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fe8, 0 },
	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fec, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa000, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa004, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa008, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa00c, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa010, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa014, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa018, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa01c, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa020, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa024, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa028, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa02c, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa030, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa034, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa038, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa03c, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa040, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa044, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa048, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa04c, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa050, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa054, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa058, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa05c, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa060, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa064, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa068, 0 },
	{ "MPS_TRC_FILTER4_MATCH", 0xa06c, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa080, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa084, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa088, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa08c, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa090, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa094, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa098, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa09c, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0a0, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0a4, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0a8, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0ac, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0b0, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0b4, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0b8, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0bc, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0c0, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0c4, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0c8, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0cc, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0d0, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0d4, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0d8, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0dc, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0e0, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0e4, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0e8, 0 },
	{ "MPS_TRC_FILTER4_DONT_CARE", 0xa0ec, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa100, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa104, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa108, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa10c, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa110, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa114, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa118, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa11c, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa120, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa124, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa128, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa12c, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa130, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa134, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa138, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa13c, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa140, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa144, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa148, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa14c, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa150, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa154, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa158, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa15c, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa160, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa164, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa168, 0 },
	{ "MPS_TRC_FILTER5_MATCH", 0xa16c, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa180, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa184, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa188, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa18c, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa190, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa194, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa198, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa19c, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1a0, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1a4, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1a8, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1ac, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1b0, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1b4, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1b8, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1bc, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1c0, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1c4, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1c8, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1cc, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1d0, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1d4, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1d8, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1dc, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1e0, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1e4, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1e8, 0 },
	{ "MPS_TRC_FILTER5_DONT_CARE", 0xa1ec, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa200, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa204, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa208, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa20c, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa210, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa214, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa218, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa21c, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa220, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa224, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa228, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa22c, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa230, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa234, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa238, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa23c, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa240, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa244, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa248, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa24c, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa250, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa254, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa258, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa25c, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa260, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa264, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa268, 0 },
	{ "MPS_TRC_FILTER6_MATCH", 0xa26c, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa280, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa284, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa288, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa28c, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa290, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa294, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa298, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa29c, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2a0, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2a4, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2a8, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2ac, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2b0, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2b4, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2b8, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2bc, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2c0, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2c4, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2c8, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2cc, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2d0, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2d4, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2d8, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2dc, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2e0, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2e4, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2e8, 0 },
	{ "MPS_TRC_FILTER6_DONT_CARE", 0xa2ec, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa300, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa304, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa308, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa30c, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa310, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa314, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa318, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa31c, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa320, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa324, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa328, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa32c, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa330, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa334, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa338, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa33c, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa340, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa344, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa348, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa34c, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa350, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa354, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa358, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa35c, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa360, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa364, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa368, 0 },
	{ "MPS_TRC_FILTER7_MATCH", 0xa36c, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa380, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa384, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa388, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa38c, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa390, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa394, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa398, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa39c, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3a0, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3a4, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3a8, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3ac, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3b0, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3b4, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3b8, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3bc, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3c0, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3c4, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3c8, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3cc, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3d0, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3d4, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3d8, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3dc, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3e0, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3e4, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3e8, 0 },
	{ "MPS_TRC_FILTER7_DONT_CARE", 0xa3ec, 0 },
	{ "MPS_STAT_CTL", 0x9600, 0 },
		{ "StatStopCtrl", 10, 1 },
		{ "StopStat", 9, 1 },
		{ "StatWriteCtrl", 8, 1 },
		{ "CountLbPF", 7, 1 },
		{ "CountLbVF", 6, 1 },
		{ "CountPauseMCRx", 5, 1 },
		{ "CountPauseStatRx", 4, 1 },
		{ "CountPauseMCTx", 3, 1 },
		{ "CountPauseStatTx", 2, 1 },
		{ "CountVFinPF", 1, 1 },
		{ "LpbkErrStat", 0, 1 },
	{ "MPS_STAT_INT_ENABLE", 0x9608, 0 },
	{ "MPS_STAT_INT_CAUSE", 0x960c, 0 },
	{ "MPS_STAT_PERR_INT_ENABLE_SRAM", 0x9610, 0 },
		{ "Rxbg", 27, 2 },
		{ "Rxpf", 22, 5 },
		{ "Txpf", 18, 4 },
		{ "Rxport", 11, 7 },
		{ "Lbport", 6, 5 },
		{ "Txport", 0, 6 },
	{ "MPS_STAT_PERR_INT_CAUSE_SRAM", 0x9614, 0 },
		{ "Rxbg", 27, 2 },
		{ "Rxpf", 22, 5 },
		{ "Txpf", 18, 4 },
		{ "Rxport", 11, 7 },
		{ "Lbport", 6, 5 },
		{ "Txport", 0, 6 },
	{ "MPS_STAT_PERR_ENABLE_SRAM", 0x9618, 0 },
		{ "Rxbg", 27, 2 },
		{ "Rxpf", 22, 5 },
		{ "Txpf", 18, 4 },
		{ "Rxport", 11, 7 },
		{ "Lbport", 6, 5 },
		{ "Txport", 0, 6 },
	{ "MPS_STAT_PERR_INT_ENABLE_TX_FIFO", 0x961c, 0 },
		{ "TxCh", 20, 4 },
		{ "Tx", 12, 8 },
		{ "Pause", 8, 4 },
		{ "Drop", 0, 8 },
	{ "MPS_STAT_PERR_INT_CAUSE_TX_FIFO", 0x9620, 0 },
		{ "TxCh", 20, 4 },
		{ "Tx", 12, 8 },
		{ "Pause", 8, 4 },
		{ "Drop", 0, 8 },
	{ "MPS_STAT_PERR_ENABLE_TX_FIFO", 0x9624, 0 },
		{ "TxCh", 20, 4 },
		{ "Tx", 12, 8 },
		{ "Pause", 8, 4 },
		{ "Drop", 0, 8 },
	{ "MPS_STAT_PERR_INT_ENABLE_RX_FIFO", 0x9628, 0 },
		{ "Pause", 20, 4 },
		{ "Lpbk", 16, 4 },
		{ "Nq", 8, 8 },
		{ "PV", 4, 4 },
		{ "Mac", 0, 4 },
	{ "MPS_STAT_PERR_INT_CAUSE_RX_FIFO", 0x962c, 0 },
		{ "Pause", 20, 4 },
		{ "Lpbk", 16, 4 },
		{ "Nq", 8, 8 },
		{ "PV", 4, 4 },
		{ "Mac", 0, 4 },
	{ "MPS_STAT_PERR_ENABLE_RX_FIFO", 0x9630, 0 },
		{ "Pause", 20, 4 },
		{ "Lpbk", 16, 4 },
		{ "Nq", 8, 8 },
		{ "PV", 4, 4 },
		{ "Mac", 0, 4 },
	{ "MPS_STAT_PERR_INJECT", 0x9634, 0 },
		{ "MemSel", 1, 7 },
		{ "InjectDataErr", 0, 1 },
	{ "MPS_STAT_DEBUG_SUB_SEL", 0x9638, 0 },
		{ "SubPrtH", 5, 5 },
		{ "SubPrtL", 0, 5 },
	{ "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L", 0x9640, 0 },
	{ "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_H", 0x9644, 0 },
	{ "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_L", 0x9648, 0 },
	{ "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_H", 0x964c, 0 },
	{ "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_L", 0x9650, 0 },
	{ "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_H", 0x9654, 0 },
	{ "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_L", 0x9658, 0 },
	{ "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_H", 0x965c, 0 },
	{ "MPS_STAT_RX_BG_0_LB_DROP_FRAME_L", 0x9660, 0 },
	{ "MPS_STAT_RX_BG_0_LB_DROP_FRAME_H", 0x9664, 0 },
	{ "MPS_STAT_RX_BG_1_LB_DROP_FRAME_L", 0x9668, 0 },
	{ "MPS_STAT_RX_BG_1_LB_DROP_FRAME_H", 0x966c, 0 },
	{ "MPS_STAT_RX_BG_2_LB_DROP_FRAME_L", 0x9670, 0 },
	{ "MPS_STAT_RX_BG_2_LB_DROP_FRAME_H", 0x9674, 0 },
	{ "MPS_STAT_RX_BG_3_LB_DROP_FRAME_L", 0x9678, 0 },
	{ "MPS_STAT_RX_BG_3_LB_DROP_FRAME_H", 0x967c, 0 },
	{ "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L", 0x9680, 0 },
	{ "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_H", 0x9684, 0 },
	{ "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_L", 0x9688, 0 },
	{ "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_H", 0x968c, 0 },
	{ "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_L", 0x9690, 0 },
	{ "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_H", 0x9694, 0 },
	{ "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_L", 0x9698, 0 },
	{ "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_H", 0x969c, 0 },
	{ "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_L", 0x96a0, 0 },
	{ "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_H", 0x96a4, 0 },
	{ "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_L", 0x96a8, 0 },
	{ "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_H", 0x96ac, 0 },
	{ "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_L", 0x96b0, 0 },
	{ "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_H", 0x96b4, 0 },
	{ "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_L", 0x96b8, 0 },
	{ "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_H", 0x96bc, 0 },
	{ "MPS_STAT_PERR_INT_ENABLE_SRAM1", 0x96c0, 0 },
		{ "Rxvf", 5, 3 },
		{ "Txvf", 0, 5 },
	{ "MPS_STAT_PERR_INT_CAUSE_SRAM1", 0x96c4, 0 },
		{ "Rxvf", 5, 3 },
		{ "Txvf", 0, 5 },
	{ "MPS_STAT_PERR_ENABLE_SRAM1", 0x96c8, 0 },
		{ "Rxvf", 5, 3 },
		{ "Txvf", 0, 5 },
	{ "MPS_STAT_STOP_UPD_BG", 0x96cc, 0 },
	{ "MPS_STAT_STOP_UPD_PORT", 0x96d0, 0 },
		{ "PtLpbk", 8, 4 },
		{ "PtTx", 4, 4 },
		{ "PtRx", 0, 4 },
	{ "MPS_STAT_STOP_UPD_PF", 0x96d4, 0 },
		{ "PFTx", 8, 8 },
		{ "PFRx", 0, 8 },
	{ "MPS_STAT_STOP_UPD_TX_VF_0_31", 0x96d8, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_32_63", 0x96dc, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_64_95", 0x96e0, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_96_127", 0x96e4, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_128_159", 0x9710, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_160_191", 0x9714, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_192_223", 0x9718, 0 },
	{ "MPS_STAT_STOP_UPD_TX_VF_224_255", 0x971c, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_0_31", 0x96e8, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_32_63", 0x96ec, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_64_95", 0x96f0, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_96_127", 0x96f4, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_128_159", 0x96f8, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_160_191", 0x96fc, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_192_223", 0x9700, 0 },
	{ "MPS_STAT_STOP_UPD_RX_VF_224_255", 0x9704, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x30400, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x30404, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x30408, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3040c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x30410, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x30414, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x30418, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3041c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x30420, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x30424, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x30428, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3042c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_L", 0x30430, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_H", 0x30434, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x30438, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3043c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x30440, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x30444, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x30448, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3044c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x30450, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x30454, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x30458, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3045c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x30460, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x30464, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_L", 0x30468, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3046c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x30470, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x30474, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x30478, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3047c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x30480, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x30484, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x30488, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3048c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x30490, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x30494, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x30498, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3049c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x304a0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x304a4, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x304a8, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x304ac, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x304b0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x304b4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x304c0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x304c4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x304c8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x304cc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x304d0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x304d4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x304d8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x304dc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x304e0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x304e4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x304e8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x304ec, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_L", 0x304f0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_H", 0x304f4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x304f8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x304fc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x30500, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x30504, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x30508, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3050c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x30510, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x30514, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x30518, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3051c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x30520, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x30524, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x30528, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3052c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x30540, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x30544, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x30548, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3054c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x30550, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x30554, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x30558, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3055c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x30560, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x30564, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x30568, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3056c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x30570, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x30574, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x30578, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3057c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x30580, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x30584, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x30588, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3058c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_L", 0x30590, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_H", 0x30594, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x30598, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3059c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x305a0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x305a4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x305a8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x305ac, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x305b0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x305b4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x305b8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x305bc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x305c0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x305c4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x305c8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x305cc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x305d0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x305d4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x305d8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x305dc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x305e0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x305e4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x305e8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x305ec, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x305f0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x305f4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x305f8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x305fc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x30600, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x30604, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x30608, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3060c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x30610, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x30614, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x30618, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3061c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x30620, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x30624, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x30628, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3062c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x30630, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x30634, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x30638, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3063c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x30640, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x30644, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x30648, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3064c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x30650, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x30654, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x30658, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3065c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x32400, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x32404, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x32408, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3240c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x32410, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x32414, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x32418, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3241c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x32420, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x32424, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x32428, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3242c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_L", 0x32430, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_H", 0x32434, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x32438, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3243c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x32440, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x32444, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x32448, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3244c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x32450, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x32454, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x32458, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3245c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x32460, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x32464, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_L", 0x32468, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3246c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x32470, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x32474, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x32478, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3247c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x32480, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x32484, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x32488, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3248c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x32490, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x32494, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x32498, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3249c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x324a0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x324a4, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x324a8, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x324ac, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x324b0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x324b4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x324c0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x324c4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x324c8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x324cc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x324d0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x324d4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x324d8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x324dc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x324e0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x324e4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x324e8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x324ec, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_L", 0x324f0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_H", 0x324f4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x324f8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x324fc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x32500, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x32504, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x32508, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3250c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x32510, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x32514, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x32518, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3251c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x32520, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x32524, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x32528, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3252c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x32540, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x32544, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x32548, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3254c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x32550, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x32554, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x32558, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3255c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x32560, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x32564, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x32568, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3256c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x32570, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x32574, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x32578, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3257c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x32580, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x32584, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x32588, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3258c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_L", 0x32590, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_H", 0x32594, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x32598, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3259c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x325a0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x325a4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x325a8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x325ac, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x325b0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x325b4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x325b8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x325bc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x325c0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x325c4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x325c8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x325cc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x325d0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x325d4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x325d8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x325dc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x325e0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x325e4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x325e8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x325ec, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x325f0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x325f4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x325f8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x325fc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x32600, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x32604, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x32608, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3260c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x32610, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x32614, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x32618, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3261c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x32620, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x32624, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x32628, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3262c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x32630, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x32634, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x32638, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3263c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x32640, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x32644, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x32648, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3264c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x32650, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x32654, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x32658, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3265c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x34400, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x34404, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x34408, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3440c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x34410, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x34414, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x34418, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3441c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x34420, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x34424, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x34428, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3442c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_L", 0x34430, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_H", 0x34434, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x34438, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3443c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x34440, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x34444, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x34448, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3444c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x34450, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x34454, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x34458, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3445c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x34460, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x34464, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_L", 0x34468, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3446c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x34470, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x34474, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x34478, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3447c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x34480, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x34484, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x34488, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3448c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x34490, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x34494, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x34498, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3449c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x344a0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x344a4, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x344a8, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x344ac, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x344b0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x344b4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x344c0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x344c4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x344c8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x344cc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x344d0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x344d4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x344d8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x344dc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x344e0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x344e4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x344e8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x344ec, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_L", 0x344f0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_H", 0x344f4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x344f8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x344fc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x34500, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x34504, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x34508, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3450c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x34510, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x34514, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x34518, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3451c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x34520, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x34524, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x34528, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3452c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x34540, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x34544, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x34548, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3454c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x34550, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x34554, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x34558, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3455c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x34560, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x34564, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x34568, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3456c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x34570, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x34574, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x34578, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3457c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x34580, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x34584, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x34588, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3458c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_L", 0x34590, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_H", 0x34594, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x34598, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3459c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x345a0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x345a4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x345a8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x345ac, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x345b0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x345b4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x345b8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x345bc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x345c0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x345c4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x345c8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x345cc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x345d0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x345d4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x345d8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x345dc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x345e0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x345e4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x345e8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x345ec, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x345f0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x345f4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x345f8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x345fc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x34600, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x34604, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x34608, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3460c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x34610, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x34614, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x34618, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3461c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x34620, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x34624, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x34628, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3462c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x34630, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x34634, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x34638, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3463c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x34640, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x34644, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x34648, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3464c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x34650, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x34654, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x34658, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3465c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x36400, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x36404, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x36408, 0 },
	{ "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3640c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x36410, 0 },
	{ "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x36414, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x36418, 0 },
	{ "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3641c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x36420, 0 },
	{ "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x36424, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x36428, 0 },
	{ "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3642c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_L", 0x36430, 0 },
	{ "MPS_PORT_STAT_TX_PORT_64B_H", 0x36434, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x36438, 0 },
	{ "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3643c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x36440, 0 },
	{ "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x36444, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x36448, 0 },
	{ "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3644c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x36450, 0 },
	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x36454, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x36458, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3645c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x36460, 0 },
	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x36464, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_L", 0x36468, 0 },
	{ "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3646c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x36470, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x36474, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x36478, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3647c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x36480, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x36484, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x36488, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3648c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x36490, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x36494, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x36498, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3649c, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x364a0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x364a4, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x364a8, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x364ac, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x364b0, 0 },
	{ "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x364b4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x364c0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x364c4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x364c8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x364cc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x364d0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x364d4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x364d8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x364dc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x364e0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x364e4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x364e8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x364ec, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_L", 0x364f0, 0 },
	{ "MPS_PORT_STAT_LB_PORT_64B_H", 0x364f4, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x364f8, 0 },
	{ "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x364fc, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x36500, 0 },
	{ "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x36504, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x36508, 0 },
	{ "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3650c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x36510, 0 },
	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x36514, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x36518, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3651c, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x36520, 0 },
	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x36524, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x36528, 0 },
	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3652c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x36540, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x36544, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x36548, 0 },
	{ "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3654c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x36550, 0 },
	{ "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x36554, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x36558, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3655c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x36560, 0 },
	{ "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x36564, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x36568, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3656c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x36570, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x36574, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x36578, 0 },
	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3657c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x36580, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x36584, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x36588, 0 },
	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3658c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_L", 0x36590, 0 },
	{ "MPS_PORT_STAT_RX_PORT_64B_H", 0x36594, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x36598, 0 },
	{ "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3659c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x365a0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x365a4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x365a8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x365ac, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x365b0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x365b4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x365b8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x365bc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x365c0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x365c4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x365c8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x365cc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x365d0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x365d4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x365d8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x365dc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x365e0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x365e4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x365e8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x365ec, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x365f0, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x365f4, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x365f8, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x365fc, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x36600, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x36604, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x36608, 0 },
	{ "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3660c, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x36610, 0 },
	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x36614, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x36618, 0 },
	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3661c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_L", 0x36620, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_0_DROP_FRAME_H", 0x36624, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_L", 0x36628, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_1_DROP_FRAME_H", 0x3662c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_L", 0x36630, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_2_DROP_FRAME_H", 0x36634, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_L", 0x36638, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_3_DROP_FRAME_H", 0x3663c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_L", 0x36640, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_4_DROP_FRAME_H", 0x36644, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_L", 0x36648, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_5_DROP_FRAME_H", 0x3664c, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_L", 0x36650, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_6_DROP_FRAME_H", 0x36654, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_L", 0x36658, 0 },
	{ "MPS_PORT_STAT_RX_PRIO_7_DROP_FRAME_H", 0x3665c, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e300, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e304, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e308, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e30c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e310, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e314, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e318, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e31c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e320, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e324, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e328, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e32c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e330, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e334, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e338, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e33c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e340, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e344, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e348, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e34c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e350, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e354, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e358, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e35c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e360, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e364, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e368, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e36c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e370, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e374, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e378, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e37c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1e380, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1e384, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e700, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e704, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e708, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e70c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e710, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e714, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e718, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e71c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e720, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e724, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e728, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e72c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e730, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e734, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e738, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e73c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e740, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e744, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e748, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e74c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e750, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e754, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e758, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e75c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e760, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e764, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e768, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e76c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e770, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e774, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e778, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e77c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1e780, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1e784, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1eb00, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1eb04, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1eb08, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1eb0c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1eb10, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1eb14, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1eb18, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1eb1c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1eb20, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1eb24, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1eb28, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1eb2c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1eb30, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1eb34, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1eb38, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1eb3c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1eb40, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1eb44, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1eb48, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1eb4c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1eb50, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1eb54, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1eb58, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1eb5c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1eb60, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1eb64, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1eb68, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1eb6c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1eb70, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1eb74, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1eb78, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1eb7c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1eb80, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1eb84, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ef00, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ef04, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ef08, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ef0c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ef10, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ef14, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ef18, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ef1c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ef20, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ef24, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ef28, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ef2c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ef30, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ef34, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ef38, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ef3c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ef40, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ef44, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ef48, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ef4c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ef50, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ef54, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ef58, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ef5c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ef60, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ef64, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ef68, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ef6c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ef70, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ef74, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ef78, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ef7c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1ef80, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1ef84, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f300, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f304, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f308, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f30c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f310, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f314, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f318, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f31c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f320, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f324, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f328, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f32c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f330, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f334, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f338, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f33c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f340, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f344, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f348, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f34c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f350, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f354, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f358, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f35c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f360, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f364, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f368, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f36c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f370, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f374, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f378, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f37c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1f380, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1f384, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f700, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f704, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f708, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f70c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f710, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f714, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f718, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f71c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f720, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f724, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f728, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f72c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f730, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f734, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f738, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f73c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f740, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f744, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f748, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f74c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f750, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f754, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f758, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f75c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f760, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f764, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f768, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f76c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f770, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f774, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f778, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f77c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1f780, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1f784, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1fb00, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1fb04, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1fb08, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1fb0c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1fb10, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1fb14, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1fb18, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1fb1c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1fb20, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1fb24, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1fb28, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1fb2c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1fb30, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1fb34, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1fb38, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1fb3c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1fb40, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1fb44, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1fb48, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1fb4c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1fb50, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1fb54, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1fb58, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1fb5c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1fb60, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1fb64, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1fb68, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1fb6c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1fb70, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1fb74, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1fb78, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1fb7c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1fb80, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1fb84, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ff00, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ff04, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ff08, 0 },
	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ff0c, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ff10, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ff14, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ff18, 0 },
	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ff1c, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ff20, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ff24, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ff28, 0 },
	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ff2c, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ff30, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ff34, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ff38, 0 },
	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ff3c, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ff40, 0 },
	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ff44, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ff48, 0 },
	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ff4c, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ff50, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ff54, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ff58, 0 },
	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ff5c, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ff60, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ff64, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ff68, 0 },
	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ff6c, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ff70, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ff74, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ff78, 0 },
	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ff7c, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_L", 0x1ff80, 0 },
	{ "MPS_PF_STAT_RX_PF_ERR_DROP_FRAMES_H", 0x1ff84, 0 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30200, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30204, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30208, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3020c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30210, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30214, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30218, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3021c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30220, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30224, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30228, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3022c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30230, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30234, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30238, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3023c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30240, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30244, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30248, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3024c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30250, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30254, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30258, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3025c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30260, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30264, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30268, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3026c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30270, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30274, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30278, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3027c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30280, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30284, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30288, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3028c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30290, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30294, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30298, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3029c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302a0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302a4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302a8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302ac, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302b0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302b4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302b8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302bc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302c0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302c4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302c8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302cc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302d0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302d4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302d8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302dc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302e0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302e4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302e8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302ec, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302f0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302f4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302f8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x302fc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x30300, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32200, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32204, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32208, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3220c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32210, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32214, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32218, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3221c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32220, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32224, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32228, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3222c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32230, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32234, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32238, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3223c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32240, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32244, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32248, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3224c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32250, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32254, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32258, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3225c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32260, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32264, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32268, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3226c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32270, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32274, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32278, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3227c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32280, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32284, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32288, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3228c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32290, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32294, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32298, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3229c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322a0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322a4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322a8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322ac, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322b0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322b4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322b8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322bc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322c0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322c4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322c8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322cc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322d0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322d4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322d8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322dc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322e0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322e4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322e8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322ec, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322f0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322f4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322f8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x322fc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x32300, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34200, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34204, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34208, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3420c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34210, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34214, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34218, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3421c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34220, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34224, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34228, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3422c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34230, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34234, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34238, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3423c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34240, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34244, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34248, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3424c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34250, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34254, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34258, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3425c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34260, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34264, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34268, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3426c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34270, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34274, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34278, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3427c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34280, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34284, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34288, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3428c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34290, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34294, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34298, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3429c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342a0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342a4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342a8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342ac, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342b0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342b4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342b8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342bc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342c0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342c4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342c8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342cc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342d0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342d4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342d8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342dc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342e0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342e4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342e8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342ec, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342f0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342f4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342f8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x342fc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x34300, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36200, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36204, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36208, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3620c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36210, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36214, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36218, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3621c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36220, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36224, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36228, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3622c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36230, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36234, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36238, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3623c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36240, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36244, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36248, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3624c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36250, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36254, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36258, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3625c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36260, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36264, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36268, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3626c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36270, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36274, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36278, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3627c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36280, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36284, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36288, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3628c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36290, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36294, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36298, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x3629c, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362a0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362a4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362a8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362ac, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362b0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362b4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362b8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362bc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362c0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362c4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362c8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362cc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362d0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362d4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362d8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362dc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362e0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362e4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362e8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362ec, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362f0, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362f4, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362f8, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x362fc, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_SRAM", 0x36300, 0 },
		{ "DisEncapOuterRplct", 23, 1 },
		{ "DisEncap", 22, 1 },
		{ "Valid", 21, 1 },
		{ "PortMap", 17, 4 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_HASH_CTL", 0x30304, 0 },
		{ "UnicastEnable", 31, 1 },
	{ "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x30308, 0 },
		{ "Enable", 31, 1 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3030c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x30310, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x30324, 0 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x30328, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3032c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x30330, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x30334, 0 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x30338, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_VLAN0", 0x30314, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN1", 0x3033c, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN2", 0x30340, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN3", 0x30344, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_CTL", 0x30318, 0 },
		{ "SMAC_INDEX_EN", 17, 1 },
		{ "LPBK_TCAM2_HIT_PRIORITY", 16, 1 },
		{ "TCAM2_HIT_PRIORITY", 15, 1 },
		{ "LPBK_TCAM1_HIT_PRIORITY", 14, 1 },
		{ "LPBK_TCAM0_HIT_PRIORITY", 13, 1 },
		{ "LPBK_TCAM_PRIORITY", 12, 1 },
		{ "LPBK_SMAC_TCAM_SEL", 10, 2 },
		{ "LPBK_DMAC_TCAM_SEL", 8, 2 },
		{ "TCAM1_HIT_PRIORITY", 7, 1 },
		{ "TCAM0_HIT_PRIORITY", 6, 1 },
		{ "TCAM_PRIORITY", 5, 1 },
		{ "SMAC_TCAM_SEL", 3, 2 },
		{ "DMAC_TCAM_SEL", 1, 2 },
		{ "PF_VLAN_SEL", 0, 1 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3031c, 0 },
		{ "EthType1", 16, 16 },
		{ "EthType2", 0, 16 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x30320, 0 },
		{ "EN1", 1, 1 },
		{ "EN2", 0, 1 },
	{ "MPS_PORT_CLS_HASH_CTL", 0x32304, 0 },
		{ "UnicastEnable", 31, 1 },
	{ "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x32308, 0 },
		{ "Enable", 31, 1 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3230c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x32310, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x32324, 0 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x32328, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3232c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x32330, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x32334, 0 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x32338, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_VLAN0", 0x32314, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN1", 0x3233c, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN2", 0x32340, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN3", 0x32344, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_CTL", 0x32318, 0 },
		{ "SMAC_INDEX_EN", 17, 1 },
		{ "LPBK_TCAM2_HIT_PRIORITY", 16, 1 },
		{ "TCAM2_HIT_PRIORITY", 15, 1 },
		{ "LPBK_TCAM1_HIT_PRIORITY", 14, 1 },
		{ "LPBK_TCAM0_HIT_PRIORITY", 13, 1 },
		{ "LPBK_TCAM_PRIORITY", 12, 1 },
		{ "LPBK_SMAC_TCAM_SEL", 10, 2 },
		{ "LPBK_DMAC_TCAM_SEL", 8, 2 },
		{ "TCAM1_HIT_PRIORITY", 7, 1 },
		{ "TCAM0_HIT_PRIORITY", 6, 1 },
		{ "TCAM_PRIORITY", 5, 1 },
		{ "SMAC_TCAM_SEL", 3, 2 },
		{ "DMAC_TCAM_SEL", 1, 2 },
		{ "PF_VLAN_SEL", 0, 1 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3231c, 0 },
		{ "EthType1", 16, 16 },
		{ "EthType2", 0, 16 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x32320, 0 },
		{ "EN1", 1, 1 },
		{ "EN2", 0, 1 },
	{ "MPS_PORT_CLS_HASH_CTL", 0x34304, 0 },
		{ "UnicastEnable", 31, 1 },
	{ "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x34308, 0 },
		{ "Enable", 31, 1 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3430c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x34310, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x34324, 0 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x34328, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3432c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x34330, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x34334, 0 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x34338, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_VLAN0", 0x34314, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN1", 0x3433c, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN2", 0x34340, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN3", 0x34344, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_CTL", 0x34318, 0 },
		{ "SMAC_INDEX_EN", 17, 1 },
		{ "LPBK_TCAM2_HIT_PRIORITY", 16, 1 },
		{ "TCAM2_HIT_PRIORITY", 15, 1 },
		{ "LPBK_TCAM1_HIT_PRIORITY", 14, 1 },
		{ "LPBK_TCAM0_HIT_PRIORITY", 13, 1 },
		{ "LPBK_TCAM_PRIORITY", 12, 1 },
		{ "LPBK_SMAC_TCAM_SEL", 10, 2 },
		{ "LPBK_DMAC_TCAM_SEL", 8, 2 },
		{ "TCAM1_HIT_PRIORITY", 7, 1 },
		{ "TCAM0_HIT_PRIORITY", 6, 1 },
		{ "TCAM_PRIORITY", 5, 1 },
		{ "SMAC_TCAM_SEL", 3, 2 },
		{ "DMAC_TCAM_SEL", 1, 2 },
		{ "PF_VLAN_SEL", 0, 1 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3431c, 0 },
		{ "EthType1", 16, 16 },
		{ "EthType2", 0, 16 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x34320, 0 },
		{ "EN1", 1, 1 },
		{ "EN2", 0, 1 },
	{ "MPS_PORT_CLS_HASH_CTL", 0x36304, 0 },
		{ "UnicastEnable", 31, 1 },
	{ "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x36308, 0 },
		{ "Enable", 31, 1 },
		{ "MultiListen", 16, 1 },
		{ "Priority", 13, 3 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_L", 0x3630c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC0_ADDR_H", 0x36310, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_L", 0x36324, 0 },
	{ "MPS_PORT_CLS_BMC_MAC1_ADDR_H", 0x36328, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_L", 0x3632c, 0 },
	{ "MPS_PORT_CLS_BMC_MAC2_ADDR_H", 0x36330, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_L", 0x36334, 0 },
	{ "MPS_PORT_CLS_BMC_MAC3_ADDR_H", 0x36338, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_PORT_CLS_BMC_VLAN0", 0x36314, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN1", 0x3633c, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN2", 0x36340, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_BMC_VLAN3", 0x36344, 0 },
		{ "BMC_VLAN_SEL", 13, 1 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_PORT_CLS_CTL", 0x36318, 0 },
		{ "SMAC_INDEX_EN", 17, 1 },
		{ "LPBK_TCAM2_HIT_PRIORITY", 16, 1 },
		{ "TCAM2_HIT_PRIORITY", 15, 1 },
		{ "LPBK_TCAM1_HIT_PRIORITY", 14, 1 },
		{ "LPBK_TCAM0_HIT_PRIORITY", 13, 1 },
		{ "LPBK_TCAM_PRIORITY", 12, 1 },
		{ "LPBK_SMAC_TCAM_SEL", 10, 2 },
		{ "LPBK_DMAC_TCAM_SEL", 8, 2 },
		{ "TCAM1_HIT_PRIORITY", 7, 1 },
		{ "TCAM0_HIT_PRIORITY", 6, 1 },
		{ "TCAM_PRIORITY", 5, 1 },
		{ "SMAC_TCAM_SEL", 3, 2 },
		{ "DMAC_TCAM_SEL", 1, 2 },
		{ "PF_VLAN_SEL", 0, 1 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3631c, 0 },
		{ "EthType1", 16, 16 },
		{ "EthType2", 0, 16 },
	{ "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x36320, 0 },
		{ "EN1", 1, 1 },
		{ "EN2", 0, 1 },
	{ "MPS_CLS_CTL", 0xd000, 0 },
		{ "VlanClsEn_in", 7, 1 },
		{ "DisTcamParChk", 6, 1 },
		{ "VlanLkpEn", 5, 1 },
		{ "MemWriteFault", 4, 1 },
		{ "MemWriteWaiting", 3, 1 },
		{ "CimNoPromiscuous", 2, 1 },
		{ "HypervisorOnly", 1, 1 },
		{ "VlanClsEn", 0, 1 },
	{ "MPS_CLS_ARB_WEIGHT", 0xd004, 0 },
		{ "PlWeight", 16, 5 },
		{ "CimWeight", 8, 5 },
		{ "LpbkWeight", 0, 5 },
	{ "MPS_CLS_NCSI_ETH_TYPE", 0xd008, 0 },
		{ "EthType1", 16, 16 },
		{ "EthType2", 0, 16 },
	{ "MPS_CLS_NCSI_ETH_TYPE_EN", 0xd00c, 0 },
		{ "EN1", 1, 1 },
		{ "EN2", 0, 1 },
	{ "MPS_CLS_BMC_MAC_ADDR_L", 0xd010, 0 },
	{ "MPS_CLS_BMC_MAC_ADDR_H", 0xd014, 0 },
		{ "MatchAll", 18, 1 },
		{ "MatchBoth", 17, 1 },
		{ "Valid", 16, 1 },
		{ "DA", 0, 16 },
	{ "MPS_CLS_BMC_VLAN", 0xd018, 0 },
		{ "Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_TCAM0_MASK_REG0", 0xf040, 0 },
	{ "MPS_CLS_TCAM0_MASK_REG1", 0xf044, 0 },
	{ "MPS_CLS_TCAM0_MASK_REG2", 0xf048, 0 },
	{ "MPS_CLS_TCAM1_MASK_REG0", 0xf04c, 0 },
	{ "MPS_CLS_TCAM1_MASK_REG1", 0xf050, 0 },
	{ "MPS_CLS_TCAM1_MASK_REG2", 0xf054, 0 },
	{ "MPS_CLS_TCAM2_MASK_REG0", 0xf064, 0 },
	{ "MPS_CLS_TCAM2_MASK_REG1", 0xf068, 0 },
	{ "MPS_CLS_TCAM2_MASK_REG2", 0xf06c, 0 },
	{ "MPS_CLS_PERR_INJECT", 0xd01c, 0 },
		{ "MemSel", 1, 2 },
		{ "InjectDataErr", 0, 1 },
	{ "MPS_CLS_PERR_ENABLE", 0xd020, 0 },
		{ "CIM2MPS_Intf_Par", 4, 1 },
		{ "TCAM_CRC_SRAM", 3, 1 },
		{ "HashSRAM", 2, 1 },
		{ "MatchTCAM", 1, 1 },
		{ "MatchSRAM", 0, 1 },
	{ "MPS_CLS_INT_ENABLE", 0xd024, 0 },
		{ "PLErrEnb", 5, 1 },
		{ "CIM2MPS_Intf_Par", 4, 1 },
		{ "TCAM_CRC_SRAM", 3, 1 },
		{ "HashSRAM", 2, 1 },
		{ "MatchTCAM", 1, 1 },
		{ "MatchSRAM", 0, 1 },
	{ "MPS_CLS_INT_CAUSE", 0xd028, 0 },
		{ "PLErrEnb", 5, 1 },
		{ "CIM2MPS_Intf_Par", 4, 1 },
		{ "TCAM_CRC_SRAM", 3, 1 },
		{ "HashSRAM", 2, 1 },
		{ "MatchTCAM", 1, 1 },
		{ "MatchSRAM", 0, 1 },
	{ "MPS_CLS_PL_TEST_DATA_L", 0xd02c, 0 },
	{ "MPS_CLS_PL_TEST_DATA_H", 0xd030, 0 },
	{ "MPS_CLS_PL_TEST_RES_DATA", 0xd034, 0 },
		{ "Cls_Spare", 30, 2 },
		{ "Cls_Priority", 27, 3 },
		{ "Cls_Replicate", 26, 1 },
		{ "Cls_Index", 15, 11 },
		{ "Cls_VF", 7, 8 },
		{ "Cls_VF_Vld", 6, 1 },
		{ "Cls_PF", 3, 3 },
		{ "Cls_Match", 0, 3 },
	{ "MPS_CLS_PL_TEST_CTL", 0xd038, 0 },
	{ "MPS_CLS_PORT_BMC_CTL", 0xd03c, 0 },
	{ "MPS_CLS0_MATCH_CNT_TCAM", 0xd100, 0 },
	{ "MPS_CLS0_MATCH_CNT_HASH", 0xd104, 0 },
	{ "MPS_CLS0_MATCH_CNT_BCAST", 0xd108, 0 },
	{ "MPS_CLS0_MATCH_CNT_BMC", 0xd10c, 0 },
	{ "MPS_CLS0_MATCH_CNT_PROM", 0xd110, 0 },
	{ "MPS_CLS0_MATCH_CNT_HPROM", 0xd114, 0 },
	{ "MPS_CLS0_MISS_CNT", 0xd118, 0 },
	{ "MPS_CLS1_MATCH_CNT_TCAM", 0xd11c, 0 },
	{ "MPS_CLS1_MATCH_CNT_HASH", 0xd120, 0 },
	{ "MPS_CLS1_MATCH_CNT_BCAST", 0xd124, 0 },
	{ "MPS_CLS1_MATCH_CNT_BMC", 0xd128, 0 },
	{ "MPS_CLS1_MATCH_CNT_PROM", 0xd12c, 0 },
	{ "MPS_CLS1_MATCH_CNT_HPROM", 0xd130, 0 },
	{ "MPS_CLS1_MISS_CNT", 0xd134, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd200, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd220, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd240, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd260, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd280, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2a0, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2c0, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2e0, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd204, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd224, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd244, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd264, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd284, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2a4, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2c4, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2e4, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd208, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd228, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd248, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd268, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd288, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2a8, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2c8, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2e8, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd20c, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd22c, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd24c, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd26c, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd28c, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2ac, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2cc, 0 },
	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2ec, 0 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd210, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd230, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd250, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd270, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd290, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2b0, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2d0, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2f0, 0 },
		{ "ClsTrcVlanVld", 31, 1 },
		{ "ClsTrcVlanId", 16, 12 },
		{ "ClsTrcReqPort", 0, 4 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd214, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd234, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd254, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd274, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd294, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2b4, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2d4, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2f4, 0 },
		{ "ClsTrcLkpType", 31, 1 },
		{ "ClsTrcDIPHit", 30, 1 },
		{ "ClsTrcVNI", 0, 24 },
	{ "MPS_CLS_RESULT_TRACE", 0xd300, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd304, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd308, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd30c, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd310, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd314, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd318, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_RESULT_TRACE", 0xd31c, 0 },
		{ "ClsTrcPortNum", 31, 1 },
		{ "ClsTrcPriority", 28, 3 },
		{ "ClsTrcMultiListen", 27, 1 },
		{ "ClsTrcReplicate", 26, 1 },
		{ "ClsTrcPortMap", 24, 2 },
		{ "ClsTrcMatch", 23, 1 },
		{ "ClsTrcIndex", 12, 11 },
		{ "ClsTrcVF_Vld", 11, 1 },
		{ "ClsTrcPF", 3, 8 },
		{ "ClsTrcVF", 0, 3 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfc0, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfc4, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfc8, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfcc, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfd0, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfd4, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfd8, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfdc, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_VLAN_TABLE", 0xdfe0, 0 },
		{ "VLAN_Mask", 16, 12 },
		{ "PF", 13, 3 },
		{ "VLAN_Valid", 12, 1 },
		{ "VLAN_ID", 0, 12 },
	{ "MPS_CLS_DIP_ID_TABLE_CTL", 0x12000, 0 },
		{ "DIP_VLD", 12, 1 },
		{ "DIP_TYPE", 11, 1 },
		{ "DIP_WRN", 10, 1 },
		{ "DIP_SEG", 8, 2 },
		{ "DIP_TBL_RSVD1", 5, 3 },
		{ "DIP_TBL_ADDR", 0, 5 },
	{ "MPS_CLS_DIP_ID_TABLE_DATA", 0x12004, 0 },
	{ "MPS_RX_HASH_LKP_TABLE", 0x12060, 0 },
	{ "MPS_RX_HASH_LKP_TABLE", 0x12064, 0 },
	{ "MPS_RX_HASH_LKP_TABLE", 0x12068, 0 },
	{ "MPS_RX_HASH_LKP_TABLE", 0x1206c, 0 },
	{ "MPS_CLS_SRAM_L", 0xe000, 0 },
		{ "DisEncapOuterRplct", 31, 1 },
		{ "DisEncap", 30, 1 },
		{ "MultiListen3", 29, 1 },
		{ "MultiListen2", 28, 1 },
		{ "MultiListen1", 27, 1 },
		{ "MultiListen0", 26, 1 },
		{ "Priority3", 23, 3 },
		{ "Priority2", 20, 3 },
		{ "Priority1", 17, 3 },
		{ "Priority0", 14, 3 },
		{ "Valid", 13, 1 },
		{ "Replicate", 12, 1 },
		{ "PF", 9, 3 },
		{ "VF_Valid", 8, 1 },
		{ "VF", 0, 8 },
	{ "MPS_CLS_SRAM_H", 0xe004, 0 },
		{ "SramWRN", 31, 1 },
		{ "SramSpare", 27, 4 },
		{ "SramIndex", 16, 11 },
		{ "MacParity2", 10, 1 },
		{ "MacParity1", 9, 1 },
		{ "MacParity0", 8, 1 },
		{ "MacParityMaskSize", 4, 4 },
		{ "PortMap", 0, 4 },
	{ "MPS_CLS_HASH_TCAM_CTL", 0xe008, 0 },
		{ "CtlCmdType", 15, 1 },
		{ "CtlXYBitSel", 12, 1 },
		{ "CtlTcamIndex", 0, 9 },
	{ "MPS_CLS_HASH_TCAM_DATA", 0xe00c, 0 },
		{ "LkpType", 24, 1 },
		{ "VNI", 0, 24 },
	{ "MPS_CLS_TCAM_DATA0", 0xf000, 0 },
	{ "MPS_CLS_TCAM_DATA1", 0xf004, 0 },
		{ "VIDL", 16, 16 },
		{ "DMACH", 0, 16 },
	{ "MPS_CLS_TCAM_DATA2_CTL", 0xf008, 0 },
		{ "CtlCmdType", 31, 1 },
		{ "CtlReqID", 30, 1 },
		{ "CtlTcamSel", 26, 2 },
		{ "CtlTcamIndex", 17, 9 },
		{ "CtlXYBitSel", 16, 1 },
		{ "DataPortNum", 12, 4 },
		{ "DataLkpType", 10, 2 },
		{ "DataDipHit", 8, 1 },
		{ "DataVIDH2", 7, 1 },
		{ "DataVIDH1", 0, 7 },
	{ "MPS_CLS_TCAM0_RDATA0_REQ_ID0", 0xf010, 0 },
	{ "MPS_CLS_TCAM0_RDATA1_REQ_ID0", 0xf014, 0 },
		{ "VIDL", 16, 16 },
		{ "DMACH", 0, 16 },
	{ "MPS_CLS_TCAM0_RDATA2_REQ_ID0", 0xf018, 0 },
		{ "DataPortNum", 12, 4 },
		{ "DataLkpType", 10, 2 },
		{ "DataDipHit", 8, 1 },
		{ "DataVIDH2", 7, 1 },
		{ "DataVIDH1", 0, 7 },
	{ "MPS_CLS_TCAM0_RDATA0_REQ_ID1", 0xf01c, 0 },
	{ "MPS_CLS_TCAM0_RDATA1_REQ_ID1", 0xf020, 0 },
		{ "VIDL", 16, 16 },
		{ "DMACH", 0, 16 },
	{ "MPS_CLS_TCAM0_RDATA2_REQ_ID1", 0xf024, 0 },
		{ "DataPortNum", 12, 4 },
		{ "DataLkpType", 10, 2 },
		{ "DataDipHit", 8, 1 },
		{ "DataVIDH2", 7, 1 },
		{ "DataVIDH1", 0, 7 },
	{ "MPS_CLS_TCAM1_RDATA0_REQ_ID0", 0xf028, 0 },
	{ "MPS_CLS_TCAM1_RDATA1_REQ_ID0", 0xf02c, 0 },
		{ "VIDL", 16, 16 },
		{ "DMACH", 0, 16 },
	{ "MPS_CLS_TCAM1_RDATA2_REQ_ID0", 0xf030, 0 },
		{ "DataPortNum", 12, 4 },
		{ "DataLkpType", 10, 2 },
		{ "DataDipHit", 8, 1 },
		{ "DataVIDH2", 7, 1 },
		{ "DataVIDH1", 0, 7 },
	{ "MPS_CLS_TCAM1_RDATA0_REQ_ID1", 0xf034, 0 },
	{ "MPS_CLS_TCAM1_RDATA1_REQ_ID1", 0xf038, 0 },
		{ "VIDL", 16, 16 },
		{ "DMACH", 0, 16 },
	{ "MPS_CLS_TCAM1_RDATA2_REQ_ID1", 0xf03c, 0 },
		{ "DataPortNum", 12, 4 },
		{ "DataLkpType", 10, 2 },
		{ "DataDipHit", 8, 1 },
		{ "DataVIDH2", 7, 1 },
		{ "DataVIDH1", 0, 7 },
	{ "MPS_CLS_TCAM_BIST_CTRL", 0xf058, 0 },
		{ "rst_cb", 31, 1 },
		{ "cb_start", 0, 28 },
	{ "MPS_CLS_TCAM_BIST_CB_PASS", 0xf05c, 0 },
	{ "MPS_CLS_TCAM_BIST_CB_BUSY", 0xf060, 0 },
	{ NULL }
};

struct reg_info t7_cpl_switch_regs[] = {
	{ "CNTRL", 0x19040, 0 },
		{ "cpl_pkt_tid", 8, 24 },
		{ "cim_split_enable", 6, 1 },
		{ "cim_truncate_enable", 5, 1 },
		{ "cim_to_up_full_size", 4, 1 },
		{ "cpu_no_enable", 3, 1 },
		{ "switch_table_enable", 2, 1 },
		{ "sge_enable", 1, 1 },
		{ "cim_enable", 0, 1 },
	{ "TBL_IDX", 0x19044, 0 },
	{ "TBL_DATA", 0x19048, 0 },
	{ "ZERO_ERROR", 0x1904c, 0 },
		{ "zero_cmd_ch3", 24, 8 },
		{ "zero_cmd_ch2", 16, 8 },
		{ "zero_cmd_ch1", 8, 8 },
		{ "zero_cmd_ch0", 0, 8 },
	{ "INTR_ENABLE", 0x19050, 0 },
		{ "perr_cpl_128to128_3", 9, 1 },
		{ "perr_cpl_128to128_2", 8, 1 },
		{ "perr_cpl_128to128_1", 7, 1 },
		{ "perr_cpl_128to128_0", 6, 1 },
		{ "cim_op_map_perr", 5, 1 },
		{ "cim_ovfl_error", 4, 1 },
		{ "tp_framing_error", 3, 1 },
		{ "sge_framing_error", 2, 1 },
		{ "cim_framing_error", 1, 1 },
		{ "zero_switch_error", 0, 1 },
	{ "INTR_CAUSE", 0x19054, 0 },
		{ "perr_cpl_128to128_3", 9, 1 },
		{ "perr_cpl_128to128_2", 8, 1 },
		{ "perr_cpl_128to128_1", 7, 1 },
		{ "perr_cpl_128to128_0", 6, 1 },
		{ "cim_op_map_perr", 5, 1 },
		{ "cim_ovfl_error", 4, 1 },
		{ "tp_framing_error", 3, 1 },
		{ "sge_framing_error", 2, 1 },
		{ "cim_framing_error", 1, 1 },
		{ "zero_switch_error", 0, 1 },
	{ "MAP_TBL_IDX", 0x19058, 0 },
		{ "cpl_map_tbl_sel", 9, 2 },
		{ "cim_split_opcode_program", 8, 1 },
		{ "cpl_map_tbl_idx", 0, 8 },
	{ "MAP_TBL_DATA", 0x1905c, 0 },
	{ NULL }
};

struct reg_info t7_smb_regs[] = {
	{ "SMB_GLOBAL_TIME_CFG", 0x19060, 0 },
		{ "MacroCntCfg", 12, 5 },
		{ "MicroCntCfg", 0, 12 },
	{ "SMB_MST_TIMEOUT_CFG", 0x19064, 0 },
	{ "SMB_MST_CTL_CFG", 0x19068, 0 },
		{ "MstFifoDbg", 31, 1 },
		{ "MstFifoDbgClr", 30, 1 },
		{ "MstRxByteCfg", 12, 6 },
		{ "MstTxByteCfg", 6, 6 },
		{ "MstReset", 1, 1 },
		{ "MstCtlEn", 0, 1 },
	{ "SMB_MST_CTL_STS", 0x1906c, 0 },
		{ "MstRxByteCnt", 12, 6 },
		{ "MstTxByteCnt", 6, 6 },
		{ "MstBusySts", 0, 1 },
	{ "SMB_MST_TX_FIFO_RDWR", 0x19070, 0 },
	{ "SMB_MST_RX_FIFO_RDWR", 0x19074, 0 },
	{ "SMB_SLV_TIMEOUT_CFG", 0x19078, 0 },
	{ "SMB_SLV_CTL_CFG", 0x1907c, 0 },
		{ "SlvFifoDbg", 31, 1 },
		{ "SlvFifoDbgClr", 30, 1 },
		{ "SlvCrcOutBitInv", 21, 1 },
		{ "SlvCrcOutBitRev", 20, 1 },
		{ "SlvCrcInBitRev", 19, 1 },
		{ "SlvCrcPreset", 11, 8 },
		{ "SlvAddrCfg", 4, 7 },
		{ "SlvAlrtSet", 2, 1 },
		{ "SlvReset", 1, 1 },
		{ "SlvCtlEn", 0, 1 },
	{ "SMB_SLV_CTL_STS", 0x19080, 0 },
		{ "SlvFifoTxCnt", 12, 6 },
		{ "SlvFifoCnt", 6, 6 },
		{ "SlvAlrtSts", 2, 1 },
		{ "SlvBusySts", 0, 1 },
	{ "SMB_SLV_FIFO_RDWR", 0x19084, 0 },
	{ "SMB_INT_ENABLE", 0x1908c, 0 },
		{ "MstTxFifoParEn", 21, 1 },
		{ "MstRxFifoParEn", 20, 1 },
		{ "SlvFifoParEn", 19, 1 },
		{ "SlvUnExpBusStopEn", 18, 1 },
		{ "SlvUnExpBusStartEn", 17, 1 },
		{ "SlvCommandCodeInvEn", 16, 1 },
		{ "SlvByteCntErrEn", 15, 1 },
		{ "SlvUnExpAckMstEn", 14, 1 },
		{ "SlvUnExpNackMstEn", 13, 1 },
		{ "SlvNoBusStopEn", 12, 1 },
		{ "SlvNoRepStartEn", 11, 1 },
		{ "SlvRxAddrIntEn", 10, 1 },
		{ "SlvRxPecErrIntEn", 9, 1 },
		{ "SlvPrepToArpIntEn", 8, 1 },
		{ "SlvTimeOutIntEn", 7, 1 },
		{ "SlvErrIntEn", 6, 1 },
		{ "SlvDoneIntEn", 5, 1 },
		{ "SlvRxRdyIntEn", 4, 1 },
		{ "MstTimeOutIntEn", 3, 1 },
		{ "MstNAckIntEn", 2, 1 },
		{ "MstLostArbIntEn", 1, 1 },
		{ "MstDoneIntEn", 0, 1 },
	{ "SMB_INT_CAUSE", 0x19090, 0 },
		{ "MstTxFifoParInt", 21, 1 },
		{ "MstRxFifoParInt", 20, 1 },
		{ "SlvFifoParInt", 19, 1 },
		{ "SlvUnExpBusStopInt", 18, 1 },
		{ "SlvUnExpBusStartInt", 17, 1 },
		{ "SlvCommandCodeInvInt", 16, 1 },
		{ "SlvByteCntErrInt", 15, 1 },
		{ "SlvUnExpAckMstInt", 14, 1 },
		{ "SlvUnExpNackMstInt", 13, 1 },
		{ "SlvNoBusStopInt", 12, 1 },
		{ "SlvNoRepStartInt", 11, 1 },
		{ "SlvRxAddrInt", 10, 1 },
		{ "SlvRxPecErrInt", 9, 1 },
		{ "SlvPrepToArpInt", 8, 1 },
		{ "SlvTimeOutInt", 7, 1 },
		{ "SlvErrInt", 6, 1 },
		{ "SlvDoneInt", 5, 1 },
		{ "SlvRxRdyInt", 4, 1 },
		{ "MstTimeOutInt", 3, 1 },
		{ "MstNAckInt", 2, 1 },
		{ "MstLostArbInt", 1, 1 },
		{ "MstDoneInt", 0, 1 },
	{ "SMB_DEBUG_DATA", 0x19094, 0 },
		{ "DebugDataH", 16, 16 },
		{ "DebugDataL", 0, 16 },
	{ "SMB_PERR_EN", 0x19098, 0 },
		{ "MstTxFifo", 21, 1 },
		{ "MstRxFifo", 19, 1 },
		{ "SlvFifo", 18, 1 },
		{ "MstTxFifoPerrEn", 2, 1 },
		{ "MstRxFifoPerrEn", 1, 1 },
		{ "SlvFifoPerrEn", 0, 1 },
	{ "SMB_PERR_INJ", 0x1909c, 0 },
		{ "MstTxInjDataErr", 3, 1 },
		{ "MstRxInjDataErr", 2, 1 },
		{ "SlvInjDataErr", 1, 1 },
		{ "FifoInjDataErrEn", 0, 1 },
	{ "SMB_SLV_ARP_CTL", 0x190a0, 0 },
		{ "ArpCommandCode", 2, 8 },
		{ "ArpAddrRes", 1, 1 },
		{ "ArpAddrVal", 0, 1 },
	{ "SMB_ARP_UDID0", 0x190a4, 0 },
	{ "SMB_ARP_UDID1", 0x190a8, 0 },
		{ "SubsystemVendorID", 16, 16 },
		{ "SubsystemDeviceID", 0, 16 },
	{ "SMB_ARP_UDID2", 0x190ac, 0 },
		{ "DeviceID", 16, 16 },
		{ "Interface", 0, 16 },
	{ "SMB_ARP_UDID3", 0x190b0, 0 },
		{ "DeviceCap", 24, 8 },
		{ "VersionID", 16, 8 },
		{ "VendorID", 0, 16 },
	{ "SMB_SLV_AUX_ADDR0", 0x190b4, 0 },
		{ "AuxAddr0Val", 6, 1 },
		{ "AuxAddr0", 0, 6 },
	{ "SMB_SLV_AUX_ADDR1", 0x190b8, 0 },
		{ "AuxAddr1Val", 6, 1 },
		{ "AuxAddr1", 0, 6 },
	{ "SMB_SLV_AUX_ADDR2", 0x190bc, 0 },
		{ "AuxAddr2Val", 6, 1 },
		{ "AuxAddr2", 0, 6 },
	{ "SMB_SLV_AUX_ADDR3", 0x190c0, 0 },
		{ "AuxAddr3Val", 6, 1 },
		{ "AuxAddr3", 0, 6 },
	{ "SMB_COMMAND_CODE0", 0x190c4, 0 },
	{ "SMB_COMMAND_CODE1", 0x190c8, 0 },
	{ "SMB_COMMAND_CODE2", 0x190cc, 0 },
	{ "SMB_COMMAND_CODE3", 0x190d0, 0 },
	{ "SMB_COMMAND_CODE4", 0x190d4, 0 },
	{ "SMB_COMMAND_CODE5", 0x190d8, 0 },
	{ "SMB_COMMAND_CODE6", 0x190dc, 0 },
	{ "SMB_COMMAND_CODE7", 0x190e0, 0 },
	{ "SMB_MICRO_CNT_CLK_CFG", 0x190e4, 0 },
		{ "MacroCntClkCfg", 8, 5 },
		{ "MicroCntClkCfg", 0, 8 },
	{ "SMB_CTL_STATUS", 0x190e8, 0 },
		{ "MstBusBusy", 2, 1 },
		{ "SlvBusBusy", 1, 1 },
		{ "BusBusy", 0, 1 },
	{ NULL }
};

struct reg_info t7_i2cm_regs[] = {
	{ "I2CM_CFG", 0x190f0, 0 },
	{ "I2CM_DATA", 0x190f4, 0 },
	{ "I2CM_OP", 0x190f8, 0 },
		{ "Busy", 31, 1 },
		{ "Ack", 30, 1 },
		{ "Cont", 1, 1 },
		{ "Op", 0, 1 },
	{ NULL }
};

struct reg_info t7_mi_regs[] = {
	{ "MI_CFG", 0x19100, 0 },
		{ "T4_St", 14, 1 },
		{ "ClkDiv", 5, 8 },
		{ "St", 3, 2 },
		{ "PreEn", 2, 1 },
		{ "MDIInv", 1, 1 },
		{ "MDIO_1P2V_Sel", 0, 1 },
	{ "MI_ADDR", 0x19104, 0 },
		{ "PhyAddr", 5, 5 },
		{ "RegAddr", 0, 5 },
	{ "MI_DATA", 0x19108, 0 },
	{ "MI_OP", 0x1910c, 0 },
		{ "Busy", 31, 1 },
		{ "St", 3, 2 },
		{ "Inc", 2, 1 },
		{ "Op", 0, 2 },
	{ NULL }
};

struct reg_info t7_uart_regs[] = {
	{ "UART_CONFIG", 0x19110, 0 },
		{ "StopBits", 25, 2 },
		{ "Parity", 23, 2 },
		{ "DataBits", 19, 4 },
		{ "ClkDiv", 0, 18 },
	{ NULL }
};

struct reg_info t7_pmu_regs[] = {
	{ "PMU_PART_CG_PWRMODE", 0x19120, 0 },
		{ "PL_DIS_PRTY_CHK", 20, 1 },
		{ "ARM_Part_CGEn", 19, 1 },
		{ "PDP_Part_CGEn", 18, 1 },
		{ "TP_Part_CGEn", 17, 1 },
		{ "EDC0_Part_CGEn", 16, 1 },
		{ "EDC1_Part_CGEn", 15, 1 },
		{ "CRYPTO_Part_CGEn", 14, 1 },
		{ "MA_Part_CGEn", 13, 1 },
		{ "PCIE_Part_CGEn", 10, 1 },
		{ "NVME_Part_CGEn", 9, 1 },
		{ "XP10_Part_CGEn", 8, 1 },
		{ "GPEX_Part_CGEn", 7, 1 },
		{ "InitPowerMode", 0, 2 },
	{ "PMU_SLEEPMODE_WAKEUP", 0x19124, 0 },
		{ "GlobalDeepSleepEn", 6, 1 },
		{ "HWWakeUpEn", 5, 1 },
		{ "Port3SleepMode", 4, 1 },
		{ "Port2SleepMode", 3, 1 },
		{ "Port1SleepMode", 2, 1 },
		{ "Port0SleepMode", 1, 1 },
		{ "WakeUp", 0, 1 },
	{ NULL }
};

struct reg_info t7_ulp_rx_regs[] = {
	{ "ULP_RX_CTL", 0x19150, 0 },
		{ "Iscsi_Page_Size_Chk_Enb", 31, 1 },
		{ "Rdma_0B_Wr_Opcode_hi", 29, 1 },
		{ "Rdma_Immediate_Cqe", 28, 1 },
		{ "Rdma_Atomic_Wr_Rsp_Cqe", 27, 1 },
		{ "Rdma_Verify_Rsp_Flush", 26, 1 },
		{ "Rdma_Verify_Rsp_Cqe", 25, 1 },
		{ "Rdma_Flush_Rsp_Cqe", 24, 1 },
		{ "Rdma_Atomic_Rsp_Cqe", 23, 1 },
		{ "Tpt_Extension_Mode", 22, 1 },
		{ "NVMe_TCP_ddp_val_en", 21, 1 },
		{ "NVMe_TCP_Remove_Hdr_Crc", 20, 1 },
		{ "NVMe_TCP_Last_PDU_Check_Enb", 19, 1 },
		{ "NVMe_TCP_offset_submode", 17, 2 },
		{ "NVMe_TCP_offset_mode", 16, 1 },
		{ "qpid_check_disable_for_send", 15, 1 },
		{ "disable_0B_STAG_ERR", 14, 1 },
		{ "Rdma_0B_Wr_Opcode_lo", 10, 4 },
		{ "RDMA_0b_wr_pass", 9, 1 },
		{ "STAG_RQE", 8, 1 },
		{ "RDMA_State_En", 7, 1 },
		{ "Crc1_En", 6, 1 },
		{ "RDMA_0b_wr_cqe", 5, 1 },
		{ "PCIE_Atrb_En", 4, 1 },
		{ "RDMA_permissive_mode", 3, 1 },
		{ "PagePodME", 2, 1 },
		{ "IscsiTagTcb", 1, 1 },
		{ "TddpTagTcb", 0, 1 },
	{ "ULP_RX_INT_ENABLE", 0x19154, 0 },
		{ "CERR_PCMD_FIFO_3", 19, 1 },
		{ "CERR_PCMD_FIFO_2", 18, 1 },
		{ "CERR_PCMD_FIFO_1", 17, 1 },
		{ "CERR_PCMD_FIFO_0", 16, 1 },
		{ "CERR_DATA_FIFO_3", 15, 1 },
		{ "CERR_DATA_FIFO_2", 14, 1 },
		{ "CERR_DATA_FIFO_1", 13, 1 },
		{ "CERR_DATA_FIFO_0", 12, 1 },
		{ "SE_CNT_MISMATCH_3", 11, 1 },
		{ "SE_CNT_MISMATCH_2", 10, 1 },
		{ "SE_CNT_MISMATCH_1", 9, 1 },
		{ "SE_CNT_MISMATCH_0", 8, 1 },
		{ "ENABLE_CTX_3", 7, 1 },
		{ "ENABLE_CTX_2", 6, 1 },
		{ "ENABLE_CTX_1", 5, 1 },
		{ "ENABLE_CTX_0", 4, 1 },
		{ "ENABLE_ALN_SDC_ERR_3", 3, 1 },
		{ "ENABLE_ALN_SDC_ERR_2", 2, 1 },
		{ "ENABLE_ALN_SDC_ERR_1", 1, 1 },
		{ "ENABLE_ALN_SDC_ERR_0", 0, 1 },
	{ "ULP_RX_INT_CAUSE", 0x19158, 0 },
		{ "CERR_PCMD_FIFO_3", 19, 1 },
		{ "CERR_PCMD_FIFO_2", 18, 1 },
		{ "CERR_PCMD_FIFO_1", 17, 1 },
		{ "CERR_PCMD_FIFO_0", 16, 1 },
		{ "CERR_DATA_FIFO_3", 15, 1 },
		{ "CERR_DATA_FIFO_2", 14, 1 },
		{ "CERR_DATA_FIFO_1", 13, 1 },
		{ "CERR_DATA_FIFO_0", 12, 1 },
		{ "SE_CNT_MISMATCH_3", 11, 1 },
		{ "SE_CNT_MISMATCH_2", 10, 1 },
		{ "SE_CNT_MISMATCH_1", 9, 1 },
		{ "SE_CNT_MISMATCH_0", 8, 1 },
		{ "ENABLE_CTX_3", 7, 1 },
		{ "ENABLE_CTX_2", 6, 1 },
		{ "ENABLE_CTX_1", 5, 1 },
		{ "ENABLE_CTX_0", 4, 1 },
		{ "ENABLE_ALN_SDC_ERR_3", 3, 1 },
		{ "ENABLE_ALN_SDC_ERR_2", 2, 1 },
		{ "ENABLE_ALN_SDC_ERR_1", 1, 1 },
		{ "ENABLE_ALN_SDC_ERR_0", 0, 1 },
	{ "ULP_RX_ISCSI_LLIMIT", 0x1915c, 0 },
	{ "ULP_RX_ISCSI_ULIMIT", 0x19160, 0 },
	{ "ULP_RX_ISCSI_TAGMASK", 0x19164, 0 },
		{ "IscsiTagMask", 6, 26 },
	{ "ULP_RX_ISCSI_PSZ", 0x19168, 0 },
		{ "Hpz3", 24, 4 },
		{ "Hpz2", 16, 4 },
		{ "Hpz1", 8, 4 },
		{ "Hpz0", 0, 4 },
	{ "ULP_RX_TDDP_LLIMIT", 0x1916c, 0 },
	{ "ULP_RX_TDDP_ULIMIT", 0x19170, 0 },
	{ "ULP_RX_TDDP_TAGMASK", 0x19174, 0 },
		{ "TddpTagMask", 6, 26 },
	{ "ULP_RX_TDDP_PSZ", 0x19178, 0 },
		{ "Hpz3", 24, 4 },
		{ "Hpz2", 16, 4 },
		{ "Hpz1", 8, 4 },
		{ "Hpz0", 0, 4 },
	{ "ULP_RX_STAG_LLIMIT", 0x1917c, 0 },
	{ "ULP_RX_STAG_ULIMIT", 0x19180, 0 },
	{ "ULP_RX_RQ_LLIMIT", 0x19184, 0 },
	{ "ULP_RX_RQ_ULIMIT", 0x19188, 0 },
	{ "ULP_RX_PBL_LLIMIT", 0x1918c, 0 },
	{ "ULP_RX_PBL_ULIMIT", 0x19190, 0 },
	{ "ULP_RX_CTX_BASE", 0x19194, 0 },
	{ "ULP_RX_PERR_ENABLE", 0x1919c, 0 },
		{ "CERR_PCMD_FIFO_3", 19, 1 },
		{ "CERR_PCMD_FIFO_2", 18, 1 },
		{ "CERR_PCMD_FIFO_1", 17, 1 },
		{ "CERR_PCMD_FIFO_0", 16, 1 },
		{ "CERR_DATA_FIFO_3", 15, 1 },
		{ "CERR_DATA_FIFO_2", 14, 1 },
		{ "CERR_DATA_FIFO_1", 13, 1 },
		{ "CERR_DATA_FIFO_0", 12, 1 },
		{ "SE_CNT_MISMATCH_3", 11, 1 },
		{ "SE_CNT_MISMATCH_2", 10, 1 },
		{ "SE_CNT_MISMATCH_1", 9, 1 },
		{ "SE_CNT_MISMATCH_0", 8, 1 },
		{ "ENABLE_CTX_3", 7, 1 },
		{ "ENABLE_CTX_2", 6, 1 },
		{ "ENABLE_CTX_1", 5, 1 },
		{ "ENABLE_CTX_0", 4, 1 },
		{ "ENABLE_ALN_SDC_ERR_3", 3, 1 },
		{ "ENABLE_ALN_SDC_ERR_2", 2, 1 },
		{ "ENABLE_ALN_SDC_ERR_1", 1, 1 },
		{ "ENABLE_ALN_SDC_ERR_0", 0, 1 },
	{ "ULP_RX_PERR_INJECT", 0x191a0, 0 },
		{ "MemSel", 1, 7 },
		{ "InjectDataErr", 0, 1 },
	{ "ULP_RX_CTX_ACC_CH0", 0x191ac, 0 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "ULP_RX_CTX_ACC_CH1", 0x191b0, 0 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "ULP_RX_CTX_ACC_CH2", 0x191b4, 0 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "ULP_RX_CTX_ACC_CH3", 0x191b8, 0 },
		{ "REQ", 21, 1 },
		{ "WB", 20, 1 },
		{ "TID", 0, 20 },
	{ "ULP_RX_CTL2", 0x191bc, 0 },
		{ "PCMD3Threshold", 24, 8 },
		{ "PCMD2Threshold", 16, 8 },
		{ "PCMD1Threshold", 8, 8 },
		{ "PCMD0Threshold", 0, 8 },
	{ "ULP_RX_SE_CNT_ERR", 0x191d0, 0 },
		{ "ERR_CH3", 12, 4 },
		{ "ERR_CH2", 8, 4 },
		{ "ERR_CH1", 4, 4 },
		{ "ERR_CH0", 0, 4 },
	{ "ULP_RX_SE_CNT_CLR", 0x191d4, 0 },
		{ "CLR_CH3", 12, 4 },
		{ "CLR_CH2", 8, 4 },
		{ "CLR_CH1", 4, 4 },
		{ "CLR_CH0", 0, 4 },
	{ "ULP_RX_SE_CNT_CH0", 0x191d8, 0 },
		{ "SOP_CNT_OUT0", 28, 4 },
		{ "EOP_CNT_OUT0", 24, 4 },
		{ "SOP_CNT_AL0", 20, 4 },
		{ "EOP_CNT_AL0", 16, 4 },
		{ "SOP_CNT_MR0", 12, 4 },
		{ "EOP_CNT_MR0", 8, 4 },
		{ "SOP_CNT_IN0", 4, 4 },
		{ "EOP_CNT_IN0", 0, 4 },
	{ "ULP_RX_SE_CNT_CH1", 0x191dc, 0 },
		{ "SOP_CNT_OUT1", 28, 4 },
		{ "EOP_CNT_OUT1", 24, 4 },
		{ "SOP_CNT_AL1", 20, 4 },
		{ "EOP_CNT_AL1", 16, 4 },
		{ "SOP_CNT_MR1", 12, 4 },
		{ "EOP_CNT_MR1", 8, 4 },
		{ "SOP_CNT_IN1", 4, 4 },
		{ "EOP_CNT_IN1", 0, 4 },
	{ "ULP_RX_DBG_CTL", 0x191e0, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG_L", 16, 1 },
		{ "SEL_L", 0, 8 },
	{ "ULP_RX_DBG_DATA", 0x191e4, 0 },
	{ "ULP_RX_CQE_GEN_EN", 0x19250, 0 },
		{ "Termimate_msg", 1, 1 },
		{ "Terminate_with_err", 0, 1 },
	{ "ULP_RX_T10_CRC_ENDIAN_SWITCHING", 0x19258, 0 },
	{ "ULP_RX_MISC_FEATURE_ENABLE", 0x1925c, 0 },
		{ "Tls_KeySizeConf", 26, 2 },
		{ "iscsi_dcrc_error_cmp_en", 25, 1 },
		{ "IscsiTagPI", 24, 1 },
		{ "ddp_version_1", 22, 2 },
		{ "ddp_version_0", 20, 2 },
		{ "rdma_version_1", 18, 2 },
		{ "rdma_version_0", 16, 2 },
		{ "pbl_bound_check_w_pglen", 15, 1 },
		{ "t10_offset_update_en", 13, 1 },
		{ "ulp_insert_pi", 12, 1 },
		{ "pdu_dpi", 11, 1 },
		{ "iscsi_eff_offset_en", 10, 1 },
		{ "iscsi_all_cmp_mode", 9, 1 },
		{ "iscsi_enable_hdr_cmd", 8, 1 },
		{ "iscsi_force_cmp_mode", 7, 1 },
		{ "pio_rdma_send_rqe", 5, 1 },
		{ "terminate_status_en", 4, 1 },
		{ "multiple_pref_enable", 3, 1 },
		{ "umudp_pbl_pref_enable", 2, 1 },
		{ "rdma_pbl_pref_en", 1, 1 },
		{ "sdc_crc_prot_en", 0, 1 },
	{ "ULP_RX_CH_CGEN", 0x19260, 0 },
		{ "BYPASS_CGEN", 28, 4 },
		{ "TDDP_CGEN", 24, 4 },
		{ "ISCSI_CGEN", 20, 4 },
		{ "RDMA_CGEN", 16, 4 },
		{ "CHANNEL_CGEN", 12, 4 },
		{ "All_DataPath_CGEN", 8, 4 },
		{ "T10Diff_DataPath_CGEN", 4, 4 },
		{ "Rdma_DataPath_CGEN", 0, 4 },
	{ "ULP_RX_CH_CGEN_1", 0x19264, 0 },
		{ "NVMe_TCP_CGEN", 4, 4 },
		{ "RoCE_CGEN", 0, 4 },
	{ "ULP_RX_RFE_DISABLE", 0x19268, 0 },
	{ "ULP_RX_RQE_PBL_MULTIPLE_OUTSTANDING_CNT", 0x19278, 0 },
	{ "ULP_RX_CGEN_GLOBAL", 0x19280, 0 },
	{ "ULP_RX_CTX_SKIP_MA_REQ", 0x19284, 0 },
		{ "clear_ctx_err_cnt3", 7, 1 },
		{ "clear_ctx_err_cnt2", 6, 1 },
		{ "clear_ctx_err_cnt1", 5, 1 },
		{ "clear_ctx_err_cnt0", 4, 1 },
		{ "skip_ma_req_en3", 3, 1 },
		{ "skip_ma_req_en2", 2, 1 },
		{ "skip_ma_req_en1", 1, 1 },
		{ "skip_ma_req_en0", 0, 1 },
	{ "ULP_RX_CHNL0_CTX_ERROR_COUNT_PER_TID", 0x19288, 0 },
	{ "ULP_RX_CHNL1_CTX_ERROR_COUNT_PER_TID", 0x1928c, 0 },
	{ "ULP_RX_MSN_CHECK_ENABLE", 0x19290, 0 },
		{ "Rd_or_Term_msn_check_enable", 2, 1 },
		{ "atomic_op_msn_check_enable", 1, 1 },
		{ "send_msn_check_enable", 0, 1 },
	{ "ULP_RX_SE_CNT_CH2", 0x19294, 0 },
		{ "SOP_CNT_OUT2", 28, 4 },
		{ "EOP_CNT_OUT2", 24, 4 },
		{ "SOP_CNT_AL2", 20, 4 },
		{ "EOP_CNT_AL2", 16, 4 },
		{ "SOP_CNT_MR2", 12, 4 },
		{ "EOP_CNT_MR2", 8, 4 },
		{ "SOP_CNT_IN2", 4, 4 },
		{ "EOP_CNT_IN2", 0, 4 },
	{ "ULP_RX_SE_CNT_CH3", 0x19298, 0 },
		{ "SOP_CNT_OUT3", 28, 4 },
		{ "EOP_CNT_OUT3", 24, 4 },
		{ "SOP_CNT_AL3", 20, 4 },
		{ "EOP_CNT_AL3", 16, 4 },
		{ "SOP_CNT_MR3", 12, 4 },
		{ "EOP_CNT_MR3", 8, 4 },
		{ "SOP_CNT_IN3", 4, 4 },
		{ "EOP_CNT_IN3", 0, 4 },
	{ "ULP_RX_CHNL2_CTX_ERROR_COUNT_PER_TID", 0x1929c, 0 },
	{ "ULP_RX_CHNL3_CTX_ERROR_COUNT_PER_TID", 0x192a0, 0 },
	{ "ULP_RX_TLS_PP_LLIMIT", 0x192a4, 0 },
	{ "ULP_RX_TLS_PP_ULIMIT", 0x192a8, 0 },
	{ "ULP_RX_TLS_KEY_LLIMIT", 0x192ac, 0 },
	{ "ULP_RX_TLS_KEY_ULIMIT", 0x192b0, 0 },
	{ "ULP_RX_TLS_CTL", 0x192bc, 0 },
		{ "TlsPerrEn", 4, 1 },
		{ "TlsDisableIFuse", 2, 1 },
		{ "TlsDisableCFuse", 1, 1 },
		{ "TlsDisable", 0, 1 },
	{ "ULP_RX_RRQ_LLIMIT", 0x192c0, 0 },
	{ "ULP_RX_RRQ_ULIMIT", 0x192c4, 0 },
	{ "ULP_RX_NVME_TCP_STAG_LLIMIT", 0x192c8, 0 },
	{ "ULP_RX_NVME_TCP_STAG_ULIMIT", 0x192cc, 0 },
	{ "ULP_RX_NVME_TCP_RQ_LLIMIT", 0x192d0, 0 },
	{ "ULP_RX_NVME_TCP_RQ_ULIMIT", 0x192d4, 0 },
	{ "ULP_RX_NVME_TCP_PBL_LLIMIT", 0x192d8, 0 },
	{ "ULP_RX_NVME_TCP_PBL_ULIMIT", 0x192dc, 0 },
	{ "ULP_RX_NVME_TCP_MAX_LENGTH", 0x192e0, 0 },
		{ "NVMe_TCP_Max_PLEN01", 24, 8 },
		{ "NVMe_TCP_Max_PLEN23", 16, 8 },
		{ "NVMe_TCP_Max_Cmd_PDU_Length", 0, 16 },
	{ "ULP_RX_NVME_TCP_IQE_SIZE", 0x192e4, 0 },
	{ "ULP_RX_NVME_TCP_NEW_PDU_TYPES", 0x192e8, 0 },
	{ "ULP_RX_IWARP_PMOF_OPCODES_1", 0x192ec, 0 },
		{ "Rdma_Verify_Response", 24, 5 },
		{ "Rdma_Verify_Request", 16, 5 },
		{ "Rdma_Flush_Response", 8, 5 },
		{ "Rdma_Flush_Request", 0, 5 },
	{ "ULP_RX_IWARP_PMOF_OPCODES_2", 0x192f0, 0 },
		{ "Rdma_Send_With_SE_Immediate", 24, 5 },
		{ "Rdma_Send_With_Immediate", 16, 5 },
		{ "Rdma_Atomic_Write_Response", 8, 5 },
		{ "Rdma_Atomic_Write_Request", 0, 5 },
	{ "ULP_RX_INT_ENABLE_PCMD", 0x19300, 0 },
		{ "ENABLE_PCMD_SFIFO_3", 30, 1 },
		{ "ENABLE_PCMD_FIFO_3", 29, 1 },
		{ "ENABLE_PCMD_DDP_HINT_3", 28, 1 },
		{ "ENABLE_PCMD_TPT_3", 27, 1 },
		{ "ENABLE_PCMD_DDP_3", 26, 1 },
		{ "ENABLE_PCMD_MPAR_3", 25, 1 },
		{ "ENABLE_PCMD_MPAC_3", 24, 1 },
		{ "ENABLE_PCMD_SFIFO_2", 22, 1 },
		{ "ENABLE_PCMD_FIFO_2", 21, 1 },
		{ "ENABLE_PCMD_DDP_HINT_2", 20, 1 },
		{ "ENABLE_PCMD_TPT_2", 19, 1 },
		{ "ENABLE_PCMD_DDP_2", 18, 1 },
		{ "ENABLE_PCMD_MPAR_2", 17, 1 },
		{ "ENABLE_PCMD_MPAC_2", 16, 1 },
		{ "ENABLE_PCMD_SFIFO_1", 14, 1 },
		{ "ENABLE_PCMD_FIFO_1", 13, 1 },
		{ "ENABLE_PCMD_DDP_HINT_1", 12, 1 },
		{ "ENABLE_PCMD_TPT_1", 11, 1 },
		{ "ENABLE_PCMD_DDP_1", 10, 1 },
		{ "ENABLE_PCMD_MPAR_1", 9, 1 },
		{ "ENABLE_PCMD_MPAC_1", 8, 1 },
		{ "ENABLE_PCMD_SFIFO_0", 6, 1 },
		{ "ENABLE_PCMD_FIFO_0", 5, 1 },
		{ "ENABLE_PCMD_DDP_HINT_0", 4, 1 },
		{ "ENABLE_PCMD_TPT_0", 3, 1 },
		{ "ENABLE_PCMD_DDP_0", 2, 1 },
		{ "ENABLE_PCMD_MPAR_0", 1, 1 },
		{ "ENABLE_PCMD_MPAC_0", 0, 1 },
	{ "ULP_RX_INT_CAUSE_PCMD", 0x19304, 0 },
		{ "CAUSE_PCMD_SFIFO_3", 30, 1 },
		{ "CAUSE_PCMD_FIFO_3", 29, 1 },
		{ "CAUSE_PCMD_DDP_HINT_3", 28, 1 },
		{ "CAUSE_PCMD_TPT_3", 27, 1 },
		{ "CAUSE_PCMD_DDP_3", 26, 1 },
		{ "CAUSE_PCMD_MPAR_3", 25, 1 },
		{ "CAUSE_PCMD_MPAC_3", 24, 1 },
		{ "CAUSE_PCMD_SFIFO_2", 22, 1 },
		{ "CAUSE_PCMD_FIFO_2", 21, 1 },
		{ "CAUSE_PCMD_DDP_HINT_2", 20, 1 },
		{ "CAUSE_PCMD_TPT_2", 19, 1 },
		{ "CAUSE_PCMD_DDP_2", 18, 1 },
		{ "CAUSE_PCMD_MPAR_2", 17, 1 },
		{ "CAUSE_PCMD_MPAC_2", 16, 1 },
		{ "CAUSE_PCMD_SFIFO_1", 14, 1 },
		{ "CAUSE_PCMD_FIFO_1", 13, 1 },
		{ "CAUSE_PCMD_DDP_HINT_1", 12, 1 },
		{ "CAUSE_PCMD_TPT_1", 11, 1 },
		{ "CAUSE_PCMD_DDP_1", 10, 1 },
		{ "CAUSE_PCMD_MPAR_1", 9, 1 },
		{ "CAUSE_PCMD_MPAC_1", 8, 1 },
		{ "CAUSE_PCMD_SFIFO_0", 6, 1 },
		{ "CAUSE_PCMD_FIFO_0", 5, 1 },
		{ "CAUSE_PCMD_DDP_HINT_0", 4, 1 },
		{ "CAUSE_PCMD_TPT_0", 3, 1 },
		{ "CAUSE_PCMD_DDP_0", 2, 1 },
		{ "CAUSE_PCMD_MPAR_0", 1, 1 },
		{ "CAUSE_PCMD_MPAC_0", 0, 1 },
	{ "ULP_RX_PERR_ENABLE_PCMD", 0x19308, 0 },
		{ "PERR_ENABLE_PCMD_SFIFO_3", 30, 1 },
		{ "PERR_ENABLE_PCMD_FIFO_3", 29, 1 },
		{ "PERR_ENABLE_PCMD_DDP_HINT_3", 28, 1 },
		{ "PERR_ENABLE_PCMD_TPT_3", 27, 1 },
		{ "PERR_ENABLE_PCMD_DDP_3", 26, 1 },
		{ "PERR_ENABLE_PCMD_MPAR_3", 25, 1 },
		{ "PERR_ENABLE_PCMD_MPAC_3", 24, 1 },
		{ "PERR_ENABLE_PCMD_SFIFO_2", 22, 1 },
		{ "PERR_ENABLE_PCMD_FIFO_2", 21, 1 },
		{ "PERR_ENABLE_PCMD_DDP_HINT_2", 20, 1 },
		{ "PERR_ENABLE_PCMD_TPT_2", 19, 1 },
		{ "PERR_ENABLE_PCMD_DDP_2", 18, 1 },
		{ "PERR_ENABLE_PCMD_MPAR_2", 17, 1 },
		{ "PERR_ENABLE_PCMD_MPAC_2", 16, 1 },
		{ "PERR_ENABLE_PCMD_SFIFO_1", 14, 1 },
		{ "PERR_ENABLE_PCMD_FIFO_1", 13, 1 },
		{ "PERR_ENABLE_PCMD_DDP_HINT_1", 12, 1 },
		{ "PERR_ENABLE_PCMD_TPT_1", 11, 1 },
		{ "PERR_ENABLE_PCMD_DDP_1", 10, 1 },
		{ "PERR_ENABLE_PCMD_MPAR_1", 9, 1 },
		{ "PERR_ENABLE_PCMD_MPAC_1", 8, 1 },
		{ "PERR_ENABLE_PCMD_SFIFO_0", 6, 1 },
		{ "PERR_ENABLE_PCMD_FIFO_0", 5, 1 },
		{ "PERR_ENABLE_PCMD_DDP_HINT_0", 4, 1 },
		{ "PERR_ENABLE_PCMD_TPT_0", 3, 1 },
		{ "PERR_ENABLE_PCMD_DDP_0", 2, 1 },
		{ "PERR_ENABLE_PCMD_MPAR_0", 1, 1 },
		{ "PERR_ENABLE_PCMD_MPAC_0", 0, 1 },
	{ "ULP_RX_INT_ENABLE_DATA", 0x19310, 0 },
		{ "ENABLE_DATA_SNOOP_3", 29, 1 },
		{ "ENABLE_DATA_SFIFO_3", 28, 1 },
		{ "ENABLE_DATA_FIFO_3", 27, 1 },
		{ "ENABLE_DATA_DDP_3", 26, 1 },
		{ "ENABLE_DATA_CTX_3", 25, 1 },
		{ "ENABLE_DATA_PARSER_3", 24, 1 },
		{ "ENABLE_DATA_SNOOP_2", 21, 1 },
		{ "ENABLE_DATA_SFIFO_2", 20, 1 },
		{ "ENABLE_DATA_FIFO_2", 19, 1 },
		{ "ENABLE_DATA_DDP_2", 18, 1 },
		{ "ENABLE_DATA_CTX_2", 17, 1 },
		{ "ENABLE_DATA_PARSER_2", 16, 1 },
		{ "ENABLE_DATA_SNOOP_1", 13, 1 },
		{ "ENABLE_DATA_SFIFO_1", 12, 1 },
		{ "ENABLE_DATA_FIFO_1", 11, 1 },
		{ "ENABLE_DATA_DDP_1", 10, 1 },
		{ "ENABLE_DATA_CTX_1", 9, 1 },
		{ "ENABLE_DATA_PARSER_1", 8, 1 },
		{ "ENABLE_DATA_SNOOP_0", 5, 1 },
		{ "ENABLE_DATA_SFIFO_0", 4, 1 },
		{ "ENABLE_DATA_FIFO_0", 3, 1 },
		{ "ENABLE_DATA_DDP_0", 2, 1 },
		{ "ENABLE_DATA_CTX_0", 1, 1 },
		{ "ENABLE_DATA_PARSER_0", 0, 1 },
	{ "ULP_RX_INT_CAUSE_DATA", 0x19314, 0 },
		{ "CAUSE_DATA_SNOOP_3", 29, 1 },
		{ "CAUSE_DATA_SFIFO_3", 28, 1 },
		{ "CAUSE_DATA_FIFO_3", 27, 1 },
		{ "CAUSE_DATA_DDP_3", 26, 1 },
		{ "CAUSE_DATA_CTX_3", 25, 1 },
		{ "CAUSE_DATA_PARSER_3", 24, 1 },
		{ "CAUSE_DATA_SNOOP_2", 21, 1 },
		{ "CAUSE_DATA_SFIFO_2", 20, 1 },
		{ "CAUSE_DATA_FIFO_2", 19, 1 },
		{ "CAUSE_DATA_DDP_2", 18, 1 },
		{ "CAUSE_DATA_CTX_2", 17, 1 },
		{ "CAUSE_DATA_PARSER_2", 16, 1 },
		{ "CAUSE_DATA_SNOOP_1", 13, 1 },
		{ "CAUSE_DATA_SFIFO_1", 12, 1 },
		{ "CAUSE_DATA_FIFO_1", 11, 1 },
		{ "CAUSE_DATA_DDP_1", 10, 1 },
		{ "CAUSE_DATA_CTX_1", 9, 1 },
		{ "CAUSE_DATA_PARSER_1", 8, 1 },
		{ "CAUSE_DATA_SNOOP_0", 5, 1 },
		{ "CAUSE_DATA_SFIFO_0", 4, 1 },
		{ "CAUSE_DATA_FIFO_0", 3, 1 },
		{ "CAUSE_DATA_DDP_0", 2, 1 },
		{ "CAUSE_DATA_CTX_0", 1, 1 },
		{ "CAUSE_DATA_PARSER_0", 0, 1 },
	{ "ULP_RX_PERR_ENABLE_DATA", 0x19318, 0 },
		{ "PERR_ENABLE_DATA_SNOOP_3", 29, 1 },
		{ "PERR_ENABLE_DATA_SFIFO_3", 28, 1 },
		{ "PERR_ENABLE_DATA_FIFO_3", 27, 1 },
		{ "PERR_ENABLE_DATA_DDP_3", 26, 1 },
		{ "PERR_ENABLE_DATA_CTX_3", 25, 1 },
		{ "PERR_ENABLE_DATA_PARSER_3", 24, 1 },
		{ "PERR_ENABLE_DATA_SNOOP_2", 21, 1 },
		{ "PERR_ENABLE_DATA_SFIFO_2", 20, 1 },
		{ "PERR_ENABLE_DATA_FIFO_2", 19, 1 },
		{ "PERR_ENABLE_DATA_DDP_2", 18, 1 },
		{ "PERR_ENABLE_DATA_CTX_2", 17, 1 },
		{ "PERR_ENABLE_DATA_PARSER_2", 16, 1 },
		{ "PERR_ENABLE_DATA_SNOOP_1", 13, 1 },
		{ "PERR_ENABLE_DATA_SFIFO_1", 12, 1 },
		{ "PERR_ENABLE_DATA_FIFO_1", 11, 1 },
		{ "PERR_ENABLE_DATA_DDP_1", 10, 1 },
		{ "PERR_ENABLE_DATA_CTX_1", 9, 1 },
		{ "PERR_ENABLE_DATA_PARSER_1", 8, 1 },
		{ "PERR_ENABLE_DATA_SNOOP_0", 5, 1 },
		{ "PERR_ENABLE_DATA_SFIFO_0", 4, 1 },
		{ "PERR_ENABLE_DATA_FIFO_0", 3, 1 },
		{ "PERR_ENABLE_DATA_DDP_0", 2, 1 },
		{ "PERR_ENABLE_DATA_CTX_0", 1, 1 },
		{ "PERR_ENABLE_DATA_PARSER_0", 0, 1 },
	{ "ULP_RX_INT_ENABLE_ARB", 0x19320, 0 },
		{ "ENABLE_ARB_PBL_PF_3", 27, 1 },
		{ "ENABLE_ARB_PF_3", 26, 1 },
		{ "ENABLE_ARB_TPT_PF_3", 25, 1 },
		{ "ENABLE_ARB_F_3", 24, 1 },
		{ "ENABLE_ARB_PBL_PF_2", 19, 1 },
		{ "ENABLE_ARB_PF_2", 18, 1 },
		{ "ENABLE_ARB_TPT_PF_2", 17, 1 },
		{ "ENABLE_ARB_F_2", 16, 1 },
		{ "ENABLE_ARB_PBL_PF_1", 11, 1 },
		{ "ENABLE_ARB_PF_1", 10, 1 },
		{ "ENABLE_ARB_TPT_PF_1", 9, 1 },
		{ "ENABLE_ARB_F_1", 8, 1 },
		{ "ENABLE_ARB_PBL_PF_0", 3, 1 },
		{ "ENABLE_ARB_PF_0", 2, 1 },
		{ "ENABLE_ARB_TPT_PF_0", 1, 1 },
		{ "ENABLE_ARB_F_0", 0, 1 },
	{ "ULP_RX_INT_CAUSE_ARB", 0x19324, 0 },
		{ "CAUSE_ARB_PBL_PF_3", 27, 1 },
		{ "CAUSE_ARB_PF_3", 26, 1 },
		{ "CAUSE_ARB_TPT_PF_3", 25, 1 },
		{ "CAUSE_ARB_F_3", 24, 1 },
		{ "CAUSE_ARB_PBL_PF_2", 19, 1 },
		{ "CAUSE_ARB_PF_2", 18, 1 },
		{ "CAUSE_ARB_TPT_PF_2", 17, 1 },
		{ "CAUSE_ARB_F_2", 16, 1 },
		{ "CAUSE_ARB_PBL_PF_1", 11, 1 },
		{ "CAUSE_ARB_PF_1", 10, 1 },
		{ "CAUSE_ARB_TPT_PF_1", 9, 1 },
		{ "CAUSE_ARB_F_1", 8, 1 },
		{ "CAUSE_ARB_PBL_PF_0", 3, 1 },
		{ "CAUSE_ARB_PF_0", 2, 1 },
		{ "CAUSE_ARB_TPT_PF_0", 1, 1 },
		{ "CAUSE_ARB_F_0", 0, 1 },
	{ "ULP_RX_PERR_ENABLE_ARB", 0x19328, 0 },
		{ "PERR_ENABLE_ARB_PBL_PF_3", 27, 1 },
		{ "PERR_ENABLE_ARB_PF_3", 26, 1 },
		{ "PERR_ENABLE_ARB_TPT_PF_3", 25, 1 },
		{ "PERR_ENABLE_ARB_F_3", 24, 1 },
		{ "PERR_ENABLE_ARB_PBL_PF_2", 19, 1 },
		{ "PERR_ENABLE_ARB_PF_2", 18, 1 },
		{ "PERR_ENABLE_ARB_TPT_PF_2", 17, 1 },
		{ "PERR_ENABLE_ARB_F_2", 16, 1 },
		{ "PERR_ENABLE_ARB_PBL_PF_1", 11, 1 },
		{ "PERR_ENABLE_ARB_PF_1", 10, 1 },
		{ "PERR_ENABLE_ARB_TPT_PF_1", 9, 1 },
		{ "PERR_ENABLE_ARB_F_1", 8, 1 },
		{ "PERR_ENABLE_ARB_PBL_PF_0", 3, 1 },
		{ "PERR_ENABLE_ARB_PF_0", 2, 1 },
		{ "PERR_ENABLE_ARB_TPT_PF_0", 1, 1 },
		{ "PERR_ENABLE_ARB_F_0", 0, 1 },
	{ "ULP_RX_INT_ENABLE_INTERFACE", 0x191c0, 0 },
		{ "ENABLE_ULPRX2SBT_RspPerr", 31, 1 },
		{ "ENABLE_ULPRX2MA_RspPerr", 30, 1 },
		{ "ENABME_Pio_Bus_Perr", 29, 1 },
		{ "ENABLE_PM2ULP_SnoopData_3", 19, 1 },
		{ "ENABLE_PM2ULP_SnoopData_2", 18, 1 },
		{ "ENABLE_PM2ULP_SnoopData_1", 17, 1 },
		{ "ENABLE_PM2ULP_SnoopData_0", 16, 1 },
		{ "ENABLE_TLS2ULP_Data_3", 15, 1 },
		{ "ENABLE_TLS2ULP_Data_2", 14, 1 },
		{ "ENABLE_TLS2ULP_Data_1", 13, 1 },
		{ "ENABLE_TLS2ULP_Data_0", 12, 1 },
		{ "ENABLE_TLS2ULP_PLenData_3", 11, 1 },
		{ "ENABLE_TLS2ULP_PLenData_2", 10, 1 },
		{ "ENABLE_TLS2ULP_PLenData_1", 9, 1 },
		{ "ENABLE_TLS2ULP_PLenData_0", 8, 1 },
		{ "ENABLE_PM2ULP_DATA_3", 7, 1 },
		{ "ENABLE_PM2ULP_DATA_2", 6, 1 },
		{ "ENABLE_PM2ULP_DATA_1", 5, 1 },
		{ "ENABLE_PM2ULP_DATA_0", 4, 1 },
		{ "ENABLE_TP2ULP_PCMD_3", 3, 1 },
		{ "ENABLE_TP2ULP_PCMD_2", 2, 1 },
		{ "ENABLE_TP2ULP_PCMD_1", 1, 1 },
		{ "ENABLE_TP2ULP_PCMD_0", 0, 1 },
	{ "ULP_RX_INT_CAUSE_INTERFACE", 0x191c4, 0 },
		{ "CAUSE_ULPRX2SBT_RspPerr", 31, 1 },
		{ "CAUSE_ULPRX2MA_RspPerr", 30, 1 },
		{ "CAUSE_Pio_Bus_Perr", 29, 1 },
		{ "CAUSE_PM2ULP_SnoopData_3", 19, 1 },
		{ "CAUSE_PM2ULP_SnoopData_2", 18, 1 },
		{ "CAUSE_PM2ULP_SnoopData_1", 17, 1 },
		{ "CAUSE_PM2ULP_SnoopData_0", 16, 1 },
		{ "CAUSE_TLS2ULP_Data_3", 15, 1 },
		{ "CAUSE_TLS2ULP_Data_2", 14, 1 },
		{ "CAUSE_TLS2ULP_Data_1", 13, 1 },
		{ "CAUSE_TLS2ULP_Data_0", 12, 1 },
		{ "CAUSE_TLS2ULP_PLenData_3", 11, 1 },
		{ "CAUSE_TLS2ULP_PLenData_2", 10, 1 },
		{ "CAUSE_TLS2ULP_PLenData_1", 9, 1 },
		{ "CAUSE_TLS2ULP_PLenData_0", 8, 1 },
		{ "CAUSE_PM2ULP_DATA_3", 7, 1 },
		{ "CAUSE_PM2ULP_DATA_2", 6, 1 },
		{ "CAUSE_PM2ULP_DATA_1", 5, 1 },
		{ "CAUSE_PM2ULP_DATA_0", 4, 1 },
		{ "CAUSE_TP2ULP_PCMD_3", 3, 1 },
		{ "CAUSE_TP2ULP_PCMD_2", 2, 1 },
		{ "CAUSE_TP2ULP_PCMD_1", 1, 1 },
		{ "CAUSE_TP2ULP_PCMD_0", 0, 1 },
	{ "ULP_RX_PERR_ENABLE_INTERFACE", 0x191c8, 0 },
		{ "PERR_ULPRX2SBT_RspPerr", 31, 1 },
		{ "PERR_ULPRX2MA_RspPerr", 30, 1 },
		{ "PERR_Pio_Bus_Perr", 29, 1 },
		{ "PERR_PM2ULP_SnoopData_3", 19, 1 },
		{ "PERR_PM2ULP_SnoopData_2", 18, 1 },
		{ "PERR_PM2ULP_SnoopData_1", 17, 1 },
		{ "PERR_PM2ULP_SnoopData_0", 16, 1 },
		{ "PERR_TLS2ULP_Data_3", 15, 1 },
		{ "PERR_TLS2ULP_Data_2", 14, 1 },
		{ "PERR_TLS2ULP_Data_1", 13, 1 },
		{ "PERR_TLS2ULP_Data_0", 12, 1 },
		{ "PERR_TLS2ULP_PLenData_3", 11, 1 },
		{ "PERR_TLS2ULP_PLenData_2", 10, 1 },
		{ "PERR_TLS2ULP_PLenData_1", 9, 1 },
		{ "PERR_TLS2ULP_PLenData_0", 8, 1 },
		{ "PERR_PM2ULP_DATA_3", 7, 1 },
		{ "PERR_PM2ULP_DATA_2", 6, 1 },
		{ "PERR_PM2ULP_DATA_1", 5, 1 },
		{ "PERR_PM2ULP_DATA_0", 4, 1 },
		{ "PERR_TP2ULP_PCMD_3", 3, 1 },
		{ "PERR_TP2ULP_PCMD_2", 2, 1 },
		{ "PERR_TP2ULP_PCMD_1", 1, 1 },
		{ "PERR_TP2ULP_PCMD_0", 0, 1 },
	{ "ULP_RX_CTL1", 0x19330, 0 },
		{ "iSCSI_Ctl2", 27, 1 },
		{ "iSCSI_Ctl1", 26, 1 },
		{ "iSCSI_Ctl0", 25, 1 },
		{ "NVMe_TCP_Data_Alignment", 16, 9 },
		{ "NVMe_TCP_Invld_Msg_Dis", 14, 2 },
		{ "NVMe_TCP_ddp_pdu_chk_type", 13, 1 },
		{ "T10_Config_Enb", 12, 1 },
		{ "NVMe_TCP_Colour_Enb", 10, 2 },
		{ "RoCE_send_rqe", 8, 1 },
		{ "RDMA_Invld_Msg_Dis", 6, 2 },
		{ "RoCE_Invld_Msg_Dis", 4, 2 },
		{ "Mem_Addr_Ctrl", 2, 2 },
		{ "Enb_32K_PDU", 1, 1 },
		{ "c2h_success_wo_last_pdu_chk_dis", 0, 1 },
	{ "ULP_RX_TLS_IND_CMD", 0x19348, 0 },
	{ "ULP_RX_TLS_IND_DATA", 0x1934c, 0 },
	{ NULL }
};

struct reg_info t7_sf_regs[] = {
	{ "SF_DATA", 0x193f8, 0 },
	{ "SF_OP", 0x193fc, 0 },
		{ "Busy", 31, 1 },
		{ "En32bAddr", 30, 1 },
		{ "RegDbg_Mode", 10, 1 },
		{ "RegDbg_Sel", 9, 1 },
		{ "QuadWrEnable", 8, 1 },
		{ "Enter4B", 7, 1 },
		{ "Exit4B", 6, 1 },
		{ "QuadReadDisable", 5, 1 },
		{ "Lock", 4, 1 },
		{ "Cont", 3, 1 },
		{ "Num_of_bytes", 1, 2 },
		{ "Op", 0, 1 },
	{ NULL }
};

struct reg_info t7_pl_regs[] = {
	{ "PL_PF_INT_CAUSE", 0x1e3c0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1e3c4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1e3c8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1e7c0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1e7c4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1e7c8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1ebc0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1ebc4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1ebc8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1efc0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1efc4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1efc8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1f3c0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1f3c4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1f3c8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1f7c0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1f7c4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1f7c8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1fbc0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1fbc4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1fbc8, 0 },
	{ "PL_PF_INT_CAUSE", 0x1ffc0, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_INT_ENABLE", 0x1ffc4, 0 },
		{ "SW", 3, 1 },
		{ "CIM", 1, 1 },
		{ "MPS", 0, 1 },
	{ "PL_PF_CTL", 0x1ffc8, 0 },
	{ "PL_WHOAMI", 0x19400, 0 },
		{ "PortxMap", 24, 3 },
		{ "SourceBus", 16, 2 },
		{ "SourcePF", 9, 3 },
		{ "IsVF", 8, 1 },
		{ "VFID", 0, 8 },
	{ "PL_PERR_CAUSE", 0x19404, 0 },
		{ "CRYPTO_KEY", 31, 1 },
		{ "CRYPTO1", 30, 1 },
		{ "CRYPTO0", 29, 1 },
		{ "GCACHE", 28, 1 },
		{ "ARM", 27, 1 },
		{ "ULP_TX", 26, 1 },
		{ "SGE", 25, 1 },
		{ "HMA", 24, 1 },
		{ "CPL_SWITCH", 23, 1 },
		{ "ULP_RX", 22, 1 },
		{ "PM_RX", 21, 1 },
		{ "PM_TX", 20, 1 },
		{ "MA", 19, 1 },
		{ "TP", 18, 1 },
		{ "LE", 17, 1 },
		{ "EDC1", 16, 1 },
		{ "EDC0", 15, 1 },
		{ "MC1", 14, 1 },
		{ "MC0", 13, 1 },
		{ "PCIE", 12, 1 },
		{ "UART", 11, 1 },
		{ "PMU", 10, 1 },
		{ "MAC", 9, 1 },
		{ "SMB", 8, 1 },
		{ "SF", 7, 1 },
		{ "PL", 6, 1 },
		{ "NCSI", 5, 1 },
		{ "MPS", 4, 1 },
		{ "MI", 3, 1 },
		{ "DBG", 2, 1 },
		{ "I2CM", 1, 1 },
		{ "CIM", 0, 1 },
	{ "PL_PERR_ENABLE", 0x19408, 0 },
		{ "CRYPTO_KEY", 31, 1 },
		{ "CRYPTO1", 30, 1 },
		{ "CRYPTO0", 29, 1 },
		{ "GCACHE", 28, 1 },
		{ "ARM", 27, 1 },
		{ "ULP_TX", 26, 1 },
		{ "SGE", 25, 1 },
		{ "HMA", 24, 1 },
		{ "CPL_SWITCH", 23, 1 },
		{ "ULP_RX", 22, 1 },
		{ "PM_RX", 21, 1 },
		{ "PM_TX", 20, 1 },
		{ "MA", 19, 1 },
		{ "TP", 18, 1 },
		{ "LE", 17, 1 },
		{ "EDC1", 16, 1 },
		{ "EDC0", 15, 1 },
		{ "MC1", 14, 1 },
		{ "MC0", 13, 1 },
		{ "PCIE", 12, 1 },
		{ "UART", 11, 1 },
		{ "PMU", 10, 1 },
		{ "MAC", 9, 1 },
		{ "SMB", 8, 1 },
		{ "SF", 7, 1 },
		{ "PL", 6, 1 },
		{ "NCSI", 5, 1 },
		{ "MPS", 4, 1 },
		{ "MI", 3, 1 },
		{ "DBG", 2, 1 },
		{ "I2CM", 1, 1 },
		{ "CIM", 0, 1 },
	{ "PL_INT_CAUSE", 0x1940c, 0 },
		{ "FLR", 31, 1 },
		{ "SW_CIM", 30, 1 },
		{ "ULP_TX", 29, 1 },
		{ "SGE", 28, 1 },
		{ "HMA", 27, 1 },
		{ "CPL_SWITCH", 26, 1 },
		{ "ULP_RX", 25, 1 },
		{ "PM_RX", 24, 1 },
		{ "PM_TX", 23, 1 },
		{ "MA", 22, 1 },
		{ "TP", 21, 1 },
		{ "LE", 20, 1 },
		{ "EDC1", 19, 1 },
		{ "EDC0", 18, 1 },
		{ "MC1", 17, 1 },
		{ "MC0", 16, 1 },
		{ "PCIE", 15, 1 },
		{ "UART", 14, 1 },
		{ "PMU", 13, 1 },
		{ "MAC3", 12, 1 },
		{ "MAC2", 11, 1 },
		{ "MAC1", 10, 1 },
		{ "MAC0", 9, 1 },
		{ "SMB", 8, 1 },
		{ "SF", 7, 1 },
		{ "PL", 6, 1 },
		{ "NCSI", 5, 1 },
		{ "MPS", 4, 1 },
		{ "MI", 3, 1 },
		{ "DBG", 2, 1 },
		{ "I2CM", 1, 1 },
		{ "CIM", 0, 1 },
	{ "PL_INT_ENABLE", 0x19410, 0 },
		{ "FLR", 31, 1 },
		{ "SW_CIM", 30, 1 },
		{ "ULP_TX", 29, 1 },
		{ "SGE", 28, 1 },
		{ "HMA", 27, 1 },
		{ "CPL_SWITCH", 26, 1 },
		{ "ULP_RX", 25, 1 },
		{ "PM_RX", 24, 1 },
		{ "PM_TX", 23, 1 },
		{ "MA", 22, 1 },
		{ "TP", 21, 1 },
		{ "LE", 20, 1 },
		{ "EDC1", 19, 1 },
		{ "EDC0", 18, 1 },
		{ "MC1", 17, 1 },
		{ "MC0", 16, 1 },
		{ "PCIE", 15, 1 },
		{ "UART", 14, 1 },
		{ "PMU", 13, 1 },
		{ "MAC3", 12, 1 },
		{ "MAC2", 11, 1 },
		{ "MAC1", 10, 1 },
		{ "MAC0", 9, 1 },
		{ "SMB", 8, 1 },
		{ "SF", 7, 1 },
		{ "PL", 6, 1 },
		{ "NCSI", 5, 1 },
		{ "MPS", 4, 1 },
		{ "MI", 3, 1 },
		{ "DBG", 2, 1 },
		{ "I2CM", 1, 1 },
		{ "CIM", 0, 1 },
	{ "PL_INT_MAP0", 0x19414, 0 },
		{ "MapNCSI", 16, 9 },
		{ "MapDefault", 0, 9 },
	{ "PL_INT_MAP1", 0x19418, 0 },
		{ "MapMAC1", 16, 9 },
		{ "MapMAC0", 0, 9 },
	{ "PL_INT_MAP2", 0x1941c, 0 },
		{ "MapMAC3", 16, 9 },
		{ "MapMAC2", 0, 9 },
	{ "PL_INT_MAP3", 0x19420, 0 },
		{ "MapMI", 16, 9 },
		{ "MapSMB", 0, 9 },
	{ "PL_INT_MAP4", 0x19424, 0 },
		{ "MapDBG", 16, 9 },
		{ "MapI2CM", 0, 9 },
	{ "PL_RST", 0x19428, 0 },
		{ "AutoPciePause", 4, 1 },
		{ "FatalPerrEn", 3, 1 },
		{ "SWIntCIM", 2, 1 },
		{ "PIORst", 1, 1 },
		{ "PIORstMode", 0, 1 },
	{ "PL_PL_INT_CAUSE", 0x19430, 0 },
		{ "PL_BusPerr", 6, 1 },
		{ "FatalPerr", 4, 1 },
		{ "InvalidAccess", 3, 1 },
		{ "Timeout", 2, 1 },
		{ "PLErr", 1, 1 },
	{ "PL_PL_INT_ENABLE", 0x19434, 0 },
		{ "PL_BusPerr", 6, 1 },
		{ "FatalPerr", 4, 1 },
		{ "InvalidAccess", 3, 1 },
		{ "Timeout", 2, 1 },
		{ "PLErr", 1, 1 },
	{ "PL_PL_PERR_ENABLE", 0x19438, 0 },
		{ "PL_BusPerr", 6, 1 },
	{ "PL_REV", 0x1943c, 0 },
		{ "ChipID", 4, 4 },
		{ "Rev", 0, 4 },
	{ "PL_PCIE_LINK", 0x19440, 0 },
		{ "SPEEDMS", 30, 1 },
		{ "LN0_AESTAT", 27, 3 },
		{ "LN0_AECMD", 24, 3 },
		{ "StateCfgInitF", 16, 8 },
		{ "StateCfgInit", 12, 4 },
		{ "PHY_STATUS", 10, 1 },
		{ "SPEED", 8, 2 },
		{ "PERstTimeout", 7, 1 },
		{ "LTSSMEnable", 6, 1 },
		{ "LTSSM", 0, 6 },
	{ "PL_PCIE_CTL_STAT", 0x19444, 0 },
		{ "Status", 16, 16 },
		{ "Control", 0, 16 },
	{ "PL_SEMAPHORE_CTL", 0x1944c, 0 },
		{ "LockStatus", 16, 8 },
		{ "OwnerOverride", 8, 1 },
		{ "EnablePF", 0, 8 },
	{ "PL_SEMAPHORE_LOCK", 0x19450, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x19454, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x19458, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x1945c, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x19460, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x19464, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x19468, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_SEMAPHORE_LOCK", 0x1946c, 0 },
		{ "Lock", 31, 1 },
		{ "SourceBus", 3, 2 },
		{ "SourcePF", 0, 3 },
	{ "PL_PORTX_MAP", 0x19474, 0 },
		{ "MAP7", 28, 3 },
		{ "MAP6", 24, 3 },
		{ "MAP5", 20, 3 },
		{ "MAP4", 16, 3 },
		{ "MAP3", 12, 3 },
		{ "MAP2", 8, 3 },
		{ "MAP1", 4, 3 },
		{ "MAP0", 0, 3 },
	{ "PL_INT_CAUSE2", 0x19478, 0 },
		{ "CRYPTO_KEY", 4, 1 },
		{ "CRYPTO1", 3, 1 },
		{ "CRYPTO0", 2, 1 },
		{ "GCACHE", 1, 1 },
		{ "ARM", 0, 1 },
	{ "PL_INT_ENABLE2", 0x1947c, 0 },
		{ "CRYPTO_KEY", 4, 1 },
		{ "CRYPTO1", 3, 1 },
		{ "CRYPTO0", 2, 1 },
		{ "GCACHE", 1, 1 },
		{ "ARM", 0, 1 },
	{ "PL_ER_CMD", 0x19488, 0 },
		{ "ER_ADDR", 2, 30 },
	{ "PL_ER_DATA", 0x1948c, 0 },
	{ "PL_VF_SLICE_L", 0x19490, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x19498, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x194a0, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x194a8, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x194b0, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x194b8, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x194c0, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_L", 0x194c8, 0 },
		{ "LimitAddr", 16, 10 },
		{ "BaseAddr", 0, 10 },
	{ "PL_VF_SLICE_H", 0x19494, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x1949c, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x194a4, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x194ac, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x194b4, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x194bc, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x194c4, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_VF_SLICE_H", 0x194cc, 0 },
		{ "ModIndx", 16, 3 },
		{ "ModOffset", 0, 10 },
	{ "PL_TIMEOUT_CTL", 0x194f0, 0 },
		{ "PerrCapture", 16, 1 },
		{ "Timeout", 0, 16 },
	{ "PL_TIMEOUT_STATUS0", 0x194f4, 0 },
		{ "Addr", 2, 28 },
	{ "PL_TIMEOUT_STATUS1", 0x194f8, 0 },
		{ "Valid", 31, 1 },
		{ "ValidPerr", 30, 1 },
		{ "Write", 22, 1 },
		{ "Bus", 20, 2 },
		{ "PF", 16, 3 },
		{ "VFID", 0, 9 },
	{ NULL }
};

struct reg_info t7_le_regs[] = {
	{ "LE_DB_ID", 0x19c00, 0 },
	{ "LE_DB_CONFIG", 0x19c04, 0 },
		{ "CacheBypass", 28, 1 },
		{ "CHK_FUL_TUP_ZERO", 27, 1 },
		{ "PRI_HASH", 26, 1 },
		{ "EXTN_HASH_IPV4", 25, 1 },
		{ "PROTOCOLMASKEN", 24, 1 },
		{ "SRVRSRAMEN", 22, 1 },
		{ "HASHEN", 20, 1 },
		{ "ASLIPCOMPEN_IPV4", 18, 1 },
		{ "BUILD", 16, 1 },
		{ "IGNR_TUP_ZERO", 9, 1 },
		{ "IGNR_LIP_ZERO", 8, 1 },
		{ "CLCAM_INIT_BUSY", 7, 1 },
		{ "CLCAM_INIT", 6, 1 },
		{ "MTCAM_INIT_BUSY", 5, 1 },
		{ "MTCAM_INIT", 4, 1 },
		{ "REGION_EN", 0, 4 },
	{ "LE_DB_EXEC_CTRL", 0x19c08, 0 },
		{ "TPDB_IF_PAUSE_ACK", 10, 1 },
		{ "TPDB_IF_PAUSE_REQ", 9, 1 },
		{ "ERRSTOP_EN", 8, 1 },
		{ "CMDLIMIT", 0, 8 },
	{ "LE_DB_PS_CTRL", 0x19c0c, 0 },
		{ "SRAMDEEPSLEEP_STAT", 11, 1 },
		{ "CLTCAMDEEPSLEEP_STAT", 10, 1 },
		{ "TCAMDEEPSLEEP_STAT", 9, 1 },
		{ "SRAMDEEPSLEEP", 8, 1 },
		{ "CLTCAMDEEPSLEEP", 7, 1 },
		{ "TCAMDEEPSLEEP", 6, 1 },
		{ "SRVRAMCLKOFF", 5, 1 },
		{ "HASHCLKOFF", 4, 1 },
	{ "LE_DB_ACTIVE_TABLE_START_INDEX", 0x19c10, 0 },
	{ "LE_DB_NORM_FILT_TABLE_START_INDEX", 0x19c14, 0 },
	{ "LE_DB_SRVR_START_INDEX", 0x19c18, 0 },
	{ "LE_DB_HPRI_FILT_TABLE_START_INDEX", 0x19c1c, 0 },
	{ "LE_DB_ACT_CNT_IPV4", 0x19c20, 0 },
	{ "LE_DB_ACT_CNT_IPV6", 0x19c24, 0 },
	{ "LE_DB_ACT_CNT_IPV4_TCAM", 0x19c94, 0 },
	{ "LE_DB_ACT_CNT_IPV6_TCAM", 0x19c98, 0 },
	{ "LE_DB_REQ_RSP_CNT", 0x19ce4, 0 },
		{ "RspCnt", 16, 16 },
		{ "ReqCnt", 0, 16 },
	{ "LE_HASH_COLLISION", 0x19fc4, 0 },
	{ "LE_GLOBAL_COLLISION", 0x19fc8, 0 },
	{ "LE_DB_HASH_CONFIG", 0x19c28, 0 },
		{ "NUMHASHBKT", 20, 5 },
		{ "HASHTBLSIZE", 3, 17 },
	{ "LE_DB_MIN_NUM_ACTV_TCAM_ENTRIES", 0x19c2c, 0 },
	{ "LE_DB_MAX_NUM_HASH_ENTRIES", 0x19c70, 0 },
	{ "LE_DB_RSP_CODE_0", 0x19c74, 0 },
		{ "SUCCESS", 25, 5 },
		{ "TCAM_ACTV_SUCC", 20, 5 },
		{ "HASH_ACTV_SUCC", 15, 5 },
		{ "TCAM_SRVR_HIT", 10, 5 },
		{ "SRAM_SRVR_HIT", 5, 5 },
		{ "TCAM_ACTV_HIT", 0, 5 },
	{ "LE_DB_RSP_CODE_1", 0x19c78, 0 },
		{ "HASH_ACTV_HIT", 25, 5 },
		{ "MISS", 20, 5 },
		{ "NORM_FILT_HIT", 15, 5 },
		{ "HPRI_FILT_HIT", 10, 5 },
		{ "ACTV_OPEN_ERR", 5, 5 },
		{ "ACTV_FULL_ERR", 0, 5 },
	{ "LE_DB_RSP_CODE_2", 0x19c7c, 0 },
		{ "SRCH_RGN_HIT", 25, 5 },
		{ "CLIP_FAIL", 20, 5 },
		{ "LIP_ZERO_ERR", 15, 5 },
		{ "UNKNOWN_CMD", 10, 5 },
		{ "CMD_TID_ERR", 5, 5 },
		{ "INTERNAL_ERR", 0, 5 },
	{ "LE_DB_RSP_CODE_3", 0x19c80, 0 },
		{ "SRAM_SRVR_HIT_ACTF", 25, 5 },
		{ "TCAM_SRVR_HIT_ACTF", 20, 5 },
		{ "INVLDRD", 15, 5 },
		{ "TUPLZERO", 10, 5 },
	{ "LE_DB_HASH_TBL_BASE_ADDR", 0x19c30, 0 },
		{ "HASHTBLADDR", 4, 28 },
	{ "LE_TCAM_SIZE", 0x19c34, 0 },
		{ "MLL_mask", 2, 1 },
		{ "SIZE", 0, 2 },
	{ "LE_DB_INT_ENABLE", 0x19c38, 0 },
		{ "CacheIntPerr", 31, 1 },
		{ "CacheSramPerr", 30, 1 },
		{ "ClipSubErr", 29, 1 },
		{ "ClCamFifoerr", 28, 1 },
		{ "HashTblMemCrcErr", 27, 1 },
		{ "CTcamInvldEnt", 26, 1 },
		{ "TcamInvldEnt", 25, 1 },
		{ "TotCntErr", 24, 1 },
		{ "CmdPrsrIntErr", 23, 1 },
		{ "CmdTidErr", 22, 1 },
		{ "ActRgnFull", 21, 1 },
		{ "ActCntIPv6Tzero", 20, 1 },
		{ "ActCntIPv4Tzero", 19, 1 },
		{ "ActCntIPv6zero", 18, 1 },
		{ "ActCntIPv4zero", 17, 1 },
		{ "MaifwrIntPerr", 16, 1 },
		{ "HashTblMemAccErr", 15, 1 },
		{ "TcamCrcErr", 14, 1 },
		{ "TcamIntPerr", 13, 1 },
		{ "VfSramPerr", 12, 1 },
		{ "SrvSramPerr", 11, 1 },
		{ "SsramIntPerr", 10, 1 },
		{ "ClCamIntPerr", 9, 1 },
		{ "ClCamCrcParErr", 8, 1 },
		{ "HashTblAccFail", 7, 1 },
		{ "TcamAccFail", 6, 1 },
		{ "SrvSramAccFail", 5, 1 },
		{ "ClipTcamAccFail", 4, 1 },
		{ "UnknownCmd", 3, 1 },
		{ "LIP0", 2, 1 },
		{ "LIPMiss", 1, 1 },
		{ "PipelineErr", 0, 1 },
	{ "LE_DB_INT_CAUSE", 0x19c3c, 0 },
		{ "CacheIntPerr", 31, 1 },
		{ "CacheSramPerr", 30, 1 },
		{ "ClipSubErr", 29, 1 },
		{ "ClCamFifoerr", 28, 1 },
		{ "HashTblMemCrcErr", 27, 1 },
		{ "CTcamInvldEnt", 26, 1 },
		{ "TcamInvldEnt", 25, 1 },
		{ "TotCntErr", 24, 1 },
		{ "CmdPrsrIntErr", 23, 1 },
		{ "CmdTidErr", 22, 1 },
		{ "ActRgnFull", 21, 1 },
		{ "ActCntIPv6Tzero", 20, 1 },
		{ "ActCntIPv4Tzero", 19, 1 },
		{ "ActCntIPv6zero", 18, 1 },
		{ "ActCntIPv4zero", 17, 1 },
		{ "MaifwrIntPerr", 16, 1 },
		{ "HashTblMemAccErr", 15, 1 },
		{ "TcamCrcErr", 14, 1 },
		{ "TcamIntPerr", 13, 1 },
		{ "VfSramPerr", 12, 1 },
		{ "SrvSramPerr", 11, 1 },
		{ "SsramIntPerr", 10, 1 },
		{ "ClCamIntPerr", 9, 1 },
		{ "ClCamCrcParErr", 8, 1 },
		{ "HashTblAccFail", 7, 1 },
		{ "TcamAccFail", 6, 1 },
		{ "SrvSramAccFail", 5, 1 },
		{ "ClipTcamAccFail", 4, 1 },
		{ "UnknownCmd", 3, 1 },
		{ "LIP0", 2, 1 },
		{ "LIPMiss", 1, 1 },
		{ "PipelineErr", 0, 1 },
	{ "LE_PERR_ENABLE", 0x19cf8, 0 },
		{ "CacheIntPerr", 31, 1 },
		{ "CacheSramPerr", 30, 1 },
		{ "BkChkPeriod", 22, 8 },
		{ "TcamBkChkEn", 21, 1 },
		{ "MaifwrIntPerr", 16, 1 },
		{ "HashTblMemAccErr", 15, 1 },
		{ "TcamCrcErr", 14, 1 },
		{ "TcamIntPerr", 13, 1 },
		{ "VfSramPerr", 12, 1 },
		{ "SrvSramPerr", 11, 1 },
		{ "SsramIntPerr", 10, 1 },
		{ "ClCamIntPerr", 9, 1 },
		{ "ClCamCrcParErr", 8, 1 },
		{ "HashTblAccFail", 7, 1 },
		{ "TcamAccFail", 6, 1 },
		{ "SrvSramAccFail", 5, 1 },
		{ "ClipTcamAccFail", 4, 1 },
		{ "ClCamFifoerr", 2, 1 },
		{ "HashTblMemCrcErr", 1, 1 },
		{ "PipelineErr", 0, 1 },
	{ "LE_DB_ERR_CMD_TID", 0x19c48, 0 },
		{ "ERR_CID", 22, 8 },
		{ "ERR_PROT", 20, 2 },
		{ "ERR_TID", 0, 20 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c50, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c54, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c58, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c5c, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c60, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c64, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c68, 0 },
	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c6c, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19ca0, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19ca4, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19ca8, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19cac, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19cb0, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19cb4, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19cb8, 0 },
	{ "LE_DB_DBG_MATCH_DATA", 0x19cbc, 0 },
	{ "LE_CMM_CONFIG", 0x19cc0, 0 },
		{ "GlFl", 31, 1 },
		{ "WrCntIdle", 16, 15 },
		{ "RdThreshold", 8, 6 },
		{ "WrThrLevel2", 7, 1 },
		{ "WrThrLevel1", 6, 1 },
		{ "WrThrThreshEn", 5, 1 },
		{ "WrThrThresh", 0, 5 },
	{ "LE_CACHE_DBG", 0x19cc4, 0 },
	{ "LE_CACHE_WR_ALL_CNT", 0x19cc8, 0 },
	{ "LE_CACHE_WR_HIT_CNT", 0x19ccc, 0 },
	{ "LE_CACHE_RD_ALL_CNT", 0x19cd0, 0 },
	{ "LE_CACHE_RD_HIT_CNT", 0x19cd4, 0 },
	{ "LE_CACHE_MC_WR_CNT", 0x19cd8, 0 },
	{ "LE_CACHE_MC_RD_CNT", 0x19cdc, 0 },
	{ "LE_DB_DBG_MATCH_CMD_IDX_MASK", 0x19c40, 0 },
		{ "CMD_CMP_MASK", 20, 5 },
		{ "TID_CMP_MASK", 0, 20 },
	{ "LE_DB_DBG_MATCH_CMD_IDX_DATA", 0x19c44, 0 },
		{ "CMD_CMP", 20, 5 },
		{ "TID_CMP", 0, 20 },
	{ "LE_IND_ADDR", 0x19ce8, 0 },
	{ "LE_IND_DATA", 0x19cec, 0 },
	{ "LE_DB_DBGI_CONFIG", 0x19cf0, 0 },
		{ "DBGICMDRANGE", 22, 3 },
		{ "DBGICMDMSKREAD", 21, 1 },
		{ "DBGICMDSEARCH", 20, 1 },
		{ "DBGICMDREAD", 19, 1 },
		{ "DBGICMDLEARN", 18, 1 },
		{ "DBGICMDWRITE", 17, 1 },
		{ "DBGICMDIPv6", 16, 1 },
		{ "DBGICMDBUSY", 3, 1 },
		{ "DBGICMDSTRT", 2, 1 },
		{ "DBGICMDMODE", 0, 2 },
	{ "LE_DB_DBGI_REQ_CMD", 0x19cf4, 0 },
		{ "DBGICMD", 20, 4 },
		{ "DBGITID", 0, 20 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d00, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d04, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d08, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d0c, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d10, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d14, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d18, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d1c, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d20, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d24, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d28, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d2c, 0 },
	{ "LE_DB_DBGI_REQ_DATA", 0x19d30, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d50, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d54, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d58, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d5c, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d60, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d64, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d68, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d6c, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d70, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d74, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d78, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d7c, 0 },
	{ "LE_DB_DBGI_REQ_MASK", 0x19d80, 0 },
	{ "LE_DB_DBGI_RSP_STATUS", 0x19d94, 0 },
		{ "DBGIRspTid", 12, 20 },
		{ "DBGIRspMsg", 8, 4 },
		{ "DBGIRspLearn", 2, 1 },
		{ "DBGIRspHit", 1, 1 },
		{ "DBGIRspValid", 0, 1 },
	{ "LE_DBG_SEL", 0x19d98, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19da0, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19da4, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19da8, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dac, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19db0, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19db4, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19db8, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dbc, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dc0, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dc4, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dc8, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dcc, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dd0, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dd4, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19dd8, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19ddc, 0 },
	{ "LE_DB_DBGI_RSP_DATA", 0x19de0, 0 },
	{ "LE_DB_TCAM_TID_BASE", 0x19df0, 0 },
	{ "LE_DB_CLCAM_TID_BASE", 0x19df4, 0 },
	{ "LE_DB_HASH_TID_BASE", 0x19df8, 0 },
	{ "LE_DB_SSRAM_TID_BASE", 0x19dfc, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e00, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e04, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e08, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e0c, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e10, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e50, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e54, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e58, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e5c, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e60, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e64, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e68, 0 },
	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e6c, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea0, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea4, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea8, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eac, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb0, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb4, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb8, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ebc, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ec4, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ec8, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ecc, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed0, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed4, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed8, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19edc, 0 },
	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ee0, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19ee4, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19ee8, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19eec, 0 },
	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV4", 0x19ef0, 0 },
	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV4", 0x19ef4, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f04, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f08, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f0c, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f10, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f14, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f18, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f1c, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f20, 0 },
	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f24, 0 },
	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV6", 0x19f28, 0 },
	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV6", 0x19f2c, 0 },
	{ "LE_DB_SRVR_SRAM_CONFIG", 0x19f34, 0 },
		{ "PRI_HFILT", 4, 1 },
		{ "PRI_SRVR", 3, 1 },
		{ "PRI_FILT", 2, 1 },
		{ "SRVRINITBUSY", 1, 1 },
		{ "SRVRINIT", 0, 1 },
	{ "LE_DB_SRVR_VF_SRCH_TABLE_CTRL", 0x19f38, 0 },
		{ "VFLUTBUSY", 10, 1 },
		{ "VFLUTSTART", 9, 1 },
		{ "RDWR", 8, 1 },
		{ "VFINDEX", 0, 8 },
	{ "LE_DB_SRVR_VF_SRCH_TABLE_DATA", 0x19f3c, 0 },
		{ "SRCHHADDR", 12, 12 },
		{ "SRCHLADDR", 0, 12 },
	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f40, 0 },
	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f44, 0 },
	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f48, 0 },
	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f4c, 0 },
	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f50, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f90, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f94, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f98, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f9c, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa0, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa4, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa8, 0 },
	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fac, 0 },
	{ "LE_DEBUG_LA_CONFIG", 0x19fd0, 0 },
	{ "LE_REQ_DEBUG_LA_DATA", 0x19fd4, 0 },
	{ "LE_REQ_DEBUG_LA_WRPTR", 0x19fd8, 0 },
	{ "LE_RSP_DEBUG_LA_DATA", 0x19fdc, 0 },
	{ "LE_RSP_DEBUG_LA_WRPTR", 0x19fe0, 0 },
	{ "LE_DEBUG_LA_SEL_DATA", 0x19fe4, 0 },
	{ "LE_TCAM_BIST_CTRL", 0x19fb0, 0 },
		{ "rst_cb", 31, 1 },
		{ "cb_start", 0, 28 },
	{ "LE_TCAM_BIST_CB_PASS", 0x19fb4, 0 },
	{ "LE_TCAM_BIST_CB_BUSY", 0x19fbc, 0 },
	{ NULL }
};

struct reg_info t7_ncsi_regs[] = {
	{ "NCSI_PORT_CFGREG", 0x1a000, 0 },
		{ "WireEn", 28, 4 },
		{ "strp_crc", 24, 4 },
		{ "rx_halt", 22, 1 },
		{ "flush_rx_fifo", 21, 1 },
		{ "hw_arb_en", 20, 1 },
		{ "soft_pkg_sel", 19, 1 },
		{ "err_discard_en", 18, 1 },
		{ "max_pkt_size", 4, 14 },
		{ "rx_byte_swap", 3, 1 },
		{ "tx_byte_swap", 2, 1 },
		{ "xgmac0_en", 0, 1 },
	{ "NCSI_RST_CTRL", 0x1a004, 0 },
		{ "mac_ref_rst", 2, 1 },
		{ "mac_rx_rst", 1, 1 },
		{ "mac_tx_rst", 0, 1 },
	{ "NCSI_CH0_SADDR_LOW", 0x1a010, 0 },
	{ "NCSI_CH0_SADDR_HIGH", 0x1a014, 0 },
		{ "CHO_SADDR_EN", 31, 1 },
		{ "CH0_SADDR_HIGH", 0, 16 },
	{ "NCSI_CH1_SADDR_LOW", 0x1a018, 0 },
	{ "NCSI_CH1_SADDR_HIGH", 0x1a01c, 0 },
		{ "CH1_SADDR_EN", 31, 1 },
		{ "CH1_SADDR_HIGH", 0, 16 },
	{ "NCSI_CH2_SADDR_LOW", 0x1a020, 0 },
	{ "NCSI_CH2_SADDR_HIGH", 0x1a024, 0 },
		{ "CH2_SADDR_EN", 31, 1 },
		{ "CH2_SADDR_HIGH", 0, 16 },
	{ "NCSI_CH3_SADDR_LOW", 0x1a028, 0 },
	{ "NCSI_CH3_SADDR_HIGH", 0x1a02c, 0 },
		{ "CH3_SADDR_EN", 31, 1 },
		{ "CH3_SADDR_HIGH", 0, 16 },
	{ "NCSI_WORK_REQHDR_0", 0x1a030, 0 },
	{ "NCSI_WORK_REQHDR_1", 0x1a034, 0 },
	{ "NCSI_WORK_REQHDR_2", 0x1a038, 0 },
	{ "NCSI_WORK_REQHDR_3", 0x1a03c, 0 },
	{ "NCSI_MPS_HDR_LO", 0x1a040, 0 },
	{ "NCSI_MPS_HDR_HI", 0x1a044, 0 },
	{ "NCSI_CTL", 0x1a048, 0 },
		{ "STRIP_OVLAN", 3, 1 },
		{ "bmc_drop_non_bc", 2, 1 },
		{ "bmc_rx_fwd_all", 1, 1 },
		{ "FWD_BMC", 0, 1 },
	{ "NCSI_NCSI_ETYPE", 0x1a04c, 0 },
	{ "NCSI_RX_FIFO_CNT", 0x1a050, 0 },
	{ "NCSI_RX_ERR_CNT", 0x1a054, 0 },
	{ "NCSI_RX_OF_CNT", 0x1a058, 0 },
	{ "NCSI_RX_MS_CNT", 0x1a05c, 0 },
	{ "NCSI_RX_IE_CNT", 0x1a060, 0 },
	{ "NCSI_MPS_DEMUX_CNT", 0x1a064, 0 },
		{ "MPS2CIM_CNT", 16, 9 },
		{ "MPS2BMC_CNT", 0, 9 },
	{ "NCSI_CIM_DEMUX_CNT", 0x1a068, 0 },
		{ "CIM2MPS_CNT", 16, 9 },
		{ "CIM2BMC_CNT", 0, 9 },
	{ "NCSI_TX_FIFO_CNT", 0x1a06c, 0 },
	{ "NCSI_SE_CNT_CTL", 0x1a0b0, 0 },
	{ "NCSI_SE_CNT_MPS", 0x1a0b4, 0 },
	{ "NCSI_SE_CNT_CIM", 0x1a0b8, 0 },
	{ "NCSI_BUS_DEBUG", 0x1a0bc, 0 },
	{ "NCSI_LA_RDPTR", 0x1a0c0, 0 },
	{ "NCSI_LA_RDDATA", 0x1a0c4, 0 },
	{ "NCSI_LA_WRPTR", 0x1a0c8, 0 },
	{ "NCSI_LA_RESERVED", 0x1a0cc, 0 },
	{ "NCSI_LA_CTL", 0x1a0d0, 0 },
	{ "NCSI_INT_ENABLE", 0x1a0d4, 0 },
		{ "CIM2NC_perr", 9, 1 },
		{ "CIM_DM_prty_err", 8, 1 },
		{ "MPS_DM_prty_err", 7, 1 },
		{ "token", 6, 1 },
		{ "arb_done", 5, 1 },
		{ "arb_started", 4, 1 },
		{ "WOL", 3, 1 },
		{ "MACInt", 2, 1 },
		{ "TXFIFO_prty_err", 1, 1 },
		{ "RXFIFO_prty_err", 0, 1 },
	{ "NCSI_INT_CAUSE", 0x1a0d8, 0 },
		{ "CIM2NC_perr", 9, 1 },
		{ "CIM_DM_prty_err", 8, 1 },
		{ "MPS_DM_prty_err", 7, 1 },
		{ "token", 6, 1 },
		{ "arb_done", 5, 1 },
		{ "arb_started", 4, 1 },
		{ "WOL", 3, 1 },
		{ "MACInt", 2, 1 },
		{ "TXFIFO_prty_err", 1, 1 },
		{ "RXFIFO_prty_err", 0, 1 },
	{ "NCSI_STATUS", 0x1a0dc, 0 },
		{ "Master", 1, 1 },
		{ "arb_status", 0, 1 },
	{ "NCSI_PAUSE_CTRL", 0x1a0e0, 0 },
	{ "NCSI_PAUSE_TIMEOUT", 0x1a0e4, 0 },
	{ "NCSI_PAUSE_WM", 0x1a0ec, 0 },
		{ "PauseHWM", 16, 11 },
		{ "PauseLWM", 0, 11 },
	{ "NCSI_DEBUG", 0x1a0f0, 0 },
		{ "TxFIFO_empty", 4, 1 },
		{ "TxFIFO_full", 3, 1 },
		{ "PKG_ID", 0, 3 },
	{ "NCSI_PERR_INJECT", 0x1a0f4, 0 },
		{ "MemSel", 1, 1 },
		{ "InjectDataErr", 0, 1 },
	{ "NCSI_PERR_ENABLE", 0x1a0f8, 0 },
		{ "CIM2NC_perr", 9, 1 },
		{ "CIM_DM_prty_err", 8, 1 },
		{ "MPS_DM_prty_err", 7, 1 },
		{ "TXFIFO_prty_err", 1, 1 },
		{ "RXFIFO_prty_err", 0, 1 },
	{ "NCSI_MODE_SEL", 0x1a0fc, 0 },
	{ "NCSI_MACB_NETWORK_CTRL", 0x1a100, 0 },
		{ "TxSndZeroPause", 12, 1 },
		{ "TxSndPause", 11, 1 },
		{ "TxStop", 10, 1 },
		{ "TxStart", 9, 1 },
		{ "BackPress", 8, 1 },
		{ "StatWrEn", 7, 1 },
		{ "IncrStat", 6, 1 },
		{ "ClearStat", 5, 1 },
		{ "EnMgmtPort", 4, 1 },
		{ "TxEn", 3, 1 },
		{ "RxEn", 2, 1 },
		{ "LoopLocal", 1, 1 },
		{ "LoopPHY", 0, 1 },
	{ "NCSI_MACB_NETWORK_CFG", 0x1a104, 0 },
		{ "PClkDiv128", 22, 1 },
		{ "CopyPause", 21, 1 },
		{ "NonStdPreOK", 20, 1 },
		{ "NoFCS", 19, 1 },
		{ "RxEnHalfDup", 18, 1 },
		{ "NoCopyFCS", 17, 1 },
		{ "LenChkEn", 16, 1 },
		{ "RxBufOffset", 14, 2 },
		{ "PauseEn", 13, 1 },
		{ "RetryTest", 12, 1 },
		{ "PClkDiv", 10, 2 },
		{ "ExtClass", 9, 1 },
		{ "En1536Frame", 8, 1 },
		{ "UCastHashEn", 7, 1 },
		{ "MCastHashEn", 6, 1 },
		{ "RxBCastDis", 5, 1 },
		{ "CopyAllFrames", 4, 1 },
		{ "JumboEn", 3, 1 },
		{ "SerEn", 2, 1 },
		{ "FullDuplex", 1, 1 },
		{ "Speed", 0, 1 },
	{ "NCSI_MACB_NETWORK_STATUS", 0x1a108, 0 },
		{ "PHYMgmtStatus", 2, 1 },
		{ "MDIStatus", 1, 1 },
		{ "LinkStatus", 0, 1 },
	{ "NCSI_MACB_TX_STATUS", 0x1a114, 0 },
		{ "UnderrunErr", 6, 1 },
		{ "TxComplete", 5, 1 },
		{ "BufferExhausted", 4, 1 },
		{ "TxProgress", 3, 1 },
		{ "RetryLimit", 2, 1 },
		{ "ColEvent", 1, 1 },
		{ "UsedBitRead", 0, 1 },
	{ "NCSI_MACB_RX_BUF_QPTR", 0x1a118, 0 },
		{ "RxBufQPtr", 2, 30 },
	{ "NCSI_MACB_TX_BUF_QPTR", 0x1a11c, 0 },
		{ "TxBufQPtr", 2, 30 },
	{ "NCSI_MACB_RX_STATUS", 0x1a120, 0 },
		{ "RxOverrunErr", 2, 1 },
		{ "FrameRcvd", 1, 1 },
		{ "NoRxBuf", 0, 1 },
	{ "NCSI_MACB_INT_STATUS", 0x1a124, 0 },
		{ "PauseTimeZero", 13, 1 },
		{ "PauseRcvd", 12, 1 },
		{ "HRespNotOK", 11, 1 },
		{ "RxOverrun", 10, 1 },
		{ "LinkChange", 9, 1 },
		{ "TxComplete", 7, 1 },
		{ "TxBufErr", 6, 1 },
		{ "RetryLimitErr", 5, 1 },
		{ "TxBufUnderrun", 4, 1 },
		{ "TxUsedBitRead", 3, 1 },
		{ "RxUsedBitRead", 2, 1 },
		{ "RxComplete", 1, 1 },
		{ "MgmtFrameSent", 0, 1 },
	{ "NCSI_MACB_INT_EN", 0x1a128, 0 },
		{ "PauseTimeZero", 13, 1 },
		{ "PauseRcvd", 12, 1 },
		{ "HRespNotOK", 11, 1 },
		{ "RxOverrun", 10, 1 },
		{ "LinkChange", 9, 1 },
		{ "TxComplete", 7, 1 },
		{ "TxBufErr", 6, 1 },
		{ "RetryLimitErr", 5, 1 },
		{ "TxBufUnderrun", 4, 1 },
		{ "TxUsedBitRead", 3, 1 },
		{ "RxUsedBitRead", 2, 1 },
		{ "RxComplete", 1, 1 },
		{ "MgmtFrameSent", 0, 1 },
	{ "NCSI_MACB_INT_DIS", 0x1a12c, 0 },
		{ "PauseTimeZero", 13, 1 },
		{ "PauseRcvd", 12, 1 },
		{ "HRespNotOK", 11, 1 },
		{ "RxOverrun", 10, 1 },
		{ "LinkChange", 9, 1 },
		{ "TxComplete", 7, 1 },
		{ "TxBufErr", 6, 1 },
		{ "RetryLimitErr", 5, 1 },
		{ "TxBufUnderrun", 4, 1 },
		{ "TxUsedBitRead", 3, 1 },
		{ "RxUsedBitRead", 2, 1 },
		{ "RxComplete", 1, 1 },
		{ "MgmtFrameSent", 0, 1 },
	{ "NCSI_MACB_INT_MASK", 0x1a130, 0 },
		{ "PauseTimeZero", 13, 1 },
		{ "PauseRcvd", 12, 1 },
		{ "HRespNotOK", 11, 1 },
		{ "RxOverrun", 10, 1 },
		{ "LinkChange", 9, 1 },
		{ "TxComplete", 7, 1 },
		{ "TxBufErr", 6, 1 },
		{ "RetryLimitErr", 5, 1 },
		{ "TxBufUnderrun", 4, 1 },
		{ "TxUsedBitRead", 3, 1 },
		{ "RxUsedBitRead", 2, 1 },
		{ "RxComplete", 1, 1 },
		{ "MgmtFrameSent", 0, 1 },
	{ "NCSI_MACB_PAUSE_TIME", 0x1a138, 0 },
	{ "NCSI_MACB_PAUSE_FRAMES_RCVD", 0x1a13c, 0 },
	{ "NCSI_MACB_TX_FRAMES_OK", 0x1a140, 0 },
	{ "NCSI_MACB_SINGLE_COL_FRAMES", 0x1a144, 0 },
	{ "NCSI_MACB_MUL_COL_FRAMES", 0x1a148, 0 },
	{ "NCSI_MACB_RX_FRAMES_OK", 0x1a14c, 0 },
	{ "NCSI_MACB_FCS_ERR", 0x1a150, 0 },
	{ "NCSI_MACB_ALIGN_ERR", 0x1a154, 0 },
	{ "NCSI_MACB_DEF_TX_FRAMES", 0x1a158, 0 },
	{ "NCSI_MACB_LATE_COL", 0x1a15c, 0 },
	{ "NCSI_MACB_EXCESSIVE_COL", 0x1a160, 0 },
	{ "NCSI_MACB_TX_UNDERRUN_ERR", 0x1a164, 0 },
	{ "NCSI_MACB_CARRIER_SENSE_ERR", 0x1a168, 0 },
	{ "NCSI_MACB_RX_RESOURCE_ERR", 0x1a16c, 0 },
	{ "NCSI_MACB_RX_OVERRUN_ERR", 0x1a170, 0 },
	{ "NCSI_MACB_RX_SYMBOL_ERR", 0x1a174, 0 },
	{ "NCSI_MACB_RX_OVERSIZE_FRAME", 0x1a178, 0 },
	{ "NCSI_MACB_RX_JABBER_ERR", 0x1a17c, 0 },
	{ "NCSI_MACB_RX_UNDERSIZE_FRAME", 0x1a180, 0 },
	{ "NCSI_MACB_SQE_TEST_ERR", 0x1a184, 0 },
	{ "NCSI_MACB_LENGTH_ERR", 0x1a188, 0 },
	{ "NCSI_MACB_TX_PAUSE_FRAMES", 0x1a18c, 0 },
	{ "NCSI_MACB_HASH_LOW", 0x1a190, 0 },
	{ "NCSI_MACB_HASH_HIGH", 0x1a194, 0 },
	{ "NCSI_MACB_SPECIFIC_1_LOW", 0x1a198, 0 },
	{ "NCSI_MACB_SPECIFIC_1_HIGH", 0x1a19c, 0 },
	{ "NCSI_MACB_SPECIFIC_2_LOW", 0x1a1a0, 0 },
	{ "NCSI_MACB_SPECIFIC_2_HIGH", 0x1a1a4, 0 },
	{ "NCSI_MACB_SPECIFIC_3_LOW", 0x1a1a8, 0 },
	{ "NCSI_MACB_SPECIFIC_3_HIGH", 0x1a1ac, 0 },
	{ "NCSI_MACB_SPECIFIC_4_LOW", 0x1a1b0, 0 },
	{ "NCSI_MACB_SPECIFIC_4_HIGH", 0x1a1b4, 0 },
	{ "NCSI_MACB_TYPE_ID", 0x1a1b8, 0 },
	{ "NCSI_MACB_TX_PAUSE_QUANTUM", 0x1a1bc, 0 },
	{ "NCSI_MACB_USER_IO", 0x1a1c0, 0 },
		{ "UserProgInput", 16, 16 },
		{ "UserProgOutput", 0, 16 },
	{ "NCSI_MACB_WOL_CFG", 0x1a1c4, 0 },
		{ "MCHashEn", 19, 1 },
		{ "Specific1En", 18, 1 },
		{ "ARPEn", 17, 1 },
		{ "MagicPktEn", 16, 1 },
		{ "ARPIPAddr", 0, 16 },
	{ "NCSI_MACB_REV_STATUS", 0x1a1fc, 0 },
		{ "PartRef", 16, 16 },
		{ "DesRev", 0, 16 },
	{ "NCSI_TX_CTRL", 0x1a200, 0 },
		{ "SendPause", 2, 1 },
		{ "SendZeroPause", 1, 1 },
		{ "TxEn", 0, 1 },
	{ "NCSI_TX_CFG", 0x1a204, 0 },
		{ "CfgClkSpeed", 2, 3 },
		{ "StretchMode", 1, 1 },
		{ "TxPauseEn", 0, 1 },
	{ "NCSI_TX_PAUSE_QUANTA", 0x1a208, 0 },
	{ "NCSI_RX_CTRL", 0x1a20c, 0 },
	{ "NCSI_RX_CFG", 0x1a210, 0 },
		{ "Con802_3Preamble", 12, 1 },
		{ "EnNon802_3Preamble", 11, 1 },
		{ "CopyPreamble", 10, 1 },
		{ "DisPauseFrames", 9, 1 },
		{ "En1536BFrames", 8, 1 },
		{ "EnJumbo", 7, 1 },
		{ "RmFCS", 6, 1 },
		{ "DisNonVlan", 5, 1 },
		{ "EnExtMatch", 4, 1 },
		{ "EnHashUcast", 3, 1 },
		{ "EnHashMcast", 2, 1 },
		{ "DisBCast", 1, 1 },
		{ "CopyAllFrames", 0, 1 },
	{ "NCSI_RX_HASH_LOW", 0x1a214, 0 },
	{ "NCSI_RX_HASH_HIGH", 0x1a218, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_1", 0x1a21c, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_1", 0x1a220, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_2", 0x1a224, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_2", 0x1a228, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_3", 0x1a22c, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_3", 0x1a230, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_4", 0x1a234, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_4", 0x1a238, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_5", 0x1a23c, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_5", 0x1a240, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_6", 0x1a244, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_6", 0x1a248, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_7", 0x1a24c, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_7", 0x1a250, 0 },
	{ "NCSI_RX_EXACT_MATCH_LOW_8", 0x1a254, 0 },
	{ "NCSI_RX_EXACT_MATCH_HIGH_8", 0x1a258, 0 },
	{ "NCSI_RX_TYPE_MATCH_1", 0x1a25c, 0 },
		{ "EnTypeMatch", 31, 1 },
		{ "type", 0, 16 },
	{ "NCSI_RX_TYPE_MATCH_2", 0x1a260, 0 },
		{ "EnTypeMatch", 31, 1 },
		{ "type", 0, 16 },
	{ "NCSI_RX_TYPE_MATCH_3", 0x1a264, 0 },
		{ "EnTypeMatch", 31, 1 },
		{ "type", 0, 16 },
	{ "NCSI_RX_TYPE_MATCH_4", 0x1a268, 0 },
		{ "EnTypeMatch", 31, 1 },
		{ "type", 0, 16 },
	{ "NCSI_INT_STATUS", 0x1a26c, 0 },
		{ "XGMIIExtInt", 10, 1 },
		{ "LinkFaultChange", 9, 1 },
		{ "PhyFrameComplete", 8, 1 },
		{ "PauseFrameTxmt", 7, 1 },
		{ "PauseCntrTimeOut", 6, 1 },
		{ "Non0PauseRcvd", 5, 1 },
		{ "StatOFlow", 4, 1 },
		{ "TxErrFIFO", 3, 1 },
		{ "TxUFlow", 2, 1 },
		{ "FrameTxmt", 1, 1 },
		{ "FrameRcvd", 0, 1 },
	{ "NCSI_XGM_INT_MASK", 0x1a270, 0 },
		{ "XGMIIExtInt", 10, 1 },
		{ "LinkFaultChange", 9, 1 },
		{ "PhyFrameComplete", 8, 1 },
		{ "PauseFrameTxmt", 7, 1 },
		{ "PauseCntrTimeOut", 6, 1 },
		{ "Non0PauseRcvd", 5, 1 },
		{ "StatOFlow", 4, 1 },
		{ "TxErrFIFO", 3, 1 },
		{ "TxUFlow", 2, 1 },
		{ "FrameTxmt", 1, 1 },
		{ "FrameRcvd", 0, 1 },
	{ "NCSI_XGM_INT_ENABLE", 0x1a274, 0 },
		{ "XGMIIExtInt", 10, 1 },
		{ "LinkFaultChange", 9, 1 },
		{ "PhyFrameComplete", 8, 1 },
		{ "PauseFrameTxmt", 7, 1 },
		{ "PauseCntrTimeOut", 6, 1 },
		{ "Non0PauseRcvd", 5, 1 },
		{ "StatOFlow", 4, 1 },
		{ "TxErrFIFO", 3, 1 },
		{ "TxUFlow", 2, 1 },
		{ "FrameTxmt", 1, 1 },
		{ "FrameRcvd", 0, 1 },
	{ "NCSI_XGM_INT_DISABLE", 0x1a278, 0 },
		{ "XGMIIExtInt", 10, 1 },
		{ "LinkFaultChange", 9, 1 },
		{ "PhyFrameComplete", 8, 1 },
		{ "PauseFrameTxmt", 7, 1 },
		{ "PauseCntrTimeOut", 6, 1 },
		{ "Non0PauseRcvd", 5, 1 },
		{ "StatOFlow", 4, 1 },
		{ "TxErrFIFO", 3, 1 },
		{ "TxUFlow", 2, 1 },
		{ "FrameTxmt", 1, 1 },
		{ "FrameRcvd", 0, 1 },
	{ "NCSI_TX_PAUSE_TIMER", 0x1a27c, 0 },
	{ "NCSI_STAT_CTRL", 0x1a280, 0 },
		{ "ReadSnpShot", 4, 1 },
		{ "TakeSnpShot", 3, 1 },
		{ "ClrStats", 2, 1 },
		{ "IncrStats", 1, 1 },
		{ "EnTestModeWr", 0, 1 },
	{ "NCSI_RXFIFO_CFG", 0x1a284, 0 },
		{ "RxFIFO_empty", 31, 1 },
		{ "RxFIFO_full", 30, 1 },
		{ "RxFIFOPauseHWM", 17, 12 },
		{ "RxFIFOPauseLWM", 5, 12 },
		{ "ForcedPause", 4, 1 },
		{ "ExternLoopback", 3, 1 },
		{ "RxByteSwap", 2, 1 },
		{ "RxStrFrwrd", 1, 1 },
		{ "DisErrFrames", 0, 1 },
	{ "NCSI_TXFIFO_CFG", 0x1a288, 0 },
		{ "TxFIFO_empty", 31, 1 },
		{ "TxFIFO_full", 30, 1 },
		{ "UnderunFix", 22, 1 },
		{ "EnDropPkt", 21, 1 },
		{ "TxIPG", 13, 8 },
		{ "TxFIFOThresh", 4, 9 },
		{ "InternLoopback", 3, 1 },
		{ "TxByteSwap", 2, 1 },
		{ "DisCRC", 1, 1 },
		{ "DisPreAmble", 0, 1 },
	{ "NCSI_SLOW_TIMER", 0x1a28c, 0 },
		{ "PauseSlowTimerEn", 31, 1 },
		{ "PauseSlowTimer", 0, 20 },
	{ "NCSI_PAUSE_TIMER", 0x1a290, 0 },
	{ "NCSI_XAUI_PCS_TEST", 0x1a294, 0 },
		{ "TestPattern", 1, 2 },
		{ "EnTest", 0, 1 },
	{ "NCSI_RGMII_CTRL", 0x1a298, 0 },
		{ "PhAlignFIFOThresh", 1, 2 },
		{ "TxClk90Shift", 0, 1 },
	{ "NCSI_RGMII_IMP", 0x1a29c, 0 },
		{ "CalReset", 8, 1 },
		{ "CalUpdate", 7, 1 },
		{ "ImpSetUpdate", 6, 1 },
		{ "RGMIIImpPD", 3, 3 },
		{ "RGMIIImpPU", 0, 3 },
	{ "NCSI_RX_MAX_PKT_SIZE", 0x1a2a8, 0 },
		{ "RxMaxFramerSize", 17, 14 },
		{ "RxEnErrorGather", 16, 1 },
		{ "RxEnSingleFlit", 15, 1 },
		{ "RxEnFramer", 14, 1 },
		{ "RxMaxPktSize", 0, 14 },
	{ "NCSI_RESET_CTRL", 0x1a2ac, 0 },
		{ "XGMAC_STOP_EN", 4, 1 },
		{ "XG2G_Reset_", 3, 1 },
		{ "RGMII_Reset_", 2, 1 },
		{ "PCS_Reset_", 1, 1 },
		{ "MAC_Reset_", 0, 1 },
	{ "NCSI_XAUI1G_CTRL", 0x1a2b0, 0 },
	{ "NCSI_SERDES_LANE_CTRL", 0x1a2b4, 0 },
		{ "LaneReversal", 8, 1 },
		{ "TxPolarity", 4, 4 },
		{ "RxPolarity", 0, 4 },
	{ "NCSI_PORT_CFG", 0x1a2b8, 0 },
		{ "SafeSpeedChange", 4, 1 },
		{ "ClkDivReset_", 3, 1 },
		{ "PortSpeed", 1, 2 },
		{ "EnRGMII", 0, 1 },
	{ "NCSI_EPIO_DATA0", 0x1a2c0, 0 },
	{ "NCSI_EPIO_DATA1", 0x1a2c4, 0 },
	{ "NCSI_EPIO_DATA2", 0x1a2c8, 0 },
	{ "NCSI_EPIO_DATA3", 0x1a2cc, 0 },
	{ "NCSI_EPIO_OP", 0x1a2d0, 0 },
		{ "PIO_Ready", 31, 1 },
		{ "PIO_WrRd", 24, 1 },
		{ "PIO_Address", 0, 8 },
	{ "NCSI_XGMAC0_INT_ENABLE", 0x1a2d4, 0 },
		{ "XAUIPCSDECErr", 24, 1 },
		{ "RGMIIRxFIFOOverflow", 23, 1 },
		{ "RGMIIRxFIFOUnderflow", 22, 1 },
		{ "RxPktSizeError", 21, 1 },
		{ "WOLPatDetected", 20, 1 },
		{ "TXFIFO_prty_err", 17, 3 },
		{ "RXFIFO_prty_err", 14, 3 },
		{ "TXFIFO_underrun", 13, 1 },
		{ "RXFIFO_overflow", 12, 1 },
		{ "SERDESBISTErr", 8, 4 },
		{ "SERDESLowSigChange", 4, 4 },
		{ "XAUIPCSCTCErr", 3, 1 },
		{ "XAUIPCSAlignChange", 2, 1 },
		{ "RGMIILinkStsChange", 1, 1 },
		{ "xgm_int", 0, 1 },
	{ "NCSI_XGMAC0_INT_CAUSE", 0x1a2d8, 0 },
		{ "XAUIPCSDECErr", 24, 1 },
		{ "RGMIIRxFIFOOverflow", 23, 1 },
		{ "RGMIIRxFIFOUnderflow", 22, 1 },
		{ "RxPktSizeError", 21, 1 },
		{ "WOLPatDetected", 20, 1 },
		{ "TXFIFO_prty_err", 17, 3 },
		{ "RXFIFO_prty_err", 14, 3 },
		{ "TXFIFO_underrun", 13, 1 },
		{ "RXFIFO_overflow", 12, 1 },
		{ "SERDESBISTErr", 8, 4 },
		{ "SERDESLowSigChange", 4, 4 },
		{ "XAUIPCSCTCErr", 3, 1 },
		{ "XAUIPCSAlignChange", 2, 1 },
		{ "RGMIILinkStsChange", 1, 1 },
		{ "xgm_int", 0, 1 },
	{ "NCSI_XAUI_ACT_CTRL", 0x1a2dc, 0 },
		{ "TxEn", 1, 1 },
		{ "RxEn", 0, 1 },
	{ "NCSI_SERDES_CTRL0", 0x1a2e0, 0 },
		{ "IntSerLPBK3", 27, 1 },
		{ "IntSerLPBK2", 26, 1 },
		{ "IntSerLPBK1", 25, 1 },
		{ "IntSerLPBK0", 24, 1 },
		{ "Reset3", 23, 1 },
		{ "Reset2", 22, 1 },
		{ "Reset1", 21, 1 },
		{ "Reset0", 20, 1 },
		{ "Pwrdn3", 19, 1 },
		{ "Pwrdn2", 18, 1 },
		{ "Pwrdn1", 17, 1 },
		{ "Pwrdn0", 16, 1 },
		{ "ResetPLL23", 15, 1 },
		{ "ResetPLL01", 14, 1 },
		{ "PW23", 12, 2 },
		{ "PW01", 10, 2 },
		{ "Deq", 6, 4 },
		{ "Dtx", 2, 4 },
		{ "LoDrv", 1, 1 },
		{ "HiDrv", 0, 1 },
	{ "NCSI_SERDES_CTRL1", 0x1a2e4, 0 },
		{ "FmOffset3", 19, 5 },
		{ "FmOffsetEn3", 18, 1 },
		{ "FmOffset2", 13, 5 },
		{ "FmOffsetEn2", 12, 1 },
		{ "FmOffset1", 7, 5 },
		{ "FmOffsetEn1", 6, 1 },
		{ "FmOffset0", 1, 5 },
		{ "FmOffsetEn0", 0, 1 },
	{ "NCSI_SERDES_CTRL2", 0x1a2e8, 0 },
		{ "DnIn3", 11, 1 },
		{ "UpIn3", 10, 1 },
		{ "RxSlave3", 9, 1 },
		{ "DnIn2", 8, 1 },
		{ "UpIn2", 7, 1 },
		{ "RxSlave2", 6, 1 },
		{ "DnIn1", 5, 1 },
		{ "UpIn1", 4, 1 },
		{ "RxSlave1", 3, 1 },
		{ "DnIn0", 2, 1 },
		{ "UpIn0", 1, 1 },
		{ "RxSlave0", 0, 1 },
	{ "NCSI_SERDES_CTRL3", 0x1a2ec, 0 },
		{ "ExtBISTChkErrClr3", 31, 1 },
		{ "ExtBISTChkEn3", 30, 1 },
		{ "ExtBISTGenEn3", 29, 1 },
		{ "ExtBISTPat3", 26, 3 },
		{ "ExtParReset3", 25, 1 },
		{ "ExtParLPBK3", 24, 1 },
		{ "ExtBISTChkErrClr2", 23, 1 },
		{ "ExtBISTChkEn2", 22, 1 },
		{ "ExtBISTGenEn2", 21, 1 },
		{ "ExtBISTPat2", 18, 3 },
		{ "ExtParReset2", 17, 1 },
		{ "ExtParLPBK2", 16, 1 },
		{ "ExtBISTChkErrClr1", 15, 1 },
		{ "ExtBISTChkEn1", 14, 1 },
		{ "ExtBISTGenEn1", 13, 1 },
		{ "ExtBISTPat1", 10, 3 },
		{ "ExtParReset1", 9, 1 },
		{ "ExtParLPBK1", 8, 1 },
		{ "ExtBISTChkErrClr0", 7, 1 },
		{ "ExtBISTChkEn0", 6, 1 },
		{ "ExtBISTGenEn0", 5, 1 },
		{ "ExtBISTPat0", 2, 3 },
		{ "ExtParReset0", 1, 1 },
		{ "ExtParLPBK0", 0, 1 },
	{ "NCSI_SERDES_STAT0", 0x1a2f0, 0 },
		{ "ExtBISTChkErrCnt0", 4, 24 },
		{ "ExtBISTChkFmd0", 3, 1 },
		{ "LowSigForceEn0", 2, 1 },
		{ "LowSigForceValue0", 1, 1 },
		{ "LowSig0", 0, 1 },
	{ "NCSI_SERDES_STAT1", 0x1a2f4, 0 },
		{ "ExtBISTChkErrCnt1", 4, 24 },
		{ "ExtBISTChkFmd1", 3, 1 },
		{ "LowSigForceEn1", 2, 1 },
		{ "LowSigForceValue1", 1, 1 },
		{ "LowSig1", 0, 1 },
	{ "NCSI_SERDES_STAT2", 0x1a2f8, 0 },
		{ "ExtBISTChkErrCnt2", 4, 24 },
		{ "ExtBISTChkFmd2", 3, 1 },
		{ "LowSigForceEn2", 2, 1 },
		{ "LowSigForceValue2", 1, 1 },
		{ "LowSig2", 0, 1 },
	{ "NCSI_SERDES_STAT3", 0x1a2fc, 0 },
		{ "ExtBISTChkErrCnt3", 4, 24 },
		{ "ExtBISTChkFmd3", 3, 1 },
		{ "LowSigForceEn3", 2, 1 },
		{ "LowSigForceValue3", 1, 1 },
		{ "LowSig3", 0, 1 },
	{ "NCSI_STAT_TX_BYTE_LOW", 0x1a300, 0 },
	{ "NCSI_STAT_TX_BYTE_HIGH", 0x1a304, 0 },
	{ "NCSI_STAT_TX_FRAME_LOW", 0x1a308, 0 },
	{ "NCSI_STAT_TX_FRAME_HIGH", 0x1a30c, 0 },
	{ "NCSI_STAT_TX_BCAST", 0x1a310, 0 },
	{ "NCSI_STAT_TX_MCAST", 0x1a314, 0 },
	{ "NCSI_STAT_TX_PAUSE", 0x1a318, 0 },
	{ "NCSI_STAT_TX_64B_FRAMES", 0x1a31c, 0 },
	{ "NCSI_STAT_TX_65_127B_FRAMES", 0x1a320, 0 },
	{ "NCSI_STAT_TX_128_255B_FRAMES", 0x1a324, 0 },
	{ "NCSI_STAT_TX_256_511B_FRAMES", 0x1a328, 0 },
	{ "NCSI_STAT_TX_512_1023B_FRAMES", 0x1a32c, 0 },
	{ "NCSI_STAT_TX_1024_1518B_FRAMES", 0x1a330, 0 },
	{ "NCSI_STAT_TX_1519_MAXB_FRAMES", 0x1a334, 0 },
	{ "NCSI_STAT_TX_ERR_FRAMES", 0x1a338, 0 },
	{ "NCSI_STAT_RX_BYTES_LOW", 0x1a33c, 0 },
	{ "NCSI_STAT_RX_BYTES_HIGH", 0x1a340, 0 },
	{ "NCSI_STAT_RX_FRAMES_LOW", 0x1a344, 0 },
	{ "NCSI_STAT_RX_FRAMES_HIGH", 0x1a348, 0 },
	{ "NCSI_STAT_RX_BCAST_FRAMES", 0x1a34c, 0 },
	{ "NCSI_STAT_RX_MCAST_FRAMES", 0x1a350, 0 },
	{ "NCSI_STAT_RX_PAUSE_FRAMES", 0x1a354, 0 },
	{ "NCSI_STAT_RX_64B_FRAMES", 0x1a358, 0 },
	{ "NCSI_STAT_RX_65_127B_FRAMES", 0x1a35c, 0 },
	{ "NCSI_STAT_RX_128_255B_FRAMES", 0x1a360, 0 },
	{ "NCSI_STAT_RX_256_511B_FRAMES", 0x1a364, 0 },
	{ "NCSI_STAT_RX_512_1023B_FRAMES", 0x1a368, 0 },
	{ "NCSI_STAT_RX_1024_1518B_FRAMES", 0x1a36c, 0 },
	{ "NCSI_STAT_RX_1519_MAXB_FRAMES", 0x1a370, 0 },
	{ "NCSI_STAT_RX_SHORT_FRAMES", 0x1a374, 0 },
	{ "NCSI_STAT_RX_OVERSIZE_FRAMES", 0x1a378, 0 },
	{ "NCSI_STAT_RX_JABBER_FRAMES", 0x1a37c, 0 },
	{ "NCSI_STAT_RX_CRC_ERR_FRAMES", 0x1a380, 0 },
	{ "NCSI_STAT_RX_LENGTH_ERR_FRAMES", 0x1a384, 0 },
	{ "NCSI_STAT_RX_SYM_CODE_ERR_FRAMES", 0x1a388, 0 },
	{ "NCSI_XAUI_PCS_ERR", 0x1a398, 0 },
		{ "PCS_SyncStatus", 5, 4 },
		{ "PCS_CTCFIFOErr", 1, 4 },
		{ "PCS_NotAligned", 0, 1 },
	{ "NCSI_RGMII_STATUS", 0x1a39c, 0 },
		{ "GMIIDuplex", 3, 1 },
		{ "GMIISpeed", 1, 2 },
		{ "GMIILinkStatus", 0, 1 },
	{ "NCSI_WOL_STATUS", 0x1a3a0, 0 },
		{ "PatDetected", 31, 1 },
		{ "MatchedFilter", 0, 3 },
	{ "NCSI_RX_MAX_PKT_SIZE_ERR_CNT", 0x1a3a4, 0 },
	{ "NCSI_TX_SPI4_SOP_EOP_CNT", 0x1a3a8, 0 },
		{ "TxSPI4SopCnt", 16, 16 },
		{ "TxSPI4EopCnt", 0, 16 },
	{ "NCSI_RX_SPI4_SOP_EOP_CNT", 0x1a3ac, 0 },
		{ "RxSPI4SopCnt", 16, 16 },
		{ "RxSPI4EopCnt", 0, 16 },
	{ NULL }
};

struct reg_info t7_mac_t7_regs[] = {
	{ "MAC_PORT_CFG", 0x30800, 0 },
		{ "SinkTx", 27, 1 },
		{ "SinkTxOnLinkDown", 26, 1 },
		{ "port_map", 21, 3 },
		{ "Smux_Rx_Loop", 17, 4 },
		{ "Signal_Det", 15, 1 },
		{ "cfg_mac_2_mps_full", 13, 1 },
		{ "mps_full_sel", 12, 1 },
		{ "SmuxTxSel", 8, 4 },
		{ "PortSpeed", 4, 4 },
		{ "Rx_Byte_Swap", 3, 1 },
		{ "Tx_Byte_Swap", 2, 1 },
		{ "debug_tx_rx_sel", 1, 1 },
	{ "MAC_PORT_RESET_CTRL", 0x30804, 0 },
		{ "EEE_RESET", 30, 1 },
		{ "PTP_TIMER", 29, 1 },
		{ "MtipRefReset", 28, 1 },
		{ "MtipRegReset", 25, 1 },
		{ "reset_reg_clk_i", 24, 1 },
		{ "TXIF_Reset", 12, 1 },
		{ "RXIF_Reset", 11, 1 },
		{ "AuxExt_Reset", 10, 1 },
		{ "WOL_Reset", 2, 1 },
	{ "MAC_PORT_LED_CFG", 0x30808, 0 },
		{ "Led1_Cfg1", 15, 3 },
		{ "Led0_Cfg1", 12, 3 },
		{ "Led1_tlo", 11, 1 },
		{ "Led1_thi", 10, 1 },
		{ "Led0_tlo", 9, 1 },
		{ "Led0_thi", 8, 1 },
		{ "Led1_Cfg", 5, 3 },
		{ "Led1_Polarity_Inv", 4, 1 },
		{ "Led0_Cfg", 1, 3 },
		{ "Led0_Polarity_Inv", 0, 1 },
	{ "MAC_PORT_LED_COUNTHI", 0x3080c, 0 },
	{ "MAC_PORT_LED_COUNTLO", 0x30810, 0 },
	{ "MAC_PORT_CFG3", 0x30814, 0 },
		{ "FCSDisCtrl", 25, 1 },
		{ "SigDetCtrl", 24, 1 },
		{ "se_clr", 21, 1 },
	{ "MAC_PORT_CFG2", 0x30818, 0 },
		{ "InstanceNum", 22, 2 },
		{ "StopOnPerr", 21, 1 },
		{ "PatEn", 18, 1 },
		{ "MagicEn", 17, 1 },
	{ "MAC_PORT_PKT_COUNT", 0x3081c, 0 },
		{ "tx_sop_count", 24, 8 },
		{ "tx_eop_count", 16, 8 },
		{ "rx_sop_count", 8, 8 },
		{ "rx_eop_count", 0, 8 },
	{ "MAC_PORT_MAGIC_MACID_LO", 0x30820, 0 },
	{ "MAC_PORT_MAGIC_MACID_HI", 0x30824, 0 },
	{ "MAC_PORT_LINK_STATUS", 0x30828, 0 },
		{ "egr_se_cnt_Err", 9, 1 },
		{ "ingr_se_cnt_Err", 8, 1 },
		{ "hi_ber", 7, 1 },
		{ "an_done", 6, 1 },
		{ "align_done", 5, 1 },
		{ "block_lock", 4, 1 },
		{ "remflt", 3, 1 },
		{ "locflt", 2, 1 },
		{ "linkup", 1, 1 },
		{ "linkdn", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN_100G", 0x3082c, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE_100G", 0x30830, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_ENABLE_100G", 0x30834, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_0", 0x30838, 0 },
		{ "peer_delay_val", 31, 1 },
		{ "peer_delay", 1, 30 },
		{ "mode1s_ena", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_1", 0x3083c, 0 },
		{ "tx_stop", 25, 1 },
		{ "mode1s_ena", 24, 1 },
		{ "tx_ts_id", 12, 12 },
		{ "tx_li_fault", 11, 1 },
		{ "xoff_gen", 3, 8 },
		{ "lpi_txhold", 2, 1 },
		{ "tx_rem_fault", 1, 1 },
		{ "tx_loc_fault", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_2", 0x30840, 0 },
	{ "MAC_PORT_MAC10G100G_STATUS", 0x30844, 0 },
		{ "reg_lowp", 21, 1 },
		{ "li_fault", 20, 1 },
		{ "tx_isidle", 19, 1 },
		{ "tx_underflow", 18, 1 },
		{ "tx_empty", 17, 1 },
		{ "rem_fault", 16, 1 },
		{ "reg_ts_avail", 15, 1 },
		{ "phy_txena", 14, 1 },
		{ "pfc_mode", 13, 1 },
		{ "pause_on", 5, 8 },
		{ "mac_pause_en", 4, 1 },
		{ "mac_enable", 3, 1 },
		{ "loop_ena", 2, 1 },
		{ "loc_fault", 1, 1 },
		{ "ff_rx_empty", 0, 1 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS0", 0x30848, 0 },
		{ "an_val_an", 15, 1 },
		{ "an_tr_dis_status_an", 14, 1 },
		{ "an_status_an", 13, 1 },
		{ "an_select_an", 8, 5 },
		{ "an_rs_fec_ena_an", 7, 1 },
		{ "an_int_an", 6, 1 },
		{ "an_fec_ena_an", 5, 1 },
		{ "an_done_an", 4, 1 },
		{ "an_state", 0, 4 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3084c, 0 },
	{ "MAC_PORT_EPIO_DATA0", 0x30850, 0 },
	{ "MAC_PORT_EPIO_DATA1", 0x30854, 0 },
	{ "MAC_PORT_EPIO_DATA2", 0x30858, 0 },
	{ "MAC_PORT_EPIO_DATA3", 0x3085c, 0 },
	{ "MAC_PORT_EPIO_OP", 0x30860, 0 },
		{ "Busy", 31, 1 },
		{ "Write", 8, 1 },
		{ "Address", 0, 8 },
	{ "MAC_PORT_WOL_STATUS", 0x30864, 0 },
		{ "MagicDetected", 31, 1 },
		{ "PatDetected", 30, 1 },
		{ "ClearMagic", 4, 1 },
		{ "ClearMatch", 3, 1 },
		{ "MatchedFilter", 0, 3 },
	{ "MAC_PORT_INT_EN", 0x30868, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_INT_CAUSE", 0x3086c, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN", 0x30870, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE", 0x30874, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_ENABLE", 0x30878, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INJECT", 0x3087c, 0 },
		{ "MemSel", 1, 8 },
		{ "InjectDataErr", 0, 1 },
	{ "MAC_PORT_RUNT_FRAME", 0x30880, 0 },
		{ "runtclear", 16, 1 },
		{ "runt", 0, 16 },
	{ "MAC_PORT_EEE_STATUS", 0x30884, 0 },
		{ "eee_tx_10g_state", 10, 2 },
		{ "eee_rx_10g_state", 8, 2 },
		{ "pma_rx_refresh", 3, 1 },
		{ "pma_rx_quiet", 2, 1 },
		{ "pma_tx_refresh", 1, 1 },
		{ "pma_tx_quiet", 0, 1 },
	{ "MAC_PORT_TX_TS_ID", 0x30888, 0 },
		{ "ts_id_MSB", 3, 1 },
		{ "ts_id", 0, 3 },
	{ "MAC_PORT_TX_TS_VAL_LO", 0x3088c, 0 },
	{ "MAC_PORT_TX_TS_VAL_HI", 0x30890, 0 },
	{ "MAC_PORT_EEE_CTL", 0x30894, 0 },
		{ "EEE_CTRL", 2, 30 },
		{ "TICK_START", 1, 1 },
		{ "En", 0, 1 },
	{ "MAC_PORT_EEE_TX_CTL", 0x30898, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_ACTIVE", 3, 1 },
		{ "LPI_TXHOLD", 2, 1 },
		{ "LPI_REQ", 1, 1 },
		{ "EEE_TX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_RX_CTL", 0x3089c, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_IND", 1, 1 },
		{ "EEE_RX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x308a0, 0 },
	{ "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x308a4, 0 },
	{ "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x308a8, 0 },
	{ "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x308b8, 0 },
	{ "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x308bc, 0 },
	{ "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x308c0, 0 },
	{ "MAC_PORT_EEE_WF_COUNT", 0x308cc, 0 },
		{ "wake_cnt_clr", 16, 1 },
		{ "wake_cnt", 0, 16 },
	{ "MAC_PORT_WOL_EN", 0x308d0, 0 },
		{ "WOL_enable", 1, 1 },
		{ "WOL_indicator", 0, 1 },
	{ "MAC_PORT_INT_TRACE", 0x308d4, 0 },
	{ "MAC_PORT_TRACE_TS_LO", 0x308d8, 0 },
	{ "MAC_PORT_TRACE_TS_HI", 0x308dc, 0 },
	{ "MAC_PORT_MTIP_10G100G_REVISION", 0x30900, 0 },
		{ "CUSTREV", 16, 16 },
		{ "VER", 8, 8 },
		{ "REV", 0, 8 },
	{ "MAC_PORT_MTIP_10G100G_SCRATCH", 0x30904, 0 },
	{ "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x30908, 0 },
		{ "NO_PREAM", 31, 1 },
		{ "SHORT_PREAM", 30, 1 },
		{ "FLT_HDL_DIS", 27, 1 },
		{ "TX_FIFO_RESET", 26, 1 },
		{ "REG_LOWP_RXEMPTY", 24, 1 },
		{ "TX_LOWP_ENA", 23, 1 },
		{ "TX_FLUSH", 22, 1 },
		{ "RX_SFD_ANY", 21, 1 },
		{ "PAUSE_PFC_COMP", 20, 1 },
		{ "PFC_MODE", 19, 1 },
		{ "FORCE_SEND_IDLE", 16, 1 },
		{ "PHY_TXENA", 15, 1 },
		{ "CNTL_FRM_ENA", 13, 1 },
		{ "SW_RESET", 12, 1 },
		{ "TX_PAD_EN", 11, 1 },
		{ "LOOP_ENA", 10, 1 },
		{ "TX_ADDR_INS", 9, 1 },
		{ "PAUSE_IGNORE", 8, 1 },
		{ "PAUSE_FWD", 7, 1 },
		{ "CRC_FWD", 6, 1 },
		{ "PROMIS_EN", 4, 1 },
		{ "RX_ENAMAC", 1, 1 },
		{ "TX_ENAMAC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3090c, 0 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x30910, 0 },
	{ "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x30914, 0 },
		{ "SET_LEN", 16, 16 },
		{ "FRM_LEN_SET", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3091c, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x30920, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x30924, 0 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x30928, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x30930, 0 },
		{ "Clk_divisor", 7, 9 },
		{ "ENA_CLAUSE", 6, 1 },
		{ "PREAMBLE_DISABLE", 5, 1 },
		{ "Hold_time_setting", 2, 3 },
		{ "MDIO_read_error", 1, 1 },
		{ "MDIO_Busy", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x30934, 0 },
		{ "READ_MODE", 15, 1 },
		{ "POST_INCR_READ", 14, 1 },
		{ "Port_PHY_Addr", 5, 5 },
		{ "Device_Reg_Addr", 0, 5 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x30938, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3093c, 0 },
	{ "MAC_PORT_MTIP_10G100G_STATUS", 0x30940, 0 },
		{ "TX_ISIDLE", 8, 1 },
		{ "RX_LINT_FAULT", 7, 1 },
		{ "RX_EMPTY", 6, 1 },
		{ "TX_EMPTY", 5, 1 },
		{ "RX_LOWP", 4, 1 },
		{ "TS_AVAIL", 3, 1 },
		{ "PHY_LOS", 2, 1 },
		{ "RX_REM_FAULT", 1, 1 },
		{ "RX_LOC_FAULT", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x30944, 0 },
		{ "IPG_COMP_CNT", 16, 16 },
		{ "AVG_IPG_LEN", 2, 4 },
		{ "DSBL_DIC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x30948, 0 },
	{ "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x30954, 0 },
		{ "CL1_PAUSE_QUANTA", 16, 16 },
		{ "CL0_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x30958, 0 },
		{ "CL3_PAUSE_QUANTA", 16, 16 },
		{ "CL2_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3095c, 0 },
		{ "CL5_PAUSE_QUANTA", 16, 16 },
		{ "CL4_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x30960, 0 },
		{ "CL7_PAUSE_QUANTA", 16, 16 },
		{ "CL6_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x30964, 0 },
		{ "CL1_QUANTA_THRESH", 16, 16 },
		{ "CL0_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x30968, 0 },
		{ "CL3_QUANTA_THRESH", 16, 16 },
		{ "CL2_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3096c, 0 },
		{ "CL5_QUANTA_THRESH", 16, 16 },
		{ "CL4_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x30970, 0 },
		{ "CL7_QUANTA_THRESH", 16, 16 },
		{ "CL6_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x30974, 0 },
	{ "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3097c, 0 },
	{ "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x30980, 0 },
		{ "RX_CNT_MODE", 16, 1 },
		{ "TS_UPD64_MODE", 12, 1 },
		{ "TS_BINARY_MODE", 11, 1 },
		{ "TS_DELAY_MODE", 10, 1 },
		{ "TS_DELTA_MODE", 9, 1 },
		{ "TX_MAC_RS_ERR", 8, 1 },
		{ "RX_PAUSE_BYPASS", 6, 1 },
		{ "ONE_STEP_ENA", 5, 1 },
		{ "PAUSETIMERX8", 4, 1 },
		{ "XGMII_ENA", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x30a00, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x30a04, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x30a08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x30a0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x30a10, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x30a14, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x30a18, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x30a1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x30a20, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x30a38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x30a3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x30a50, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x30a58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x30a80, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x30a84, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x30a88, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x30a8c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x30a90, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x30a94, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x30a98, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x30a9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x30aa0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x30aa4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x30aa8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x30aac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x30ab0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x30ab4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x30ac8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x30acc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x30ad0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x30ad4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x30ad8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x30adc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x30ae0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x30ae4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x30ae8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x30aec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x30af0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x30af4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x30af8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x30afc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x30b00, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x30b04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x30b08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x30b0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x30b10, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x30b14, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x30b18, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x30b1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x30b20, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x30b24, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x30b28, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x30b2c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x30b30, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x30b34, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x30b38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x30b3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x30b40, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x30b44, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x30b48, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x30b4c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x30b50, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x30b54, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x30b58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x30b5c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x30b60, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x30b64, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x30b68, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x30b6c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x30b70, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x30b74, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x30b78, 0 },
	{ "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x30b7c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x30b80, 0 },
	{ "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x30b84, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_0", 0x30b98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_1", 0x30b9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_0", 0x30ba0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_1", 0x30ba4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_0", 0x30ba8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_1", 0x30bac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_0", 0x30bb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_1", 0x30bb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x30bb8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_0", 0x30c98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_1", 0x30c9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_0", 0x30ca0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_1", 0x30ca4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_0", 0x30ca8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_1", 0x30cac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_0", 0x30cb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_1", 0x30cb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_0", 0x30cb8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_1", 0x30cbc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_0", 0x30cc0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_1", 0x30cc4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_0", 0x30cc8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_1", 0x30ccc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_0", 0x30cd0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_1", 0x30cd4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_0", 0x30cd8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_1", 0x30cdc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_0", 0x30ce0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_1", 0x30ce4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_0", 0x30ce8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_1", 0x30cec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_0", 0x30cf0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_1", 0x30cf4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_0", 0x30cf8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_1", 0x30cfc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_0", 0x30d00, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_1", 0x30d04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_0", 0x30d08, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_1", 0x30d0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_0", 0x30d10, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_1", 0x30d14, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x31000, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x31004, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x31008, 0 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3100c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x31010, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x31014, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x31018, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3101c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x31020, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x31038, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3103c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x31050, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x31058, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x31080, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x31084, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x31088, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3108c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x31090, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x31094, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x31098, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3109c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x310a0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x310a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x310a8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x310ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x310b0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x310b4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x310c8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x310cc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x310d0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x310d4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x310d8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x310dc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x310e0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x310e4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x310e8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x310ec, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x310f0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x310f4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x310f8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x310fc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x31100, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x31104, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x31108, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3110c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x31110, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x31114, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x31118, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3111c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x31120, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x31124, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x31128, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3112c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x31130, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x31134, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x31138, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3113c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x31140, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x31144, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x31148, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3114c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x31150, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x31154, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x31158, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3115c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x31160, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x31164, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x31168, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3116c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x31170, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x31174, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x31178, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3117c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x31180, 0 },
	{ "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x31184, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_0", 0x31198, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3119c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_0", 0x311a0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_1", 0x311a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_0", 0x311a8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_1", 0x311ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_0", 0x311b0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_1", 0x311b4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x311b8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_CFG", 0x32800, 0 },
		{ "SinkTx", 27, 1 },
		{ "SinkTxOnLinkDown", 26, 1 },
		{ "port_map", 21, 3 },
		{ "Smux_Rx_Loop", 17, 4 },
		{ "Signal_Det", 15, 1 },
		{ "cfg_mac_2_mps_full", 13, 1 },
		{ "mps_full_sel", 12, 1 },
		{ "SmuxTxSel", 8, 4 },
		{ "PortSpeed", 4, 4 },
		{ "Rx_Byte_Swap", 3, 1 },
		{ "Tx_Byte_Swap", 2, 1 },
		{ "debug_tx_rx_sel", 1, 1 },
	{ "MAC_PORT_RESET_CTRL", 0x32804, 0 },
		{ "EEE_RESET", 30, 1 },
		{ "PTP_TIMER", 29, 1 },
		{ "MtipRefReset", 28, 1 },
		{ "MtipRegReset", 25, 1 },
		{ "reset_reg_clk_i", 24, 1 },
		{ "TXIF_Reset", 12, 1 },
		{ "RXIF_Reset", 11, 1 },
		{ "AuxExt_Reset", 10, 1 },
		{ "WOL_Reset", 2, 1 },
	{ "MAC_PORT_LED_CFG", 0x32808, 0 },
		{ "Led1_Cfg1", 15, 3 },
		{ "Led0_Cfg1", 12, 3 },
		{ "Led1_tlo", 11, 1 },
		{ "Led1_thi", 10, 1 },
		{ "Led0_tlo", 9, 1 },
		{ "Led0_thi", 8, 1 },
		{ "Led1_Cfg", 5, 3 },
		{ "Led1_Polarity_Inv", 4, 1 },
		{ "Led0_Cfg", 1, 3 },
		{ "Led0_Polarity_Inv", 0, 1 },
	{ "MAC_PORT_LED_COUNTHI", 0x3280c, 0 },
	{ "MAC_PORT_LED_COUNTLO", 0x32810, 0 },
	{ "MAC_PORT_CFG3", 0x32814, 0 },
		{ "FCSDisCtrl", 25, 1 },
		{ "SigDetCtrl", 24, 1 },
		{ "se_clr", 21, 1 },
	{ "MAC_PORT_CFG2", 0x32818, 0 },
		{ "InstanceNum", 22, 2 },
		{ "StopOnPerr", 21, 1 },
		{ "PatEn", 18, 1 },
		{ "MagicEn", 17, 1 },
	{ "MAC_PORT_PKT_COUNT", 0x3281c, 0 },
		{ "tx_sop_count", 24, 8 },
		{ "tx_eop_count", 16, 8 },
		{ "rx_sop_count", 8, 8 },
		{ "rx_eop_count", 0, 8 },
	{ "MAC_PORT_MAGIC_MACID_LO", 0x32820, 0 },
	{ "MAC_PORT_MAGIC_MACID_HI", 0x32824, 0 },
	{ "MAC_PORT_LINK_STATUS", 0x32828, 0 },
		{ "egr_se_cnt_Err", 9, 1 },
		{ "ingr_se_cnt_Err", 8, 1 },
		{ "hi_ber", 7, 1 },
		{ "an_done", 6, 1 },
		{ "align_done", 5, 1 },
		{ "block_lock", 4, 1 },
		{ "remflt", 3, 1 },
		{ "locflt", 2, 1 },
		{ "linkup", 1, 1 },
		{ "linkdn", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN_100G", 0x3282c, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE_100G", 0x32830, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_ENABLE_100G", 0x32834, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_0", 0x32838, 0 },
		{ "peer_delay_val", 31, 1 },
		{ "peer_delay", 1, 30 },
		{ "mode1s_ena", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_1", 0x3283c, 0 },
		{ "tx_stop", 25, 1 },
		{ "mode1s_ena", 24, 1 },
		{ "tx_ts_id", 12, 12 },
		{ "tx_li_fault", 11, 1 },
		{ "xoff_gen", 3, 8 },
		{ "lpi_txhold", 2, 1 },
		{ "tx_rem_fault", 1, 1 },
		{ "tx_loc_fault", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_2", 0x32840, 0 },
	{ "MAC_PORT_MAC10G100G_STATUS", 0x32844, 0 },
		{ "reg_lowp", 21, 1 },
		{ "li_fault", 20, 1 },
		{ "tx_isidle", 19, 1 },
		{ "tx_underflow", 18, 1 },
		{ "tx_empty", 17, 1 },
		{ "rem_fault", 16, 1 },
		{ "reg_ts_avail", 15, 1 },
		{ "phy_txena", 14, 1 },
		{ "pfc_mode", 13, 1 },
		{ "pause_on", 5, 8 },
		{ "mac_pause_en", 4, 1 },
		{ "mac_enable", 3, 1 },
		{ "loop_ena", 2, 1 },
		{ "loc_fault", 1, 1 },
		{ "ff_rx_empty", 0, 1 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS0", 0x32848, 0 },
		{ "an_val_an", 15, 1 },
		{ "an_tr_dis_status_an", 14, 1 },
		{ "an_status_an", 13, 1 },
		{ "an_select_an", 8, 5 },
		{ "an_rs_fec_ena_an", 7, 1 },
		{ "an_int_an", 6, 1 },
		{ "an_fec_ena_an", 5, 1 },
		{ "an_done_an", 4, 1 },
		{ "an_state", 0, 4 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3284c, 0 },
	{ "MAC_PORT_EPIO_DATA0", 0x32850, 0 },
	{ "MAC_PORT_EPIO_DATA1", 0x32854, 0 },
	{ "MAC_PORT_EPIO_DATA2", 0x32858, 0 },
	{ "MAC_PORT_EPIO_DATA3", 0x3285c, 0 },
	{ "MAC_PORT_EPIO_OP", 0x32860, 0 },
		{ "Busy", 31, 1 },
		{ "Write", 8, 1 },
		{ "Address", 0, 8 },
	{ "MAC_PORT_WOL_STATUS", 0x32864, 0 },
		{ "MagicDetected", 31, 1 },
		{ "PatDetected", 30, 1 },
		{ "ClearMagic", 4, 1 },
		{ "ClearMatch", 3, 1 },
		{ "MatchedFilter", 0, 3 },
	{ "MAC_PORT_INT_EN", 0x32868, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_INT_CAUSE", 0x3286c, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN", 0x32870, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE", 0x32874, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_ENABLE", 0x32878, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INJECT", 0x3287c, 0 },
		{ "MemSel", 1, 8 },
		{ "InjectDataErr", 0, 1 },
	{ "MAC_PORT_RUNT_FRAME", 0x32880, 0 },
		{ "runtclear", 16, 1 },
		{ "runt", 0, 16 },
	{ "MAC_PORT_EEE_STATUS", 0x32884, 0 },
		{ "eee_tx_10g_state", 10, 2 },
		{ "eee_rx_10g_state", 8, 2 },
		{ "pma_rx_refresh", 3, 1 },
		{ "pma_rx_quiet", 2, 1 },
		{ "pma_tx_refresh", 1, 1 },
		{ "pma_tx_quiet", 0, 1 },
	{ "MAC_PORT_TX_TS_ID", 0x32888, 0 },
		{ "ts_id_MSB", 3, 1 },
		{ "ts_id", 0, 3 },
	{ "MAC_PORT_TX_TS_VAL_LO", 0x3288c, 0 },
	{ "MAC_PORT_TX_TS_VAL_HI", 0x32890, 0 },
	{ "MAC_PORT_EEE_CTL", 0x32894, 0 },
		{ "EEE_CTRL", 2, 30 },
		{ "TICK_START", 1, 1 },
		{ "En", 0, 1 },
	{ "MAC_PORT_EEE_TX_CTL", 0x32898, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_ACTIVE", 3, 1 },
		{ "LPI_TXHOLD", 2, 1 },
		{ "LPI_REQ", 1, 1 },
		{ "EEE_TX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_RX_CTL", 0x3289c, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_IND", 1, 1 },
		{ "EEE_RX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x328a0, 0 },
	{ "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x328a4, 0 },
	{ "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x328a8, 0 },
	{ "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x328b8, 0 },
	{ "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x328bc, 0 },
	{ "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x328c0, 0 },
	{ "MAC_PORT_EEE_WF_COUNT", 0x328cc, 0 },
		{ "wake_cnt_clr", 16, 1 },
		{ "wake_cnt", 0, 16 },
	{ "MAC_PORT_WOL_EN", 0x328d0, 0 },
		{ "WOL_enable", 1, 1 },
		{ "WOL_indicator", 0, 1 },
	{ "MAC_PORT_INT_TRACE", 0x328d4, 0 },
	{ "MAC_PORT_TRACE_TS_LO", 0x328d8, 0 },
	{ "MAC_PORT_TRACE_TS_HI", 0x328dc, 0 },
	{ "MAC_PORT_MTIP_10G100G_REVISION", 0x32900, 0 },
		{ "CUSTREV", 16, 16 },
		{ "VER", 8, 8 },
		{ "REV", 0, 8 },
	{ "MAC_PORT_MTIP_10G100G_SCRATCH", 0x32904, 0 },
	{ "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x32908, 0 },
		{ "NO_PREAM", 31, 1 },
		{ "SHORT_PREAM", 30, 1 },
		{ "FLT_HDL_DIS", 27, 1 },
		{ "TX_FIFO_RESET", 26, 1 },
		{ "REG_LOWP_RXEMPTY", 24, 1 },
		{ "TX_LOWP_ENA", 23, 1 },
		{ "TX_FLUSH", 22, 1 },
		{ "RX_SFD_ANY", 21, 1 },
		{ "PAUSE_PFC_COMP", 20, 1 },
		{ "PFC_MODE", 19, 1 },
		{ "FORCE_SEND_IDLE", 16, 1 },
		{ "PHY_TXENA", 15, 1 },
		{ "CNTL_FRM_ENA", 13, 1 },
		{ "SW_RESET", 12, 1 },
		{ "TX_PAD_EN", 11, 1 },
		{ "LOOP_ENA", 10, 1 },
		{ "TX_ADDR_INS", 9, 1 },
		{ "PAUSE_IGNORE", 8, 1 },
		{ "PAUSE_FWD", 7, 1 },
		{ "CRC_FWD", 6, 1 },
		{ "PROMIS_EN", 4, 1 },
		{ "RX_ENAMAC", 1, 1 },
		{ "TX_ENAMAC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3290c, 0 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x32910, 0 },
	{ "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x32914, 0 },
		{ "SET_LEN", 16, 16 },
		{ "FRM_LEN_SET", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3291c, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x32920, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x32924, 0 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x32928, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x32930, 0 },
		{ "Clk_divisor", 7, 9 },
		{ "ENA_CLAUSE", 6, 1 },
		{ "PREAMBLE_DISABLE", 5, 1 },
		{ "Hold_time_setting", 2, 3 },
		{ "MDIO_read_error", 1, 1 },
		{ "MDIO_Busy", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x32934, 0 },
		{ "READ_MODE", 15, 1 },
		{ "POST_INCR_READ", 14, 1 },
		{ "Port_PHY_Addr", 5, 5 },
		{ "Device_Reg_Addr", 0, 5 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x32938, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3293c, 0 },
	{ "MAC_PORT_MTIP_10G100G_STATUS", 0x32940, 0 },
		{ "TX_ISIDLE", 8, 1 },
		{ "RX_LINT_FAULT", 7, 1 },
		{ "RX_EMPTY", 6, 1 },
		{ "TX_EMPTY", 5, 1 },
		{ "RX_LOWP", 4, 1 },
		{ "TS_AVAIL", 3, 1 },
		{ "PHY_LOS", 2, 1 },
		{ "RX_REM_FAULT", 1, 1 },
		{ "RX_LOC_FAULT", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x32944, 0 },
		{ "IPG_COMP_CNT", 16, 16 },
		{ "AVG_IPG_LEN", 2, 4 },
		{ "DSBL_DIC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x32948, 0 },
	{ "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x32954, 0 },
		{ "CL1_PAUSE_QUANTA", 16, 16 },
		{ "CL0_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x32958, 0 },
		{ "CL3_PAUSE_QUANTA", 16, 16 },
		{ "CL2_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3295c, 0 },
		{ "CL5_PAUSE_QUANTA", 16, 16 },
		{ "CL4_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x32960, 0 },
		{ "CL7_PAUSE_QUANTA", 16, 16 },
		{ "CL6_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x32964, 0 },
		{ "CL1_QUANTA_THRESH", 16, 16 },
		{ "CL0_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x32968, 0 },
		{ "CL3_QUANTA_THRESH", 16, 16 },
		{ "CL2_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3296c, 0 },
		{ "CL5_QUANTA_THRESH", 16, 16 },
		{ "CL4_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x32970, 0 },
		{ "CL7_QUANTA_THRESH", 16, 16 },
		{ "CL6_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x32974, 0 },
	{ "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3297c, 0 },
	{ "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x32980, 0 },
		{ "RX_CNT_MODE", 16, 1 },
		{ "TS_UPD64_MODE", 12, 1 },
		{ "TS_BINARY_MODE", 11, 1 },
		{ "TS_DELAY_MODE", 10, 1 },
		{ "TS_DELTA_MODE", 9, 1 },
		{ "TX_MAC_RS_ERR", 8, 1 },
		{ "RX_PAUSE_BYPASS", 6, 1 },
		{ "ONE_STEP_ENA", 5, 1 },
		{ "PAUSETIMERX8", 4, 1 },
		{ "XGMII_ENA", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x32a00, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x32a04, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x32a08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x32a0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x32a10, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x32a14, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x32a18, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x32a1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x32a20, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x32a38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x32a3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x32a50, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x32a58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x32a80, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x32a84, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x32a88, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x32a8c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x32a90, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x32a94, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x32a98, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x32a9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x32aa0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x32aa4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x32aa8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x32aac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x32ab0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x32ab4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x32ac8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x32acc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x32ad0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x32ad4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x32ad8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x32adc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x32ae0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x32ae4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x32ae8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x32aec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x32af0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x32af4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x32af8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x32afc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x32b00, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x32b04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x32b08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x32b0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x32b10, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x32b14, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x32b18, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x32b1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x32b20, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x32b24, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x32b28, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x32b2c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x32b30, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x32b34, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x32b38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x32b3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x32b40, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x32b44, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x32b48, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x32b4c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x32b50, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x32b54, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x32b58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x32b5c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x32b60, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x32b64, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x32b68, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x32b6c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x32b70, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x32b74, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x32b78, 0 },
	{ "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x32b7c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x32b80, 0 },
	{ "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x32b84, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_0", 0x32b98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_1", 0x32b9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_0", 0x32ba0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_1", 0x32ba4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_0", 0x32ba8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_1", 0x32bac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_0", 0x32bb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_1", 0x32bb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x32bb8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_0", 0x32c98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_1", 0x32c9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_0", 0x32ca0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_1", 0x32ca4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_0", 0x32ca8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_1", 0x32cac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_0", 0x32cb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_1", 0x32cb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_0", 0x32cb8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_1", 0x32cbc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_0", 0x32cc0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_1", 0x32cc4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_0", 0x32cc8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_1", 0x32ccc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_0", 0x32cd0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_1", 0x32cd4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_0", 0x32cd8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_1", 0x32cdc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_0", 0x32ce0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_1", 0x32ce4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_0", 0x32ce8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_1", 0x32cec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_0", 0x32cf0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_1", 0x32cf4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_0", 0x32cf8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_1", 0x32cfc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_0", 0x32d00, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_1", 0x32d04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_0", 0x32d08, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_1", 0x32d0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_0", 0x32d10, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_1", 0x32d14, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x33000, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x33004, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x33008, 0 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3300c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x33010, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x33014, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x33018, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3301c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x33020, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x33038, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3303c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x33050, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x33058, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x33080, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x33084, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x33088, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3308c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x33090, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x33094, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x33098, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3309c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x330a0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x330a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x330a8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x330ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x330b0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x330b4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x330c8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x330cc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x330d0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x330d4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x330d8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x330dc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x330e0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x330e4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x330e8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x330ec, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x330f0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x330f4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x330f8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x330fc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x33100, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x33104, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x33108, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3310c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x33110, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x33114, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x33118, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3311c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x33120, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x33124, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x33128, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3312c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x33130, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x33134, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x33138, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3313c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x33140, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x33144, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x33148, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3314c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x33150, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x33154, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x33158, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3315c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x33160, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x33164, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x33168, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3316c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x33170, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x33174, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x33178, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3317c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x33180, 0 },
	{ "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x33184, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_0", 0x33198, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3319c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_0", 0x331a0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_1", 0x331a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_0", 0x331a8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_1", 0x331ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_0", 0x331b0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_1", 0x331b4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x331b8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_CFG", 0x34800, 0 },
		{ "SinkTx", 27, 1 },
		{ "SinkTxOnLinkDown", 26, 1 },
		{ "port_map", 21, 3 },
		{ "Smux_Rx_Loop", 17, 4 },
		{ "Signal_Det", 15, 1 },
		{ "cfg_mac_2_mps_full", 13, 1 },
		{ "mps_full_sel", 12, 1 },
		{ "SmuxTxSel", 8, 4 },
		{ "PortSpeed", 4, 4 },
		{ "Rx_Byte_Swap", 3, 1 },
		{ "Tx_Byte_Swap", 2, 1 },
		{ "debug_tx_rx_sel", 1, 1 },
	{ "MAC_PORT_RESET_CTRL", 0x34804, 0 },
		{ "EEE_RESET", 30, 1 },
		{ "PTP_TIMER", 29, 1 },
		{ "MtipRefReset", 28, 1 },
		{ "MtipRegReset", 25, 1 },
		{ "reset_reg_clk_i", 24, 1 },
		{ "TXIF_Reset", 12, 1 },
		{ "RXIF_Reset", 11, 1 },
		{ "AuxExt_Reset", 10, 1 },
		{ "WOL_Reset", 2, 1 },
	{ "MAC_PORT_LED_CFG", 0x34808, 0 },
		{ "Led1_Cfg1", 15, 3 },
		{ "Led0_Cfg1", 12, 3 },
		{ "Led1_tlo", 11, 1 },
		{ "Led1_thi", 10, 1 },
		{ "Led0_tlo", 9, 1 },
		{ "Led0_thi", 8, 1 },
		{ "Led1_Cfg", 5, 3 },
		{ "Led1_Polarity_Inv", 4, 1 },
		{ "Led0_Cfg", 1, 3 },
		{ "Led0_Polarity_Inv", 0, 1 },
	{ "MAC_PORT_LED_COUNTHI", 0x3480c, 0 },
	{ "MAC_PORT_LED_COUNTLO", 0x34810, 0 },
	{ "MAC_PORT_CFG3", 0x34814, 0 },
		{ "FCSDisCtrl", 25, 1 },
		{ "SigDetCtrl", 24, 1 },
		{ "se_clr", 21, 1 },
	{ "MAC_PORT_CFG2", 0x34818, 0 },
		{ "InstanceNum", 22, 2 },
		{ "StopOnPerr", 21, 1 },
		{ "PatEn", 18, 1 },
		{ "MagicEn", 17, 1 },
	{ "MAC_PORT_PKT_COUNT", 0x3481c, 0 },
		{ "tx_sop_count", 24, 8 },
		{ "tx_eop_count", 16, 8 },
		{ "rx_sop_count", 8, 8 },
		{ "rx_eop_count", 0, 8 },
	{ "MAC_PORT_MAGIC_MACID_LO", 0x34820, 0 },
	{ "MAC_PORT_MAGIC_MACID_HI", 0x34824, 0 },
	{ "MAC_PORT_LINK_STATUS", 0x34828, 0 },
		{ "egr_se_cnt_Err", 9, 1 },
		{ "ingr_se_cnt_Err", 8, 1 },
		{ "hi_ber", 7, 1 },
		{ "an_done", 6, 1 },
		{ "align_done", 5, 1 },
		{ "block_lock", 4, 1 },
		{ "remflt", 3, 1 },
		{ "locflt", 2, 1 },
		{ "linkup", 1, 1 },
		{ "linkdn", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN_100G", 0x3482c, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE_100G", 0x34830, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_ENABLE_100G", 0x34834, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_0", 0x34838, 0 },
		{ "peer_delay_val", 31, 1 },
		{ "peer_delay", 1, 30 },
		{ "mode1s_ena", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_1", 0x3483c, 0 },
		{ "tx_stop", 25, 1 },
		{ "mode1s_ena", 24, 1 },
		{ "tx_ts_id", 12, 12 },
		{ "tx_li_fault", 11, 1 },
		{ "xoff_gen", 3, 8 },
		{ "lpi_txhold", 2, 1 },
		{ "tx_rem_fault", 1, 1 },
		{ "tx_loc_fault", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_2", 0x34840, 0 },
	{ "MAC_PORT_MAC10G100G_STATUS", 0x34844, 0 },
		{ "reg_lowp", 21, 1 },
		{ "li_fault", 20, 1 },
		{ "tx_isidle", 19, 1 },
		{ "tx_underflow", 18, 1 },
		{ "tx_empty", 17, 1 },
		{ "rem_fault", 16, 1 },
		{ "reg_ts_avail", 15, 1 },
		{ "phy_txena", 14, 1 },
		{ "pfc_mode", 13, 1 },
		{ "pause_on", 5, 8 },
		{ "mac_pause_en", 4, 1 },
		{ "mac_enable", 3, 1 },
		{ "loop_ena", 2, 1 },
		{ "loc_fault", 1, 1 },
		{ "ff_rx_empty", 0, 1 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS0", 0x34848, 0 },
		{ "an_val_an", 15, 1 },
		{ "an_tr_dis_status_an", 14, 1 },
		{ "an_status_an", 13, 1 },
		{ "an_select_an", 8, 5 },
		{ "an_rs_fec_ena_an", 7, 1 },
		{ "an_int_an", 6, 1 },
		{ "an_fec_ena_an", 5, 1 },
		{ "an_done_an", 4, 1 },
		{ "an_state", 0, 4 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3484c, 0 },
	{ "MAC_PORT_EPIO_DATA0", 0x34850, 0 },
	{ "MAC_PORT_EPIO_DATA1", 0x34854, 0 },
	{ "MAC_PORT_EPIO_DATA2", 0x34858, 0 },
	{ "MAC_PORT_EPIO_DATA3", 0x3485c, 0 },
	{ "MAC_PORT_EPIO_OP", 0x34860, 0 },
		{ "Busy", 31, 1 },
		{ "Write", 8, 1 },
		{ "Address", 0, 8 },
	{ "MAC_PORT_WOL_STATUS", 0x34864, 0 },
		{ "MagicDetected", 31, 1 },
		{ "PatDetected", 30, 1 },
		{ "ClearMagic", 4, 1 },
		{ "ClearMatch", 3, 1 },
		{ "MatchedFilter", 0, 3 },
	{ "MAC_PORT_INT_EN", 0x34868, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_INT_CAUSE", 0x3486c, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN", 0x34870, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE", 0x34874, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_ENABLE", 0x34878, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INJECT", 0x3487c, 0 },
		{ "MemSel", 1, 8 },
		{ "InjectDataErr", 0, 1 },
	{ "MAC_PORT_RUNT_FRAME", 0x34880, 0 },
		{ "runtclear", 16, 1 },
		{ "runt", 0, 16 },
	{ "MAC_PORT_EEE_STATUS", 0x34884, 0 },
		{ "eee_tx_10g_state", 10, 2 },
		{ "eee_rx_10g_state", 8, 2 },
		{ "pma_rx_refresh", 3, 1 },
		{ "pma_rx_quiet", 2, 1 },
		{ "pma_tx_refresh", 1, 1 },
		{ "pma_tx_quiet", 0, 1 },
	{ "MAC_PORT_TX_TS_ID", 0x34888, 0 },
		{ "ts_id_MSB", 3, 1 },
		{ "ts_id", 0, 3 },
	{ "MAC_PORT_TX_TS_VAL_LO", 0x3488c, 0 },
	{ "MAC_PORT_TX_TS_VAL_HI", 0x34890, 0 },
	{ "MAC_PORT_EEE_CTL", 0x34894, 0 },
		{ "EEE_CTRL", 2, 30 },
		{ "TICK_START", 1, 1 },
		{ "En", 0, 1 },
	{ "MAC_PORT_EEE_TX_CTL", 0x34898, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_ACTIVE", 3, 1 },
		{ "LPI_TXHOLD", 2, 1 },
		{ "LPI_REQ", 1, 1 },
		{ "EEE_TX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_RX_CTL", 0x3489c, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_IND", 1, 1 },
		{ "EEE_RX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x348a0, 0 },
	{ "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x348a4, 0 },
	{ "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x348a8, 0 },
	{ "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x348b8, 0 },
	{ "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x348bc, 0 },
	{ "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x348c0, 0 },
	{ "MAC_PORT_EEE_WF_COUNT", 0x348cc, 0 },
		{ "wake_cnt_clr", 16, 1 },
		{ "wake_cnt", 0, 16 },
	{ "MAC_PORT_WOL_EN", 0x348d0, 0 },
		{ "WOL_enable", 1, 1 },
		{ "WOL_indicator", 0, 1 },
	{ "MAC_PORT_INT_TRACE", 0x348d4, 0 },
	{ "MAC_PORT_TRACE_TS_LO", 0x348d8, 0 },
	{ "MAC_PORT_TRACE_TS_HI", 0x348dc, 0 },
	{ "MAC_PORT_MTIP_10G100G_REVISION", 0x34900, 0 },
		{ "CUSTREV", 16, 16 },
		{ "VER", 8, 8 },
		{ "REV", 0, 8 },
	{ "MAC_PORT_MTIP_10G100G_SCRATCH", 0x34904, 0 },
	{ "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x34908, 0 },
		{ "NO_PREAM", 31, 1 },
		{ "SHORT_PREAM", 30, 1 },
		{ "FLT_HDL_DIS", 27, 1 },
		{ "TX_FIFO_RESET", 26, 1 },
		{ "REG_LOWP_RXEMPTY", 24, 1 },
		{ "TX_LOWP_ENA", 23, 1 },
		{ "TX_FLUSH", 22, 1 },
		{ "RX_SFD_ANY", 21, 1 },
		{ "PAUSE_PFC_COMP", 20, 1 },
		{ "PFC_MODE", 19, 1 },
		{ "FORCE_SEND_IDLE", 16, 1 },
		{ "PHY_TXENA", 15, 1 },
		{ "CNTL_FRM_ENA", 13, 1 },
		{ "SW_RESET", 12, 1 },
		{ "TX_PAD_EN", 11, 1 },
		{ "LOOP_ENA", 10, 1 },
		{ "TX_ADDR_INS", 9, 1 },
		{ "PAUSE_IGNORE", 8, 1 },
		{ "PAUSE_FWD", 7, 1 },
		{ "CRC_FWD", 6, 1 },
		{ "PROMIS_EN", 4, 1 },
		{ "RX_ENAMAC", 1, 1 },
		{ "TX_ENAMAC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3490c, 0 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x34910, 0 },
	{ "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x34914, 0 },
		{ "SET_LEN", 16, 16 },
		{ "FRM_LEN_SET", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3491c, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x34920, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x34924, 0 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x34928, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x34930, 0 },
		{ "Clk_divisor", 7, 9 },
		{ "ENA_CLAUSE", 6, 1 },
		{ "PREAMBLE_DISABLE", 5, 1 },
		{ "Hold_time_setting", 2, 3 },
		{ "MDIO_read_error", 1, 1 },
		{ "MDIO_Busy", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x34934, 0 },
		{ "READ_MODE", 15, 1 },
		{ "POST_INCR_READ", 14, 1 },
		{ "Port_PHY_Addr", 5, 5 },
		{ "Device_Reg_Addr", 0, 5 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x34938, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3493c, 0 },
	{ "MAC_PORT_MTIP_10G100G_STATUS", 0x34940, 0 },
		{ "TX_ISIDLE", 8, 1 },
		{ "RX_LINT_FAULT", 7, 1 },
		{ "RX_EMPTY", 6, 1 },
		{ "TX_EMPTY", 5, 1 },
		{ "RX_LOWP", 4, 1 },
		{ "TS_AVAIL", 3, 1 },
		{ "PHY_LOS", 2, 1 },
		{ "RX_REM_FAULT", 1, 1 },
		{ "RX_LOC_FAULT", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x34944, 0 },
		{ "IPG_COMP_CNT", 16, 16 },
		{ "AVG_IPG_LEN", 2, 4 },
		{ "DSBL_DIC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x34948, 0 },
	{ "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x34954, 0 },
		{ "CL1_PAUSE_QUANTA", 16, 16 },
		{ "CL0_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x34958, 0 },
		{ "CL3_PAUSE_QUANTA", 16, 16 },
		{ "CL2_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3495c, 0 },
		{ "CL5_PAUSE_QUANTA", 16, 16 },
		{ "CL4_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x34960, 0 },
		{ "CL7_PAUSE_QUANTA", 16, 16 },
		{ "CL6_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x34964, 0 },
		{ "CL1_QUANTA_THRESH", 16, 16 },
		{ "CL0_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x34968, 0 },
		{ "CL3_QUANTA_THRESH", 16, 16 },
		{ "CL2_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3496c, 0 },
		{ "CL5_QUANTA_THRESH", 16, 16 },
		{ "CL4_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x34970, 0 },
		{ "CL7_QUANTA_THRESH", 16, 16 },
		{ "CL6_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x34974, 0 },
	{ "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3497c, 0 },
	{ "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x34980, 0 },
		{ "RX_CNT_MODE", 16, 1 },
		{ "TS_UPD64_MODE", 12, 1 },
		{ "TS_BINARY_MODE", 11, 1 },
		{ "TS_DELAY_MODE", 10, 1 },
		{ "TS_DELTA_MODE", 9, 1 },
		{ "TX_MAC_RS_ERR", 8, 1 },
		{ "RX_PAUSE_BYPASS", 6, 1 },
		{ "ONE_STEP_ENA", 5, 1 },
		{ "PAUSETIMERX8", 4, 1 },
		{ "XGMII_ENA", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x34a00, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x34a04, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x34a08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x34a0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x34a10, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x34a14, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x34a18, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x34a1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x34a20, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x34a38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x34a3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x34a50, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x34a58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x34a80, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x34a84, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x34a88, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x34a8c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x34a90, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x34a94, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x34a98, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x34a9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x34aa0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x34aa4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x34aa8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x34aac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x34ab0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x34ab4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x34ac8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x34acc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x34ad0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x34ad4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x34ad8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x34adc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x34ae0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x34ae4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x34ae8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x34aec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x34af0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x34af4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x34af8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x34afc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x34b00, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x34b04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x34b08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x34b0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x34b10, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x34b14, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x34b18, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x34b1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x34b20, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x34b24, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x34b28, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x34b2c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x34b30, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x34b34, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x34b38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x34b3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x34b40, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x34b44, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x34b48, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x34b4c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x34b50, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x34b54, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x34b58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x34b5c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x34b60, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x34b64, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x34b68, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x34b6c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x34b70, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x34b74, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x34b78, 0 },
	{ "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x34b7c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x34b80, 0 },
	{ "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x34b84, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_0", 0x34b98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_1", 0x34b9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_0", 0x34ba0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_1", 0x34ba4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_0", 0x34ba8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_1", 0x34bac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_0", 0x34bb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_1", 0x34bb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x34bb8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_0", 0x34c98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_1", 0x34c9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_0", 0x34ca0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_1", 0x34ca4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_0", 0x34ca8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_1", 0x34cac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_0", 0x34cb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_1", 0x34cb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_0", 0x34cb8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_1", 0x34cbc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_0", 0x34cc0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_1", 0x34cc4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_0", 0x34cc8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_1", 0x34ccc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_0", 0x34cd0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_1", 0x34cd4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_0", 0x34cd8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_1", 0x34cdc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_0", 0x34ce0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_1", 0x34ce4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_0", 0x34ce8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_1", 0x34cec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_0", 0x34cf0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_1", 0x34cf4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_0", 0x34cf8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_1", 0x34cfc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_0", 0x34d00, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_1", 0x34d04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_0", 0x34d08, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_1", 0x34d0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_0", 0x34d10, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_1", 0x34d14, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x35000, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x35004, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x35008, 0 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3500c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x35010, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x35014, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x35018, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3501c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x35020, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x35038, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3503c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x35050, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x35058, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x35080, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x35084, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x35088, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3508c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x35090, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x35094, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x35098, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3509c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x350a0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x350a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x350a8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x350ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x350b0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x350b4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x350c8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x350cc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x350d0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x350d4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x350d8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x350dc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x350e0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x350e4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x350e8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x350ec, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x350f0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x350f4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x350f8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x350fc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x35100, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x35104, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x35108, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3510c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x35110, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x35114, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x35118, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3511c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x35120, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x35124, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x35128, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3512c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x35130, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x35134, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x35138, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3513c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x35140, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x35144, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x35148, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3514c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x35150, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x35154, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x35158, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3515c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x35160, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x35164, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x35168, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3516c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x35170, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x35174, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x35178, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3517c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x35180, 0 },
	{ "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x35184, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_0", 0x35198, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3519c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_0", 0x351a0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_1", 0x351a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_0", 0x351a8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_1", 0x351ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_0", 0x351b0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_1", 0x351b4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x351b8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_CFG", 0x36800, 0 },
		{ "SinkTx", 27, 1 },
		{ "SinkTxOnLinkDown", 26, 1 },
		{ "port_map", 21, 3 },
		{ "Smux_Rx_Loop", 17, 4 },
		{ "Signal_Det", 15, 1 },
		{ "cfg_mac_2_mps_full", 13, 1 },
		{ "mps_full_sel", 12, 1 },
		{ "SmuxTxSel", 8, 4 },
		{ "PortSpeed", 4, 4 },
		{ "Rx_Byte_Swap", 3, 1 },
		{ "Tx_Byte_Swap", 2, 1 },
		{ "debug_tx_rx_sel", 1, 1 },
	{ "MAC_PORT_RESET_CTRL", 0x36804, 0 },
		{ "EEE_RESET", 30, 1 },
		{ "PTP_TIMER", 29, 1 },
		{ "MtipRefReset", 28, 1 },
		{ "MtipRegReset", 25, 1 },
		{ "reset_reg_clk_i", 24, 1 },
		{ "TXIF_Reset", 12, 1 },
		{ "RXIF_Reset", 11, 1 },
		{ "AuxExt_Reset", 10, 1 },
		{ "WOL_Reset", 2, 1 },
	{ "MAC_PORT_LED_CFG", 0x36808, 0 },
		{ "Led1_Cfg1", 15, 3 },
		{ "Led0_Cfg1", 12, 3 },
		{ "Led1_tlo", 11, 1 },
		{ "Led1_thi", 10, 1 },
		{ "Led0_tlo", 9, 1 },
		{ "Led0_thi", 8, 1 },
		{ "Led1_Cfg", 5, 3 },
		{ "Led1_Polarity_Inv", 4, 1 },
		{ "Led0_Cfg", 1, 3 },
		{ "Led0_Polarity_Inv", 0, 1 },
	{ "MAC_PORT_LED_COUNTHI", 0x3680c, 0 },
	{ "MAC_PORT_LED_COUNTLO", 0x36810, 0 },
	{ "MAC_PORT_CFG3", 0x36814, 0 },
		{ "FCSDisCtrl", 25, 1 },
		{ "SigDetCtrl", 24, 1 },
		{ "se_clr", 21, 1 },
	{ "MAC_PORT_CFG2", 0x36818, 0 },
		{ "InstanceNum", 22, 2 },
		{ "StopOnPerr", 21, 1 },
		{ "PatEn", 18, 1 },
		{ "MagicEn", 17, 1 },
	{ "MAC_PORT_PKT_COUNT", 0x3681c, 0 },
		{ "tx_sop_count", 24, 8 },
		{ "tx_eop_count", 16, 8 },
		{ "rx_sop_count", 8, 8 },
		{ "rx_eop_count", 0, 8 },
	{ "MAC_PORT_MAGIC_MACID_LO", 0x36820, 0 },
	{ "MAC_PORT_MAGIC_MACID_HI", 0x36824, 0 },
	{ "MAC_PORT_LINK_STATUS", 0x36828, 0 },
		{ "egr_se_cnt_Err", 9, 1 },
		{ "ingr_se_cnt_Err", 8, 1 },
		{ "hi_ber", 7, 1 },
		{ "an_done", 6, 1 },
		{ "align_done", 5, 1 },
		{ "block_lock", 4, 1 },
		{ "remflt", 3, 1 },
		{ "locflt", 2, 1 },
		{ "linkup", 1, 1 },
		{ "linkdn", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN_100G", 0x3682c, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE_100G", 0x36830, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_PERR_ENABLE_100G", 0x36834, 0 },
		{ "Perr_pcsr_fdm_3", 21, 1 },
		{ "Perr_pcsr_fdm_2", 20, 1 },
		{ "Perr_pcsr_fdm_1", 19, 1 },
		{ "Perr_pcsr_fdm_0", 18, 1 },
		{ "Perr_pcsr_fm_3", 17, 1 },
		{ "Perr_pcsr_fm_2", 16, 1 },
		{ "Perr_pcsr_fm_1", 15, 1 },
		{ "Perr_pcsr_fm_0", 14, 1 },
		{ "Perr_pcsr_dm_1", 13, 1 },
		{ "Perr_pcsr_dm_0", 12, 1 },
		{ "Perr_pcsr_dk_3", 11, 1 },
		{ "Perr_pcsr_dk_2", 10, 1 },
		{ "Perr_pcsr_dk_1", 9, 1 },
		{ "Perr_pcsr_dk_0", 8, 1 },
		{ "Perr_f91ro_1", 7, 1 },
		{ "Perr_f91ro_0", 6, 1 },
		{ "Perr_pcsr_f91dm", 5, 1 },
		{ "Perr_pcsr_f91ti", 4, 1 },
		{ "Perr_pcsr_f91to", 3, 1 },
		{ "Perr_pcsr_f91m", 2, 1 },
		{ "Perr_pcsr_80_16_1", 1, 1 },
		{ "Perr_pcsr_80_16_0", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_0", 0x36838, 0 },
		{ "peer_delay_val", 31, 1 },
		{ "peer_delay", 1, 30 },
		{ "mode1s_ena", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_1", 0x3683c, 0 },
		{ "tx_stop", 25, 1 },
		{ "mode1s_ena", 24, 1 },
		{ "tx_ts_id", 12, 12 },
		{ "tx_li_fault", 11, 1 },
		{ "xoff_gen", 3, 8 },
		{ "lpi_txhold", 2, 1 },
		{ "tx_rem_fault", 1, 1 },
		{ "tx_loc_fault", 0, 1 },
	{ "MAC_PORT_MAC10G100G_CONFIG_2", 0x36840, 0 },
	{ "MAC_PORT_MAC10G100G_STATUS", 0x36844, 0 },
		{ "reg_lowp", 21, 1 },
		{ "li_fault", 20, 1 },
		{ "tx_isidle", 19, 1 },
		{ "tx_underflow", 18, 1 },
		{ "tx_empty", 17, 1 },
		{ "rem_fault", 16, 1 },
		{ "reg_ts_avail", 15, 1 },
		{ "phy_txena", 14, 1 },
		{ "pfc_mode", 13, 1 },
		{ "pause_on", 5, 8 },
		{ "mac_pause_en", 4, 1 },
		{ "mac_enable", 3, 1 },
		{ "loop_ena", 2, 1 },
		{ "loc_fault", 1, 1 },
		{ "ff_rx_empty", 0, 1 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS0", 0x36848, 0 },
		{ "an_val_an", 15, 1 },
		{ "an_tr_dis_status_an", 14, 1 },
		{ "an_status_an", 13, 1 },
		{ "an_select_an", 8, 5 },
		{ "an_rs_fec_ena_an", 7, 1 },
		{ "an_int_an", 6, 1 },
		{ "an_fec_ena_an", 5, 1 },
		{ "an_done_an", 4, 1 },
		{ "an_state", 0, 4 },
	{ "MAC_PORT_MAC_AN_STATE_STATUS1", 0x3684c, 0 },
	{ "MAC_PORT_EPIO_DATA0", 0x36850, 0 },
	{ "MAC_PORT_EPIO_DATA1", 0x36854, 0 },
	{ "MAC_PORT_EPIO_DATA2", 0x36858, 0 },
	{ "MAC_PORT_EPIO_DATA3", 0x3685c, 0 },
	{ "MAC_PORT_EPIO_OP", 0x36860, 0 },
		{ "Busy", 31, 1 },
		{ "Write", 8, 1 },
		{ "Address", 0, 8 },
	{ "MAC_PORT_WOL_STATUS", 0x36864, 0 },
		{ "MagicDetected", 31, 1 },
		{ "PatDetected", 30, 1 },
		{ "ClearMagic", 4, 1 },
		{ "ClearMatch", 3, 1 },
		{ "MatchedFilter", 0, 3 },
	{ "MAC_PORT_INT_EN", 0x36868, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_INT_CAUSE", 0x3686c, 0 },
		{ "mps2mac_perr", 31, 1 },
		{ "pps", 30, 1 },
		{ "tx_ts_avail", 29, 1 },
		{ "single_alarm", 28, 1 },
		{ "periodic_alarm", 27, 1 },
		{ "PatDetWake", 26, 1 },
		{ "MagicWake", 25, 1 },
		{ "SigDetChg", 24, 1 },
		{ "PCS_Link_Good", 12, 1 },
		{ "PCS_Link_Fail", 11, 1 },
		{ "RxFifoOverFlow", 10, 1 },
		{ "RemoteFault", 7, 1 },
		{ "LocalFault", 6, 1 },
		{ "MAC_Link_Down", 5, 1 },
		{ "MAC_Link_Up", 4, 1 },
		{ "AutoNeg_Done", 3, 1 },
		{ "an_page_rcvd", 2, 1 },
		{ "TxFifo_prty_err", 1, 1 },
		{ "RxFifo_prty_err", 0, 1 },
	{ "MAC_PORT_PERR_INT_EN", 0x36870, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INT_CAUSE", 0x36874, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_ENABLE", 0x36878, 0 },
		{ "Perr_pkt_ram", 31, 1 },
		{ "Perr_mask_ram", 30, 1 },
		{ "Perr_crc_ram", 29, 1 },
	{ "MAC_PORT_PERR_INJECT", 0x3687c, 0 },
		{ "MemSel", 1, 8 },
		{ "InjectDataErr", 0, 1 },
	{ "MAC_PORT_RUNT_FRAME", 0x36880, 0 },
		{ "runtclear", 16, 1 },
		{ "runt", 0, 16 },
	{ "MAC_PORT_EEE_STATUS", 0x36884, 0 },
		{ "eee_tx_10g_state", 10, 2 },
		{ "eee_rx_10g_state", 8, 2 },
		{ "pma_rx_refresh", 3, 1 },
		{ "pma_rx_quiet", 2, 1 },
		{ "pma_tx_refresh", 1, 1 },
		{ "pma_tx_quiet", 0, 1 },
	{ "MAC_PORT_TX_TS_ID", 0x36888, 0 },
		{ "ts_id_MSB", 3, 1 },
		{ "ts_id", 0, 3 },
	{ "MAC_PORT_TX_TS_VAL_LO", 0x3688c, 0 },
	{ "MAC_PORT_TX_TS_VAL_HI", 0x36890, 0 },
	{ "MAC_PORT_EEE_CTL", 0x36894, 0 },
		{ "EEE_CTRL", 2, 30 },
		{ "TICK_START", 1, 1 },
		{ "En", 0, 1 },
	{ "MAC_PORT_EEE_TX_CTL", 0x36898, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_ACTIVE", 3, 1 },
		{ "LPI_TXHOLD", 2, 1 },
		{ "LPI_REQ", 1, 1 },
		{ "EEE_TX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_RX_CTL", 0x3689c, 0 },
		{ "WAKE_TIMER", 16, 16 },
		{ "HSS_TIMER", 5, 4 },
		{ "HSS_CTL", 4, 1 },
		{ "LPI_IND", 1, 1 },
		{ "EEE_RX_RESET", 0, 1 },
	{ "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x368a0, 0 },
	{ "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x368a4, 0 },
	{ "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x368a8, 0 },
	{ "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x368b8, 0 },
	{ "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x368bc, 0 },
	{ "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x368c0, 0 },
	{ "MAC_PORT_EEE_WF_COUNT", 0x368cc, 0 },
		{ "wake_cnt_clr", 16, 1 },
		{ "wake_cnt", 0, 16 },
	{ "MAC_PORT_WOL_EN", 0x368d0, 0 },
		{ "WOL_enable", 1, 1 },
		{ "WOL_indicator", 0, 1 },
	{ "MAC_PORT_INT_TRACE", 0x368d4, 0 },
	{ "MAC_PORT_TRACE_TS_LO", 0x368d8, 0 },
	{ "MAC_PORT_TRACE_TS_HI", 0x368dc, 0 },
	{ "MAC_PORT_MTIP_10G100G_REVISION", 0x36900, 0 },
		{ "CUSTREV", 16, 16 },
		{ "VER", 8, 8 },
		{ "REV", 0, 8 },
	{ "MAC_PORT_MTIP_10G100G_SCRATCH", 0x36904, 0 },
	{ "MAC_PORT_MTIP_10G100G_COMMAND_CONFIG", 0x36908, 0 },
		{ "NO_PREAM", 31, 1 },
		{ "SHORT_PREAM", 30, 1 },
		{ "FLT_HDL_DIS", 27, 1 },
		{ "TX_FIFO_RESET", 26, 1 },
		{ "REG_LOWP_RXEMPTY", 24, 1 },
		{ "TX_LOWP_ENA", 23, 1 },
		{ "TX_FLUSH", 22, 1 },
		{ "RX_SFD_ANY", 21, 1 },
		{ "PAUSE_PFC_COMP", 20, 1 },
		{ "PFC_MODE", 19, 1 },
		{ "FORCE_SEND_IDLE", 16, 1 },
		{ "PHY_TXENA", 15, 1 },
		{ "CNTL_FRM_ENA", 13, 1 },
		{ "SW_RESET", 12, 1 },
		{ "TX_PAD_EN", 11, 1 },
		{ "LOOP_ENA", 10, 1 },
		{ "TX_ADDR_INS", 9, 1 },
		{ "PAUSE_IGNORE", 8, 1 },
		{ "PAUSE_FWD", 7, 1 },
		{ "CRC_FWD", 6, 1 },
		{ "PROMIS_EN", 4, 1 },
		{ "RX_ENAMAC", 1, 1 },
		{ "TX_ENAMAC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_0", 0x3690c, 0 },
	{ "MAC_PORT_MTIP_10G100G_MAC_ADDR_1", 0x36910, 0 },
	{ "MAC_PORT_MTIP_10G100G_FRM_LENGTH_TX_MTU", 0x36914, 0 },
		{ "SET_LEN", 16, 16 },
		{ "FRM_LEN_SET", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_SECTIONS", 0x3691c, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_SECTIONS", 0x36920, 0 },
		{ "EMPTY", 16, 16 },
		{ "AVAIL", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_FIFO_ALMOST_F_E", 0x36924, 0 },
	{ "MAC_PORT_MTIP_10G100G_TX_FIFO_ALMOST_F_E", 0x36928, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_CFG_STATUS", 0x36930, 0 },
		{ "Clk_divisor", 7, 9 },
		{ "ENA_CLAUSE", 6, 1 },
		{ "PREAMBLE_DISABLE", 5, 1 },
		{ "Hold_time_setting", 2, 3 },
		{ "MDIO_read_error", 1, 1 },
		{ "MDIO_Busy", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_COMMAND", 0x36934, 0 },
		{ "READ_MODE", 15, 1 },
		{ "POST_INCR_READ", 14, 1 },
		{ "Port_PHY_Addr", 5, 5 },
		{ "Device_Reg_Addr", 0, 5 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_DATA", 0x36938, 0 },
	{ "MAC_PORT_MTIP_10G100G_MDIO_REGADDR", 0x3693c, 0 },
	{ "MAC_PORT_MTIP_10G100G_STATUS", 0x36940, 0 },
		{ "TX_ISIDLE", 8, 1 },
		{ "RX_LINT_FAULT", 7, 1 },
		{ "RX_EMPTY", 6, 1 },
		{ "TX_EMPTY", 5, 1 },
		{ "RX_LOWP", 4, 1 },
		{ "TS_AVAIL", 3, 1 },
		{ "PHY_LOS", 2, 1 },
		{ "RX_REM_FAULT", 1, 1 },
		{ "RX_LOC_FAULT", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_TX_IPG_LENGTH", 0x36944, 0 },
		{ "IPG_COMP_CNT", 16, 16 },
		{ "AVG_IPG_LEN", 2, 4 },
		{ "DSBL_DIC", 0, 1 },
	{ "MAC_PORT_MTIP_10G100G_CRC_MODE", 0x36948, 0 },
	{ "MAC_PORT_MTIP_10G100G_CL01_PAUSE_QUANTA", 0x36954, 0 },
		{ "CL1_PAUSE_QUANTA", 16, 16 },
		{ "CL0_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_PAUSE_QUANTA", 0x36958, 0 },
		{ "CL3_PAUSE_QUANTA", 16, 16 },
		{ "CL2_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_PAUSE_QUANTA", 0x3695c, 0 },
		{ "CL5_PAUSE_QUANTA", 16, 16 },
		{ "CL4_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_PAUSE_QUANTA", 0x36960, 0 },
		{ "CL7_PAUSE_QUANTA", 16, 16 },
		{ "CL6_PAUSE_QUANTA", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL01_QUANTA_THRESH", 0x36964, 0 },
		{ "CL1_QUANTA_THRESH", 16, 16 },
		{ "CL0_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL23_QUANTA_THRESH", 0x36968, 0 },
		{ "CL3_QUANTA_THRESH", 16, 16 },
		{ "CL2_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL45_QUANTA_THRESH", 0x3696c, 0 },
		{ "CL5_QUANTA_THRESH", 16, 16 },
		{ "CL4_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_CL67_QUANTA_THRESH", 0x36970, 0 },
		{ "CL7_QUANTA_THRESH", 16, 16 },
		{ "CL6_QUANTA_THRESH", 0, 16 },
	{ "MAC_PORT_MTIP_10G100G_RX_PAUSE_STATUS", 0x36974, 0 },
	{ "MAC_PORT_MTIP_10G100G_TS_TIMESTAMP", 0x3697c, 0 },
	{ "MAC_PORT_MTIP_10G100G_XIF_MODE", 0x36980, 0 },
		{ "RX_CNT_MODE", 16, 1 },
		{ "TS_UPD64_MODE", 12, 1 },
		{ "TS_BINARY_MODE", 11, 1 },
		{ "TS_DELAY_MODE", 10, 1 },
		{ "TS_DELTA_MODE", 9, 1 },
		{ "TX_MAC_RS_ERR", 8, 1 },
		{ "RX_PAUSE_BYPASS", 6, 1 },
		{ "ONE_STEP_ENA", 5, 1 },
		{ "PAUSETIMERX8", 4, 1 },
		{ "XGMII_ENA", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_1", 0x36a00, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_1", 0x36a04, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID0", 0x36a08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICE_ID1", 0x36a0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SPEED_ABILITY", 0x36a10, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG1", 0x36a14, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_DEVICES_IN_PKG2", 0x36a18, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_0_CONTROL_2", 0x36a1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_STATUS_2", 0x36a20, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID0", 0x36a38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PKG_ID1", 0x36a3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_EEE_CTRL", 0x36a50, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_WAKE_ERROR_COUNTER", 0x36a58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_1", 0x36a80, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_STATUS_2", 0x36a84, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_0", 0x36a88, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_1", 0x36a8c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_2", 0x36a90, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_A_3", 0x36a94, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_0", 0x36a98, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_1", 0x36a9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_2", 0x36aa0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SEED_B_3", 0x36aa4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_PATTERN_CONTROL", 0x36aa8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BASE_R_TEST_ERR_CNT", 0x36aac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BER_HIGH_ORDER_CNT", 0x36ab0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_ERR_BLK_HIGH_ORDER_CNT", 0x36ab4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_1", 0x36ac8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_2", 0x36acc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_3", 0x36ad0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_MULTI_LANE_ALIGN_STATUS_4", 0x36ad4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_0", 0x36ad8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_1", 0x36adc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_2", 0x36ae0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_3", 0x36ae4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_4", 0x36ae8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_5", 0x36aec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_6", 0x36af0, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_7", 0x36af4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_8", 0x36af8, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_9", 0x36afc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_10", 0x36b00, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_11", 0x36b04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_12", 0x36b08, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_13", 0x36b0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_14", 0x36b10, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_15", 0x36b14, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_16", 0x36b18, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_17", 0x36b1c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_18", 0x36b20, 0 },
	{ "MAC_PORT_MTIP_CR4_0_BIP_ERR_CNTLANE_19", 0x36b24, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_0_MAPPING", 0x36b28, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_1_MAPPING", 0x36b2c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_2_MAPPING", 0x36b30, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_3_MAPPING", 0x36b34, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_4_MAPPING", 0x36b38, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_5_MAPPING", 0x36b3c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_6_MAPPING", 0x36b40, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_7_MAPPING", 0x36b44, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_8_MAPPING", 0x36b48, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_9_MAPPING", 0x36b4c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_10_MAPPING", 0x36b50, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_11_MAPPING", 0x36b54, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_12_MAPPING", 0x36b58, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_13_MAPPING", 0x36b5c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_14_MAPPING", 0x36b60, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_15_MAPPING", 0x36b64, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_16_MAPPING", 0x36b68, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_17_MAPPING", 0x36b6c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_18_MAPPING", 0x36b70, 0 },
	{ "MAC_PORT_MTIP_CR4_0_LANE_19_MAPPING", 0x36b74, 0 },
	{ "MAC_PORT_MTIP_CR4_0_SCRATCH", 0x36b78, 0 },
	{ "MAC_PORT_MTIP_CR4_0_CORE_REVISION", 0x36b7c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL_INTVL", 0x36b80, 0 },
	{ "MAC_PORT_MTIP_CR4_0_TX_LANE_THRESH", 0x36b84, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_0", 0x36b98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL0_1", 0x36b9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_0", 0x36ba0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL1_1", 0x36ba4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_0", 0x36ba8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL2_1", 0x36bac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_0", 0x36bb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL3_1", 0x36bb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_PCS_MODE", 0x36bb8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_0", 0x36c98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL4_1", 0x36c9c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_0", 0x36ca0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL5_1", 0x36ca4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_0", 0x36ca8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL6_1", 0x36cac, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_0", 0x36cb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL7_1", 0x36cb4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_0", 0x36cb8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL8_1", 0x36cbc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_0", 0x36cc0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL9_1", 0x36cc4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_0", 0x36cc8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL10_1", 0x36ccc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_0", 0x36cd0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL11_1", 0x36cd4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_0", 0x36cd8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL12_1", 0x36cdc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_0", 0x36ce0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL13_1", 0x36ce4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_0", 0x36ce8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL14_1", 0x36cec, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_0", 0x36cf0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL15_1", 0x36cf4, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_0", 0x36cf8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL16_1", 0x36cfc, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_0", 0x36d00, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL17_1", 0x36d04, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_0", 0x36d08, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL18_1", 0x36d0c, 0 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_0", 0x36d10, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_0_VL19_1", 0x36d14, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_1", 0x37000, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_selection", 13, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection1", 6, 1 },
		{ "Speed_selection2", 2, 4 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_1", 0x37004, 0 },
		{ "TX_LPI", 11, 1 },
		{ "RX_LPI", 10, 1 },
		{ "TX_LPI_ACTIVE", 9, 1 },
		{ "RX_LPI_ACTIVE", 8, 1 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
		{ "Low_power_ability", 1, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID0", 0x37008, 0 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICE_ID1", 0x3700c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SPEED_ABILITY", 0x37010, 0 },
		{ "50G_capable", 5, 1 },
		{ "25G_capable", 4, 1 },
		{ "100G_capable", 3, 1 },
		{ "40G_capable", 2, 1 },
		{ "10G_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG1", 0x37014, 0 },
		{ "TC_present", 6, 1 },
		{ "DTE_xS_present", 5, 1 },
		{ "PHY_xS_present", 4, 1 },
		{ "PCS_present", 3, 1 },
		{ "WIS_present", 2, 1 },
		{ "PMD_PMA_present", 1, 1 },
		{ "Clause22reg_present", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_DEVICES_IN_PKG2", 0x37018, 0 },
		{ "VSD_2_PRESENT", 15, 1 },
		{ "VSD_1_PRESENT", 14, 1 },
		{ "Clause22_ExT_Present", 13, 1 },
	{ "MAC_PORT_MTIP_CR4_1_CONTROL_2", 0x3701c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_STATUS_2", 0x37020, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
		{ "50GBase_R_capable", 8, 1 },
		{ "25GBase_R_capable", 7, 1 },
		{ "100GBase_R_capable", 5, 1 },
		{ "40GBase_R_capable", 4, 1 },
		{ "10GBase_T_capable", 3, 1 },
		{ "10GBase_W_capable", 2, 1 },
		{ "10GBase_x_capable", 1, 1 },
		{ "10GBase_R_capable", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID0", 0x37038, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PKG_ID1", 0x3703c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_EEE_CTRL", 0x37050, 0 },
		{ "50GBase_R_FW", 14, 1 },
		{ "100GBase_R_DS", 13, 1 },
		{ "100GBase_R_FW", 12, 1 },
		{ "25GBase_R_DS", 11, 1 },
		{ "25GBase_R_FW", 10, 1 },
		{ "40GBase_R_DS", 9, 1 },
		{ "40GBase_R_FW", 8, 1 },
		{ "10GBase_KE_EEE", 6, 1 },
		{ "Fast_wake", 1, 5 },
		{ "Deep_Sleep", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_WAKE_ERROR_COUNTER", 0x37058, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_1", 0x37080, 0 },
		{ "RX_Link_STAT", 12, 1 },
		{ "High_BER", 1, 1 },
		{ "Block_Lock", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_STATUS_2", 0x37084, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "BER_counter", 8, 6 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_0", 0x37088, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_1", 0x3708c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_2", 0x37090, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_A_3", 0x37094, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_0", 0x37098, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_1", 0x3709c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_2", 0x370a0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SEED_B_3", 0x370a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_PATTERN_CONTROL", 0x370a8, 0 },
		{ "Test_pattern_40G", 7, 1 },
		{ "TX_Test_Pattern_En", 3, 1 },
		{ "RX_Test_Pattern_En", 2, 1 },
		{ "Test_Pattern_Select", 1, 1 },
		{ "Data_Pattern_Select", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BASE_R_TEST_ERR_CNT", 0x370ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BER_HIGH_ORDER_CNT", 0x370b0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_ERR_BLK_HIGH_ORDER_CNT", 0x370b4, 0 },
		{ "Hi_ORDER_CNT_Present", 15, 1 },
		{ "ERR_BLKS_CNTR", 0, 14 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_1", 0x370c8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
		{ "Lane_7_blck_lck", 7, 1 },
		{ "Lane_6_blck_lck", 6, 1 },
		{ "Lane_5_blck_lck", 5, 1 },
		{ "Lane_4_blck_lck", 4, 1 },
		{ "Lane_3_blck_lck", 3, 1 },
		{ "Lane_2_blck_lck", 2, 1 },
		{ "Lane_1_blck_lck", 1, 1 },
		{ "Lane_0_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_2", 0x370cc, 0 },
		{ "Lane_19_blck_lck", 11, 1 },
		{ "Lane_18_blck_lck", 10, 1 },
		{ "Lane_17_blck_lck", 9, 1 },
		{ "Lane_16_blck_lck", 8, 1 },
		{ "Lane_15_blck_lck", 7, 1 },
		{ "Lane_14_blck_lck", 6, 1 },
		{ "Lane_13_blck_lck", 5, 1 },
		{ "Lane_12_blck_lck", 4, 1 },
		{ "Lane_11_blck_lck", 3, 1 },
		{ "Lane_10_blck_lck", 2, 1 },
		{ "Lane_9_blck_lck", 1, 1 },
		{ "Lane_8_blck_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_3", 0x370d0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_MULTI_LANE_ALIGN_STATUS_4", 0x370d4, 0 },
		{ "Lane19_algn_mrkr_lck", 11, 1 },
		{ "Lane18_algn_mrkr_lck", 10, 1 },
		{ "Lane17_algn_mrkr_lck", 9, 1 },
		{ "Lane16_algn_mrkr_lck", 8, 1 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_0", 0x370d8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_1", 0x370dc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_2", 0x370e0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_3", 0x370e4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_4", 0x370e8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_5", 0x370ec, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_6", 0x370f0, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_7", 0x370f4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_8", 0x370f8, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_9", 0x370fc, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_10", 0x37100, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_11", 0x37104, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_12", 0x37108, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_13", 0x3710c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_14", 0x37110, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_15", 0x37114, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_16", 0x37118, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_17", 0x3711c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_18", 0x37120, 0 },
	{ "MAC_PORT_MTIP_CR4_1_BIP_ERR_CNTLANE_19", 0x37124, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_0_MAPPING", 0x37128, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_1_MAPPING", 0x3712c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_2_MAPPING", 0x37130, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_3_MAPPING", 0x37134, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_4_MAPPING", 0x37138, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_5_MAPPING", 0x3713c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_6_MAPPING", 0x37140, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_7_MAPPING", 0x37144, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_8_MAPPING", 0x37148, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_9_MAPPING", 0x3714c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_10_MAPPING", 0x37150, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_11_MAPPING", 0x37154, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_12_MAPPING", 0x37158, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_13_MAPPING", 0x3715c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_14_MAPPING", 0x37160, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_15_MAPPING", 0x37164, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_16_MAPPING", 0x37168, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_17_MAPPING", 0x3716c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_18_MAPPING", 0x37170, 0 },
	{ "MAC_PORT_MTIP_CR4_1_LANE_19_MAPPING", 0x37174, 0 },
	{ "MAC_PORT_MTIP_CR4_1_SCRATCH", 0x37178, 0 },
	{ "MAC_PORT_MTIP_CR4_1_CORE_REVISION", 0x3717c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL_INTVL", 0x37180, 0 },
	{ "MAC_PORT_MTIP_CR4_1_TX_LANE_THRESH", 0x37184, 0 },
		{ "lane6_lane7", 12, 4 },
		{ "lane4_lane5", 8, 4 },
		{ "lane2_lane3", 4, 4 },
		{ "lane0_lane1", 0, 4 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_0", 0x37198, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL0_1", 0x3719c, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_0", 0x371a0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL1_1", 0x371a4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_0", 0x371a8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL2_1", 0x371ac, 0 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_0", 0x371b0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_PORT_MTIP_CR4_1_VL3_1", 0x371b4, 0 },
	{ "MAC_PORT_MTIP_CR4_1_PCS_MODE", 0x371b8, 0 },
		{ "st_disable_mld", 9, 1 },
		{ "st_en_clause49", 8, 1 },
		{ "Hi_ber25", 2, 1 },
		{ "Disable_mld", 1, 1 },
		{ "ena_clause49", 0, 1 },
	{ "MAC_COMMON_CFG_0", 0x38000, 0 },
		{ "Rx_Polarity_Inv", 24, 8 },
		{ "Tx_Polarity_Inv", 16, 8 },
		{ "debug_port_sel", 14, 2 },
		{ "MAC_septy_ctl", 8, 6 },
		{ "debug_tx_rx_sel", 7, 1 },
		{ "MAC_rdy_ctl", 0, 6 },
	{ "MAC_MTIP_RESET_CTRL_0", 0x38004, 0 },
		{ "reset_f91_ref_clk_i", 31, 1 },
		{ "reset_pcs000_ref_clk_i", 30, 1 },
		{ "reset_ref_clk_i", 29, 1 },
		{ "reset_sd_rx_clk_i_0", 28, 1 },
		{ "reset_sd_rx_clk_i_1", 27, 1 },
		{ "reset_sd_rx_clk_i_2", 26, 1 },
		{ "reset_sd_rx_clk_i_3", 25, 1 },
		{ "reset_sd_rx_clk_i_4", 24, 1 },
		{ "reset_sd_rx_clk_i_5", 23, 1 },
		{ "reset_sd_rx_clk_i_6", 22, 1 },
		{ "reset_sd_rx_clk_i_7", 21, 1 },
		{ "reset_sd_tx_clk_i_0", 20, 1 },
		{ "reset_sd_tx_clk_i_1", 19, 1 },
		{ "reset_sd_tx_clk_i_2", 18, 1 },
		{ "reset_sd_tx_clk_i_3", 17, 1 },
		{ "reset_sd_tx_clk_i_4", 16, 1 },
		{ "reset_sd_tx_clk_i_5", 15, 1 },
		{ "reset_sd_tx_clk_i_6", 14, 1 },
		{ "reset_sd_tx_clk_i_7", 13, 1 },
		{ "reset_xpcs_ref_clk_i_0", 12, 1 },
		{ "reset_xpcs_ref_clk_i_1", 11, 1 },
		{ "reset_ff_rx_clk_0_i", 9, 1 },
		{ "reset_ff_tx_clk_0_i", 8, 1 },
		{ "reset_rxclk_0_i", 7, 1 },
		{ "reset_txclk_0_i", 6, 1 },
		{ "reset_ff_rx_clk_1_i", 5, 1 },
		{ "reset_ff_tx_clk_1_i", 4, 1 },
		{ "reset_rxclk_1_i", 3, 1 },
		{ "reset_txclk_1_i", 2, 1 },
		{ "xgmii_clk_reset_0", 0, 1 },
	{ "MAC_MTIP_RESET_CTRL_1", 0x38008, 0 },
		{ "reset_ff_rx_clk_2_i", 31, 1 },
		{ "reset_ff_tx_clk_2_i", 30, 1 },
		{ "reset_rxclk_2_i", 29, 1 },
		{ "reset_txclk_2_i", 28, 1 },
		{ "reset_ff_rx_clk_3_i", 27, 1 },
		{ "reset_ff_tx_clk_3_i", 26, 1 },
		{ "reset_rxclk_3_i", 25, 1 },
		{ "reset_txclk_3_i", 24, 1 },
		{ "reset_ff_rx_clk_4_i", 23, 1 },
		{ "reset_ff_tx_clk_4_i", 22, 1 },
		{ "reset_rxclk_4_i", 21, 1 },
		{ "reset_txclk_4_i", 20, 1 },
		{ "reset_ff_rx_clk_5_i", 19, 1 },
		{ "reset_ff_tx_clk_5_i", 18, 1 },
		{ "reset_rxclk_5_i", 17, 1 },
		{ "reset_txclk_5_i", 16, 1 },
		{ "reset_sd_rx_clk_an_0_i", 15, 1 },
		{ "reset_sd_tx_clk_an_0_i", 14, 1 },
		{ "reset_sd_rx_clk_an_1_i", 13, 1 },
		{ "reset_sd_tx_clk_an_1_i", 12, 1 },
		{ "reset_sd_rx_clk_an_2_i", 11, 1 },
		{ "reset_sd_tx_clk_an_2_i", 10, 1 },
		{ "reset_sd_rx_clk_an_3_i", 9, 1 },
		{ "reset_sd_tx_clk_an_3_i", 8, 1 },
		{ "reset_sd_rx_clk_an_4_i", 7, 1 },
		{ "reset_sd_tx_clk_an_4_i", 6, 1 },
		{ "reset_sd_rx_clk_an_5_i", 5, 1 },
		{ "reset_sd_tx_clk_an_5_i", 4, 1 },
		{ "reset_sd_rx_clk_an_6_i", 3, 1 },
		{ "reset_sd_tx_clk_an_6_i", 2, 1 },
		{ "reset_sd_rx_clk_an_7_i", 1, 1 },
		{ "reset_sd_tx_clk_an_7_i", 0, 1 },
	{ "MAC_MTIP_RESET_CTRL_2", 0x3800c, 0 },
		{ "reset_sgmii_txclk_i_3", 31, 1 },
		{ "reset_sgmii_rxclk_i_3", 30, 1 },
		{ "reset_sgmii_txclk_i_2", 29, 1 },
		{ "reset_sgmii_rxclk_i_2", 28, 1 },
		{ "reset_sgmii_txclk_i_1", 27, 1 },
		{ "reset_sgmii_rxclk_i_1", 26, 1 },
		{ "reset_sgmii_txclk_i_0", 25, 1 },
		{ "reset_sgmii_rxclk_i_0", 24, 1 },
		{ "MtipSd7TxRst", 23, 1 },
		{ "MtipSd6TxRst", 22, 1 },
		{ "MtipSd5TxRst", 21, 1 },
		{ "MtipSd4TxRst", 20, 1 },
		{ "MtipSd3TxRst", 19, 1 },
		{ "MtipSd2TxRst", 18, 1 },
		{ "MtipSd1TxRst", 17, 1 },
		{ "MtipSd0TxRst", 16, 1 },
		{ "MtipSd7RxRst", 15, 1 },
		{ "MtipSd6RxRst", 14, 1 },
		{ "MtipSd5RxRst", 13, 1 },
		{ "MtipSd4RxRst", 12, 1 },
		{ "MtipSd3RxRst", 11, 1 },
		{ "MtipSd2RxRst", 10, 1 },
		{ "MtipSd1RxRst", 9, 1 },
		{ "MtipSd0RxRst", 8, 1 },
		{ "reset_reg_clk_an_0_i", 7, 1 },
		{ "reset_reg_clk_an_1_i", 6, 1 },
		{ "reset_reg_clk_an_2_i", 5, 1 },
		{ "reset_reg_clk_an_3_i", 4, 1 },
		{ "reset_reg_clk_an_4_i", 3, 1 },
		{ "reset_reg_clk_an_5_i", 2, 1 },
		{ "reset_reg_clk_an_6_i", 1, 1 },
		{ "reset_reg_clk_an_7_i", 0, 1 },
	{ "MAC_MTIP_CLK_CTRL_0", 0x38010, 0 },
		{ "f91_ref_clk_i_g", 31, 1 },
		{ "pcs000_ref_clk_i_g", 30, 1 },
		{ "ref_clk_i_g", 29, 1 },
		{ "sd_rx_clk_i_0_g", 28, 1 },
		{ "sd_rx_clk_i_1_g", 27, 1 },
		{ "sd_rx_clk_i_2_g", 26, 1 },
		{ "sd_rx_clk_i_3_g", 25, 1 },
		{ "sd_rx_clk_i_4_g", 24, 1 },
		{ "sd_rx_clk_i_5_g", 23, 1 },
		{ "sd_rx_clk_i_6_g", 22, 1 },
		{ "sd_rx_clk_i_7_g", 21, 1 },
		{ "sd_tx_clk_i_0_g", 20, 1 },
		{ "sd_tx_clk_i_1_g", 19, 1 },
		{ "sd_tx_clk_i_2_g", 18, 1 },
		{ "sd_tx_clk_i_3_g", 17, 1 },
		{ "sd_tx_clk_i_4_g", 16, 1 },
		{ "sd_tx_clk_i_5_g", 15, 1 },
		{ "sd_tx_clk_i_6_g", 14, 1 },
		{ "sd_tx_clk_i_7_g", 13, 1 },
		{ "xpcs_ref_clk_i_0_g", 12, 1 },
		{ "xpcs_ref_clk_i_1_g", 11, 1 },
		{ "reg_clk_i_g", 10, 1 },
		{ "ff_rx_clk_0_i_g", 9, 1 },
		{ "ff_tx_clk_0_i_g", 8, 1 },
		{ "rxclk_0_i_g", 7, 1 },
		{ "txclk_0_i_g", 6, 1 },
		{ "ff_rx_clk_1_i_g", 5, 1 },
		{ "ff_tx_clk_1_i_g", 4, 1 },
		{ "rxclk_1_i_g", 3, 1 },
		{ "txclk_1_i_g", 2, 1 },
	{ "MAC_MTIP_CLK_CTRL_1", 0x38014, 0 },
		{ "ff_rx_clk_2_i_g", 31, 1 },
		{ "ff_tx_clk_2_i_g", 30, 1 },
		{ "rxclk_2_i_g", 29, 1 },
		{ "txclk_2_i_g", 28, 1 },
		{ "ff_rx_clk_3_i_g", 27, 1 },
		{ "ff_tx_clk_3_i_g", 26, 1 },
		{ "rxclk_3_i_g", 25, 1 },
		{ "txclk_3_i_g", 24, 1 },
		{ "ff_rx_clk_4_i_g", 23, 1 },
		{ "ff_tx_clk_4_i_g", 22, 1 },
		{ "rxclk_4_i_g", 21, 1 },
		{ "txclk_4_i_g", 20, 1 },
		{ "ff_rx_clk_5_i_g", 19, 1 },
		{ "ff_tx_clk_5_i_g", 18, 1 },
		{ "rxclk_5_i_g", 17, 1 },
		{ "txclk_5_i_g", 16, 1 },
		{ "sd_rx_clk_an_0_i_g", 15, 1 },
		{ "sd_tx_clk_an_0_i_g", 14, 1 },
		{ "sd_rx_clk_an_1_i_g", 13, 1 },
		{ "sd_tx_clk_an_1_i_g", 12, 1 },
		{ "sd_rx_clk_an_2_i_g", 11, 1 },
		{ "sd_tx_clk_an_2_i_g", 10, 1 },
		{ "sd_rx_clk_an_3_i_g", 9, 1 },
		{ "sd_tx_clk_an_3_i_g", 8, 1 },
		{ "sd_rx_clk_an_4_i_g", 7, 1 },
		{ "sd_tx_clk_an_4_i_g", 6, 1 },
		{ "sd_rx_clk_an_5_i_g", 5, 1 },
		{ "sd_tx_clk_an_5_i_g", 4, 1 },
		{ "sd_rx_clk_an_6_i_g", 3, 1 },
		{ "sd_tx_clk_an_6_i_g", 2, 1 },
		{ "sd_rx_clk_an_7_i_g", 1, 1 },
		{ "sd_tx_clk_an_7_i_g", 0, 1 },
	{ "MAC_MTIP_CLK_CTRL_2", 0x38018, 0 },
		{ "sd_rx_clk_0_g", 31, 1 },
		{ "sd_rx_clk_1_g", 30, 1 },
		{ "sd_rx_clk_2_g", 29, 1 },
		{ "sd_rx_clk_3_g", 28, 1 },
		{ "sd_rx_clk_4_g", 27, 1 },
		{ "sd_rx_clk_5_g", 26, 1 },
		{ "sd_rx_clk_6_g", 25, 1 },
		{ "sd_rx_clk_7_g", 24, 1 },
		{ "sd_tx_clk_0_g", 23, 1 },
		{ "sd_tx_clk_1_g", 22, 1 },
		{ "sd_tx_clk_2_g", 21, 1 },
		{ "sd_tx_clk_3_g", 20, 1 },
		{ "sd_tx_clk_4_g", 19, 1 },
		{ "sd_tx_clk_5_g", 18, 1 },
		{ "sd_tx_clk_6_g", 17, 1 },
		{ "sd_tx_clk_7_g", 16, 1 },
		{ "sd_rx_clk_aec_0_g", 15, 1 },
		{ "sd_rx_clk_aec_1_g", 14, 1 },
		{ "sd_rx_clk_aec_2_g", 13, 1 },
		{ "sd_rx_clk_aec_3_g", 12, 1 },
		{ "sd_rx_clk_aec_4_g", 11, 1 },
		{ "sd_rx_clk_aec_5_g", 10, 1 },
		{ "sd_rx_clk_aec_6_g", 9, 1 },
		{ "sd_rx_clk_aec_7_g", 8, 1 },
		{ "sd_tx_clk_aec_0_g", 7, 1 },
		{ "sd_tx_clk_aec_1_g", 6, 1 },
		{ "sd_tx_clk_aec_2_g", 5, 1 },
		{ "sd_tx_clk_aec_3_g", 4, 1 },
		{ "sd_tx_clk_aec_4_g", 3, 1 },
		{ "sd_tx_clk_aec_5_g", 2, 1 },
		{ "sd_tx_clk_aec_6_g", 1, 1 },
		{ "sd_tx_clk_aec_7_g", 0, 1 },
	{ "MAC_MTIP_CLK_CTRL_3", 0x3801c, 0 },
		{ "pcs_rx_clk_0_g", 31, 1 },
		{ "pcs_rx_clk_1_g", 30, 1 },
		{ "pcs_rx_clk_2_g", 29, 1 },
		{ "pcs_rx_clk_3_g", 28, 1 },
		{ "pcs_rx_clk_4_g", 27, 1 },
		{ "pcs_rx_clk_5_g", 26, 1 },
		{ "pcs_rx_clk_6_g", 25, 1 },
		{ "pcs_rx_clk_7_g", 24, 1 },
		{ "pcs_tx_clk_0_g", 23, 1 },
		{ "pcs_tx_clk_1_g", 22, 1 },
		{ "pcs_tx_clk_2_g", 21, 1 },
		{ "pcs_tx_clk_3_g", 20, 1 },
		{ "pcs_tx_clk_4_g", 19, 1 },
		{ "pcs_tx_clk_5_g", 18, 1 },
		{ "pcs_tx_clk_6_g", 17, 1 },
		{ "pcs_tx_clk_7_g", 16, 1 },
		{ "sd_rx_clk_en_0", 15, 1 },
		{ "sd_rx_clk_en_1", 14, 1 },
		{ "sd_rx_clk_en_2", 13, 1 },
		{ "sd_rx_clk_en_3", 12, 1 },
		{ "sd_rx_clk_en_4", 11, 1 },
		{ "sd_rx_clk_en_5", 10, 1 },
		{ "sd_rx_clk_en_6", 9, 1 },
		{ "sd_rx_clk_en_7", 8, 1 },
		{ "sd_tx_clk_en_0", 7, 1 },
		{ "sd_tx_clk_en_1", 6, 1 },
		{ "sd_tx_clk_en_2", 5, 1 },
		{ "sd_tx_clk_en_3", 4, 1 },
		{ "sd_tx_clk_en_4", 3, 1 },
		{ "sd_tx_clk_en_5", 2, 1 },
		{ "sd_tx_clk_en_6", 1, 1 },
		{ "sd_tx_clk_en_7", 0, 1 },
	{ "MAC_MTIP_CLK_CTRL_4", 0x38020, 0 },
		{ "sgmii_tx_clk_0_g", 7, 1 },
		{ "sgmii_tx_clk_1_g", 6, 1 },
		{ "sgmii_tx_clk_2_g", 5, 1 },
		{ "sgmii_tx_clk_3_g", 4, 1 },
		{ "sgmii_rx_clk_0_g", 3, 1 },
		{ "sgmii_rx_clk_1_g", 2, 1 },
		{ "sgmii_rx_clk_2_g", 1, 1 },
		{ "sgmii_rx_clk_3_g", 0, 1 },
	{ "MAC_PCS_CONFIG_0", 0x38024, 0 },
		{ "kp_mode_in", 24, 8 },
		{ "fec91_ena_in", 16, 8 },
		{ "sd_8x", 8, 8 },
		{ "sd_n2", 0, 8 },
	{ "MAC_PCS_CONFIG_1", 0x38028, 0 },
		{ "fast_1lane_mode", 24, 8 },
		{ "pacer_10g", 16, 8 },
		{ "pcs400_ena_in", 14, 2 },
		{ "mode40_ena_in4", 13, 1 },
		{ "mode40_ena_in0", 12, 1 },
		{ "pcs100_ena_in6", 11, 1 },
		{ "pcs100_ena_in4", 10, 1 },
		{ "pcs100_ena_in2", 9, 1 },
		{ "pcs100_ena_in0", 8, 1 },
		{ "rxlaui_ena_in6", 7, 1 },
		{ "rxlaui_ena_in4", 6, 1 },
		{ "rxlaui_ena_in2", 5, 1 },
		{ "rxlaui_ena_in0", 4, 1 },
		{ "fec91_lane_in6", 3, 1 },
		{ "fec91_lane_in4", 2, 1 },
		{ "fec91_lane_in2", 1, 1 },
		{ "fec91_lane_in0", 0, 1 },
	{ "MAC_PCS_CONFIG_2", 0x3802c, 0 },
		{ "sgpcs_en_3", 29, 1 },
		{ "sgpcs_en_2", 28, 1 },
		{ "sgpcs_en_1", 27, 1 },
		{ "sgpcs_en_0", 26, 1 },
		{ "cfg_clock_rate", 22, 4 },
		{ "fec_err_ena", 14, 8 },
		{ "fec_ena", 6, 8 },
		{ "pcs001_tx_am_sf", 3, 3 },
		{ "pcs000_tx_am_sf", 0, 3 },
	{ "MAC_PCS_STATUS_0", 0x38030, 0 },
		{ "pcs000_align_lock", 30, 2 },
		{ "pcs000_hi_ser", 28, 2 },
		{ "ber_timer_done", 20, 8 },
		{ "amps_lock", 4, 16 },
		{ "align_done", 0, 4 },
	{ "MAC_PCS_STATUS_1", 0x38034, 0 },
	{ "MAC_PCS_STATUS_2", 0x38038, 0 },
		{ "rsfec_aligned", 24, 8 },
		{ "fec_locked", 8, 16 },
		{ "block_lock", 0, 8 },
	{ "MAC_PCS_STATUS_3", 0x3803c, 0 },
		{ "fec_ncerr", 16, 16 },
		{ "fec_cerr", 0, 16 },
	{ "MAC_PCS_STATUS_4", 0x38040, 0 },
		{ "mac1_res_speed", 23, 8 },
		{ "mac0_res_speed", 14, 8 },
		{ "pcs400_ena_in_ref", 12, 2 },
		{ "pcs000_degrade_ser", 10, 2 },
		{ "p4x_signal_ok", 8, 2 },
		{ "mode200_ind_ref", 7, 1 },
		{ "mode200_8x26_ind_ref", 6, 1 },
		{ "pcs001_rx_am_sf", 3, 3 },
		{ "pcs000_rx_am_sf", 0, 3 },
	{ "MAC_PCS_STATUS_5", 0x38044, 0 },
		{ "mac5_res_speed", 24, 8 },
		{ "mac4_res_speed", 16, 8 },
		{ "mac3_res_speed", 8, 8 },
		{ "mac2_res_speed", 0, 8 },
	{ "MAC_PCS_STATUS_6", 0x38048, 0 },
		{ "marker_ins_cnt_100_00", 16, 15 },
		{ "mac7_res_speed", 8, 8 },
		{ "mac6_res_speed", 0, 8 },
	{ "MAC_PCS_STATUS_7", 0x3804c, 0 },
		{ "pcs000_link_status", 30, 2 },
		{ "marker_ins_cnt_100_02", 15, 15 },
		{ "marker_ins_cnt_100_01", 0, 15 },
	{ "MAC_PCS_STATUS_8", 0x38050, 0 },
		{ "marker_ins_cnt_25_1", 15, 16 },
		{ "marker_ins_cnt_100_03", 0, 15 },
	{ "MAC_PCS_STATUS_9", 0x38054, 0 },
		{ "marker_ins_cnt_25_5", 16, 16 },
		{ "marker_ins_cnt_25_3", 0, 16 },
	{ "MAC_PCS_STATUS_10", 0x38058, 0 },
		{ "marker_ins_cnt_25_50_2", 16, 16 },
		{ "marker_ins_cnt_25_50_0", 0, 16 },
	{ "MAC_PCS_STATUS_11", 0x3805c, 0 },
		{ "marker_ins_cnt_25_50_6", 16, 16 },
		{ "marker_ins_cnt_25_50_4", 0, 16 },
	{ "MAC_PCS_STATUS_12", 0x38060, 0 },
		{ "link_status", 24, 8 },
		{ "hi_ber", 16, 8 },
		{ "marker_ins_cnt_25_7", 0, 16 },
	{ "MAC_MAC200G400G_0_CONFIG_0", 0x38064, 0 },
		{ "peer_delay_val", 31, 1 },
		{ "peer_delay", 1, 30 },
		{ "mode1s_ena", 0, 1 },
	{ "MAC_MAC200G400G_0_CONFIG_1", 0x38068, 0 },
		{ "tx_ts_id", 12, 12 },
		{ "ff_tx_crc_ovr", 11, 1 },
		{ "xoff_gen", 3, 8 },
		{ "tx_smhold", 2, 1 },
		{ "tx_rem_fault", 1, 1 },
		{ "tx_loc_fault", 0, 1 },
	{ "MAC_MAC200G400G_0_CONFIG_2", 0x3806c, 0 },
	{ "MAC_MAC200G400G_0_CONFIG_3", 0x38070, 0 },
	{ "MAC_MAC200G400G_0_CONFIG_4", 0x38074, 0 },
	{ "MAC_MAC200G400G_0_STATUS", 0x38078, 0 },
		{ "tx_isidle", 19, 1 },
		{ "tx_underflow", 18, 1 },
		{ "tx_empty", 17, 1 },
		{ "rem_fault", 16, 1 },
		{ "reg_ts_avail", 15, 1 },
		{ "phy_txena", 14, 1 },
		{ "pfc_mode", 13, 1 },
		{ "pause_on", 5, 8 },
		{ "loop_ena", 4, 1 },
		{ "loc_fault", 3, 1 },
		{ "frm_drop", 2, 1 },
		{ "ff_tx_credit", 1, 1 },
		{ "ff_rx_empty", 0, 1 },
	{ "MAC_MAC200G400G_1_CONFIG_0", 0x3807c, 0 },
		{ "peer_delay_val", 31, 1 },
		{ "peer_delay", 1, 30 },
		{ "mode1s_ena", 0, 1 },
	{ "MAC_MAC200G400G_1_CONFIG_1", 0x38080, 0 },
		{ "tx_ts_id", 12, 12 },
		{ "ff_tx_crc_ovr", 11, 1 },
		{ "xoff_gen", 3, 8 },
		{ "tx_smhold", 2, 1 },
		{ "tx_rem_fault", 1, 1 },
		{ "tx_loc_fault", 0, 1 },
	{ "MAC_MAC200G400G_1_CONFIG_2", 0x38084, 0 },
	{ "MAC_MAC200G400G_1_CONFIG_3", 0x38088, 0 },
	{ "MAC_MAC200G400G_1_CONFIG_4", 0x3808c, 0 },
	{ "MAC_MAC200G400G_1_STATUS", 0x38090, 0 },
		{ "tx_isidle", 19, 1 },
		{ "tx_underflow", 18, 1 },
		{ "tx_empty", 17, 1 },
		{ "rem_fault", 16, 1 },
		{ "reg_ts_avail", 15, 1 },
		{ "phy_txena", 14, 1 },
		{ "pfc_mode", 13, 1 },
		{ "pause_on", 5, 8 },
		{ "loop_ena", 4, 1 },
		{ "loc_fault", 3, 1 },
		{ "frm_drop", 2, 1 },
		{ "ff_tx_credit", 1, 1 },
		{ "ff_rx_empty", 0, 1 },
	{ "MAC_AN_CFG_0", 0x38094, 0 },
		{ "an_data_ctl", 24, 8 },
		{ "an_ena", 16, 8 },
	{ "MAC_AN_CFG_1", 0x38098, 0 },
		{ "an_dis_timer_an_7", 7, 1 },
		{ "an_dis_timer_an_6", 6, 1 },
		{ "an_dis_timer_an_5", 5, 1 },
		{ "an_dis_timer_an_4", 4, 1 },
		{ "an_dis_timer_an_3", 3, 1 },
		{ "an_dis_timer_an_2", 2, 1 },
		{ "an_dis_timer_an_1", 1, 1 },
		{ "an_dis_timer_an_0", 0, 1 },
	{ "MAC_AN_SERDES25G_ENA", 0x3809c, 0 },
		{ "an_sd25_tx_ena_7", 15, 1 },
		{ "an_sd25_tx_ena_6", 14, 1 },
		{ "an_sd25_tx_ena_5", 13, 1 },
		{ "an_sd25_tx_ena_4", 12, 1 },
		{ "an_sd25_tx_ena_3", 11, 1 },
		{ "an_sd25_tx_ena_2", 10, 1 },
		{ "an_sd25_tx_ena_1", 9, 1 },
		{ "an_sd25_tx_ena_0", 8, 1 },
		{ "an_sd25_rx_ena_7", 7, 1 },
		{ "an_sd25_rx_ena_6", 6, 1 },
		{ "an_sd25_rx_ena_5", 5, 1 },
		{ "an_sd25_rx_ena_4", 4, 1 },
		{ "an_sd25_rx_ena_3", 3, 1 },
		{ "an_sd25_rx_ena_2", 2, 1 },
		{ "an_sd25_rx_ena_1", 1, 1 },
		{ "an_sd25_rx_ena_0", 0, 1 },
	{ "MAC_PLL_CFG_0", 0x380a0, 0 },
		{ "USE_RX_CDR_CLK_FOR_TX", 7, 1 },
		{ "HSSPLLSEL0", 5, 2 },
		{ "HSSTXDIV2CLK_SEL0", 3, 2 },
		{ "HSS_Reset0", 2, 1 },
		{ "APB_RESET0", 1, 1 },
		{ "HSSCLK32DIV2_RESET0", 0, 1 },
	{ "MAC_PLL_CFG_1", 0x380a4, 0 },
		{ "USE_RX_CDR_CLK_FOR_TX", 7, 1 },
		{ "HSSPLLSEL1", 5, 2 },
		{ "HSSTXDIV2CLK_SEL1", 3, 2 },
		{ "HSS_Reset1", 2, 1 },
		{ "APB_RESET1", 1, 1 },
		{ "HSSCLK32DIV2_RESET1", 0, 1 },
	{ "MAC_PLL_CFG_2", 0x380a8, 0 },
		{ "USE_RX_CDR_CLK_FOR_TX", 7, 1 },
		{ "HSSPLLSEL2", 5, 2 },
		{ "HSSTXDIV2CLK_SEL2", 3, 2 },
		{ "HSS_Reset2", 2, 1 },
		{ "APB_RESET2", 1, 1 },
		{ "HSSCLK32DIV2_RESET2", 0, 1 },
	{ "MAC_PLL_CFG_3", 0x380ac, 0 },
		{ "USE_RX_CDR_CLK_FOR_TX", 7, 1 },
		{ "HSSPLLSEL3", 5, 2 },
		{ "HSSTXDIV2CLK_SEL3", 3, 2 },
		{ "HSS_Reset3", 2, 1 },
		{ "APB_RESET3", 1, 1 },
		{ "HSSCLK32DIV2_RESET3", 0, 1 },
	{ "MAC_HSS_STATUS", 0x380b0, 0 },
		{ "tx_lane_pll_sel_3", 30, 2 },
		{ "tx_lane_pll_sel_2", 28, 2 },
		{ "tx_lane_pll_sel_1", 26, 2 },
		{ "tx_lane_pll_sel_0", 24, 2 },
		{ "HSSPLLLOCKB_HSS3", 7, 1 },
		{ "HSSPLLLOCKA_HSS3", 6, 1 },
		{ "HSSPLLLOCKB_HSS2", 5, 1 },
		{ "HSSPLLLOCKA_HSS2", 4, 1 },
		{ "HSSPLLLOCKB_HSS1", 3, 1 },
		{ "HSSPLLLOCKA_HSS1", 2, 1 },
		{ "HSSPLLLOCKB_HSS0", 1, 1 },
		{ "HSSPLLLOCKA_HSS0", 0, 1 },
	{ "MAC_HSS_SIGDET_STATUS", 0x380b4, 0 },
		{ "HSS3_sigdet", 6, 2 },
		{ "HSS2_sigdet", 4, 2 },
		{ "HSS1_sigdet", 2, 2 },
		{ "HSS0_sigdet", 0, 2 },
	{ "MAC_FPGA_CFG_0", 0x380b8, 0 },
	{ "MAC_PMD_STATUS", 0x380bc, 0 },
	{ "MAC_PMD_AN_CONFIG0", 0x380c0, 0 },
		{ "AN3_RATE_SELECT", 25, 5 },
		{ "AN3_STATUS", 24, 1 },
		{ "AN2_RATE_SELECT", 17, 5 },
		{ "AN2_STATUS", 16, 1 },
		{ "AN1_RATE_SELECT", 9, 5 },
		{ "AN1_STATUS", 8, 1 },
		{ "AN0_RATE_SELECT", 1, 5 },
		{ "AN0_STATUS", 0, 1 },
	{ "MAC_PMD_AN_CONFIG1", 0x380c4, 0 },
		{ "AN7_RATE_SELECT", 25, 5 },
		{ "AN7_STATUS", 24, 1 },
		{ "AN6_RATE_SELECT", 17, 5 },
		{ "AN6_STATUS", 16, 1 },
		{ "AN5_RATE_SELECT", 9, 5 },
		{ "AN5_STATUS", 8, 1 },
		{ "AN4_RATE_SELECT", 1, 5 },
		{ "AN4_STATUS", 0, 1 },
	{ "MAC_INT_EN_CMN", 0x380c8, 0 },
		{ "HSS3PLL1_LOCK_LOST", 21, 1 },
		{ "HSS3PLL1_LOCK", 20, 1 },
		{ "HSS3PLL0_LOCK_LOST", 19, 1 },
		{ "HSS3PLL0_LOCK", 18, 1 },
		{ "HSS2PLL1_LOCK_LOST", 17, 1 },
		{ "HSS2PLL1_LOCK", 16, 1 },
		{ "HSS2PLL0_LOCK_LOST", 15, 1 },
		{ "HSS2PLL0_LOCK", 14, 1 },
		{ "HSS1PLL1_LOCK_LOST", 13, 1 },
		{ "HSS1PLL1_LOCK", 12, 1 },
		{ "HSS1PLL0_LOCK_LOST", 11, 1 },
		{ "HSS1PLL0_LOCK", 10, 1 },
		{ "HSS0PLL1_LOCK_LOST", 9, 1 },
		{ "HSS0PLL1_LOCK", 8, 1 },
		{ "HSS0PLL0_LOCK_LOST", 7, 1 },
		{ "HSS0PLL0_LOCK", 6, 1 },
		{ "flock_asserted", 5, 1 },
		{ "flock_lost", 4, 1 },
		{ "phase_lock_asserted", 3, 1 },
		{ "phase_lock_lost", 2, 1 },
		{ "lock_asserted", 1, 1 },
		{ "lock_lost", 0, 1 },
	{ "MAC_INT_CAUSE_CMN", 0x380cc, 0 },
		{ "HSS3PLL1_LOCK_LOST", 21, 1 },
		{ "HSS3PLL1_LOCK", 20, 1 },
		{ "HSS3PLL0_LOCK_LOST", 19, 1 },
		{ "HSS3PLL0_LOCK", 18, 1 },
		{ "HSS2PLL1_LOCK_LOST", 17, 1 },
		{ "HSS2PLL1_LOCK", 16, 1 },
		{ "HSS2PLL0_LOCK_LOST", 15, 1 },
		{ "HSS2PLL0_LOCK", 14, 1 },
		{ "HSS1PLL1_LOCK_LOST", 13, 1 },
		{ "HSS1PLL1_LOCK", 12, 1 },
		{ "HSS1PLL0_LOCK_LOST", 11, 1 },
		{ "HSS1PLL0_LOCK", 10, 1 },
		{ "HSS0PLL1_LOCK_LOST", 9, 1 },
		{ "HSS0PLL1_LOCK", 8, 1 },
		{ "HSS0PLL0_LOCK_LOST", 7, 1 },
		{ "HSS0PLL0_LOCK", 6, 1 },
		{ "flock_asserted", 5, 1 },
		{ "flock_lost", 4, 1 },
		{ "phase_lock_asserted", 3, 1 },
		{ "phase_lock_lost", 2, 1 },
		{ "lock_asserted", 1, 1 },
		{ "lock_lost", 0, 1 },
	{ "MAC_PERR_INT_EN_MTIP", 0x380d0, 0 },
		{ "rx_mac40g", 28, 1 },
		{ "tx_mac40g", 27, 1 },
		{ "rx_st_mac40g", 26, 1 },
		{ "tx_st_mac40g", 25, 1 },
		{ "tx_mac1g10g", 24, 1 },
		{ "rx_mac1g10g", 23, 1 },
		{ "rx_status_mac1g10g", 22, 1 },
		{ "rx_st_mac1g10g", 21, 1 },
		{ "tx_st_mac1g10g", 20, 1 },
		{ "Perr_mac0_tx", 19, 1 },
		{ "Perr_mac1_tx", 18, 1 },
		{ "Perr_mac2_tx", 17, 1 },
		{ "Perr_mac3_tx", 16, 1 },
		{ "Perr_mac4_tx", 15, 1 },
		{ "Perr_mac5_tx", 14, 1 },
		{ "Perr_mac0_rx", 13, 1 },
		{ "Perr_mac1_rx", 12, 1 },
		{ "Perr_mac2_rx", 11, 1 },
		{ "Perr_mac3_rx", 10, 1 },
		{ "Perr_mac4_rx", 9, 1 },
		{ "Perr_mac5_rx", 8, 1 },
		{ "Perr_mac_stat2_rx", 7, 1 },
		{ "Perr_mac_stat3_rx", 6, 1 },
		{ "Perr_mac_stat4_rx", 5, 1 },
		{ "Perr_mac_stat5_rx", 4, 1 },
		{ "Perr_mac_stat2_tx", 3, 1 },
		{ "Perr_mac_stat3_tx", 2, 1 },
		{ "Perr_mac_stat4_tx", 1, 1 },
		{ "Perr_mac_stat5_tx", 0, 1 },
	{ "MAC_PERR_INT_CAUSE_MTIP", 0x380d4, 0 },
		{ "rx_mac40g", 28, 1 },
		{ "tx_mac40g", 27, 1 },
		{ "rx_st_mac40g", 26, 1 },
		{ "tx_st_mac40g", 25, 1 },
		{ "tx_mac1g10g", 24, 1 },
		{ "rx_mac1g10g", 23, 1 },
		{ "rx_status_mac1g10g", 22, 1 },
		{ "rx_st_mac1g10g", 21, 1 },
		{ "tx_st_mac1g10g", 20, 1 },
		{ "Perr_mac0_tx", 19, 1 },
		{ "Perr_mac1_tx", 18, 1 },
		{ "Perr_mac2_tx", 17, 1 },
		{ "Perr_mac3_tx", 16, 1 },
		{ "Perr_mac4_tx", 15, 1 },
		{ "Perr_mac5_tx", 14, 1 },
		{ "Perr_mac0_rx", 13, 1 },
		{ "Perr_mac1_rx", 12, 1 },
		{ "Perr_mac2_rx", 11, 1 },
		{ "Perr_mac3_rx", 10, 1 },
		{ "Perr_mac4_rx", 9, 1 },
		{ "Perr_mac5_rx", 8, 1 },
		{ "Perr_mac_stat_rx", 7, 1 },
		{ "Perr_mac_stat3_rx", 6, 1 },
		{ "Perr_mac_stat4_rx", 5, 1 },
		{ "Perr_mac_stat5_rx", 4, 1 },
		{ "Perr_mac_stat_tx", 3, 1 },
		{ "Perr_mac_stat_cap", 2, 1 },
		{ "Perr_mac_stat4_tx", 1, 1 },
		{ "Perr_mac_stat5_tx", 0, 1 },
	{ "MAC_PERR_ENABLE_MTIP", 0x380d8, 0 },
		{ "rx_mac40g", 28, 1 },
		{ "tx_mac40g", 27, 1 },
		{ "rx_st_mac40g", 26, 1 },
		{ "tx_st_mac40g", 25, 1 },
		{ "tx_mac1g10g", 24, 1 },
		{ "rx_mac1g10g", 23, 1 },
		{ "rx_status_mac1g10g", 22, 1 },
		{ "rx_st_mac1g10g", 21, 1 },
		{ "tx_st_mac1g10g", 20, 1 },
		{ "Perr_mac0_tx", 19, 1 },
		{ "Perr_mac1_tx", 18, 1 },
		{ "Perr_mac2_tx", 17, 1 },
		{ "Perr_mac3_tx", 16, 1 },
		{ "Perr_mac4_tx", 15, 1 },
		{ "Perr_mac5_tx", 14, 1 },
		{ "Perr_mac0_rx", 13, 1 },
		{ "Perr_mac1_rx", 12, 1 },
		{ "Perr_mac2_rx", 11, 1 },
		{ "Perr_mac3_rx", 10, 1 },
		{ "Perr_mac4_rx", 9, 1 },
		{ "Perr_mac5_rx", 8, 1 },
		{ "Perr_mac_stat2_rx", 7, 1 },
		{ "Perr_mac_stat3_rx", 6, 1 },
		{ "Perr_mac_stat4_rx", 5, 1 },
		{ "Perr_mac_stat5_rx", 4, 1 },
		{ "Perr_mac_stat2_tx", 3, 1 },
		{ "Perr_mac_stat3_tx", 2, 1 },
		{ "Perr_mac_stat4_tx", 1, 1 },
		{ "Perr_mac_stat5_tx", 0, 1 },
	{ "MAC_PCS_1G_CONFIG_0", 0x380dc, 0 },
		{ "seq_ena_3", 19, 1 },
		{ "seq_ena_2", 18, 1 },
		{ "seq_ena_1", 17, 1 },
		{ "seq_ena_0", 16, 1 },
		{ "tx_lane_thresh_3", 12, 4 },
		{ "tx_lane_thresh_2", 8, 4 },
		{ "tx_lane_thresh_1", 4, 4 },
		{ "tx_lane_thresh_0", 0, 4 },
	{ "MAC_PCS_1G_CONFIG_1", 0x380e0, 0 },
		{ "tx_lane_ckmult_3", 9, 3 },
		{ "tx_lane_ckmult_2", 6, 3 },
		{ "tx_lane_ckmult_1", 3, 3 },
		{ "tx_lane_ckmult_0", 0, 3 },
	{ "MAC_PTP_TIMER_RD0_LO", 0x380e4, 0 },
	{ "MAC_PTP_TIMER_RD0_HI", 0x380e8, 0 },
	{ "MAC_PTP_TIMER_RD1_LO", 0x380ec, 0 },
	{ "MAC_PTP_TIMER_RD1_HI", 0x380f0, 0 },
	{ "MAC_PTP_TIMER_WR_LO", 0x380f4, 0 },
	{ "MAC_PTP_TIMER_WR_HI", 0x380f8, 0 },
	{ "MAC_PTP_TIMER_OFFSET_0", 0x380fc, 0 },
	{ "MAC_PTP_TIMER_OFFSET_1", 0x38100, 0 },
	{ "MAC_PTP_TIMER_OFFSET_2", 0x38104, 0 },
	{ "MAC_PTP_SUM_LO", 0x38108, 0 },
	{ "MAC_PTP_SUM_HI", 0x3810c, 0 },
	{ "MAC_PTP_TIMER_INCR0", 0x38110, 0 },
		{ "Y", 16, 16 },
		{ "X", 0, 16 },
	{ "MAC_PTP_TIMER_INCR1", 0x38114, 0 },
		{ "Y_TICK", 16, 16 },
		{ "X_TICK", 0, 16 },
	{ "MAC_PTP_DRIFT_ADJUST_COUNT", 0x38118, 0 },
	{ "MAC_PTP_OFFSET_ADJUST_FINE", 0x3811c, 0 },
		{ "B", 16, 16 },
		{ "A", 0, 16 },
	{ "MAC_PTP_OFFSET_ADJUST_TOTAL", 0x38120, 0 },
	{ "MAC_PTP_CFG", 0x38124, 0 },
		{ "ALARM_EN", 21, 1 },
		{ "ALARM_START", 20, 1 },
		{ "PPS_EN", 19, 1 },
		{ "FRZ", 18, 1 },
		{ "OFFSER_ADJUST_SIGN", 17, 1 },
		{ "ADD_OFFSET", 16, 1 },
		{ "CYCLE1", 8, 8 },
		{ "Q", 0, 8 },
	{ "MAC_PTP_PPS", 0x38128, 0 },
	{ "MAC_PTP_SINGLE_ALARM", 0x3812c, 0 },
	{ "MAC_PTP_PERIODIC_ALARM", 0x38130, 0 },
	{ "MAC_PTP_STATUS", 0x38134, 0 },
	{ "MAC_STS_GPIO_SEL", 0x38140, 0 },
		{ "STSOUTSEL", 1, 1 },
		{ "STSINSEL", 0, 1 },
	{ "MAC_CERR_INT_EN_MTIP", 0x38150, 0 },
		{ "Cerr_mac0_tx", 11, 1 },
		{ "Cerr_mac1_tx", 10, 1 },
		{ "Cerr_mac2_tx", 9, 1 },
		{ "Cerr_mac3_tx", 8, 1 },
		{ "Cerr_mac4_tx", 7, 1 },
		{ "Cerr_mac5_tx", 6, 1 },
		{ "Cerr_mac0_rx", 5, 1 },
		{ "Cerr_mac1_rx", 4, 1 },
		{ "Cerr_mac2_rx", 3, 1 },
		{ "Cerr_mac3_rx", 2, 1 },
		{ "Cerr_mac4_rx", 1, 1 },
		{ "Cerr_mac5_rx", 0, 1 },
	{ "MAC_CERR_INT_CAUSE_MTIP", 0x38154, 0 },
		{ "Cerr_mac0_tx", 11, 1 },
		{ "Cerr_mac1_tx", 10, 1 },
		{ "Cerr_mac2_tx", 9, 1 },
		{ "Cerr_mac3_tx", 8, 1 },
		{ "Cerr_mac4_tx", 7, 1 },
		{ "Cerr_mac5_tx", 6, 1 },
		{ "Cerr_mac0_rx", 5, 1 },
		{ "Cerr_mac1_rx", 4, 1 },
		{ "Cerr_mac2_rx", 3, 1 },
		{ "Cerr_mac3_rx", 2, 1 },
		{ "Cerr_mac4_rx", 1, 1 },
		{ "Cerr_mac5_rx", 0, 1 },
	{ "MAC_1G_PCS0_STATUS", 0x38160, 0 },
		{ "sg_loopback", 12, 1 },
		{ "sg_link_status", 11, 1 },
		{ "sg_rx_sync", 10, 1 },
		{ "sg_an_done", 9, 1 },
		{ "sg_page_recieved", 8, 1 },
		{ "sg_speed_sel", 6, 2 },
		{ "sg_half_duplex", 5, 1 },
		{ "pma_tx_mode_quiet", 4, 1 },
		{ "tx_lpi_active", 3, 1 },
		{ "pma_rx_mode_quiet", 2, 1 },
		{ "rx_lpi_active", 1, 1 },
		{ "rx_wake_err", 0, 1 },
	{ "MAC_1G_PCS1_STATUS", 0x38164, 0 },
		{ "sg_loopback", 12, 1 },
		{ "sg_link_status", 11, 1 },
		{ "sg_rx_sync", 10, 1 },
		{ "sg_an_done", 9, 1 },
		{ "sg_page_recieved", 8, 1 },
		{ "sg_speed_sel", 6, 2 },
		{ "sg_half_duplex", 5, 1 },
		{ "pma_tx_mode_quiet", 4, 1 },
		{ "tx_lpi_active", 3, 1 },
		{ "pma_rx_mode_quiet", 2, 1 },
		{ "rx_lpi_active", 1, 1 },
		{ "rx_wake_err", 0, 1 },
	{ "MAC_1G_PCS2_STATUS", 0x38168, 0 },
		{ "sg_loopback", 12, 1 },
		{ "sg_link_status", 11, 1 },
		{ "sg_rx_sync", 10, 1 },
		{ "sg_an_done", 9, 1 },
		{ "sg_page_recieved", 8, 1 },
		{ "sg_speed_sel", 6, 2 },
		{ "sg_half_duplex", 5, 1 },
		{ "pma_tx_mode_quiet", 4, 1 },
		{ "tx_lpi_active", 3, 1 },
		{ "pma_rx_mode_quiet", 2, 1 },
		{ "rx_lpi_active", 1, 1 },
		{ "rx_wake_err", 0, 1 },
	{ "MAC_1G_PCS3_STATUS", 0x3816c, 0 },
		{ "sg_loopback", 12, 1 },
		{ "sg_link_status", 11, 1 },
		{ "sg_rx_sync", 10, 1 },
		{ "sg_an_done", 9, 1 },
		{ "sg_page_recieved", 8, 1 },
		{ "sg_speed_sel", 6, 2 },
		{ "sg_half_duplex", 5, 1 },
		{ "pma_tx_mode_quiet", 4, 1 },
		{ "tx_lpi_active", 3, 1 },
		{ "pma_rx_mode_quiet", 2, 1 },
		{ "rx_lpi_active", 1, 1 },
		{ "rx_wake_err", 0, 1 },
	{ "MAC_PCS_LPI_STATUS_0", 0x38170, 0 },
	{ "MAC_PCS_LPI_STATUS_1", 0x38174, 0 },
	{ "MAC_PCS_LPI_STATUS_2", 0x38178, 0 },
		{ "RX_LPI_MODE", 24, 8 },
		{ "RX_LPI_STATE", 0, 24 },
	{ "MAC_PCS_LPI_STATUS_3", 0x3817c, 0 },
	{ "MAC_TX0_CLK_DIV", 0x38180, 0 },
	{ "MAC_TX1_CLK_DIV", 0x38184, 0 },
	{ "MAC_TX2_CLK_DIV", 0x38188, 0 },
	{ "MAC_TX3_CLK_DIV", 0x3818c, 0 },
	{ "MAC_TX4_CLK_DIV", 0x38190, 0 },
	{ "MAC_TX5_CLK_DIV", 0x38194, 0 },
	{ "MAC_TX6_CLK_DIV", 0x38198, 0 },
	{ "MAC_TX7_CLK_DIV", 0x3819c, 0 },
	{ "MAC_RX0_CLK_DIV", 0x381a0, 0 },
	{ "MAC_RX1_CLK_DIV", 0x381a4, 0 },
	{ "MAC_RX2_CLK_DIV", 0x381a8, 0 },
	{ "MAC_RX3_CLK_DIV", 0x381ac, 0 },
	{ "MAC_RX4_CLK_DIV", 0x381b0, 0 },
	{ "MAC_RX5_CLK_DIV", 0x381b4, 0 },
	{ "MAC_RX6_CLK_DIV", 0x381b8, 0 },
	{ "MAC_RX7_CLK_DIV", 0x381bc, 0 },
	{ "MAC_SYNC_E_CDR_LANE_SEL", 0x381c0, 0 },
		{ "CML_MUX_SEL", 11, 1 },
		{ "CMOS_OUT_EN", 10, 1 },
		{ "CML_OUT_EN", 9, 1 },
		{ "LOC_FAULT_PORT_SEL", 6, 2 },
		{ "TX_CDR_LANE_SEL", 3, 3 },
		{ "RX_CDR_LANE_SEL", 0, 3 },
	{ "MAC_DEBUG_PL_IF_1", 0x381c4, 0 },
	{ "MAC_SIGNAL_DETECT_CTRL", 0x381f0, 0 },
		{ "Signal_Det_ln7", 15, 1 },
		{ "Signal_Det_ln6", 14, 1 },
		{ "Signal_Det_ln5", 13, 1 },
		{ "Signal_Det_ln4", 12, 1 },
		{ "Signal_Det_ln3", 11, 1 },
		{ "Signal_Det_ln2", 10, 1 },
		{ "Signal_Det_ln1", 9, 1 },
		{ "Signal_Det_ln0", 8, 1 },
		{ "SigDetCtrl_ln7", 7, 1 },
		{ "SigDetCtrl_ln6", 6, 1 },
		{ "SigDetCtrl_ln5", 5, 1 },
		{ "SigDetCtrl_ln4", 4, 1 },
		{ "SigDetCtrl_ln3", 3, 1 },
		{ "SigDetCtrl_ln2", 2, 1 },
		{ "SigDetCtrl_ln1", 1, 1 },
		{ "SigDetCtrl_ln0", 0, 1 },
	{ "MAC_FPGA_STATUS_FRM_BOARD", 0x381f4, 0 },
		{ "SFP3_RX_LOS", 15, 1 },
		{ "SFP3_TX_FAULT", 14, 1 },
		{ "SFP3_MOD_PRES", 13, 1 },
		{ "SFP2_RX_LOS", 12, 1 },
		{ "SFP2_TX_FAULT", 11, 1 },
		{ "SFP2_MOD_PRES", 10, 1 },
		{ "SFP1_RX_LOS", 9, 1 },
		{ "SFP1_TX_FAULT", 8, 1 },
		{ "SFP1_MOD_PRES", 7, 1 },
		{ "SFP0_RX_LOS", 6, 1 },
		{ "SFP0_TX_FAULT", 5, 1 },
		{ "SFP0_MOD_PRES", 4, 1 },
		{ "QSFP1_INT_L", 3, 1 },
		{ "QSFP1_MOD_PRES", 2, 1 },
		{ "QSFP0_INT_L", 1, 1 },
		{ "QSFP0_MOD_PRES", 0, 1 },
	{ "MAC_FPGA_CONTROL_TO_BOARD", 0x381f8, 0 },
		{ "SBA_EN", 12, 2 },
		{ "LB_MODE", 10, 2 },
		{ "SFP3_TX_DISABLE", 9, 1 },
		{ "SFP2_TX_DISABLE", 8, 1 },
		{ "SFP1_TX_DISABLE", 7, 1 },
		{ "SFP0_TX_DISABLE", 6, 1 },
		{ "QSFP1_LPMODE", 5, 1 },
		{ "QSFP1_MODSEL_L", 4, 1 },
		{ "QSFP1_RESET_L", 3, 1 },
		{ "QSFP0_LPMODE", 2, 1 },
		{ "QSFP0_MODSEL_L", 1, 1 },
		{ "QSFP0_RESET_L", 0, 1 },
	{ "MAC_FPGA_LINK_STATUS", 0x381fc, 0 },
		{ "port3_fpga_link_up", 3, 1 },
		{ "port2_fpga_link_up", 2, 1 },
		{ "port1_fpga_link_up", 1, 1 },
		{ "port0_fpga_link_up", 0, 1 },
	{ "MAC_MTIP_MAC400G_0_MTIP_REVISION", 0x38200, 0 },
		{ "CUSTREV", 16, 16 },
		{ "VER", 8, 8 },
		{ "REV", 0, 8 },
	{ "MAC_MTIP_MAC400G_0_MTIP_SCRATCH", 0x38204, 0 },
	{ "MAC_MTIP_MAC400G_0_MTIP_COMMAND_CONFIG", 0x38208, 0 },
		{ "INV_LOOP", 31, 1 },
		{ "FLT_HDL_DIS", 27, 1 },
		{ "TX_FIFO_RESET", 26, 1 },
		{ "TX_FLUSH", 22, 1 },
		{ "RX_SFD_ANY", 21, 1 },
		{ "PAUSE_PFC_COMP", 20, 1 },
		{ "PFC_MODE", 19, 1 },
		{ "NO_LGTH_CHECK", 17, 1 },
		{ "SEND_IDLE", 16, 1 },
		{ "PHY_TXENA", 15, 1 },
		{ "RX_ERR_DISC", 14, 1 },
		{ "CMD_FRAME_ENA", 13, 1 },
		{ "SW_RESET", 12, 1 },
		{ "TX_PAD_EN", 11, 1 },
		{ "LOOPBACK_EN", 10, 1 },
		{ "TX_ADDR_INS", 9, 1 },
		{ "PAUSE_IGNORE", 8, 1 },
		{ "PAUSE_FWD", 7, 1 },
		{ "CRC_FWD", 6, 1 },
		{ "PAD_EN", 5, 1 },
		{ "PROMIS_EN", 4, 1 },
		{ "RX_ENA", 1, 1 },
		{ "TX_ENA", 0, 1 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_ADDR_0", 0x3820c, 0 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_ADDR_1", 0x38210, 0 },
	{ "MAC_MTIP_MAC400G_0_MTIP_FRM_LENGTH", 0x38214, 0 },
	{ "MAC_MTIP_MAC400G_0_MTIP_RX_FIFO_SECTIONS", 0x3821c, 0 },
		{ "AVAIL", 16, 16 },
		{ "EMPTY", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_TX_FIFO_SECTIONS", 0x38220, 0 },
		{ "AVAIL", 16, 16 },
		{ "EMPTY", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_RX_FIFO_ALMOST_F_E", 0x38224, 0 },
		{ "AlmstFull", 16, 16 },
		{ "AlmstEmpty", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_TX_FIFO_ALMOST_F_E", 0x38228, 0 },
		{ "AlmstFull", 16, 16 },
		{ "AlmstEmpty", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_HASHTABLE_LOAD", 0x3822c, 0 },
		{ "ENABLE", 8, 1 },
		{ "ADDR", 0, 6 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_STATUS", 0x38240, 0 },
		{ "TX_ISIDLE", 8, 1 },
		{ "RX_EMPTY", 6, 1 },
		{ "TX_EMPTY", 5, 1 },
		{ "TS_AVAIL", 3, 1 },
		{ "PHY_LOS", 2, 1 },
		{ "RX_REM_FAULT", 1, 1 },
		{ "RX_LOC_FAULT", 0, 1 },
	{ "MAC_MTIP_MAC400G_0_MTIP_TX_IPG_LENGTH", 0x38244, 0 },
		{ "LEN", 19, 13 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL01_PAUSE_QUANTA", 0x38254, 0 },
		{ "CL1_PAUSE_QUANTA", 16, 16 },
		{ "CL0_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL23_PAUSE_QUANTA", 0x38258, 0 },
		{ "CL3_PAUSE_QUANTA", 16, 16 },
		{ "CL2_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL45_PAUSE_QUANTA", 0x3825c, 0 },
		{ "CL5_PAUSE_QUANTA", 16, 16 },
		{ "CL4_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL67_PAUSE_QUANTA", 0x38260, 0 },
		{ "CL7_PAUSE_QUANTA", 16, 16 },
		{ "CL6_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL01_PAUSE_QUANTA_THRESH", 0x38264, 0 },
		{ "CL1_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL0_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL23_PAUSE_QUANTA_THRESH", 0x38268, 0 },
		{ "CL3_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL2_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL45_PAUSE_QUANTA_THRESH", 0x3826c, 0 },
		{ "CL5_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL4_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_MAC_CL67_PAUSE_QUANTA_THRESH", 0x38270, 0 },
		{ "CL7_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL6_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_0_MTIP_RX_PAUSE_STATUS", 0x38274, 0 },
	{ "MAC_MTIP_MAC400G_0_MTIP_TS_TIMESTAMP", 0x3827c, 0 },
	{ "MAC_MTIP_MAC400G_0_MTIP_XIF_MODE", 0x38280, 0 },
		{ "ONE_STEP_ENA", 5, 1 },
	{ "MAC_MTIP_MAC400G_1_MTIP_REVISION", 0x38300, 0 },
		{ "CUSTREV", 16, 16 },
		{ "VER", 8, 8 },
		{ "REV", 0, 8 },
	{ "MAC_MTIP_MAC400G_1_MTIP_SCRATCH", 0x38304, 0 },
	{ "MAC_MTIP_MAC400G_1_MTIP_COMMAND_CONFIG", 0x38308, 0 },
		{ "INV_LOOP", 31, 1 },
		{ "FLT_HDL_DIS", 27, 1 },
		{ "TX_FIFO_RESET", 26, 1 },
		{ "TX_FLUSH", 22, 1 },
		{ "RX_SFD_ANY", 21, 1 },
		{ "PAUSE_PFC_COMP", 20, 1 },
		{ "PFC_MODE", 19, 1 },
		{ "NO_LGTH_CHECK", 17, 1 },
		{ "SEND_IDLE", 16, 1 },
		{ "PHY_TXENA", 15, 1 },
		{ "RX_ERR_DISC", 14, 1 },
		{ "CMD_FRAME_ENA", 13, 1 },
		{ "SW_RESET", 12, 1 },
		{ "TX_PAD_EN", 11, 1 },
		{ "LOOPBACK_EN", 10, 1 },
		{ "TX_ADDR_INS", 9, 1 },
		{ "PAUSE_IGNORE", 8, 1 },
		{ "PAUSE_FWD", 7, 1 },
		{ "CRC_FWD", 6, 1 },
		{ "PAD_EN", 5, 1 },
		{ "PROMIS_EN", 4, 1 },
		{ "RX_ENA", 1, 1 },
		{ "TX_ENA", 0, 1 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_ADDR_0", 0x3830c, 0 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_ADDR_1", 0x38310, 0 },
	{ "MAC_MTIP_MAC400G_1_MTIP_FRM_LENGTH", 0x38314, 0 },
	{ "MAC_MTIP_MAC400G_1_MTIP_RX_FIFO_SECTIONS", 0x3831c, 0 },
		{ "AVAIL", 16, 16 },
		{ "EMPTY", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_TX_FIFO_SECTIONS", 0x38320, 0 },
		{ "AVAIL", 16, 16 },
		{ "EMPTY", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_RX_FIFO_ALMOST_F_E", 0x38324, 0 },
		{ "AlmstFull", 16, 16 },
		{ "AlmstEmpty", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_TX_FIFO_ALMOST_F_E", 0x38328, 0 },
		{ "AlmstFull", 16, 16 },
		{ "AlmstEmpty", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_HASHTABLE_LOAD", 0x3832c, 0 },
		{ "ENABLE", 8, 1 },
		{ "ADDR", 0, 6 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_STATUS", 0x38340, 0 },
		{ "TX_ISIDLE", 8, 1 },
		{ "RX_EMPTY", 6, 1 },
		{ "TX_EMPTY", 5, 1 },
		{ "TS_AVAIL", 3, 1 },
		{ "PHY_LOS", 2, 1 },
		{ "RX_REM_FAULT", 1, 1 },
		{ "RX_LOC_FAULT", 0, 1 },
	{ "MAC_MTIP_MAC400G_1_MTIP_TX_IPG_LENGTH", 0x38344, 0 },
		{ "LEN", 19, 13 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL01_PAUSE_QUANTA", 0x38354, 0 },
		{ "CL1_PAUSE_QUANTA", 16, 16 },
		{ "CL0_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL23_PAUSE_QUANTA", 0x38358, 0 },
		{ "CL3_PAUSE_QUANTA", 16, 16 },
		{ "CL2_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL45_PAUSE_QUANTA", 0x3835c, 0 },
		{ "CL5_PAUSE_QUANTA", 16, 16 },
		{ "CL4_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL67_PAUSE_QUANTA", 0x38360, 0 },
		{ "CL7_PAUSE_QUANTA", 16, 16 },
		{ "CL6_PAUSE_QUANTA", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL01_PAUSE_QUANTA_THRESH", 0x38364, 0 },
		{ "CL1_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL0_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL23_PAUSE_QUANTA_THRESH", 0x38368, 0 },
		{ "CL3_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL2_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL45_PAUSE_QUANTA_THRESH", 0x3836c, 0 },
		{ "CL5_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL4_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_MAC_CL67_PAUSE_QUANTA_THRESH", 0x38370, 0 },
		{ "CL7_PAUSE_QUANTA_THRESH", 16, 16 },
		{ "CL6_PAUSE_QUANTA_THRESH", 0, 16 },
	{ "MAC_MTIP_MAC400G_1_MTIP_RX_PAUSE_STATUS", 0x38374, 0 },
	{ "MAC_MTIP_MAC400G_1_MTIP_TS_TIMESTAMP", 0x3837c, 0 },
	{ "MAC_MTIP_MAC400G_1_MTIP_XIF_MODE", 0x38380, 0 },
		{ "ONE_STEP_ENA", 5, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_CONTROL_1", 0x38400, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection", 2, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_STATUS_1", 0x38404, 0 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICE_ID0", 0x38408, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICE_ID1", 0x3840c, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_SPEED_ABILITY", 0x38410, 0 },
		{ "400G_capable", 9, 1 },
		{ "40G_capable", 8, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICES_IN_PKG1", 0x38414, 0 },
		{ "Device_Package", 3, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DEVICES_IN_PKG2", 0x38418, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_CONTROL_2", 0x3841c, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_STATUS_2", 0x38420, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_STATUS_3", 0x38424, 0 },
		{ "Device_present", 2, 14 },
		{ "400GBase_R", 1, 1 },
		{ "200GBase_R", 0, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_PKG_ID0", 0x38438, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_PKG_ID1", 0x3843c, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_STATUS_1", 0x38480, 0 },
		{ "RX_Link_STAT", 12, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_STATUS_2", 0x38484, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_TEST_CONTROL", 0x384a8, 0 },
		{ "Scrambled_ID_TP_EN", 7, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_BASE_R_TEST_ERR_CNT", 0x384ac, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_BER_HIGH_ORDER_CNT", 0x384b0, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_ERR_BLK_HIGH_ORDER_CNT", 0x384b4, 0 },
		{ "High_ORDER", 15, 1 },
		{ "Error_block_counter", 0, 14 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_1", 0x384c8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_2", 0x384cc, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_3", 0x384d0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_MULTI_LANE_ALIGN_STATUS_4", 0x384d4, 0 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_0_MAPPING", 0x384d8, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_1_MAPPING", 0x384dc, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_2_MAPPING", 0x384e0, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_3_MAPPING", 0x384e4, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_4_MAPPING", 0x384e8, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_5_MAPPING", 0x384ec, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_6_MAPPING", 0x384f0, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_7_MAPPING", 0x384f4, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_8_MAPPING", 0x384f8, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_9_MAPPING", 0x384fc, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_10_MAPPING", 0x38500, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_11_MAPPING", 0x38504, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_12_MAPPING", 0x38508, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_13_MAPPING", 0x3850c, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_14_MAPPING", 0x38510, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_LANE_15_MAPPING", 0x38514, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_SCRATCH", 0x38600, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_CORE_REVISION", 0x38604, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_CL_INTVL", 0x38608, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_TX_LANE_THRESH", 0x3860c, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_TX_CDMII_PACE", 0x3861c, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_AM_0", 0x38620, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_AM_1", 0x38624, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO0", 0x38800, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO1", 0x38804, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO2", 0x38808, 0 },
	{ "MAC_MTIP_PCS400G_0_MTIP_400G_DBGINFO3", 0x3880c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_CONTROL_1", 0x38900, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Low_power", 11, 1 },
		{ "Speed_selection", 2, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_STATUS_1", 0x38904, 0 },
		{ "Fault", 7, 1 },
		{ "RX_Link_Status", 2, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICE_ID0", 0x38908, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICE_ID1", 0x3890c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_SPEED_ABILITY", 0x38910, 0 },
		{ "400G_capable", 9, 1 },
		{ "40G_capable", 8, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICES_IN_PKG1", 0x38914, 0 },
		{ "Device_Package", 3, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DEVICES_IN_PKG2", 0x38918, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_CONTROL_2", 0x3891c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_STATUS_2", 0x38920, 0 },
		{ "Device_present", 14, 2 },
		{ "Transmit_fault", 11, 1 },
		{ "Receive_fault", 10, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_STATUS_3", 0x38924, 0 },
		{ "Device_present", 2, 14 },
		{ "400GBase_R", 1, 1 },
		{ "200GBase_R", 0, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_PKG_ID0", 0x38938, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_PKG_ID1", 0x3893c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_STATUS_1", 0x38980, 0 },
		{ "RX_Link_STAT", 12, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_STATUS_2", 0x38984, 0 },
		{ "Latched_block_lock", 15, 1 },
		{ "Latched_high_BER", 14, 1 },
		{ "Errored_blocks_cntr", 0, 8 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_TEST_CONTROL", 0x389a8, 0 },
		{ "Scrambled_ID_TP_EN", 7, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_BASE_R_TEST_ERR_CNT", 0x389ac, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_BER_HIGH_ORDER_CNT", 0x389b0, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_ERR_BLK_HIGH_ORDER_CNT", 0x389b4, 0 },
		{ "High_ORDER", 15, 1 },
		{ "Error_block_counter", 0, 14 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_1", 0x389c8, 0 },
		{ "LANE_ALIGN_STAT", 12, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_2", 0x389cc, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_3", 0x389d0, 0 },
		{ "Lane7_algn_mrkr_lck", 7, 1 },
		{ "Lane6_algn_mrkr_lck", 6, 1 },
		{ "Lane5_algn_mrkr_lck", 5, 1 },
		{ "Lane4_algn_mrkr_lck", 4, 1 },
		{ "Lane3_algn_mrkr_lck", 3, 1 },
		{ "Lane2_algn_mrkr_lck", 2, 1 },
		{ "Lane1_algn_mrkr_lck", 1, 1 },
		{ "Lane0_algn_mrkr_lck", 0, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_MULTI_LANE_ALIGN_STATUS_4", 0x389d4, 0 },
		{ "Lane15_algn_mrkr_lck", 7, 1 },
		{ "Lane14_algn_mrkr_lck", 6, 1 },
		{ "Lane13_algn_mrkr_lck", 5, 1 },
		{ "Lane12_algn_mrkr_lck", 4, 1 },
		{ "Lane11_algn_mrkr_lck", 3, 1 },
		{ "Lane10_algn_mrkr_lck", 2, 1 },
		{ "Lane9_algn_mrkr_lck", 1, 1 },
		{ "Lane8_algn_mrkr_lck", 0, 1 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_0_MAPPING", 0x389d8, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_1_MAPPING", 0x389dc, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_2_MAPPING", 0x389e0, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_3_MAPPING", 0x389e4, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_4_MAPPING", 0x389e8, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_5_MAPPING", 0x389ec, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_6_MAPPING", 0x389f0, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_7_MAPPING", 0x389f4, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_8_MAPPING", 0x389f8, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_9_MAPPING", 0x389fc, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_10_MAPPING", 0x38a00, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_11_MAPPING", 0x38a04, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_12_MAPPING", 0x38a08, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_13_MAPPING", 0x38a0c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_14_MAPPING", 0x38a10, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_LANE_15_MAPPING", 0x38a14, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_SCRATCH", 0x38b00, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_CORE_REVISION", 0x38b04, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_CL_INTVL", 0x38b08, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_TX_LANE_THRESH", 0x38b0c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_TX_CDMII_PACE", 0x38b1c, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_AM_0", 0x38b20, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_AM_1", 0x38b24, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO0", 0x38d00, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO1", 0x38d04, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO2", 0x38d08, 0 },
	{ "MAC_MTIP_PCS400G_1_MTIP_400G_DBGINFO3", 0x38d0c, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_0", 0x38e00, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_0", 0x38e04, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_0", 0x38e08, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_0", 0x38e0c, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_0", 0x38e10, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_0", 0x38e14, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_0", 0x38e18, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_0", 0x38e1c, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_1", 0x38e20, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_1", 0x38e24, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_1", 0x38e28, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_1", 0x38e2c, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_1", 0x38e30, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_1", 0x38e34, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_1", 0x38e38, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_1", 0x38e3c, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_2", 0x38e40, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_2", 0x38e44, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_2", 0x38e48, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_2", 0x38e4c, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_2", 0x38e50, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_2", 0x38e54, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_2", 0x38e58, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_2", 0x38e5c, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_3", 0x38e60, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_3", 0x38e64, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_3", 0x38e68, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_3", 0x38e6c, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_3", 0x38e70, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_3", 0x38e74, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_3", 0x38e78, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_3", 0x38e7c, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_4", 0x38e80, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_4", 0x38e84, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_4", 0x38e88, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_4", 0x38e8c, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_4", 0x38e90, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_4", 0x38e94, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_4", 0x38e98, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_4", 0x38e9c, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_5", 0x38ea0, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_5", 0x38ea4, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_5", 0x38ea8, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_5", 0x38eac, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_5", 0x38eb0, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_5", 0x38eb4, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_5", 0x38eb8, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_5", 0x38ebc, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_6", 0x38ec0, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_6", 0x38ec4, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_6", 0x38ec8, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_6", 0x38ecc, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_6", 0x38ed0, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_6", 0x38ed4, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_6", 0x38ed8, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_6", 0x38edc, 0 },
	{ "MAC_MTIP_RS_FEC_CONTROL_0_7", 0x38ee0, 0 },
		{ "TC_PAD_ALTER", 10, 1 },
		{ "TC_PAD_VALUE", 9, 1 },
		{ "KP_ENABLE", 8, 1 },
		{ "am16_copy_dis", 3, 1 },
		{ "RS_FEC_Degrade_option_ena", 2, 1 },
		{ "RS_FEC_Bypass_Error_Indication", 1, 1 },
		{ "RS_FEC_Bypass_Correction", 0, 1 },
	{ "MAC_MTIP_RS_FEC_STATUS_0_7", 0x38ee4, 0 },
		{ "fec_aligned_status", 14, 1 },
		{ "amp_lock", 8, 4 },
		{ "rx_am_sf_0", 7, 1 },
		{ "rx_am_sf_1", 6, 1 },
		{ "rx_am_sf_2", 5, 1 },
		{ "RS_FEC_degrade_SER", 4, 1 },
		{ "RS_FEC_degrade_SER_ability", 3, 1 },
		{ "RS_FEC_high_SER", 2, 1 },
		{ "RS_FEC_bypass_error_indication_ability", 1, 1 },
		{ "RS_FEC_bypass_correction_ability", 0, 1 },
	{ "MAC_MTIP_RS_FEC_CCW_LO_0_7", 0x38ee8, 0 },
	{ "MAC_MTIP_RS_FEC_CCW_HI_0_7", 0x38eec, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_LO_0_7", 0x38ef0, 0 },
	{ "MAC_MTIP_RS_FEC_NCCW_HI_0_7", 0x38ef4, 0 },
	{ "MAC_MTIP_RS_FEC_LANEMAPRS_FEC_0_7", 0x38ef8, 0 },
	{ "MAC_MTIP_RS_FEC_DEC_THRESH_0_7", 0x38efc, 0 },
	{ "MAC_MTIP_RS_FEC_HISER_CW", 0x38f00, 0 },
	{ "MAC_MTIP_RS_FEC_HISER_THRESH", 0x38f04, 0 },
	{ "MAC_MTIP_RS_FEC_HISER_TIME", 0x38f08, 0 },
	{ "MAC_MTIP_RS_DEGRADE_SET_CW", 0x38f10, 0 },
	{ "MAC_MTIP_RS_DEGRADE_SET_CW_HI", 0x38f14, 0 },
	{ "MAC_MTIP_RS_DEGRADE_SET_THRESH", 0x38f18, 0 },
	{ "MAC_MTIP_RS_DEGRADE_SET_THRESH_HI", 0x38f1c, 0 },
	{ "MAC_MTIP_RS_DEGRADE_CLEAR", 0x38f20, 0 },
	{ "MAC_MTIP_RS_DEGRADE_SET_CLEAR_HI", 0x38f24, 0 },
	{ "MAC_MTIP_RS_DEGRADE_CLEAR_THRESH", 0x38f28, 0 },
	{ "MAC_MTIP_RS_DEGRADE_SET_CLEAR_THRESH_HI", 0x38f2c, 0 },
	{ "MAC_MTIP_RS_VL0_0", 0x38f80, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL0_1", 0x38f84, 0 },
	{ "MAC_MTIP_RS_VL1_0", 0x38f88, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL1_1", 0x38f8c, 0 },
	{ "MAC_MTIP_RS_VL2_0", 0x38f90, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL2_1", 0x38f94, 0 },
	{ "MAC_MTIP_RS_VL3_0", 0x38f98, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL3_1", 0x38f9c, 0 },
	{ "MAC_MTIP_RS_VL4_0", 0x38fa0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL4_1", 0x38fa4, 0 },
	{ "MAC_MTIP_RS_VL5_0", 0x38fa8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL5_1", 0x38fac, 0 },
	{ "MAC_MTIP_RS_VL6_0", 0x38fb0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL6_1", 0x38fb4, 0 },
	{ "MAC_MTIP_RS_VL7_0", 0x38fb8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL7_1", 0x38fbc, 0 },
	{ "MAC_MTIP_RS_VL8_0", 0x38fc0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL8_1", 0x38fc4, 0 },
	{ "MAC_MTIP_RS_VL9_0", 0x38fc8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL9_1", 0x38fcc, 0 },
	{ "MAC_MTIP_RS_VL10_0", 0x38fd0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL10_1", 0x38fd4, 0 },
	{ "MAC_MTIP_RS_VL11_0", 0x38fd8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL11_1", 0x38fdc, 0 },
	{ "MAC_MTIP_RS_VL12_0", 0x38fe0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL12_1", 0x38fe4, 0 },
	{ "MAC_MTIP_RS_VL13_0", 0x38fe8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL13_1", 0x38fec, 0 },
	{ "MAC_MTIP_RS_VL14_0", 0x38ff0, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL14_1", 0x38ff4, 0 },
	{ "MAC_MTIP_RS_VL15_0", 0x38ff8, 0 },
		{ "M1", 8, 8 },
		{ "M0", 0, 8 },
	{ "MAC_MTIP_RS_VL15_1", 0x38ffc, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR0_LO", 0x39000, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR0_HI", 0x39004, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR1_LO", 0x39008, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR1_HI", 0x3900c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR2_LO", 0x39010, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR2_HI", 0x39014, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR3_LO", 0x39018, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR3_HI", 0x3901c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR4_LO", 0x39020, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR4_HI", 0x39024, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR5_LO", 0x39028, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR5_HI", 0x3902c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR6_LO", 0x39030, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR6_HI", 0x39034, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR7_LO", 0x39038, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR7_HI", 0x3903c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR8_LO", 0x39040, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR8_HI", 0x39044, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR9_LO", 0x39048, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR9_HI", 0x3904c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR10_LO", 0x39050, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR10_HI", 0x39054, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR11_LO", 0x39058, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR11_HI", 0x3905c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR12_LO", 0x39060, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR12_HI", 0x39064, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR13_LO", 0x39068, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR13_HI", 0x3906c, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR14_LO", 0x39070, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR14_HI", 0x39074, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR15_LO", 0x39078, 0 },
	{ "MAC_MTIP_RS_FEC_SYMBLERR15_HI", 0x3907c, 0 },
	{ "MAC_MTIP_RS_FEC_VENDOR_CONTROL", 0x39080, 0 },
	{ "MAC_MTIP_RS_FEC_VENDOR_INFO_1", 0x39084, 0 },
		{ "fec_align_status_lh", 10, 1 },
		{ "tx_dp_overflow", 9, 1 },
		{ "rx_dp_overflow", 8, 1 },
		{ "tx_datapath_restart", 7, 1 },
		{ "rx_datapath_restart", 6, 1 },
		{ "marker_check_restart", 5, 1 },
		{ "fec_align_status_ll", 4, 1 },
		{ "amps_lock", 0, 1 },
	{ "MAC_MTIP_RS_FEC_VENDOR_INFO_2", 0x39088, 0 },
	{ "MAC_MTIP_RS_FEC_VENDOR_REVISION", 0x3908c, 0 },
	{ "MAC_MTIP_RS_FEC_VENDOR_ALIGN_STATUS", 0x39090, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_0", 0x39100, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_0", 0x39104, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_0", 0x39108, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_0", 0x3910c, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_0", 0x39110, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_0", 0x39114, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_0", 0x39118, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_0", 0x3911c, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_1", 0x39120, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_1", 0x39124, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_1", 0x39128, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_1", 0x3912c, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_1", 0x39130, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_1", 0x39134, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_1", 0x39138, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_1", 0x3913c, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_2", 0x39140, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_2", 0x39144, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_2", 0x39148, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_2", 0x3914c, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_2", 0x39150, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_2", 0x39154, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_2", 0x39158, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_2", 0x3915c, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_3", 0x39160, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_3", 0x39164, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_3", 0x39168, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_3", 0x3916c, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_3", 0x39170, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_3", 0x39174, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_3", 0x39178, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_3", 0x3917c, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_4", 0x39180, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_4", 0x39184, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_4", 0x39188, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_4", 0x3918c, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_4", 0x39190, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_4", 0x39194, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_4", 0x39198, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_4", 0x3919c, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_5", 0x391a0, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_5", 0x391a4, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_5", 0x391a8, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_5", 0x391ac, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_5", 0x391b0, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_5", 0x391b4, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_5", 0x391b8, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_5", 0x391bc, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_6", 0x391c0, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_6", 0x391c4, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_6", 0x391c8, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_6", 0x391cc, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_6", 0x391d0, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_6", 0x391d4, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_6", 0x391d8, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_6", 0x391dc, 0 },
	{ "MAC_MTIP_FEC74_FEC_ABILITY_7", 0x391e0, 0 },
		{ "FEC_Error_Indication_Ability", 1, 1 },
		{ "FEC_Ability", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_CONTROL_7", 0x391e4, 0 },
		{ "FEC_Enable_Error_Indication", 1, 1 },
		{ "FEC_Enable", 0, 1 },
	{ "MAC_MTIP_FEC74_FEC_STATUS_7", 0x391e8, 0 },
		{ "FEC_Locked_1", 1, 1 },
		{ "FEC_Locked", 0, 1 },
	{ "MAC_MTIP_FEC74_VL0_CCW_LO_7", 0x391ec, 0 },
	{ "MAC_MTIP_FEC74_VL0_NCCW_LO_7", 0x391f0, 0 },
	{ "MAC_MTIP_FEC74_VL1_CCW_LO_7", 0x391f4, 0 },
	{ "MAC_MTIP_FEC74_VL1_NCCW_LO_7", 0x391f8, 0 },
	{ "MAC_MTIP_FEC74_COUNTER_HI_7", 0x391fc, 0 },
	{ "MAC_BEAN0_CTL", 0x39200, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN0_STATUS", 0x39204, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN0_ABILITY_0", 0x39208, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN0_ABILITY_1", 0x3920c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN0_ABILITY_2", 0x39210, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN0_REM_ABILITY_0", 0x39214, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN0_REM_ABILITY_1", 0x39218, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN0_REM_ABILITY_2", 0x3921c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN0_MS_COUNT", 0x39220, 0 },
	{ "MAC_BEAN0_XNP_0", 0x39224, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN0_XNP_1", 0x39228, 0 },
	{ "MAC_BEAN0_XNP_2", 0x3922c, 0 },
	{ "MAC_LP_BEAN0_XNP_0", 0x39230, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN0_XNP_1", 0x39234, 0 },
	{ "MAC_LP_BEAN0_XNP_2", 0x39238, 0 },
	{ "MAC_BEAN0_ETH_STATUS", 0x3923c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN0_ETH_STATUS_2", 0x39240, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN1_CTL", 0x39300, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN1_STATUS", 0x39304, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN1_ABILITY_0", 0x39308, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN1_ABILITY_1", 0x3930c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN1_ABILITY_2", 0x39310, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN1_REM_ABILITY_0", 0x39314, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN1_REM_ABILITY_1", 0x39318, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN1_REM_ABILITY_2", 0x3931c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN1_MS_COUNT", 0x39320, 0 },
	{ "MAC_BEAN1_XNP_0", 0x39324, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN1_XNP_1", 0x39328, 0 },
	{ "MAC_BEAN1_XNP_2", 0x3932c, 0 },
	{ "MAC_LP_BEAN1_XNP_0", 0x39330, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN1_XNP_1", 0x39334, 0 },
	{ "MAC_LP_BEAN1_XNP_2", 0x39338, 0 },
	{ "MAC_BEAN1_ETH_STATUS", 0x3933c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN1_ETH_STATUS_2", 0x39340, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN2_CTL", 0x39400, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN2_STATUS", 0x39404, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN2_ABILITY_0", 0x39408, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN2_ABILITY_1", 0x3940c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN2_ABILITY_2", 0x39410, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN2_REM_ABILITY_0", 0x39414, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN2_REM_ABILITY_1", 0x39418, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN2_REM_ABILITY_2", 0x3941c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN2_MS_COUNT", 0x39420, 0 },
	{ "MAC_BEAN2_XNP_0", 0x39424, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN2_XNP_1", 0x39428, 0 },
	{ "MAC_BEAN2_XNP_2", 0x3942c, 0 },
	{ "MAC_LP_BEAN2_XNP_0", 0x39430, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN2_XNP_1", 0x39434, 0 },
	{ "MAC_LP_BEAN2_XNP_2", 0x39438, 0 },
	{ "MAC_BEAN2_ETH_STATUS", 0x3943c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN2_ETH_STATUS_2", 0x39440, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN3_CTL", 0x39500, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN3_STATUS", 0x39504, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN3_ABILITY_0", 0x39508, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN3_ABILITY_1", 0x3950c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN3_ABILITY_2", 0x39510, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN3_REM_ABILITY_0", 0x39514, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN3_REM_ABILITY_1", 0x39518, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN3_REM_ABILITY_2", 0x3951c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN3_MS_COUNT", 0x39520, 0 },
	{ "MAC_BEAN3_XNP_0", 0x39524, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN3_XNP_1", 0x39528, 0 },
	{ "MAC_BEAN3_XNP_2", 0x3952c, 0 },
	{ "MAC_LP_BEAN3_XNP_0", 0x39530, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN3_XNP_1", 0x39534, 0 },
	{ "MAC_LP_BEAN3_XNP_2", 0x39538, 0 },
	{ "MAC_BEAN3_ETH_STATUS", 0x3953c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN3_ETH_STATUS_2", 0x39540, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN4_CTL", 0x39600, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN4_STATUS", 0x39604, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN4_ABILITY_0", 0x39608, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN4_ABILITY_1", 0x3960c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN4_ABILITY_2", 0x39610, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN4_REM_ABILITY_0", 0x39614, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN4_REM_ABILITY_1", 0x39618, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN4_REM_ABILITY_2", 0x3961c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN4_MS_COUNT", 0x39620, 0 },
	{ "MAC_BEAN4_XNP_0", 0x39624, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN4_XNP_1", 0x39628, 0 },
	{ "MAC_BEAN4_XNP_2", 0x3962c, 0 },
	{ "MAC_LP_BEAN4_XNP_0", 0x39630, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN4_XNP_1", 0x39634, 0 },
	{ "MAC_LP_BEAN4_XNP_2", 0x39638, 0 },
	{ "MAC_BEAN4_ETH_STATUS", 0x3963c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN4_ETH_STATUS_2", 0x39640, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN5_CTL", 0x39700, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN5_STATUS", 0x39704, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN5_ABILITY_0", 0x39708, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN5_ABILITY_1", 0x3970c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN5_ABILITY_2", 0x39710, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN5_REM_ABILITY_0", 0x39714, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN5_REM_ABILITY_1", 0x39718, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN5_REM_ABILITY_2", 0x3971c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN5_MS_COUNT", 0x39720, 0 },
	{ "MAC_BEAN5_XNP_0", 0x39724, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN5_XNP_1", 0x39728, 0 },
	{ "MAC_BEAN5_XNP_2", 0x3972c, 0 },
	{ "MAC_LP_BEAN5_XNP_0", 0x39730, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN5_XNP_1", 0x39734, 0 },
	{ "MAC_LP_BEAN5_XNP_2", 0x39738, 0 },
	{ "MAC_BEAN5_ETH_STATUS", 0x3973c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN5_ETH_STATUS_2", 0x39740, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN6_CTL", 0x39800, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN6_STATUS", 0x39804, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN6_ABILITY_0", 0x39808, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN6_ABILITY_1", 0x3980c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN6_ABILITY_2", 0x39810, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN6_REM_ABILITY_0", 0x39814, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN6_REM_ABILITY_1", 0x39818, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN6_REM_ABILITY_2", 0x3981c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN6_MS_COUNT", 0x39820, 0 },
	{ "MAC_BEAN6_XNP_0", 0x39824, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN6_XNP_1", 0x39828, 0 },
	{ "MAC_BEAN6_XNP_2", 0x3982c, 0 },
	{ "MAC_LP_BEAN6_XNP_0", 0x39830, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN6_XNP_1", 0x39834, 0 },
	{ "MAC_LP_BEAN6_XNP_2", 0x39838, 0 },
	{ "MAC_BEAN6_ETH_STATUS", 0x3983c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN6_ETH_STATUS_2", 0x39840, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_BEAN7_CTL", 0x39900, 0 },
		{ "AN_RESET", 15, 1 },
		{ "EXT_NXP_CTRL", 13, 1 },
		{ "BEAN_EN", 12, 1 },
		{ "RESTART_BEAN", 9, 1 },
	{ "MAC_BEAN7_STATUS", 0x39904, 0 },
		{ "PDF", 9, 1 },
		{ "EXT_NXP_STATUS", 7, 1 },
		{ "PAGE_RCVD", 6, 1 },
		{ "BEAN_COMPLETE", 5, 1 },
		{ "REM_FAULT_STATUS", 4, 1 },
		{ "BEAN_ABILITY", 3, 1 },
		{ "LINK_STATUS", 2, 1 },
		{ "LP_BEAN_ABILITY", 0, 1 },
	{ "MAC_BEAN7_ABILITY_0", 0x39908, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN7_ABILITY_1", 0x3990c, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN7_ABILITY_2", 0x39910, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN7_REM_ABILITY_0", 0x39914, 0 },
		{ "NXP", 15, 1 },
		{ "ACK", 14, 1 },
		{ "REM_FAULT", 13, 1 },
		{ "PAUSE_ABILITY", 10, 3 },
		{ "ECHO_NONCE", 5, 5 },
		{ "SELECTOR", 0, 5 },
	{ "MAC_BEAN7_REM_ABILITY_1", 0x39918, 0 },
		{ "TECH_ABILITY_1", 5, 11 },
		{ "TX_NONCE", 0, 5 },
	{ "MAC_BEAN7_REM_ABILITY_2", 0x3991c, 0 },
		{ "FEC_ABILITY", 12, 4 },
		{ "TECH_ABILITY_2", 0, 12 },
	{ "MAC_BEAN7_MS_COUNT", 0x39920, 0 },
	{ "MAC_BEAN7_XNP_0", 0x39924, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_BEAN7_XNP_1", 0x39928, 0 },
	{ "MAC_BEAN7_XNP_2", 0x3992c, 0 },
	{ "MAC_LP_BEAN7_XNP_0", 0x39930, 0 },
		{ "XNP", 15, 1 },
		{ "ACKNOWLEDGE", 14, 1 },
		{ "MP", 13, 1 },
		{ "ACK2", 12, 1 },
		{ "TOGGLE", 11, 1 },
		{ "MU", 0, 11 },
	{ "MAC_LP_BEAN7_XNP_1", 0x39934, 0 },
	{ "MAC_LP_BEAN7_XNP_2", 0x39938, 0 },
	{ "MAC_BEAN7_ETH_STATUS", 0x3993c, 0 },
		{ "5GKR", 15, 1 },
		{ "2p5GKX", 14, 1 },
		{ "25G_KR", 13, 1 },
		{ "25G_KR_S", 12, 1 },
		{ "100GCR4", 11, 1 },
		{ "100GKR4", 10, 1 },
		{ "100GKP4", 9, 1 },
		{ "100GCR10", 8, 1 },
		{ "RS_FEC", 7, 1 },
		{ "40GCR4", 6, 1 },
		{ "40GKR4", 5, 1 },
		{ "FC_FEC", 4, 1 },
		{ "10GKR", 3, 1 },
		{ "10GKX4", 2, 1 },
		{ "1GKX", 1, 1 },
	{ "MAC_BEAN7_ETH_STATUS_2", 0x39940, 0 },
		{ "RS_FEC_negotiated", 6, 1 },
		{ "400GKR4CR4", 5, 1 },
		{ "200GKR2CR2", 4, 1 },
		{ "100GKR1CR1", 3, 1 },
		{ "200GKR4CR4", 2, 1 },
		{ "100GKR2CR2", 1, 1 },
		{ "50GKRCR", 0, 1 },
	{ "MAC_MTIP_ETHERSTATS_DATA_HI", 0x39a00, 0 },
	{ "MAC_MTIP_ETHERSTATS_STATN_STATUS", 0x39a04, 0 },
	{ "MAC_MTIP_ETHERSTATS_STATN_CONFIG", 0x39a08, 0 },
		{ "RESET", 31, 1 },
		{ "CLEAR_ON_READ", 1, 1 },
		{ "SATURATE", 0, 1 },
	{ "MAC_MTIP_ETHERSTATS_STATN_CONTROL", 0x39a0c, 0 },
		{ "CMD_CLEAR_TX", 31, 1 },
		{ "CMD_CLEAR_RX", 30, 1 },
		{ "CLEAR_PRE", 29, 1 },
		{ "CMD_CAPTURE_TX", 28, 1 },
		{ "CMD_CAPTURE_RX", 27, 1 },
		{ "PORTMASK", 0, 8 },
	{ "MAC_MTIP_ETHERSTATS_STATN_CLEARVALUE_LO", 0x39a10, 0 },
	{ "MAC_MTIP_ETHERSTATS_STATN_CLEARVALUE_HI", 0x39a14, 0 },
	{ "MAC_MTIP_ETHERSTATS_DATA_HI_1", 0x39a1c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_0", 0x39a20, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_1", 0x39a24, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_2", 0x39a28, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_3", 0x39a2c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_4", 0x39a30, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_5", 0x39a34, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_6", 0x39a38, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_7", 0x39a3c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_8", 0x39a40, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_9", 0x39a44, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_10", 0x39a48, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_11", 0x39a4c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_12", 0x39a50, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_13", 0x39a54, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_14", 0x39a58, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_15", 0x39a5c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_16", 0x39a60, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_17", 0x39a64, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_18", 0x39a68, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_19", 0x39a6c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_20", 0x39a70, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_21", 0x39a74, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_22", 0x39a78, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_23", 0x39a7c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_24", 0x39a80, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_25", 0x39a84, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_26", 0x39a88, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_27", 0x39a8c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_28", 0x39a90, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_29", 0x39a94, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_30", 0x39a98, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_31", 0x39a9c, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_32", 0x39aa0, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_33", 0x39aa4, 0 },
	{ "MAC_MTIP_ETHERSTATS_CAPTURED_PAGE_34", 0x39aa8, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSOCTETS", 0x39b00, 0 },
	{ "MAC_MTIP_ETHERSTATS0_OCTETSRECEIVEDOK", 0x39b04, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AALIGNMENTERRORS", 0x39b08, 0 },
	{ "MAC_MTIP_ETHERSTATS0_APAUSEMACCTRLFRAMESRECEIVED", 0x39b0c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AFRAMETOOLONGERRORS", 0x39b10, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AINRANGELENGTHERRORS", 0x39b14, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AFRAMESRECEIVEDOK", 0x39b18, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AFRAMECHECKSEQUENCEERRORS", 0x39b1c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_VLANRECEIVEDOK", 0x39b20, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFINERRORS_RX", 0x39b24, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFINUCASTPKTS_RX", 0x39b28, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFINMULTICASTPKTS_RX", 0x39b2c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFINBROADCASTPKTS_RX", 0x39b30, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSDROPEVENTS_RX", 0x39b34, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS_RX", 0x39b38, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSUNDERSIZEPKTS_RX", 0x39b3c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS64OCTETS_RX", 0x39b40, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39b44, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39b48, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39b4c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39b50, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39b54, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39b58, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSOVERSIZEPKTS_RX", 0x39b5c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSJABBERS_RX", 0x39b60, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSFRAGMENTS_RX", 0x39b64, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39b68, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39b6c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39b70, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39b74, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39b78, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39b7c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39b80, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39b84, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AMACCONTROLFRAMESRECEIVED_RX", 0x39b88, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSOCTETS", 0x39b8c, 0 },
	{ "MAC_MTIP_ETHERSTATS1_OCTETSRECEIVEDOK", 0x39b90, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AALIGNMENTERRORS", 0x39b94, 0 },
	{ "MAC_MTIP_ETHERSTATS1_APAUSEMACCTRLFRAMESRECEIVED", 0x39b98, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AFRAMETOOLONGERRORS", 0x39b9c, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AINRANGELENGTHERRORS", 0x39ba0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AFRAMESRECEIVEDOK", 0x39ba4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AFRAMECHECKSEQUENCEERRORS", 0x39ba8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_VLANRECEIVEDOK", 0x39bac, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFINERRORS_RX", 0x39bb0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFINUCASTPKTS_RX", 0x39bb4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFINMULTICASTPKTS_RX", 0x39bb8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFINBROADCASTPKTS_RX", 0x39bbc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSDROPEVENTS_RX", 0x39bc0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS_RX", 0x39bc4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSUNDERSIZEPKTS_RX", 0x39bc8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS64OCTETS_RX", 0x39bcc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39bd0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39bd4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39bd8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39bdc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39be0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39be4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSOVERSIZEPKTS_RX", 0x39be8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSJABBERS_RX", 0x39bec, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSFRAGMENTS_RX", 0x39bf0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39bf4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39bf8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39bfc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39c00, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39c04, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39c08, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39c0c, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39c10, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AMACCONTROLFRAMESRECEIVED_RX", 0x39c14, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSOCTETS", 0x39c18, 0 },
	{ "MAC_MTIP_ETHERSTATS2_OCTETSRECEIVEDOK", 0x39c1c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AALIGNMENTERRORS", 0x39c20, 0 },
	{ "MAC_MTIP_ETHERSTATS2_APAUSEMACCTRLFRAMESRECEIVED", 0x39c24, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AFRAMETOOLONGERRORS", 0x39c28, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AINRANGELENGTHERRORS", 0x39c2c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AFRAMESRECEIVEDOK", 0x39c30, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AFRAMECHECKSEQUENCEERRORS", 0x39c34, 0 },
	{ "MAC_MTIP_ETHERSTATS2_VLANRECEIVEDOK", 0x39c38, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFINERRORS_RX", 0x39c3c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFINUCASTPKTS_RX", 0x39c40, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFINMULTICASTPKTS_RX", 0x39c44, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFINBROADCASTPKTS_RX", 0x39c48, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSDROPEVENTS_RX", 0x39c4c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS_RX", 0x39c50, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSUNDERSIZEPKTS_RX", 0x39c54, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS64OCTETS_RX", 0x39c58, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39c5c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39c60, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39c64, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39c68, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39c6c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39c70, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSOVERSIZEPKTS_RX", 0x39c74, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSJABBERS_RX", 0x39c78, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSFRAGMENTS_RX", 0x39c7c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39c80, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39c84, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39c88, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39c8c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39c90, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39c94, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39c98, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39c9c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AMACCONTROLFRAMESRECEIVED_RX", 0x39ca0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSOCTETS", 0x39ca4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_OCTETSRECEIVEDOK", 0x39ca8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AALIGNMENTERRORS", 0x39cac, 0 },
	{ "MAC_MTIP_ETHERSTATS3_APAUSEMACCTRLFRAMESRECEIVED", 0x39cb0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AFRAMETOOLONGERRORS", 0x39cb4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AINRANGELENGTHERRORS", 0x39cb8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AFRAMESRECEIVEDOK", 0x39cbc, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AFRAMECHECKSEQUENCEERRORS", 0x39cc0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_VLANRECEIVEDOK", 0x39cc4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFINERRORS_RX", 0x39cc8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFINUCASTPKTS_RX", 0x39ccc, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFINMULTICASTPKTS_RX", 0x39cd0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFINBROADCASTPKTS_RX", 0x39cd4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSDROPEVENTS_RX", 0x39cd8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS_RX", 0x39cdc, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSUNDERSIZEPKTS_RX", 0x39ce0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS64OCTETS_RX", 0x39ce4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS65TO127OCTETS_RX", 0x39ce8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS128TO255OCTETS_RX", 0x39cec, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS256TO511OCTETS_RX", 0x39cf0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS512TO1023OCTETS_RX", 0x39cf4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1024TO1518OCTETS_RX", 0x39cf8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1519TOMAXOCTETS_RX", 0x39cfc, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSOVERSIZEPKTS_RX", 0x39d00, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSJABBERS_RX", 0x39d04, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSFRAGMENTS_RX", 0x39d08, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_0_RX", 0x39d0c, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_1_RX", 0x39d10, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_2_RX", 0x39d14, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_3_RX", 0x39d18, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_4_RX", 0x39d1c, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_5_RX", 0x39d20, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_6_RX", 0x39d24, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESRECEIVED_7_RX", 0x39d28, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AMACCONTROLFRAMESRECEIVED_RX", 0x39d2c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSOCTETS_TX", 0x39d30, 0 },
	{ "MAC_MTIP_ETHERSTATS0_OCTETSTRANSMITTEDOK_TX", 0x39d34, 0 },
	{ "MAC_MTIP_ETHERSTATS0_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39d38, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AFRAMESTRANSMITTEDOK_TX", 0x39d3c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_VLANTRANSMITTEDOK_TX", 0x39d40, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFOUTERRORS_TX", 0x39d44, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFOUTUCASTPKTS_TX", 0x39d48, 0 },
	{ "MAC_MTIP_ETHERSTATS0IFOUTMULTICASTPKTS_TX", 0x39d4c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_IFOUTBROADCASTPKTS_TX", 0x39d50, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS64OCTETS_TX", 0x39d54, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39d58, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39d5c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39d60, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39d64, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39d68, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39d6c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39d70, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39d74, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39d78, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39d7c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39d80, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39d84, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39d88, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39d8c, 0 },
	{ "MAC_MTIP_ETHERSTATS0_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39d90, 0 },
	{ "MAC_MTIP_ETHERSTATS0_ETHERSTATSPKTS_TX", 0x39d94, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSOCTETS_TX", 0x39d98, 0 },
	{ "MAC_MTIP_ETHERSTATS1_OCTETSTRANSMITTEDOK_TX", 0x39d9c, 0 },
	{ "MAC_MTIP_ETHERSTATS1_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39da0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AFRAMESTRANSMITTEDOK_TX", 0x39da4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_VLANTRANSMITTEDOK_TX", 0x39da8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFOUTERRORS_TX", 0x39dac, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFOUTUCASTPKTS_TX", 0x39db0, 0 },
	{ "MAC_MTIP_ETHERSTATS1IFOUTMULTICASTPKTS_TX", 0x39db4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_IFOUTBROADCASTPKTS_TX", 0x39db8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS64OCTETS_TX", 0x39dbc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39dc0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39dc4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39dc8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39dcc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39dd0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39dd4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39dd8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39ddc, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39de0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39de4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39de8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39dec, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39df0, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39df4, 0 },
	{ "MAC_MTIP_ETHERSTATS1_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39df8, 0 },
	{ "MAC_MTIP_ETHERSTATS1_ETHERSTATSPKTS_TX", 0x39dfc, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSOCTETS_TX", 0x39e00, 0 },
	{ "MAC_MTIP_ETHERSTATS2_OCTETSTRANSMITTEDOK_TX", 0x39e04, 0 },
	{ "MAC_MTIP_ETHERSTATS2_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39e08, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AFRAMESTRANSMITTEDOK_TX", 0x39e0c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_VLANTRANSMITTEDOK_TX", 0x39e10, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFOUTERRORS_TX", 0x39e14, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFOUTUCASTPKTS_TX", 0x39e18, 0 },
	{ "MAC_MTIP_ETHERSTATS2IFOUTMULTICASTPKTS_TX", 0x39e1c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_IFOUTBROADCASTPKTS_TX", 0x39e20, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS64OCTETS_TX", 0x39e24, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39e28, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39e2c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39e30, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39e34, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39e38, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39e3c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39e40, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39e44, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39e48, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39e4c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39e50, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39e54, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39e58, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39e5c, 0 },
	{ "MAC_MTIP_ETHERSTATS2_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39e60, 0 },
	{ "MAC_MTIP_ETHERSTATS2_ETHERSTATSPKTS_TX", 0x39e64, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSOCTETS_TX", 0x39e68, 0 },
	{ "MAC_MTIP_ETHERSTATS3_OCTETSTRANSMITTEDOK_TX", 0x39e6c, 0 },
	{ "MAC_MTIP_ETHERSTATS3_APAUSEMACCTRLFRAMESTRANSMITTED_TX", 0x39e70, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AFRAMESTRANSMITTEDOK_TX", 0x39e74, 0 },
	{ "MAC_MTIP_ETHERSTATS3_VLANTRANSMITTEDOK_TX", 0x39e78, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFOUTERRORS_TX", 0x39e7c, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFOUTUCASTPKTS_TX", 0x39e80, 0 },
	{ "MAC_MTIP_ETHERSTATS3IFOUTMULTICASTPKTS_TX", 0x39e84, 0 },
	{ "MAC_MTIP_ETHERSTATS3_IFOUTBROADCASTPKTS_TX", 0x39e88, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS64OCTETS_TX", 0x39e8c, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS65TO127OCTETS_TX", 0x39e90, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS128TO255OCTETS_TX", 0x39e94, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS256TO511OCTETS_TX", 0x39e98, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS512TO1023OCTETS_TX", 0x39e9c, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1024TO1518OCTETS_TX", 0x39ea0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS1519TOMAXOCTETS_TX", 0x39ea4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_0_TX", 0x39ea8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_1_TX", 0x39eac, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_2_TX", 0x39eb0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_3_TX", 0x39eb4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_4_TX", 0x39eb8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_5_TX", 0x39ebc, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_6_TX", 0x39ec0, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ACBFCPAUSEFRAMESTRANSMITTED_7_TX", 0x39ec4, 0 },
	{ "MAC_MTIP_ETHERSTATS3_AMACCONTROLFRAMESTRANSMITTED_TX", 0x39ec8, 0 },
	{ "MAC_MTIP_ETHERSTATS3_ETHERSTATSPKTS_TX", 0x39ecc, 0 },
	{ "MAC_IOS_CTRL", 0x3a000, 0 },
		{ "sub_block_sel", 28, 3 },
		{ "quad_broadcast_en", 24, 1 },
		{ "auto_incr", 20, 1 },
		{ "addr", 0, 19 },
	{ "MAC_IOS_DATA", 0x3a004, 0 },
	{ "MAC_IOS_BGR_RST", 0x3a050, 0 },
	{ "MAC_IOS_BGR_CFG", 0x3a054, 0 },
	{ "MAC_IOS_QUAD0_CFG", 0x3a058, 0 },
		{ "quad0_ch3_rstn", 5, 1 },
		{ "quad0_ch2_rstn", 4, 1 },
		{ "quad0_ch1_rstn", 3, 1 },
		{ "quad0_ch0_rstn", 2, 1 },
		{ "quad0_rstn", 1, 1 },
		{ "pll0_rstn", 0, 1 },
	{ "MAC_IOS_QUAD1_CFG", 0x3a05c, 0 },
		{ "quad1_ch3_rstn", 5, 1 },
		{ "quad1_ch2_rstn", 4, 1 },
		{ "quad1_ch1_rstn", 3, 1 },
		{ "quad1_ch0_rstn", 2, 1 },
		{ "quad1_rstn", 1, 1 },
		{ "pll1_rstn", 0, 1 },
	{ "MAC_IOS_SCRATCHPAD0", 0x3a060, 0 },
	{ "MAC_IOS_SCRATCHPAD1", 0x3a064, 0 },
	{ "MAC_IOS_SCRATCHPAD2", 0x3a068, 0 },
	{ "MAC_IOS_SCRATCHPAD3", 0x3a06c, 0 },
		{ "data0", 1, 31 },
		{ "i2c_mode", 0, 1 },
	{ "MAC_IOS_BGR_DBG_COUNTER", 0x3a070, 0 },
	{ "MAC_IOS_QUAD0_DBG_COUNTER", 0x3a074, 0 },
	{ "MAC_IOS_PLL0_DBG_COUNTER", 0x3a078, 0 },
	{ "MAC_IOS_QUAD1_DBG_COUNTER", 0x3a07c, 0 },
	{ "MAC_IOS_PLL1_DBG_COUNTER", 0x3a080, 0 },
	{ "MAC_IOS_DBG_CLK_CFG", 0x3a084, 0 },
		{ "dbg_clk_mux_gpio", 3, 1 },
		{ "dbg_clk_mux_sel", 0, 3 },
	{ "MAC_IOS_INTR_EN_QUAD0", 0x3a090, 0 },
		{ "Q0_MAILBOX_INT_assert", 24, 1 },
		{ "Q0_TRAINING_FAILURE_3_assert", 23, 1 },
		{ "Q0_TRAINING_FAILURE_2_assert", 22, 1 },
		{ "Q0_TRAINING_FAILURE_1_assert", 21, 1 },
		{ "Q0_TRAINING_FAILURE_0_assert", 20, 1 },
		{ "Q0_TRAINING_COMPLETE_3_assert", 19, 1 },
		{ "Q0_TRAINING_COMPLETE_2_assert", 18, 1 },
		{ "Q0_TRAINING_COMPLETE_1_assert", 17, 1 },
		{ "Q0_TRAINING_COMPLETE_0_assert", 16, 1 },
		{ "Q0_AN_TX_INT_3_assert", 15, 1 },
		{ "Q0_AN_TX_INT_2_assert", 14, 1 },
		{ "Q0_AN_TX_INT_1_assert", 13, 1 },
		{ "Q0_AN_TX_INT_0_assert", 12, 1 },
		{ "Q0_SIGNAL_DETECT_3_assert", 11, 1 },
		{ "Q0_SIGNAL_DETECT_2_assert", 10, 1 },
		{ "Q0_SIGNAL_DETECT_1_assert", 9, 1 },
		{ "Q0_SIGNAL_DETECT_0_assert", 8, 1 },
		{ "Q0_CDR_LOL_3_assert", 7, 1 },
		{ "Q0_CDR_LOL_2_assert", 6, 1 },
		{ "Q0_CDR_LOL_1_assert", 5, 1 },
		{ "Q0_CDR_LOL_0_assert", 4, 1 },
		{ "Q0_LOS_3_assert", 3, 1 },
		{ "Q0_LOS_2_assert", 2, 1 },
		{ "Q0_LOS_1_assert", 1, 1 },
		{ "Q0_LOS_0_assert", 0, 1 },
	{ "MAC_IOS_INTR_CAUSE_QUAD0", 0x3a094, 0 },
		{ "Q0_MAILBOX_INT_assert", 24, 1 },
		{ "Q0_TRAINING_FAILURE_3_assert", 23, 1 },
		{ "Q0_TRAINING_FAILURE_2_assert", 22, 1 },
		{ "Q0_TRAINING_FAILURE_1_assert", 21, 1 },
		{ "Q0_TRAINING_FAILURE_0_assert", 20, 1 },
		{ "Q0_TRAINING_COMPLETE_3_assert", 19, 1 },
		{ "Q0_TRAINING_COMPLETE_2_assert", 18, 1 },
		{ "Q0_TRAINING_COMPLETE_1_assert", 17, 1 },
		{ "Q0_TRAINING_COMPLETE_0_assert", 16, 1 },
		{ "Q0_AN_TX_INT_3_assert", 15, 1 },
		{ "Q0_AN_TX_INT_2_assert", 14, 1 },
		{ "Q0_AN_TX_INT_1_assert", 13, 1 },
		{ "Q0_AN_TX_INT_0_assert", 12, 1 },
		{ "Q0_SIGNAL_DETECT_3_assert", 11, 1 },
		{ "Q0_SIGNAL_DETECT_2_assert", 10, 1 },
		{ "Q0_SIGNAL_DETECT_1_assert", 9, 1 },
		{ "Q0_SIGNAL_DETECT_0_assert", 8, 1 },
		{ "Q0_CDR_LOL_3_assert", 7, 1 },
		{ "Q0_CDR_LOL_2_assert", 6, 1 },
		{ "Q0_CDR_LOL_1_assert", 5, 1 },
		{ "Q0_CDR_LOL_0_assert", 4, 1 },
		{ "Q0_LOS_3_assert", 3, 1 },
		{ "Q0_LOS_2_assert", 2, 1 },
		{ "Q0_LOS_1_assert", 1, 1 },
		{ "Q0_LOS_0_assert", 0, 1 },
	{ "MAC_IOS_INTR_EN_QUAD1", 0x3a098, 0 },
		{ "Q1_MAILBOX_INT_assert", 24, 1 },
		{ "Q1_TRAINING_FAILURE_3_assert", 23, 1 },
		{ "Q1_TRAINING_FAILURE_2_assert", 22, 1 },
		{ "Q1_TRAINING_FAILURE_1_assert", 21, 1 },
		{ "Q1_TRAINING_FAILURE_0_assert", 20, 1 },
		{ "Q1_TRAINING_COMPLETE_3_assert", 19, 1 },
		{ "Q1_TRAINING_COMPLETE_2_assert", 18, 1 },
		{ "Q1_TRAINING_COMPLETE_1_assert", 17, 1 },
		{ "Q1_TRAINING_COMPLETE_0_assert", 16, 1 },
		{ "Q1_AN_TX_INT_3_assert", 15, 1 },
		{ "Q1_AN_TX_INT_2_assert", 14, 1 },
		{ "Q1_AN_TX_INT_1_assert", 13, 1 },
		{ "Q1_AN_TX_INT_0_assert", 12, 1 },
		{ "Q1_SIGNAL_DETECT_3_assert", 11, 1 },
		{ "Q1_SIGNAL_DETECT_2_assert", 10, 1 },
		{ "Q1_SIGNAL_DETECT_1_assert", 9, 1 },
		{ "Q1_SIGNAL_DETECT_0_assert", 8, 1 },
		{ "Q1_CDR_LOL_3_assert", 7, 1 },
		{ "Q1_CDR_LOL_2_assert", 6, 1 },
		{ "Q1_CDR_LOL_1_assert", 5, 1 },
		{ "Q1_CDR_LOL_0_assert", 4, 1 },
		{ "Q1_LOS_3_assert", 3, 1 },
		{ "Q1_LOS_2_assert", 2, 1 },
		{ "Q1_LOS_1_assert", 1, 1 },
		{ "Q1_LOS_0_assert", 0, 1 },
	{ "MAC_IOS_INTR_CAUSE_QUAD1", 0x3a09c, 0 },
		{ "Q1_MAILBOX_INT_assert", 24, 1 },
		{ "Q1_TRAINING_FAILURE_3_assert", 23, 1 },
		{ "Q1_TRAINING_FAILURE_2_assert", 22, 1 },
		{ "Q1_TRAINING_FAILURE_1_assert", 21, 1 },
		{ "Q1_TRAINING_FAILURE_0_assert", 20, 1 },
		{ "Q1_TRAINING_COMPLETE_3_assert", 19, 1 },
		{ "Q1_TRAINING_COMPLETE_2_assert", 18, 1 },
		{ "Q1_TRAINING_COMPLETE_1_assert", 17, 1 },
		{ "Q1_TRAINING_COMPLETE_0_assert", 16, 1 },
		{ "Q1_AN_TX_INT_3_assert", 15, 1 },
		{ "Q1_AN_TX_INT_2_assert", 14, 1 },
		{ "Q1_AN_TX_INT_1_assert", 13, 1 },
		{ "Q1_AN_TX_INT_0_assert", 12, 1 },
		{ "Q1_SIGNAL_DETECT_3_assert", 11, 1 },
		{ "Q1_SIGNAL_DETECT_2_assert", 10, 1 },
		{ "Q1_SIGNAL_DETECT_1_assert", 9, 1 },
		{ "Q1_SIGNAL_DETECT_0_assert", 8, 1 },
		{ "Q1_CDR_LOL_3_assert", 7, 1 },
		{ "Q1_CDR_LOL_2_assert", 6, 1 },
		{ "Q1_CDR_LOL_1_assert", 5, 1 },
		{ "Q1_CDR_LOL_0_assert", 4, 1 },
		{ "Q1_LOS_3_assert", 3, 1 },
		{ "Q1_LOS_2_assert", 2, 1 },
		{ "Q1_LOS_1_assert", 1, 1 },
		{ "Q1_LOS_0_assert", 0, 1 },
	{ "MAC_MTIP_PCS_1G_0_CONTROL", 0x3e000, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_Sel_1", 13, 1 },
		{ "Auto_Neg_Ena", 12, 1 },
		{ "power_down", 11, 1 },
		{ "isolate", 10, 1 },
		{ "restart_auto_neg", 9, 1 },
		{ "duplex_mode", 8, 1 },
		{ "collision_test", 7, 1 },
		{ "Speed_Sel_0", 6, 1 },
	{ "MAC_MTIP_PCS_1G_0_STATUS", 0x3e004, 0 },
		{ "100Base_T4", 15, 1 },
		{ "100Base_X_full_duplex", 14, 1 },
		{ "100Base_X_half_duplex", 13, 1 },
		{ "10Mbps_full_duplex", 12, 1 },
		{ "10Mbps_half_duplex", 11, 1 },
		{ "100Base_T2_half_duplex1", 10, 1 },
		{ "100Base_T2_half_duplex0", 9, 1 },
		{ "Extended_status", 8, 1 },
		{ "Auto_neg_complete", 5, 1 },
		{ "Remote_fault", 4, 1 },
		{ "Auto_neg_ability", 3, 1 },
		{ "Link_status", 2, 1 },
		{ "Jabber_detect", 1, 1 },
		{ "extended_capability", 0, 1 },
	{ "MAC_MTIP_PCS_1G_0_PHY_IDENTIFIER_0", 0x3e008, 0 },
	{ "MAC_MTIP_PCS_1G_0_PHY_IDENTIFIER_1", 0x3e00c, 0 },
	{ "MAC_MTIP_PCS_1G_0_DEV_ABILITY", 0x3e010, 0 },
		{ "ACK", 14, 1 },
		{ "EEE_Clock_Stop_enable", 8, 1 },
	{ "MAC_MTIP_PCS_1G_0_PARTNER_ABILITY", 0x3e014, 0 },
		{ "Copper_Link_Status", 15, 1 },
		{ "ACK", 14, 1 },
		{ "Copper_Duplex_Status", 12, 1 },
		{ "Copper_Speed", 10, 2 },
		{ "EEE_Capability", 9, 1 },
		{ "EEE_Clock_Stop_Capability", 8, 1 },
	{ "MAC_MTIP_PCS_1G_0_AN_EXPANSION", 0x3e018, 0 },
		{ "Next_Page_Able", 2, 1 },
		{ "Page_Receive", 1, 1 },
	{ "MAC_MTIP_PCS_1G_0_NP_TX", 0x3e01c, 0 },
	{ "MAC_MTIP_PCS_1G_0_LP_NP_RX", 0x3e020, 0 },
		{ "NP", 15, 1 },
		{ "Ack", 14, 1 },
		{ "MP", 13, 1 },
		{ "Ack2", 12, 1 },
		{ "Toggle", 11, 1 },
		{ "data", 0, 11 },
	{ "MAC_MTIP_PCS_1G_0_EXTENDED_STATUS", 0x3e03c, 0 },
	{ "MAC_MTIP_PCS_1G_0_SCRATCH", 0x3e040, 0 },
	{ "MAC_MTIP_PCS_1G_0_REV", 0x3e044, 0 },
	{ "MAC_MTIP_PCS_1G_0_LINK_TIMER_0", 0x3e048, 0 },
	{ "MAC_MTIP_PCS_1G_0_LINK_TIMER_1", 0x3e04c, 0 },
	{ "MAC_MTIP_PCS_1G_0_IF_MODE", 0x3e050, 0 },
		{ "SGMII_DUPLEX", 4, 1 },
		{ "SGMII_SPEED", 2, 2 },
		{ "USE_SGMII_AN", 1, 1 },
		{ "SGMII_ENA", 0, 1 },
	{ "MAC_MTIP_PCS_1G_0_DEC_ERR_CNT", 0x3e054, 0 },
	{ "MAC_MTIP_PCS_1G_0_VENDOR_CONTROL", 0x3e058, 0 },
		{ "SGPCS_ENA_ST", 15, 1 },
		{ "CFG_CLOCK_RATE", 4, 4 },
		{ "SGPCS_ENA_R", 0, 1 },
	{ "MAC_MTIP_PCS_1G_0_SD_BIT_SLIP", 0x3e05c, 0 },
	{ "MAC_MTIP_PCS_1G_1_CONTROL", 0x3e100, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_Sel_1", 13, 1 },
		{ "Auto_Neg_Ena", 12, 1 },
		{ "power_down", 11, 1 },
		{ "isolate", 10, 1 },
		{ "restart_auto_neg", 9, 1 },
		{ "duplex_mode", 8, 1 },
		{ "collision_test", 7, 1 },
		{ "Speed_Sel_0", 6, 1 },
	{ "MAC_MTIP_PCS_1G_1_STATUS", 0x3e104, 0 },
		{ "100Base_T4", 15, 1 },
		{ "100Base_X_full_duplex", 14, 1 },
		{ "100Base_X_half_duplex", 13, 1 },
		{ "10Mbps_full_duplex", 12, 1 },
		{ "10Mbps_half_duplex", 11, 1 },
		{ "100Base_T2_half_duplex1", 10, 1 },
		{ "100Base_T2_half_duplex0", 9, 1 },
		{ "Extended_status", 8, 1 },
		{ "Auto_neg_complete", 5, 1 },
		{ "Remote_fault", 4, 1 },
		{ "Auto_neg_ability", 3, 1 },
		{ "Link_status", 2, 1 },
		{ "Jabber_detect", 1, 1 },
		{ "extended_capability", 0, 1 },
	{ "MAC_MTIP_PCS_1G_1_PHY_IDENTIFIER_0", 0x3e108, 0 },
	{ "MAC_MTIP_PCS_1G_1_PHY_IDENTIFIER_1", 0x3e10c, 0 },
	{ "MAC_MTIP_PCS_1G_1_DEV_ABILITY", 0x3e110, 0 },
		{ "ACK", 14, 1 },
		{ "EEE_Clock_Stop_enable", 8, 1 },
	{ "MAC_MTIP_PCS_1G_1_PARTNER_ABILITY", 0x3e114, 0 },
		{ "Copper_Link_Status", 15, 1 },
		{ "ACK", 14, 1 },
		{ "Copper_Duplex_Status", 12, 1 },
		{ "Copper_Speed", 10, 2 },
		{ "EEE_Capability", 9, 1 },
		{ "EEE_Clock_Stop_Capability", 8, 1 },
	{ "MAC_MTIP_PCS_1G_1_AN_EXPANSION", 0x3e118, 0 },
		{ "Next_Page_Able", 2, 1 },
		{ "Page_Receive", 1, 1 },
	{ "MAC_MTIP_PCS_1G_1_NP_TX", 0x3e11c, 0 },
	{ "MAC_MTIP_PCS_1G_1_LP_NP_RX", 0x3e120, 0 },
		{ "NP", 15, 1 },
		{ "Ack", 14, 1 },
		{ "MP", 13, 1 },
		{ "Ack2", 12, 1 },
		{ "Toggle", 11, 1 },
		{ "data", 0, 11 },
	{ "MAC_MTIP_PCS_1G_1_EXTENDED_STATUS", 0x3e13c, 0 },
	{ "MAC_MTIP_PCS_1G_1_SCRATCH", 0x3e140, 0 },
	{ "MAC_MTIP_PCS_1G_1_REV", 0x3e144, 0 },
	{ "MAC_MTIP_PCS_1G_1_LINK_TIMER_0", 0x3e148, 0 },
	{ "MAC_MTIP_PCS_1G_1_LINK_TIMER_1", 0x3e14c, 0 },
	{ "MAC_MTIP_PCS_1G_1_IF_MODE", 0x3e150, 0 },
		{ "SGMII_DUPLEX", 4, 1 },
		{ "SGMII_SPEED", 2, 2 },
		{ "USE_SGMII_AN", 1, 1 },
		{ "SGMII_ENA", 0, 1 },
	{ "MAC_MTIP_PCS_1G_1_DEC_ERR_CNT", 0x3e154, 0 },
	{ "MAC_MTIP_PCS_1G_1_VENDOR_CONTROL", 0x3e158, 0 },
		{ "SGPCS_ENA_ST", 15, 1 },
		{ "CFG_CLOCK_RATE", 4, 4 },
		{ "SGPCS_ENA_R", 0, 1 },
	{ "MAC_MTIP_PCS_1G_1_SD_BIT_SLIP", 0x3e15c, 0 },
	{ "MAC_MTIP_PCS_1G_2_CONTROL", 0x3e200, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_Sel_1", 13, 1 },
		{ "Auto_Neg_Ena", 12, 1 },
		{ "power_down", 11, 1 },
		{ "isolate", 10, 1 },
		{ "restart_auto_neg", 9, 1 },
		{ "duplex_mode", 8, 1 },
		{ "collision_test", 7, 1 },
		{ "Speed_Sel_0", 6, 1 },
	{ "MAC_MTIP_PCS_1G_2_STATUS", 0x3e204, 0 },
		{ "100Base_T4", 15, 1 },
		{ "100Base_X_full_duplex", 14, 1 },
		{ "100Base_X_half_duplex", 13, 1 },
		{ "10Mbps_full_duplex", 12, 1 },
		{ "10Mbps_half_duplex", 11, 1 },
		{ "100Base_T2_half_duplex1", 10, 1 },
		{ "100Base_T2_half_duplex0", 9, 1 },
		{ "Extended_status", 8, 1 },
		{ "Auto_neg_complete", 5, 1 },
		{ "Remote_fault", 4, 1 },
		{ "Auto_neg_ability", 3, 1 },
		{ "Link_status", 2, 1 },
		{ "Jabber_detect", 1, 1 },
		{ "extended_capability", 0, 1 },
	{ "MAC_MTIP_PCS_1G_2_PHY_IDENTIFIER_0", 0x3e208, 0 },
	{ "MAC_MTIP_PCS_1G_2_PHY_IDENTIFIER_1", 0x3e20c, 0 },
	{ "MAC_MTIP_PCS_1G_2_DEV_ABILITY", 0x3e210, 0 },
		{ "ACK", 14, 1 },
		{ "EEE_Clock_Stop_enable", 8, 1 },
	{ "MAC_MTIP_PCS_1G_2_PARTNER_ABILITY", 0x3e214, 0 },
		{ "Copper_Link_Status", 15, 1 },
		{ "ACK", 14, 1 },
		{ "Copper_Duplex_Status", 12, 1 },
		{ "Copper_Speed", 10, 2 },
		{ "EEE_Capability", 9, 1 },
		{ "EEE_Clock_Stop_Capability", 8, 1 },
	{ "MAC_MTIP_PCS_1G_2_AN_EXPANSION", 0x3e218, 0 },
		{ "Next_Page_Able", 2, 1 },
		{ "Page_Receive", 1, 1 },
	{ "MAC_MTIP_PCS_1G_2_NP_TX", 0x3e21c, 0 },
	{ "MAC_MTIP_PCS_1G_2_LP_NP_RX", 0x3e220, 0 },
		{ "NP", 15, 1 },
		{ "Ack", 14, 1 },
		{ "MP", 13, 1 },
		{ "Ack2", 12, 1 },
		{ "Toggle", 11, 1 },
		{ "data", 0, 11 },
	{ "MAC_MTIP_PCS_1G_2_EXTENDED_STATUS", 0x3e23c, 0 },
	{ "MAC_MTIP_PCS_1G_2_SCRATCH", 0x3e240, 0 },
	{ "MAC_MTIP_PCS_1G_2_REV", 0x3e244, 0 },
	{ "MAC_MTIP_PCS_1G_2_LINK_TIMER_0", 0x3e248, 0 },
	{ "MAC_MTIP_PCS_1G_2_LINK_TIMER_1", 0x3e24c, 0 },
	{ "MAC_MTIP_PCS_1G_2_IF_MODE", 0x3e250, 0 },
		{ "SGMII_DUPLEX", 4, 1 },
		{ "SGMII_SPEED", 2, 2 },
		{ "USE_SGMII_AN", 1, 1 },
		{ "SGMII_ENA", 0, 1 },
	{ "MAC_MTIP_PCS_1G_2_DEC_ERR_CNT", 0x3e254, 0 },
	{ "MAC_MTIP_PCS_1G_2_VENDOR_CONTROL", 0x3e258, 0 },
		{ "SGPCS_ENA_ST", 15, 1 },
		{ "CFG_CLOCK_RATE", 4, 4 },
		{ "SGPCS_ENA_R", 0, 1 },
	{ "MAC_MTIP_PCS_1G_2_SD_BIT_SLIP", 0x3e25c, 0 },
	{ "MAC_MTIP_PCS_1G_3_CONTROL", 0x3e300, 0 },
		{ "Reset", 15, 1 },
		{ "Loopback", 14, 1 },
		{ "Speed_Sel_1", 13, 1 },
		{ "Auto_Neg_Ena", 12, 1 },
		{ "power_down", 11, 1 },
		{ "isolate", 10, 1 },
		{ "restart_auto_neg", 9, 1 },
		{ "duplex_mode", 8, 1 },
		{ "collision_test", 7, 1 },
		{ "Speed_Sel_0", 6, 1 },
	{ "MAC_MTIP_PCS_1G_3_STATUS", 0x3e304, 0 },
		{ "100Base_T4", 15, 1 },
		{ "100Base_X_full_duplex", 14, 1 },
		{ "100Base_X_half_duplex", 13, 1 },
		{ "10Mbps_full_duplex", 12, 1 },
		{ "10Mbps_half_duplex", 11, 1 },
		{ "100Base_T2_half_duplex1", 10, 1 },
		{ "100Base_T2_half_duplex0", 9, 1 },
		{ "Extended_status", 8, 1 },
		{ "Auto_neg_complete", 5, 1 },
		{ "Remote_fault", 4, 1 },
		{ "Auto_neg_ability", 3, 1 },
		{ "Link_status", 2, 1 },
		{ "Jabber_detect", 1, 1 },
		{ "extended_capability", 0, 1 },
	{ "MAC_MTIP_PCS_1G_3_PHY_IDENTIFIER_0", 0x3e308, 0 },
	{ "MAC_MTIP_PCS_1G_3_PHY_IDENTIFIER_1", 0x3e30c, 0 },
	{ "MAC_MTIP_PCS_1G_3_DEV_ABILITY", 0x3e310, 0 },
		{ "ACK", 14, 1 },
		{ "EEE_Clock_Stop_enable", 8, 1 },
	{ "MAC_MTIP_PCS_1G_3_PARTNER_ABILITY", 0x3e314, 0 },
		{ "Copper_Link_Status", 15, 1 },
		{ "ACK", 14, 1 },
		{ "Copper_Duplex_Status", 12, 1 },
		{ "Copper_Speed", 10, 2 },
		{ "EEE_Capability", 9, 1 },
		{ "EEE_Clock_Stop_Capability", 8, 1 },
	{ "MAC_MTIP_PCS_1G_3_AN_EXPANSION", 0x3e318, 0 },
		{ "Next_Page_Able", 2, 1 },
		{ "Page_Receive", 1, 1 },
	{ "MAC_MTIP_PCS_1G_3_NP_TX", 0x3e31c, 0 },
	{ "MAC_MTIP_PCS_1G_3_LP_NP_RX", 0x3e320, 0 },
		{ "NP", 15, 1 },
		{ "Ack", 14, 1 },
		{ "MP", 13, 1 },
		{ "Ack2", 12, 1 },
		{ "Toggle", 11, 1 },
		{ "data", 0, 11 },
	{ "MAC_MTIP_PCS_1G_3_EXTENDED_STATUS", 0x3e33c, 0 },
	{ "MAC_MTIP_PCS_1G_3_SCRATCH", 0x3e340, 0 },
	{ "MAC_MTIP_PCS_1G_3_REV", 0x3e344, 0 },
	{ "MAC_MTIP_PCS_1G_3_LINK_TIMER_0", 0x3e348, 0 },
	{ "MAC_MTIP_PCS_1G_3_LINK_TIMER_1", 0x3e34c, 0 },
	{ "MAC_MTIP_PCS_1G_3_IF_MODE", 0x3e350, 0 },
		{ "SGMII_DUPLEX", 4, 1 },
		{ "SGMII_SPEED", 2, 2 },
		{ "USE_SGMII_AN", 1, 1 },
		{ "SGMII_ENA", 0, 1 },
	{ "MAC_MTIP_PCS_1G_3_DEC_ERR_CNT", 0x3e354, 0 },
	{ "MAC_MTIP_PCS_1G_3_VENDOR_CONTROL", 0x3e358, 0 },
		{ "SGPCS_ENA_ST", 15, 1 },
		{ "CFG_CLOCK_RATE", 4, 4 },
		{ "SGPCS_ENA_R", 0, 1 },
	{ "MAC_MTIP_PCS_1G_3_SD_BIT_SLIP", 0x3e35c, 0 },
	{ "MAC_DPLL_CTRL_0", 0x3f000, 0 },
		{ "local_fault_ovrd", 18, 1 },
		{ "local_fault_hold_en", 17, 1 },
		{ "DPLL_Rst", 16, 1 },
		{ "CNTOFFSET", 0, 16 },
	{ "MAC_DPLL_CTRL_1", 0x3f004, 0 },
	{ "MAC_DPLL_CTRL_2", 0x3f008, 0 },
		{ "DIVFFB", 16, 16 },
		{ "DIVFIN", 0, 16 },
	{ "MAC_DPLL_CTRL_3", 0x3f00c, 0 },
		{ "ISHIFT_HOLD", 28, 4 },
		{ "ISHIFT", 24, 4 },
		{ "INT_PRESET", 12, 12 },
		{ "FMI", 4, 8 },
		{ "DPLL_PROGRAM", 3, 1 },
		{ "PRESET_EN", 2, 1 },
		{ "ONTARGETOV", 1, 1 },
		{ "FDONLY", 0, 1 },
	{ "MAC_DPLL_CTRL_4", 0x3f010, 0 },
		{ "FKI", 24, 5 },
		{ "FRAC_PRESET", 0, 24 },
	{ "MAC_DPLL_CTRL_5", 0x3f014, 0 },
		{ "PH_STEP_CNT_HOLD", 24, 5 },
		{ "CFG_RESET", 23, 1 },
		{ "PH_STEP_CNT", 16, 5 },
		{ "OTDLY", 0, 16 },
	{ "MAC_DPLL_CTRL_6", 0x3f018, 0 },
		{ "TARGETCNT", 16, 16 },
		{ "PKP", 8, 5 },
		{ "PMP", 0, 8 },
	{ "MAC_DPLL_CTRL_7", 0x3f01c, 0 },
	{ "MAC_DPLL_STATUS_0", 0x3f020, 0 },
	{ "MAC_DPLL_STATUS_1", 0x3f024, 0 },
	{ "MAC_DPLL_STATUS_2", 0x3f028, 0 },
		{ "INT", 12, 12 },
		{ "INT_PD_OUT", 0, 12 },
	{ "MAC_FRAC_N_PLL_CTRL_0", 0x3f02c, 0 },
		{ "FRAC_N_DSKEWCALCNT", 29, 3 },
		{ "PLLEN", 28, 1 },
		{ "BYPASS", 24, 4 },
		{ "POSTDIV3A", 21, 3 },
		{ "POSTDIV3B", 18, 3 },
		{ "POSTDIV2A", 15, 3 },
		{ "POSTDIV2B", 12, 3 },
		{ "POSTDIV1A", 9, 3 },
		{ "POSTDIV1B", 6, 3 },
		{ "POSTDIV0A", 3, 3 },
		{ "POSTDIV0B", 0, 3 },
	{ "MAC_FRAC_N_PLL_CTRL_1", 0x3f030, 0 },
		{ "FRAC_N_frac_n_fouten", 28, 4 },
		{ "FRAC_N_DSKEWCALIN", 16, 12 },
		{ "FRAC_N_REFDIV", 10, 6 },
		{ "FRAC_N_DSMEN", 9, 1 },
		{ "FRAC_N_PLLEN", 8, 1 },
		{ "FRAC_N_DACEN", 7, 1 },
		{ "FRAC_N_POSTDIV0PRE", 6, 1 },
		{ "FRAC_N_DSKEWCALBYP", 5, 1 },
		{ "FRAC_N_DSKEWFASTCAL", 4, 1 },
		{ "FRAC_N_DSKEWCALEN", 3, 1 },
		{ "FRAC_N_FREFCMLEN", 2, 1 },
	{ "MAC_FRAC_N_PLL_STATUS_0", 0x3f034, 0 },
		{ "DSKEWCALLOCK", 12, 1 },
		{ "DSKEWCALOUT", 0, 12 },
	{ "MAC_MTIP_PCS_STATUS_0", 0x3f100, 0 },
		{ "xlgmii7_tx_tsu", 22, 2 },
		{ "xlgmii6_tx_tsu", 20, 2 },
		{ "xlgmii5_tx_tsu", 18, 2 },
		{ "xlgmii4_tx_tsu", 16, 2 },
		{ "xlgmii3_tx_tsu", 14, 2 },
		{ "xlgmii2_tx_tsu", 12, 2 },
		{ "xlgmii1_tx_tsu", 10, 2 },
		{ "xlgmii0_tx_tsu", 8, 2 },
		{ "cgmii3_tx_tsu", 6, 2 },
		{ "cgmii2_tx_tsu", 4, 2 },
		{ "cgmii1_tx_tsu", 2, 2 },
		{ "cgmii0_tx_tsu", 0, 2 },
	{ "MAC_MTIP_PCS_STATUS_1", 0x3f104, 0 },
		{ "cdmii1_rx_tsu", 26, 2 },
		{ "cdmii0_rx_tsu", 24, 2 },
		{ "xlgmii7_rx_tsu", 22, 2 },
		{ "xlgmii6_rx_tsu", 20, 2 },
		{ "xlgmii5_rx_tsu", 18, 2 },
		{ "xlgmii4_rx_tsu", 16, 2 },
		{ "xlgmii3_rx_tsu", 14, 2 },
		{ "xlgmii2_rx_tsu", 12, 2 },
		{ "xlgmii1_rx_tsu", 10, 2 },
		{ "xlgmii0_rx_tsu", 8, 2 },
		{ "cgmii3_rx_tsu", 6, 2 },
		{ "cgmii2_rx_tsu", 4, 2 },
		{ "cgmii1_rx_tsu", 2, 2 },
		{ "cgmii0_rx_tsu", 0, 2 },
	{ "MAC_MTIP_PCS_STATUS_2", 0x3f108, 0 },
	{ "MAC_MTIP_PCS_STATUS_3", 0x3f10c, 0 },
	{ "MAC_MTIP_PCS_STATUS_4", 0x3f110, 0 },
	{ "MAC_MTIP_PCS_STATUS_5", 0x3f114, 0 },
	{ "MAC_MTIP_PCS_STATUS_6", 0x3f118, 0 },
	{ "MAC_MTIP_PCS_STATUS_7", 0x3f11c, 0 },
	{ "MAC_MTIP_MAC_10G_100G_STATUS_0", 0x3f120, 0 },
		{ "tsv_xon_stb_2", 24, 8 },
		{ "tsv_xoff_stb_2", 16, 8 },
		{ "rsv_xon_stb_2", 8, 8 },
		{ "rsv_xoff_stb_2", 0, 8 },
	{ "MAC_MTIP_MAC_10G_100G_STATUS_1", 0x3f124, 0 },
		{ "tsv_xon_stb_3", 24, 8 },
		{ "tsv_xoff_stb_3", 16, 8 },
		{ "rsv_xon_stb_3", 8, 8 },
		{ "rsv_xoff_stb_3", 0, 8 },
	{ "MAC_MTIP_MAC_10G_100G_STATUS_2", 0x3f128, 0 },
		{ "tsv_xon_stb_4", 24, 8 },
		{ "tsv_xoff_stb_4", 16, 8 },
		{ "rsv_xon_stb_4", 8, 8 },
		{ "rsv_xoff_stb_4", 0, 8 },
	{ "MAC_MTIP_MAC_10G_100G_STATUS_3", 0x3f12c, 0 },
		{ "tsv_xon_stb_5", 24, 8 },
		{ "tsv_xoff_stb_5", 16, 8 },
		{ "rsv_xon_stb_5", 8, 8 },
		{ "rsv_xoff_stb_5", 0, 8 },
	{ "MAC_MTIP_MAC_10G_100G_STATUS_4", 0x3f130, 0 },
		{ "tx_sfd_o_5", 19, 1 },
		{ "tx_sfd_o_4", 18, 1 },
		{ "tx_sfd_o_3", 17, 1 },
		{ "tx_sfd_o_2", 16, 1 },
		{ "rx_sfd_o_5", 15, 1 },
		{ "rx_sfd_o_4", 14, 1 },
		{ "rx_sfd_o_3", 13, 1 },
		{ "rx_sfd_o_2", 12, 1 },
		{ "rx_sfd_shift_o_5", 11, 1 },
		{ "rx_sfd_shift_o_4", 10, 1 },
		{ "rx_sfd_shift_o_3", 9, 1 },
		{ "rx_sfd_shift_o_2", 8, 1 },
		{ "tx_sfd_shift_o_5", 7, 1 },
		{ "tx_sfd_shift_o_4", 6, 1 },
		{ "tx_sfd_shift_o_3", 5, 1 },
		{ "tx_sfd_shift_o_2", 4, 1 },
		{ "ts_sfd_ena_5", 3, 1 },
		{ "ts_sfd_ena_4", 2, 1 },
		{ "ts_sfd_ena_3", 1, 1 },
		{ "ts_sfd_ena_2", 0, 1 },
	{ "MAC_STS_CONFIG", 0x3f200, 0 },
		{ "sts_ena", 30, 1 },
		{ "n_pps_ena", 29, 1 },
		{ "sts_reset", 28, 1 },
		{ "debounce_cnt", 0, 28 },
	{ "MAC_STS_COUNTER", 0x3f204, 0 },
	{ "MAC_STS_COUNT_1", 0x3f208, 0 },
	{ "MAC_STS_COUNT_2", 0x3f20c, 0 },
	{ "MAC_STS_N_PPS_COUNT_HI", 0x3f210, 0 },
	{ "MAC_STS_N_PPS_COUNT_LO", 0x3f214, 0 },
	{ "MAC_STS_N_PPS_COUNTER", 0x3f218, 0 },
	{ NULL }
};

struct reg_info t7_crypto_0_regs[] = {
	{ "TLS_TX_CH_CONFIG", 0x44000, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x44004, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x44008, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4400c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x44010, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x44014, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x44020, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x44024, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x44028, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x44030, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x44100, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x44104, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x44108, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4410c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x44110, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x44114, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x44120, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x44124, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x44128, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x44130, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x44200, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x44204, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x44208, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4420c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x44210, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x44214, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x44220, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x44224, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x44228, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x44230, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x44300, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x44304, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x44308, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4430c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x44310, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x44314, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x44320, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x44324, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x44328, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x44330, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x44400, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x44404, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x44408, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4440c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x44410, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x44414, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x44420, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x44424, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x44428, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x44430, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x44500, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x44504, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x44508, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4450c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x44510, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x44514, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x44520, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x44524, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x44528, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x44530, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_DBG_SELL_DATA", 0x44714, 0 },
	{ "TLS_TX_DBG_SELH_DATA", 0x44718, 0 },
	{ "TLS_TX_DBG_SEL_CTRL", 0x44730, 0 },
	{ "TLS_TX_GLOBAL_CONFIG", 0x447c0, 0 },
		{ "QUIC_EN", 2, 1 },
		{ "IPSEC_IDX_UPD_EN", 1, 1 },
		{ "IPSEC_IDX_CTL", 0, 1 },
	{ "TLS_TX_CGEN", 0x447f0, 0 },
	{ "TLS_TX_IND_ADDR", 0x447f8, 0 },
	{ "TLS_TX_IND_DATA", 0x447fc, 0 },
	{ NULL }
};

struct reg_info t7_crypto_1_regs[] = {
	{ "TLS_TX_CH_CONFIG", 0x45000, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x45004, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x45008, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4500c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x45010, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x45014, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x45020, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x45024, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x45028, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x45030, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x45100, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x45104, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x45108, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4510c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x45110, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x45114, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x45120, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x45124, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x45128, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x45130, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x45200, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x45204, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x45208, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4520c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x45210, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x45214, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x45220, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x45224, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x45228, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x45230, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x45300, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x45304, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x45308, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4530c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x45310, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x45314, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x45320, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x45324, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x45328, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x45330, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x45400, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x45404, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x45408, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4540c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x45410, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x45414, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x45420, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x45424, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x45428, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x45430, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_CH_CONFIG", 0x45500, 0 },
		{ "SMALL_LEN_THRESH", 16, 16 },
		{ "CIPH0_CTL_SEL", 12, 3 },
		{ "CIPHN_CTL_SEL", 9, 3 },
		{ "MAC_CTL_SEL", 6, 3 },
		{ "CIPH0_XOR_SEL", 5, 1 },
		{ "CIPHN_XOR_SEL", 4, 1 },
		{ "MAC_XOR_SEL", 3, 1 },
		{ "CIPH0_DP_SEL", 2, 1 },
		{ "CIPHN_DP_SEL", 1, 1 },
		{ "MAC_DP_SEL", 0, 1 },
	{ "TLS_TX_CH_PERR_INJECT", 0x45504, 0 },
		{ "MemSel", 1, 5 },
		{ "InjectDataErr", 0, 1 },
	{ "TLS_TX_CH_INT_ENABLE", 0x45508, 0 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_INT_CAUSE", 0x4550c, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_PERR_ENABLE", 0x45510, 0 },
		{ "KEX_CERR", 4, 1 },
		{ "KeyLenErr", 3, 1 },
		{ "intf1_PERR", 2, 1 },
		{ "intf0_PERR", 1, 1 },
		{ "KEX_PERR", 0, 1 },
	{ "TLS_TX_CH_DEBUG_FLAGS", 0x45514, 0 },
	{ "TLS_TX_CH_HMACCTRL_CFG", 0x45520, 0 },
		{ "HMAC_CFG6", 12, 6 },
		{ "HMAC_CFG5", 6, 6 },
		{ "HMAC_CFG4", 0, 6 },
	{ "TLS_TX_CH_ERR_RSP_HDR", 0x45524, 0 },
	{ "TLS_TX_CH_HANG_TIMEOUT", 0x45528, 0 },
	{ "TLS_TX_CH_DBG_STEP_CTRL", 0x45530, 0 },
		{ "DBG_STEP_CTRL", 1, 1 },
		{ "DBG_STEP_EN", 0, 1 },
	{ "TLS_TX_DBG_SELL_DATA", 0x45714, 0 },
	{ "TLS_TX_DBG_SELH_DATA", 0x45718, 0 },
	{ "TLS_TX_DBG_SEL_CTRL", 0x45730, 0 },
	{ "TLS_TX_GLOBAL_CONFIG", 0x457c0, 0 },
		{ "QUIC_EN", 2, 1 },
		{ "IPSEC_IDX_UPD_EN", 1, 1 },
		{ "IPSEC_IDX_CTL", 0, 1 },
	{ "TLS_TX_CGEN", 0x457f0, 0 },
	{ "TLS_TX_IND_ADDR", 0x457f8, 0 },
	{ "TLS_TX_IND_DATA", 0x457fc, 0 },
	{ NULL }
};

struct reg_info t7_crypto_key_regs[] = {
	{ "CRYPTO_KEY_CONFIG", 0x46000, 0 },
		{ "EsnWin", 1, 3 },
		{ "IngKey96", 0, 1 },
	{ "CRYPTO_KEY_RST", 0x46004, 0 },
		{ "Core1Rst", 1, 1 },
		{ "Core0Rst", 0, 1 },
	{ "CRYPTO_KEY_INT_ENABLE", 0x46008, 0 },
		{ "MA_FIFO_PERR", 22, 1 },
		{ "MA_RSP_PERR", 21, 1 },
		{ "ING_CACHE_DATA_PERR", 19, 1 },
		{ "ING_CACHE_TAG_PERR", 18, 1 },
		{ "LKP_KEY_REQ_PERR", 17, 1 },
		{ "LKP_CLIP_TCAM_PERR", 16, 1 },
		{ "LKP_MAIN_TCAM_PERR", 15, 1 },
		{ "EGR_KEY_REQ_PERR", 14, 1 },
		{ "EGR_CACHE_DATA_PERR", 13, 1 },
		{ "EGR_CACHE_TAG_PERR", 12, 1 },
		{ "CIM_PERR", 11, 1 },
		{ "MA_INV_RSP_TAG", 10, 1 },
		{ "ING_KEY_RANGE_ERR", 9, 1 },
		{ "ING_MFIFO_OVFL", 8, 1 },
		{ "LKP_REQ_OVFL", 7, 1 },
		{ "EOK_WAIT_ERR", 6, 1 },
		{ "EGR_KEY_RANGE_ERR", 5, 1 },
		{ "EGR_MFIFO_OVFL", 4, 1 },
		{ "SEQ_WRAP_HP_OVFL", 3, 1 },
		{ "SEQ_WRAP_LP_OVFL", 2, 1 },
		{ "EGR_SEQ_WRAP_HP", 1, 1 },
		{ "EGR_SEQ_WRAP_LP", 0, 1 },
	{ "CRYPTO_KEY_INT_CAUSE", 0x4600c, 0 },
		{ "MA_FIFO_PERR", 22, 1 },
		{ "MA_RSP_PERR", 21, 1 },
		{ "ING_CACHE_DATA_PERR", 19, 1 },
		{ "ING_CACHE_TAG_PERR", 18, 1 },
		{ "LKP_KEY_REQ_PERR", 17, 1 },
		{ "LKP_CLIP_TCAM_PERR", 16, 1 },
		{ "LKP_MAIN_TCAM_PERR", 15, 1 },
		{ "EGR_KEY_REQ_PERR", 14, 1 },
		{ "EGR_CACHE_DATA_PERR", 13, 1 },
		{ "EGR_CACHE_TAG_PERR", 12, 1 },
		{ "CIM_PERR", 11, 1 },
		{ "MA_INV_RSP_TAG", 10, 1 },
		{ "ING_KEY_RANGE_ERR", 9, 1 },
		{ "ING_MFIFO_OVFL", 8, 1 },
		{ "LKP_REQ_OVFL", 7, 1 },
		{ "EOK_WAIT_ERR", 6, 1 },
		{ "EGR_KEY_RANGE_ERR", 5, 1 },
		{ "EGR_MFIFO_OVFL", 4, 1 },
		{ "SEQ_WRAP_HP_OVFL", 3, 1 },
		{ "SEQ_WRAP_LP_OVFL", 2, 1 },
		{ "EGR_SEQ_WRAP_HP", 1, 1 },
		{ "EGR_SEQ_WRAP_LP", 0, 1 },
	{ "CRYPTO_KEY_PERR_ENABLE", 0x46010, 0 },
		{ "MA_FIFO_PERR", 22, 1 },
		{ "MA_RSP_PERR", 21, 1 },
		{ "ING_CACHE_DATA_PERR", 19, 1 },
		{ "ING_CACHE_TAG_PERR", 18, 1 },
		{ "LKP_KEY_REQ_PERR", 17, 1 },
		{ "LKP_CLIP_TCAM_PERR", 16, 1 },
		{ "LKP_MAIN_TCAM_PERR", 15, 1 },
		{ "EGR_KEY_REQ_PERR", 14, 1 },
		{ "EGR_CACHE_DATA_PERR", 13, 1 },
		{ "EGR_CACHE_TAG_PERR", 12, 1 },
		{ "CIM_PERR", 11, 1 },
		{ "MA_INV_RSP_TAG", 10, 1 },
		{ "ING_KEY_RANGE_ERR", 9, 1 },
		{ "ING_MFIFO_OVFL", 8, 1 },
		{ "LKP_REQ_OVFL", 7, 1 },
		{ "EOK_WAIT_ERR", 6, 1 },
		{ "EGR_KEY_RANGE_ERR", 5, 1 },
		{ "EGR_MFIFO_OVFL", 4, 1 },
		{ "SEQ_WRAP_HP_OVFL", 3, 1 },
		{ "SEQ_WRAP_LP_OVFL", 2, 1 },
		{ "EGR_SEQ_WRAP_HP", 1, 1 },
		{ "EGR_SEQ_WRAP_LP", 0, 1 },
	{ "CRYPTO_KEY_EGR_SEQ_WRAP_LP_KEY_ID", 0x46018, 0 },
		{ "KEY_VALID", 31, 1 },
		{ "KEY_ID", 0, 31 },
	{ "CRYPTO_KEY_EGR_SEQ_WRAP_HP_KEY_ID", 0x4601c, 0 },
		{ "KEY_VALID", 31, 1 },
		{ "KEY_ID", 0, 31 },
	{ "CRYPTO_KEY_TCAM_DATA0", 0x46020, 0 },
	{ "CRYPTO_KEY_TCAM_DATA1", 0x46024, 0 },
	{ "CRYPTO_KEY_TCAM_DATA2", 0x46028, 0 },
	{ "CRYPTO_KEY_TCAM_DATA3", 0x4602c, 0 },
	{ "CRYPTO_KEY_TCAM_CTL", 0x46030, 0 },
		{ "SrchMHit", 21, 1 },
		{ "Busy", 20, 1 },
		{ "SrchHit", 19, 1 },
		{ "IPVersion", 18, 1 },
		{ "BitSel", 17, 1 },
		{ "TcamSel", 16, 1 },
		{ "CmdType", 14, 2 },
		{ "TcamIndex", 0, 14 },
	{ "CRYPTO_KEY_TCAM_CONFIG", 0x46034, 0 },
		{ "CLCAM_INIT_BUSY", 7, 1 },
		{ "CLCAM_INIT", 6, 1 },
		{ "MTCAM_INIT_BUSY", 5, 1 },
		{ "MTCAM_INIT", 4, 1 },
		{ "CLTCAMDEEPSLEEP_STAT", 3, 1 },
		{ "TCAMDEEPSLEEP_STAT", 2, 1 },
		{ "CLTCAMDEEPSLEEP", 1, 1 },
		{ "TCAMDEEPSLEEP", 0, 1 },
	{ "CRYPTO_KEY_TX_CMM_CONFIG", 0x46040, 0 },
		{ "GlFl", 31, 1 },
		{ "WrCntIdle", 16, 15 },
		{ "RdThreshold", 8, 6 },
		{ "WrThrLevel2", 7, 1 },
		{ "WrThrLevel1", 6, 1 },
		{ "WrThrThreshEn", 5, 1 },
		{ "WrThrThresh", 0, 5 },
	{ "CRYPTO_KEY_TX_TNL_BASE", 0x46044, 0 },
	{ "CRYPTO_KEY_TX_TRN_BASE", 0x46048, 0 },
	{ "CRYPTO_KEY_TX_MAX_KEYS", 0x4604c, 0 },
		{ "TNL_MAX", 16, 16 },
		{ "TRN_MAX", 0, 16 },
	{ "CRYPTO_KEY_TX_SEQ_STAT", 0x46050, 0 },
		{ "ESN", 24, 1 },
		{ "SeqHi", 20, 4 },
		{ "KeyID", 0, 20 },
	{ "CRYPTO_KEY_RX_CMM_CONFIG", 0x46060, 0 },
		{ "GlFl", 31, 1 },
		{ "WrCntIdle", 16, 15 },
		{ "RdThreshold", 8, 6 },
		{ "WrThrLevel2", 7, 1 },
		{ "WrThrLevel1", 6, 1 },
		{ "WrThrThreshEn", 5, 1 },
		{ "WrThrThresh", 0, 5 },
	{ "CRYPTO_KEY_RX_BASE", 0x46064, 0 },
	{ "CRYPTO_KEY_RX_MAX_KEYS", 0x46068, 0 },
	{ "CRYPTO_KEY_CRYPTO_REVISION", 0x4606c, 0 },
	{ "CRYPTO_KEY_RX_SEQ_STAT", 0x46070, 0 },
		{ "ESN", 24, 1 },
		{ "SeqHi", 20, 4 },
		{ "KeyID", 0, 20 },
	{ "CRYPTO_KEY_TCAM_BIST_CTRL", 0x46074, 0 },
		{ "rst_cb", 31, 1 },
		{ "cb_start", 0, 28 },
	{ "CRYPTO_KEY_TCAM_BIST_CB_PASS", 0x46078, 0 },
	{ "CRYPTO_KEY_TCAM_BIST_CB_BUSY", 0x4607c, 0 },
	{ "CRYPTO_KEY_DBG_SEL_CTRL", 0x46080, 0 },
		{ "SEL_OVR_EN", 16, 1 },
		{ "SELH", 8, 8 },
		{ "SELL", 0, 8 },
	{ "CRYPTO_KEY_DBG_SELL_DATA", 0x46084, 0 },
	{ "CRYPTO_KEY_DBG_SELH_DATA", 0x46088, 0 },
	{ NULL }
};

struct reg_info t7_arm_regs[] = {
	{ "ARM_CPU_POR_RST", 0x47000, 0 },
		{ "CpuPorRstn3", 3, 1 },
		{ "CpuPorRstn2", 2, 1 },
		{ "CpuPorRstn1", 1, 1 },
		{ "CpuPorRstn0", 0, 1 },
	{ "ARM_CPU_CORE_RST", 0x47004, 0 },
		{ "CpuCoreRstn3", 3, 1 },
		{ "CpuCoreRstn2", 2, 1 },
		{ "CpuCoreRstn1", 1, 1 },
		{ "CpuCoreRstn0", 0, 1 },
	{ "ARM_CPU_WARM_RST_REQ", 0x47008, 0 },
		{ "CpuWarmRstReq3", 3, 1 },
		{ "CpuWarmRstReq2", 2, 1 },
		{ "CpuWarmRstReq1", 1, 1 },
		{ "CpuWarmRstReq0", 0, 1 },
	{ "ARM_CPU_L2_RST", 0x4700c, 0 },
	{ "ARM_CPU_L2_RST_DIS", 0x47010, 0 },
	{ "ARM_CPU_PRESET_DBG", 0x47014, 0 },
	{ "ARM_CPU_PERIPH_BASE", 0x47124, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47020, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47024, 0 },
	{ "ARM_CPU_PMU_EVENT", 0x47028, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47030, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47034, 0 },
	{ "ARM_CPU_PMU_EVENT", 0x47038, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47040, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47044, 0 },
	{ "ARM_CPU_PMU_EVENT", 0x47048, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR0", 0x47050, 0 },
	{ "ARM_CPU_RESET_VECTOR_BASE_ADDR1", 0x47054, 0 },
	{ "ARM_CPU_PMU_EVENT", 0x47058, 0 },
	{ "ARM_CPU_DBG_PWR_UP_REQ", 0x47060, 0 },
		{ "CpuDbgPwrUpReq3", 3, 1 },
		{ "CpuDbgPwrUpReq2", 2, 1 },
		{ "CpuDbgPwrUpReq1", 1, 1 },
		{ "CpuDbgPwrUpReq0", 0, 1 },
	{ "ARM_CPU_STANDBY_WFE_WFI", 0x47064, 0 },
		{ "CpuStandbyWfiL2", 8, 1 },
		{ "CpuStandbyWfi3", 7, 1 },
		{ "CpuStandbyWfi2", 6, 1 },
		{ "CpuStandbyWfi1", 5, 1 },
		{ "CpuStandbyWfi0", 4, 1 },
		{ "CpuStandbyWfe3", 3, 1 },
		{ "CpuStandbyWfe2", 2, 1 },
		{ "CpuStandbyWfe1", 1, 1 },
		{ "CpuStandbyWfe0", 0, 1 },
	{ "ARM_CPU_SMPEN", 0x47068, 0 },
		{ "CpuSmpEn3", 3, 1 },
		{ "CpuSmpEn2", 2, 1 },
		{ "CpuSmpEn1", 1, 1 },
		{ "CpuSmpEn0", 0, 1 },
	{ "ARM_CPU_QACTIVE", 0x4706c, 0 },
		{ "CpuQactive3", 3, 1 },
		{ "CpuQactive2", 2, 1 },
		{ "CpuQactive1", 1, 1 },
		{ "CpuQactive0", 0, 1 },
	{ "ARM_CPU_QREQ", 0x47070, 0 },
		{ "CpuL2FlushReq", 5, 1 },
		{ "CpuL2QReqn", 4, 1 },
		{ "CpuQReq3n", 3, 1 },
		{ "CpuQReq2n", 2, 1 },
		{ "CpuQReq1n", 1, 1 },
		{ "CpuQReq0n", 0, 1 },
	{ "ARM_CPU_QREQ_STATUS", 0x47074, 0 },
		{ "CpuL2FlushDone", 10, 1 },
		{ "CpuL2QDeny", 9, 1 },
		{ "CpuL2QAcceptn", 8, 1 },
		{ "CpuQDeny3", 7, 1 },
		{ "CpuQDeny2", 6, 1 },
		{ "CpuQDeny1", 5, 1 },
		{ "CpuQDeny0", 4, 1 },
		{ "CpuQAccept3n", 3, 1 },
		{ "CpuQAccept2n", 2, 1 },
		{ "CpuQAccept1n", 1, 1 },
		{ "CpuQAccept0n", 0, 1 },
	{ "ARM_CPU_DBG_EN", 0x47078, 0 },
		{ "CpuDbgL1RstDisable", 28, 1 },
		{ "CpuDbgRstReq3", 27, 1 },
		{ "CpuDbgRstReq2", 26, 1 },
		{ "CpuDbgRstReq1", 25, 1 },
		{ "CpuDbgRstReq0", 24, 1 },
		{ "CpuDbgPwrdUp3", 23, 1 },
		{ "CpuDbgPwrdUp2", 22, 1 },
		{ "CpuDbgPwrdUp1", 21, 1 },
		{ "CpuDbgPwrdUp0", 20, 1 },
		{ "CpuExtDbgReq3", 19, 1 },
		{ "CpuExtDbgReq2", 18, 1 },
		{ "CpuExtDbgReq1", 17, 1 },
		{ "CpuExtDbgReq0", 16, 1 },
		{ "CpuSpNidEn3", 15, 1 },
		{ "CpuSpNidEn2", 14, 1 },
		{ "CpuSpNidEn1", 13, 1 },
		{ "CpuSpNidEn0", 12, 1 },
		{ "CpuSpDbgEn3", 11, 1 },
		{ "CpuSpDbgEn2", 10, 1 },
		{ "CpuSpDbgEn1", 9, 1 },
		{ "CpuSpDbgEn0", 8, 1 },
		{ "CpuNidEn3", 7, 1 },
		{ "CpuNidEn2", 6, 1 },
		{ "CpuNidEn1", 5, 1 },
		{ "CpuNidEn0", 4, 1 },
		{ "CpuDbgEn3", 3, 1 },
		{ "CpuDbgEn2", 2, 1 },
		{ "CpuDbgEn1", 1, 1 },
		{ "CpuDbgEn0", 0, 1 },
	{ "ARM_CPU_DBG_ACK", 0x4707c, 0 },
		{ "CpuDbgNoPwrDwn3", 11, 1 },
		{ "CpuDbgNoPwrDwn2", 10, 1 },
		{ "CpuDbgNoPwrDwn1", 9, 1 },
		{ "CpuDbgNoPwrDwn0", 8, 1 },
		{ "CpuDgnRstReq3", 7, 1 },
		{ "CpuDgnRstReq2", 6, 1 },
		{ "CpuDgnRstReq1", 5, 1 },
		{ "CpuDgnRstReq0", 4, 1 },
		{ "CpuDbgAck3", 3, 1 },
		{ "CpuDbgAck2", 2, 1 },
		{ "CpuDbgAck1", 1, 1 },
		{ "CpuDbgAck0", 0, 1 },
	{ "ARM_CPU_PMU_SNAPSHOT_REQ", 0x47080, 0 },
		{ "CpuPmuSnapshotReq3", 3, 1 },
		{ "CpuPmuSnapshotReq2", 2, 1 },
		{ "CpuPmuSnapshotReq1", 1, 1 },
		{ "CpuPmuSnapshotReq0", 0, 1 },
	{ "ARM_CPU_PMU_SNAPSHOT_ACK", 0x47084, 0 },
		{ "CpuPmuSnapshotAck3", 3, 1 },
		{ "CpuPmuSnapshotAck2", 2, 1 },
		{ "CpuPmuSnapshotAck1", 1, 1 },
		{ "CpuPmuSnapshotAck0", 0, 1 },
	{ "ARM_CPU_CFG_END_VINI_TE", 0x4708c, 0 },
		{ "CpuSysBarDisable", 23, 1 },
		{ "CpuBroadCacheMain", 22, 1 },
		{ "CpuBroadOuter", 21, 1 },
		{ "CpuBroadInner", 20, 1 },
		{ "CpuCryptoDisable3", 19, 1 },
		{ "CpuCryptoDisable2", 18, 1 },
		{ "CpuCryptoDisable1", 17, 1 },
		{ "CpuCryptoDisable0", 16, 1 },
		{ "CpuAA64nAA323", 15, 1 },
		{ "CpuAA64nAA322", 14, 1 },
		{ "CpuAA64nAA321", 13, 1 },
		{ "CpuAA64nAA320", 12, 1 },
		{ "CpuCfgTe3", 11, 1 },
		{ "CpuCfgTe2", 10, 1 },
		{ "CpuCfgTe1", 9, 1 },
		{ "CpuCfgTe0", 8, 1 },
		{ "CpuViniHi3", 7, 1 },
		{ "CpuViniHi2", 6, 1 },
		{ "CpuViniHi1", 5, 1 },
		{ "CpuViniHi0", 4, 1 },
		{ "CpuCfgEnd3", 3, 1 },
		{ "CpuCfgEnd2", 2, 1 },
		{ "CpuCfgEnd1", 1, 1 },
		{ "CpuCfgEnd0", 0, 1 },
	{ "ARM_CPU_CP15_SDISABLE", 0x47090, 0 },
		{ "CpuCP15SDisable3", 3, 1 },
		{ "CpuCP15SDisable2", 2, 1 },
		{ "CpuCP15SDisable1", 1, 1 },
		{ "CpuCP15SDisable0", 0, 1 },
	{ "ARM_CPU_CLUSTER_ID_AFF", 0x47094, 0 },
		{ "CpuClusterIdAff2", 8, 8 },
		{ "CpuClusterIdAff1", 0, 8 },
	{ "ARM_CPU_CLK_CFG", 0x47098, 0 },
		{ "CpuAcInactiveM", 1, 1 },
		{ "CpuAclkEnM", 0, 1 },
	{ "ARM_CPU_EVENT_I", 0x47100, 0 },
	{ "ARM_CPU_EVENT_O", 0x47104, 0 },
	{ "ARM_CPU_CLR_EXMON_REQ", 0x47108, 0 },
	{ "ARM_CPU_CLR_EXMON_ACK", 0x4710c, 0 },
	{ "ARM_UART_MSTR_RXD", 0x47110, 0 },
	{ "ARM_UART_MSTR_RXC", 0x47114, 0 },
	{ "ARM_UART_MSTR_TXD", 0x47118, 0 },
	{ "ARM_UART_MSTR_TXC", 0x4711c, 0 },
		{ "Int", 1, 1 },
		{ "uart_mstc_txc", 0, 1 },
	{ "ARM_UART_SLV_SEL", 0x47120, 0 },
	{ "ARM_UART_CONFIG", 0x47130, 0 },
		{ "StopBits", 25, 2 },
		{ "Parity", 23, 2 },
		{ "DataBits", 19, 4 },
		{ "ClkDiv", 0, 18 },
	{ "ARM_UART_STAT", 0x47134, 0 },
		{ "Rsv1", 6, 26 },
		{ "RxFrmErr", 5, 1 },
		{ "RxParErr", 4, 1 },
		{ "RxOvrn", 3, 1 },
		{ "CTL_RxRdy", 2, 1 },
		{ "TxOvrn", 1, 1 },
		{ "CTL_TxRdy", 0, 1 },
	{ "ARM_UART_TX_DATA", 0x47138, 0 },
	{ "ARM_UART_RX_DATA", 0x4713c, 0 },
	{ "ARM_UART_DBG0", 0x47140, 0 },
	{ "ARM_UART_DBG1", 0x47144, 0 },
	{ "ARM_UART_DBG2", 0x47148, 0 },
	{ "ARM_UART_DBG3", 0x4714c, 0 },
	{ "ARM_ARM_CPU_PC0", 0x47150, 0 },
	{ "ARM_ARM_CPU_PC1", 0x47154, 0 },
	{ "ARM_ARM_UART_INT_CAUSE", 0x47158, 0 },
		{ "rx_fifo_not_empty", 1, 1 },
		{ "tx_fifo_empty", 0, 1 },
	{ "ARM_ARM_UART_INT_EN", 0x4715c, 0 },
		{ "rx_fifo_int_not_empty", 1, 1 },
		{ "tx_fifo_int_empty", 0, 1 },
	{ "ARM_ARM_UART_GPIO_SEL", 0x47160, 0 },
		{ "pc_sel", 1, 3 },
		{ "uart_gpio_sel", 0, 1 },
	{ "ARM_ARM_SCRATCH_PAD0", 0x47164, 0 },
	{ "ARM_ARM_SCRATCH_PAD1", 0x47168, 0 },
	{ "ARM_ARM_SCRATCH_PAD2", 0x4716c, 0 },
	{ "ARM_DEBUG_INDEX", 0x47450, 0 },
	{ "ARM_DEBUG_DATA_HIGH", 0x47454, 0 },
	{ "ARM_DEBUG_DATA_LOW", 0x47458, 0 },
	{ "ARM_PERR_INT_CAUSE0", 0x47170, 0 },
		{ "inic_WrData_Fifo_perr", 31, 1 },
		{ "inic_rData_Fifo_perr", 30, 1 },
		{ "msi_mem_perr", 29, 1 },
		{ "arm_db_sram_perr", 27, 2 },
		{ "emmc_FifoParInt", 26, 1 },
		{ "icb_ram_perr", 25, 1 },
		{ "mess2axi4_wrfifo_perr", 24, 1 },
		{ "rc_wFifo_outperr", 23, 1 },
		{ "rc_sram_perr", 21, 2 },
		{ "msi_fifo_par_err", 20, 1 },
		{ "inic2ma_IntfPerr", 19, 1 },
		{ "rdataFifo0_perr", 18, 1 },
		{ "rdataFifo1_perr", 17, 1 },
		{ "WrDataFifo0_perr", 16, 1 },
		{ "WrDataFifo1_perr", 15, 1 },
		{ "wr512dataFifo0_perr", 14, 1 },
		{ "wr512dataFifo1_perr", 13, 1 },
		{ "robuff_parerr3", 12, 1 },
		{ "robuff_parerr2", 11, 1 },
		{ "robuff_parerr1", 10, 1 },
		{ "robuff_parerr0", 9, 1 },
		{ "ma2axi_ReqDataParErr", 8, 1 },
		{ "ma2axi_ReqCtlParErr", 7, 1 },
		{ "ma_RspPerr", 6, 1 },
		{ "pcie2ma_reqCtlParErr", 5, 1 },
		{ "pcie2ma_reqDataParErr", 4, 1 },
		{ "inic2ma_reqCtlParErr", 3, 1 },
		{ "inic2ma_reqDataParErr", 2, 1 },
		{ "ma_RspUE", 1, 1 },
		{ "apb2pl_RspDataPerr", 0, 1 },
	{ "ARM_PERR_INT_ENB0", 0x47174, 0 },
		{ "inic_WrData_Fifo_perr", 31, 1 },
		{ "inic_rData_Fifo_perr", 30, 1 },
		{ "msi_mem_perr", 29, 1 },
		{ "arm_db_sram_perr", 27, 2 },
		{ "emmc_FifoParInt", 26, 1 },
		{ "icb_ram_perr", 25, 1 },
		{ "mess2axi4_wrfifo_perr", 24, 1 },
		{ "rc_wFifo_outperr", 23, 1 },
		{ "rc_sram_perr", 21, 2 },
		{ "msi_fifo_par_err", 20, 1 },
		{ "inic2ma_IntfPerr", 19, 1 },
		{ "rdataFifo0_perr", 18, 1 },
		{ "rdataFifo1_perr", 17, 1 },
		{ "WrDataFifo0_perr", 16, 1 },
		{ "WrDataFifo1_perr", 15, 1 },
		{ "wr512dataFifo0_perr", 14, 1 },
		{ "wr512dataFifo1_perr", 13, 1 },
		{ "robuff_parerr3", 12, 1 },
		{ "robuff_parerr2", 11, 1 },
		{ "robuff_parerr1", 10, 1 },
		{ "robuff_parerr0", 9, 1 },
		{ "ma2axi_ReqDataParErr", 8, 1 },
		{ "ma2axi_ReqCtlParErr", 7, 1 },
		{ "ma_RspPerr", 6, 1 },
		{ "pcie2ma_reqCtlParErr", 5, 1 },
		{ "pcie2ma_reqDataParErr", 4, 1 },
		{ "inic2ma_reqCtlParErr", 3, 1 },
		{ "inic2ma_reqDataParErr", 2, 1 },
		{ "ma_RspUE", 1, 1 },
		{ "apb2pl_RspDataPerr", 0, 1 },
	{ "ARM_PERR_ENABLE0", 0x4720c, 0 },
		{ "inic_WrData_Fifo_perr", 31, 1 },
		{ "inic_rData_Fifo_perr", 30, 1 },
		{ "msi_mem_perr", 29, 1 },
		{ "arm_db_sram_perr", 27, 2 },
		{ "emmc_FifoParInt", 26, 1 },
		{ "icb_ram_perr", 25, 1 },
		{ "mess2axi4_wrfifo_perr", 24, 1 },
		{ "rc_wFifo_outperr", 23, 1 },
		{ "rc_sram_perr", 21, 2 },
		{ "msi_fifo_par_err", 20, 1 },
		{ "inic2ma_IntfPerr", 19, 1 },
		{ "rdataFifo0_perr", 18, 1 },
		{ "rdataFifo1_perr", 17, 1 },
		{ "WrDataFifo0_perr", 16, 1 },
		{ "WrDataFifo1_perr", 15, 1 },
		{ "wr512dataFifo0_perr", 14, 1 },
		{ "wr512dataFifo1_perr", 13, 1 },
		{ "robuff_parerr3", 12, 1 },
		{ "robuff_parerr2", 11, 1 },
		{ "robuff_parerr1", 10, 1 },
		{ "robuff_parerr0", 9, 1 },
		{ "ma2axi_ReqDataParErr", 8, 1 },
		{ "ma2axi_ReqCtlParErr", 7, 1 },
		{ "ma_RspPerr", 6, 1 },
		{ "pcie2ma_reqCtlParErr", 5, 1 },
		{ "pcie2ma_reqDataParErr", 4, 1 },
		{ "inic2ma_reqCtlParErr", 3, 1 },
		{ "inic2ma_reqDataParErr", 2, 1 },
		{ "ma_RspUE", 1, 1 },
		{ "apb2pl_RspDataPerr", 0, 1 },
	{ "ARM_PERR_INT_CAUSE1", 0x47430, 0 },
		{ "arwfifo0_perr", 31, 1 },
		{ "arwfifo1_perr", 30, 1 },
		{ "arwidfifo0_perr", 29, 1 },
		{ "arwidfifo1_perr", 28, 1 },
		{ "aridfifo0_perr", 27, 1 },
		{ "aridfifo1_perr", 26, 1 },
		{ "rrspaddr_fifo0_perr", 25, 1 },
		{ "rrspaddr_fifo1_perr", 24, 1 },
		{ "wrstrb_fifo0_perr", 23, 1 },
		{ "wrstrb_fifo1_perr", 22, 1 },
		{ "ma2axi_rspDataParErr", 21, 1 },
		{ "ma2axi_data_par_err", 20, 1 },
		{ "ma2axi_wr_ord_fifo_parerr", 19, 1 },
		{ "nvme_db_emu_tracker_fifo_perr", 18, 1 },
		{ "nvme_db_emu_queue_aw_addr_fifo_perr", 17, 1 },
		{ "nvme_db_emu_interrupt_offset_fifo_perr", 16, 1 },
		{ "nvme_db_emu_Id_fifo0_perr", 15, 1 },
		{ "nvme_db_emu_Id_fifo1_perr", 14, 1 },
		{ "rc_arwFifo_perr", 13, 1 },
		{ "rc_aridburstaddrFifo_perr", 12, 1 },
		{ "rc_cfg_fifo_perr", 11, 1 },
		{ "rc_rspFifo_perr", 10, 1 },
		{ "inic_arIDFifo_perr", 9, 1 },
		{ "inic_arwFifo_perr", 8, 1 },
		{ "axi2ma_128_rd_addr_size_fifo_perr", 7, 1 },
		{ "axi2rc_128_rd_addr_size_fifo_perr", 6, 1 },
		{ "arm_ma_512b_rd_addr_size_fifo0_perr", 5, 1 },
		{ "arm_ma_512b_rd_addr_size_fifo1_perr", 4, 1 },
		{ "arm_ma_512b_arb_fifo_perr", 3, 1 },
		{ "pcie_inic_ma_arb_fifo_perr", 2, 1 },
		{ "pcie_inic_arb_rspPerr", 1, 1 },
		{ "ite_cache_perr", 0, 1 },
	{ "ARM_PERR_INT_ENB1", 0x47434, 0 },
		{ "arwfifo0_perr", 31, 1 },
		{ "arwfifo1_perr", 30, 1 },
		{ "arwidfifo0_perr", 29, 1 },
		{ "arwidfifo1_perr", 28, 1 },
		{ "aridfifo0_perr", 27, 1 },
		{ "aridfifo1_perr", 26, 1 },
		{ "rrspaddr_fifo0_perr", 25, 1 },
		{ "rrspaddr_fifo1_perr", 24, 1 },
		{ "wrstrb_fifo0_perr", 23, 1 },
		{ "wrstrb_fifo1_perr", 22, 1 },
		{ "ma2axi_rspDataParErr", 21, 1 },
		{ "ma2axi_data_par_err", 20, 1 },
		{ "ma2axi_wr_ord_fifo_parerr", 19, 1 },
		{ "nvme_db_emu_tracker_fifo_perr", 18, 1 },
		{ "nvme_db_emu_queue_aw_addr_fifo_perr", 17, 1 },
		{ "nvme_db_emu_interrupt_offset_fifo_perr", 16, 1 },
		{ "nvme_db_emu_Id_fifo0_perr", 15, 1 },
		{ "nvme_db_emu_Id_fifo1_perr", 14, 1 },
		{ "rc_arwFifo_perr", 13, 1 },
		{ "rc_aridburstaddrFifo_perr", 12, 1 },
		{ "rc_cfg_fifo_perr", 11, 1 },
		{ "rc_rspFifo_perr", 10, 1 },
		{ "inic_arIDFifo_perr", 9, 1 },
		{ "inic_arwFifo_perr", 8, 1 },
		{ "axi2ma_128_rd_addr_size_fifo_perr", 7, 1 },
		{ "axi2rc_128_rd_addr_size_fifo_perr", 6, 1 },
		{ "arm_ma_512b_rd_addr_size_fifo0_perr", 5, 1 },
		{ "arm_ma_512b_rd_addr_size_fifo1_perr", 4, 1 },
		{ "arm_ma_512b_arb_fifo_perr", 3, 1 },
		{ "pcie_inic_ma_arb_fifo_perr", 2, 1 },
		{ "pcie_inic_arb_rspPerr", 1, 1 },
		{ "ite_cache_perr", 0, 1 },
	{ "ARM_PERR_ENABLE1", 0x47438, 0 },
		{ "arwfifo0_perr", 31, 1 },
		{ "arwfifo1_perr", 30, 1 },
		{ "arwidfifo0_perr", 29, 1 },
		{ "arwidfifo1_perr", 28, 1 },
		{ "aridfifo0_perr", 27, 1 },
		{ "aridfifo1_perr", 26, 1 },
		{ "rrspaddr_fifo0_perr", 25, 1 },
		{ "rrspaddr_fifo1_perr", 24, 1 },
		{ "wrstrb_fifo0_perr", 23, 1 },
		{ "wrstrb_fifo1_perr", 22, 1 },
		{ "ma2axi_rspDataParErr", 21, 1 },
		{ "ma2axi_data_par_err", 20, 1 },
		{ "ma2axi_wr_ord_fifo_parerr", 19, 1 },
		{ "nvme_db_emu_tracker_fifo_perr", 18, 1 },
		{ "nvme_db_emu_queue_aw_addr_fifo_perr", 17, 1 },
		{ "nvme_db_emu_interrupt_offset_fifo_perr", 16, 1 },
		{ "nvme_db_emu_Id_fifo0_perr", 15, 1 },
		{ "nvme_db_emu_Id_fifo1_perr", 14, 1 },
		{ "rc_arwFifo_perr", 13, 1 },
		{ "rc_aridburstaddrFifo_perr", 12, 1 },
		{ "rc_cfg_fifo_perr", 11, 1 },
		{ "rc_rspFifo_perr", 10, 1 },
		{ "inic_arIDFifo_perr", 9, 1 },
		{ "inic_arwFifo_perr", 8, 1 },
		{ "axi2ma_128_rd_addr_size_fifo_perr", 7, 1 },
		{ "axi2rc_128_rd_addr_size_fifo_perr", 6, 1 },
		{ "arm_ma_512b_rd_addr_size_fifo0_perr", 5, 1 },
		{ "arm_ma_512b_rd_addr_size_fifo1_perr", 4, 1 },
		{ "arm_ma_512b_arb_fifo_perr", 3, 1 },
		{ "pcie_inic_ma_arb_fifo_perr", 2, 1 },
		{ "pcie_inic_arb_rspPerr", 1, 1 },
		{ "ite_cache_perr", 0, 1 },
	{ "ARM_PERR_INT_CAUSE2", 0x4717c, 0 },
		{ "inic_wstrb_fifo_perr", 31, 1 },
		{ "inic_bId_fifo_perr", 30, 1 },
		{ "cc_sram_pka_perr", 29, 1 },
		{ "cc_sram_sec_perr", 28, 1 },
		{ "mess2axi4_ParErr", 27, 1 },
		{ "cci2inic_intf_ParErr", 26, 1 },
	{ "ARM_PERR_INT_ENB2", 0x47128, 0 },
		{ "inic_wstrb_fifo_perr", 31, 1 },
		{ "inic_bId_fifo_perr", 30, 1 },
		{ "cc_sram_pka_perr", 29, 1 },
		{ "cc_sram_sec_perr", 28, 1 },
		{ "mess2axi4_ParErr", 27, 1 },
		{ "cci2inic_intf_ParErr", 26, 1 },
	{ "ARM_PERR_ENABLE2", 0x4712c, 0 },
		{ "inic_wstrb_fifo_perr", 31, 1 },
		{ "inic_bId_fifo_perr", 30, 1 },
		{ "cc_sram_pka_perr", 29, 1 },
		{ "cc_sram_sec_perr", 28, 1 },
		{ "mess2axi4_ParErr", 27, 1 },
		{ "cci2inic_intf_ParErr", 26, 1 },
	{ "ARM_CERR_INT_CAUSE0", 0x471dc, 0 },
		{ "WrData_Fifo0_cerr", 31, 1 },
		{ "WrData_Fifo1_cerr", 30, 1 },
		{ "wr512dataFifo0_cerr", 29, 1 },
		{ "wr512dataFifo1_cerr", 28, 1 },
		{ "rdataFifo0_cerr", 27, 1 },
		{ "rdataFifo1_cerr", 26, 1 },
		{ "robuff_corerr0", 25, 1 },
		{ "robuff_corerr1", 24, 1 },
		{ "robuff_corerr2", 23, 1 },
		{ "robuff_corerr3", 22, 1 },
		{ "ma2axi_rspDataCorErr", 21, 1 },
		{ "rc_sram_cerr", 19, 2 },
		{ "rc_wFifo_outcerr", 18, 1 },
		{ "rc_rspFifo_cerr", 17, 1 },
		{ "msi_mem_cerr", 16, 1 },
		{ "inic_WrData_Fifo_cerr", 15, 1 },
		{ "inic_rdataFifo_cerr", 14, 1 },
		{ "arm_db_sram_cerr", 12, 2 },
		{ "icb_ram_cerr", 11, 1 },
		{ "cc_sram_pka_cerr", 10, 1 },
		{ "cc_sram_sec_cerr", 9, 1 },
	{ "ARM_CERR_INT_ENB0", 0x471e8, 0 },
		{ "WrData_Fifo0_cerr", 31, 1 },
		{ "WrData_Fifo1_cerr", 30, 1 },
		{ "wr512dataFifo0_cerr", 29, 1 },
		{ "wr512dataFifo1_cerr", 28, 1 },
		{ "rdataFifo0_cerr", 27, 1 },
		{ "rdataFifo1_cerr", 26, 1 },
		{ "robuff_corerr0", 25, 1 },
		{ "robuff_corerr1", 24, 1 },
		{ "robuff_corerr2", 23, 1 },
		{ "robuff_corerr3", 22, 1 },
		{ "ma2axi_rspDataCorErr", 21, 1 },
		{ "rc_sram_cerr", 19, 2 },
		{ "rc_wFifo_outcerr", 18, 1 },
		{ "rc_rspFifo_cerr", 17, 1 },
		{ "msi_mem_cerr", 16, 1 },
		{ "inic_WrData_Fifo_cerr", 15, 1 },
		{ "inic_rdataFifo_cerr", 14, 1 },
		{ "arm_db_sram_cerr", 12, 2 },
		{ "icb_ram_cerr", 11, 1 },
		{ "cc_sram_pka_cerr", 10, 1 },
		{ "cc_sram_sec_cerr", 9, 1 },
	{ "ARM_ERR_INT_CAUSE0", 0x47444, 0 },
		{ "strb0_error", 31, 1 },
		{ "strb1_error", 30, 1 },
		{ "pcie_inic_ma_arb_inv_rsp_tag", 29, 1 },
		{ "error0_nocmd_data", 28, 1 },
		{ "error1_nocmd_data", 27, 1 },
		{ "inic_strb_error", 26, 1 },
	{ "ARM_ERR_INT_ENB0", 0x47448, 0 },
		{ "strb0_error", 31, 1 },
		{ "strb1_error", 30, 1 },
		{ "pcie_inic_ma_arb_inv_rsp_tag", 29, 1 },
		{ "error0_nocmd_data", 28, 1 },
		{ "error1_nocmd_data", 27, 1 },
		{ "inic_strb_error", 26, 1 },
	{ "ARM_PERIPHERAL_INT_CAUSE", 0x4718c, 0 },
		{ "TIMER_INT", 5, 1 },
		{ "NVME_INT", 4, 1 },
		{ "EMMC_WAKEUP_INT", 3, 1 },
		{ "EMMC_INT", 2, 1 },
		{ "USB_MC_INT", 1, 1 },
		{ "USB_DMA_INT", 0, 1 },
	{ "ARM_PERIPHERAL_INT_ENB", 0x471e4, 0 },
		{ "TIMER_INT", 5, 1 },
		{ "NVME_INT", 4, 1 },
		{ "EMMC_WAKEUP_INT", 3, 1 },
		{ "EMMC_INT", 2, 1 },
		{ "USB_MC_INT", 1, 1 },
		{ "USB_DMA_INT", 0, 1 },
	{ "ARM_SCRATCH_PAD3", 0x47178, 0 },
		{ "ECO_43187", 31, 1 },
		{ "TIMER_SEL", 28, 3 },
		{ "TIMER", 4, 24 },
		{ "INT", 0, 2 },
	{ "ARM_MA2AXI_AW_ATTR", 0x47180, 0 },
		{ "awLockR1", 29, 1 },
		{ "awCacheR1", 25, 4 },
		{ "awProtR1", 21, 4 },
		{ "awSnoopR1", 18, 3 },
		{ "awDomainR1", 16, 2 },
		{ "awLockR0", 13, 1 },
		{ "awCacheR0", 9, 4 },
		{ "awProtR0", 5, 4 },
		{ "awSnoopR0", 2, 3 },
		{ "awDomainR0", 0, 2 },
	{ "ARM_MA2AXI_AR_ATTR", 0x47184, 0 },
		{ "arLockR1", 29, 1 },
		{ "arCacheR1", 25, 4 },
		{ "arProtR1", 21, 4 },
		{ "arSnoopR1", 18, 3 },
		{ "arDomainR1", 16, 2 },
		{ "arLockR0", 13, 1 },
		{ "arCacheR0", 9, 4 },
		{ "arProtR0", 5, 4 },
		{ "arSnoopR0", 2, 3 },
		{ "arDomainR0", 0, 2 },
	{ "ARM_MA2AXI_SNOOP_RGN", 0x47188, 0 },
		{ "snoop_end", 16, 16 },
		{ "snoop_start", 0, 16 },
	{ "ARM_SCRATCH_PAD4", 0x47190, 0 },
		{ "pad4", 15, 17 },
		{ "arm_db_cnt", 0, 15 },
	{ "ARM_SCRATCH_PAD5", 0x47194, 0 },
	{ "ARM_SCRATCH_PAD6", 0x47198, 0 },
	{ "ARM_SCRATCH_PAD7", 0x4719c, 0 },
	{ "ARM_CPU_DBG_ROM_ADDR0", 0x47200, 0 },
	{ "ARM_CPU_DBG_ROM_ADDR1", 0x47204, 0 },
	{ "ARM_CPU_DBG_ROM_ADDR_VALID", 0x47208, 0 },
	{ "ARM_CPU_DFT_CFG", 0x47220, 0 },
		{ "CpuMbistReq", 11, 1 },
		{ "CpuMbistRstn", 10, 1 },
		{ "CpuDftDftSe", 9, 1 },
		{ "CpuDftRstDisable", 8, 1 },
		{ "CpuDftRamDisable", 7, 1 },
		{ "CpuDftMcpDisable", 6, 1 },
		{ "CpuDftL2ClkDisable", 5, 1 },
		{ "CpuDftClkDisable3", 4, 1 },
		{ "CpuDftClkDisable2", 3, 1 },
		{ "CpuDftClkDisable1", 2, 1 },
		{ "CpuDftClkDisable0", 1, 1 },
		{ "CpuDftClkBypass", 0, 1 },
	{ "ARM_ADB_PWR_DWN_REQ_N", 0x47230, 0 },
	{ "ARM_CCI_CFG0", 0x47280, 0 },
		{ "CciBroadcastcachemaint", 28, 3 },
		{ "CciStripingGranule", 25, 3 },
		{ "CciPeriphbase", 0, 25 },
	{ "ARM_CCI_CFG1", 0x47284, 0 },
		{ "CciDftRstDisable", 18, 1 },
		{ "CciSpNiden", 17, 1 },
		{ "CciNiden", 16, 1 },
		{ "CciAcchannelN", 11, 5 },
		{ "CciQosOverride", 6, 5 },
		{ "CciBufferableOverride", 3, 3 },
		{ "CciBarrierTerminate", 0, 3 },
	{ "ARM_CCI_CFG2", 0x47288, 0 },
		{ "CciAddrmap15", 30, 2 },
		{ "CciAddrmap14", 28, 2 },
		{ "CciAddrmap13", 26, 2 },
		{ "CciAddrmap12", 24, 2 },
		{ "CciAddrmap11", 22, 2 },
		{ "CciAddrmap10", 20, 2 },
		{ "CciAddrmap9", 18, 2 },
		{ "CciAddrmap8", 16, 2 },
		{ "CciAddrmap7", 14, 2 },
		{ "CciAddrmap6", 12, 2 },
		{ "CciAddrmap5", 10, 2 },
		{ "CciAddrmap4", 8, 2 },
		{ "CciAddrmap3", 6, 2 },
		{ "CciAddrmap2", 4, 2 },
		{ "CciAddrmap1", 2, 2 },
		{ "CciAddrmap0", 0, 2 },
	{ "ARM_CCI_STATUS", 0x4728c, 0 },
		{ "CciCActive", 6, 1 },
		{ "CciCsysAck", 5, 1 },
		{ "CciNEvntCntOverflow", 0, 5 },
	{ "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x47290, 0 },
		{ "CciVWreadyvn3M", 20, 1 },
		{ "CciVAwreadyvn3M", 19, 1 },
		{ "CciVArreadyvn3M", 18, 1 },
		{ "CciVWreadyvn2M", 17, 1 },
		{ "CciVAwreadyvn2M", 16, 1 },
		{ "CciVArreadyvn2M", 15, 1 },
		{ "CciVWreadyvn1M", 14, 1 },
		{ "CciVAwreadyvn1M", 13, 1 },
		{ "CciVArreadyvn1M", 12, 1 },
		{ "CciVWreadyvn0M", 11, 1 },
		{ "CciVAwreadyvn0M", 10, 1 },
		{ "CciVArreadyvn0M", 9, 1 },
		{ "CciQvnPreallocwM", 5, 4 },
		{ "CciQvnPreallocrM", 1, 4 },
		{ "CciQvnenableM", 0, 1 },
	{ "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x47294, 0 },
		{ "CciVWValidN3M", 31, 1 },
		{ "CciVAwValidN3M", 30, 1 },
		{ "CciVAwQosN3M", 29, 1 },
		{ "CciVArValidN3M", 28, 1 },
		{ "CciVArQosN3M", 24, 4 },
		{ "CciVWValidN2M", 23, 1 },
		{ "CciVAwValidN2M", 22, 1 },
		{ "CciVAwQosN2M", 21, 1 },
		{ "CciVArValidN2M", 20, 1 },
		{ "CciVArQosN2M", 16, 4 },
		{ "CciVWValidN1M", 15, 1 },
		{ "CciVAwValidN1M", 14, 1 },
		{ "CciVAwQosN1M", 13, 1 },
		{ "CciVArValidN1M", 12, 1 },
		{ "CciVArQosN1M", 8, 4 },
		{ "CciVWValidN0M", 7, 1 },
		{ "CciVAwValidN0M", 6, 1 },
		{ "CciVAwQosN0M", 5, 1 },
		{ "CciVArValidN0M", 4, 1 },
		{ "CciVArQosN0M", 0, 4 },
	{ "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x47298, 0 },
		{ "CciVWreadyvn3M", 20, 1 },
		{ "CciVAwreadyvn3M", 19, 1 },
		{ "CciVArreadyvn3M", 18, 1 },
		{ "CciVWreadyvn2M", 17, 1 },
		{ "CciVAwreadyvn2M", 16, 1 },
		{ "CciVArreadyvn2M", 15, 1 },
		{ "CciVWreadyvn1M", 14, 1 },
		{ "CciVAwreadyvn1M", 13, 1 },
		{ "CciVArreadyvn1M", 12, 1 },
		{ "CciVWreadyvn0M", 11, 1 },
		{ "CciVAwreadyvn0M", 10, 1 },
		{ "CciVArreadyvn0M", 9, 1 },
		{ "CciQvnPreallocwM", 5, 4 },
		{ "CciQvnPreallocrM", 1, 4 },
		{ "CciQvnenableM", 0, 1 },
	{ "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x4729c, 0 },
		{ "CciVWValidN3M", 31, 1 },
		{ "CciVAwValidN3M", 30, 1 },
		{ "CciVAwQosN3M", 29, 1 },
		{ "CciVArValidN3M", 28, 1 },
		{ "CciVArQosN3M", 24, 4 },
		{ "CciVWValidN2M", 23, 1 },
		{ "CciVAwValidN2M", 22, 1 },
		{ "CciVAwQosN2M", 21, 1 },
		{ "CciVArValidN2M", 20, 1 },
		{ "CciVArQosN2M", 16, 4 },
		{ "CciVWValidN1M", 15, 1 },
		{ "CciVAwValidN1M", 14, 1 },
		{ "CciVAwQosN1M", 13, 1 },
		{ "CciVArValidN1M", 12, 1 },
		{ "CciVArQosN1M", 8, 4 },
		{ "CciVWValidN0M", 7, 1 },
		{ "CciVAwValidN0M", 6, 1 },
		{ "CciVAwQosN0M", 5, 1 },
		{ "CciVArValidN0M", 4, 1 },
		{ "CciVArQosN0M", 0, 4 },
	{ "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x472a0, 0 },
		{ "CciVWreadyvn3M", 20, 1 },
		{ "CciVAwreadyvn3M", 19, 1 },
		{ "CciVArreadyvn3M", 18, 1 },
		{ "CciVWreadyvn2M", 17, 1 },
		{ "CciVAwreadyvn2M", 16, 1 },
		{ "CciVArreadyvn2M", 15, 1 },
		{ "CciVWreadyvn1M", 14, 1 },
		{ "CciVAwreadyvn1M", 13, 1 },
		{ "CciVArreadyvn1M", 12, 1 },
		{ "CciVWreadyvn0M", 11, 1 },
		{ "CciVAwreadyvn0M", 10, 1 },
		{ "CciVArreadyvn0M", 9, 1 },
		{ "CciQvnPreallocwM", 5, 4 },
		{ "CciQvnPreallocrM", 1, 4 },
		{ "CciQvnenableM", 0, 1 },
	{ "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x472a4, 0 },
		{ "CciVWValidN3M", 31, 1 },
		{ "CciVAwValidN3M", 30, 1 },
		{ "CciVAwQosN3M", 29, 1 },
		{ "CciVArValidN3M", 28, 1 },
		{ "CciVArQosN3M", 24, 4 },
		{ "CciVWValidN2M", 23, 1 },
		{ "CciVAwValidN2M", 22, 1 },
		{ "CciVAwQosN2M", 21, 1 },
		{ "CciVArValidN2M", 20, 1 },
		{ "CciVArQosN2M", 16, 4 },
		{ "CciVWValidN1M", 15, 1 },
		{ "CciVAwValidN1M", 14, 1 },
		{ "CciVAwQosN1M", 13, 1 },
		{ "CciVArValidN1M", 12, 1 },
		{ "CciVArQosN1M", 8, 4 },
		{ "CciVWValidN0M", 7, 1 },
		{ "CciVAwValidN0M", 6, 1 },
		{ "CciVAwQosN0M", 5, 1 },
		{ "CciVArValidN0M", 4, 1 },
		{ "CciVArQosN0M", 0, 4 },
	{ "ARM_CCIM_CCI_QVN_MASTER_CFG", 0x472a8, 0 },
		{ "CciVWreadyvn3M", 20, 1 },
		{ "CciVAwreadyvn3M", 19, 1 },
		{ "CciVArreadyvn3M", 18, 1 },
		{ "CciVWreadyvn2M", 17, 1 },
		{ "CciVAwreadyvn2M", 16, 1 },
		{ "CciVArreadyvn2M", 15, 1 },
		{ "CciVWreadyvn1M", 14, 1 },
		{ "CciVAwreadyvn1M", 13, 1 },
		{ "CciVArreadyvn1M", 12, 1 },
		{ "CciVWreadyvn0M", 11, 1 },
		{ "CciVAwreadyvn0M", 10, 1 },
		{ "CciVArreadyvn0M", 9, 1 },
		{ "CciQvnPreallocwM", 5, 4 },
		{ "CciQvnPreallocrM", 1, 4 },
		{ "CciQvnenableM", 0, 1 },
	{ "ARM_CCIM_CCI_QVN_MASTER_STATUS", 0x472ac, 0 },
		{ "CciVWValidN3M", 31, 1 },
		{ "CciVAwValidN3M", 30, 1 },
		{ "CciVAwQosN3M", 29, 1 },
		{ "CciVArValidN3M", 28, 1 },
		{ "CciVArQosN3M", 24, 4 },
		{ "CciVWValidN2M", 23, 1 },
		{ "CciVAwValidN2M", 22, 1 },
		{ "CciVAwQosN2M", 21, 1 },
		{ "CciVArValidN2M", 20, 1 },
		{ "CciVArQosN2M", 16, 4 },
		{ "CciVWValidN1M", 15, 1 },
		{ "CciVAwValidN1M", 14, 1 },
		{ "CciVAwQosN1M", 13, 1 },
		{ "CciVArValidN1M", 12, 1 },
		{ "CciVArQosN1M", 8, 4 },
		{ "CciVWValidN0M", 7, 1 },
		{ "CciVAwValidN0M", 6, 1 },
		{ "CciVAwQosN0M", 5, 1 },
		{ "CciVArValidN0M", 4, 1 },
		{ "CciVArQosN0M", 0, 4 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472d0, 0 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472d4, 0 },
		{ "CciEvntAwQos", 4, 4 },
		{ "CciEvntArQos", 0, 4 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472d8, 0 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472dc, 0 },
		{ "CciEvntAwQos", 4, 4 },
		{ "CciEvntArQos", 0, 4 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472e0, 0 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472e4, 0 },
		{ "CciEvntAwQos", 4, 4 },
		{ "CciEvntArQos", 0, 4 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472e8, 0 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472ec, 0 },
		{ "CciEvntAwQos", 4, 4 },
		{ "CciEvntArQos", 0, 4 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_CFG", 0x472f0, 0 },
	{ "ARM_CCIS_CCI_QVN_SLAVE_STATUS", 0x472f4, 0 },
		{ "CciEvntAwQos", 4, 4 },
		{ "CciEvntArQos", 0, 4 },
	{ "ARM_CCI_EVNTBUS", 0x47300, 0 },
	{ "ARM_CCI_EVNTBUS", 0x47304, 0 },
	{ "ARM_CCI_EVNTBUS", 0x47308, 0 },
	{ "ARM_CCI_EVNTBUS", 0x4730c, 0 },
	{ "ARM_CCI_EVNTBUS", 0x47310, 0 },
	{ "ARM_CCI_RST_N", 0x47318, 0 },
	{ "ARM_CCI_CSYREQ", 0x4731c, 0 },
	{ "ARM_CCI_TR_DEBUGS0", 0x47320, 0 },
		{ "CciS0RCnt", 24, 8 },
		{ "CciS0ArCnt", 16, 8 },
		{ "CciS0WCnt", 8, 8 },
		{ "CciS0AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGS1", 0x47324, 0 },
		{ "CciS1RCnt", 24, 8 },
		{ "CciS1ArCnt", 16, 8 },
		{ "CciS1WCnt", 8, 8 },
		{ "CciS1AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGS2", 0x47328, 0 },
		{ "CciS2RCnt", 24, 8 },
		{ "CciS2ArCnt", 16, 8 },
		{ "CciS2WCnt", 8, 8 },
		{ "CciS2AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGS3", 0x4732c, 0 },
		{ "CciS3RCnt", 24, 8 },
		{ "CciS3ArCnt", 16, 8 },
		{ "CciS3WCnt", 8, 8 },
		{ "CciS3AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGS4", 0x47330, 0 },
		{ "CciS4RCnt", 24, 8 },
		{ "CciS4ArCnt", 16, 8 },
		{ "CciS4WCnt", 8, 8 },
		{ "CciS4AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGS34", 0x47334, 0 },
		{ "CciS4RspCnt", 24, 8 },
		{ "CciS4AcCnt", 16, 8 },
		{ "CciS3RspCnt", 8, 8 },
		{ "CciS3AcCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGM0", 0x47338, 0 },
		{ "CciM0RCnt", 24, 8 },
		{ "CciM0ArCnt", 16, 8 },
		{ "CciM0WCnt", 8, 8 },
		{ "CciM0AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGM1", 0x4733c, 0 },
		{ "CciM1RCnt", 24, 8 },
		{ "CciM1ArCnt", 16, 8 },
		{ "CciM1WCnt", 8, 8 },
		{ "CciM1AwCnt", 0, 8 },
	{ "ARM_CCI_TR_DEBUGM2", 0x47340, 0 },
		{ "CciM2RCnt", 24, 8 },
		{ "CciM2ArCnt", 16, 8 },
		{ "CciM2WCnt", 8, 8 },
		{ "CciM2AwCnt", 0, 8 },
	{ "ARM_MA_TR_DEBUG", 0x47344, 0 },
		{ "ma1_rd_cnt", 24, 8 },
		{ "ma1_wr_cnt", 16, 8 },
		{ "ma0_rd_cnt", 8, 8 },
		{ "ma0_wr_cnt", 0, 8 },
	{ "ARM_GP_INT", 0x47348, 0 },
	{ "ARM_DMA_CFG0", 0x47350, 0 },
	{ "ARM_DMA_CFG1", 0x47354, 0 },
		{ "DmaBootPeriphNs", 16, 10 },
		{ "DmaBootIrqNs", 4, 10 },
		{ "DmaBootManagerNs", 1, 1 },
		{ "DmaBootFromPc", 0, 1 },
	{ "ARM_ARM_CFG0", 0x47380, 0 },
		{ "MessageBypass_data", 2, 1 },
		{ "MessageBypass", 1, 1 },
		{ "PcieBypass", 0, 1 },
	{ "ARM_ARM_CFG1", 0x47384, 0 },
	{ "ARM_ARM_CFG1", 0x47388, 0 },
	{ "ARM_ARM_CFG2", 0x47390, 0 },
	{ "ARM_ARM_CFG2", 0x47394, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION0", 0x47400, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION1", 0x47404, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION2", 0x47408, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION3", 0x4740c, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION4", 0x47410, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION5", 0x47414, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION6", 0x47418, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION7", 0x4741c, 0 },
	{ "ARM_PCIE_MA_ADDR_REGION_DST", 0x47440, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47500, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47504, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47508, 0 },
		{ "WaterMark", 16, 10 },
		{ "SizeMax", 0, 10 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4750c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x47510, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x47514, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x47518, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x4751c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47530, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47534, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47538, 0 },
		{ "WaterMark", 16, 10 },
		{ "SizeMax", 0, 10 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4753c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x47540, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x47544, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x47548, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x4754c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47560, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47564, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47568, 0 },
		{ "WaterMark", 16, 10 },
		{ "SizeMax", 0, 10 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4756c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x47570, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x47574, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x47578, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x4757c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA0", 0x47590, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_BA1", 0x47594, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG0", 0x47598, 0 },
		{ "WaterMark", 16, 10 },
		{ "SizeMax", 0, 10 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG1", 0x4759c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG2", 0x475a0, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG3", 0x475a4, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x475a8, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG4", 0x475ac, 0 },
	{ "ARM_APB2MSI_INTERRUPT_0_STATUS", 0x47600, 0 },
	{ "ARM_APB2MSI_INTERRUPT_1_STATUS", 0x47604, 0 },
	{ "ARM_APB2MSI_INTERRUPT_2_STATUS", 0x47608, 0 },
	{ "ARM_APB2MSI_INTERRUPT_3_STATUS", 0x4760c, 0 },
	{ "ARM_APB2MSI_INTERRUPT_0_ENABLE", 0x47610, 0 },
	{ "ARM_APB2MSI_INTERRUPT_1_ENABLE", 0x47614, 0 },
	{ "ARM_APB2MSI_INTERRUPT_2_ENABLE", 0x47618, 0 },
	{ "ARM_APB2MSI_INTERRUPT_3_ENABLE", 0x4761c, 0 },
	{ "ARM_APB2MSI_INTERRUPT_PRIORITY_LEVEL", 0x47620, 0 },
	{ "ARM_APB2MSI_MEM_READ_ADDR", 0x47624, 0 },
	{ "ARM_MSI_MEMORY_DATA", 0x47628, 0 },
	{ "ARM_MSI_MEMORY_ADDR", 0x4762c, 0 },
	{ "ARM_MSG_PCIE_MESSAGE2AXI_CFG5", 0x47630, 0 },
	{ "ARM_AXI2MA_TIMERCNT", 0x47640, 0 },
	{ "ARM_AXI2MA_TRTYPE", 0x47644, 0 },
		{ "ArmMa2Axi1ArTrType", 3, 1 },
		{ "ArmMa2Axi1AwTrType", 2, 1 },
		{ "ArmMa2Axi0ArTrType", 1, 1 },
		{ "ArmMa2Axi0AwTrType", 0, 1 },
	{ "ARM_AXI2PCIE_VENDOR", 0x47660, 0 },
		{ "VendorID", 4, 16 },
		{ "OBFFcode", 0, 4 },
	{ "ARM_AXI2PCIE_VENMSGHDR_DW3", 0x47664, 0 },
	{ "ARM_CLUSTER_SEL", 0x47668, 0 },
	{ "ARM_PWRREQ_PERMIT_ADB", 0x4766c, 0 },
		{ "pwrq_permit_deny_sar", 1, 1 },
		{ "pwrqreqns_adb", 0, 1 },
	{ "ARM_CLK_REQ_ADB", 0x47670, 0 },
	{ "ARM_WAKEUPM", 0x47674, 0 },
		{ "dftrstdisablem_adb", 2, 1 },
		{ "dftrstdisables_adb", 1, 1 },
		{ "wakeupm_i_adb", 0, 1 },
	{ "ARM_CC_APB_FILTERING", 0x47678, 0 },
		{ "cc_dftscanmode", 11, 1 },
		{ "cc_otp_filtering_disable", 10, 1 },
		{ "cc_apb_filtering", 0, 10 },
	{ "ARM_DCU_EN0", 0x4767c, 0 },
	{ "ARM_DCU_EN1", 0x47680, 0 },
	{ "ARM_DCU_EN2", 0x47684, 0 },
	{ "ARM_DCU_EN3", 0x47688, 0 },
	{ "ARM_DCU_LOCK0", 0x4768c, 0 },
	{ "ARM_DCU_LOCK1", 0x47690, 0 },
	{ "ARM_DCU_LOCK2", 0x47694, 0 },
	{ "ARM_DCU_LOCK3", 0x47698, 0 },
	{ "ARM_GPPC", 0x4769c, 0 },
		{ "cc_sec_debug_reset", 24, 1 },
		{ "cc_dftse", 23, 1 },
		{ "cc_dftcgen", 22, 1 },
		{ "cc_dftramhold", 21, 1 },
		{ "cc_lock_bits", 12, 9 },
		{ "cc_lcs_is_valid", 11, 1 },
		{ "cc_lcs", 8, 3 },
		{ "cc_gppc", 0, 8 },
	{ "ARM_EMMC", 0x47700, 0 },
		{ "emmc_card_clk_en", 31, 1 },
		{ "emmc_led_control", 30, 1 },
		{ "emmc_uhs1_swvolt_en", 29, 1 },
		{ "emmc_uhs1_drv_sth", 27, 2 },
		{ "emmc_sd_vdd1_on", 26, 1 },
		{ "emmc_sd_vdd1_sel", 23, 3 },
		{ "emmc_intclk_en", 22, 1 },
		{ "emmc_card_clk_freq_sel", 12, 10 },
		{ "emmc_card_clk_gen_sel", 11, 1 },
		{ "emmc_clk2card_on", 10, 1 },
		{ "emmc_card_clk_stable", 9, 1 },
		{ "emmc_int_bclk_stable", 8, 1 },
		{ "emmc_int_aclk_stable", 7, 1 },
		{ "emmc_int_tmclk_stable", 6, 1 },
		{ "emmc_host_reg_vol_stable", 5, 1 },
		{ "emmc_card_detect_n", 4, 1 },
		{ "emmc_card_write_prot", 3, 1 },
		{ "emmc_gp_in", 2, 1 },
		{ "emmc_test_scan_mode", 1, 1 },
		{ "emmc_FifoInjDataErr", 0, 1 },
	{ "ARM_WAKEUPS", 0x47704, 0 },
	{ "ARM_CLKREQNM_ADB", 0x47708, 0 },
	{ "ARM_ATOMICDATA0_0", 0x4770c, 0 },
	{ "ARM_ATOMICDATA0_1", 0x477b0, 0 },
	{ "ARM_ATOMICDATA1_0", 0x47710, 0 },
	{ "ARM_ATOMICDATA1_1", 0x477b4, 0 },
	{ "ARM_TCAM_WRITE_DATA", 0x47744, 0 },
	{ "ARM_TCAM_WRITE_ADDR", 0x47748, 0 },
	{ "ARM_TCAM_READ_ADDR", 0x4774c, 0 },
	{ "ARM_TCAM_CTL", 0x47750, 0 },
		{ "TcamCbBusy", 6, 1 },
		{ "TcamCbPass", 5, 1 },
		{ "TcamCbStart", 4, 1 },
		{ "TcamRstCb", 3, 1 },
		{ "tcam_ReqBitPos", 2, 1 },
		{ "tcam_write", 1, 1 },
		{ "tcam_enable", 0, 1 },
	{ "ARM_TCAM_READ_DATA", 0x4775c, 0 },
	{ "ARM_SRAM1_WRITE_DATA", 0x47760, 0 },
	{ "ARM_SRAM1_WRITE_ADDR", 0x47764, 0 },
	{ "ARM_SRAM1_READ_ADDR", 0x47768, 0 },
	{ "ARM_SRAM1_CTL", 0x4776c, 0 },
		{ "sram1_write", 1, 1 },
		{ "sram1_enable", 0, 1 },
	{ "ARM_SRAM1_READ_DATA", 0x47770, 0 },
	{ "ARM_SRAM2_WRITE_DATA0", 0x47774, 0 },
	{ "ARM_SRAM2_WRITE_DATA1", 0x47778, 0 },
	{ "ARM_SRAM2_WRITE_DATA2", 0x4777c, 0 },
	{ "ARM_SRAM2_WRITE_DATA3", 0x47210, 0 },
	{ "ARM_SRAM2_WRITE_ADDR", 0x47780, 0 },
	{ "ARM_SRAM2_READ_ADDR", 0x47784, 0 },
	{ "ARM_SRAM2_CTL", 0x47788, 0 },
		{ "sram2_write", 1, 1 },
		{ "sram2_enable", 0, 1 },
	{ "ARM_SRAM2_READ_DATA0", 0x4778c, 0 },
	{ "ARM_SRAM2_READ_DATA1", 0x47790, 0 },
	{ "ARM_SRAM2_READ_DATA2", 0x47794, 0 },
	{ "ARM_SRAM2_READ_DATA3", 0x4721c, 0 },
	{ "ARM_DBPROC_SRAM_CTL", 0x47798, 0 },
	{ "ARM_DBPROC_SRAM_READ_ADDR", 0x4779c, 0 },
	{ "ARM_DBPROC_SRAM_READ_DATA0", 0x477a0, 0 },
	{ "ARM_DBPROC_SRAM_READ_DATA1", 0x477a4, 0 },
	{ "ARM_DBPROC_SRAM_READ_DATA2", 0x477a8, 0 },
	{ "ARM_DBPROC_SRAM_READ_DATA3", 0x477ac, 0 },
	{ "ARM_DBPROC_CONTROL", 0x4742c, 0 },
	{ "ARM_SPIDEN", 0x477b8, 0 },
	{ "ARM_RC_INT_WRITE_DATA", 0x477bc, 0 },
	{ "ARM_RC_INT_STATUS", 0x4705c, 0 },
	{ "ARM_DFT_MBI", 0x477c4, 0 },
		{ "mbistreq", 3, 1 },
		{ "mbistresetn", 2, 1 },
		{ "dftramhold", 1, 1 },
		{ "dftcgen", 0, 1 },
	{ "ARM_PLM_RID_CFG", 0x4703c, 0 },
	{ "ARM_PLM_EROM_CFG", 0x47040, 0 },
	{ "ARM_PL_ARM_HDR_CFG", 0x4704c, 0 },
	{ "ARM_MBISTACK", 0x477d4, 0 },
	{ "ARM_MBISTADDR", 0x477d8, 0 },
	{ "ARM_MBISTREADEN", 0x477dc, 0 },
	{ "ARM_MBISTWRITEEN", 0x477e0, 0 },
	{ "ARM_MBISTARRAY", 0x477e4, 0 },
	{ "ARM_MBISTCFG", 0x477e8, 0 },
	{ "ARM_MBISTINDATA0", 0x477ec, 0 },
	{ "ARM_MBISTINDATA1", 0x477f0, 0 },
	{ "ARM_MBISTOUTDATA1", 0x477f4, 0 },
	{ "ARM_MBISTOUTDATA0", 0x477f8, 0 },
	{ "ARM_PL_DMA_AW_OFFSET", 0x47018, 0 },
	{ "ARM_PL_DMA_AR_OFFSET", 0x4701c, 0 },
	{ "ARM_DMA_RST", 0x4702c, 0 },
	{ "ARM_APB_CFG", 0x47224, 0 },
	{ "ARM_EMMC_BUFS", 0x47228, 0 },
		{ "emmc_bufs_oen", 2, 2 },
		{ "emmc_bufs_i", 0, 2 },
	{ "ARM_SWP_EN", 0x4722c, 0 },
	{ "ARM_GIC_USER", 0x47238, 0 },
	{ "ARM_DBPROC_SRAM_TH_CTL", 0x477c8, 0 },
		{ "dbproc_th_wr_en", 1, 1 },
		{ "dbproc_th_rd_en", 0, 1 },
	{ "ARM_DBPROC_SRAM_TH_ADDR", 0x47240, 0 },
	{ "ARM_DBPROC_SRAM_TH_READ_DATA0", 0x47244, 0 },
	{ "ARM_DBPROC_SRAM_TH_READ_DATA1", 0x47248, 0 },
	{ "ARM_DBPROC_SRAM_TH_READ_DATA2", 0x4724c, 0 },
	{ "ARM_DBPROC_SRAM_TH_READ_DATA3", 0x47250, 0 },
	{ "ARM_DBPROC_SRAM_TH_WR_DATA0", 0x47254, 0 },
	{ "ARM_DBPROC_SRAM_TH_WR_DATA1", 0x47258, 0 },
	{ "ARM_DBPROC_SRAM_TH_WR_DATA2", 0x4725c, 0 },
	{ "ARM_DBPROC_SRAM_TH_WR_DATA3", 0x47260, 0 },
	{ "ARM_SWP_EN_2", 0x47264, 0 },
	{ "ARM_GIC_ERR", 0x47268, 0 },
		{ "ecc_fatal", 1, 1 },
		{ "axim_err", 0, 1 },
	{ "ARM_CPU_STAT", 0x4726c, 0 },
		{ "cpu_l2_qactive", 12, 1 },
		{ "wakeupm_o_adb", 11, 1 },
		{ "pwrqactivem_adb", 10, 1 },
		{ "clkqactivem_adb", 9, 1 },
		{ "clkqdenym_adb", 8, 1 },
		{ "clkqacceptnm_adb", 7, 1 },
		{ "wakeups_o_adb", 6, 1 },
		{ "pwrqactives_adb", 5, 1 },
		{ "clkqactives_adb", 4, 1 },
		{ "clkqdenys_adb", 3, 1 },
		{ "clkqacceptns_adb", 2, 1 },
		{ "pwrqdenys_adb", 1, 1 },
		{ "pwrqacceptns_adb", 0, 1 },
	{ "ARM_DEBUG_INT_WRITE_DATA", 0x47270, 0 },
	{ "ARM_DEBUG_INT_STAT", 0x47274, 0 },
	{ "ARM_DEBUG_STAT", 0x47278, 0 },
	{ "ARM_SIZE_STAT", 0x4727c, 0 },
	{ "ARM_CS_RST", 0x470c0, 0 },
		{ "atclken", 9, 1 },
		{ "cxapbicrstn", 8, 1 },
		{ "csdbgen", 7, 1 },
		{ "jtagnpotrst", 6, 1 },
		{ "jtagntrst", 5, 1 },
		{ "paddr31s0", 4, 1 },
		{ "cticlken", 3, 1 },
		{ "pclkendbg", 2, 1 },
		{ "cpu_niden", 1, 1 },
		{ "cpu_dbgen", 0, 1 },
	{ "ARM_CS_ADDRL", 0x470c4, 0 },
	{ "ARM_CS_ADDRH", 0x470c8, 0 },
	{ "ARM_CS_DFT_CONTROL", 0x470cc, 0 },
		{ "dftmbistaddr", 5, 11 },
		{ "dftmteston", 3, 1 },
		{ "dftmbistce", 2, 1 },
		{ "dftmbitwr", 1, 1 },
		{ "dftse", 0, 1 },
	{ "ARM_CS_DFT_IN", 0x470d0, 0 },
	{ "ARM_CS_DFT_OUT", 0x470d4, 0 },
	{ "ARM_EMMC_CTRL", 0x47088, 0 },
		{ "EMMC_DATA_P2", 24, 8 },
		{ "EMMC_DATA_P1", 16, 8 },
		{ "EMMC_CMD_P2", 15, 1 },
		{ "EMMC_CMD_P1", 14, 1 },
		{ "EMMC_RST_P2", 13, 1 },
		{ "EMMC_RST_P1", 12, 1 },
		{ "EMMC_GP_IN_P2", 10, 2 },
		{ "EMMC_GP_IN_P1", 8, 2 },
		{ "EMMC_CLK_SEL", 0, 8 },
	{ "ARM_INTERRUPT_GEN", 0x47420, 0 },
	{ "ARM_INTERRUPT_CLEAR", 0x47424, 0 },
	{ "ARM_DEBUG_STATUS_0", 0x47428, 0 },
	{ "ARM_DEBUG_STATUS_1", 0x4743c, 0 },
	{ "ARM_NVME_DB_EMU_EN", 0x477fc, 0 },
	{ "ARM_NVME_DB_EMU_INT_CAUSE", 0x4709c, 0 },
		{ "invalid_bresp", 3, 1 },
		{ "data_len_of", 2, 1 },
		{ "invalid_emu_addr", 1, 1 },
		{ "invalid_axi_addr_cfg", 0, 1 },
	{ "ARM_NVME_DB_EMU_INT_ENABLE", 0x47740, 0 },
		{ "invalid_bresp", 3, 1 },
		{ "data_len_of", 2, 1 },
		{ "invalid_emu_addr", 1, 1 },
		{ "invalid_axi_addr_cfg", 0, 1 },
	{ "ARM_NVME_DB_EMU_INDEX", 0x471a0, 0 },
	{ "ARM_NVME_DB_EMU_REGION_CTL", 0x471a4, 0 },
		{ "window_en", 4, 1 },
		{ "rgn2_int_en", 3, 1 },
		{ "rgn1_int_en", 2, 1 },
		{ "queue_en", 1, 1 },
		{ "rgn0_int_en", 0, 1 },
	{ "ARM_NVME_DB_EMU_DEVICE_CTL", 0x471a8, 0 },
		{ "device_size", 8, 4 },
		{ "rgn1_size", 4, 4 },
		{ "rgn0_size", 0, 4 },
	{ "ARM_NVME_DB_EMU_WINDOW_START_ADDR", 0x471b0, 0 },
	{ "ARM_NVME_DB_EMU_WINDOW_END_ADDR", 0x471b4, 0 },
	{ "ARM_NVME_DB_EMU_QBASE_ADDR", 0x471b8, 0 },
	{ "ARM_NVME_DB_EMU_QUEUE_CID", 0x471bc, 0 },
	{ "ARM_NVME_DB_EMU_QUEUE_CTL", 0x471c0, 0 },
		{ "int_en", 27, 1 },
		{ "threshold", 10, 17 },
		{ "size", 0, 10 },
	{ "ARM_NVME_DB_EMU_QUEUE_CTL_2", 0x471e0, 0 },
	{ "ARM_NVME_DB_EMU_MSIX_ADDR_L", 0x471c4, 0 },
	{ "ARM_NVME_DB_EMU_MSIX_ADDR_H", 0x471c8, 0 },
	{ "ARM_NVME_DB_EMU_MSIX_OFFSET", 0x471cc, 0 },
	{ "ARM_NVME_DB_EMU_QUEUE_MSIX_ADDR_L", 0x471d0, 0 },
	{ "ARM_NVME_DB_EMU_QUEUE_MSIX_ADDR_H", 0x471d4, 0 },
	{ "ARM_NVME_DB_EMU_QUEUE_MSIX_OFFSET", 0x471d8, 0 },
	{ NULL }
};

struct reg_info t7_mc_t70_regs[] = {
	{ "MC_IND_ADDR", 0x48000, 0 },
		{ "autoincr", 30, 2 },
		{ "addr", 0, 25 },
	{ "MC_IND_DATA", 0x48004, 0 },
	{ "MC_DBG_CTL", 0x48018, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG", 16, 1 },
		{ "SEL", 0, 8 },
	{ "MC_DBG_DATA", 0x4801c, 0 },
	{ "MC_P_DDRPHY_RST_CTRL", 0x49300, 0 },
		{ "PHY_CAL_REQ", 21, 1 },
		{ "PHY_DRAM_WL", 17, 4 },
		{ "PHY_CALIB_DONE", 5, 1 },
		{ "CTL_CAL_REQ", 4, 1 },
		{ "CTL_CKE", 3, 1 },
		{ "CTL_RST_N", 2, 1 },
		{ "DDRIO_ENABLE", 1, 1 },
		{ "PHY_RST_N", 0, 1 },
	{ "MC_P_PERFORMANCE_CTRL", 0x49304, 0 },
		{ "BUF_USE_TH", 12, 3 },
		{ "MC_IDLE_TH", 8, 4 },
		{ "RMW_DEFER_EN", 7, 1 },
		{ "DDR3_BRBC_MODE", 6, 1 },
		{ "RMW_DWRITE_EN", 5, 1 },
		{ "RMW_MERGE_EN", 4, 1 },
		{ "SYNC_PAB_EN", 3, 1 },
		{ "STALL_CHK_BIT", 2, 1 },
		{ "DDR3_BRC_MODE", 1, 1 },
		{ "RMW_PERF_CTRL", 0, 1 },
	{ "MC_P_ECC_CTRL", 0x49308, 0 },
		{ "BistECCHBWCtl", 7, 2 },
		{ "BistTestMode", 6, 1 },
		{ "rmw_ctl_cfg", 4, 2 },
		{ "ECC_BYPASS_BIST", 1, 1 },
		{ "ECC_DISABLE", 0, 1 },
	{ "MC_P_DDRCTL_INT_ENABLE", 0x4930c, 0 },
		{ "HIF_WDATA_PTR_ADDR_ERR_DCH1_ENABLE", 5, 1 },
		{ "HIF_RDATA_CRC_ERR_DCH1_ENABLE", 4, 1 },
		{ "HIF_RDATA_ADDR_ERR_DCH1_ENABLE", 3, 1 },
		{ "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_ENABLE", 2, 1 },
		{ "HIF_RDATA_CRC_ERR_INTR_DCH0_ENABLE", 1, 1 },
		{ "HIF_RDATA_ADDR_ERR_INTR_DCH0_ENABLE", 0, 1 },
	{ "MC_P_DDRCTL_INT_CAUSE", 0x49310, 0 },
		{ "WR_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 25, 1 },
		{ "WR_CRC_ERR_INTR_DCH1_CAUSE", 24, 1 },
		{ "CAPAR_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 23, 1 },
		{ "RD_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 22, 1 },
		{ "DERATE_TEMP_LIMIT_INTR_DCH1_CAUSE", 21, 1 },
		{ "SWCMD_ERR_INTR_DCH1_CAUSE", 20, 1 },
		{ "DUCMD_ERR_INTR_DCH1_CAUSE", 19, 1 },
		{ "LCCMD_ERR_INTR_DCH1_CAUSE", 18, 1 },
		{ "CTRLUPD_ERR_INTR_DCH1_CAUSE", 17, 1 },
		{ "RFM_ALERT_INTR_DCH1_CAUSE", 16, 1 },
		{ "WR_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 15, 1 },
		{ "WR_CRC_ERR_INTR_DCH0_CAUSE", 14, 1 },
		{ "CAPAR_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 13, 1 },
		{ "RD_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 12, 1 },
		{ "DERATE_TEMP_LIMIT_INTR_DCH0_CAUSE", 11, 1 },
		{ "SWCMD_ERR_INTR_DCH0_CAUSE", 10, 1 },
		{ "DUCMD_ERR_INTR_DCH0_CAUSE", 9, 1 },
		{ "LCCMD_ERR_INTR_DCH0_CAUSE", 8, 1 },
		{ "CTRLUPD_ERR_INTR_DCH0_CAUSE", 7, 1 },
		{ "RFM_ALERT_INTR_DCH0_CAUSE", 6, 1 },
		{ "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH1_CAUSE", 5, 1 },
		{ "HIF_RDATA_CRC_ERR_INTR_DCH1_CAUSE", 4, 1 },
		{ "HIF_RDATA_ADDR_ERR_INTR_DCH1_CAUSE", 3, 1 },
		{ "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_CAUSE", 2, 1 },
		{ "HIF_RDATA_CRC_ERR_INTR_DCH0_CAUSE", 1, 1 },
		{ "HIF_RDATA_ADDR_ERR_INTR_DCH0_CAUSE", 0, 1 },
	{ "MC_P_PAR_ENABLE", 0x49314, 0 },
		{ "HIF_WDATA_Q_PARERR_DCH1_ENABLE", 13, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH1_ENABLE", 12, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH0_ENABLE", 11, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH1_ENABLE", 10, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH0_ENABLE", 9, 1 },
		{ "WDATARAM_PARERR_DCH1_ENABLE", 8, 1 },
		{ "WDATARAM_PARERR_DCH0_ENABLE", 7, 1 },
		{ "BIST_ADDR_FIFO_PARERR_ENABLE", 6, 1 },
		{ "BIST_ERR_ADDR_FIFO_PARERR_ENABLE", 5, 1 },
		{ "HIF_WDATA_Q_PARERR_DCH0_ENABLE", 4, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH1_ENABLE", 3, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH0_ENABLE", 2, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH1_ENABLE", 1, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH0_ENABLE", 0, 1 },
	{ "MC_P_PAR_CAUSE", 0x49318, 0 },
		{ "HIF_WDATA_Q_PARERR_DCH1_CAUSE", 13, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH1_CAUSE", 12, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH0_CAUSE", 11, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH1_CAUSE", 10, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH0_CAUSE", 9, 1 },
		{ "WDATARAM_PARERR_DCH1_CAUSE", 8, 1 },
		{ "WDATARAM_PARERR_DCH0_CAUSE", 7, 1 },
		{ "BIST_ADDR_FIFO_PARERR_CAUSE", 6, 1 },
		{ "BIST_ERR_ADDR_FIFO_PARERR_CAUSE", 5, 1 },
		{ "HIF_WDATA_Q_PARERR_DCH0_CAUSE", 4, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH1_CAUSE", 3, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH0_CAUSE", 2, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH1_CAUSE", 1, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH0_CAUSE", 0, 1 },
	{ "MC_P_INT_ENABLE", 0x4931c, 0 },
		{ "DDRPHY_INT_ENABLE", 4, 1 },
		{ "DDRCTL_INT_ENABLE", 3, 1 },
		{ "ECC_CE_INT_ENABLE", 2, 1 },
		{ "ECC_UE_INT_ENABLE", 1, 1 },
		{ "PERR_INT_ENABLE", 0, 1 },
	{ "MC_P_INT_CAUSE", 0x49320, 0 },
		{ "DDRPHY_INT_CAUSE", 4, 1 },
		{ "DDRCTL_INT_CAUSE", 3, 1 },
		{ "ECC_CE_INT_CAUSE", 2, 1 },
		{ "ECC_UE_INT_CAUSE", 1, 1 },
		{ "PERR_INT_CAUSE", 0, 1 },
	{ "MC_P_ECC_UE_INT_ENABLE", 0x49324, 0 },
	{ "MC_P_ECC_UE_INT_CAUSE", 0x49328, 0 },
	{ "MC_P_ECC_STATUS", 0x4932c, 0 },
		{ "ECC_CECNT", 16, 16 },
		{ "ECC_UECNT", 0, 16 },
	{ "MC_P_PHY_CTRL", 0x49330, 0 },
	{ "MC_P_STATIC_CFG_STATUS", 0x49334, 0 },
		{ "DfiFreqRatio", 27, 1 },
		{ "STATIC_PP64", 26, 1 },
		{ "STATIC_PPEN", 25, 1 },
		{ "STATIC_OOOEN", 24, 1 },
		{ "STATIC_AWEN", 23, 1 },
		{ "STATIC_SWLAT", 18, 5 },
		{ "STATIC_WLAT", 17, 1 },
		{ "STATIC_ALIGN", 16, 1 },
		{ "STATIC_SLAT", 11, 5 },
		{ "STATIC_LAT", 10, 1 },
		{ "STATIC_MODE", 9, 1 },
		{ "STATIC_DEN", 6, 3 },
		{ "STATIC_ORG", 5, 1 },
		{ "STATIC_RKS", 4, 1 },
		{ "STATIC_DDR5_HBW_Channel", 3, 1 },
		{ "STATIC_DDR5_HBW", 2, 1 },
		{ "STATIC_WIDTH", 1, 1 },
		{ "STATIC_SLOW", 0, 1 },
	{ "MC_P_CORE_PCTL_STAT", 0x49338, 0 },
	{ "MC_P_DEBUG_CNT", 0x4933c, 0 },
		{ "WDATA_OCNT", 8, 5 },
		{ "RDATA_OCNT", 0, 5 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49340, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49344, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49348, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x4934c, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49350, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49354, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49358, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x4935c, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49360, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49364, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49368, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x4936c, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49370, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49374, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x49378, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x4937c, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x49380, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x49384, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x49388, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x4938c, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x49390, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x49394, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x49398, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x4939c, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493a0, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493a4, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493a8, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493ac, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493b0, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493b4, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493b8, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x493bc, 0 },
	{ "MC_CE_ADDR", 0x493c0, 0 },
	{ "MC_UE_ADDR", 0x493c4, 0 },
	{ "MC_P_DEEP_SLEEP", 0x493c8, 0 },
		{ "SleepStatus", 1, 1 },
		{ "SleepReq", 0, 1 },
	{ "MC_P_FPGA_BONUS", 0x493cc, 0 },
	{ "MC_P_DEBUG_CFG", 0x493d0, 0 },
		{ "DEBUG_OR", 15, 1 },
		{ "DEBUG_HI", 14, 1 },
		{ "DEBUG_RPT", 13, 1 },
		{ "DEBUGPAGE", 10, 3 },
		{ "DEBUGSELH", 5, 5 },
		{ "DEBUGSELL", 0, 5 },
	{ "MC_P_DEBUG_RPT", 0x493d4, 0 },
	{ "MC_P_PHY_ADR_CK_EN", 0x493d8, 0 },
	{ "MC_P_WDATARAM_INIT", 0x493dc, 0 },
		{ "ENABLE_DCH1", 1, 1 },
		{ "ENABLE_DCH0", 0, 1 },
	{ "MC_CE_ERR_ECC_DATA0", 0x493e0, 0 },
	{ "MC_CE_ERR_ECC_DATA1", 0x493e4, 0 },
	{ "MC_UE_ERR_ECC_DATA0", 0x493e8, 0 },
	{ "MC_UE_ERR_ECC_DATA1", 0x493ec, 0 },
	{ "MC_P_RMW_PRIO", 0x493f0, 0 },
		{ "WR_HI_TH", 24, 8 },
		{ "WR_MID_TH", 16, 8 },
		{ "RD_HI_TH", 8, 8 },
		{ "RD_MID_TH", 0, 8 },
	{ "MC_P_BIST_CMD", 0x49400, 0 },
		{ "START_BIST", 31, 1 },
		{ "FIFO_ERROR_FLAG", 30, 1 },
		{ "BURST_LEN", 16, 2 },
		{ "BIST_CMD_GAP", 8, 8 },
		{ "BIST_OPCODE", 0, 2 },
	{ "MC_P_BIST_CMD_ADDR", 0x49404, 0 },
	{ "MC_P_BIST_NUM_BURST", 0x49408, 0 },
	{ "MC_P_BIST_DATA_PATTERN", 0x4940c, 0 },
	{ "MC_P_BIST_CRC_SEED", 0x49410, 0 },
	{ "MC_P_BIST_NUM_ERR", 0x49460, 0 },
	{ "MC_P_BIST_ERR_ADDR", 0x49464, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49468, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x4946c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49470, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49474, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49478, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x4947c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49480, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49484, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49488, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x4948c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49490, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49494, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x49498, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x4949c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494a0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494a4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494a8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494ac, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494b0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494b4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494b8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494bc, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494c0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494c4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494c8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494cc, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494d0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494d4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494d8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494dc, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494e0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494e4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494e8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494ec, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494f0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x494f4, 0 },
	{ NULL }
};

struct reg_info t7_mc_t71_regs[] = {
	{ "MC_IND_ADDR", 0x58000, 0 },
		{ "autoincr", 30, 2 },
		{ "addr", 0, 25 },
	{ "MC_IND_DATA", 0x58004, 0 },
	{ "MC_DBG_CTL", 0x58018, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG", 16, 1 },
		{ "SEL", 0, 8 },
	{ "MC_DBG_DATA", 0x5801c, 0 },
	{ "MC_P_DDRPHY_RST_CTRL", 0x59300, 0 },
		{ "PHY_CAL_REQ", 21, 1 },
		{ "PHY_DRAM_WL", 17, 4 },
		{ "PHY_CALIB_DONE", 5, 1 },
		{ "CTL_CAL_REQ", 4, 1 },
		{ "CTL_CKE", 3, 1 },
		{ "CTL_RST_N", 2, 1 },
		{ "DDRIO_ENABLE", 1, 1 },
		{ "PHY_RST_N", 0, 1 },
	{ "MC_P_PERFORMANCE_CTRL", 0x59304, 0 },
		{ "BUF_USE_TH", 12, 3 },
		{ "MC_IDLE_TH", 8, 4 },
		{ "RMW_DEFER_EN", 7, 1 },
		{ "DDR3_BRBC_MODE", 6, 1 },
		{ "RMW_DWRITE_EN", 5, 1 },
		{ "RMW_MERGE_EN", 4, 1 },
		{ "SYNC_PAB_EN", 3, 1 },
		{ "STALL_CHK_BIT", 2, 1 },
		{ "DDR3_BRC_MODE", 1, 1 },
		{ "RMW_PERF_CTRL", 0, 1 },
	{ "MC_P_ECC_CTRL", 0x59308, 0 },
		{ "BistECCHBWCtl", 7, 2 },
		{ "BistTestMode", 6, 1 },
		{ "rmw_ctl_cfg", 4, 2 },
		{ "ECC_BYPASS_BIST", 1, 1 },
		{ "ECC_DISABLE", 0, 1 },
	{ "MC_P_DDRCTL_INT_ENABLE", 0x5930c, 0 },
		{ "HIF_WDATA_PTR_ADDR_ERR_DCH1_ENABLE", 5, 1 },
		{ "HIF_RDATA_CRC_ERR_DCH1_ENABLE", 4, 1 },
		{ "HIF_RDATA_ADDR_ERR_DCH1_ENABLE", 3, 1 },
		{ "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_ENABLE", 2, 1 },
		{ "HIF_RDATA_CRC_ERR_INTR_DCH0_ENABLE", 1, 1 },
		{ "HIF_RDATA_ADDR_ERR_INTR_DCH0_ENABLE", 0, 1 },
	{ "MC_P_DDRCTL_INT_CAUSE", 0x59310, 0 },
		{ "WR_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 25, 1 },
		{ "WR_CRC_ERR_INTR_DCH1_CAUSE", 24, 1 },
		{ "CAPAR_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 23, 1 },
		{ "RD_CRC_ERR_MAX_REACHED_INTR_DCH1_CAUSE", 22, 1 },
		{ "DERATE_TEMP_LIMIT_INTR_DCH1_CAUSE", 21, 1 },
		{ "SWCMD_ERR_INTR_DCH1_CAUSE", 20, 1 },
		{ "DUCMD_ERR_INTR_DCH1_CAUSE", 19, 1 },
		{ "LCCMD_ERR_INTR_DCH1_CAUSE", 18, 1 },
		{ "CTRLUPD_ERR_INTR_DCH1_CAUSE", 17, 1 },
		{ "RFM_ALERT_INTR_DCH1_CAUSE", 16, 1 },
		{ "WR_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 15, 1 },
		{ "WR_CRC_ERR_INTR_DCH0_CAUSE", 14, 1 },
		{ "CAPAR_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 13, 1 },
		{ "RD_CRC_ERR_MAX_REACHED_INTR_DCH0_CAUSE", 12, 1 },
		{ "DERATE_TEMP_LIMIT_INTR_DCH0_CAUSE", 11, 1 },
		{ "SWCMD_ERR_INTR_DCH0_CAUSE", 10, 1 },
		{ "DUCMD_ERR_INTR_DCH0_CAUSE", 9, 1 },
		{ "LCCMD_ERR_INTR_DCH0_CAUSE", 8, 1 },
		{ "CTRLUPD_ERR_INTR_DCH0_CAUSE", 7, 1 },
		{ "RFM_ALERT_INTR_DCH0_CAUSE", 6, 1 },
		{ "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH1_CAUSE", 5, 1 },
		{ "HIF_RDATA_CRC_ERR_INTR_DCH1_CAUSE", 4, 1 },
		{ "HIF_RDATA_ADDR_ERR_INTR_DCH1_CAUSE", 3, 1 },
		{ "HIF_WDATA_PTR_ADDR_ERR_INTR_DCH0_CAUSE", 2, 1 },
		{ "HIF_RDATA_CRC_ERR_INTR_DCH0_CAUSE", 1, 1 },
		{ "HIF_RDATA_ADDR_ERR_INTR_DCH0_CAUSE", 0, 1 },
	{ "MC_P_PAR_ENABLE", 0x59314, 0 },
		{ "HIF_WDATA_Q_PARERR_DCH1_ENABLE", 13, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH1_ENABLE", 12, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH0_ENABLE", 11, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH1_ENABLE", 10, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH0_ENABLE", 9, 1 },
		{ "WDATARAM_PARERR_DCH1_ENABLE", 8, 1 },
		{ "WDATARAM_PARERR_DCH0_ENABLE", 7, 1 },
		{ "BIST_ADDR_FIFO_PARERR_ENABLE", 6, 1 },
		{ "BIST_ERR_ADDR_FIFO_PARERR_ENABLE", 5, 1 },
		{ "HIF_WDATA_Q_PARERR_DCH0_ENABLE", 4, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH1_ENABLE", 3, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH0_ENABLE", 2, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH1_ENABLE", 1, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH0_ENABLE", 0, 1 },
	{ "MC_P_PAR_CAUSE", 0x59318, 0 },
		{ "HIF_WDATA_Q_PARERR_DCH1_CAUSE", 13, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH1_CAUSE", 12, 1 },
		{ "DDRCTL_ECC_CE_PAR_DCH0_CAUSE", 11, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH1_CAUSE", 10, 1 },
		{ "DDRCTL_ECC_UE_PAR_DCH0_CAUSE", 9, 1 },
		{ "WDATARAM_PARERR_DCH1_CAUSE", 8, 1 },
		{ "WDATARAM_PARERR_DCH0_CAUSE", 7, 1 },
		{ "BIST_ADDR_FIFO_PARERR_CAUSE", 6, 1 },
		{ "BIST_ERR_ADDR_FIFO_PARERR_CAUSE", 5, 1 },
		{ "HIF_WDATA_Q_PARERR_DCH0_CAUSE", 4, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH1_CAUSE", 3, 1 },
		{ "HIF_RSPDATA_Q_PARERR_DCH0_CAUSE", 2, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH1_CAUSE", 1, 1 },
		{ "HIF_WDATA_MASK_FIFO_PARERR_DCH0_CAUSE", 0, 1 },
	{ "MC_P_INT_ENABLE", 0x5931c, 0 },
		{ "DDRPHY_INT_ENABLE", 4, 1 },
		{ "DDRCTL_INT_ENABLE", 3, 1 },
		{ "ECC_CE_INT_ENABLE", 2, 1 },
		{ "ECC_UE_INT_ENABLE", 1, 1 },
		{ "PERR_INT_ENABLE", 0, 1 },
	{ "MC_P_INT_CAUSE", 0x59320, 0 },
		{ "DDRPHY_INT_CAUSE", 4, 1 },
		{ "DDRCTL_INT_CAUSE", 3, 1 },
		{ "ECC_CE_INT_CAUSE", 2, 1 },
		{ "ECC_UE_INT_CAUSE", 1, 1 },
		{ "PERR_INT_CAUSE", 0, 1 },
	{ "MC_P_ECC_UE_INT_ENABLE", 0x59324, 0 },
	{ "MC_P_ECC_UE_INT_CAUSE", 0x59328, 0 },
	{ "MC_P_ECC_STATUS", 0x5932c, 0 },
		{ "ECC_CECNT", 16, 16 },
		{ "ECC_UECNT", 0, 16 },
	{ "MC_P_PHY_CTRL", 0x59330, 0 },
	{ "MC_P_STATIC_CFG_STATUS", 0x59334, 0 },
		{ "DfiFreqRatio", 27, 1 },
		{ "STATIC_PP64", 26, 1 },
		{ "STATIC_PPEN", 25, 1 },
		{ "STATIC_OOOEN", 24, 1 },
		{ "STATIC_AWEN", 23, 1 },
		{ "STATIC_SWLAT", 18, 5 },
		{ "STATIC_WLAT", 17, 1 },
		{ "STATIC_ALIGN", 16, 1 },
		{ "STATIC_SLAT", 11, 5 },
		{ "STATIC_LAT", 10, 1 },
		{ "STATIC_MODE", 9, 1 },
		{ "STATIC_DEN", 6, 3 },
		{ "STATIC_ORG", 5, 1 },
		{ "STATIC_RKS", 4, 1 },
		{ "STATIC_DDR5_HBW_Channel", 3, 1 },
		{ "STATIC_DDR5_HBW", 2, 1 },
		{ "STATIC_WIDTH", 1, 1 },
		{ "STATIC_SLOW", 0, 1 },
	{ "MC_P_CORE_PCTL_STAT", 0x59338, 0 },
	{ "MC_P_DEBUG_CNT", 0x5933c, 0 },
		{ "WDATA_OCNT", 8, 5 },
		{ "RDATA_OCNT", 0, 5 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59340, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59344, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59348, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x5934c, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59350, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59354, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59358, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x5935c, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59360, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59364, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59368, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x5936c, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59370, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59374, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x59378, 0 },
	{ "MC_CE_ERR_DATA_RDATA", 0x5937c, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x59380, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x59384, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x59388, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x5938c, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x59390, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x59394, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x59398, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x5939c, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593a0, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593a4, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593a8, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593ac, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593b0, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593b4, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593b8, 0 },
	{ "MC_UE_ERR_DATA_RDATA", 0x593bc, 0 },
	{ "MC_CE_ADDR", 0x593c0, 0 },
	{ "MC_UE_ADDR", 0x593c4, 0 },
	{ "MC_P_DEEP_SLEEP", 0x593c8, 0 },
		{ "SleepStatus", 1, 1 },
		{ "SleepReq", 0, 1 },
	{ "MC_P_FPGA_BONUS", 0x593cc, 0 },
	{ "MC_P_DEBUG_CFG", 0x593d0, 0 },
		{ "DEBUG_OR", 15, 1 },
		{ "DEBUG_HI", 14, 1 },
		{ "DEBUG_RPT", 13, 1 },
		{ "DEBUGPAGE", 10, 3 },
		{ "DEBUGSELH", 5, 5 },
		{ "DEBUGSELL", 0, 5 },
	{ "MC_P_DEBUG_RPT", 0x593d4, 0 },
	{ "MC_P_PHY_ADR_CK_EN", 0x593d8, 0 },
	{ "MC_P_WDATARAM_INIT", 0x593dc, 0 },
		{ "ENABLE_DCH1", 1, 1 },
		{ "ENABLE_DCH0", 0, 1 },
	{ "MC_CE_ERR_ECC_DATA0", 0x593e0, 0 },
	{ "MC_CE_ERR_ECC_DATA1", 0x593e4, 0 },
	{ "MC_UE_ERR_ECC_DATA0", 0x593e8, 0 },
	{ "MC_UE_ERR_ECC_DATA1", 0x593ec, 0 },
	{ "MC_P_RMW_PRIO", 0x593f0, 0 },
		{ "WR_HI_TH", 24, 8 },
		{ "WR_MID_TH", 16, 8 },
		{ "RD_HI_TH", 8, 8 },
		{ "RD_MID_TH", 0, 8 },
	{ "MC_P_BIST_CMD", 0x59400, 0 },
		{ "START_BIST", 31, 1 },
		{ "FIFO_ERROR_FLAG", 30, 1 },
		{ "BURST_LEN", 16, 2 },
		{ "BIST_CMD_GAP", 8, 8 },
		{ "BIST_OPCODE", 0, 2 },
	{ "MC_P_BIST_CMD_ADDR", 0x59404, 0 },
	{ "MC_P_BIST_NUM_BURST", 0x59408, 0 },
	{ "MC_P_BIST_DATA_PATTERN", 0x5940c, 0 },
	{ "MC_P_BIST_CRC_SEED", 0x59410, 0 },
	{ "MC_P_BIST_NUM_ERR", 0x59460, 0 },
	{ "MC_P_BIST_ERR_ADDR", 0x59464, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59468, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x5946c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59470, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59474, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59478, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x5947c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59480, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59484, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59488, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x5948c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59490, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59494, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x59498, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x5949c, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594a0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594a4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594a8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594ac, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594b0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594b4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594b8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594bc, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594c0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594c4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594c8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594cc, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594d0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594d4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594d8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594dc, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594e0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594e4, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594e8, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594ec, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594f0, 0 },
	{ "MC_P_BIST_USER_RWEDATA", 0x594f4, 0 },
	{ NULL }
};

struct reg_info t7_edc_t60_regs[] = {
	{ "EDC_H_REF", 0x50000, 0 },
		{ "SleepStatus", 31, 1 },
		{ "SleepReq", 30, 1 },
		{ "PING_PONG", 29, 1 },
		{ "DramRefEnable", 27, 2 },
		{ "QDR_ClkPhase", 24, 3 },
		{ "MaxOpsPerTRC", 21, 3 },
		{ "NumPipeStages", 19, 2 },
		{ "EDC_INST_NUM", 18, 1 },
		{ "ENABLE_PERF", 17, 1 },
		{ "ECC_BYPASS", 16, 1 },
		{ "RefFreq", 0, 16 },
	{ "EDC_H_BIST_CMD", 0x50004, 0 },
		{ "START_BIST", 31, 1 },
		{ "BURST_LEN", 16, 2 },
		{ "BIST_CMD_GAP", 8, 8 },
		{ "BIST_OPCODE", 0, 2 },
	{ "EDC_H_BIST_CMD_ADDR", 0x50008, 0 },
	{ "EDC_H_BIST_CMD_LEN", 0x5000c, 0 },
	{ "EDC_H_BIST_DATA_PATTERN", 0x50010, 0 },
	{ "EDC_H_BIST_USER_WDATA0", 0x50014, 0 },
	{ "EDC_H_BIST_USER_WDATA1", 0x50018, 0 },
	{ "EDC_H_BIST_USER_WDATA2", 0x5001c, 0 },
		{ "USER_DATA_MASK", 8, 9 },
		{ "USER_DATA2", 0, 8 },
	{ "EDC_H_BIST_NUM_ERR", 0x50020, 0 },
	{ "EDC_H_BIST_ERR_FIRST_ADDR", 0x50024, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50028, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5002c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50030, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50034, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50038, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5003c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50040, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50044, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50048, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5004c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50050, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50054, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50058, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5005c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50060, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50064, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50068, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5006c, 0 },
	{ "EDC_H_PAR_ENABLE", 0x50070, 0 },
		{ "ECC_UE_PAR_ENABLE", 2, 1 },
		{ "ECC_CE_PAR_ENABLE", 1, 1 },
		{ "PERR_PAR_ENABLE", 0, 1 },
	{ "EDC_H_INT_ENABLE", 0x50074, 0 },
		{ "ECC_UE_INT_ENABLE", 2, 1 },
		{ "ECC_CE_INT_ENABLE", 1, 1 },
		{ "PERR_INT_ENABLE", 0, 1 },
	{ "EDC_H_INT_CAUSE", 0x50078, 0 },
		{ "ECC_UE_INT0_CAUSE", 5, 1 },
		{ "ECC_CE_INT0_CAUSE", 4, 1 },
		{ "PERR_INT0_CAUSE", 3, 1 },
		{ "ECC_UE_INT_CAUSE", 2, 1 },
		{ "ECC_CE_INT_CAUSE", 1, 1 },
		{ "PERR_INT_CAUSE", 0, 1 },
	{ "EDC_H_ECC_STATUS", 0x5007c, 0 },
		{ "ECC_CECNT", 16, 16 },
		{ "ECC_UECNT", 0, 16 },
	{ "EDC_H_ECC_ERR_SEL", 0x50080, 0 },
	{ "EDC_H_ECC_ERR_ADDR", 0x50084, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50090, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50094, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50098, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x5009c, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500a0, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500a4, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500a8, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500ac, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500b0, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500b4, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500b8, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500bc, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500c0, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500c4, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500c8, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500cc, 0 },
	{ "EDC_H_DBG_MA_CMD_INTF", 0x50300, 0 },
		{ "MCmdAddr", 12, 20 },
		{ "MCmdLen", 5, 7 },
		{ "MCmdNRE", 4, 1 },
		{ "MCmdNRB", 3, 1 },
		{ "MCmdWr", 2, 1 },
		{ "MCmdRdy", 1, 1 },
		{ "MCmdVld", 0, 1 },
	{ "EDC_H_DBG_MA_WDATA_INTF", 0x50304, 0 },
		{ "MWDataVld", 31, 1 },
		{ "MWDataRdy", 30, 1 },
		{ "MWData", 0, 30 },
	{ "EDC_H_DBG_MA_RDATA_INTF", 0x50308, 0 },
		{ "MRspVld", 31, 1 },
		{ "MRspRdy", 30, 1 },
		{ "MRspData", 0, 30 },
	{ "EDC_H_DBG_BIST_CMD_INTF", 0x5030c, 0 },
		{ "BCmdAddr", 9, 23 },
		{ "BCmdLen", 3, 6 },
		{ "BCmdWr", 2, 1 },
		{ "BCmdRdy", 1, 1 },
		{ "BCmdVld", 0, 1 },
	{ "EDC_H_DBG_BIST_WDATA_INTF", 0x50310, 0 },
		{ "BWDataVld", 31, 1 },
		{ "BWDataRdy", 30, 1 },
		{ "BWData", 0, 30 },
	{ "EDC_H_DBG_BIST_RDATA_INTF", 0x50314, 0 },
		{ "BRspVld", 31, 1 },
		{ "BRspRdy", 30, 1 },
		{ "BRspData", 0, 30 },
	{ "EDC_H_DBG_EDRAM_CMD_INTF", 0x50318, 0 },
		{ "EdramAddr", 16, 16 },
		{ "EdramDwsn", 8, 8 },
		{ "EdramCra", 5, 3 },
		{ "EdramRefEnLo", 4, 1 },
		{ "Edram1WrEnLo", 3, 1 },
		{ "Edram1RdEnLo", 2, 1 },
		{ "Edram0WrEnLo", 1, 1 },
		{ "Edram0RdEnLo", 0, 1 },
	{ "EDC_H_DBG_EDRAM_WDATA_INTF", 0x5031c, 0 },
		{ "EdramWData", 9, 23 },
		{ "EdramWByteEn", 0, 9 },
	{ "EDC_H_DBG_EDRAM0_RDATA_INTF", 0x50320, 0 },
	{ "EDC_H_DBG_EDRAM1_RDATA_INTF", 0x50324, 0 },
	{ "EDC_H_DBG_MA_WR_REQ_CNT", 0x50328, 0 },
	{ "EDC_H_DBG_MA_WR_EXP_DAT_CYC_CNT", 0x5032c, 0 },
	{ "EDC_H_DBG_MA_WR_DAT_CYC_CNT", 0x50330, 0 },
	{ "EDC_H_DBG_MA_RD_REQ_CNT", 0x50334, 0 },
	{ "EDC_H_DBG_MA_RD_EXP_DAT_CYC_CNT", 0x50338, 0 },
	{ "EDC_H_DBG_MA_RD_DAT_CYC_CNT", 0x5033c, 0 },
	{ "EDC_H_DBG_BIST_WR_REQ_CNT", 0x50340, 0 },
	{ "EDC_H_DBG_BIST_WR_EXP_DAT_CYC_CNT", 0x50344, 0 },
	{ "EDC_H_DBG_BIST_WR_DAT_CYC_CNT", 0x50348, 0 },
	{ "EDC_H_DBG_BIST_RD_REQ_CNT", 0x5034c, 0 },
	{ "EDC_H_DBG_BIST_RD_EXP_DAT_CYC_CNT", 0x50350, 0 },
	{ "EDC_H_DBG_BIST_RD_DAT_CYC_CNT", 0x50354, 0 },
	{ "EDC_H_DBG_EDRAM0_WR_REQ_CNT", 0x50358, 0 },
	{ "EDC_H_DBG_EDRAM0_RD_REQ_CNT", 0x5035c, 0 },
	{ "EDC_H_DBG_EDRAM0_RMW_CNT", 0x50360, 0 },
	{ "EDC_H_DBG_EDRAM1_WR_REQ_CNT", 0x50364, 0 },
	{ "EDC_H_DBG_EDRAM1_RD_REQ_CNT", 0x50368, 0 },
	{ "EDC_H_DBG_EDRAM1_RMW_CNT", 0x5036c, 0 },
	{ "EDC_H_DBG_EDRAM_REF_BURST_CNT", 0x50370, 0 },
	{ "EDC_H_DBG_FIFO_STATUS", 0x50374, 0 },
		{ "rdtag_notfull", 17, 1 },
		{ "rdtag_notempty", 16, 1 },
		{ "inp_cmdq_notfull_arb", 15, 1 },
		{ "inp_cmdq_notempty", 14, 1 },
		{ "inp_wrdq_wrrdy", 13, 1 },
		{ "inp_wrdq_notempty", 12, 1 },
		{ "inp_beq_wrrdy_open", 11, 1 },
		{ "inp_beq_notempty", 10, 1 },
		{ "rddq_notfull_open", 9, 1 },
		{ "rddq_rdcnt", 4, 5 },
		{ "rdsideq_notfull", 3, 1 },
		{ "rdsideq_notempty", 2, 1 },
		{ "stg_cmdq_notempty", 1, 1 },
		{ "stg_wrdq_notempty", 0, 1 },
	{ "EDC_H_DBG_FSM_STATE", 0x50378, 0 },
		{ "CmdSplitFsm", 3, 1 },
		{ "CmdFsm", 0, 3 },
	{ "EDC_H_DBG_STALL_CYCLES", 0x5037c, 0 },
		{ "stall_rmw", 19, 1 },
		{ "stall_edc_cmd", 18, 1 },
		{ "dead_cycle0", 17, 1 },
		{ "dead_cycle1", 16, 1 },
		{ "dead_cycle0_bbi", 15, 1 },
		{ "dead_cycle1_bbi", 14, 1 },
		{ "dead_cycle0_max_op", 13, 1 },
		{ "dead_cycle1_max_op", 12, 1 },
		{ "dead_cycle0_pre_ref", 11, 1 },
		{ "dead_cycle1_pre_ref", 10, 1 },
		{ "dead_cycle0_post_ref", 9, 1 },
		{ "dead_cycle1_post_ref", 8, 1 },
		{ "dead_cycle0_rmw", 7, 1 },
		{ "dead_cycle1_rmw", 6, 1 },
		{ "dead_cycle0_bbi_rmw", 5, 1 },
		{ "dead_cycle1_bbi_rmw", 4, 1 },
		{ "dead_cycle0_pre_ref_rmw", 3, 1 },
		{ "dead_cycle1_pre_ref_rmw", 2, 1 },
		{ "dead_cycle0_post_ref_rmw", 1, 1 },
		{ "dead_cycle1_post_ref_rmw", 0, 1 },
	{ "EDC_H_DBG_CMD_QUEUE", 0x50380, 0 },
		{ "ECmdNRE", 31, 1 },
		{ "ECmdNRB", 30, 1 },
		{ "ECmdWr", 29, 1 },
		{ "ECmdLen", 22, 7 },
		{ "ECmdAddr", 0, 22 },
	{ "EDC_H_DBG_REFRESH", 0x50384, 0 },
		{ "RefDone", 12, 1 },
		{ "RefCntExpr", 11, 1 },
		{ "RefPtr", 8, 3 },
		{ "RefCnt", 0, 8 },
	{ "EDC_H_BIST_CRC_SEED", 0x50400, 0 },
	{ "EDC_H_PAR_CAUSE", 0x50404, 0 },
		{ "STG_CMDQ_PARERR_CAUSE", 7, 1 },
		{ "STG_WRDQ_PARERR_CAUSE", 6, 1 },
		{ "INP_CMDQ_PARERR_CAUSE", 5, 1 },
		{ "INP_WRDQ_PARERR_CAUSE", 4, 1 },
		{ "INP_BEQ_PARERR_CAUSE", 3, 1 },
		{ "ECC_CE_PAR_ENABLE_CAUSE", 2, 1 },
		{ "ECC_UE_PAR_ENABLE_CAUSE", 1, 1 },
		{ "RDDQ_PARERR_CAUSE", 0, 1 },
	{ NULL }
};

struct reg_info t7_edc_t61_regs[] = {
	{ "EDC_H_REF", 0x50800, 0 },
		{ "SleepStatus", 31, 1 },
		{ "SleepReq", 30, 1 },
		{ "PING_PONG", 29, 1 },
		{ "DramRefEnable", 27, 2 },
		{ "QDR_ClkPhase", 24, 3 },
		{ "MaxOpsPerTRC", 21, 3 },
		{ "NumPipeStages", 19, 2 },
		{ "EDC_INST_NUM", 18, 1 },
		{ "ENABLE_PERF", 17, 1 },
		{ "ECC_BYPASS", 16, 1 },
		{ "RefFreq", 0, 16 },
	{ "EDC_H_BIST_CMD", 0x50804, 0 },
		{ "START_BIST", 31, 1 },
		{ "BURST_LEN", 16, 2 },
		{ "BIST_CMD_GAP", 8, 8 },
		{ "BIST_OPCODE", 0, 2 },
	{ "EDC_H_BIST_CMD_ADDR", 0x50808, 0 },
	{ "EDC_H_BIST_CMD_LEN", 0x5080c, 0 },
	{ "EDC_H_BIST_DATA_PATTERN", 0x50810, 0 },
	{ "EDC_H_BIST_USER_WDATA0", 0x50814, 0 },
	{ "EDC_H_BIST_USER_WDATA1", 0x50818, 0 },
	{ "EDC_H_BIST_USER_WDATA2", 0x5081c, 0 },
		{ "USER_DATA_MASK", 8, 9 },
		{ "USER_DATA2", 0, 8 },
	{ "EDC_H_BIST_NUM_ERR", 0x50820, 0 },
	{ "EDC_H_BIST_ERR_FIRST_ADDR", 0x50824, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50828, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5082c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50830, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50834, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50838, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5083c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50840, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50844, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50848, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5084c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50850, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50854, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50858, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5085c, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50860, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50864, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x50868, 0 },
	{ "EDC_H_BIST_STATUS_RDATA", 0x5086c, 0 },
	{ "EDC_H_PAR_ENABLE", 0x50870, 0 },
		{ "ECC_UE_PAR_ENABLE", 2, 1 },
		{ "ECC_CE_PAR_ENABLE", 1, 1 },
		{ "PERR_PAR_ENABLE", 0, 1 },
	{ "EDC_H_INT_ENABLE", 0x50874, 0 },
		{ "ECC_UE_INT_ENABLE", 2, 1 },
		{ "ECC_CE_INT_ENABLE", 1, 1 },
		{ "PERR_INT_ENABLE", 0, 1 },
	{ "EDC_H_INT_CAUSE", 0x50878, 0 },
		{ "ECC_UE_INT0_CAUSE", 5, 1 },
		{ "ECC_CE_INT0_CAUSE", 4, 1 },
		{ "PERR_INT0_CAUSE", 3, 1 },
		{ "ECC_UE_INT_CAUSE", 2, 1 },
		{ "ECC_CE_INT_CAUSE", 1, 1 },
		{ "PERR_INT_CAUSE", 0, 1 },
	{ "EDC_H_ECC_STATUS", 0x5087c, 0 },
		{ "ECC_CECNT", 16, 16 },
		{ "ECC_UECNT", 0, 16 },
	{ "EDC_H_ECC_ERR_SEL", 0x50880, 0 },
	{ "EDC_H_ECC_ERR_ADDR", 0x50884, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50890, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50894, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50898, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x5089c, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508a0, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508a4, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508a8, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508ac, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508b0, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508b4, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508b8, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508bc, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508c0, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508c4, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508c8, 0 },
	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508cc, 0 },
	{ "EDC_H_DBG_MA_CMD_INTF", 0x50b00, 0 },
		{ "MCmdAddr", 12, 20 },
		{ "MCmdLen", 5, 7 },
		{ "MCmdNRE", 4, 1 },
		{ "MCmdNRB", 3, 1 },
		{ "MCmdWr", 2, 1 },
		{ "MCmdRdy", 1, 1 },
		{ "MCmdVld", 0, 1 },
	{ "EDC_H_DBG_MA_WDATA_INTF", 0x50b04, 0 },
		{ "MWDataVld", 31, 1 },
		{ "MWDataRdy", 30, 1 },
		{ "MWData", 0, 30 },
	{ "EDC_H_DBG_MA_RDATA_INTF", 0x50b08, 0 },
		{ "MRspVld", 31, 1 },
		{ "MRspRdy", 30, 1 },
		{ "MRspData", 0, 30 },
	{ "EDC_H_DBG_BIST_CMD_INTF", 0x50b0c, 0 },
		{ "BCmdAddr", 9, 23 },
		{ "BCmdLen", 3, 6 },
		{ "BCmdWr", 2, 1 },
		{ "BCmdRdy", 1, 1 },
		{ "BCmdVld", 0, 1 },
	{ "EDC_H_DBG_BIST_WDATA_INTF", 0x50b10, 0 },
		{ "BWDataVld", 31, 1 },
		{ "BWDataRdy", 30, 1 },
		{ "BWData", 0, 30 },
	{ "EDC_H_DBG_BIST_RDATA_INTF", 0x50b14, 0 },
		{ "BRspVld", 31, 1 },
		{ "BRspRdy", 30, 1 },
		{ "BRspData", 0, 30 },
	{ "EDC_H_DBG_EDRAM_CMD_INTF", 0x50b18, 0 },
		{ "EdramAddr", 16, 16 },
		{ "EdramDwsn", 8, 8 },
		{ "EdramCra", 5, 3 },
		{ "EdramRefEnLo", 4, 1 },
		{ "Edram1WrEnLo", 3, 1 },
		{ "Edram1RdEnLo", 2, 1 },
		{ "Edram0WrEnLo", 1, 1 },
		{ "Edram0RdEnLo", 0, 1 },
	{ "EDC_H_DBG_EDRAM_WDATA_INTF", 0x50b1c, 0 },
		{ "EdramWData", 9, 23 },
		{ "EdramWByteEn", 0, 9 },
	{ "EDC_H_DBG_EDRAM0_RDATA_INTF", 0x50b20, 0 },
	{ "EDC_H_DBG_EDRAM1_RDATA_INTF", 0x50b24, 0 },
	{ "EDC_H_DBG_MA_WR_REQ_CNT", 0x50b28, 0 },
	{ "EDC_H_DBG_MA_WR_EXP_DAT_CYC_CNT", 0x50b2c, 0 },
	{ "EDC_H_DBG_MA_WR_DAT_CYC_CNT", 0x50b30, 0 },
	{ "EDC_H_DBG_MA_RD_REQ_CNT", 0x50b34, 0 },
	{ "EDC_H_DBG_MA_RD_EXP_DAT_CYC_CNT", 0x50b38, 0 },
	{ "EDC_H_DBG_MA_RD_DAT_CYC_CNT", 0x50b3c, 0 },
	{ "EDC_H_DBG_BIST_WR_REQ_CNT", 0x50b40, 0 },
	{ "EDC_H_DBG_BIST_WR_EXP_DAT_CYC_CNT", 0x50b44, 0 },
	{ "EDC_H_DBG_BIST_WR_DAT_CYC_CNT", 0x50b48, 0 },
	{ "EDC_H_DBG_BIST_RD_REQ_CNT", 0x50b4c, 0 },
	{ "EDC_H_DBG_BIST_RD_EXP_DAT_CYC_CNT", 0x50b50, 0 },
	{ "EDC_H_DBG_BIST_RD_DAT_CYC_CNT", 0x50b54, 0 },
	{ "EDC_H_DBG_EDRAM0_WR_REQ_CNT", 0x50b58, 0 },
	{ "EDC_H_DBG_EDRAM0_RD_REQ_CNT", 0x50b5c, 0 },
	{ "EDC_H_DBG_EDRAM0_RMW_CNT", 0x50b60, 0 },
	{ "EDC_H_DBG_EDRAM1_WR_REQ_CNT", 0x50b64, 0 },
	{ "EDC_H_DBG_EDRAM1_RD_REQ_CNT", 0x50b68, 0 },
	{ "EDC_H_DBG_EDRAM1_RMW_CNT", 0x50b6c, 0 },
	{ "EDC_H_DBG_EDRAM_REF_BURST_CNT", 0x50b70, 0 },
	{ "EDC_H_DBG_FIFO_STATUS", 0x50b74, 0 },
		{ "rdtag_notfull", 17, 1 },
		{ "rdtag_notempty", 16, 1 },
		{ "inp_cmdq_notfull_arb", 15, 1 },
		{ "inp_cmdq_notempty", 14, 1 },
		{ "inp_wrdq_wrrdy", 13, 1 },
		{ "inp_wrdq_notempty", 12, 1 },
		{ "inp_beq_wrrdy_open", 11, 1 },
		{ "inp_beq_notempty", 10, 1 },
		{ "rddq_notfull_open", 9, 1 },
		{ "rddq_rdcnt", 4, 5 },
		{ "rdsideq_notfull", 3, 1 },
		{ "rdsideq_notempty", 2, 1 },
		{ "stg_cmdq_notempty", 1, 1 },
		{ "stg_wrdq_notempty", 0, 1 },
	{ "EDC_H_DBG_FSM_STATE", 0x50b78, 0 },
		{ "CmdSplitFsm", 3, 1 },
		{ "CmdFsm", 0, 3 },
	{ "EDC_H_DBG_STALL_CYCLES", 0x50b7c, 0 },
		{ "stall_rmw", 19, 1 },
		{ "stall_edc_cmd", 18, 1 },
		{ "dead_cycle0", 17, 1 },
		{ "dead_cycle1", 16, 1 },
		{ "dead_cycle0_bbi", 15, 1 },
		{ "dead_cycle1_bbi", 14, 1 },
		{ "dead_cycle0_max_op", 13, 1 },
		{ "dead_cycle1_max_op", 12, 1 },
		{ "dead_cycle0_pre_ref", 11, 1 },
		{ "dead_cycle1_pre_ref", 10, 1 },
		{ "dead_cycle0_post_ref", 9, 1 },
		{ "dead_cycle1_post_ref", 8, 1 },
		{ "dead_cycle0_rmw", 7, 1 },
		{ "dead_cycle1_rmw", 6, 1 },
		{ "dead_cycle0_bbi_rmw", 5, 1 },
		{ "dead_cycle1_bbi_rmw", 4, 1 },
		{ "dead_cycle0_pre_ref_rmw", 3, 1 },
		{ "dead_cycle1_pre_ref_rmw", 2, 1 },
		{ "dead_cycle0_post_ref_rmw", 1, 1 },
		{ "dead_cycle1_post_ref_rmw", 0, 1 },
	{ "EDC_H_DBG_CMD_QUEUE", 0x50b80, 0 },
		{ "ECmdNRE", 31, 1 },
		{ "ECmdNRB", 30, 1 },
		{ "ECmdWr", 29, 1 },
		{ "ECmdLen", 22, 7 },
		{ "ECmdAddr", 0, 22 },
	{ "EDC_H_DBG_REFRESH", 0x50b84, 0 },
		{ "RefDone", 12, 1 },
		{ "RefCntExpr", 11, 1 },
		{ "RefPtr", 8, 3 },
		{ "RefCnt", 0, 8 },
	{ "EDC_H_BIST_CRC_SEED", 0x50c00, 0 },
	{ "EDC_H_PAR_CAUSE", 0x50c04, 0 },
		{ "STG_CMDQ_PARERR_CAUSE", 7, 1 },
		{ "STG_WRDQ_PARERR_CAUSE", 6, 1 },
		{ "INP_CMDQ_PARERR_CAUSE", 5, 1 },
		{ "INP_WRDQ_PARERR_CAUSE", 4, 1 },
		{ "INP_BEQ_PARERR_CAUSE", 3, 1 },
		{ "ECC_CE_PAR_ENABLE_CAUSE", 2, 1 },
		{ "ECC_UE_PAR_ENABLE_CAUSE", 1, 1 },
		{ "RDDQ_PARERR_CAUSE", 0, 1 },
	{ NULL }
};

struct reg_info t7_hma_t6_regs[] = {
	{ "HMA_TABLE_ACCESS", 0x51000, 0 },
		{ "TRIG", 31, 1 },
		{ "RW", 30, 1 },
		{ "L_SEL", 0, 4 },
	{ "HMA_TABLE_LINE0", 0x51004, 0 },
	{ "HMA_TABLE_LINE1", 0x51008, 0 },
	{ "HMA_TABLE_LINE1_MSB", 0x51270, 0 },
	{ "HMA_TABLE_LINE2", 0x5100c, 0 },
	{ "HMA_TABLE_LINE2_MSB", 0x51274, 0 },
	{ "HMA_TABLE_LINE3", 0x51010, 0 },
	{ "HMA_TABLE_LINE4", 0x51014, 0 },
	{ "HMA_TABLE_LINE5", 0x51018, 0 },
		{ "FID", 16, 11 },
		{ "NOS", 15, 1 },
		{ "RO", 14, 1 },
		{ "TPH", 12, 2 },
		{ "TPH_V", 11, 1 },
		{ "DCA", 0, 11 },
	{ "HMA_COOKIE", 0x5101c, 0 },
		{ "C_REQ", 31, 1 },
		{ "C_FID", 18, 11 },
		{ "C_VAL", 8, 10 },
		{ "C_SEL", 0, 4 },
	{ "HMA_CFG", 0x51020, 0 },
		{ "OP_MODE", 31, 1 },
		{ "GK_Enable", 30, 1 },
		{ "DbgCntRst", 29, 1 },
	{ "HMA_TLB_ACCESS", 0x51028, 0 },
		{ "TRIG", 31, 1 },
		{ "RW", 30, 1 },
		{ "INV_ALL", 29, 1 },
		{ "LOCK_ENTRY", 28, 1 },
		{ "E_SEL", 0, 5 },
	{ "HMA_TLB_BITS", 0x5102c, 0 },
		{ "VA", 8, 24 },
		{ "VALID_E", 4, 1 },
		{ "LOCK", 3, 1 },
		{ "USED", 2, 1 },
		{ "REGION", 0, 2 },
	{ "HMA_TLB_DESC_0_H", 0x51030, 0 },
	{ "HMA_TLB_DESC_0_L", 0x51034, 0 },
	{ "HMA_TLB_DESC_1_H", 0x51038, 0 },
	{ "HMA_TLB_DESC_1_L", 0x5103c, 0 },
	{ "HMA_TLB_DESC_2_H", 0x51040, 0 },
	{ "HMA_TLB_DESC_2_L", 0x51044, 0 },
	{ "HMA_TLB_DESC_3_H", 0x51048, 0 },
	{ "HMA_TLB_DESC_3_L", 0x5104c, 0 },
	{ "HMA_TLB_DESC_4_H", 0x51050, 0 },
	{ "HMA_TLB_DESC_4_L", 0x51054, 0 },
	{ "HMA_TLB_DESC_5_H", 0x51058, 0 },
	{ "HMA_TLB_DESC_5_L", 0x5105c, 0 },
	{ "HMA_TLB_DESC_6_H", 0x51060, 0 },
	{ "HMA_TLB_DESC_6_L", 0x51064, 0 },
	{ "HMA_TLB_DESC_7_H", 0x51068, 0 },
	{ "HMA_TLB_DESC_7_L", 0x5106c, 0 },
	{ "HMA_REG0_MIN", 0x51070, 0 },
		{ "ADDR0_MIN", 8, 24 },
	{ "HMA_REG0_MAX", 0x51074, 0 },
		{ "ADDR0_MAX", 8, 24 },
	{ "HMA_REG0_MASK", 0x51078, 0 },
		{ "PAGE_SIZE0", 12, 20 },
	{ "HMA_REG0_BASE_LSB", 0x5107c, 0 },
	{ "HMA_REG1_MIN", 0x51080, 0 },
		{ "ADDR1_MIN", 8, 24 },
	{ "HMA_REG1_MAX", 0x51084, 0 },
		{ "ADDR1_MAX", 8, 24 },
	{ "HMA_REG1_MASK", 0x51088, 0 },
		{ "PAGE_SIZE1", 12, 20 },
	{ "HMA_REG1_BASE_LSB", 0x5108c, 0 },
	{ "HMA_REG2_MIN", 0x51090, 0 },
		{ "ADDR2_MIN", 8, 24 },
	{ "HMA_REG2_MAX", 0x51094, 0 },
		{ "ADDR2_MAX", 8, 24 },
	{ "HMA_REG2_MASK", 0x51098, 0 },
		{ "PAGE_SIZE2", 12, 20 },
	{ "HMA_REG2_BASE_LSB", 0x5109c, 0 },
	{ "HMA_REG3_MIN", 0x510a0, 0 },
		{ "ADDR3_MIN", 8, 24 },
	{ "HMA_REG3_MAX", 0x510a4, 0 },
		{ "ADDR3_MAX", 8, 24 },
	{ "HMA_REG3_MASK", 0x510a8, 0 },
		{ "PAGE_SIZE3", 12, 20 },
	{ "HMA_REG3_BASE_LSB", 0x510ac, 0 },
	{ "HMA_SW_SYNC", 0x510b0, 0 },
		{ "ENTER_SYNC", 31, 1 },
		{ "EXIT_SYNC", 30, 1 },
	{ "HMA_REG0_BASE_MSB", 0x510b8, 0 },
	{ "HMA_REG1_BASE_MSB", 0x510bc, 0 },
	{ "HMA_REG2_BASE_MSB", 0x510c0, 0 },
	{ "HMA_REG3_BASE_MSB", 0x510c4, 0 },
	{ "HMA_GC_MODE_SEL", 0x510b4, 0 },
		{ "MODE_SEL", 8, 2 },
		{ "FLUSH_REQ", 4, 1 },
		{ "CLEAR_REQ", 0, 1 },
	{ "HMA_DBG_CTL", 0x51104, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG", 16, 1 },
		{ "SEL", 0, 8 },
	{ "HMA_DBG_DATA", 0x51108, 0 },
	{ "HMA_PAR_ENABLE", 0x51300, 0 },
		{ "GK_UF_PAR_ENABLE", 6, 1 },
		{ "PCIEMST_PAR_ENABLE", 2, 1 },
		{ "PERR_PAR_ENABLE", 0, 1 },
	{ "HMA_INT_ENABLE", 0x51304, 0 },
		{ "GK_UF_INT_ENABLE", 6, 1 },
		{ "IDTF_INT_ENABLE", 5, 1 },
		{ "OTF_INT_ENABLE", 4, 1 },
		{ "RTF_INT_ENABLE", 3, 1 },
		{ "PCIEMST_INT_ENABLE", 2, 1 },
		{ "MAMST_INT_ENABLE", 1, 1 },
		{ "PERR_INT_ENABLE", 0, 1 },
	{ "HMA_INT_CAUSE", 0x51308, 0 },
		{ "GK_UF_INT_CAUSE", 6, 1 },
		{ "IDTF_INT_CAUSE", 5, 1 },
		{ "OTF_INT_CAUSE", 4, 1 },
		{ "RTF_INT_CAUSE", 3, 1 },
		{ "PCIEMST_INT_CAUSE", 2, 1 },
		{ "MAMST_INT_CAUSE", 1, 1 },
		{ "PERR_INT_CAUSE", 0, 1 },
	{ "HMA_MA_MST_ERR", 0x5130c, 0 },
	{ "HMA_RTF_ERR", 0x51310, 0 },
	{ "HMA_OTF_ERR", 0x51314, 0 },
	{ "HMA_IDTF_ERR", 0x51318, 0 },
	{ "HMA_EXIT_TF", 0x5131c, 0 },
		{ "TRIG", 31, 1 },
		{ "RTF", 30, 1 },
		{ "OTF", 29, 1 },
		{ "IDTF", 28, 1 },
	{ "HMA_LOCAL_DEBUG_CFG", 0x51320, 0 },
		{ "DEBUG_OR", 15, 1 },
		{ "DEBUG_HI", 14, 1 },
		{ "DEBUG_RPT", 13, 1 },
		{ "DEBUGPAGE", 10, 3 },
		{ "DEBUGSELH", 5, 5 },
		{ "DEBUGSELL", 0, 5 },
	{ "HMA_LOCAL_DEBUG_RPT", 0x51324, 0 },
	{ "HMA_H_BIST_CMD", 0x51200, 0 },
		{ "START_BIST", 31, 1 },
		{ "BURST_LEN", 16, 2 },
		{ "BIST_CMD_GAP", 8, 8 },
		{ "BIST_OPCODE", 0, 2 },
	{ "HMA_H_BIST_CMD_ADDR", 0x51204, 0 },
	{ "HMA_H_BIST_CMD_LEN", 0x51208, 0 },
	{ "HMA_H_BIST_DATA_PATTERN", 0x5120c, 0 },
	{ "HMA_H_BIST_USER_WDATA0", 0x51210, 0 },
	{ "HMA_H_BIST_USER_WDATA1", 0x51214, 0 },
	{ "HMA_H_BIST_USER_WDATA2", 0x51218, 0 },
		{ "USER_DATA_MASK", 8, 9 },
		{ "USER_DATA2", 0, 8 },
	{ "HMA_H_BIST_NUM_ERR", 0x5121c, 0 },
	{ "HMA_H_BIST_ERR_FIRST_ADDR", 0x51220, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51224, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51228, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x5122c, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51230, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51234, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51238, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x5123c, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51240, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51244, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51248, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x5124c, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51250, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51254, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51258, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x5125c, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51260, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51264, 0 },
	{ "HMA_H_BIST_STATUS_RDATA", 0x51268, 0 },
	{ "HMA_H_BIST_CRC_SEED", 0x5126c, 0 },
	{ NULL }
};

struct reg_info t7_gcache_regs[] = {
	{ "GCACHE_MODE_SEL0", 0x51400, 0 },
		{ "GC_MA_RSP", 16, 1 },
		{ "MODE_SEL", 8, 2 },
		{ "FLUSH_REQ", 4, 1 },
		{ "CLEAR_REQ", 0, 1 },
	{ "GCACHE_MEMZONE0_REGION1", 0x51404, 0 },
		{ "REGION_EN1", 18, 1 },
		{ "EDC_REGION1", 17, 1 },
		{ "CACHE_REGION1", 16, 1 },
		{ "END1", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION2", 0x51408, 0 },
		{ "REGION_EN2", 18, 1 },
		{ "EDC_REGION2", 17, 1 },
		{ "CACHE_REGION2", 16, 1 },
		{ "END2", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION3", 0x5140c, 0 },
		{ "REGION_EN3", 18, 1 },
		{ "EDC_REGION3", 17, 1 },
		{ "CACHE_REGION3", 16, 1 },
		{ "END3", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION4", 0x51410, 0 },
		{ "REGION_EN4", 18, 1 },
		{ "EDC_REGION4", 17, 1 },
		{ "CACHE_REGION4", 16, 1 },
		{ "END4", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION5", 0x51414, 0 },
		{ "REGION_EN5", 18, 1 },
		{ "EDC_REGION5", 17, 1 },
		{ "CACHE_REGION5", 16, 1 },
		{ "END5", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION6", 0x51418, 0 },
		{ "REGION_EN6", 18, 1 },
		{ "EDC_REGION6", 17, 1 },
		{ "CACHE_REGION6", 16, 1 },
		{ "END6", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION7", 0x5141c, 0 },
		{ "REGION_EN7", 18, 1 },
		{ "EDC_REGION7", 17, 1 },
		{ "CACHE_REGION7", 16, 1 },
		{ "END7", 0, 16 },
	{ "GCACHE_MEMZONE0_REGION8", 0x51420, 0 },
		{ "REGION_EN8", 18, 1 },
		{ "EDC_REGION8", 17, 1 },
		{ "CACHE_REGION8", 16, 1 },
		{ "END8", 0, 16 },
	{ "GCACHE_REG0_BASE_MSB", 0x51424, 0 },
	{ "GCACHE_MEMZONE0_REGION1_MSB", 0x51428, 0 },
	{ "GCACHE_MEMZONE0_REGION2_MSB", 0x5142c, 0 },
	{ "GCACHE_MEMZONE0_REGION3_MSB", 0x51430, 0 },
	{ "GCACHE_MEMZONE0_REGION4_MSB", 0x51434, 0 },
	{ "GCACHE_MEMZONE0_REGION5_MSB", 0x51438, 0 },
	{ "GCACHE_MEMZONE0_REGION6_MSB", 0x5143c, 0 },
	{ "GCACHE_MEMZONE0_REGION7_MSB", 0x51440, 0 },
	{ "GCACHE_MEMZONE0_REGION8_MSB", 0x51444, 0 },
	{ "GCACHE_MODE_SEL1", 0x51448, 0 },
		{ "GC_MA_RSP", 16, 1 },
		{ "MODE_SEL", 8, 2 },
		{ "FLUSH_REQ", 4, 1 },
		{ "CLEAR_REQ", 0, 1 },
	{ "GCACHE_MEMZONE1_REGION1", 0x5144c, 0 },
		{ "REGION_EN1", 18, 1 },
		{ "EDC_REGION1", 17, 1 },
		{ "CACHE_REGION1", 16, 1 },
		{ "END1", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION2", 0x51450, 0 },
		{ "REGION_EN2", 18, 1 },
		{ "EDC_REGION2", 17, 1 },
		{ "CACHE_REGION2", 16, 1 },
		{ "END2", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION3", 0x51454, 0 },
		{ "REGION_EN3", 18, 1 },
		{ "EDC_REGION3", 17, 1 },
		{ "CACHE_REGION3", 16, 1 },
		{ "END3", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION4", 0x51458, 0 },
		{ "REGION_EN4", 18, 1 },
		{ "EDC_REGION4", 17, 1 },
		{ "CACHE_REGION4", 16, 1 },
		{ "END4", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION5", 0x5145c, 0 },
		{ "REGION_EN5", 18, 1 },
		{ "EDC_REGION5", 17, 1 },
		{ "CACHE_REGION5", 16, 1 },
		{ "END5", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION6", 0x51460, 0 },
		{ "REGION_EN6", 18, 1 },
		{ "EDC_REGION6", 17, 1 },
		{ "CACHE_REGION6", 16, 1 },
		{ "END6", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION7", 0x51464, 0 },
		{ "REGION_EN7", 18, 1 },
		{ "EDC_REGION7", 17, 1 },
		{ "CACHE_REGION7", 16, 1 },
		{ "END7", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION8", 0x51468, 0 },
		{ "REGION_EN8", 18, 1 },
		{ "EDC_REGION8", 17, 1 },
		{ "CACHE_REGION8", 16, 1 },
		{ "END8", 0, 16 },
	{ "GCACHE_MEMZONE1_REGION1_MSB", 0x5146c, 0 },
	{ "GCACHE_MEMZONE1_REGION2_MSB", 0x51470, 0 },
	{ "GCACHE_MEMZONE1_REGION3_MSB", 0x51474, 0 },
	{ "GCACHE_MEMZONE1_REGION4_MSB", 0x51478, 0 },
	{ "GCACHE_MEMZONE1_REGION5_MSB", 0x5147c, 0 },
	{ "GCACHE_MEMZONE1_REGION6_MSB", 0x51480, 0 },
	{ "GCACHE_MEMZONE1_REGION7_MSB", 0x51484, 0 },
	{ "GCACHE_MEMZONE1_REGION8_MSB", 0x51488, 0 },
	{ "GCACHE_HMA_MC1_EN", 0x5148c, 0 },
		{ "MC1_EN", 1, 1 },
		{ "HMA_EN", 0, 1 },
	{ "GCACHE_P_BIST_CMD", 0x51490, 0 },
		{ "START_BIST", 31, 1 },
		{ "BURST_LEN", 16, 2 },
		{ "BIST_CMD_GAP", 8, 8 },
		{ "BIST_OPCODE", 0, 2 },
	{ "GCACHE_P_BIST_CMD_ADDR", 0x51494, 0 },
	{ "GCACHE_P_BIST_CMD_LEN", 0x51498, 0 },
	{ "GCACHE_P_BIST_DATA_PATTERN", 0x5149c, 0 },
	{ "GCACHE_P_BIST_USER_WDATA0", 0x514a0, 0 },
	{ "GCACHE_P_BIST_USER_WDATA1", 0x514a4, 0 },
	{ "GCACHE_P_BIST_USER_WDATA2", 0x514a8, 0 },
		{ "USER_DATA_MASK", 8, 9 },
		{ "USER_DATA2", 0, 8 },
	{ "GCACHE_P_BIST_NUM_ERR", 0x514ac, 0 },
	{ "GCACHE_P_BIST_ERR_FIRST_ADDR", 0x514b0, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514b4, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514b8, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514bc, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514c0, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514c4, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514c8, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514cc, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514d0, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514d4, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514d8, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514dc, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514e0, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514e4, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514e8, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514ec, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514f0, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514f4, 0 },
	{ "GCACHE_P_BIST_STATUS_RDATA", 0x514f8, 0 },
	{ "GCACHE_P_BIST_CRC_SEED", 0x514fc, 0 },
	{ "GCACHE_CACHE_SIZE", 0x51500, 0 },
		{ "HMA_2MB", 1, 1 },
		{ "MC0_2MB", 0, 1 },
	{ "GCACHE_HINT_MAPPING", 0x51504, 0 },
		{ "CLIENT_HINT_EN", 16, 15 },
		{ "HINT_ADDR_SPLIT_EN", 8, 1 },
		{ "TP_HINT_HMA_MC", 2, 1 },
		{ "CIM_HINT_HMA_MC", 1, 1 },
		{ "LE_HINT_HMA_MC", 0, 1 },
	{ "GCACHE_PERF_EN", 0x51508, 0 },
		{ "PERF_CLEAR_GC1", 3, 1 },
		{ "PERF_CLEAR_GC0", 2, 1 },
		{ "PERF_EN_GC1", 1, 1 },
		{ "PERF_EN_GC0", 0, 1 },
	{ "GCACHE_PERF_GC0_RD_HIT", 0x5150c, 0 },
	{ "GCACHE_PERF_GC1_RD_HIT", 0x51510, 0 },
	{ "GCACHE_PERF_GC0_WR_HIT", 0x51514, 0 },
	{ "GCACHE_PERF_GC1_WR_HIT", 0x51518, 0 },
	{ "GCACHE_PERF_GC0_RD_MISS", 0x5151c, 0 },
	{ "GCACHE_PERF_GC1_RD_MISS", 0x51520, 0 },
	{ "GCACHE_PERF_GC0_WR_MISS", 0x51524, 0 },
	{ "GCACHE_PERF_GC1_WR_MISS", 0x51528, 0 },
	{ "GCACHE_PERF_GC0_RD_REQ", 0x5152c, 0 },
	{ "GCACHE_PERF_GC1_RD_REQ", 0x51530, 0 },
	{ "GCACHE_PERF_GC0_WR_REQ", 0x51534, 0 },
	{ "GCACHE_PERF_GC1_WR_REQ", 0x51538, 0 },
	{ "GCACHE_PAR_CAUSE", 0x5153c, 0 },
		{ "GC1_SRAM_RSP_DATAQ_PERR_PAR_CAUSE", 27, 1 },
		{ "GC0_SRAM_RSP_DATAQ_PERR_PAR_CAUSE", 26, 1 },
		{ "GC1_WQDATA_FIFO_PERR_PAR_CAUSE", 25, 1 },
		{ "GC0_WQDATA_FIFO_PERR_PAR_CAUSE", 24, 1 },
		{ "GC1_RDTAG_QUEUE_PERR_PAR_CAUSE", 23, 1 },
		{ "GC0_RDTAG_QUEUE_PERR_PAR_CAUSE", 22, 1 },
		{ "GC1_SRAM_RDTAG_QUEUE_PERR_PAR_CAUSE", 21, 1 },
		{ "GC0_SRAM_RDTAG_QUEUE_PERR_PAR_CAUSE", 20, 1 },
		{ "GC1_RSP_PERR_PAR_CAUSE", 19, 1 },
		{ "GC0_RSP_PERR_PAR_CAUSE", 18, 1 },
		{ "GC1_LRU_UERR_PAR_CAUSE", 17, 1 },
		{ "GC0_LRU_UERR_PAR_CAUSE", 16, 1 },
		{ "GC1_TAG_UERR_PAR_CAUSE", 15, 1 },
		{ "GC0_TAG_UERR_PAR_CAUSE", 14, 1 },
		{ "GC1_LRU_CERR_PAR_CAUSE", 13, 1 },
		{ "GC0_LRU_CERR_PAR_CAUSE", 12, 1 },
		{ "GC1_TAG_CERR_PAR_CAUSE", 11, 1 },
		{ "GC0_TAG_CERR_PAR_CAUSE", 10, 1 },
		{ "GC1_CE_PAR_CAUSE", 9, 1 },
		{ "GC0_CE_PAR_CAUSE", 8, 1 },
		{ "GC1_UE_PAR_CAUSE", 7, 1 },
		{ "GC0_UE_PAR_CAUSE", 6, 1 },
		{ "GC1_CMD_PAR_CAUSE", 5, 1 },
		{ "GC1_DATA_PAR_CAUSE", 4, 1 },
		{ "GC0_CMD_PAR_CAUSE", 3, 1 },
		{ "GC0_DATA_PAR_CAUSE", 2, 1 },
		{ "ILLADDRACCESS1_PAR_CAUSE", 1, 1 },
		{ "ILLADDRACCESS0_PAR_CAUSE", 0, 1 },
	{ "GCACHE_PAR_ENABLE", 0x51540, 0 },
		{ "GC1_SRAM_RSP_DATAQ_PERR_PAR_ENABLE", 27, 1 },
		{ "GC0_SRAM_RSP_DATAQ_PERR_PAR_ENABLE", 26, 1 },
		{ "GC1_WQDATA_FIFO_PERR_PAR_ENABLE", 25, 1 },
		{ "GC0_WQDATA_FIFO_PERR_PAR_ENABLE", 24, 1 },
		{ "GC1_RDTAG_QUEUE_PERR_PAR_ENABLE", 23, 1 },
		{ "GC0_RDTAG_QUEUE_PERR_PAR_ENABLE", 22, 1 },
		{ "GC1_SRAM_RDTAG_QUEUE_PERR_PAR_ENABLE", 21, 1 },
		{ "GC0_SRAM_RDTAG_QUEUE_PERR_PAR_ENABLE", 20, 1 },
		{ "GC1_RSP_PERR_PAR_ENABLE", 19, 1 },
		{ "GC0_RSP_PERR_PAR_ENABLE", 18, 1 },
		{ "GC1_LRU_UERR_PAR_ENABLE", 17, 1 },
		{ "GC0_LRU_UERR_PAR_ENABLE", 16, 1 },
		{ "GC1_TAG_UERR_PAR_ENABLE", 15, 1 },
		{ "GC0_TAG_UERR_PAR_ENABLE", 14, 1 },
		{ "GC1_LRU_CERR_PAR_ENABLE", 13, 1 },
		{ "GC0_LRU_CERR_PAR_ENABLE", 12, 1 },
		{ "GC1_TAG_CERR_PAR_ENABLE", 11, 1 },
		{ "GC0_TAG_CERR_PAR_ENABLE", 10, 1 },
		{ "GC1_CE_PAR_ENABLE", 9, 1 },
		{ "GC0_CE_PAR_ENABLE", 8, 1 },
		{ "GC1_UE_PAR_ENABLE", 7, 1 },
		{ "GC0_UE_PAR_ENABLE", 6, 1 },
		{ "GC1_CMD_PAR_ENABLE", 5, 1 },
		{ "GC1_DATA_PAR_ENABLE", 4, 1 },
		{ "GC0_CMD_PAR_ENABLE", 3, 1 },
		{ "GC0_DATA_PAR_ENABLE", 2, 1 },
		{ "ILLADDRACCESS1_PAR_ENABLE", 1, 1 },
		{ "ILLADDRACCESS0_PAR_ENABLE", 0, 1 },
	{ "GCACHE_INT_ENABLE", 0x51544, 0 },
		{ "GC1_SRAM_RSP_DATAQ_PERR_INT_ENABLE", 27, 1 },
		{ "GC0_SRAM_RSP_DATAQ_PERR_INT_ENABLE", 26, 1 },
		{ "GC1_WQDATA_FIFO_PERR_INT_ENABLE", 25, 1 },
		{ "GC0_WQDATA_FIFO_PERR_INT_ENABLE", 24, 1 },
		{ "GC1_RDTAG_QUEUE_PERR_INT_ENABLE", 23, 1 },
		{ "GC0_RDTAG_QUEUE_PERR_INT_ENABLE", 22, 1 },
		{ "GC1_SRAM_RDTAG_QUEUE_PERR_INT_ENABLE", 21, 1 },
		{ "GC0_SRAM_RDTAG_QUEUE_PERR_INT_ENABLE", 20, 1 },
		{ "GC1_RSP_PERR_INT_ENABLE", 19, 1 },
		{ "GC0_RSP_PERR_INT_ENABLE", 18, 1 },
		{ "GC1_LRU_UERR_INT_ENABLE", 17, 1 },
		{ "GC0_LRU_UERR_INT_ENABLE", 16, 1 },
		{ "GC1_TAG_UERR_INT_ENABLE", 15, 1 },
		{ "GC0_TAG_UERR_INT_ENABLE", 14, 1 },
		{ "GC1_LRU_CERR_INT_ENABLE", 13, 1 },
		{ "GC0_LRU_CERR_INT_ENABLE", 12, 1 },
		{ "GC1_TAG_CERR_INT_ENABLE", 11, 1 },
		{ "GC0_TAG_CERR_INT_ENABLE", 10, 1 },
		{ "GC1_CE_INT_ENABLE", 9, 1 },
		{ "GC0_CE_INT_ENABLE", 8, 1 },
		{ "GC1_UE_INT_ENABLE", 7, 1 },
		{ "GC0_UE_INT_ENABLE", 6, 1 },
		{ "GC1_CMD_PAR_INT_ENABLE", 5, 1 },
		{ "GC1_DATA_PAR_INT_ENABLE", 4, 1 },
		{ "GC0_CMD_PAR_INT_ENABLE", 3, 1 },
		{ "GC0_DATA_PAR_INT_ENABLE", 2, 1 },
		{ "ILLADDRACCESS1_INT_ENABLE", 1, 1 },
		{ "ILLADDRACCESS0_INT_ENABLE", 0, 1 },
	{ "GCACHE_INT_CAUSE", 0x51548, 0 },
		{ "GC1_SRAM_RSP_DATAQ_PERR_INT_CAUSE", 27, 1 },
		{ "GC0_SRAM_RSP_DATAQ_PERR_INT_CAUSE", 26, 1 },
		{ "GC1_WQDATA_FIFO_PERR_INT_CAUSE", 25, 1 },
		{ "GC0_WQDATA_FIFO_PERR_INT_CAUSE", 24, 1 },
		{ "GC1_RDTAG_QUEUE_PERR_INT_CAUSE", 23, 1 },
		{ "GC0_RDTAG_QUEUE_PERR_INT_CAUSE", 22, 1 },
		{ "GC1_SRAM_RDTAG_QUEUE_PERR_INT_CAUSE", 21, 1 },
		{ "GC0_SRAM_RDTAG_QUEUE_PERR_INT_CAUSE", 20, 1 },
		{ "GC1_RSP_PERR_INT_CAUSE", 19, 1 },
		{ "GC0_RSP_PERR_INT_CAUSE", 18, 1 },
		{ "GC1_LRU_UERR_INT_CAUSE", 17, 1 },
		{ "GC0_LRU_UERR_INT_CAUSE", 16, 1 },
		{ "GC1_TAG_UERR_INT_CAUSE", 15, 1 },
		{ "GC0_TAG_UERR_INT_CAUSE", 14, 1 },
		{ "GC1_LRU_CERR_INT_CAUSE", 13, 1 },
		{ "GC0_LRU_CERR_INT_CAUSE", 12, 1 },
		{ "GC1_TAG_CERR_INT_CAUSE", 11, 1 },
		{ "GC0_TAG_CERR_INT_CAUSE", 10, 1 },
		{ "GC1_CE_INT_CAUSE", 9, 1 },
		{ "GC0_CE_INT_CAUSE", 8, 1 },
		{ "GC1_UE_INT_CAUSE", 7, 1 },
		{ "GC0_UE_INT_CAUSE", 6, 1 },
		{ "GC1_CMD_PAR_INT_CAUSE", 5, 1 },
		{ "GC1_DATA_PAR_INT_CAUSE", 4, 1 },
		{ "GC0_CMD_PAR_INT_CAUSE", 3, 1 },
		{ "GC0_DATA_PAR_INT_CAUSE", 2, 1 },
		{ "ILLADDRACCESS1_INT_CAUSE", 1, 1 },
		{ "ILLADDRACCESS0_INT_CAUSE", 0, 1 },
	{ "GCACHE_DBG_CTL", 0x515f0, 0 },
		{ "DATAH_SEL", 20, 1 },
		{ "EN_DBG", 16, 1 },
		{ "SEL", 0, 8 },
	{ "GCACHE_DBG_DATA", 0x515f4, 0 },
	{ "GCACHE_DBG_SEL_CTRL", 0x51550, 0 },
		{ "SEL_OVR_EN", 31, 1 },
		{ "DEBUG_HI", 16, 1 },
		{ "SELH", 8, 8 },
		{ "SELL", 0, 8 },
	{ "GCACHE_LOCAL_DEBUG_RPT", 0x51554, 0 },
	{ "GCACHE_DBG_ILL_ACC", 0x5155c, 0 },
	{ "GCACHE_DBG_ILL_ADDR0", 0x51560, 0 },
	{ "GCACHE_DBG_ILL_ADDR1", 0x51564, 0 },
	{ "GCACHE_GC0_DBG_ADDR_0_32", 0x51568, 0 },
	{ "GCACHE_GC0_DBG_ADDR_32_32", 0x5156c, 0 },
	{ "GCACHE_GC0_DBG_ADDR_64_32", 0x51570, 0 },
	{ "GCACHE_GC0_DBG_ADDR_96_32", 0x51574, 0 },
	{ "GCACHE_GC0_DBG_ADDR_0_64", 0x51578, 0 },
	{ "GCACHE_GC0_DBG_ADDR_64_64", 0x5157c, 0 },
	{ "GCACHE_GC0_DBG_ADDR_0_96", 0x51580, 0 },
	{ "GCACHE_GC0_DBG_ADDR_32_96", 0x51584, 0 },
	{ "GCACHE_GC1_DBG_ADDR_0_32", 0x5158c, 0 },
	{ "GCACHE_GC1_DBG_ADDR_32_32", 0x51590, 0 },
	{ "GCACHE_GC1_DBG_ADDR_64_32", 0x51594, 0 },
	{ "GCACHE_GC1_DBG_ADDR_96_32", 0x51598, 0 },
	{ "GCACHE_GC1_DBG_ADDR_0_64", 0x5159c, 0 },
	{ "GCACHE_GC1_DBG_ADDR_64_64", 0x515a0, 0 },
	{ "GCACHE_GC1_DBG_ADDR_0_96", 0x515a4, 0 },
	{ "GCACHE_GC1_DBG_ADDR_32_96", 0x515a8, 0 },
	{ "GCACHE_GC0_DBG_ADDR_32_64", 0x515ac, 0 },
	{ "GCACHE_GC1_DBG_ADDR_32_64", 0x515b0, 0 },
	{ "GCACHE_PERF_GC0_EVICT", 0x515b4, 0 },
	{ "GCACHE_PERF_GC1_EVICT", 0x515b8, 0 },
	{ "GCACHE_PERF_GC0_CE_COUNT", 0x515bc, 0 },
	{ "GCACHE_PERF_GC1_CE_COUNT", 0x515c0, 0 },
	{ "GCACHE_PERF_GC0_UE_COUNT", 0x515c4, 0 },
	{ "GCACHE_PERF_GC1_UE_COUNT", 0x515c8, 0 },
	{ NULL }
};