1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/ioctl.h> 33 #include <sys/mman.h> 34 #include <sys/socket.h> 35 #include <sys/stat.h> 36 37 #include <arpa/inet.h> 38 #include <net/ethernet.h> 39 #include <net/sff8472.h> 40 #include <netinet/in.h> 41 42 #include <ctype.h> 43 #include <err.h> 44 #include <errno.h> 45 #include <fcntl.h> 46 #include <limits.h> 47 #include <stdint.h> 48 #include <stdio.h> 49 #include <stdlib.h> 50 #include <string.h> 51 #include <unistd.h> 52 #include <pcap.h> 53 54 #include "t4_ioctl.h" 55 #include "tcb_common.h" 56 57 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 58 #define max(x, y) ((x) > (y) ? (x) : (y)) 59 60 static const char *progname, *nexus; 61 static int chip_id; /* 4 for T4, 5 for T5 */ 62 63 struct reg_info { 64 const char *name; 65 uint32_t addr; 66 uint32_t len; 67 }; 68 69 struct mod_regs { 70 const char *name; 71 const struct reg_info *ri; 72 }; 73 74 struct field_desc { 75 const char *name; /* Field name */ 76 unsigned short start; /* Start bit position */ 77 unsigned short end; /* End bit position */ 78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 79 unsigned char hex; /* Print field in hex instead of decimal */ 80 unsigned char islog2; /* Field contains the base-2 log of the value */ 81 }; 82 83 #include "reg_defs_t4.c" 84 #include "reg_defs_t5.c" 85 #include "reg_defs_t6.c" 86 #include "reg_defs_t4vf.c" 87 88 static void 89 usage(FILE *fp) 90 { 91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 92 fprintf(fp, 93 "\tclearstats <port> clear port statistics\n" 94 "\tcontext <type> <id> show an SGE context\n" 95 "\tdumpstate <dump.bin> dump chip state\n" 96 "\tfilter <idx> [<param> <val>] ... set a filter\n" 97 "\tfilter <idx> delete|clear delete a filter\n" 98 "\tfilter list list all filters\n" 99 "\tfilter mode [<match>] ... get/set global filter mode\n" 100 "\thashfilter [<param> <val>] ... set a hashfilter\n" 101 "\thashfilter <idx> delete|clear delete a hashfilter\n" 102 "\thashfilter list list all hashfilters\n" 103 "\thashfilter mode get global hashfilter mode\n" 104 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 105 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 106 "\tloadboot clear [pf|offset <val>] remove boot image\n" 107 "\tloadboot-cfg <bc.bin> install boot config\n" 108 "\tloadboot-cfg clear remove boot config\n" 109 "\tloadcfg <fw-config.txt> install configuration file\n" 110 "\tloadcfg clear remove configuration file\n" 111 "\tloadfw <fw-image.bin> install firmware\n" 112 "\tmemdump <addr> <len> dump a memory range\n" 113 "\tmodinfo <port> [raw] optics/cable information\n" 114 "\tpolicy <policy.txt> install offload policy\n" 115 "\tpolicy clear remove offload policy\n" 116 "\treg <address>[=<val>] read/write register\n" 117 "\treg64 <address>[=<val>] read/write 64 bit register\n" 118 "\tregdump [<module>] ... dump registers\n" 119 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 120 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 121 "\tstdio interactive mode\n" 122 "\ttcb <tid> read TCB\n" 123 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 124 "\ttracer <idx> disable|enable disable or enable a tracer\n" 125 "\ttracer list list all tracers\n" 126 ); 127 } 128 129 static inline unsigned int 130 get_card_vers(unsigned int version) 131 { 132 return (version & 0x3ff); 133 } 134 135 static int 136 real_doit(unsigned long cmd, void *data, const char *cmdstr) 137 { 138 static int fd = -1; 139 int rc = 0; 140 141 if (fd == -1) { 142 char buf[64]; 143 144 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 145 if ((fd = open(buf, O_RDWR)) < 0) { 146 warn("open(%s)", nexus); 147 rc = errno; 148 return (rc); 149 } 150 chip_id = nexus[1] - '0'; 151 } 152 153 rc = ioctl(fd, cmd, data); 154 if (rc < 0) { 155 warn("%s", cmdstr); 156 rc = errno; 157 } 158 159 return (rc); 160 } 161 #define doit(x, y) real_doit(x, y, #x) 162 163 static char * 164 str_to_number(const char *s, long *val, long long *vall) 165 { 166 char *p; 167 168 if (vall) 169 *vall = strtoll(s, &p, 0); 170 else if (val) 171 *val = strtol(s, &p, 0); 172 else 173 p = NULL; 174 175 return (p); 176 } 177 178 static int 179 read_reg(long addr, int size, long long *val) 180 { 181 struct t4_reg reg; 182 int rc; 183 184 reg.addr = (uint32_t) addr; 185 reg.size = (uint32_t) size; 186 reg.val = 0; 187 188 rc = doit(CHELSIO_T4_GETREG, ®); 189 190 *val = reg.val; 191 192 return (rc); 193 } 194 195 static int 196 write_reg(long addr, int size, long long val) 197 { 198 struct t4_reg reg; 199 200 reg.addr = (uint32_t) addr; 201 reg.size = (uint32_t) size; 202 reg.val = (uint64_t) val; 203 204 return doit(CHELSIO_T4_SETREG, ®); 205 } 206 207 static int 208 register_io(int argc, const char *argv[], int size) 209 { 210 char *p, *v; 211 long addr; 212 long long val; 213 int w = 0, rc; 214 215 if (argc == 1) { 216 /* <reg> OR <reg>=<value> */ 217 218 p = str_to_number(argv[0], &addr, NULL); 219 if (*p) { 220 if (*p != '=') { 221 warnx("invalid register \"%s\"", argv[0]); 222 return (EINVAL); 223 } 224 225 w = 1; 226 v = p + 1; 227 p = str_to_number(v, NULL, &val); 228 229 if (*p) { 230 warnx("invalid value \"%s\"", v); 231 return (EINVAL); 232 } 233 } 234 235 } else if (argc == 2) { 236 /* <reg> <value> */ 237 238 w = 1; 239 240 p = str_to_number(argv[0], &addr, NULL); 241 if (*p) { 242 warnx("invalid register \"%s\"", argv[0]); 243 return (EINVAL); 244 } 245 246 p = str_to_number(argv[1], NULL, &val); 247 if (*p) { 248 warnx("invalid value \"%s\"", argv[1]); 249 return (EINVAL); 250 } 251 } else { 252 warnx("reg: invalid number of arguments (%d)", argc); 253 return (EINVAL); 254 } 255 256 if (w) 257 rc = write_reg(addr, size, val); 258 else { 259 rc = read_reg(addr, size, &val); 260 if (rc == 0) 261 printf("0x%llx [%llu]\n", val, val); 262 } 263 264 return (rc); 265 } 266 267 static inline uint32_t 268 xtract(uint32_t val, int shift, int len) 269 { 270 return (val >> shift) & ((1 << len) - 1); 271 } 272 273 static int 274 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 275 { 276 uint32_t reg_val = 0; 277 278 for ( ; reg_array->name; ++reg_array) 279 if (!reg_array->len) { 280 reg_val = regs[reg_array->addr / 4]; 281 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 282 reg_array->name, reg_val, reg_val); 283 } else { 284 uint32_t v = xtract(reg_val, reg_array->addr, 285 reg_array->len); 286 287 printf(" %*u:%u %-47s %#-10x %u\n", 288 reg_array->addr < 10 ? 3 : 2, 289 reg_array->addr + reg_array->len - 1, 290 reg_array->addr, reg_array->name, v, v); 291 } 292 293 return (1); 294 } 295 296 static int 297 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 298 const struct mod_regs *modtab, int nmodules) 299 { 300 int i, j, match; 301 302 for (i = 0; i < argc; i++) { 303 for (j = 0; j < nmodules; j++) { 304 if (!strcmp(argv[i], modtab[j].name)) 305 break; 306 } 307 308 if (j == nmodules) { 309 warnx("invalid register block \"%s\"", argv[i]); 310 fprintf(stderr, "\nAvailable blocks:"); 311 for ( ; nmodules; nmodules--, modtab++) 312 fprintf(stderr, " %s", modtab->name); 313 fprintf(stderr, "\n"); 314 return (EINVAL); 315 } 316 } 317 318 for ( ; nmodules; nmodules--, modtab++) { 319 320 match = argc == 0 ? 1 : 0; 321 for (i = 0; !match && i < argc; i++) { 322 if (!strcmp(argv[i], modtab->name)) 323 match = 1; 324 } 325 326 if (match) 327 dump_block_regs(modtab->ri, regs); 328 } 329 330 return (0); 331 } 332 333 #define T4_MODREGS(name) { #name, t4_##name##_regs } 334 static int 335 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 336 { 337 static struct mod_regs t4_mod[] = { 338 T4_MODREGS(sge), 339 { "pci", t4_pcie_regs }, 340 T4_MODREGS(dbg), 341 T4_MODREGS(mc), 342 T4_MODREGS(ma), 343 { "edc0", t4_edc_0_regs }, 344 { "edc1", t4_edc_1_regs }, 345 T4_MODREGS(cim), 346 T4_MODREGS(tp), 347 T4_MODREGS(ulp_rx), 348 T4_MODREGS(ulp_tx), 349 { "pmrx", t4_pm_rx_regs }, 350 { "pmtx", t4_pm_tx_regs }, 351 T4_MODREGS(mps), 352 { "cplsw", t4_cpl_switch_regs }, 353 T4_MODREGS(smb), 354 { "i2c", t4_i2cm_regs }, 355 T4_MODREGS(mi), 356 T4_MODREGS(uart), 357 T4_MODREGS(pmu), 358 T4_MODREGS(sf), 359 T4_MODREGS(pl), 360 T4_MODREGS(le), 361 T4_MODREGS(ncsi), 362 T4_MODREGS(xgmac) 363 }; 364 365 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 366 } 367 #undef T4_MODREGS 368 369 #define T5_MODREGS(name) { #name, t5_##name##_regs } 370 static int 371 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 372 { 373 static struct mod_regs t5_mod[] = { 374 T5_MODREGS(sge), 375 { "pci", t5_pcie_regs }, 376 T5_MODREGS(dbg), 377 { "mc0", t5_mc_0_regs }, 378 { "mc1", t5_mc_1_regs }, 379 T5_MODREGS(ma), 380 { "edc0", t5_edc_t50_regs }, 381 { "edc1", t5_edc_t51_regs }, 382 T5_MODREGS(cim), 383 T5_MODREGS(tp), 384 { "ulprx", t5_ulp_rx_regs }, 385 { "ulptx", t5_ulp_tx_regs }, 386 { "pmrx", t5_pm_rx_regs }, 387 { "pmtx", t5_pm_tx_regs }, 388 T5_MODREGS(mps), 389 { "cplsw", t5_cpl_switch_regs }, 390 T5_MODREGS(smb), 391 { "i2c", t5_i2cm_regs }, 392 T5_MODREGS(mi), 393 T5_MODREGS(uart), 394 T5_MODREGS(pmu), 395 T5_MODREGS(sf), 396 T5_MODREGS(pl), 397 T5_MODREGS(le), 398 T5_MODREGS(ncsi), 399 T5_MODREGS(mac), 400 { "hma", t5_hma_t5_regs } 401 }; 402 403 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 404 } 405 #undef T5_MODREGS 406 407 #define T6_MODREGS(name) { #name, t6_##name##_regs } 408 static int 409 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 410 { 411 static struct mod_regs t6_mod[] = { 412 T6_MODREGS(sge), 413 { "pci", t6_pcie_regs }, 414 T6_MODREGS(dbg), 415 { "mc0", t6_mc_0_regs }, 416 T6_MODREGS(ma), 417 { "edc0", t6_edc_t60_regs }, 418 { "edc1", t6_edc_t61_regs }, 419 T6_MODREGS(cim), 420 T6_MODREGS(tp), 421 { "ulprx", t6_ulp_rx_regs }, 422 { "ulptx", t6_ulp_tx_regs }, 423 { "pmrx", t6_pm_rx_regs }, 424 { "pmtx", t6_pm_tx_regs }, 425 T6_MODREGS(mps), 426 { "cplsw", t6_cpl_switch_regs }, 427 T6_MODREGS(smb), 428 { "i2c", t6_i2cm_regs }, 429 T6_MODREGS(mi), 430 T6_MODREGS(uart), 431 T6_MODREGS(pmu), 432 T6_MODREGS(sf), 433 T6_MODREGS(pl), 434 T6_MODREGS(le), 435 T6_MODREGS(ncsi), 436 T6_MODREGS(mac), 437 { "hma", t6_hma_t6_regs } 438 }; 439 440 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 441 } 442 #undef T6_MODREGS 443 444 static int 445 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 446 { 447 static struct mod_regs t4vf_mod[] = { 448 { "sge", t4vf_sge_regs }, 449 { "mps", t4vf_mps_regs }, 450 { "pl", t4vf_pl_regs }, 451 { "mbdata", t4vf_mbdata_regs }, 452 { "cim", t4vf_cim_regs }, 453 }; 454 455 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 456 } 457 458 static int 459 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 460 { 461 static struct mod_regs t5vf_mod[] = { 462 { "sge", t5vf_sge_regs }, 463 { "mps", t4vf_mps_regs }, 464 { "pl", t5vf_pl_regs }, 465 { "mbdata", t4vf_mbdata_regs }, 466 { "cim", t4vf_cim_regs }, 467 }; 468 469 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 470 } 471 472 static int 473 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 474 { 475 static struct mod_regs t6vf_mod[] = { 476 { "sge", t5vf_sge_regs }, 477 { "mps", t4vf_mps_regs }, 478 { "pl", t6vf_pl_regs }, 479 { "mbdata", t4vf_mbdata_regs }, 480 { "cim", t4vf_cim_regs }, 481 }; 482 483 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 484 } 485 486 static int 487 dump_regs(int argc, const char *argv[]) 488 { 489 int vers, revision, rc; 490 struct t4_regdump regs; 491 uint32_t len; 492 493 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 494 regs.data = calloc(1, len); 495 if (regs.data == NULL) { 496 warnc(ENOMEM, "regdump"); 497 return (ENOMEM); 498 } 499 500 regs.len = len; 501 rc = doit(CHELSIO_T4_REGDUMP, ®s); 502 if (rc != 0) 503 return (rc); 504 505 vers = get_card_vers(regs.version); 506 revision = (regs.version >> 10) & 0x3f; 507 508 if (vers == 4) { 509 if (revision == 0x3f) 510 rc = dump_regs_t4vf(argc, argv, regs.data); 511 else 512 rc = dump_regs_t4(argc, argv, regs.data); 513 } else if (vers == 5) { 514 if (revision == 0x3f) 515 rc = dump_regs_t5vf(argc, argv, regs.data); 516 else 517 rc = dump_regs_t5(argc, argv, regs.data); 518 } else if (vers == 6) { 519 if (revision == 0x3f) 520 rc = dump_regs_t6vf(argc, argv, regs.data); 521 else 522 rc = dump_regs_t6(argc, argv, regs.data); 523 } else { 524 warnx("%s (type %d, rev %d) is not a known card.", 525 nexus, vers, revision); 526 return (ENOTSUP); 527 } 528 529 free(regs.data); 530 return (rc); 531 } 532 533 static void 534 do_show_info_header(uint32_t mode) 535 { 536 uint32_t i; 537 538 printf("%4s %8s", "Idx", "Hits"); 539 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 540 switch (mode & i) { 541 case T4_FILTER_FCoE: 542 printf(" FCoE"); 543 break; 544 545 case T4_FILTER_PORT: 546 printf(" Port"); 547 break; 548 549 case T4_FILTER_VNIC: 550 if (mode & T4_FILTER_IC_VNIC) 551 printf(" VFvld:PF:VF"); 552 else 553 printf(" vld:oVLAN"); 554 break; 555 556 case T4_FILTER_VLAN: 557 printf(" vld:VLAN"); 558 break; 559 560 case T4_FILTER_IP_TOS: 561 printf(" TOS"); 562 break; 563 564 case T4_FILTER_IP_PROTO: 565 printf(" Prot"); 566 break; 567 568 case T4_FILTER_ETH_TYPE: 569 printf(" EthType"); 570 break; 571 572 case T4_FILTER_MAC_IDX: 573 printf(" MACIdx"); 574 break; 575 576 case T4_FILTER_MPS_HIT_TYPE: 577 printf(" MPS"); 578 break; 579 580 case T4_FILTER_IP_FRAGMENT: 581 printf(" Frag"); 582 break; 583 584 default: 585 /* compressed filter field not enabled */ 586 break; 587 } 588 } 589 printf(" %20s %20s %9s %9s %s\n", 590 "DIP", "SIP", "DPORT", "SPORT", "Action"); 591 } 592 593 /* 594 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 595 * ordered tuple. If the parameter name in the argument sub-vector does not 596 * match the passed in parameter name, then a zero is returned for the 597 * function and no parsing is performed. If there is a match, then the value 598 * and optional mask are parsed and returned in the provided return value 599 * pointers. If no optional mask is specified, then a default mask of all 1s 600 * will be returned. 601 * 602 * An error in parsing the value[:mask] will result in an error message and 603 * program termination. 604 */ 605 static int 606 parse_val_mask(const char *param, const char *args[], uint32_t *val, 607 uint32_t *mask, int hashfilter) 608 { 609 long l; 610 char *p; 611 612 if (strcmp(param, args[0]) != 0) 613 return (EINVAL); 614 615 p = str_to_number(args[1], &l, NULL); 616 if (l >= 0 && l <= UINT32_MAX) { 617 *val = (uint32_t)l; 618 if (p > args[1]) { 619 if (p[0] == 0) { 620 *mask = ~0; 621 return (0); 622 } 623 624 if (p[0] == ':' && p[1] != 0) { 625 if (hashfilter) { 626 warnx("param %s: mask not allowed for " 627 "hashfilter or nat params", param); 628 return (EINVAL); 629 } 630 p = str_to_number(p + 1, &l, NULL); 631 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 632 *mask = (uint32_t)l; 633 return (0); 634 } 635 } 636 } 637 } 638 639 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 640 args[0], args[1]); 641 642 return (EINVAL); 643 } 644 645 /* 646 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 647 * ordered tuple. If the parameter name in the argument sub-vector does not 648 * match the passed in parameter name, then a zero is returned for the 649 * function and no parsing is performed. If there is a match, then the value 650 * and optional mask are parsed and returned in the provided return value 651 * pointers. If no optional mask is specified, then a default mask of all 1s 652 * will be returned. 653 * 654 * The value return parameter "afp" is used to specify the expected address 655 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 656 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 657 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 658 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 659 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 660 * returned in the first four bytes of the address and mask return values with 661 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 662 * 1, 2, 3}, respectively. 663 * 664 * An error in parsing the value[:mask] will result in an error message and 665 * program termination. 666 */ 667 static int 668 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 669 uint8_t mask[], int maskless) 670 { 671 const char *colon, *afn; 672 char *slash; 673 uint8_t *m; 674 int af, ret; 675 unsigned int masksize; 676 677 /* 678 * Is this our parameter? 679 */ 680 if (strcmp(param, args[0]) != 0) 681 return (EINVAL); 682 683 /* 684 * Fundamental IPv4 versus IPv6 selection. 685 */ 686 colon = strchr(args[1], ':'); 687 if (!colon) { 688 afn = "IPv4"; 689 af = AF_INET; 690 masksize = 32; 691 } else { 692 afn = "IPv6"; 693 af = AF_INET6; 694 masksize = 128; 695 } 696 if (*afp == AF_UNSPEC) 697 *afp = af; 698 else if (*afp != af) { 699 warnx("address %s is not of expected family %s", 700 args[1], *afp == AF_INET ? "IP" : "IPv6"); 701 return (EINVAL); 702 } 703 704 /* 705 * Parse address (temporarily stripping off any "/mask" 706 * specification). 707 */ 708 slash = strchr(args[1], '/'); 709 if (slash) 710 *slash = 0; 711 ret = inet_pton(af, args[1], addr); 712 if (slash) 713 *slash = '/'; 714 if (ret <= 0) { 715 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 716 return (EINVAL); 717 } 718 719 /* 720 * Parse optional mask specification. 721 */ 722 if (slash) { 723 char *p; 724 unsigned int prefix = strtoul(slash + 1, &p, 10); 725 726 if (maskless) { 727 warnx("mask cannot be provided for maskless specification"); 728 return (EINVAL); 729 } 730 731 if (p == slash + 1) { 732 warnx("missing address prefix for %s", param); 733 return (EINVAL); 734 } 735 if (*p) { 736 warnx("%s is not a valid address prefix", slash + 1); 737 return (EINVAL); 738 } 739 if (prefix > masksize) { 740 warnx("prefix %u is too long for an %s address", 741 prefix, afn); 742 return (EINVAL); 743 } 744 memset(mask, 0, masksize / 8); 745 masksize = prefix; 746 } 747 748 if (mask != NULL) { 749 /* 750 * Fill in mask. 751 */ 752 for (m = mask; masksize >= 8; m++, masksize -= 8) 753 *m = ~0; 754 if (masksize) 755 *m = ~0 << (8 - masksize); 756 } 757 758 return (0); 759 } 760 761 /* 762 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 763 * tuple. If the parameter name in the argument sub-vector does not match the 764 * passed in parameter name, then a zero is returned for the function and no 765 * parsing is performed. If there is a match, then the value is parsed and 766 * returned in the provided return value pointer. 767 */ 768 static int 769 parse_val(const char *param, const char *args[], uint32_t *val) 770 { 771 char *p; 772 long l; 773 774 if (strcmp(param, args[0]) != 0) 775 return (EINVAL); 776 777 p = str_to_number(args[1], &l, NULL); 778 if (*p || l < 0 || l > UINT32_MAX) { 779 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 780 return (EINVAL); 781 } 782 783 *val = (uint32_t)l; 784 return (0); 785 } 786 787 static void 788 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 789 { 790 int noctets, octet; 791 792 printf(" "); 793 if (type == 0) { 794 noctets = 4; 795 printf("%3s", " "); 796 } else 797 noctets = 16; 798 799 for (octet = 0; octet < noctets; octet++) 800 printf("%02x", addr[octet]); 801 printf("/"); 802 for (octet = 0; octet < noctets; octet++) 803 printf("%02x", addrm[octet]); 804 } 805 806 static void 807 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 808 { 809 uint32_t i; 810 811 printf("%4d", t->idx); 812 if (t->hits == UINT64_MAX) 813 printf(" %8s", "-"); 814 else 815 printf(" %8ju", t->hits); 816 817 /* 818 * Compressed header portion of filter. 819 */ 820 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 821 switch (mode & i) { 822 case T4_FILTER_FCoE: 823 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 824 break; 825 826 case T4_FILTER_PORT: 827 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 828 break; 829 830 case T4_FILTER_VNIC: 831 if (mode & T4_FILTER_IC_VNIC) { 832 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 833 t->fs.val.pfvf_vld, 834 (t->fs.val.vnic >> 13) & 0x7, 835 t->fs.val.vnic & 0x1fff, 836 t->fs.mask.pfvf_vld, 837 (t->fs.mask.vnic >> 13) & 0x7, 838 t->fs.mask.vnic & 0x1fff); 839 } else { 840 printf(" %1d:%04x/%1d:%04x", 841 t->fs.val.ovlan_vld, t->fs.val.vnic, 842 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 843 } 844 break; 845 846 case T4_FILTER_VLAN: 847 printf(" %1d:%04x/%1d:%04x", 848 t->fs.val.vlan_vld, t->fs.val.vlan, 849 t->fs.mask.vlan_vld, t->fs.mask.vlan); 850 break; 851 852 case T4_FILTER_IP_TOS: 853 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 854 break; 855 856 case T4_FILTER_IP_PROTO: 857 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 858 break; 859 860 case T4_FILTER_ETH_TYPE: 861 printf(" %04x/%04x", t->fs.val.ethtype, 862 t->fs.mask.ethtype); 863 break; 864 865 case T4_FILTER_MAC_IDX: 866 printf(" %03x/%03x", t->fs.val.macidx, 867 t->fs.mask.macidx); 868 break; 869 870 case T4_FILTER_MPS_HIT_TYPE: 871 printf(" %1x/%1x", t->fs.val.matchtype, 872 t->fs.mask.matchtype); 873 break; 874 875 case T4_FILTER_IP_FRAGMENT: 876 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 877 break; 878 879 default: 880 /* compressed filter field not enabled */ 881 break; 882 } 883 } 884 885 /* 886 * Fixed portion of filter. 887 */ 888 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 889 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 890 printf(" %04x/%04x %04x/%04x", 891 t->fs.val.dport, t->fs.mask.dport, 892 t->fs.val.sport, t->fs.mask.sport); 893 894 /* 895 * Variable length filter action. 896 */ 897 if (t->fs.action == FILTER_DROP) 898 printf(" Drop"); 899 else if (t->fs.action == FILTER_SWITCH) { 900 printf(" Switch: port=%d", t->fs.eport); 901 if (t->fs.newdmac) 902 printf( 903 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 904 ", l2tidx=%d", 905 t->fs.dmac[0], t->fs.dmac[1], 906 t->fs.dmac[2], t->fs.dmac[3], 907 t->fs.dmac[4], t->fs.dmac[5], 908 t->l2tidx); 909 if (t->fs.newsmac) 910 printf( 911 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 912 ", smtidx=%d", 913 t->fs.smac[0], t->fs.smac[1], 914 t->fs.smac[2], t->fs.smac[3], 915 t->fs.smac[4], t->fs.smac[5], 916 t->smtidx); 917 if (t->fs.newvlan == VLAN_REMOVE) 918 printf(", vlan=none"); 919 else if (t->fs.newvlan == VLAN_INSERT) 920 printf(", vlan=insert(%x)", t->fs.vlan); 921 else if (t->fs.newvlan == VLAN_REWRITE) 922 printf(", vlan=rewrite(%x)", t->fs.vlan); 923 } else { 924 printf(" Pass: Q="); 925 if (t->fs.dirsteer == 0) { 926 printf("RSS"); 927 if (t->fs.maskhash) 928 printf("(TCB=hash)"); 929 } else { 930 printf("%d", t->fs.iq); 931 if (t->fs.dirsteerhash == 0) 932 printf("(QID)"); 933 else 934 printf("(hash)"); 935 } 936 } 937 if (t->fs.prio) 938 printf(" Prio"); 939 if (t->fs.rpttid) 940 printf(" RptTID"); 941 printf("\n"); 942 } 943 944 static int 945 show_filters(int hash) 946 { 947 uint32_t mode = 0, header = 0; 948 struct t4_filter t; 949 int rc; 950 951 /* Get the global filter mode first */ 952 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 953 if (rc != 0) 954 return (rc); 955 956 t.idx = 0; 957 t.fs.hash = hash; 958 for (t.idx = 0; ; t.idx++) { 959 rc = doit(CHELSIO_T4_GET_FILTER, &t); 960 if (rc != 0 || t.idx == 0xffffffff) 961 break; 962 963 if (!header) { 964 do_show_info_header(mode); 965 header = 1; 966 } 967 do_show_one_filter_info(&t, mode); 968 }; 969 970 return (rc); 971 } 972 973 static int 974 get_filter_mode(int hashfilter) 975 { 976 uint32_t mode = hashfilter; 977 int rc; 978 979 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 980 if (rc != 0) 981 return (rc); 982 983 if (mode & T4_FILTER_IPv4) 984 printf("ipv4 "); 985 986 if (mode & T4_FILTER_IPv6) 987 printf("ipv6 "); 988 989 if (mode & T4_FILTER_IP_SADDR) 990 printf("sip "); 991 992 if (mode & T4_FILTER_IP_DADDR) 993 printf("dip "); 994 995 if (mode & T4_FILTER_IP_SPORT) 996 printf("sport "); 997 998 if (mode & T4_FILTER_IP_DPORT) 999 printf("dport "); 1000 1001 if (mode & T4_FILTER_IP_FRAGMENT) 1002 printf("frag "); 1003 1004 if (mode & T4_FILTER_MPS_HIT_TYPE) 1005 printf("matchtype "); 1006 1007 if (mode & T4_FILTER_MAC_IDX) 1008 printf("macidx "); 1009 1010 if (mode & T4_FILTER_ETH_TYPE) 1011 printf("ethtype "); 1012 1013 if (mode & T4_FILTER_IP_PROTO) 1014 printf("proto "); 1015 1016 if (mode & T4_FILTER_IP_TOS) 1017 printf("tos "); 1018 1019 if (mode & T4_FILTER_VLAN) 1020 printf("vlan "); 1021 1022 if (mode & T4_FILTER_VNIC) { 1023 if (mode & T4_FILTER_IC_VNIC) 1024 printf("vnic_id "); 1025 else 1026 printf("ovlan "); 1027 } 1028 1029 if (mode & T4_FILTER_PORT) 1030 printf("iport "); 1031 1032 if (mode & T4_FILTER_FCoE) 1033 printf("fcoe "); 1034 1035 printf("\n"); 1036 1037 return (0); 1038 } 1039 1040 static int 1041 set_filter_mode(int argc, const char *argv[]) 1042 { 1043 uint32_t mode = 0; 1044 int vnic = 0, ovlan = 0; 1045 1046 for (; argc; argc--, argv++) { 1047 if (!strcmp(argv[0], "frag")) 1048 mode |= T4_FILTER_IP_FRAGMENT; 1049 1050 if (!strcmp(argv[0], "matchtype")) 1051 mode |= T4_FILTER_MPS_HIT_TYPE; 1052 1053 if (!strcmp(argv[0], "macidx")) 1054 mode |= T4_FILTER_MAC_IDX; 1055 1056 if (!strcmp(argv[0], "ethtype")) 1057 mode |= T4_FILTER_ETH_TYPE; 1058 1059 if (!strcmp(argv[0], "proto")) 1060 mode |= T4_FILTER_IP_PROTO; 1061 1062 if (!strcmp(argv[0], "tos")) 1063 mode |= T4_FILTER_IP_TOS; 1064 1065 if (!strcmp(argv[0], "vlan")) 1066 mode |= T4_FILTER_VLAN; 1067 1068 if (!strcmp(argv[0], "ovlan")) { 1069 mode |= T4_FILTER_VNIC; 1070 ovlan++; 1071 } 1072 1073 if (!strcmp(argv[0], "vnic_id")) { 1074 mode |= T4_FILTER_VNIC; 1075 mode |= T4_FILTER_IC_VNIC; 1076 vnic++; 1077 } 1078 1079 if (!strcmp(argv[0], "iport")) 1080 mode |= T4_FILTER_PORT; 1081 1082 if (!strcmp(argv[0], "fcoe")) 1083 mode |= T4_FILTER_FCoE; 1084 } 1085 1086 if (vnic > 0 && ovlan > 0) { 1087 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1088 return (EINVAL); 1089 } 1090 1091 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1092 } 1093 1094 static int 1095 del_filter(uint32_t idx, int hashfilter) 1096 { 1097 struct t4_filter t; 1098 1099 t.fs.hash = hashfilter; 1100 t.idx = idx; 1101 1102 return doit(CHELSIO_T4_DEL_FILTER, &t); 1103 } 1104 1105 static int 1106 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1107 { 1108 int rc, af = AF_UNSPEC, start_arg = 0; 1109 struct t4_filter t; 1110 1111 if (argc < 2) { 1112 warnc(EINVAL, "%s", __func__); 1113 return (EINVAL); 1114 }; 1115 bzero(&t, sizeof (t)); 1116 t.idx = idx; 1117 t.fs.hitcnts = 1; 1118 t.fs.hash = hash; 1119 1120 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1121 const char **args = &argv[start_arg]; 1122 uint32_t val, mask; 1123 1124 if (!strcmp(argv[start_arg], "type")) { 1125 int newaf; 1126 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1127 newaf = AF_INET; 1128 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1129 newaf = AF_INET6; 1130 else { 1131 warnx("invalid type \"%s\"; " 1132 "must be one of \"ipv4\" or \"ipv6\"", 1133 argv[start_arg + 1]); 1134 return (EINVAL); 1135 } 1136 1137 if (af != AF_UNSPEC && af != newaf) { 1138 warnx("conflicting IPv4/IPv6 specifications."); 1139 return (EINVAL); 1140 } 1141 af = newaf; 1142 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1143 t.fs.val.fcoe = val; 1144 t.fs.mask.fcoe = mask; 1145 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1146 t.fs.val.iport = val; 1147 t.fs.mask.iport = mask; 1148 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1149 t.fs.val.vnic = val; 1150 t.fs.mask.vnic = mask; 1151 t.fs.val.ovlan_vld = 1; 1152 t.fs.mask.ovlan_vld = 1; 1153 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1154 t.fs.val.vlan = val; 1155 t.fs.mask.vlan = mask; 1156 t.fs.val.vlan_vld = 1; 1157 t.fs.mask.vlan_vld = 1; 1158 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1159 t.fs.val.vnic &= 0x1fff; 1160 t.fs.val.vnic |= (val & 0x7) << 13; 1161 t.fs.mask.vnic &= 0x1fff; 1162 t.fs.mask.vnic |= (mask & 0x7) << 13; 1163 t.fs.val.pfvf_vld = 1; 1164 t.fs.mask.pfvf_vld = 1; 1165 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1166 t.fs.val.vnic &= 0xe000; 1167 t.fs.val.vnic |= val & 0x1fff; 1168 t.fs.mask.vnic &= 0xe000; 1169 t.fs.mask.vnic |= mask & 0x1fff; 1170 t.fs.val.pfvf_vld = 1; 1171 t.fs.mask.pfvf_vld = 1; 1172 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1173 t.fs.val.tos = val; 1174 t.fs.mask.tos = mask; 1175 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1176 t.fs.val.proto = val; 1177 t.fs.mask.proto = mask; 1178 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1179 t.fs.val.ethtype = val; 1180 t.fs.mask.ethtype = mask; 1181 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1182 t.fs.val.macidx = val; 1183 t.fs.mask.macidx = mask; 1184 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1185 t.fs.val.matchtype = val; 1186 t.fs.mask.matchtype = mask; 1187 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1188 t.fs.val.frag = val; 1189 t.fs.mask.frag = mask; 1190 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1191 t.fs.val.dport = val; 1192 t.fs.mask.dport = mask; 1193 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1194 t.fs.val.sport = val; 1195 t.fs.mask.sport = mask; 1196 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1197 t.fs.mask.dip, hash)) { 1198 /* nada */; 1199 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1200 t.fs.mask.sip, hash)) { 1201 /* nada */; 1202 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1203 /*nada*/; 1204 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1205 /*nada*/ 1206 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1207 t.fs.nat_dport = val; 1208 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1209 t.fs.nat_sport = val; 1210 } else if (!strcmp(argv[start_arg], "action")) { 1211 if (!strcmp(argv[start_arg + 1], "pass")) 1212 t.fs.action = FILTER_PASS; 1213 else if (!strcmp(argv[start_arg + 1], "drop")) 1214 t.fs.action = FILTER_DROP; 1215 else if (!strcmp(argv[start_arg + 1], "switch")) 1216 t.fs.action = FILTER_SWITCH; 1217 else { 1218 warnx("invalid action \"%s\"; must be one of" 1219 " \"pass\", \"drop\" or \"switch\"", 1220 argv[start_arg + 1]); 1221 return (EINVAL); 1222 } 1223 } else if (!parse_val("hitcnts", args, &val)) { 1224 t.fs.hitcnts = val; 1225 } else if (!parse_val("prio", args, &val)) { 1226 t.fs.prio = val; 1227 } else if (!parse_val("rpttid", args, &val)) { 1228 t.fs.rpttid = 1; 1229 } else if (!parse_val("queue", args, &val)) { 1230 t.fs.dirsteer = 1; 1231 t.fs.iq = val; 1232 } else if (!parse_val("tcbhash", args, &val)) { 1233 t.fs.maskhash = 1; 1234 t.fs.dirsteerhash = 1; 1235 } else if (!parse_val("eport", args, &val)) { 1236 t.fs.eport = val; 1237 } else if (!parse_val("swapmac", args, &val)) { 1238 t.fs.swapmac = 1; 1239 } else if (!strcmp(argv[start_arg], "nat")) { 1240 if (!strcmp(argv[start_arg + 1], "dip")) 1241 t.fs.nat_mode = NAT_MODE_DIP; 1242 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1243 t.fs.nat_mode = NAT_MODE_DIP_DP; 1244 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1245 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1246 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1247 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1248 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1249 t.fs.nat_mode = NAT_MODE_SIP_SP; 1250 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1251 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1252 else if (!strcmp(argv[start_arg + 1], "all")) 1253 t.fs.nat_mode = NAT_MODE_ALL; 1254 else { 1255 warnx("unknown nat type \"%s\"; known types are dip, " 1256 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1257 "dip-sip-sp, and all", argv[start_arg + 1]); 1258 return (EINVAL); 1259 } 1260 } else if (!parse_val("natseq", args, &val)) { 1261 t.fs.nat_seq_chk = val; 1262 } else if (!parse_val("natflag", args, &val)) { 1263 t.fs.nat_flag_chk = 1; 1264 } else if (!strcmp(argv[start_arg], "dmac")) { 1265 struct ether_addr *daddr; 1266 1267 daddr = ether_aton(argv[start_arg + 1]); 1268 if (daddr == NULL) { 1269 warnx("invalid dmac address \"%s\"", 1270 argv[start_arg + 1]); 1271 return (EINVAL); 1272 } 1273 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1274 t.fs.newdmac = 1; 1275 } else if (!strcmp(argv[start_arg], "smac")) { 1276 struct ether_addr *saddr; 1277 1278 saddr = ether_aton(argv[start_arg + 1]); 1279 if (saddr == NULL) { 1280 warnx("invalid smac address \"%s\"", 1281 argv[start_arg + 1]); 1282 return (EINVAL); 1283 } 1284 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1285 t.fs.newsmac = 1; 1286 } else if (!strcmp(argv[start_arg], "vlan")) { 1287 char *p; 1288 if (!strcmp(argv[start_arg + 1], "none")) { 1289 t.fs.newvlan = VLAN_REMOVE; 1290 } else if (argv[start_arg + 1][0] == '=') { 1291 t.fs.newvlan = VLAN_REWRITE; 1292 } else if (argv[start_arg + 1][0] == '+') { 1293 t.fs.newvlan = VLAN_INSERT; 1294 } else if (isdigit(argv[start_arg + 1][0]) && 1295 !parse_val_mask("vlan", args, &val, &mask, hash)) { 1296 t.fs.val.vlan = val; 1297 t.fs.mask.vlan = mask; 1298 t.fs.val.vlan_vld = 1; 1299 t.fs.mask.vlan_vld = 1; 1300 } else { 1301 warnx("unknown vlan parameter \"%s\"; must" 1302 " be one of \"none\", \"=<vlan>\", " 1303 " \"+<vlan>\", or \"<vlan>\"", 1304 argv[start_arg + 1]); 1305 return (EINVAL); 1306 } 1307 if (t.fs.newvlan == VLAN_REWRITE || 1308 t.fs.newvlan == VLAN_INSERT) { 1309 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1310 &p, 0); 1311 if (p == argv[start_arg + 1] + 1 || p[0] != 0) { 1312 warnx("invalid vlan \"%s\"", 1313 argv[start_arg + 1]); 1314 return (EINVAL); 1315 } 1316 } 1317 } else { 1318 warnx("invalid parameter \"%s\"", argv[start_arg]); 1319 return (EINVAL); 1320 } 1321 } 1322 if (start_arg != argc) { 1323 warnx("no value for \"%s\"", argv[start_arg]); 1324 return (EINVAL); 1325 } 1326 1327 /* 1328 * Check basic sanity of option combinations. 1329 */ 1330 if (t.fs.action != FILTER_SWITCH && 1331 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1332 t.fs.swapmac || t.fs.nat_mode)) { 1333 warnx("port, dmac, smac, vlan, and nat only make sense with" 1334 " \"action switch\""); 1335 return (EINVAL); 1336 } 1337 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1338 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1339 warnx("nat params only make sense with valid nat mode"); 1340 return (EINVAL); 1341 } 1342 if (t.fs.action != FILTER_PASS && 1343 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1344 warnx("rpttid, queue and tcbhash don't make sense with" 1345 " action \"drop\" or \"switch\""); 1346 return (EINVAL); 1347 } 1348 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1349 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1350 return (EINVAL); 1351 } 1352 1353 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1354 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1355 if (hash && rc == 0) 1356 printf("%d\n", t.idx); 1357 return (rc); 1358 } 1359 1360 static int 1361 filter_cmd(int argc, const char *argv[], int hashfilter) 1362 { 1363 long long val; 1364 uint32_t idx; 1365 char *s; 1366 1367 if (argc == 0) { 1368 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1369 return (EINVAL); 1370 }; 1371 1372 /* list */ 1373 if (strcmp(argv[0], "list") == 0) { 1374 if (argc != 1) 1375 warnx("trailing arguments after \"list\" ignored."); 1376 1377 return show_filters(hashfilter); 1378 } 1379 1380 /* mode */ 1381 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1382 return get_filter_mode(hashfilter); 1383 1384 /* mode <mode> */ 1385 if (!hashfilter && strcmp(argv[0], "mode") == 0) 1386 return set_filter_mode(argc - 1, argv + 1); 1387 1388 /* <idx> ... */ 1389 s = str_to_number(argv[0], NULL, &val); 1390 if (*s || val < 0 || val > 0xffffffffU) { 1391 if (hashfilter) { 1392 /* 1393 * No numeric index means this must be a request to 1394 * create a new hashfilter and we are already at the 1395 * paramter/value list. 1396 */ 1397 idx = (uint32_t) -1; 1398 goto setf; 1399 } 1400 warnx("\"%s\" is neither an index nor a filter subcommand.", 1401 argv[0]); 1402 return (EINVAL); 1403 } 1404 idx = (uint32_t) val; 1405 1406 /* <idx> delete|clear */ 1407 if (argc == 2 && 1408 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1409 return del_filter(idx, hashfilter); 1410 } 1411 1412 /* skip <idx> */ 1413 argc--; 1414 argv++; 1415 1416 setf: 1417 /* [<param> <val>] ... */ 1418 return set_filter(idx, argc, argv, hashfilter); 1419 } 1420 1421 /* 1422 * Shows the fields of a multi-word structure. The structure is considered to 1423 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1424 * whose fields are described by @fd. The 32-bit words are given in @words 1425 * starting with the least significant 32-bit word. 1426 */ 1427 static void 1428 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1429 { 1430 unsigned int w = 0; 1431 const struct field_desc *p; 1432 1433 for (p = fd; p->name; p++) 1434 w = max(w, strlen(p->name)); 1435 1436 while (fd->name) { 1437 unsigned long long data; 1438 int first_word = fd->start / 32; 1439 int shift = fd->start % 32; 1440 int width = fd->end - fd->start + 1; 1441 unsigned long long mask = (1ULL << width) - 1; 1442 1443 data = (words[first_word] >> shift) | 1444 ((uint64_t)words[first_word + 1] << (32 - shift)); 1445 if (shift) 1446 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1447 data &= mask; 1448 if (fd->islog2) 1449 data = 1 << data; 1450 printf("%-*s ", w, fd->name); 1451 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1452 fd++; 1453 } 1454 } 1455 1456 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1457 #define FIELD1(name, start) FIELD(name, start, start) 1458 1459 static void 1460 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1461 { 1462 static struct field_desc egress_t5[] = { 1463 FIELD("DCA_ST:", 181, 191), 1464 FIELD1("StatusPgNS:", 180), 1465 FIELD1("StatusPgRO:", 179), 1466 FIELD1("FetchNS:", 178), 1467 FIELD1("FetchRO:", 177), 1468 FIELD1("Valid:", 176), 1469 FIELD("PCIeDataChannel:", 174, 175), 1470 FIELD1("StatusPgTPHintEn:", 173), 1471 FIELD("StatusPgTPHint:", 171, 172), 1472 FIELD1("FetchTPHintEn:", 170), 1473 FIELD("FetchTPHint:", 168, 169), 1474 FIELD1("FCThreshOverride:", 167), 1475 { "WRLength:", 162, 166, 9, 0, 1 }, 1476 FIELD1("WRLengthKnown:", 161), 1477 FIELD1("ReschedulePending:", 160), 1478 FIELD1("OnChipQueue:", 159), 1479 FIELD1("FetchSizeMode:", 158), 1480 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1481 FIELD1("FLMPacking:", 155), 1482 FIELD("FetchBurstMax:", 153, 154), 1483 FIELD("uPToken:", 133, 152), 1484 FIELD1("uPTokenEn:", 132), 1485 FIELD1("UserModeIO:", 131), 1486 FIELD("uPFLCredits:", 123, 130), 1487 FIELD1("uPFLCreditEn:", 122), 1488 FIELD("FID:", 111, 121), 1489 FIELD("HostFCMode:", 109, 110), 1490 FIELD1("HostFCOwner:", 108), 1491 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1492 FIELD("CIDX:", 89, 104), 1493 FIELD("PIDX:", 73, 88), 1494 { "BaseAddress:", 18, 72, 9, 1 }, 1495 FIELD("QueueSize:", 2, 17), 1496 FIELD1("QueueType:", 1), 1497 FIELD1("CachePriority:", 0), 1498 { NULL } 1499 }; 1500 static struct field_desc egress_t6[] = { 1501 FIELD("DCA_ST:", 181, 191), 1502 FIELD1("StatusPgNS:", 180), 1503 FIELD1("StatusPgRO:", 179), 1504 FIELD1("FetchNS:", 178), 1505 FIELD1("FetchRO:", 177), 1506 FIELD1("Valid:", 176), 1507 FIELD1("ReschedulePending_1:", 175), 1508 FIELD1("PCIeDataChannel:", 174), 1509 FIELD1("StatusPgTPHintEn:", 173), 1510 FIELD("StatusPgTPHint:", 171, 172), 1511 FIELD1("FetchTPHintEn:", 170), 1512 FIELD("FetchTPHint:", 168, 169), 1513 FIELD1("FCThreshOverride:", 167), 1514 { "WRLength:", 162, 166, 9, 0, 1 }, 1515 FIELD1("WRLengthKnown:", 161), 1516 FIELD1("ReschedulePending:", 160), 1517 FIELD("TimerIx:", 157, 159), 1518 FIELD1("FetchBurstMin:", 156), 1519 FIELD1("FLMPacking:", 155), 1520 FIELD("FetchBurstMax:", 153, 154), 1521 FIELD("uPToken:", 133, 152), 1522 FIELD1("uPTokenEn:", 132), 1523 FIELD1("UserModeIO:", 131), 1524 FIELD("uPFLCredits:", 123, 130), 1525 FIELD1("uPFLCreditEn:", 122), 1526 FIELD("FID:", 111, 121), 1527 FIELD("HostFCMode:", 109, 110), 1528 FIELD1("HostFCOwner:", 108), 1529 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1530 FIELD("CIDX:", 89, 104), 1531 FIELD("PIDX:", 73, 88), 1532 { "BaseAddress:", 18, 72, 9, 1 }, 1533 FIELD("QueueSize:", 2, 17), 1534 FIELD1("QueueType:", 1), 1535 FIELD1("FetchSizeMode:", 0), 1536 { NULL } 1537 }; 1538 static struct field_desc fl_t5[] = { 1539 FIELD("DCA_ST:", 181, 191), 1540 FIELD1("StatusPgNS:", 180), 1541 FIELD1("StatusPgRO:", 179), 1542 FIELD1("FetchNS:", 178), 1543 FIELD1("FetchRO:", 177), 1544 FIELD1("Valid:", 176), 1545 FIELD("PCIeDataChannel:", 174, 175), 1546 FIELD1("StatusPgTPHintEn:", 173), 1547 FIELD("StatusPgTPHint:", 171, 172), 1548 FIELD1("FetchTPHintEn:", 170), 1549 FIELD("FetchTPHint:", 168, 169), 1550 FIELD1("FCThreshOverride:", 167), 1551 FIELD1("ReschedulePending:", 160), 1552 FIELD1("OnChipQueue:", 159), 1553 FIELD1("FetchSizeMode:", 158), 1554 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1555 FIELD1("FLMPacking:", 155), 1556 FIELD("FetchBurstMax:", 153, 154), 1557 FIELD1("FLMcongMode:", 152), 1558 FIELD("MaxuPFLCredits:", 144, 151), 1559 FIELD("FLMcontextID:", 133, 143), 1560 FIELD1("uPTokenEn:", 132), 1561 FIELD1("UserModeIO:", 131), 1562 FIELD("uPFLCredits:", 123, 130), 1563 FIELD1("uPFLCreditEn:", 122), 1564 FIELD("FID:", 111, 121), 1565 FIELD("HostFCMode:", 109, 110), 1566 FIELD1("HostFCOwner:", 108), 1567 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1568 FIELD("CIDX:", 89, 104), 1569 FIELD("PIDX:", 73, 88), 1570 { "BaseAddress:", 18, 72, 9, 1 }, 1571 FIELD("QueueSize:", 2, 17), 1572 FIELD1("QueueType:", 1), 1573 FIELD1("CachePriority:", 0), 1574 { NULL } 1575 }; 1576 static struct field_desc ingress_t5[] = { 1577 FIELD("DCA_ST:", 143, 153), 1578 FIELD1("ISCSICoalescing:", 142), 1579 FIELD1("Queue_Valid:", 141), 1580 FIELD1("TimerPending:", 140), 1581 FIELD1("DropRSS:", 139), 1582 FIELD("PCIeChannel:", 137, 138), 1583 FIELD1("SEInterruptArmed:", 136), 1584 FIELD1("CongestionMgtEnable:", 135), 1585 FIELD1("NoSnoop:", 134), 1586 FIELD1("RelaxedOrdering:", 133), 1587 FIELD1("GTSmode:", 132), 1588 FIELD1("TPHintEn:", 131), 1589 FIELD("TPHint:", 129, 130), 1590 FIELD1("UpdateScheduling:", 128), 1591 FIELD("UpdateDelivery:", 126, 127), 1592 FIELD1("InterruptSent:", 125), 1593 FIELD("InterruptIDX:", 114, 124), 1594 FIELD1("InterruptDestination:", 113), 1595 FIELD1("InterruptArmed:", 112), 1596 FIELD("RxIntCounter:", 106, 111), 1597 FIELD("RxIntCounterThreshold:", 104, 105), 1598 FIELD1("Generation:", 103), 1599 { "BaseAddress:", 48, 102, 9, 1 }, 1600 FIELD("PIDX:", 32, 47), 1601 FIELD("CIDX:", 16, 31), 1602 { "QueueSize:", 4, 15, 4, 0 }, 1603 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1604 FIELD1("QueueEntryOverride:", 1), 1605 FIELD1("CachePriority:", 0), 1606 { NULL } 1607 }; 1608 static struct field_desc ingress_t6[] = { 1609 FIELD1("SP_NS:", 158), 1610 FIELD1("SP_RO:", 157), 1611 FIELD1("SP_TPHintEn:", 156), 1612 FIELD("SP_TPHint:", 154, 155), 1613 FIELD("DCA_ST:", 143, 153), 1614 FIELD1("ISCSICoalescing:", 142), 1615 FIELD1("Queue_Valid:", 141), 1616 FIELD1("TimerPending:", 140), 1617 FIELD1("DropRSS:", 139), 1618 FIELD("PCIeChannel:", 137, 138), 1619 FIELD1("SEInterruptArmed:", 136), 1620 FIELD1("CongestionMgtEnable:", 135), 1621 FIELD1("NoSnoop:", 134), 1622 FIELD1("RelaxedOrdering:", 133), 1623 FIELD1("GTSmode:", 132), 1624 FIELD1("TPHintEn:", 131), 1625 FIELD("TPHint:", 129, 130), 1626 FIELD1("UpdateScheduling:", 128), 1627 FIELD("UpdateDelivery:", 126, 127), 1628 FIELD1("InterruptSent:", 125), 1629 FIELD("InterruptIDX:", 114, 124), 1630 FIELD1("InterruptDestination:", 113), 1631 FIELD1("InterruptArmed:", 112), 1632 FIELD("RxIntCounter:", 106, 111), 1633 FIELD("RxIntCounterThreshold:", 104, 105), 1634 FIELD1("Generation:", 103), 1635 { "BaseAddress:", 48, 102, 9, 1 }, 1636 FIELD("PIDX:", 32, 47), 1637 FIELD("CIDX:", 16, 31), 1638 { "QueueSize:", 4, 15, 4, 0 }, 1639 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1640 FIELD1("QueueEntryOverride:", 1), 1641 FIELD1("CachePriority:", 0), 1642 { NULL } 1643 }; 1644 static struct field_desc flm_t5[] = { 1645 FIELD1("Valid:", 89), 1646 FIELD("SplitLenMode:", 87, 88), 1647 FIELD1("TPHintEn:", 86), 1648 FIELD("TPHint:", 84, 85), 1649 FIELD1("NoSnoop:", 83), 1650 FIELD1("RelaxedOrdering:", 82), 1651 FIELD("DCA_ST:", 71, 81), 1652 FIELD("EQid:", 54, 70), 1653 FIELD("SplitEn:", 52, 53), 1654 FIELD1("PadEn:", 51), 1655 FIELD1("PackEn:", 50), 1656 FIELD1("Cache_Lock :", 49), 1657 FIELD1("CongDrop:", 48), 1658 FIELD("PackOffset:", 16, 47), 1659 FIELD("CIDX:", 8, 15), 1660 FIELD("PIDX:", 0, 7), 1661 { NULL } 1662 }; 1663 static struct field_desc flm_t6[] = { 1664 FIELD1("Valid:", 89), 1665 FIELD("SplitLenMode:", 87, 88), 1666 FIELD1("TPHintEn:", 86), 1667 FIELD("TPHint:", 84, 85), 1668 FIELD1("NoSnoop:", 83), 1669 FIELD1("RelaxedOrdering:", 82), 1670 FIELD("DCA_ST:", 71, 81), 1671 FIELD("EQid:", 54, 70), 1672 FIELD("SplitEn:", 52, 53), 1673 FIELD1("PadEn:", 51), 1674 FIELD1("PackEn:", 50), 1675 FIELD1("Cache_Lock :", 49), 1676 FIELD1("CongDrop:", 48), 1677 FIELD1("Inflight:", 47), 1678 FIELD1("CongEn:", 46), 1679 FIELD1("CongMode:", 45), 1680 FIELD("PackOffset:", 20, 39), 1681 FIELD("CIDX:", 8, 15), 1682 FIELD("PIDX:", 0, 7), 1683 { NULL } 1684 }; 1685 static struct field_desc conm_t5[] = { 1686 FIELD1("CngMPSEnable:", 21), 1687 FIELD("CngTPMode:", 19, 20), 1688 FIELD1("CngDBPHdr:", 18), 1689 FIELD1("CngDBPData:", 17), 1690 FIELD1("CngIMSG:", 16), 1691 { "CngChMap:", 0, 15, 0, 1, 0 }, 1692 { NULL } 1693 }; 1694 1695 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1696 if (p->data[0] & 2) 1697 show_struct(p->data, 6, fl_t5); 1698 else if (vers == 5) 1699 show_struct(p->data, 6, egress_t5); 1700 else 1701 show_struct(p->data, 6, egress_t6); 1702 } else if (p->mem_id == SGE_CONTEXT_FLM) 1703 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1704 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1705 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1706 else if (p->mem_id == SGE_CONTEXT_CNM) 1707 show_struct(p->data, 1, conm_t5); 1708 } 1709 1710 static void 1711 show_t4_ctxt(const struct t4_sge_context *p) 1712 { 1713 static struct field_desc egress_t4[] = { 1714 FIELD1("StatusPgNS:", 180), 1715 FIELD1("StatusPgRO:", 179), 1716 FIELD1("FetchNS:", 178), 1717 FIELD1("FetchRO:", 177), 1718 FIELD1("Valid:", 176), 1719 FIELD("PCIeDataChannel:", 174, 175), 1720 FIELD1("DCAEgrQEn:", 173), 1721 FIELD("DCACPUID:", 168, 172), 1722 FIELD1("FCThreshOverride:", 167), 1723 FIELD("WRLength:", 162, 166), 1724 FIELD1("WRLengthKnown:", 161), 1725 FIELD1("ReschedulePending:", 160), 1726 FIELD1("OnChipQueue:", 159), 1727 FIELD1("FetchSizeMode", 158), 1728 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1729 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1730 FIELD("uPToken:", 133, 152), 1731 FIELD1("uPTokenEn:", 132), 1732 FIELD1("UserModeIO:", 131), 1733 FIELD("uPFLCredits:", 123, 130), 1734 FIELD1("uPFLCreditEn:", 122), 1735 FIELD("FID:", 111, 121), 1736 FIELD("HostFCMode:", 109, 110), 1737 FIELD1("HostFCOwner:", 108), 1738 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1739 FIELD("CIDX:", 89, 104), 1740 FIELD("PIDX:", 73, 88), 1741 { "BaseAddress:", 18, 72, 9, 1 }, 1742 FIELD("QueueSize:", 2, 17), 1743 FIELD1("QueueType:", 1), 1744 FIELD1("CachePriority:", 0), 1745 { NULL } 1746 }; 1747 static struct field_desc fl_t4[] = { 1748 FIELD1("StatusPgNS:", 180), 1749 FIELD1("StatusPgRO:", 179), 1750 FIELD1("FetchNS:", 178), 1751 FIELD1("FetchRO:", 177), 1752 FIELD1("Valid:", 176), 1753 FIELD("PCIeDataChannel:", 174, 175), 1754 FIELD1("DCAEgrQEn:", 173), 1755 FIELD("DCACPUID:", 168, 172), 1756 FIELD1("FCThreshOverride:", 167), 1757 FIELD1("ReschedulePending:", 160), 1758 FIELD1("OnChipQueue:", 159), 1759 FIELD1("FetchSizeMode", 158), 1760 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1761 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1762 FIELD1("FLMcongMode:", 152), 1763 FIELD("MaxuPFLCredits:", 144, 151), 1764 FIELD("FLMcontextID:", 133, 143), 1765 FIELD1("uPTokenEn:", 132), 1766 FIELD1("UserModeIO:", 131), 1767 FIELD("uPFLCredits:", 123, 130), 1768 FIELD1("uPFLCreditEn:", 122), 1769 FIELD("FID:", 111, 121), 1770 FIELD("HostFCMode:", 109, 110), 1771 FIELD1("HostFCOwner:", 108), 1772 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1773 FIELD("CIDX:", 89, 104), 1774 FIELD("PIDX:", 73, 88), 1775 { "BaseAddress:", 18, 72, 9, 1 }, 1776 FIELD("QueueSize:", 2, 17), 1777 FIELD1("QueueType:", 1), 1778 FIELD1("CachePriority:", 0), 1779 { NULL } 1780 }; 1781 static struct field_desc ingress_t4[] = { 1782 FIELD1("NoSnoop:", 145), 1783 FIELD1("RelaxedOrdering:", 144), 1784 FIELD1("GTSmode:", 143), 1785 FIELD1("ISCSICoalescing:", 142), 1786 FIELD1("Valid:", 141), 1787 FIELD1("TimerPending:", 140), 1788 FIELD1("DropRSS:", 139), 1789 FIELD("PCIeChannel:", 137, 138), 1790 FIELD1("SEInterruptArmed:", 136), 1791 FIELD1("CongestionMgtEnable:", 135), 1792 FIELD1("DCAIngQEnable:", 134), 1793 FIELD("DCACPUID:", 129, 133), 1794 FIELD1("UpdateScheduling:", 128), 1795 FIELD("UpdateDelivery:", 126, 127), 1796 FIELD1("InterruptSent:", 125), 1797 FIELD("InterruptIDX:", 114, 124), 1798 FIELD1("InterruptDestination:", 113), 1799 FIELD1("InterruptArmed:", 112), 1800 FIELD("RxIntCounter:", 106, 111), 1801 FIELD("RxIntCounterThreshold:", 104, 105), 1802 FIELD1("Generation:", 103), 1803 { "BaseAddress:", 48, 102, 9, 1 }, 1804 FIELD("PIDX:", 32, 47), 1805 FIELD("CIDX:", 16, 31), 1806 { "QueueSize:", 4, 15, 4, 0 }, 1807 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1808 FIELD1("QueueEntryOverride:", 1), 1809 FIELD1("CachePriority:", 0), 1810 { NULL } 1811 }; 1812 static struct field_desc flm_t4[] = { 1813 FIELD1("NoSnoop:", 79), 1814 FIELD1("RelaxedOrdering:", 78), 1815 FIELD1("Valid:", 77), 1816 FIELD("DCACPUID:", 72, 76), 1817 FIELD1("DCAFLEn:", 71), 1818 FIELD("EQid:", 54, 70), 1819 FIELD("SplitEn:", 52, 53), 1820 FIELD1("PadEn:", 51), 1821 FIELD1("PackEn:", 50), 1822 FIELD1("DBpriority:", 48), 1823 FIELD("PackOffset:", 16, 47), 1824 FIELD("CIDX:", 8, 15), 1825 FIELD("PIDX:", 0, 7), 1826 { NULL } 1827 }; 1828 static struct field_desc conm_t4[] = { 1829 FIELD1("CngDBPHdr:", 6), 1830 FIELD1("CngDBPData:", 5), 1831 FIELD1("CngIMSG:", 4), 1832 { "CngChMap:", 0, 3, 0, 1, 0}, 1833 { NULL } 1834 }; 1835 1836 if (p->mem_id == SGE_CONTEXT_EGRESS) 1837 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1838 else if (p->mem_id == SGE_CONTEXT_FLM) 1839 show_struct(p->data, 3, flm_t4); 1840 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1841 show_struct(p->data, 5, ingress_t4); 1842 else if (p->mem_id == SGE_CONTEXT_CNM) 1843 show_struct(p->data, 1, conm_t4); 1844 } 1845 1846 #undef FIELD 1847 #undef FIELD1 1848 1849 static int 1850 get_sge_context(int argc, const char *argv[]) 1851 { 1852 int rc; 1853 char *p; 1854 long cid; 1855 struct t4_sge_context cntxt = {0}; 1856 1857 if (argc != 2) { 1858 warnx("sge_context: incorrect number of arguments."); 1859 return (EINVAL); 1860 } 1861 1862 if (!strcmp(argv[0], "egress")) 1863 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1864 else if (!strcmp(argv[0], "ingress")) 1865 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1866 else if (!strcmp(argv[0], "fl")) 1867 cntxt.mem_id = SGE_CONTEXT_FLM; 1868 else if (!strcmp(argv[0], "cong")) 1869 cntxt.mem_id = SGE_CONTEXT_CNM; 1870 else { 1871 warnx("unknown context type \"%s\"; known types are egress, " 1872 "ingress, fl, and cong.", argv[0]); 1873 return (EINVAL); 1874 } 1875 1876 p = str_to_number(argv[1], &cid, NULL); 1877 if (*p) { 1878 warnx("invalid context id \"%s\"", argv[1]); 1879 return (EINVAL); 1880 } 1881 cntxt.cid = cid; 1882 1883 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1884 if (rc != 0) 1885 return (rc); 1886 1887 if (chip_id == 4) 1888 show_t4_ctxt(&cntxt); 1889 else 1890 show_t5t6_ctxt(&cntxt, chip_id); 1891 1892 return (0); 1893 } 1894 1895 static int 1896 loadfw(int argc, const char *argv[]) 1897 { 1898 int rc, fd; 1899 struct t4_data data = {0}; 1900 const char *fname = argv[0]; 1901 struct stat st = {0}; 1902 1903 if (argc != 1) { 1904 warnx("loadfw: incorrect number of arguments."); 1905 return (EINVAL); 1906 } 1907 1908 fd = open(fname, O_RDONLY); 1909 if (fd < 0) { 1910 warn("open(%s)", fname); 1911 return (errno); 1912 } 1913 1914 if (fstat(fd, &st) < 0) { 1915 warn("fstat"); 1916 close(fd); 1917 return (errno); 1918 } 1919 1920 data.len = st.st_size; 1921 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1922 if (data.data == MAP_FAILED) { 1923 warn("mmap"); 1924 close(fd); 1925 return (errno); 1926 } 1927 1928 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1929 munmap(data.data, data.len); 1930 close(fd); 1931 return (rc); 1932 } 1933 1934 static int 1935 loadcfg(int argc, const char *argv[]) 1936 { 1937 int rc, fd; 1938 struct t4_data data = {0}; 1939 const char *fname = argv[0]; 1940 struct stat st = {0}; 1941 1942 if (argc != 1) { 1943 warnx("loadcfg: incorrect number of arguments."); 1944 return (EINVAL); 1945 } 1946 1947 if (strcmp(fname, "clear") == 0) 1948 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1949 1950 fd = open(fname, O_RDONLY); 1951 if (fd < 0) { 1952 warn("open(%s)", fname); 1953 return (errno); 1954 } 1955 1956 if (fstat(fd, &st) < 0) { 1957 warn("fstat"); 1958 close(fd); 1959 return (errno); 1960 } 1961 1962 data.len = st.st_size; 1963 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 1964 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1965 if (data.data == MAP_FAILED) { 1966 warn("mmap"); 1967 close(fd); 1968 return (errno); 1969 } 1970 1971 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 1972 munmap(data.data, data.len); 1973 close(fd); 1974 return (rc); 1975 } 1976 1977 static int 1978 dumpstate(int argc, const char *argv[]) 1979 { 1980 int rc, fd; 1981 struct t4_cudbg_dump dump = {0}; 1982 const char *fname = argv[0]; 1983 1984 if (argc != 1) { 1985 warnx("dumpstate: incorrect number of arguments."); 1986 return (EINVAL); 1987 } 1988 1989 dump.wr_flash = 0; 1990 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 1991 dump.len = 8 * 1024 * 1024; 1992 dump.data = malloc(dump.len); 1993 if (dump.data == NULL) { 1994 return (ENOMEM); 1995 } 1996 1997 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 1998 if (rc != 0) 1999 goto done; 2000 2001 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2002 S_IRUSR | S_IRGRP | S_IROTH); 2003 if (fd < 0) { 2004 warn("open(%s)", fname); 2005 rc = errno; 2006 goto done; 2007 } 2008 write(fd, dump.data, dump.len); 2009 close(fd); 2010 done: 2011 free(dump.data); 2012 return (rc); 2013 } 2014 2015 static int 2016 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2017 { 2018 int rc; 2019 struct t4_mem_range mr; 2020 2021 mr.addr = addr; 2022 mr.len = len; 2023 mr.data = malloc(mr.len); 2024 2025 if (mr.data == 0) { 2026 warn("read_mem: malloc"); 2027 return (errno); 2028 } 2029 2030 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2031 if (rc != 0) 2032 goto done; 2033 2034 if (output) 2035 (*output)(mr.data, mr.len); 2036 done: 2037 free(mr.data); 2038 return (rc); 2039 } 2040 2041 static int 2042 loadboot(int argc, const char *argv[]) 2043 { 2044 int rc, fd; 2045 long l; 2046 char *p; 2047 struct t4_bootrom br = {0}; 2048 const char *fname = argv[0]; 2049 struct stat st = {0}; 2050 2051 if (argc == 1) { 2052 br.pf_offset = 0; 2053 br.pfidx_addr = 0; 2054 } else if (argc == 3) { 2055 if (!strcmp(argv[1], "pf")) 2056 br.pf_offset = 0; 2057 else if (!strcmp(argv[1], "offset")) 2058 br.pf_offset = 1; 2059 else 2060 return (EINVAL); 2061 2062 p = str_to_number(argv[2], &l, NULL); 2063 if (*p) 2064 return (EINVAL); 2065 br.pfidx_addr = l; 2066 } else { 2067 warnx("loadboot: incorrect number of arguments."); 2068 return (EINVAL); 2069 } 2070 2071 if (strcmp(fname, "clear") == 0) 2072 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2073 2074 fd = open(fname, O_RDONLY); 2075 if (fd < 0) { 2076 warn("open(%s)", fname); 2077 return (errno); 2078 } 2079 2080 if (fstat(fd, &st) < 0) { 2081 warn("fstat"); 2082 close(fd); 2083 return (errno); 2084 } 2085 2086 br.len = st.st_size; 2087 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2088 if (br.data == MAP_FAILED) { 2089 warn("mmap"); 2090 close(fd); 2091 return (errno); 2092 } 2093 2094 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2095 munmap(br.data, br.len); 2096 close(fd); 2097 return (rc); 2098 } 2099 2100 static int 2101 loadbootcfg(int argc, const char *argv[]) 2102 { 2103 int rc, fd; 2104 struct t4_data bc = {0}; 2105 const char *fname = argv[0]; 2106 struct stat st = {0}; 2107 2108 if (argc != 1) { 2109 warnx("loadbootcfg: incorrect number of arguments."); 2110 return (EINVAL); 2111 } 2112 2113 if (strcmp(fname, "clear") == 0) 2114 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2115 2116 fd = open(fname, O_RDONLY); 2117 if (fd < 0) { 2118 warn("open(%s)", fname); 2119 return (errno); 2120 } 2121 2122 if (fstat(fd, &st) < 0) { 2123 warn("fstat"); 2124 close(fd); 2125 return (errno); 2126 } 2127 2128 bc.len = st.st_size; 2129 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2130 if (bc.data == MAP_FAILED) { 2131 warn("mmap"); 2132 close(fd); 2133 return (errno); 2134 } 2135 2136 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2137 munmap(bc.data, bc.len); 2138 close(fd); 2139 return (rc); 2140 } 2141 2142 /* 2143 * Display memory as list of 'n' 4-byte values per line. 2144 */ 2145 static void 2146 show_mem(uint32_t *buf, uint32_t len) 2147 { 2148 const char *s; 2149 int i, n = 8; 2150 2151 while (len) { 2152 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2153 s = i ? " " : ""; 2154 printf("%s%08x", s, htonl(*buf)); 2155 } 2156 printf("\n"); 2157 } 2158 } 2159 2160 static int 2161 memdump(int argc, const char *argv[]) 2162 { 2163 char *p; 2164 long l; 2165 uint32_t addr, len; 2166 2167 if (argc != 2) { 2168 warnx("incorrect number of arguments."); 2169 return (EINVAL); 2170 } 2171 2172 p = str_to_number(argv[0], &l, NULL); 2173 if (*p) { 2174 warnx("invalid address \"%s\"", argv[0]); 2175 return (EINVAL); 2176 } 2177 addr = l; 2178 2179 p = str_to_number(argv[1], &l, NULL); 2180 if (*p) { 2181 warnx("memdump: invalid length \"%s\"", argv[1]); 2182 return (EINVAL); 2183 } 2184 len = l; 2185 2186 return (read_mem(addr, len, show_mem)); 2187 } 2188 2189 /* 2190 * Display TCB as list of 'n' 4-byte values per line. 2191 */ 2192 static void 2193 show_tcb(uint32_t *buf, uint32_t len) 2194 { 2195 unsigned char *tcb = (unsigned char *)buf; 2196 const char *s; 2197 int i, n = 8; 2198 2199 while (len) { 2200 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2201 s = i ? " " : ""; 2202 printf("%s%08x", s, htonl(*buf)); 2203 } 2204 printf("\n"); 2205 } 2206 set_tcb_info(TIDTYPE_TCB, chip_id); 2207 set_print_style(PRNTSTYL_COMP); 2208 swizzle_tcb(tcb); 2209 parse_n_display_xcb(tcb); 2210 } 2211 2212 #define A_TP_CMM_TCB_BASE 0x7d10 2213 #define TCB_SIZE 128 2214 static int 2215 read_tcb(int argc, const char *argv[]) 2216 { 2217 char *p; 2218 long l; 2219 long long val; 2220 unsigned int tid; 2221 uint32_t addr; 2222 int rc; 2223 2224 if (argc != 1) { 2225 warnx("incorrect number of arguments."); 2226 return (EINVAL); 2227 } 2228 2229 p = str_to_number(argv[0], &l, NULL); 2230 if (*p) { 2231 warnx("invalid tid \"%s\"", argv[0]); 2232 return (EINVAL); 2233 } 2234 tid = l; 2235 2236 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2237 if (rc != 0) 2238 return (rc); 2239 2240 addr = val + tid * TCB_SIZE; 2241 2242 return (read_mem(addr, TCB_SIZE, show_tcb)); 2243 } 2244 2245 static int 2246 read_i2c(int argc, const char *argv[]) 2247 { 2248 char *p; 2249 long l; 2250 struct t4_i2c_data i2cd; 2251 int rc, i; 2252 2253 if (argc < 3 || argc > 4) { 2254 warnx("incorrect number of arguments."); 2255 return (EINVAL); 2256 } 2257 2258 p = str_to_number(argv[0], &l, NULL); 2259 if (*p || l > UCHAR_MAX) { 2260 warnx("invalid port id \"%s\"", argv[0]); 2261 return (EINVAL); 2262 } 2263 i2cd.port_id = l; 2264 2265 p = str_to_number(argv[1], &l, NULL); 2266 if (*p || l > UCHAR_MAX) { 2267 warnx("invalid i2c device address \"%s\"", argv[1]); 2268 return (EINVAL); 2269 } 2270 i2cd.dev_addr = l; 2271 2272 p = str_to_number(argv[2], &l, NULL); 2273 if (*p || l > UCHAR_MAX) { 2274 warnx("invalid byte offset \"%s\"", argv[2]); 2275 return (EINVAL); 2276 } 2277 i2cd.offset = l; 2278 2279 if (argc == 4) { 2280 p = str_to_number(argv[3], &l, NULL); 2281 if (*p || l > sizeof(i2cd.data)) { 2282 warnx("invalid number of bytes \"%s\"", argv[3]); 2283 return (EINVAL); 2284 } 2285 i2cd.len = l; 2286 } else 2287 i2cd.len = 1; 2288 2289 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2290 if (rc != 0) 2291 return (rc); 2292 2293 for (i = 0; i < i2cd.len; i++) 2294 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2295 2296 return (0); 2297 } 2298 2299 static int 2300 clearstats(int argc, const char *argv[]) 2301 { 2302 char *p; 2303 long l; 2304 uint32_t port; 2305 2306 if (argc != 1) { 2307 warnx("incorrect number of arguments."); 2308 return (EINVAL); 2309 } 2310 2311 p = str_to_number(argv[0], &l, NULL); 2312 if (*p) { 2313 warnx("invalid port id \"%s\"", argv[0]); 2314 return (EINVAL); 2315 } 2316 port = l; 2317 2318 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2319 } 2320 2321 static int 2322 show_tracers(void) 2323 { 2324 struct t4_tracer t; 2325 char *s; 2326 int rc, port_idx, i; 2327 long long val; 2328 2329 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2330 rc = read_reg(0x9800, 4, &val); 2331 if (rc != 0) 2332 return (rc); 2333 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2334 2335 t.idx = 0; 2336 for (t.idx = 0; ; t.idx++) { 2337 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2338 if (rc != 0 || t.idx == 0xff) 2339 break; 2340 2341 if (t.tp.port < 4) { 2342 s = "Rx"; 2343 port_idx = t.tp.port; 2344 } else if (t.tp.port < 8) { 2345 s = "Tx"; 2346 port_idx = t.tp.port - 4; 2347 } else if (t.tp.port < 12) { 2348 s = "loopback"; 2349 port_idx = t.tp.port - 8; 2350 } else if (t.tp.port < 16) { 2351 s = "MPS Rx"; 2352 port_idx = t.tp.port - 12; 2353 } else if (t.tp.port < 20) { 2354 s = "MPS Tx"; 2355 port_idx = t.tp.port - 16; 2356 } else { 2357 s = "unknown"; 2358 port_idx = t.tp.port; 2359 } 2360 2361 printf("\ntracer %u (currently %s) captures ", t.idx, 2362 t.enabled ? "ENABLED" : "DISABLED"); 2363 if (t.tp.port < 8) 2364 printf("port %u %s, ", port_idx, s); 2365 else 2366 printf("%s %u, ", s, port_idx); 2367 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2368 t.tp.min_len); 2369 printf("packets captured %smatch filter\n", 2370 t.tp.invert ? "do not " : ""); 2371 if (t.tp.skip_ofst) { 2372 printf("filter pattern: "); 2373 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2374 printf("%08x%08x", t.tp.data[i], 2375 t.tp.data[i + 1]); 2376 printf("/"); 2377 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2378 printf("%08x%08x", t.tp.mask[i], 2379 t.tp.mask[i + 1]); 2380 printf("@0\n"); 2381 } 2382 printf("filter pattern: "); 2383 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2384 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2385 printf("/"); 2386 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2387 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2388 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2389 } 2390 2391 return (rc); 2392 } 2393 2394 static int 2395 tracer_onoff(uint8_t idx, int enabled) 2396 { 2397 struct t4_tracer t; 2398 2399 t.idx = idx; 2400 t.enabled = enabled; 2401 t.valid = 0; 2402 2403 return doit(CHELSIO_T4_SET_TRACER, &t); 2404 } 2405 2406 static void 2407 create_tracing_ifnet() 2408 { 2409 char *cmd[] = { 2410 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2411 }; 2412 char *env[] = {NULL}; 2413 2414 if (vfork() == 0) { 2415 close(STDERR_FILENO); 2416 execve(cmd[0], cmd, env); 2417 _exit(0); 2418 } 2419 } 2420 2421 /* 2422 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2423 * matching). Right now this is a quick-n-dirty implementation that traces the 2424 * first 128B of all tx or rx on a port 2425 */ 2426 static int 2427 set_tracer(uint8_t idx, int argc, const char *argv[]) 2428 { 2429 struct t4_tracer t; 2430 int len, port; 2431 2432 bzero(&t, sizeof (t)); 2433 t.idx = idx; 2434 t.enabled = 1; 2435 t.valid = 1; 2436 2437 if (argc != 1) { 2438 warnx("must specify tx<n> or rx<n>."); 2439 return (EINVAL); 2440 } 2441 2442 len = strlen(argv[0]); 2443 if (len != 3) { 2444 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2445 return (EINVAL); 2446 } 2447 2448 if (strncmp(argv[0], "tx", 2) == 0) { 2449 port = argv[0][2] - '0'; 2450 if (port < 0 || port > 3) { 2451 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2452 return (EINVAL); 2453 } 2454 port += 4; 2455 } else if (strncmp(argv[0], "rx", 2) == 0) { 2456 port = argv[0][2] - '0'; 2457 if (port < 0 || port > 3) { 2458 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2459 return (EINVAL); 2460 } 2461 } else { 2462 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2463 return (EINVAL); 2464 } 2465 2466 t.tp.snap_len = 128; 2467 t.tp.min_len = 0; 2468 t.tp.skip_ofst = 0; 2469 t.tp.skip_len = 0; 2470 t.tp.invert = 0; 2471 t.tp.port = port; 2472 2473 create_tracing_ifnet(); 2474 return doit(CHELSIO_T4_SET_TRACER, &t); 2475 } 2476 2477 static int 2478 tracer_cmd(int argc, const char *argv[]) 2479 { 2480 long long val; 2481 uint8_t idx; 2482 char *s; 2483 2484 if (argc == 0) { 2485 warnx("tracer: no arguments."); 2486 return (EINVAL); 2487 }; 2488 2489 /* list */ 2490 if (strcmp(argv[0], "list") == 0) { 2491 if (argc != 1) 2492 warnx("trailing arguments after \"list\" ignored."); 2493 2494 return show_tracers(); 2495 } 2496 2497 /* <idx> ... */ 2498 s = str_to_number(argv[0], NULL, &val); 2499 if (*s || val > 0xff) { 2500 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2501 argv[0]); 2502 return (EINVAL); 2503 } 2504 idx = (int8_t)val; 2505 2506 /* <idx> disable */ 2507 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2508 return tracer_onoff(idx, 0); 2509 2510 /* <idx> enable */ 2511 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2512 return tracer_onoff(idx, 1); 2513 2514 /* <idx> ... */ 2515 return set_tracer(idx, argc - 1, argv + 1); 2516 } 2517 2518 static int 2519 modinfo_raw(int port_id) 2520 { 2521 uint8_t offset; 2522 struct t4_i2c_data i2cd; 2523 int rc; 2524 2525 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2526 bzero(&i2cd, sizeof(i2cd)); 2527 i2cd.port_id = port_id; 2528 i2cd.dev_addr = 0xa0; 2529 i2cd.offset = offset; 2530 i2cd.len = sizeof(i2cd.data); 2531 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2532 if (rc != 0) 2533 return (rc); 2534 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2535 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2536 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2537 i2cd.data[7]); 2538 2539 printf(" %c%c%c%c %c%c%c%c\n", 2540 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2541 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2542 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2543 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2544 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2545 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2546 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2547 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2548 } 2549 2550 return (0); 2551 } 2552 2553 static int 2554 modinfo(int argc, const char *argv[]) 2555 { 2556 long port; 2557 char string[16], *p; 2558 struct t4_i2c_data i2cd; 2559 int rc, i; 2560 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2561 2562 if (argc < 1) { 2563 warnx("must supply a port"); 2564 return (EINVAL); 2565 } 2566 2567 if (argc > 2) { 2568 warnx("too many arguments"); 2569 return (EINVAL); 2570 } 2571 2572 p = str_to_number(argv[0], &port, NULL); 2573 if (*p || port > UCHAR_MAX) { 2574 warnx("invalid port id \"%s\"", argv[0]); 2575 return (EINVAL); 2576 } 2577 2578 if (argc == 2) { 2579 if (!strcmp(argv[1], "raw")) 2580 return (modinfo_raw(port)); 2581 else { 2582 warnx("second argument can only be \"raw\""); 2583 return (EINVAL); 2584 } 2585 } 2586 2587 bzero(&i2cd, sizeof(i2cd)); 2588 i2cd.len = 1; 2589 i2cd.port_id = port; 2590 i2cd.dev_addr = SFF_8472_BASE; 2591 2592 i2cd.offset = SFF_8472_ID; 2593 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2594 goto fail; 2595 2596 if (i2cd.data[0] > SFF_8472_ID_LAST) 2597 printf("Unknown ID\n"); 2598 else 2599 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2600 2601 bzero(&string, sizeof(string)); 2602 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2603 i2cd.offset = i; 2604 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2605 goto fail; 2606 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2607 } 2608 printf("Vendor %s\n", string); 2609 2610 bzero(&string, sizeof(string)); 2611 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2612 i2cd.offset = i; 2613 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2614 goto fail; 2615 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2616 } 2617 printf("SN %s\n", string); 2618 2619 bzero(&string, sizeof(string)); 2620 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2621 i2cd.offset = i; 2622 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2623 goto fail; 2624 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2625 } 2626 printf("PN %s\n", string); 2627 2628 bzero(&string, sizeof(string)); 2629 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2630 i2cd.offset = i; 2631 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2632 goto fail; 2633 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2634 } 2635 printf("Rev %s\n", string); 2636 2637 i2cd.offset = SFF_8472_DIAG_TYPE; 2638 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2639 goto fail; 2640 2641 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2642 SFF_8472_DIAG_INTERNAL)) { 2643 2644 /* Switch to reading from the Diagnostic address. */ 2645 i2cd.dev_addr = SFF_8472_DIAG; 2646 i2cd.len = 1; 2647 2648 i2cd.offset = SFF_8472_TEMP; 2649 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2650 goto fail; 2651 temp = i2cd.data[0] << 8; 2652 printf("Temp: "); 2653 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2654 printf("-"); 2655 else 2656 printf("+"); 2657 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2658 SFF_8472_TEMP_SHIFT); 2659 2660 i2cd.offset = SFF_8472_VCC; 2661 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2662 goto fail; 2663 vcc = i2cd.data[0] << 8; 2664 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2665 2666 i2cd.offset = SFF_8472_TX_BIAS; 2667 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2668 goto fail; 2669 tx_bias = i2cd.data[0] << 8; 2670 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2671 2672 i2cd.offset = SFF_8472_TX_POWER; 2673 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2674 goto fail; 2675 tx_power = i2cd.data[0] << 8; 2676 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2677 2678 i2cd.offset = SFF_8472_RX_POWER; 2679 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2680 goto fail; 2681 rx_power = i2cd.data[0] << 8; 2682 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2683 2684 } else 2685 printf("Diagnostics not supported.\n"); 2686 2687 return(0); 2688 2689 fail: 2690 if (rc == EPERM) 2691 warnx("No module/cable in port %ld", port); 2692 return (rc); 2693 2694 } 2695 2696 /* XXX: pass in a low/high and do range checks as well */ 2697 static int 2698 get_sched_param(const char *param, const char *args[], long *val) 2699 { 2700 char *p; 2701 2702 if (strcmp(param, args[0]) != 0) 2703 return (EINVAL); 2704 2705 p = str_to_number(args[1], val, NULL); 2706 if (*p) { 2707 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2708 args[1]); 2709 return (EINVAL); 2710 } 2711 2712 return (0); 2713 } 2714 2715 static int 2716 sched_class(int argc, const char *argv[]) 2717 { 2718 struct t4_sched_params op; 2719 int errs, i; 2720 2721 memset(&op, 0xff, sizeof(op)); 2722 op.subcmd = -1; 2723 op.type = -1; 2724 if (argc == 0) { 2725 warnx("missing scheduling sub-command"); 2726 return (EINVAL); 2727 } 2728 if (!strcmp(argv[0], "config")) { 2729 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2730 op.u.config.minmax = -1; 2731 } else if (!strcmp(argv[0], "params")) { 2732 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2733 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2734 op.u.params.ratemode = op.u.params.channel = 2735 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2736 op.u.params.weight = op.u.params.pktsize = -1; 2737 } else { 2738 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2739 return (EINVAL); 2740 } 2741 2742 /* Decode remaining arguments ... */ 2743 errs = 0; 2744 for (i = 1; i < argc; i += 2) { 2745 const char **args = &argv[i]; 2746 long l; 2747 2748 if (i + 1 == argc) { 2749 warnx("missing argument for \"%s\"", args[0]); 2750 errs++; 2751 break; 2752 } 2753 2754 if (!strcmp(args[0], "type")) { 2755 if (!strcmp(args[1], "packet")) 2756 op.type = SCHED_CLASS_TYPE_PACKET; 2757 else { 2758 warnx("invalid type parameter \"%s\"", args[1]); 2759 errs++; 2760 } 2761 2762 continue; 2763 } 2764 2765 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2766 if(!get_sched_param("minmax", args, &l)) 2767 op.u.config.minmax = (int8_t)l; 2768 else { 2769 warnx("unknown scheduler config parameter " 2770 "\"%s\"", args[0]); 2771 errs++; 2772 } 2773 2774 continue; 2775 } 2776 2777 /* Rest applies only to SUBCMD_PARAMS */ 2778 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2779 continue; 2780 2781 if (!strcmp(args[0], "level")) { 2782 if (!strcmp(args[1], "cl-rl")) 2783 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2784 else if (!strcmp(args[1], "cl-wrr")) 2785 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2786 else if (!strcmp(args[1], "ch-rl")) 2787 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2788 else { 2789 warnx("invalid level parameter \"%s\"", 2790 args[1]); 2791 errs++; 2792 } 2793 } else if (!strcmp(args[0], "mode")) { 2794 if (!strcmp(args[1], "class")) 2795 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2796 else if (!strcmp(args[1], "flow")) 2797 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2798 else { 2799 warnx("invalid mode parameter \"%s\"", args[1]); 2800 errs++; 2801 } 2802 } else if (!strcmp(args[0], "rate-unit")) { 2803 if (!strcmp(args[1], "bits")) 2804 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2805 else if (!strcmp(args[1], "pkts")) 2806 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2807 else { 2808 warnx("invalid rate-unit parameter \"%s\"", 2809 args[1]); 2810 errs++; 2811 } 2812 } else if (!strcmp(args[0], "rate-mode")) { 2813 if (!strcmp(args[1], "relative")) 2814 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2815 else if (!strcmp(args[1], "absolute")) 2816 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2817 else { 2818 warnx("invalid rate-mode parameter \"%s\"", 2819 args[1]); 2820 errs++; 2821 } 2822 } else if (!get_sched_param("channel", args, &l)) 2823 op.u.params.channel = (int8_t)l; 2824 else if (!get_sched_param("class", args, &l)) 2825 op.u.params.cl = (int8_t)l; 2826 else if (!get_sched_param("min-rate", args, &l)) 2827 op.u.params.minrate = (int32_t)l; 2828 else if (!get_sched_param("max-rate", args, &l)) 2829 op.u.params.maxrate = (int32_t)l; 2830 else if (!get_sched_param("weight", args, &l)) 2831 op.u.params.weight = (int16_t)l; 2832 else if (!get_sched_param("pkt-size", args, &l)) 2833 op.u.params.pktsize = (int16_t)l; 2834 else { 2835 warnx("unknown scheduler parameter \"%s\"", args[0]); 2836 errs++; 2837 } 2838 } 2839 2840 /* 2841 * Catch some logical fallacies in terms of argument combinations here 2842 * so we can offer more than just the EINVAL return from the driver. 2843 * The driver will be able to catch a lot more issues since it knows 2844 * the specifics of the device hardware capabilities like how many 2845 * channels, classes, etc. the device supports. 2846 */ 2847 if (op.type < 0) { 2848 warnx("sched \"type\" parameter missing"); 2849 errs++; 2850 } 2851 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2852 if (op.u.config.minmax < 0) { 2853 warnx("sched config \"minmax\" parameter missing"); 2854 errs++; 2855 } 2856 } 2857 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2858 if (op.u.params.level < 0) { 2859 warnx("sched params \"level\" parameter missing"); 2860 errs++; 2861 } 2862 if (op.u.params.mode < 0) { 2863 warnx("sched params \"mode\" parameter missing"); 2864 errs++; 2865 } 2866 if (op.u.params.rateunit < 0) { 2867 warnx("sched params \"rate-unit\" parameter missing"); 2868 errs++; 2869 } 2870 if (op.u.params.ratemode < 0) { 2871 warnx("sched params \"rate-mode\" parameter missing"); 2872 errs++; 2873 } 2874 if (op.u.params.channel < 0) { 2875 warnx("sched params \"channel\" missing"); 2876 errs++; 2877 } 2878 if (op.u.params.cl < 0) { 2879 warnx("sched params \"class\" missing"); 2880 errs++; 2881 } 2882 if (op.u.params.maxrate < 0 && 2883 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2884 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2885 warnx("sched params \"max-rate\" missing for " 2886 "rate-limit level"); 2887 errs++; 2888 } 2889 if (op.u.params.weight < 0 && 2890 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) { 2891 warnx("sched params \"weight\" missing for " 2892 "weighted-round-robin level"); 2893 errs++; 2894 } 2895 if (op.u.params.pktsize < 0 && 2896 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2897 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2898 warnx("sched params \"pkt-size\" missing for " 2899 "rate-limit level"); 2900 errs++; 2901 } 2902 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2903 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2904 warnx("sched params mode flow needs rate-mode absolute"); 2905 errs++; 2906 } 2907 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2908 !in_range(op.u.params.maxrate, 1, 100)) { 2909 warnx("sched params \"max-rate\" takes " 2910 "percentage value(1-100) for rate-mode relative"); 2911 errs++; 2912 } 2913 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2914 !in_range(op.u.params.maxrate, 1, 100000000)) { 2915 warnx("sched params \"max-rate\" takes " 2916 "value(1-100000000) for rate-mode absolute"); 2917 errs++; 2918 } 2919 if (op.u.params.maxrate > 0 && 2920 op.u.params.maxrate < op.u.params.minrate) { 2921 warnx("sched params \"max-rate\" is less than " 2922 "\"min-rate\""); 2923 errs++; 2924 } 2925 } 2926 2927 if (errs > 0) { 2928 warnx("%d error%s in sched-class command", errs, 2929 errs == 1 ? "" : "s"); 2930 return (EINVAL); 2931 } 2932 2933 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2934 } 2935 2936 static int 2937 sched_queue(int argc, const char *argv[]) 2938 { 2939 struct t4_sched_queue op = {0}; 2940 char *p; 2941 long val; 2942 2943 if (argc != 3) { 2944 /* need "<port> <queue> <class> */ 2945 warnx("incorrect number of arguments."); 2946 return (EINVAL); 2947 } 2948 2949 p = str_to_number(argv[0], &val, NULL); 2950 if (*p || val > UCHAR_MAX) { 2951 warnx("invalid port id \"%s\"", argv[0]); 2952 return (EINVAL); 2953 } 2954 op.port = (uint8_t)val; 2955 2956 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 2957 op.queue = -1; 2958 else { 2959 p = str_to_number(argv[1], &val, NULL); 2960 if (*p || val < -1) { 2961 warnx("invalid queue \"%s\"", argv[1]); 2962 return (EINVAL); 2963 } 2964 op.queue = (int8_t)val; 2965 } 2966 2967 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 2968 op.cl = -1; 2969 else { 2970 p = str_to_number(argv[2], &val, NULL); 2971 if (*p || val < -1) { 2972 warnx("invalid class \"%s\"", argv[2]); 2973 return (EINVAL); 2974 } 2975 op.cl = (int8_t)val; 2976 } 2977 2978 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 2979 } 2980 2981 static int 2982 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 2983 int *pneg, struct offload_settings *os) 2984 { 2985 2986 while (*s == '!') { 2987 (*pneg)++; 2988 s++; 2989 } 2990 2991 if (!strcmp(s, "not")) { 2992 (*pneg)++; 2993 return (0); 2994 } 2995 2996 if (!strcmp(s, "offload")) { 2997 os->offload = (*pneg + 1) & 1; 2998 *pneg = 0; 2999 } else if (!strcmp(s , "coalesce")) { 3000 os->rx_coalesce = (*pneg + 1) & 1; 3001 *pneg = 0; 3002 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3003 os->tstamp = (*pneg + 1) & 1; 3004 *pneg = 0; 3005 } else if (!strcmp(s, "sack")) { 3006 os->sack = (*pneg + 1) & 1; 3007 *pneg = 0; 3008 } else if (!strcmp(s, "nagle")) { 3009 os->nagle = (*pneg + 1) & 1; 3010 *pneg = 0; 3011 } else if (!strcmp(s, "ecn")) { 3012 os->ecn = (*pneg + 1) & 1; 3013 *pneg = 0; 3014 } else if (!strcmp(s, "ddp")) { 3015 os->ddp = (*pneg + 1) & 1; 3016 *pneg = 0; 3017 } else if (!strcmp(s, "tls")) { 3018 os->tls = (*pneg + 1) & 1; 3019 *pneg = 0; 3020 } else { 3021 char *param, *p; 3022 long val; 3023 3024 /* Settings with additional parameter handled here. */ 3025 3026 if (*pneg) { 3027 warnx("\"%s\" is not a valid keyword, or it does not " 3028 "support negation.", s); 3029 return (EINVAL); 3030 } 3031 3032 while ((param = strsep(pnext, ws)) != NULL) { 3033 if (*param != '\0') 3034 break; 3035 } 3036 if (param == NULL) { 3037 warnx("\"%s\" is not a valid keyword, or it requires a " 3038 "parameter that has not been provided.", s); 3039 return (EINVAL); 3040 } 3041 3042 if (!strcmp(s, "cong")) { 3043 if (!strcmp(param, "reno")) 3044 os->cong_algo = 0; 3045 else if (!strcmp(param, "tahoe")) 3046 os->cong_algo = 1; 3047 else if (!strcmp(param, "newreno")) 3048 os->cong_algo = 2; 3049 else if (!strcmp(param, "highspeed")) 3050 os->cong_algo = 3; 3051 else { 3052 warnx("unknown congestion algorithm \"%s\".", s); 3053 return (EINVAL); 3054 } 3055 } else if (!strcmp(s, "class")) { 3056 val = -1; 3057 p = str_to_number(param, &val, NULL); 3058 /* (nsched_cls - 1) is spelled 15 here. */ 3059 if (*p || val < 0 || val > 15) { 3060 warnx("invalid scheduling class \"%s\". " 3061 "\"class\" needs an integer value where " 3062 "0 <= value <= 15", param); 3063 return (EINVAL); 3064 } 3065 os->sched_class = val; 3066 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3067 !strcmp(s, "rxq")) { 3068 val = -1; 3069 if (strcmp(param, "random")) { 3070 p = str_to_number(param, &val, NULL); 3071 if (*p || val < 0 || val > 0xffff) { 3072 warnx("invalid queue specification " 3073 "\"%s\". \"%s\" needs an integer" 3074 " value, or \"random\".", 3075 param, s); 3076 return (EINVAL); 3077 } 3078 } 3079 if (!strcmp(s, "bind")) { 3080 os->txq = val; 3081 os->rxq = val; 3082 } else if (!strcmp(s, "txq")) { 3083 os->txq = val; 3084 } else if (!strcmp(s, "rxq")) { 3085 os->rxq = val; 3086 } else { 3087 return (EDOOFUS); 3088 } 3089 } else if (!strcmp(s, "mss")) { 3090 val = -1; 3091 p = str_to_number(param, &val, NULL); 3092 if (*p || val <= 0) { 3093 warnx("invalid MSS specification \"%s\". " 3094 "\"mss\" needs a positive integer value", 3095 param); 3096 return (EINVAL); 3097 } 3098 os->mss = val; 3099 } else { 3100 warnx("unknown settings keyword: \"%s\"", s); 3101 return (EINVAL); 3102 } 3103 } 3104 3105 return (0); 3106 } 3107 3108 static int 3109 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3110 { 3111 const char *ws = " \f\n\r\v\t"; 3112 char *settings, *s, *next; 3113 int rc, nsettings, neg; 3114 static const struct offload_settings default_settings = { 3115 .offload = 0, /* No settings imply !offload */ 3116 .rx_coalesce = -1, 3117 .cong_algo = -1, 3118 .sched_class = -1, 3119 .tstamp = -1, 3120 .sack = -1, 3121 .nagle = -1, 3122 .ecn = -1, 3123 .ddp = -1, 3124 .tls = -1, 3125 .txq = -1, 3126 .rxq = -1, 3127 .mss = -1, 3128 }; 3129 3130 *os = default_settings; 3131 3132 next = settings = strdup(settings_ro); 3133 if (settings == NULL) { 3134 warn (NULL); 3135 return (errno); 3136 } 3137 3138 nsettings = 0; 3139 rc = 0; 3140 neg = 0; 3141 while ((s = strsep(&next, ws)) != NULL) { 3142 if (*s == '\0') 3143 continue; 3144 nsettings++; 3145 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3146 if (rc != 0) 3147 goto done; 3148 } 3149 if (nsettings == 0) { 3150 warnx("no settings provided"); 3151 rc = EINVAL; 3152 goto done; 3153 } 3154 if (neg > 0) { 3155 warnx("%d stray negation(s) at end of offload settings", neg); 3156 rc = EINVAL; 3157 goto done; 3158 } 3159 done: 3160 free(settings); 3161 return (rc); 3162 } 3163 3164 static int 3165 isempty_line(char *line, size_t llen) 3166 { 3167 3168 /* skip leading whitespace */ 3169 while (isspace(*line)) { 3170 line++; 3171 llen--; 3172 } 3173 if (llen == 0 || *line == '#' || *line == '\n') 3174 return (1); 3175 3176 return (0); 3177 } 3178 3179 static int 3180 special_offload_rule(char *str) 3181 { 3182 3183 /* skip leading whitespaces */ 3184 while (isspace(*str)) 3185 str++; 3186 3187 /* check for special strings: "-", "all", "any" */ 3188 if (*str == '-') { 3189 str++; 3190 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3191 str += 3; 3192 } else { 3193 return (0); 3194 } 3195 3196 /* skip trailing whitespaces */ 3197 while (isspace(*str)) 3198 str++; 3199 3200 return (*str == '\0'); 3201 } 3202 3203 /* 3204 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3205 * 3206 * [<open-type>] <expr> => <settings> 3207 */ 3208 static int 3209 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3210 struct offload_rule *r) 3211 { 3212 char *expr, *settings, *s; 3213 3214 bzero(r, sizeof(*r)); 3215 3216 /* Skip leading whitespace. */ 3217 while (isspace(*line)) 3218 line++; 3219 /* Trim trailing whitespace */ 3220 s = &line[llen - 1]; 3221 while (isspace(*s)) { 3222 *s-- = '\0'; 3223 llen--; 3224 } 3225 3226 /* 3227 * First part of the rule: '[X]' where X = A/D/L/P 3228 */ 3229 if (*line++ != '[') { 3230 warnx("missing \"[\" on line %zd", lno); 3231 return (EINVAL); 3232 } 3233 switch (*line) { 3234 case 'A': 3235 case 'D': 3236 case 'L': 3237 case 'P': 3238 r->open_type = *line; 3239 break; 3240 default: 3241 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3242 return (EINVAL); 3243 } 3244 line++; 3245 if (*line++ != ']') { 3246 warnx("missing \"]\" after \"[%c\" on line %zd", 3247 r->open_type, lno); 3248 return (EINVAL); 3249 } 3250 3251 /* Skip whitespace. */ 3252 while (isspace(*line)) 3253 line++; 3254 3255 /* 3256 * Rest of the rule: <expr> => <settings> 3257 */ 3258 expr = line; 3259 s = strstr(line, "=>"); 3260 if (s == NULL) 3261 return (EINVAL); 3262 settings = s + 2; 3263 while (isspace(*settings)) 3264 settings++; 3265 *s = '\0'; 3266 3267 /* 3268 * <expr> is either a special name (all, any) or a pcap-filter(7). 3269 * In case of a special name the bpf_prog stays all-zero. 3270 */ 3271 if (!special_offload_rule(expr)) { 3272 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3273 PCAP_NETMASK_UNKNOWN) < 0) { 3274 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3275 lno, pcap_geterr(pd)); 3276 return (EINVAL); 3277 } 3278 } 3279 3280 /* settings to apply on a match. */ 3281 if (parse_offload_settings(settings, &r->settings) != 0) { 3282 warnx("failed to parse offload settings \"%s\" on line %zd", 3283 settings, lno); 3284 pcap_freecode(&r->bpf_prog); 3285 return (EINVAL); 3286 } 3287 3288 return (0); 3289 3290 } 3291 3292 /* 3293 * Note that op itself is not dynamically allocated. 3294 */ 3295 static void 3296 free_offload_policy(struct t4_offload_policy *op) 3297 { 3298 int i; 3299 3300 for (i = 0; i < op->nrules; i++) { 3301 /* 3302 * pcap_freecode can cope with empty bpf_prog, which is the case 3303 * for an rule that matches on 'any/all/-'. 3304 */ 3305 pcap_freecode(&op->rule[i].bpf_prog); 3306 } 3307 free(op->rule); 3308 op->nrules = 0; 3309 op->rule = NULL; 3310 } 3311 3312 #define REALLOC_STRIDE 32 3313 3314 /* 3315 * Fills up op->nrules and op->rule. 3316 */ 3317 static int 3318 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3319 { 3320 FILE *fp; 3321 char *line; 3322 int lno, maxrules, rc; 3323 size_t lcap, llen; 3324 struct offload_rule *r; 3325 pcap_t *pd; 3326 3327 fp = fopen(fname, "r"); 3328 if (fp == NULL) { 3329 warn("Unable to open file \"%s\"", fname); 3330 return (errno); 3331 } 3332 pd = pcap_open_dead(DLT_EN10MB, 128); 3333 if (pd == NULL) { 3334 warnx("Failed to open pcap device"); 3335 fclose(fp); 3336 return (EIO); 3337 } 3338 3339 rc = 0; 3340 lno = 0; 3341 lcap = 0; 3342 maxrules = 0; 3343 op->nrules = 0; 3344 op->rule = NULL; 3345 line = NULL; 3346 3347 while ((llen = getline(&line, &lcap, fp)) != -1) { 3348 lno++; 3349 3350 /* Skip empty lines. */ 3351 if (isempty_line(line, llen)) 3352 continue; 3353 3354 if (op->nrules == maxrules) { 3355 maxrules += REALLOC_STRIDE; 3356 r = realloc(op->rule, 3357 maxrules * sizeof(struct offload_rule)); 3358 if (r == NULL) { 3359 warnx("failed to allocate memory for %d rules", 3360 maxrules); 3361 rc = ENOMEM; 3362 goto done; 3363 } 3364 op->rule = r; 3365 } 3366 3367 r = &op->rule[op->nrules]; 3368 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3369 if (rc != 0) { 3370 warnx("Error parsing line %d of \"%s\"", lno, fname); 3371 goto done; 3372 } 3373 3374 op->nrules++; 3375 } 3376 free(line); 3377 3378 if (!feof(fp)) { 3379 warn("Error while reading from file \"%s\" at line %d", 3380 fname, lno); 3381 rc = errno; 3382 goto done; 3383 } 3384 3385 if (op->nrules == 0) { 3386 warnx("No valid rules found in \"%s\"", fname); 3387 rc = EINVAL; 3388 } 3389 done: 3390 pcap_close(pd); 3391 fclose(fp); 3392 if (rc != 0) { 3393 free_offload_policy(op); 3394 } 3395 3396 return (rc); 3397 } 3398 3399 static int 3400 load_offload_policy(int argc, const char *argv[]) 3401 { 3402 int rc = 0; 3403 const char *fname = argv[0]; 3404 struct t4_offload_policy op = {0}; 3405 3406 if (argc != 1) { 3407 warnx("incorrect number of arguments."); 3408 return (EINVAL); 3409 } 3410 3411 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3412 /* op.nrules is 0 and that means clear policy */ 3413 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3414 } 3415 3416 rc = parse_offload_policy(fname, &op); 3417 if (rc != 0) { 3418 /* Error message displayed already */ 3419 return (EINVAL); 3420 } 3421 3422 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3423 free_offload_policy(&op); 3424 3425 return (rc); 3426 } 3427 3428 static int 3429 run_cmd(int argc, const char *argv[]) 3430 { 3431 int rc = -1; 3432 const char *cmd = argv[0]; 3433 3434 /* command */ 3435 argc--; 3436 argv++; 3437 3438 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3439 rc = register_io(argc, argv, 4); 3440 else if (!strcmp(cmd, "reg64")) 3441 rc = register_io(argc, argv, 8); 3442 else if (!strcmp(cmd, "regdump")) 3443 rc = dump_regs(argc, argv); 3444 else if (!strcmp(cmd, "filter")) 3445 rc = filter_cmd(argc, argv, 0); 3446 else if (!strcmp(cmd, "context")) 3447 rc = get_sge_context(argc, argv); 3448 else if (!strcmp(cmd, "loadfw")) 3449 rc = loadfw(argc, argv); 3450 else if (!strcmp(cmd, "memdump")) 3451 rc = memdump(argc, argv); 3452 else if (!strcmp(cmd, "tcb")) 3453 rc = read_tcb(argc, argv); 3454 else if (!strcmp(cmd, "i2c")) 3455 rc = read_i2c(argc, argv); 3456 else if (!strcmp(cmd, "clearstats")) 3457 rc = clearstats(argc, argv); 3458 else if (!strcmp(cmd, "tracer")) 3459 rc = tracer_cmd(argc, argv); 3460 else if (!strcmp(cmd, "modinfo")) 3461 rc = modinfo(argc, argv); 3462 else if (!strcmp(cmd, "sched-class")) 3463 rc = sched_class(argc, argv); 3464 else if (!strcmp(cmd, "sched-queue")) 3465 rc = sched_queue(argc, argv); 3466 else if (!strcmp(cmd, "loadcfg")) 3467 rc = loadcfg(argc, argv); 3468 else if (!strcmp(cmd, "loadboot")) 3469 rc = loadboot(argc, argv); 3470 else if (!strcmp(cmd, "loadboot-cfg")) 3471 rc = loadbootcfg(argc, argv); 3472 else if (!strcmp(cmd, "dumpstate")) 3473 rc = dumpstate(argc, argv); 3474 else if (!strcmp(cmd, "policy")) 3475 rc = load_offload_policy(argc, argv); 3476 else if (!strcmp(cmd, "hashfilter")) 3477 rc = filter_cmd(argc, argv, 1); 3478 else { 3479 rc = EINVAL; 3480 warnx("invalid command \"%s\"", cmd); 3481 } 3482 3483 return (rc); 3484 } 3485 3486 #define MAX_ARGS 15 3487 static int 3488 run_cmd_loop(void) 3489 { 3490 int i, rc = 0; 3491 char buffer[128], *buf; 3492 const char *args[MAX_ARGS + 1]; 3493 3494 /* 3495 * Simple loop: displays a "> " prompt and processes any input as a 3496 * cxgbetool command. You're supposed to enter only the part after 3497 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3498 */ 3499 for (;;) { 3500 fprintf(stdout, "> "); 3501 fflush(stdout); 3502 buf = fgets(buffer, sizeof(buffer), stdin); 3503 if (buf == NULL) { 3504 if (ferror(stdin)) { 3505 warn("stdin error"); 3506 rc = errno; /* errno from fgets */ 3507 } 3508 break; 3509 } 3510 3511 i = 0; 3512 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3513 if (args[i][0] != 0 && ++i == MAX_ARGS) 3514 break; 3515 } 3516 args[i] = 0; 3517 3518 if (i == 0) 3519 continue; /* skip empty line */ 3520 3521 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3522 break; 3523 3524 rc = run_cmd(i, args); 3525 } 3526 3527 /* rc normally comes from the last command (not including quit/exit) */ 3528 return (rc); 3529 } 3530 3531 int 3532 main(int argc, const char *argv[]) 3533 { 3534 int rc = -1; 3535 3536 progname = argv[0]; 3537 3538 if (argc == 2) { 3539 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3540 usage(stdout); 3541 exit(0); 3542 } 3543 } 3544 3545 if (argc < 3) { 3546 usage(stderr); 3547 exit(EINVAL); 3548 } 3549 3550 nexus = argv[1]; 3551 3552 /* progname and nexus */ 3553 argc -= 2; 3554 argv += 2; 3555 3556 if (argc == 1 && !strcmp(argv[0], "stdio")) 3557 rc = run_cmd_loop(); 3558 else 3559 rc = run_cmd(argc, argv); 3560 3561 return (rc); 3562 } 3563