1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/ioctl.h> 33 #include <sys/mman.h> 34 #include <sys/socket.h> 35 #include <sys/stat.h> 36 37 #include <arpa/inet.h> 38 #include <net/ethernet.h> 39 #include <net/sff8472.h> 40 #include <net/bpf.h> 41 #include <netinet/in.h> 42 43 #include <ctype.h> 44 #include <err.h> 45 #include <errno.h> 46 #include <fcntl.h> 47 #include <limits.h> 48 #include <stdint.h> 49 #include <stdio.h> 50 #include <stdlib.h> 51 #include <string.h> 52 #include <unistd.h> 53 #include <pcap.h> 54 55 #include "t4_ioctl.h" 56 #include "tcb_common.h" 57 58 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 59 #define max(x, y) ((x) > (y) ? (x) : (y)) 60 61 static const char *progname, *nexus; 62 static int chip_id; /* 4 for T4, 5 for T5 */ 63 64 struct reg_info { 65 const char *name; 66 uint32_t addr; 67 uint32_t len; 68 }; 69 70 struct mod_regs { 71 const char *name; 72 const struct reg_info *ri; 73 }; 74 75 struct field_desc { 76 const char *name; /* Field name */ 77 unsigned short start; /* Start bit position */ 78 unsigned short end; /* End bit position */ 79 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 80 unsigned char hex; /* Print field in hex instead of decimal */ 81 unsigned char islog2; /* Field contains the base-2 log of the value */ 82 }; 83 84 #include "reg_defs_t4.c" 85 #include "reg_defs_t5.c" 86 #include "reg_defs_t6.c" 87 #include "reg_defs_t4vf.c" 88 89 static void 90 usage(FILE *fp) 91 { 92 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 93 fprintf(fp, 94 "\tclearstats <port> clear port statistics\n" 95 "\tcontext <type> <id> show an SGE context\n" 96 "\tdumpstate <dump.bin> dump chip state\n" 97 "\tfilter <idx> [<param> <val>] ... set a filter\n" 98 "\tfilter <idx> delete|clear delete a filter\n" 99 "\tfilter list list all filters\n" 100 "\tfilter mode [<match>] ... get/set global filter mode\n" 101 "\thashfilter [<param> <val>] ... set a hashfilter\n" 102 "\thashfilter <idx> delete|clear delete a hashfilter\n" 103 "\thashfilter list list all hashfilters\n" 104 "\thashfilter mode get global hashfilter mode\n" 105 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 106 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 107 "\tloadboot clear [pf|offset <val>] remove boot image\n" 108 "\tloadboot-cfg <bc.bin> install boot config\n" 109 "\tloadboot-cfg clear remove boot config\n" 110 "\tloadcfg <fw-config.txt> install configuration file\n" 111 "\tloadcfg clear remove configuration file\n" 112 "\tloadfw <fw-image.bin> install firmware\n" 113 "\tmemdump <addr> <len> dump a memory range\n" 114 "\tmodinfo <port> [raw] optics/cable information\n" 115 "\tpolicy <policy.txt> install offload policy\n" 116 "\tpolicy clear remove offload policy\n" 117 "\treg <address>[=<val>] read/write register\n" 118 "\treg64 <address>[=<val>] read/write 64 bit register\n" 119 "\tregdump [<module>] ... dump registers\n" 120 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 121 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 122 "\tstdio interactive mode\n" 123 "\ttcb <tid> read TCB\n" 124 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 125 "\ttracer <idx> disable|enable disable or enable a tracer\n" 126 "\ttracer list list all tracers\n" 127 ); 128 } 129 130 static inline unsigned int 131 get_card_vers(unsigned int version) 132 { 133 return (version & 0x3ff); 134 } 135 136 static int 137 real_doit(unsigned long cmd, void *data, const char *cmdstr) 138 { 139 static int fd = -1; 140 int rc = 0; 141 142 if (fd == -1) { 143 char buf[64]; 144 145 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 146 if ((fd = open(buf, O_RDWR)) < 0) { 147 warn("open(%s)", nexus); 148 rc = errno; 149 return (rc); 150 } 151 chip_id = nexus[1] - '0'; 152 } 153 154 rc = ioctl(fd, cmd, data); 155 if (rc < 0) { 156 warn("%s", cmdstr); 157 rc = errno; 158 } 159 160 return (rc); 161 } 162 #define doit(x, y) real_doit(x, y, #x) 163 164 static char * 165 str_to_number(const char *s, long *val, long long *vall) 166 { 167 char *p; 168 169 if (vall) 170 *vall = strtoll(s, &p, 0); 171 else if (val) 172 *val = strtol(s, &p, 0); 173 else 174 p = NULL; 175 176 return (p); 177 } 178 179 static int 180 read_reg(long addr, int size, long long *val) 181 { 182 struct t4_reg reg; 183 int rc; 184 185 reg.addr = (uint32_t) addr; 186 reg.size = (uint32_t) size; 187 reg.val = 0; 188 189 rc = doit(CHELSIO_T4_GETREG, ®); 190 191 *val = reg.val; 192 193 return (rc); 194 } 195 196 static int 197 write_reg(long addr, int size, long long val) 198 { 199 struct t4_reg reg; 200 201 reg.addr = (uint32_t) addr; 202 reg.size = (uint32_t) size; 203 reg.val = (uint64_t) val; 204 205 return doit(CHELSIO_T4_SETREG, ®); 206 } 207 208 static int 209 register_io(int argc, const char *argv[], int size) 210 { 211 char *p, *v; 212 long addr; 213 long long val; 214 int w = 0, rc; 215 216 if (argc == 1) { 217 /* <reg> OR <reg>=<value> */ 218 219 p = str_to_number(argv[0], &addr, NULL); 220 if (*p) { 221 if (*p != '=') { 222 warnx("invalid register \"%s\"", argv[0]); 223 return (EINVAL); 224 } 225 226 w = 1; 227 v = p + 1; 228 p = str_to_number(v, NULL, &val); 229 230 if (*p) { 231 warnx("invalid value \"%s\"", v); 232 return (EINVAL); 233 } 234 } 235 236 } else if (argc == 2) { 237 /* <reg> <value> */ 238 239 w = 1; 240 241 p = str_to_number(argv[0], &addr, NULL); 242 if (*p) { 243 warnx("invalid register \"%s\"", argv[0]); 244 return (EINVAL); 245 } 246 247 p = str_to_number(argv[1], NULL, &val); 248 if (*p) { 249 warnx("invalid value \"%s\"", argv[1]); 250 return (EINVAL); 251 } 252 } else { 253 warnx("reg: invalid number of arguments (%d)", argc); 254 return (EINVAL); 255 } 256 257 if (w) 258 rc = write_reg(addr, size, val); 259 else { 260 rc = read_reg(addr, size, &val); 261 if (rc == 0) 262 printf("0x%llx [%llu]\n", val, val); 263 } 264 265 return (rc); 266 } 267 268 static inline uint32_t 269 xtract(uint32_t val, int shift, int len) 270 { 271 return (val >> shift) & ((1 << len) - 1); 272 } 273 274 static int 275 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 276 { 277 uint32_t reg_val = 0; 278 279 for ( ; reg_array->name; ++reg_array) 280 if (!reg_array->len) { 281 reg_val = regs[reg_array->addr / 4]; 282 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 283 reg_array->name, reg_val, reg_val); 284 } else { 285 uint32_t v = xtract(reg_val, reg_array->addr, 286 reg_array->len); 287 288 printf(" %*u:%u %-47s %#-10x %u\n", 289 reg_array->addr < 10 ? 3 : 2, 290 reg_array->addr + reg_array->len - 1, 291 reg_array->addr, reg_array->name, v, v); 292 } 293 294 return (1); 295 } 296 297 static int 298 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 299 const struct mod_regs *modtab, int nmodules) 300 { 301 int i, j, match; 302 303 for (i = 0; i < argc; i++) { 304 for (j = 0; j < nmodules; j++) { 305 if (!strcmp(argv[i], modtab[j].name)) 306 break; 307 } 308 309 if (j == nmodules) { 310 warnx("invalid register block \"%s\"", argv[i]); 311 fprintf(stderr, "\nAvailable blocks:"); 312 for ( ; nmodules; nmodules--, modtab++) 313 fprintf(stderr, " %s", modtab->name); 314 fprintf(stderr, "\n"); 315 return (EINVAL); 316 } 317 } 318 319 for ( ; nmodules; nmodules--, modtab++) { 320 321 match = argc == 0 ? 1 : 0; 322 for (i = 0; !match && i < argc; i++) { 323 if (!strcmp(argv[i], modtab->name)) 324 match = 1; 325 } 326 327 if (match) 328 dump_block_regs(modtab->ri, regs); 329 } 330 331 return (0); 332 } 333 334 #define T4_MODREGS(name) { #name, t4_##name##_regs } 335 static int 336 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 337 { 338 static struct mod_regs t4_mod[] = { 339 T4_MODREGS(sge), 340 { "pci", t4_pcie_regs }, 341 T4_MODREGS(dbg), 342 T4_MODREGS(mc), 343 T4_MODREGS(ma), 344 { "edc0", t4_edc_0_regs }, 345 { "edc1", t4_edc_1_regs }, 346 T4_MODREGS(cim), 347 T4_MODREGS(tp), 348 T4_MODREGS(ulp_rx), 349 T4_MODREGS(ulp_tx), 350 { "pmrx", t4_pm_rx_regs }, 351 { "pmtx", t4_pm_tx_regs }, 352 T4_MODREGS(mps), 353 { "cplsw", t4_cpl_switch_regs }, 354 T4_MODREGS(smb), 355 { "i2c", t4_i2cm_regs }, 356 T4_MODREGS(mi), 357 T4_MODREGS(uart), 358 T4_MODREGS(pmu), 359 T4_MODREGS(sf), 360 T4_MODREGS(pl), 361 T4_MODREGS(le), 362 T4_MODREGS(ncsi), 363 T4_MODREGS(xgmac) 364 }; 365 366 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 367 } 368 #undef T4_MODREGS 369 370 #define T5_MODREGS(name) { #name, t5_##name##_regs } 371 static int 372 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 373 { 374 static struct mod_regs t5_mod[] = { 375 T5_MODREGS(sge), 376 { "pci", t5_pcie_regs }, 377 T5_MODREGS(dbg), 378 { "mc0", t5_mc_0_regs }, 379 { "mc1", t5_mc_1_regs }, 380 T5_MODREGS(ma), 381 { "edc0", t5_edc_t50_regs }, 382 { "edc1", t5_edc_t51_regs }, 383 T5_MODREGS(cim), 384 T5_MODREGS(tp), 385 { "ulprx", t5_ulp_rx_regs }, 386 { "ulptx", t5_ulp_tx_regs }, 387 { "pmrx", t5_pm_rx_regs }, 388 { "pmtx", t5_pm_tx_regs }, 389 T5_MODREGS(mps), 390 { "cplsw", t5_cpl_switch_regs }, 391 T5_MODREGS(smb), 392 { "i2c", t5_i2cm_regs }, 393 T5_MODREGS(mi), 394 T5_MODREGS(uart), 395 T5_MODREGS(pmu), 396 T5_MODREGS(sf), 397 T5_MODREGS(pl), 398 T5_MODREGS(le), 399 T5_MODREGS(ncsi), 400 T5_MODREGS(mac), 401 { "hma", t5_hma_t5_regs } 402 }; 403 404 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 405 } 406 #undef T5_MODREGS 407 408 #define T6_MODREGS(name) { #name, t6_##name##_regs } 409 static int 410 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 411 { 412 static struct mod_regs t6_mod[] = { 413 T6_MODREGS(sge), 414 { "pci", t6_pcie_regs }, 415 T6_MODREGS(dbg), 416 { "mc0", t6_mc_0_regs }, 417 T6_MODREGS(ma), 418 { "edc0", t6_edc_t60_regs }, 419 { "edc1", t6_edc_t61_regs }, 420 T6_MODREGS(cim), 421 T6_MODREGS(tp), 422 { "ulprx", t6_ulp_rx_regs }, 423 { "ulptx", t6_ulp_tx_regs }, 424 { "pmrx", t6_pm_rx_regs }, 425 { "pmtx", t6_pm_tx_regs }, 426 T6_MODREGS(mps), 427 { "cplsw", t6_cpl_switch_regs }, 428 T6_MODREGS(smb), 429 { "i2c", t6_i2cm_regs }, 430 T6_MODREGS(mi), 431 T6_MODREGS(uart), 432 T6_MODREGS(pmu), 433 T6_MODREGS(sf), 434 T6_MODREGS(pl), 435 T6_MODREGS(le), 436 T6_MODREGS(ncsi), 437 T6_MODREGS(mac), 438 { "hma", t6_hma_t6_regs } 439 }; 440 441 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 442 } 443 #undef T6_MODREGS 444 445 static int 446 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 447 { 448 static struct mod_regs t4vf_mod[] = { 449 { "sge", t4vf_sge_regs }, 450 { "mps", t4vf_mps_regs }, 451 { "pl", t4vf_pl_regs }, 452 { "mbdata", t4vf_mbdata_regs }, 453 { "cim", t4vf_cim_regs }, 454 }; 455 456 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 457 } 458 459 static int 460 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 461 { 462 static struct mod_regs t5vf_mod[] = { 463 { "sge", t5vf_sge_regs }, 464 { "mps", t4vf_mps_regs }, 465 { "pl", t5vf_pl_regs }, 466 { "mbdata", t4vf_mbdata_regs }, 467 { "cim", t4vf_cim_regs }, 468 }; 469 470 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 471 } 472 473 static int 474 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 475 { 476 static struct mod_regs t6vf_mod[] = { 477 { "sge", t5vf_sge_regs }, 478 { "mps", t4vf_mps_regs }, 479 { "pl", t6vf_pl_regs }, 480 { "mbdata", t4vf_mbdata_regs }, 481 { "cim", t4vf_cim_regs }, 482 }; 483 484 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 485 } 486 487 static int 488 dump_regs(int argc, const char *argv[]) 489 { 490 int vers, revision, rc; 491 struct t4_regdump regs; 492 uint32_t len; 493 494 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 495 regs.data = calloc(1, len); 496 if (regs.data == NULL) { 497 warnc(ENOMEM, "regdump"); 498 return (ENOMEM); 499 } 500 501 regs.len = len; 502 rc = doit(CHELSIO_T4_REGDUMP, ®s); 503 if (rc != 0) 504 return (rc); 505 506 vers = get_card_vers(regs.version); 507 revision = (regs.version >> 10) & 0x3f; 508 509 if (vers == 4) { 510 if (revision == 0x3f) 511 rc = dump_regs_t4vf(argc, argv, regs.data); 512 else 513 rc = dump_regs_t4(argc, argv, regs.data); 514 } else if (vers == 5) { 515 if (revision == 0x3f) 516 rc = dump_regs_t5vf(argc, argv, regs.data); 517 else 518 rc = dump_regs_t5(argc, argv, regs.data); 519 } else if (vers == 6) { 520 if (revision == 0x3f) 521 rc = dump_regs_t6vf(argc, argv, regs.data); 522 else 523 rc = dump_regs_t6(argc, argv, regs.data); 524 } else { 525 warnx("%s (type %d, rev %d) is not a known card.", 526 nexus, vers, revision); 527 return (ENOTSUP); 528 } 529 530 free(regs.data); 531 return (rc); 532 } 533 534 static void 535 do_show_info_header(uint32_t mode) 536 { 537 uint32_t i; 538 539 printf("%4s %8s", "Idx", "Hits"); 540 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 541 switch (mode & i) { 542 case T4_FILTER_FCoE: 543 printf(" FCoE"); 544 break; 545 546 case T4_FILTER_PORT: 547 printf(" Port"); 548 break; 549 550 case T4_FILTER_VNIC: 551 if (mode & T4_FILTER_IC_VNIC) 552 printf(" VFvld:PF:VF"); 553 else 554 printf(" vld:oVLAN"); 555 break; 556 557 case T4_FILTER_VLAN: 558 printf(" vld:VLAN"); 559 break; 560 561 case T4_FILTER_IP_TOS: 562 printf(" TOS"); 563 break; 564 565 case T4_FILTER_IP_PROTO: 566 printf(" Prot"); 567 break; 568 569 case T4_FILTER_ETH_TYPE: 570 printf(" EthType"); 571 break; 572 573 case T4_FILTER_MAC_IDX: 574 printf(" MACIdx"); 575 break; 576 577 case T4_FILTER_MPS_HIT_TYPE: 578 printf(" MPS"); 579 break; 580 581 case T4_FILTER_IP_FRAGMENT: 582 printf(" Frag"); 583 break; 584 585 default: 586 /* compressed filter field not enabled */ 587 break; 588 } 589 } 590 printf(" %20s %20s %9s %9s %s\n", 591 "DIP", "SIP", "DPORT", "SPORT", "Action"); 592 } 593 594 /* 595 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 596 * ordered tuple. If the parameter name in the argument sub-vector does not 597 * match the passed in parameter name, then a zero is returned for the 598 * function and no parsing is performed. If there is a match, then the value 599 * and optional mask are parsed and returned in the provided return value 600 * pointers. If no optional mask is specified, then a default mask of all 1s 601 * will be returned. 602 * 603 * An error in parsing the value[:mask] will result in an error message and 604 * program termination. 605 */ 606 static int 607 parse_val_mask(const char *param, const char *args[], uint32_t *val, 608 uint32_t *mask, int hashfilter) 609 { 610 char *p; 611 612 if (strcmp(param, args[0]) != 0) 613 return (EINVAL); 614 615 *val = strtoul(args[1], &p, 0); 616 if (p > args[1]) { 617 if (p[0] == 0) { 618 *mask = ~0; 619 return (0); 620 } 621 622 if (p[0] == ':' && p[1] != 0) { 623 if (hashfilter) { 624 warnx("param %s: mask not allowed for " 625 "hashfilter or nat params", param); 626 return (EINVAL); 627 } 628 *mask = strtoul(p+1, &p, 0); 629 if (p[0] == 0) 630 return (0); 631 } else { 632 warnx("param %s: mask not allowed for hashfilter", 633 param); 634 return (EINVAL); 635 } 636 } 637 638 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 639 args[0], args[1]); 640 641 return (EINVAL); 642 } 643 644 /* 645 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 646 * ordered tuple. If the parameter name in the argument sub-vector does not 647 * match the passed in parameter name, then a zero is returned for the 648 * function and no parsing is performed. If there is a match, then the value 649 * and optional mask are parsed and returned in the provided return value 650 * pointers. If no optional mask is specified, then a default mask of all 1s 651 * will be returned. 652 * 653 * The value return parameter "afp" is used to specify the expected address 654 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 655 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 656 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 657 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 658 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 659 * returned in the first four bytes of the address and mask return values with 660 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 661 * 1, 2, 3}, respectively. 662 * 663 * An error in parsing the value[:mask] will result in an error message and 664 * program termination. 665 */ 666 static int 667 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 668 uint8_t mask[], int maskless) 669 { 670 const char *colon, *afn; 671 char *slash; 672 uint8_t *m; 673 int af, ret; 674 unsigned int masksize; 675 676 /* 677 * Is this our parameter? 678 */ 679 if (strcmp(param, args[0]) != 0) 680 return (EINVAL); 681 682 /* 683 * Fundamental IPv4 versus IPv6 selection. 684 */ 685 colon = strchr(args[1], ':'); 686 if (!colon) { 687 afn = "IPv4"; 688 af = AF_INET; 689 masksize = 32; 690 } else { 691 afn = "IPv6"; 692 af = AF_INET6; 693 masksize = 128; 694 } 695 if (*afp == AF_UNSPEC) 696 *afp = af; 697 else if (*afp != af) { 698 warnx("address %s is not of expected family %s", 699 args[1], *afp == AF_INET ? "IP" : "IPv6"); 700 return (EINVAL); 701 } 702 703 /* 704 * Parse address (temporarily stripping off any "/mask" 705 * specification). 706 */ 707 slash = strchr(args[1], '/'); 708 if (slash) 709 *slash = 0; 710 ret = inet_pton(af, args[1], addr); 711 if (slash) 712 *slash = '/'; 713 if (ret <= 0) { 714 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 715 return (EINVAL); 716 } 717 718 /* 719 * Parse optional mask specification. 720 */ 721 if (slash) { 722 char *p; 723 unsigned int prefix = strtoul(slash + 1, &p, 10); 724 725 if (maskless) { 726 warnx("mask cannot be provided for maskless specification"); 727 return (EINVAL); 728 } 729 730 if (p == slash + 1) { 731 warnx("missing address prefix for %s", param); 732 return (EINVAL); 733 } 734 if (*p) { 735 warnx("%s is not a valid address prefix", slash + 1); 736 return (EINVAL); 737 } 738 if (prefix > masksize) { 739 warnx("prefix %u is too long for an %s address", 740 prefix, afn); 741 return (EINVAL); 742 } 743 memset(mask, 0, masksize / 8); 744 masksize = prefix; 745 } 746 747 if (mask != NULL) { 748 /* 749 * Fill in mask. 750 */ 751 for (m = mask; masksize >= 8; m++, masksize -= 8) 752 *m = ~0; 753 if (masksize) 754 *m = ~0 << (8 - masksize); 755 } 756 757 return (0); 758 } 759 760 /* 761 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 762 * tuple. If the parameter name in the argument sub-vector does not match the 763 * passed in parameter name, then a zero is returned for the function and no 764 * parsing is performed. If there is a match, then the value is parsed and 765 * returned in the provided return value pointer. 766 */ 767 static int 768 parse_val(const char *param, const char *args[], uint32_t *val) 769 { 770 char *p; 771 772 if (strcmp(param, args[0]) != 0) 773 return (EINVAL); 774 775 *val = strtoul(args[1], &p, 0); 776 if (p > args[1] && p[0] == 0) 777 return (0); 778 779 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 780 return (EINVAL); 781 } 782 783 static void 784 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 785 { 786 int noctets, octet; 787 788 printf(" "); 789 if (type == 0) { 790 noctets = 4; 791 printf("%3s", " "); 792 } else 793 noctets = 16; 794 795 for (octet = 0; octet < noctets; octet++) 796 printf("%02x", addr[octet]); 797 printf("/"); 798 for (octet = 0; octet < noctets; octet++) 799 printf("%02x", addrm[octet]); 800 } 801 802 static void 803 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 804 { 805 uint32_t i; 806 807 printf("%4d", t->idx); 808 if (t->hits == UINT64_MAX) 809 printf(" %8s", "-"); 810 else 811 printf(" %8ju", t->hits); 812 813 /* 814 * Compressed header portion of filter. 815 */ 816 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 817 switch (mode & i) { 818 case T4_FILTER_FCoE: 819 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 820 break; 821 822 case T4_FILTER_PORT: 823 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 824 break; 825 826 case T4_FILTER_VNIC: 827 if (mode & T4_FILTER_IC_VNIC) { 828 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 829 t->fs.val.pfvf_vld, 830 (t->fs.val.vnic >> 13) & 0x7, 831 t->fs.val.vnic & 0x1fff, 832 t->fs.mask.pfvf_vld, 833 (t->fs.mask.vnic >> 13) & 0x7, 834 t->fs.mask.vnic & 0x1fff); 835 } else { 836 printf(" %1d:%04x/%1d:%04x", 837 t->fs.val.ovlan_vld, t->fs.val.vnic, 838 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 839 } 840 break; 841 842 case T4_FILTER_VLAN: 843 printf(" %1d:%04x/%1d:%04x", 844 t->fs.val.vlan_vld, t->fs.val.vlan, 845 t->fs.mask.vlan_vld, t->fs.mask.vlan); 846 break; 847 848 case T4_FILTER_IP_TOS: 849 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 850 break; 851 852 case T4_FILTER_IP_PROTO: 853 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 854 break; 855 856 case T4_FILTER_ETH_TYPE: 857 printf(" %04x/%04x", t->fs.val.ethtype, 858 t->fs.mask.ethtype); 859 break; 860 861 case T4_FILTER_MAC_IDX: 862 printf(" %03x/%03x", t->fs.val.macidx, 863 t->fs.mask.macidx); 864 break; 865 866 case T4_FILTER_MPS_HIT_TYPE: 867 printf(" %1x/%1x", t->fs.val.matchtype, 868 t->fs.mask.matchtype); 869 break; 870 871 case T4_FILTER_IP_FRAGMENT: 872 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 873 break; 874 875 default: 876 /* compressed filter field not enabled */ 877 break; 878 } 879 } 880 881 /* 882 * Fixed portion of filter. 883 */ 884 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 885 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 886 printf(" %04x/%04x %04x/%04x", 887 t->fs.val.dport, t->fs.mask.dport, 888 t->fs.val.sport, t->fs.mask.sport); 889 890 /* 891 * Variable length filter action. 892 */ 893 if (t->fs.action == FILTER_DROP) 894 printf(" Drop"); 895 else if (t->fs.action == FILTER_SWITCH) { 896 printf(" Switch: port=%d", t->fs.eport); 897 if (t->fs.newdmac) 898 printf( 899 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 900 ", l2tidx=%d", 901 t->fs.dmac[0], t->fs.dmac[1], 902 t->fs.dmac[2], t->fs.dmac[3], 903 t->fs.dmac[4], t->fs.dmac[5], 904 t->l2tidx); 905 if (t->fs.newsmac) 906 printf( 907 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 908 ", smtidx=%d", 909 t->fs.smac[0], t->fs.smac[1], 910 t->fs.smac[2], t->fs.smac[3], 911 t->fs.smac[4], t->fs.smac[5], 912 t->smtidx); 913 if (t->fs.newvlan == VLAN_REMOVE) 914 printf(", vlan=none"); 915 else if (t->fs.newvlan == VLAN_INSERT) 916 printf(", vlan=insert(%x)", t->fs.vlan); 917 else if (t->fs.newvlan == VLAN_REWRITE) 918 printf(", vlan=rewrite(%x)", t->fs.vlan); 919 } else { 920 printf(" Pass: Q="); 921 if (t->fs.dirsteer == 0) { 922 printf("RSS"); 923 if (t->fs.maskhash) 924 printf("(TCB=hash)"); 925 } else { 926 printf("%d", t->fs.iq); 927 if (t->fs.dirsteerhash == 0) 928 printf("(QID)"); 929 else 930 printf("(hash)"); 931 } 932 } 933 if (t->fs.prio) 934 printf(" Prio"); 935 if (t->fs.rpttid) 936 printf(" RptTID"); 937 printf("\n"); 938 } 939 940 static int 941 show_filters(int hash) 942 { 943 uint32_t mode = 0, header = 0; 944 struct t4_filter t; 945 int rc; 946 947 /* Get the global filter mode first */ 948 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 949 if (rc != 0) 950 return (rc); 951 952 t.idx = 0; 953 t.fs.hash = hash; 954 for (t.idx = 0; ; t.idx++) { 955 rc = doit(CHELSIO_T4_GET_FILTER, &t); 956 if (rc != 0 || t.idx == 0xffffffff) 957 break; 958 959 if (!header) { 960 do_show_info_header(mode); 961 header = 1; 962 } 963 do_show_one_filter_info(&t, mode); 964 }; 965 966 return (rc); 967 } 968 969 static int 970 get_filter_mode(int hashfilter) 971 { 972 uint32_t mode = hashfilter; 973 int rc; 974 975 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 976 if (rc != 0) 977 return (rc); 978 979 if (mode & T4_FILTER_IPv4) 980 printf("ipv4 "); 981 982 if (mode & T4_FILTER_IPv6) 983 printf("ipv6 "); 984 985 if (mode & T4_FILTER_IP_SADDR) 986 printf("sip "); 987 988 if (mode & T4_FILTER_IP_DADDR) 989 printf("dip "); 990 991 if (mode & T4_FILTER_IP_SPORT) 992 printf("sport "); 993 994 if (mode & T4_FILTER_IP_DPORT) 995 printf("dport "); 996 997 if (mode & T4_FILTER_IP_FRAGMENT) 998 printf("frag "); 999 1000 if (mode & T4_FILTER_MPS_HIT_TYPE) 1001 printf("matchtype "); 1002 1003 if (mode & T4_FILTER_MAC_IDX) 1004 printf("macidx "); 1005 1006 if (mode & T4_FILTER_ETH_TYPE) 1007 printf("ethtype "); 1008 1009 if (mode & T4_FILTER_IP_PROTO) 1010 printf("proto "); 1011 1012 if (mode & T4_FILTER_IP_TOS) 1013 printf("tos "); 1014 1015 if (mode & T4_FILTER_VLAN) 1016 printf("vlan "); 1017 1018 if (mode & T4_FILTER_VNIC) { 1019 if (mode & T4_FILTER_IC_VNIC) 1020 printf("vnic_id "); 1021 else 1022 printf("ovlan "); 1023 } 1024 1025 if (mode & T4_FILTER_PORT) 1026 printf("iport "); 1027 1028 if (mode & T4_FILTER_FCoE) 1029 printf("fcoe "); 1030 1031 printf("\n"); 1032 1033 return (0); 1034 } 1035 1036 static int 1037 set_filter_mode(int argc, const char *argv[]) 1038 { 1039 uint32_t mode = 0; 1040 int vnic = 0, ovlan = 0; 1041 1042 for (; argc; argc--, argv++) { 1043 if (!strcmp(argv[0], "frag")) 1044 mode |= T4_FILTER_IP_FRAGMENT; 1045 1046 if (!strcmp(argv[0], "matchtype")) 1047 mode |= T4_FILTER_MPS_HIT_TYPE; 1048 1049 if (!strcmp(argv[0], "macidx")) 1050 mode |= T4_FILTER_MAC_IDX; 1051 1052 if (!strcmp(argv[0], "ethtype")) 1053 mode |= T4_FILTER_ETH_TYPE; 1054 1055 if (!strcmp(argv[0], "proto")) 1056 mode |= T4_FILTER_IP_PROTO; 1057 1058 if (!strcmp(argv[0], "tos")) 1059 mode |= T4_FILTER_IP_TOS; 1060 1061 if (!strcmp(argv[0], "vlan")) 1062 mode |= T4_FILTER_VLAN; 1063 1064 if (!strcmp(argv[0], "ovlan")) { 1065 mode |= T4_FILTER_VNIC; 1066 ovlan++; 1067 } 1068 1069 if (!strcmp(argv[0], "vnic_id")) { 1070 mode |= T4_FILTER_VNIC; 1071 mode |= T4_FILTER_IC_VNIC; 1072 vnic++; 1073 } 1074 1075 if (!strcmp(argv[0], "iport")) 1076 mode |= T4_FILTER_PORT; 1077 1078 if (!strcmp(argv[0], "fcoe")) 1079 mode |= T4_FILTER_FCoE; 1080 } 1081 1082 if (vnic > 0 && ovlan > 0) { 1083 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1084 return (EINVAL); 1085 } 1086 1087 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1088 } 1089 1090 static int 1091 del_filter(uint32_t idx, int hashfilter) 1092 { 1093 struct t4_filter t; 1094 1095 t.fs.hash = hashfilter; 1096 t.idx = idx; 1097 1098 return doit(CHELSIO_T4_DEL_FILTER, &t); 1099 } 1100 1101 static int 1102 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1103 { 1104 int rc, af = AF_UNSPEC, start_arg = 0; 1105 struct t4_filter t; 1106 1107 if (argc < 2) { 1108 warnc(EINVAL, "%s", __func__); 1109 return (EINVAL); 1110 }; 1111 bzero(&t, sizeof (t)); 1112 t.idx = idx; 1113 t.fs.hitcnts = 1; 1114 t.fs.hash = hash; 1115 1116 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1117 const char **args = &argv[start_arg]; 1118 uint32_t val, mask; 1119 1120 if (!strcmp(argv[start_arg], "type")) { 1121 int newaf; 1122 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1123 newaf = AF_INET; 1124 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1125 newaf = AF_INET6; 1126 else { 1127 warnx("invalid type \"%s\"; " 1128 "must be one of \"ipv4\" or \"ipv6\"", 1129 argv[start_arg + 1]); 1130 return (EINVAL); 1131 } 1132 1133 if (af != AF_UNSPEC && af != newaf) { 1134 warnx("conflicting IPv4/IPv6 specifications."); 1135 return (EINVAL); 1136 } 1137 af = newaf; 1138 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1139 t.fs.val.fcoe = val; 1140 t.fs.mask.fcoe = mask; 1141 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1142 t.fs.val.iport = val; 1143 t.fs.mask.iport = mask; 1144 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1145 t.fs.val.vnic = val; 1146 t.fs.mask.vnic = mask; 1147 t.fs.val.ovlan_vld = 1; 1148 t.fs.mask.ovlan_vld = 1; 1149 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1150 t.fs.val.vlan = val; 1151 t.fs.mask.vlan = mask; 1152 t.fs.val.vlan_vld = 1; 1153 t.fs.mask.vlan_vld = 1; 1154 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1155 t.fs.val.vnic &= 0x1fff; 1156 t.fs.val.vnic |= (val & 0x7) << 13; 1157 t.fs.mask.vnic &= 0x1fff; 1158 t.fs.mask.vnic |= (mask & 0x7) << 13; 1159 t.fs.val.pfvf_vld = 1; 1160 t.fs.mask.pfvf_vld = 1; 1161 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1162 t.fs.val.vnic &= 0xe000; 1163 t.fs.val.vnic |= val & 0x1fff; 1164 t.fs.mask.vnic &= 0xe000; 1165 t.fs.mask.vnic |= mask & 0x1fff; 1166 t.fs.val.pfvf_vld = 1; 1167 t.fs.mask.pfvf_vld = 1; 1168 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1169 t.fs.val.tos = val; 1170 t.fs.mask.tos = mask; 1171 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1172 t.fs.val.proto = val; 1173 t.fs.mask.proto = mask; 1174 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1175 t.fs.val.ethtype = val; 1176 t.fs.mask.ethtype = mask; 1177 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1178 t.fs.val.macidx = val; 1179 t.fs.mask.macidx = mask; 1180 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1181 t.fs.val.matchtype = val; 1182 t.fs.mask.matchtype = mask; 1183 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1184 t.fs.val.frag = val; 1185 t.fs.mask.frag = mask; 1186 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1187 t.fs.val.dport = val; 1188 t.fs.mask.dport = mask; 1189 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1190 t.fs.val.sport = val; 1191 t.fs.mask.sport = mask; 1192 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1193 t.fs.mask.dip, hash)) { 1194 /* nada */; 1195 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1196 t.fs.mask.sip, hash)) { 1197 /* nada */; 1198 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1199 /*nada*/; 1200 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1201 /*nada*/ 1202 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1203 t.fs.nat_dport = val; 1204 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1205 t.fs.nat_sport = val; 1206 } else if (!strcmp(argv[start_arg], "action")) { 1207 if (!strcmp(argv[start_arg + 1], "pass")) 1208 t.fs.action = FILTER_PASS; 1209 else if (!strcmp(argv[start_arg + 1], "drop")) 1210 t.fs.action = FILTER_DROP; 1211 else if (!strcmp(argv[start_arg + 1], "switch")) 1212 t.fs.action = FILTER_SWITCH; 1213 else { 1214 warnx("invalid action \"%s\"; must be one of" 1215 " \"pass\", \"drop\" or \"switch\"", 1216 argv[start_arg + 1]); 1217 return (EINVAL); 1218 } 1219 } else if (!parse_val("hitcnts", args, &val)) { 1220 t.fs.hitcnts = val; 1221 } else if (!parse_val("prio", args, &val)) { 1222 t.fs.prio = val; 1223 } else if (!parse_val("rpttid", args, &val)) { 1224 t.fs.rpttid = 1; 1225 } else if (!parse_val("queue", args, &val)) { 1226 t.fs.dirsteer = 1; 1227 t.fs.iq = val; 1228 } else if (!parse_val("tcbhash", args, &val)) { 1229 t.fs.maskhash = 1; 1230 t.fs.dirsteerhash = 1; 1231 } else if (!parse_val("eport", args, &val)) { 1232 t.fs.eport = val; 1233 } else if (!parse_val("swapmac", args, &val)) { 1234 t.fs.swapmac = 1; 1235 } else if (!strcmp(argv[start_arg], "nat")) { 1236 if (!strcmp(argv[start_arg + 1], "dip")) 1237 t.fs.nat_mode = NAT_MODE_DIP; 1238 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1239 t.fs.nat_mode = NAT_MODE_DIP_DP; 1240 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1241 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1242 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1243 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1244 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1245 t.fs.nat_mode = NAT_MODE_SIP_SP; 1246 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1247 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1248 else if (!strcmp(argv[start_arg + 1], "all")) 1249 t.fs.nat_mode = NAT_MODE_ALL; 1250 else { 1251 warnx("unknown nat type \"%s\"; known types are dip, " 1252 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1253 "dip-sip-sp, and all", argv[start_arg + 1]); 1254 return (EINVAL); 1255 } 1256 } else if (!parse_val("natseq", args, &val)) { 1257 t.fs.nat_seq_chk = val; 1258 } else if (!parse_val("natflag", args, &val)) { 1259 t.fs.nat_flag_chk = 1; 1260 } else if (!strcmp(argv[start_arg], "dmac")) { 1261 struct ether_addr *daddr; 1262 1263 daddr = ether_aton(argv[start_arg + 1]); 1264 if (daddr == NULL) { 1265 warnx("invalid dmac address \"%s\"", 1266 argv[start_arg + 1]); 1267 return (EINVAL); 1268 } 1269 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1270 t.fs.newdmac = 1; 1271 } else if (!strcmp(argv[start_arg], "smac")) { 1272 struct ether_addr *saddr; 1273 1274 saddr = ether_aton(argv[start_arg + 1]); 1275 if (saddr == NULL) { 1276 warnx("invalid smac address \"%s\"", 1277 argv[start_arg + 1]); 1278 return (EINVAL); 1279 } 1280 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1281 t.fs.newsmac = 1; 1282 } else if (!strcmp(argv[start_arg], "vlan")) { 1283 char *p; 1284 if (!strcmp(argv[start_arg + 1], "none")) { 1285 t.fs.newvlan = VLAN_REMOVE; 1286 } else if (argv[start_arg + 1][0] == '=') { 1287 t.fs.newvlan = VLAN_REWRITE; 1288 } else if (argv[start_arg + 1][0] == '+') { 1289 t.fs.newvlan = VLAN_INSERT; 1290 } else if (isdigit(argv[start_arg + 1][0]) && 1291 !parse_val_mask("vlan", args, &val, &mask, hash)) { 1292 t.fs.val.vlan = val; 1293 t.fs.mask.vlan = mask; 1294 t.fs.val.vlan_vld = 1; 1295 t.fs.mask.vlan_vld = 1; 1296 } else { 1297 warnx("unknown vlan parameter \"%s\"; must" 1298 " be one of \"none\", \"=<vlan>\", " 1299 " \"+<vlan>\", or \"<vlan>\"", 1300 argv[start_arg + 1]); 1301 return (EINVAL); 1302 } 1303 if (t.fs.newvlan == VLAN_REWRITE || 1304 t.fs.newvlan == VLAN_INSERT) { 1305 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1306 &p, 0); 1307 if (p == argv[start_arg + 1] + 1 || p[0] != 0) { 1308 warnx("invalid vlan \"%s\"", 1309 argv[start_arg + 1]); 1310 return (EINVAL); 1311 } 1312 } 1313 } else { 1314 warnx("invalid parameter \"%s\"", argv[start_arg]); 1315 return (EINVAL); 1316 } 1317 } 1318 if (start_arg != argc) { 1319 warnx("no value for \"%s\"", argv[start_arg]); 1320 return (EINVAL); 1321 } 1322 1323 /* 1324 * Check basic sanity of option combinations. 1325 */ 1326 if (t.fs.action != FILTER_SWITCH && 1327 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1328 t.fs.swapmac || t.fs.nat_mode)) { 1329 warnx("port, dmac, smac, vlan, and nat only make sense with" 1330 " \"action switch\""); 1331 return (EINVAL); 1332 } 1333 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1334 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1335 warnx("nat params only make sense with valid nat mode"); 1336 return (EINVAL); 1337 } 1338 if (t.fs.action != FILTER_PASS && 1339 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1340 warnx("rpttid, queue and tcbhash don't make sense with" 1341 " action \"drop\" or \"switch\""); 1342 return (EINVAL); 1343 } 1344 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1345 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1346 return (EINVAL); 1347 } 1348 1349 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1350 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1351 if (hash && rc == 0) 1352 printf("%d\n", t.idx); 1353 return (rc); 1354 } 1355 1356 static int 1357 filter_cmd(int argc, const char *argv[], int hashfilter) 1358 { 1359 long long val; 1360 uint32_t idx; 1361 char *s; 1362 1363 if (argc == 0) { 1364 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1365 return (EINVAL); 1366 }; 1367 1368 /* list */ 1369 if (strcmp(argv[0], "list") == 0) { 1370 if (argc != 1) 1371 warnx("trailing arguments after \"list\" ignored."); 1372 1373 return show_filters(hashfilter); 1374 } 1375 1376 /* mode */ 1377 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1378 return get_filter_mode(hashfilter); 1379 1380 /* mode <mode> */ 1381 if (!hashfilter && strcmp(argv[0], "mode") == 0) 1382 return set_filter_mode(argc - 1, argv + 1); 1383 1384 /* <idx> ... */ 1385 s = str_to_number(argv[0], NULL, &val); 1386 if (*s || val < 0 || val > 0xffffffffU) { 1387 if (hashfilter) { 1388 /* 1389 * No numeric index means this must be a request to 1390 * create a new hashfilter and we are already at the 1391 * paramter/value list. 1392 */ 1393 idx = (uint32_t) -1; 1394 goto setf; 1395 } 1396 warnx("\"%s\" is neither an index nor a filter subcommand.", 1397 argv[0]); 1398 return (EINVAL); 1399 } 1400 idx = (uint32_t) val; 1401 1402 /* <idx> delete|clear */ 1403 if (argc == 2 && 1404 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1405 return del_filter(idx, hashfilter); 1406 } 1407 1408 /* skip <idx> */ 1409 argc--; 1410 argv++; 1411 1412 setf: 1413 /* [<param> <val>] ... */ 1414 return set_filter(idx, argc, argv, hashfilter); 1415 } 1416 1417 /* 1418 * Shows the fields of a multi-word structure. The structure is considered to 1419 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1420 * whose fields are described by @fd. The 32-bit words are given in @words 1421 * starting with the least significant 32-bit word. 1422 */ 1423 static void 1424 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1425 { 1426 unsigned int w = 0; 1427 const struct field_desc *p; 1428 1429 for (p = fd; p->name; p++) 1430 w = max(w, strlen(p->name)); 1431 1432 while (fd->name) { 1433 unsigned long long data; 1434 int first_word = fd->start / 32; 1435 int shift = fd->start % 32; 1436 int width = fd->end - fd->start + 1; 1437 unsigned long long mask = (1ULL << width) - 1; 1438 1439 data = (words[first_word] >> shift) | 1440 ((uint64_t)words[first_word + 1] << (32 - shift)); 1441 if (shift) 1442 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1443 data &= mask; 1444 if (fd->islog2) 1445 data = 1 << data; 1446 printf("%-*s ", w, fd->name); 1447 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1448 fd++; 1449 } 1450 } 1451 1452 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1453 #define FIELD1(name, start) FIELD(name, start, start) 1454 1455 static void 1456 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1457 { 1458 static struct field_desc egress_t5[] = { 1459 FIELD("DCA_ST:", 181, 191), 1460 FIELD1("StatusPgNS:", 180), 1461 FIELD1("StatusPgRO:", 179), 1462 FIELD1("FetchNS:", 178), 1463 FIELD1("FetchRO:", 177), 1464 FIELD1("Valid:", 176), 1465 FIELD("PCIeDataChannel:", 174, 175), 1466 FIELD1("StatusPgTPHintEn:", 173), 1467 FIELD("StatusPgTPHint:", 171, 172), 1468 FIELD1("FetchTPHintEn:", 170), 1469 FIELD("FetchTPHint:", 168, 169), 1470 FIELD1("FCThreshOverride:", 167), 1471 { "WRLength:", 162, 166, 9, 0, 1 }, 1472 FIELD1("WRLengthKnown:", 161), 1473 FIELD1("ReschedulePending:", 160), 1474 FIELD1("OnChipQueue:", 159), 1475 FIELD1("FetchSizeMode:", 158), 1476 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1477 FIELD1("FLMPacking:", 155), 1478 FIELD("FetchBurstMax:", 153, 154), 1479 FIELD("uPToken:", 133, 152), 1480 FIELD1("uPTokenEn:", 132), 1481 FIELD1("UserModeIO:", 131), 1482 FIELD("uPFLCredits:", 123, 130), 1483 FIELD1("uPFLCreditEn:", 122), 1484 FIELD("FID:", 111, 121), 1485 FIELD("HostFCMode:", 109, 110), 1486 FIELD1("HostFCOwner:", 108), 1487 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1488 FIELD("CIDX:", 89, 104), 1489 FIELD("PIDX:", 73, 88), 1490 { "BaseAddress:", 18, 72, 9, 1 }, 1491 FIELD("QueueSize:", 2, 17), 1492 FIELD1("QueueType:", 1), 1493 FIELD1("CachePriority:", 0), 1494 { NULL } 1495 }; 1496 static struct field_desc egress_t6[] = { 1497 FIELD("DCA_ST:", 181, 191), 1498 FIELD1("StatusPgNS:", 180), 1499 FIELD1("StatusPgRO:", 179), 1500 FIELD1("FetchNS:", 178), 1501 FIELD1("FetchRO:", 177), 1502 FIELD1("Valid:", 176), 1503 FIELD1("ReschedulePending_1:", 175), 1504 FIELD1("PCIeDataChannel:", 174), 1505 FIELD1("StatusPgTPHintEn:", 173), 1506 FIELD("StatusPgTPHint:", 171, 172), 1507 FIELD1("FetchTPHintEn:", 170), 1508 FIELD("FetchTPHint:", 168, 169), 1509 FIELD1("FCThreshOverride:", 167), 1510 { "WRLength:", 162, 166, 9, 0, 1 }, 1511 FIELD1("WRLengthKnown:", 161), 1512 FIELD1("ReschedulePending:", 160), 1513 FIELD("TimerIx:", 157, 159), 1514 FIELD1("FetchBurstMin:", 156), 1515 FIELD1("FLMPacking:", 155), 1516 FIELD("FetchBurstMax:", 153, 154), 1517 FIELD("uPToken:", 133, 152), 1518 FIELD1("uPTokenEn:", 132), 1519 FIELD1("UserModeIO:", 131), 1520 FIELD("uPFLCredits:", 123, 130), 1521 FIELD1("uPFLCreditEn:", 122), 1522 FIELD("FID:", 111, 121), 1523 FIELD("HostFCMode:", 109, 110), 1524 FIELD1("HostFCOwner:", 108), 1525 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1526 FIELD("CIDX:", 89, 104), 1527 FIELD("PIDX:", 73, 88), 1528 { "BaseAddress:", 18, 72, 9, 1 }, 1529 FIELD("QueueSize:", 2, 17), 1530 FIELD1("QueueType:", 1), 1531 FIELD1("FetchSizeMode:", 0), 1532 { NULL } 1533 }; 1534 static struct field_desc fl_t5[] = { 1535 FIELD("DCA_ST:", 181, 191), 1536 FIELD1("StatusPgNS:", 180), 1537 FIELD1("StatusPgRO:", 179), 1538 FIELD1("FetchNS:", 178), 1539 FIELD1("FetchRO:", 177), 1540 FIELD1("Valid:", 176), 1541 FIELD("PCIeDataChannel:", 174, 175), 1542 FIELD1("StatusPgTPHintEn:", 173), 1543 FIELD("StatusPgTPHint:", 171, 172), 1544 FIELD1("FetchTPHintEn:", 170), 1545 FIELD("FetchTPHint:", 168, 169), 1546 FIELD1("FCThreshOverride:", 167), 1547 FIELD1("ReschedulePending:", 160), 1548 FIELD1("OnChipQueue:", 159), 1549 FIELD1("FetchSizeMode:", 158), 1550 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1551 FIELD1("FLMPacking:", 155), 1552 FIELD("FetchBurstMax:", 153, 154), 1553 FIELD1("FLMcongMode:", 152), 1554 FIELD("MaxuPFLCredits:", 144, 151), 1555 FIELD("FLMcontextID:", 133, 143), 1556 FIELD1("uPTokenEn:", 132), 1557 FIELD1("UserModeIO:", 131), 1558 FIELD("uPFLCredits:", 123, 130), 1559 FIELD1("uPFLCreditEn:", 122), 1560 FIELD("FID:", 111, 121), 1561 FIELD("HostFCMode:", 109, 110), 1562 FIELD1("HostFCOwner:", 108), 1563 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1564 FIELD("CIDX:", 89, 104), 1565 FIELD("PIDX:", 73, 88), 1566 { "BaseAddress:", 18, 72, 9, 1 }, 1567 FIELD("QueueSize:", 2, 17), 1568 FIELD1("QueueType:", 1), 1569 FIELD1("CachePriority:", 0), 1570 { NULL } 1571 }; 1572 static struct field_desc ingress_t5[] = { 1573 FIELD("DCA_ST:", 143, 153), 1574 FIELD1("ISCSICoalescing:", 142), 1575 FIELD1("Queue_Valid:", 141), 1576 FIELD1("TimerPending:", 140), 1577 FIELD1("DropRSS:", 139), 1578 FIELD("PCIeChannel:", 137, 138), 1579 FIELD1("SEInterruptArmed:", 136), 1580 FIELD1("CongestionMgtEnable:", 135), 1581 FIELD1("NoSnoop:", 134), 1582 FIELD1("RelaxedOrdering:", 133), 1583 FIELD1("GTSmode:", 132), 1584 FIELD1("TPHintEn:", 131), 1585 FIELD("TPHint:", 129, 130), 1586 FIELD1("UpdateScheduling:", 128), 1587 FIELD("UpdateDelivery:", 126, 127), 1588 FIELD1("InterruptSent:", 125), 1589 FIELD("InterruptIDX:", 114, 124), 1590 FIELD1("InterruptDestination:", 113), 1591 FIELD1("InterruptArmed:", 112), 1592 FIELD("RxIntCounter:", 106, 111), 1593 FIELD("RxIntCounterThreshold:", 104, 105), 1594 FIELD1("Generation:", 103), 1595 { "BaseAddress:", 48, 102, 9, 1 }, 1596 FIELD("PIDX:", 32, 47), 1597 FIELD("CIDX:", 16, 31), 1598 { "QueueSize:", 4, 15, 4, 0 }, 1599 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1600 FIELD1("QueueEntryOverride:", 1), 1601 FIELD1("CachePriority:", 0), 1602 { NULL } 1603 }; 1604 static struct field_desc ingress_t6[] = { 1605 FIELD1("SP_NS:", 158), 1606 FIELD1("SP_RO:", 157), 1607 FIELD1("SP_TPHintEn:", 156), 1608 FIELD("SP_TPHint:", 154, 155), 1609 FIELD("DCA_ST:", 143, 153), 1610 FIELD1("ISCSICoalescing:", 142), 1611 FIELD1("Queue_Valid:", 141), 1612 FIELD1("TimerPending:", 140), 1613 FIELD1("DropRSS:", 139), 1614 FIELD("PCIeChannel:", 137, 138), 1615 FIELD1("SEInterruptArmed:", 136), 1616 FIELD1("CongestionMgtEnable:", 135), 1617 FIELD1("NoSnoop:", 134), 1618 FIELD1("RelaxedOrdering:", 133), 1619 FIELD1("GTSmode:", 132), 1620 FIELD1("TPHintEn:", 131), 1621 FIELD("TPHint:", 129, 130), 1622 FIELD1("UpdateScheduling:", 128), 1623 FIELD("UpdateDelivery:", 126, 127), 1624 FIELD1("InterruptSent:", 125), 1625 FIELD("InterruptIDX:", 114, 124), 1626 FIELD1("InterruptDestination:", 113), 1627 FIELD1("InterruptArmed:", 112), 1628 FIELD("RxIntCounter:", 106, 111), 1629 FIELD("RxIntCounterThreshold:", 104, 105), 1630 FIELD1("Generation:", 103), 1631 { "BaseAddress:", 48, 102, 9, 1 }, 1632 FIELD("PIDX:", 32, 47), 1633 FIELD("CIDX:", 16, 31), 1634 { "QueueSize:", 4, 15, 4, 0 }, 1635 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1636 FIELD1("QueueEntryOverride:", 1), 1637 FIELD1("CachePriority:", 0), 1638 { NULL } 1639 }; 1640 static struct field_desc flm_t5[] = { 1641 FIELD1("Valid:", 89), 1642 FIELD("SplitLenMode:", 87, 88), 1643 FIELD1("TPHintEn:", 86), 1644 FIELD("TPHint:", 84, 85), 1645 FIELD1("NoSnoop:", 83), 1646 FIELD1("RelaxedOrdering:", 82), 1647 FIELD("DCA_ST:", 71, 81), 1648 FIELD("EQid:", 54, 70), 1649 FIELD("SplitEn:", 52, 53), 1650 FIELD1("PadEn:", 51), 1651 FIELD1("PackEn:", 50), 1652 FIELD1("Cache_Lock :", 49), 1653 FIELD1("CongDrop:", 48), 1654 FIELD("PackOffset:", 16, 47), 1655 FIELD("CIDX:", 8, 15), 1656 FIELD("PIDX:", 0, 7), 1657 { NULL } 1658 }; 1659 static struct field_desc flm_t6[] = { 1660 FIELD1("Valid:", 89), 1661 FIELD("SplitLenMode:", 87, 88), 1662 FIELD1("TPHintEn:", 86), 1663 FIELD("TPHint:", 84, 85), 1664 FIELD1("NoSnoop:", 83), 1665 FIELD1("RelaxedOrdering:", 82), 1666 FIELD("DCA_ST:", 71, 81), 1667 FIELD("EQid:", 54, 70), 1668 FIELD("SplitEn:", 52, 53), 1669 FIELD1("PadEn:", 51), 1670 FIELD1("PackEn:", 50), 1671 FIELD1("Cache_Lock :", 49), 1672 FIELD1("CongDrop:", 48), 1673 FIELD1("Inflight:", 47), 1674 FIELD1("CongEn:", 46), 1675 FIELD1("CongMode:", 45), 1676 FIELD("PackOffset:", 20, 39), 1677 FIELD("CIDX:", 8, 15), 1678 FIELD("PIDX:", 0, 7), 1679 { NULL } 1680 }; 1681 static struct field_desc conm_t5[] = { 1682 FIELD1("CngMPSEnable:", 21), 1683 FIELD("CngTPMode:", 19, 20), 1684 FIELD1("CngDBPHdr:", 18), 1685 FIELD1("CngDBPData:", 17), 1686 FIELD1("CngIMSG:", 16), 1687 { "CngChMap:", 0, 15, 0, 1, 0 }, 1688 { NULL } 1689 }; 1690 1691 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1692 if (p->data[0] & 2) 1693 show_struct(p->data, 6, fl_t5); 1694 else if (vers == 5) 1695 show_struct(p->data, 6, egress_t5); 1696 else 1697 show_struct(p->data, 6, egress_t6); 1698 } else if (p->mem_id == SGE_CONTEXT_FLM) 1699 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1700 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1701 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1702 else if (p->mem_id == SGE_CONTEXT_CNM) 1703 show_struct(p->data, 1, conm_t5); 1704 } 1705 1706 static void 1707 show_t4_ctxt(const struct t4_sge_context *p) 1708 { 1709 static struct field_desc egress_t4[] = { 1710 FIELD1("StatusPgNS:", 180), 1711 FIELD1("StatusPgRO:", 179), 1712 FIELD1("FetchNS:", 178), 1713 FIELD1("FetchRO:", 177), 1714 FIELD1("Valid:", 176), 1715 FIELD("PCIeDataChannel:", 174, 175), 1716 FIELD1("DCAEgrQEn:", 173), 1717 FIELD("DCACPUID:", 168, 172), 1718 FIELD1("FCThreshOverride:", 167), 1719 FIELD("WRLength:", 162, 166), 1720 FIELD1("WRLengthKnown:", 161), 1721 FIELD1("ReschedulePending:", 160), 1722 FIELD1("OnChipQueue:", 159), 1723 FIELD1("FetchSizeMode", 158), 1724 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1725 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1726 FIELD("uPToken:", 133, 152), 1727 FIELD1("uPTokenEn:", 132), 1728 FIELD1("UserModeIO:", 131), 1729 FIELD("uPFLCredits:", 123, 130), 1730 FIELD1("uPFLCreditEn:", 122), 1731 FIELD("FID:", 111, 121), 1732 FIELD("HostFCMode:", 109, 110), 1733 FIELD1("HostFCOwner:", 108), 1734 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1735 FIELD("CIDX:", 89, 104), 1736 FIELD("PIDX:", 73, 88), 1737 { "BaseAddress:", 18, 72, 9, 1 }, 1738 FIELD("QueueSize:", 2, 17), 1739 FIELD1("QueueType:", 1), 1740 FIELD1("CachePriority:", 0), 1741 { NULL } 1742 }; 1743 static struct field_desc fl_t4[] = { 1744 FIELD1("StatusPgNS:", 180), 1745 FIELD1("StatusPgRO:", 179), 1746 FIELD1("FetchNS:", 178), 1747 FIELD1("FetchRO:", 177), 1748 FIELD1("Valid:", 176), 1749 FIELD("PCIeDataChannel:", 174, 175), 1750 FIELD1("DCAEgrQEn:", 173), 1751 FIELD("DCACPUID:", 168, 172), 1752 FIELD1("FCThreshOverride:", 167), 1753 FIELD1("ReschedulePending:", 160), 1754 FIELD1("OnChipQueue:", 159), 1755 FIELD1("FetchSizeMode", 158), 1756 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1757 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1758 FIELD1("FLMcongMode:", 152), 1759 FIELD("MaxuPFLCredits:", 144, 151), 1760 FIELD("FLMcontextID:", 133, 143), 1761 FIELD1("uPTokenEn:", 132), 1762 FIELD1("UserModeIO:", 131), 1763 FIELD("uPFLCredits:", 123, 130), 1764 FIELD1("uPFLCreditEn:", 122), 1765 FIELD("FID:", 111, 121), 1766 FIELD("HostFCMode:", 109, 110), 1767 FIELD1("HostFCOwner:", 108), 1768 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1769 FIELD("CIDX:", 89, 104), 1770 FIELD("PIDX:", 73, 88), 1771 { "BaseAddress:", 18, 72, 9, 1 }, 1772 FIELD("QueueSize:", 2, 17), 1773 FIELD1("QueueType:", 1), 1774 FIELD1("CachePriority:", 0), 1775 { NULL } 1776 }; 1777 static struct field_desc ingress_t4[] = { 1778 FIELD1("NoSnoop:", 145), 1779 FIELD1("RelaxedOrdering:", 144), 1780 FIELD1("GTSmode:", 143), 1781 FIELD1("ISCSICoalescing:", 142), 1782 FIELD1("Valid:", 141), 1783 FIELD1("TimerPending:", 140), 1784 FIELD1("DropRSS:", 139), 1785 FIELD("PCIeChannel:", 137, 138), 1786 FIELD1("SEInterruptArmed:", 136), 1787 FIELD1("CongestionMgtEnable:", 135), 1788 FIELD1("DCAIngQEnable:", 134), 1789 FIELD("DCACPUID:", 129, 133), 1790 FIELD1("UpdateScheduling:", 128), 1791 FIELD("UpdateDelivery:", 126, 127), 1792 FIELD1("InterruptSent:", 125), 1793 FIELD("InterruptIDX:", 114, 124), 1794 FIELD1("InterruptDestination:", 113), 1795 FIELD1("InterruptArmed:", 112), 1796 FIELD("RxIntCounter:", 106, 111), 1797 FIELD("RxIntCounterThreshold:", 104, 105), 1798 FIELD1("Generation:", 103), 1799 { "BaseAddress:", 48, 102, 9, 1 }, 1800 FIELD("PIDX:", 32, 47), 1801 FIELD("CIDX:", 16, 31), 1802 { "QueueSize:", 4, 15, 4, 0 }, 1803 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1804 FIELD1("QueueEntryOverride:", 1), 1805 FIELD1("CachePriority:", 0), 1806 { NULL } 1807 }; 1808 static struct field_desc flm_t4[] = { 1809 FIELD1("NoSnoop:", 79), 1810 FIELD1("RelaxedOrdering:", 78), 1811 FIELD1("Valid:", 77), 1812 FIELD("DCACPUID:", 72, 76), 1813 FIELD1("DCAFLEn:", 71), 1814 FIELD("EQid:", 54, 70), 1815 FIELD("SplitEn:", 52, 53), 1816 FIELD1("PadEn:", 51), 1817 FIELD1("PackEn:", 50), 1818 FIELD1("DBpriority:", 48), 1819 FIELD("PackOffset:", 16, 47), 1820 FIELD("CIDX:", 8, 15), 1821 FIELD("PIDX:", 0, 7), 1822 { NULL } 1823 }; 1824 static struct field_desc conm_t4[] = { 1825 FIELD1("CngDBPHdr:", 6), 1826 FIELD1("CngDBPData:", 5), 1827 FIELD1("CngIMSG:", 4), 1828 { "CngChMap:", 0, 3, 0, 1, 0}, 1829 { NULL } 1830 }; 1831 1832 if (p->mem_id == SGE_CONTEXT_EGRESS) 1833 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1834 else if (p->mem_id == SGE_CONTEXT_FLM) 1835 show_struct(p->data, 3, flm_t4); 1836 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1837 show_struct(p->data, 5, ingress_t4); 1838 else if (p->mem_id == SGE_CONTEXT_CNM) 1839 show_struct(p->data, 1, conm_t4); 1840 } 1841 1842 #undef FIELD 1843 #undef FIELD1 1844 1845 static int 1846 get_sge_context(int argc, const char *argv[]) 1847 { 1848 int rc; 1849 char *p; 1850 long cid; 1851 struct t4_sge_context cntxt = {0}; 1852 1853 if (argc != 2) { 1854 warnx("sge_context: incorrect number of arguments."); 1855 return (EINVAL); 1856 } 1857 1858 if (!strcmp(argv[0], "egress")) 1859 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1860 else if (!strcmp(argv[0], "ingress")) 1861 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1862 else if (!strcmp(argv[0], "fl")) 1863 cntxt.mem_id = SGE_CONTEXT_FLM; 1864 else if (!strcmp(argv[0], "cong")) 1865 cntxt.mem_id = SGE_CONTEXT_CNM; 1866 else { 1867 warnx("unknown context type \"%s\"; known types are egress, " 1868 "ingress, fl, and cong.", argv[0]); 1869 return (EINVAL); 1870 } 1871 1872 p = str_to_number(argv[1], &cid, NULL); 1873 if (*p) { 1874 warnx("invalid context id \"%s\"", argv[1]); 1875 return (EINVAL); 1876 } 1877 cntxt.cid = cid; 1878 1879 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1880 if (rc != 0) 1881 return (rc); 1882 1883 if (chip_id == 4) 1884 show_t4_ctxt(&cntxt); 1885 else 1886 show_t5t6_ctxt(&cntxt, chip_id); 1887 1888 return (0); 1889 } 1890 1891 static int 1892 loadfw(int argc, const char *argv[]) 1893 { 1894 int rc, fd; 1895 struct t4_data data = {0}; 1896 const char *fname = argv[0]; 1897 struct stat st = {0}; 1898 1899 if (argc != 1) { 1900 warnx("loadfw: incorrect number of arguments."); 1901 return (EINVAL); 1902 } 1903 1904 fd = open(fname, O_RDONLY); 1905 if (fd < 0) { 1906 warn("open(%s)", fname); 1907 return (errno); 1908 } 1909 1910 if (fstat(fd, &st) < 0) { 1911 warn("fstat"); 1912 close(fd); 1913 return (errno); 1914 } 1915 1916 data.len = st.st_size; 1917 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1918 if (data.data == MAP_FAILED) { 1919 warn("mmap"); 1920 close(fd); 1921 return (errno); 1922 } 1923 1924 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1925 munmap(data.data, data.len); 1926 close(fd); 1927 return (rc); 1928 } 1929 1930 static int 1931 loadcfg(int argc, const char *argv[]) 1932 { 1933 int rc, fd; 1934 struct t4_data data = {0}; 1935 const char *fname = argv[0]; 1936 struct stat st = {0}; 1937 1938 if (argc != 1) { 1939 warnx("loadcfg: incorrect number of arguments."); 1940 return (EINVAL); 1941 } 1942 1943 if (strcmp(fname, "clear") == 0) 1944 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1945 1946 fd = open(fname, O_RDONLY); 1947 if (fd < 0) { 1948 warn("open(%s)", fname); 1949 return (errno); 1950 } 1951 1952 if (fstat(fd, &st) < 0) { 1953 warn("fstat"); 1954 close(fd); 1955 return (errno); 1956 } 1957 1958 data.len = st.st_size; 1959 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 1960 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1961 if (data.data == MAP_FAILED) { 1962 warn("mmap"); 1963 close(fd); 1964 return (errno); 1965 } 1966 1967 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 1968 munmap(data.data, data.len); 1969 close(fd); 1970 return (rc); 1971 } 1972 1973 static int 1974 dumpstate(int argc, const char *argv[]) 1975 { 1976 int rc, fd; 1977 struct t4_cudbg_dump dump = {0}; 1978 const char *fname = argv[0]; 1979 1980 if (argc != 1) { 1981 warnx("dumpstate: incorrect number of arguments."); 1982 return (EINVAL); 1983 } 1984 1985 dump.wr_flash = 0; 1986 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 1987 dump.len = 8 * 1024 * 1024; 1988 dump.data = malloc(dump.len); 1989 if (dump.data == NULL) { 1990 return (ENOMEM); 1991 } 1992 1993 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 1994 if (rc != 0) 1995 goto done; 1996 1997 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 1998 S_IRUSR | S_IRGRP | S_IROTH); 1999 if (fd < 0) { 2000 warn("open(%s)", fname); 2001 rc = errno; 2002 goto done; 2003 } 2004 write(fd, dump.data, dump.len); 2005 close(fd); 2006 done: 2007 free(dump.data); 2008 return (rc); 2009 } 2010 2011 static int 2012 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2013 { 2014 int rc; 2015 struct t4_mem_range mr; 2016 2017 mr.addr = addr; 2018 mr.len = len; 2019 mr.data = malloc(mr.len); 2020 2021 if (mr.data == 0) { 2022 warn("read_mem: malloc"); 2023 return (errno); 2024 } 2025 2026 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2027 if (rc != 0) 2028 goto done; 2029 2030 if (output) 2031 (*output)(mr.data, mr.len); 2032 done: 2033 free(mr.data); 2034 return (rc); 2035 } 2036 2037 static int 2038 loadboot(int argc, const char *argv[]) 2039 { 2040 int rc, fd; 2041 long l; 2042 char *p; 2043 struct t4_bootrom br = {0}; 2044 const char *fname = argv[0]; 2045 struct stat st = {0}; 2046 2047 if (argc == 1) { 2048 br.pf_offset = 0; 2049 br.pfidx_addr = 0; 2050 } else if (argc == 3) { 2051 if (!strcmp(argv[1], "pf")) 2052 br.pf_offset = 0; 2053 else if (!strcmp(argv[1], "offset")) 2054 br.pf_offset = 1; 2055 else 2056 return (EINVAL); 2057 2058 p = str_to_number(argv[2], &l, NULL); 2059 if (*p) 2060 return (EINVAL); 2061 br.pfidx_addr = l; 2062 } else { 2063 warnx("loadboot: incorrect number of arguments."); 2064 return (EINVAL); 2065 } 2066 2067 if (strcmp(fname, "clear") == 0) 2068 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2069 2070 fd = open(fname, O_RDONLY); 2071 if (fd < 0) { 2072 warn("open(%s)", fname); 2073 return (errno); 2074 } 2075 2076 if (fstat(fd, &st) < 0) { 2077 warn("fstat"); 2078 close(fd); 2079 return (errno); 2080 } 2081 2082 br.len = st.st_size; 2083 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2084 if (br.data == MAP_FAILED) { 2085 warn("mmap"); 2086 close(fd); 2087 return (errno); 2088 } 2089 2090 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2091 munmap(br.data, br.len); 2092 close(fd); 2093 return (rc); 2094 } 2095 2096 static int 2097 loadbootcfg(int argc, const char *argv[]) 2098 { 2099 int rc, fd; 2100 struct t4_data bc = {0}; 2101 const char *fname = argv[0]; 2102 struct stat st = {0}; 2103 2104 if (argc != 1) { 2105 warnx("loadbootcfg: incorrect number of arguments."); 2106 return (EINVAL); 2107 } 2108 2109 if (strcmp(fname, "clear") == 0) 2110 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2111 2112 fd = open(fname, O_RDONLY); 2113 if (fd < 0) { 2114 warn("open(%s)", fname); 2115 return (errno); 2116 } 2117 2118 if (fstat(fd, &st) < 0) { 2119 warn("fstat"); 2120 close(fd); 2121 return (errno); 2122 } 2123 2124 bc.len = st.st_size; 2125 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2126 if (bc.data == MAP_FAILED) { 2127 warn("mmap"); 2128 close(fd); 2129 return (errno); 2130 } 2131 2132 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2133 munmap(bc.data, bc.len); 2134 close(fd); 2135 return (rc); 2136 } 2137 2138 /* 2139 * Display memory as list of 'n' 4-byte values per line. 2140 */ 2141 static void 2142 show_mem(uint32_t *buf, uint32_t len) 2143 { 2144 const char *s; 2145 int i, n = 8; 2146 2147 while (len) { 2148 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2149 s = i ? " " : ""; 2150 printf("%s%08x", s, htonl(*buf)); 2151 } 2152 printf("\n"); 2153 } 2154 } 2155 2156 static int 2157 memdump(int argc, const char *argv[]) 2158 { 2159 char *p; 2160 long l; 2161 uint32_t addr, len; 2162 2163 if (argc != 2) { 2164 warnx("incorrect number of arguments."); 2165 return (EINVAL); 2166 } 2167 2168 p = str_to_number(argv[0], &l, NULL); 2169 if (*p) { 2170 warnx("invalid address \"%s\"", argv[0]); 2171 return (EINVAL); 2172 } 2173 addr = l; 2174 2175 p = str_to_number(argv[1], &l, NULL); 2176 if (*p) { 2177 warnx("memdump: invalid length \"%s\"", argv[1]); 2178 return (EINVAL); 2179 } 2180 len = l; 2181 2182 return (read_mem(addr, len, show_mem)); 2183 } 2184 2185 /* 2186 * Display TCB as list of 'n' 4-byte values per line. 2187 */ 2188 static void 2189 show_tcb(uint32_t *buf, uint32_t len) 2190 { 2191 unsigned char *tcb = (unsigned char *)buf; 2192 const char *s; 2193 int i, n = 8; 2194 2195 while (len) { 2196 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2197 s = i ? " " : ""; 2198 printf("%s%08x", s, htonl(*buf)); 2199 } 2200 printf("\n"); 2201 } 2202 set_tcb_info(TIDTYPE_TCB, chip_id); 2203 set_print_style(PRNTSTYL_COMP); 2204 swizzle_tcb(tcb); 2205 parse_n_display_xcb(tcb); 2206 } 2207 2208 #define A_TP_CMM_TCB_BASE 0x7d10 2209 #define TCB_SIZE 128 2210 static int 2211 read_tcb(int argc, const char *argv[]) 2212 { 2213 char *p; 2214 long l; 2215 long long val; 2216 unsigned int tid; 2217 uint32_t addr; 2218 int rc; 2219 2220 if (argc != 1) { 2221 warnx("incorrect number of arguments."); 2222 return (EINVAL); 2223 } 2224 2225 p = str_to_number(argv[0], &l, NULL); 2226 if (*p) { 2227 warnx("invalid tid \"%s\"", argv[0]); 2228 return (EINVAL); 2229 } 2230 tid = l; 2231 2232 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2233 if (rc != 0) 2234 return (rc); 2235 2236 addr = val + tid * TCB_SIZE; 2237 2238 return (read_mem(addr, TCB_SIZE, show_tcb)); 2239 } 2240 2241 static int 2242 read_i2c(int argc, const char *argv[]) 2243 { 2244 char *p; 2245 long l; 2246 struct t4_i2c_data i2cd; 2247 int rc, i; 2248 2249 if (argc < 3 || argc > 4) { 2250 warnx("incorrect number of arguments."); 2251 return (EINVAL); 2252 } 2253 2254 p = str_to_number(argv[0], &l, NULL); 2255 if (*p || l > UCHAR_MAX) { 2256 warnx("invalid port id \"%s\"", argv[0]); 2257 return (EINVAL); 2258 } 2259 i2cd.port_id = l; 2260 2261 p = str_to_number(argv[1], &l, NULL); 2262 if (*p || l > UCHAR_MAX) { 2263 warnx("invalid i2c device address \"%s\"", argv[1]); 2264 return (EINVAL); 2265 } 2266 i2cd.dev_addr = l; 2267 2268 p = str_to_number(argv[2], &l, NULL); 2269 if (*p || l > UCHAR_MAX) { 2270 warnx("invalid byte offset \"%s\"", argv[2]); 2271 return (EINVAL); 2272 } 2273 i2cd.offset = l; 2274 2275 if (argc == 4) { 2276 p = str_to_number(argv[3], &l, NULL); 2277 if (*p || l > sizeof(i2cd.data)) { 2278 warnx("invalid number of bytes \"%s\"", argv[3]); 2279 return (EINVAL); 2280 } 2281 i2cd.len = l; 2282 } else 2283 i2cd.len = 1; 2284 2285 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2286 if (rc != 0) 2287 return (rc); 2288 2289 for (i = 0; i < i2cd.len; i++) 2290 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2291 2292 return (0); 2293 } 2294 2295 static int 2296 clearstats(int argc, const char *argv[]) 2297 { 2298 char *p; 2299 long l; 2300 uint32_t port; 2301 2302 if (argc != 1) { 2303 warnx("incorrect number of arguments."); 2304 return (EINVAL); 2305 } 2306 2307 p = str_to_number(argv[0], &l, NULL); 2308 if (*p) { 2309 warnx("invalid port id \"%s\"", argv[0]); 2310 return (EINVAL); 2311 } 2312 port = l; 2313 2314 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2315 } 2316 2317 static int 2318 show_tracers(void) 2319 { 2320 struct t4_tracer t; 2321 char *s; 2322 int rc, port_idx, i; 2323 long long val; 2324 2325 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2326 rc = read_reg(0x9800, 4, &val); 2327 if (rc != 0) 2328 return (rc); 2329 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2330 2331 t.idx = 0; 2332 for (t.idx = 0; ; t.idx++) { 2333 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2334 if (rc != 0 || t.idx == 0xff) 2335 break; 2336 2337 if (t.tp.port < 4) { 2338 s = "Rx"; 2339 port_idx = t.tp.port; 2340 } else if (t.tp.port < 8) { 2341 s = "Tx"; 2342 port_idx = t.tp.port - 4; 2343 } else if (t.tp.port < 12) { 2344 s = "loopback"; 2345 port_idx = t.tp.port - 8; 2346 } else if (t.tp.port < 16) { 2347 s = "MPS Rx"; 2348 port_idx = t.tp.port - 12; 2349 } else if (t.tp.port < 20) { 2350 s = "MPS Tx"; 2351 port_idx = t.tp.port - 16; 2352 } else { 2353 s = "unknown"; 2354 port_idx = t.tp.port; 2355 } 2356 2357 printf("\ntracer %u (currently %s) captures ", t.idx, 2358 t.enabled ? "ENABLED" : "DISABLED"); 2359 if (t.tp.port < 8) 2360 printf("port %u %s, ", port_idx, s); 2361 else 2362 printf("%s %u, ", s, port_idx); 2363 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2364 t.tp.min_len); 2365 printf("packets captured %smatch filter\n", 2366 t.tp.invert ? "do not " : ""); 2367 if (t.tp.skip_ofst) { 2368 printf("filter pattern: "); 2369 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2370 printf("%08x%08x", t.tp.data[i], 2371 t.tp.data[i + 1]); 2372 printf("/"); 2373 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2374 printf("%08x%08x", t.tp.mask[i], 2375 t.tp.mask[i + 1]); 2376 printf("@0\n"); 2377 } 2378 printf("filter pattern: "); 2379 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2380 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2381 printf("/"); 2382 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2383 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2384 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2385 } 2386 2387 return (rc); 2388 } 2389 2390 static int 2391 tracer_onoff(uint8_t idx, int enabled) 2392 { 2393 struct t4_tracer t; 2394 2395 t.idx = idx; 2396 t.enabled = enabled; 2397 t.valid = 0; 2398 2399 return doit(CHELSIO_T4_SET_TRACER, &t); 2400 } 2401 2402 static void 2403 create_tracing_ifnet() 2404 { 2405 char *cmd[] = { 2406 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2407 }; 2408 char *env[] = {NULL}; 2409 2410 if (vfork() == 0) { 2411 close(STDERR_FILENO); 2412 execve(cmd[0], cmd, env); 2413 _exit(0); 2414 } 2415 } 2416 2417 /* 2418 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2419 * matching). Right now this is a quick-n-dirty implementation that traces the 2420 * first 128B of all tx or rx on a port 2421 */ 2422 static int 2423 set_tracer(uint8_t idx, int argc, const char *argv[]) 2424 { 2425 struct t4_tracer t; 2426 int len, port; 2427 2428 bzero(&t, sizeof (t)); 2429 t.idx = idx; 2430 t.enabled = 1; 2431 t.valid = 1; 2432 2433 if (argc != 1) { 2434 warnx("must specify tx<n> or rx<n>."); 2435 return (EINVAL); 2436 } 2437 2438 len = strlen(argv[0]); 2439 if (len != 3) { 2440 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2441 return (EINVAL); 2442 } 2443 2444 if (strncmp(argv[0], "tx", 2) == 0) { 2445 port = argv[0][2] - '0'; 2446 if (port < 0 || port > 3) { 2447 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2448 return (EINVAL); 2449 } 2450 port += 4; 2451 } else if (strncmp(argv[0], "rx", 2) == 0) { 2452 port = argv[0][2] - '0'; 2453 if (port < 0 || port > 3) { 2454 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2455 return (EINVAL); 2456 } 2457 } else { 2458 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2459 return (EINVAL); 2460 } 2461 2462 t.tp.snap_len = 128; 2463 t.tp.min_len = 0; 2464 t.tp.skip_ofst = 0; 2465 t.tp.skip_len = 0; 2466 t.tp.invert = 0; 2467 t.tp.port = port; 2468 2469 create_tracing_ifnet(); 2470 return doit(CHELSIO_T4_SET_TRACER, &t); 2471 } 2472 2473 static int 2474 tracer_cmd(int argc, const char *argv[]) 2475 { 2476 long long val; 2477 uint8_t idx; 2478 char *s; 2479 2480 if (argc == 0) { 2481 warnx("tracer: no arguments."); 2482 return (EINVAL); 2483 }; 2484 2485 /* list */ 2486 if (strcmp(argv[0], "list") == 0) { 2487 if (argc != 1) 2488 warnx("trailing arguments after \"list\" ignored."); 2489 2490 return show_tracers(); 2491 } 2492 2493 /* <idx> ... */ 2494 s = str_to_number(argv[0], NULL, &val); 2495 if (*s || val > 0xff) { 2496 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2497 argv[0]); 2498 return (EINVAL); 2499 } 2500 idx = (int8_t)val; 2501 2502 /* <idx> disable */ 2503 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2504 return tracer_onoff(idx, 0); 2505 2506 /* <idx> enable */ 2507 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2508 return tracer_onoff(idx, 1); 2509 2510 /* <idx> ... */ 2511 return set_tracer(idx, argc - 1, argv + 1); 2512 } 2513 2514 static int 2515 modinfo_raw(int port_id) 2516 { 2517 uint8_t offset; 2518 struct t4_i2c_data i2cd; 2519 int rc; 2520 2521 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2522 bzero(&i2cd, sizeof(i2cd)); 2523 i2cd.port_id = port_id; 2524 i2cd.dev_addr = 0xa0; 2525 i2cd.offset = offset; 2526 i2cd.len = sizeof(i2cd.data); 2527 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2528 if (rc != 0) 2529 return (rc); 2530 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2531 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2532 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2533 i2cd.data[7]); 2534 2535 printf(" %c%c%c%c %c%c%c%c\n", 2536 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2537 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2538 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2539 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2540 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2541 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2542 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2543 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2544 } 2545 2546 return (0); 2547 } 2548 2549 static int 2550 modinfo(int argc, const char *argv[]) 2551 { 2552 long port; 2553 char string[16], *p; 2554 struct t4_i2c_data i2cd; 2555 int rc, i; 2556 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2557 2558 if (argc < 1) { 2559 warnx("must supply a port"); 2560 return (EINVAL); 2561 } 2562 2563 if (argc > 2) { 2564 warnx("too many arguments"); 2565 return (EINVAL); 2566 } 2567 2568 p = str_to_number(argv[0], &port, NULL); 2569 if (*p || port > UCHAR_MAX) { 2570 warnx("invalid port id \"%s\"", argv[0]); 2571 return (EINVAL); 2572 } 2573 2574 if (argc == 2) { 2575 if (!strcmp(argv[1], "raw")) 2576 return (modinfo_raw(port)); 2577 else { 2578 warnx("second argument can only be \"raw\""); 2579 return (EINVAL); 2580 } 2581 } 2582 2583 bzero(&i2cd, sizeof(i2cd)); 2584 i2cd.len = 1; 2585 i2cd.port_id = port; 2586 i2cd.dev_addr = SFF_8472_BASE; 2587 2588 i2cd.offset = SFF_8472_ID; 2589 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2590 goto fail; 2591 2592 if (i2cd.data[0] > SFF_8472_ID_LAST) 2593 printf("Unknown ID\n"); 2594 else 2595 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2596 2597 bzero(&string, sizeof(string)); 2598 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2599 i2cd.offset = i; 2600 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2601 goto fail; 2602 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2603 } 2604 printf("Vendor %s\n", string); 2605 2606 bzero(&string, sizeof(string)); 2607 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2608 i2cd.offset = i; 2609 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2610 goto fail; 2611 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2612 } 2613 printf("SN %s\n", string); 2614 2615 bzero(&string, sizeof(string)); 2616 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2617 i2cd.offset = i; 2618 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2619 goto fail; 2620 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2621 } 2622 printf("PN %s\n", string); 2623 2624 bzero(&string, sizeof(string)); 2625 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2626 i2cd.offset = i; 2627 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2628 goto fail; 2629 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2630 } 2631 printf("Rev %s\n", string); 2632 2633 i2cd.offset = SFF_8472_DIAG_TYPE; 2634 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2635 goto fail; 2636 2637 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2638 SFF_8472_DIAG_INTERNAL)) { 2639 2640 /* Switch to reading from the Diagnostic address. */ 2641 i2cd.dev_addr = SFF_8472_DIAG; 2642 i2cd.len = 1; 2643 2644 i2cd.offset = SFF_8472_TEMP; 2645 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2646 goto fail; 2647 temp = i2cd.data[0] << 8; 2648 printf("Temp: "); 2649 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2650 printf("-"); 2651 else 2652 printf("+"); 2653 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2654 SFF_8472_TEMP_SHIFT); 2655 2656 i2cd.offset = SFF_8472_VCC; 2657 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2658 goto fail; 2659 vcc = i2cd.data[0] << 8; 2660 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2661 2662 i2cd.offset = SFF_8472_TX_BIAS; 2663 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2664 goto fail; 2665 tx_bias = i2cd.data[0] << 8; 2666 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2667 2668 i2cd.offset = SFF_8472_TX_POWER; 2669 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2670 goto fail; 2671 tx_power = i2cd.data[0] << 8; 2672 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2673 2674 i2cd.offset = SFF_8472_RX_POWER; 2675 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2676 goto fail; 2677 rx_power = i2cd.data[0] << 8; 2678 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2679 2680 } else 2681 printf("Diagnostics not supported.\n"); 2682 2683 return(0); 2684 2685 fail: 2686 if (rc == EPERM) 2687 warnx("No module/cable in port %ld", port); 2688 return (rc); 2689 2690 } 2691 2692 /* XXX: pass in a low/high and do range checks as well */ 2693 static int 2694 get_sched_param(const char *param, const char *args[], long *val) 2695 { 2696 char *p; 2697 2698 if (strcmp(param, args[0]) != 0) 2699 return (EINVAL); 2700 2701 p = str_to_number(args[1], val, NULL); 2702 if (*p) { 2703 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2704 args[1]); 2705 return (EINVAL); 2706 } 2707 2708 return (0); 2709 } 2710 2711 static int 2712 sched_class(int argc, const char *argv[]) 2713 { 2714 struct t4_sched_params op; 2715 int errs, i; 2716 2717 memset(&op, 0xff, sizeof(op)); 2718 op.subcmd = -1; 2719 op.type = -1; 2720 if (argc == 0) { 2721 warnx("missing scheduling sub-command"); 2722 return (EINVAL); 2723 } 2724 if (!strcmp(argv[0], "config")) { 2725 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2726 op.u.config.minmax = -1; 2727 } else if (!strcmp(argv[0], "params")) { 2728 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2729 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2730 op.u.params.ratemode = op.u.params.channel = 2731 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2732 op.u.params.weight = op.u.params.pktsize = -1; 2733 } else { 2734 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2735 return (EINVAL); 2736 } 2737 2738 /* Decode remaining arguments ... */ 2739 errs = 0; 2740 for (i = 1; i < argc; i += 2) { 2741 const char **args = &argv[i]; 2742 long l; 2743 2744 if (i + 1 == argc) { 2745 warnx("missing argument for \"%s\"", args[0]); 2746 errs++; 2747 break; 2748 } 2749 2750 if (!strcmp(args[0], "type")) { 2751 if (!strcmp(args[1], "packet")) 2752 op.type = SCHED_CLASS_TYPE_PACKET; 2753 else { 2754 warnx("invalid type parameter \"%s\"", args[1]); 2755 errs++; 2756 } 2757 2758 continue; 2759 } 2760 2761 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2762 if(!get_sched_param("minmax", args, &l)) 2763 op.u.config.minmax = (int8_t)l; 2764 else { 2765 warnx("unknown scheduler config parameter " 2766 "\"%s\"", args[0]); 2767 errs++; 2768 } 2769 2770 continue; 2771 } 2772 2773 /* Rest applies only to SUBCMD_PARAMS */ 2774 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2775 continue; 2776 2777 if (!strcmp(args[0], "level")) { 2778 if (!strcmp(args[1], "cl-rl")) 2779 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2780 else if (!strcmp(args[1], "cl-wrr")) 2781 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2782 else if (!strcmp(args[1], "ch-rl")) 2783 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2784 else { 2785 warnx("invalid level parameter \"%s\"", 2786 args[1]); 2787 errs++; 2788 } 2789 } else if (!strcmp(args[0], "mode")) { 2790 if (!strcmp(args[1], "class")) 2791 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2792 else if (!strcmp(args[1], "flow")) 2793 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2794 else { 2795 warnx("invalid mode parameter \"%s\"", args[1]); 2796 errs++; 2797 } 2798 } else if (!strcmp(args[0], "rate-unit")) { 2799 if (!strcmp(args[1], "bits")) 2800 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2801 else if (!strcmp(args[1], "pkts")) 2802 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2803 else { 2804 warnx("invalid rate-unit parameter \"%s\"", 2805 args[1]); 2806 errs++; 2807 } 2808 } else if (!strcmp(args[0], "rate-mode")) { 2809 if (!strcmp(args[1], "relative")) 2810 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2811 else if (!strcmp(args[1], "absolute")) 2812 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2813 else { 2814 warnx("invalid rate-mode parameter \"%s\"", 2815 args[1]); 2816 errs++; 2817 } 2818 } else if (!get_sched_param("channel", args, &l)) 2819 op.u.params.channel = (int8_t)l; 2820 else if (!get_sched_param("class", args, &l)) 2821 op.u.params.cl = (int8_t)l; 2822 else if (!get_sched_param("min-rate", args, &l)) 2823 op.u.params.minrate = (int32_t)l; 2824 else if (!get_sched_param("max-rate", args, &l)) 2825 op.u.params.maxrate = (int32_t)l; 2826 else if (!get_sched_param("weight", args, &l)) 2827 op.u.params.weight = (int16_t)l; 2828 else if (!get_sched_param("pkt-size", args, &l)) 2829 op.u.params.pktsize = (int16_t)l; 2830 else { 2831 warnx("unknown scheduler parameter \"%s\"", args[0]); 2832 errs++; 2833 } 2834 } 2835 2836 /* 2837 * Catch some logical fallacies in terms of argument combinations here 2838 * so we can offer more than just the EINVAL return from the driver. 2839 * The driver will be able to catch a lot more issues since it knows 2840 * the specifics of the device hardware capabilities like how many 2841 * channels, classes, etc. the device supports. 2842 */ 2843 if (op.type < 0) { 2844 warnx("sched \"type\" parameter missing"); 2845 errs++; 2846 } 2847 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2848 if (op.u.config.minmax < 0) { 2849 warnx("sched config \"minmax\" parameter missing"); 2850 errs++; 2851 } 2852 } 2853 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2854 if (op.u.params.level < 0) { 2855 warnx("sched params \"level\" parameter missing"); 2856 errs++; 2857 } 2858 if (op.u.params.mode < 0) { 2859 warnx("sched params \"mode\" parameter missing"); 2860 errs++; 2861 } 2862 if (op.u.params.rateunit < 0) { 2863 warnx("sched params \"rate-unit\" parameter missing"); 2864 errs++; 2865 } 2866 if (op.u.params.ratemode < 0) { 2867 warnx("sched params \"rate-mode\" parameter missing"); 2868 errs++; 2869 } 2870 if (op.u.params.channel < 0) { 2871 warnx("sched params \"channel\" missing"); 2872 errs++; 2873 } 2874 if (op.u.params.cl < 0) { 2875 warnx("sched params \"class\" missing"); 2876 errs++; 2877 } 2878 if (op.u.params.maxrate < 0 && 2879 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2880 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2881 warnx("sched params \"max-rate\" missing for " 2882 "rate-limit level"); 2883 errs++; 2884 } 2885 if (op.u.params.weight < 0 && 2886 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) { 2887 warnx("sched params \"weight\" missing for " 2888 "weighted-round-robin level"); 2889 errs++; 2890 } 2891 if (op.u.params.pktsize < 0 && 2892 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2893 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2894 warnx("sched params \"pkt-size\" missing for " 2895 "rate-limit level"); 2896 errs++; 2897 } 2898 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2899 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2900 warnx("sched params mode flow needs rate-mode absolute"); 2901 errs++; 2902 } 2903 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2904 !in_range(op.u.params.maxrate, 1, 100)) { 2905 warnx("sched params \"max-rate\" takes " 2906 "percentage value(1-100) for rate-mode relative"); 2907 errs++; 2908 } 2909 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2910 !in_range(op.u.params.maxrate, 1, 100000000)) { 2911 warnx("sched params \"max-rate\" takes " 2912 "value(1-100000000) for rate-mode absolute"); 2913 errs++; 2914 } 2915 if (op.u.params.maxrate > 0 && 2916 op.u.params.maxrate < op.u.params.minrate) { 2917 warnx("sched params \"max-rate\" is less than " 2918 "\"min-rate\""); 2919 errs++; 2920 } 2921 } 2922 2923 if (errs > 0) { 2924 warnx("%d error%s in sched-class command", errs, 2925 errs == 1 ? "" : "s"); 2926 return (EINVAL); 2927 } 2928 2929 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2930 } 2931 2932 static int 2933 sched_queue(int argc, const char *argv[]) 2934 { 2935 struct t4_sched_queue op = {0}; 2936 char *p; 2937 long val; 2938 2939 if (argc != 3) { 2940 /* need "<port> <queue> <class> */ 2941 warnx("incorrect number of arguments."); 2942 return (EINVAL); 2943 } 2944 2945 p = str_to_number(argv[0], &val, NULL); 2946 if (*p || val > UCHAR_MAX) { 2947 warnx("invalid port id \"%s\"", argv[0]); 2948 return (EINVAL); 2949 } 2950 op.port = (uint8_t)val; 2951 2952 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 2953 op.queue = -1; 2954 else { 2955 p = str_to_number(argv[1], &val, NULL); 2956 if (*p || val < -1) { 2957 warnx("invalid queue \"%s\"", argv[1]); 2958 return (EINVAL); 2959 } 2960 op.queue = (int8_t)val; 2961 } 2962 2963 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 2964 op.cl = -1; 2965 else { 2966 p = str_to_number(argv[2], &val, NULL); 2967 if (*p || val < -1) { 2968 warnx("invalid class \"%s\"", argv[2]); 2969 return (EINVAL); 2970 } 2971 op.cl = (int8_t)val; 2972 } 2973 2974 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 2975 } 2976 2977 static int 2978 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 2979 int *pneg, struct offload_settings *os) 2980 { 2981 2982 while (*s == '!') { 2983 (*pneg)++; 2984 s++; 2985 } 2986 2987 if (!strcmp(s, "not")) { 2988 (*pneg)++; 2989 return (0); 2990 } 2991 2992 if (!strcmp(s, "offload")) { 2993 os->offload = (*pneg + 1) & 1; 2994 *pneg = 0; 2995 } else if (!strcmp(s , "coalesce")) { 2996 os->rx_coalesce = (*pneg + 1) & 1; 2997 *pneg = 0; 2998 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 2999 os->tstamp = (*pneg + 1) & 1; 3000 *pneg = 0; 3001 } else if (!strcmp(s, "sack")) { 3002 os->sack = (*pneg + 1) & 1; 3003 *pneg = 0; 3004 } else if (!strcmp(s, "nagle")) { 3005 os->nagle = (*pneg + 1) & 1; 3006 *pneg = 0; 3007 } else if (!strcmp(s, "ecn")) { 3008 os->ecn = (*pneg + 1) & 1; 3009 *pneg = 0; 3010 } else if (!strcmp(s, "ddp")) { 3011 os->ddp = (*pneg + 1) & 1; 3012 *pneg = 0; 3013 } else if (!strcmp(s, "tls")) { 3014 os->tls = (*pneg + 1) & 1; 3015 *pneg = 0; 3016 } else { 3017 char *param, *p; 3018 long val; 3019 3020 /* Settings with additional parameter handled here. */ 3021 3022 if (*pneg) { 3023 warnx("\"%s\" is not a valid keyword, or it does not " 3024 "support negation.", s); 3025 return (EINVAL); 3026 } 3027 3028 while ((param = strsep(pnext, ws)) != NULL) { 3029 if (*param != '\0') 3030 break; 3031 } 3032 if (param == NULL) { 3033 warnx("\"%s\" is not a valid keyword, or it requires a " 3034 "parameter that has not been provided.", s); 3035 return (EINVAL); 3036 } 3037 3038 if (!strcmp(s, "cong")) { 3039 if (!strcmp(param, "reno")) 3040 os->cong_algo = 0; 3041 else if (!strcmp(param, "tahoe")) 3042 os->cong_algo = 1; 3043 else if (!strcmp(param, "newreno")) 3044 os->cong_algo = 2; 3045 else if (!strcmp(param, "highspeed")) 3046 os->cong_algo = 3; 3047 else { 3048 warnx("unknown congestion algorithm \"%s\".", s); 3049 return (EINVAL); 3050 } 3051 } else if (!strcmp(s, "class")) { 3052 val = -1; 3053 p = str_to_number(param, &val, NULL); 3054 /* (nsched_cls - 1) is spelled 15 here. */ 3055 if (*p || val < 0 || val > 15) { 3056 warnx("invalid scheduling class \"%s\". " 3057 "\"class\" needs an integer value where " 3058 "0 <= value <= 15", param); 3059 return (EINVAL); 3060 } 3061 os->sched_class = val; 3062 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3063 !strcmp(s, "rxq")) { 3064 val = -1; 3065 if (strcmp(param, "random")) { 3066 p = str_to_number(param, &val, NULL); 3067 if (*p || val < 0 || val > 0xffff) { 3068 warnx("invalid queue specification " 3069 "\"%s\". \"%s\" needs an integer" 3070 " value, or \"random\".", 3071 param, s); 3072 return (EINVAL); 3073 } 3074 } 3075 if (!strcmp(s, "bind")) { 3076 os->txq = val; 3077 os->rxq = val; 3078 } else if (!strcmp(s, "txq")) { 3079 os->txq = val; 3080 } else if (!strcmp(s, "rxq")) { 3081 os->rxq = val; 3082 } else { 3083 return (EDOOFUS); 3084 } 3085 } else if (!strcmp(s, "mss")) { 3086 val = -1; 3087 p = str_to_number(param, &val, NULL); 3088 if (*p || val <= 0) { 3089 warnx("invalid MSS specification \"%s\". " 3090 "\"mss\" needs a positive integer value", 3091 param); 3092 return (EINVAL); 3093 } 3094 os->mss = val; 3095 } else { 3096 warnx("unknown settings keyword: \"%s\"", s); 3097 return (EINVAL); 3098 } 3099 } 3100 3101 return (0); 3102 } 3103 3104 static int 3105 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3106 { 3107 const char *ws = " \f\n\r\v\t"; 3108 char *settings, *s, *next; 3109 int rc, nsettings, neg; 3110 static const struct offload_settings default_settings = { 3111 .offload = 0, /* No settings imply !offload */ 3112 .rx_coalesce = -1, 3113 .cong_algo = -1, 3114 .sched_class = -1, 3115 .tstamp = -1, 3116 .sack = -1, 3117 .nagle = -1, 3118 .ecn = -1, 3119 .ddp = -1, 3120 .tls = -1, 3121 .txq = -1, 3122 .rxq = -1, 3123 .mss = -1, 3124 }; 3125 3126 *os = default_settings; 3127 3128 next = settings = strdup(settings_ro); 3129 if (settings == NULL) { 3130 warn (NULL); 3131 return (errno); 3132 } 3133 3134 nsettings = 0; 3135 rc = 0; 3136 neg = 0; 3137 while ((s = strsep(&next, ws)) != NULL) { 3138 if (*s == '\0') 3139 continue; 3140 nsettings++; 3141 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3142 if (rc != 0) 3143 goto done; 3144 } 3145 if (nsettings == 0) { 3146 warnx("no settings provided"); 3147 rc = EINVAL; 3148 goto done; 3149 } 3150 if (neg > 0) { 3151 warnx("%d stray negation(s) at end of offload settings", neg); 3152 rc = EINVAL; 3153 goto done; 3154 } 3155 done: 3156 free(settings); 3157 return (rc); 3158 } 3159 3160 static int 3161 isempty_line(char *line, size_t llen) 3162 { 3163 3164 /* skip leading whitespace */ 3165 while (isspace(*line)) { 3166 line++; 3167 llen--; 3168 } 3169 if (llen == 0 || *line == '#' || *line == '\n') 3170 return (1); 3171 3172 return (0); 3173 } 3174 3175 static int 3176 special_offload_rule(char *str) 3177 { 3178 3179 /* skip leading whitespaces */ 3180 while (isspace(*str)) 3181 str++; 3182 3183 /* check for special strings: "-", "all", "any" */ 3184 if (*str == '-') { 3185 str++; 3186 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3187 str += 3; 3188 } else { 3189 return (0); 3190 } 3191 3192 /* skip trailing whitespaces */ 3193 while (isspace(*str)) 3194 str++; 3195 3196 return (*str == '\0'); 3197 } 3198 3199 /* 3200 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3201 * 3202 * [<open-type>] <expr> => <settings> 3203 */ 3204 static int 3205 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3206 struct offload_rule *r) 3207 { 3208 char *expr, *settings, *s; 3209 3210 bzero(r, sizeof(*r)); 3211 3212 /* Skip leading whitespace. */ 3213 while (isspace(*line)) 3214 line++; 3215 /* Trim trailing whitespace */ 3216 s = &line[llen - 1]; 3217 while (isspace(*s)) { 3218 *s-- = '\0'; 3219 llen--; 3220 } 3221 3222 /* 3223 * First part of the rule: '[X]' where X = A/D/L/P 3224 */ 3225 if (*line++ != '[') { 3226 warnx("missing \"[\" on line %zd", lno); 3227 return (EINVAL); 3228 } 3229 switch (*line) { 3230 case 'A': 3231 case 'D': 3232 case 'L': 3233 case 'P': 3234 r->open_type = *line; 3235 break; 3236 default: 3237 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3238 return (EINVAL); 3239 } 3240 line++; 3241 if (*line++ != ']') { 3242 warnx("missing \"]\" after \"[%c\" on line %zd", 3243 r->open_type, lno); 3244 return (EINVAL); 3245 } 3246 3247 /* Skip whitespace. */ 3248 while (isspace(*line)) 3249 line++; 3250 3251 /* 3252 * Rest of the rule: <expr> => <settings> 3253 */ 3254 expr = line; 3255 s = strstr(line, "=>"); 3256 if (s == NULL) 3257 return (EINVAL); 3258 settings = s + 2; 3259 while (isspace(*settings)) 3260 settings++; 3261 *s = '\0'; 3262 3263 /* 3264 * <expr> is either a special name (all, any) or a pcap-filter(7). 3265 * In case of a special name the bpf_prog stays all-zero. 3266 */ 3267 if (!special_offload_rule(expr)) { 3268 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3269 PCAP_NETMASK_UNKNOWN) < 0) { 3270 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3271 lno, pcap_geterr(pd)); 3272 return (EINVAL); 3273 } 3274 } 3275 3276 /* settings to apply on a match. */ 3277 if (parse_offload_settings(settings, &r->settings) != 0) { 3278 warnx("failed to parse offload settings \"%s\" on line %zd", 3279 settings, lno); 3280 pcap_freecode(&r->bpf_prog); 3281 return (EINVAL); 3282 } 3283 3284 return (0); 3285 3286 } 3287 3288 /* 3289 * Note that op itself is not dynamically allocated. 3290 */ 3291 static void 3292 free_offload_policy(struct t4_offload_policy *op) 3293 { 3294 int i; 3295 3296 for (i = 0; i < op->nrules; i++) { 3297 /* 3298 * pcap_freecode can cope with empty bpf_prog, which is the case 3299 * for an rule that matches on 'any/all/-'. 3300 */ 3301 pcap_freecode(&op->rule[i].bpf_prog); 3302 } 3303 free(op->rule); 3304 op->nrules = 0; 3305 op->rule = NULL; 3306 } 3307 3308 #define REALLOC_STRIDE 32 3309 3310 /* 3311 * Fills up op->nrules and op->rule. 3312 */ 3313 static int 3314 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3315 { 3316 FILE *fp; 3317 char *line; 3318 int lno, maxrules, rc; 3319 size_t lcap, llen; 3320 struct offload_rule *r; 3321 pcap_t *pd; 3322 3323 fp = fopen(fname, "r"); 3324 if (fp == NULL) { 3325 warn("Unable to open file \"%s\"", fname); 3326 return (errno); 3327 } 3328 pd = pcap_open_dead(DLT_EN10MB, 128); 3329 if (pd == NULL) { 3330 warnx("Failed to open pcap device"); 3331 fclose(fp); 3332 return (EIO); 3333 } 3334 3335 rc = 0; 3336 lno = 0; 3337 lcap = 0; 3338 maxrules = 0; 3339 op->nrules = 0; 3340 op->rule = NULL; 3341 line = NULL; 3342 3343 while ((llen = getline(&line, &lcap, fp)) != -1) { 3344 lno++; 3345 3346 /* Skip empty lines. */ 3347 if (isempty_line(line, llen)) 3348 continue; 3349 3350 if (op->nrules == maxrules) { 3351 maxrules += REALLOC_STRIDE; 3352 r = realloc(op->rule, 3353 maxrules * sizeof(struct offload_rule)); 3354 if (r == NULL) { 3355 warnx("failed to allocate memory for %d rules", 3356 maxrules); 3357 rc = ENOMEM; 3358 goto done; 3359 } 3360 op->rule = r; 3361 } 3362 3363 r = &op->rule[op->nrules]; 3364 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3365 if (rc != 0) { 3366 warnx("Error parsing line %d of \"%s\"", lno, fname); 3367 goto done; 3368 } 3369 3370 op->nrules++; 3371 } 3372 free(line); 3373 3374 if (!feof(fp)) { 3375 warn("Error while reading from file \"%s\" at line %d", 3376 fname, lno); 3377 rc = errno; 3378 goto done; 3379 } 3380 3381 if (op->nrules == 0) { 3382 warnx("No valid rules found in \"%s\"", fname); 3383 rc = EINVAL; 3384 } 3385 done: 3386 pcap_close(pd); 3387 fclose(fp); 3388 if (rc != 0) { 3389 free_offload_policy(op); 3390 } 3391 3392 return (rc); 3393 } 3394 3395 static int 3396 load_offload_policy(int argc, const char *argv[]) 3397 { 3398 int rc = 0; 3399 const char *fname = argv[0]; 3400 struct t4_offload_policy op = {0}; 3401 3402 if (argc != 1) { 3403 warnx("incorrect number of arguments."); 3404 return (EINVAL); 3405 } 3406 3407 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3408 /* op.nrules is 0 and that means clear policy */ 3409 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3410 } 3411 3412 rc = parse_offload_policy(fname, &op); 3413 if (rc != 0) { 3414 /* Error message displayed already */ 3415 return (EINVAL); 3416 } 3417 3418 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3419 free_offload_policy(&op); 3420 3421 return (rc); 3422 } 3423 3424 static int 3425 run_cmd(int argc, const char *argv[]) 3426 { 3427 int rc = -1; 3428 const char *cmd = argv[0]; 3429 3430 /* command */ 3431 argc--; 3432 argv++; 3433 3434 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3435 rc = register_io(argc, argv, 4); 3436 else if (!strcmp(cmd, "reg64")) 3437 rc = register_io(argc, argv, 8); 3438 else if (!strcmp(cmd, "regdump")) 3439 rc = dump_regs(argc, argv); 3440 else if (!strcmp(cmd, "filter")) 3441 rc = filter_cmd(argc, argv, 0); 3442 else if (!strcmp(cmd, "context")) 3443 rc = get_sge_context(argc, argv); 3444 else if (!strcmp(cmd, "loadfw")) 3445 rc = loadfw(argc, argv); 3446 else if (!strcmp(cmd, "memdump")) 3447 rc = memdump(argc, argv); 3448 else if (!strcmp(cmd, "tcb")) 3449 rc = read_tcb(argc, argv); 3450 else if (!strcmp(cmd, "i2c")) 3451 rc = read_i2c(argc, argv); 3452 else if (!strcmp(cmd, "clearstats")) 3453 rc = clearstats(argc, argv); 3454 else if (!strcmp(cmd, "tracer")) 3455 rc = tracer_cmd(argc, argv); 3456 else if (!strcmp(cmd, "modinfo")) 3457 rc = modinfo(argc, argv); 3458 else if (!strcmp(cmd, "sched-class")) 3459 rc = sched_class(argc, argv); 3460 else if (!strcmp(cmd, "sched-queue")) 3461 rc = sched_queue(argc, argv); 3462 else if (!strcmp(cmd, "loadcfg")) 3463 rc = loadcfg(argc, argv); 3464 else if (!strcmp(cmd, "loadboot")) 3465 rc = loadboot(argc, argv); 3466 else if (!strcmp(cmd, "loadboot-cfg")) 3467 rc = loadbootcfg(argc, argv); 3468 else if (!strcmp(cmd, "dumpstate")) 3469 rc = dumpstate(argc, argv); 3470 else if (!strcmp(cmd, "policy")) 3471 rc = load_offload_policy(argc, argv); 3472 else if (!strcmp(cmd, "hashfilter")) 3473 rc = filter_cmd(argc, argv, 1); 3474 else { 3475 rc = EINVAL; 3476 warnx("invalid command \"%s\"", cmd); 3477 } 3478 3479 return (rc); 3480 } 3481 3482 #define MAX_ARGS 15 3483 static int 3484 run_cmd_loop(void) 3485 { 3486 int i, rc = 0; 3487 char buffer[128], *buf; 3488 const char *args[MAX_ARGS + 1]; 3489 3490 /* 3491 * Simple loop: displays a "> " prompt and processes any input as a 3492 * cxgbetool command. You're supposed to enter only the part after 3493 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3494 */ 3495 for (;;) { 3496 fprintf(stdout, "> "); 3497 fflush(stdout); 3498 buf = fgets(buffer, sizeof(buffer), stdin); 3499 if (buf == NULL) { 3500 if (ferror(stdin)) { 3501 warn("stdin error"); 3502 rc = errno; /* errno from fgets */ 3503 } 3504 break; 3505 } 3506 3507 i = 0; 3508 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3509 if (args[i][0] != 0 && ++i == MAX_ARGS) 3510 break; 3511 } 3512 args[i] = 0; 3513 3514 if (i == 0) 3515 continue; /* skip empty line */ 3516 3517 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3518 break; 3519 3520 rc = run_cmd(i, args); 3521 } 3522 3523 /* rc normally comes from the last command (not including quit/exit) */ 3524 return (rc); 3525 } 3526 3527 int 3528 main(int argc, const char *argv[]) 3529 { 3530 int rc = -1; 3531 3532 progname = argv[0]; 3533 3534 if (argc == 2) { 3535 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3536 usage(stdout); 3537 exit(0); 3538 } 3539 } 3540 3541 if (argc < 3) { 3542 usage(stderr); 3543 exit(EINVAL); 3544 } 3545 3546 nexus = argv[1]; 3547 3548 /* progname and nexus */ 3549 argc -= 2; 3550 argv += 2; 3551 3552 if (argc == 1 && !strcmp(argv[0], "stdio")) 3553 rc = run_cmd_loop(); 3554 else 3555 rc = run_cmd(argc, argv); 3556 3557 return (rc); 3558 } 3559