1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/ioctl.h> 31 #include <sys/mman.h> 32 #include <sys/socket.h> 33 #include <sys/stat.h> 34 #include <sys/sysctl.h> 35 36 #include <arpa/inet.h> 37 #include <net/ethernet.h> 38 #include <net/sff8472.h> 39 #include <netinet/in.h> 40 41 #include <ctype.h> 42 #include <err.h> 43 #include <errno.h> 44 #include <fcntl.h> 45 #include <limits.h> 46 #include <stdint.h> 47 #include <stdio.h> 48 #include <stdlib.h> 49 #include <string.h> 50 #include <unistd.h> 51 #include <pcap.h> 52 53 #include "t4_ioctl.h" 54 #include "tcb_common.h" 55 56 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 57 #define max(x, y) ((x) > (y) ? (x) : (y)) 58 59 static const char *progname, *nexus; 60 static int chip_id; /* 4 for T4, 5 for T5, and so on. */ 61 static int inst; /* instance of nexus device */ 62 63 struct reg_info { 64 const char *name; 65 uint32_t addr; 66 uint32_t len; 67 }; 68 69 struct mod_regs { 70 const char *name; 71 const struct reg_info *ri; 72 }; 73 74 struct field_desc { 75 const char *name; /* Field name */ 76 unsigned short start; /* Start bit position */ 77 unsigned short end; /* End bit position */ 78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 79 unsigned char hex; /* Print field in hex instead of decimal */ 80 unsigned char islog2; /* Field contains the base-2 log of the value */ 81 }; 82 83 #include "reg_defs_t4.c" 84 #include "reg_defs_t5.c" 85 #include "reg_defs_t6.c" 86 #include "reg_defs_t4vf.c" 87 88 static void 89 usage(FILE *fp) 90 { 91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 92 fprintf(fp, 93 "\tclearstats <port> clear port statistics\n" 94 "\tclip hold|release <ip6> hold/release an address\n" 95 "\tclip list list the CLIP table\n" 96 "\tcontext <type> <id> show an SGE context\n" 97 "\tdumpstate <dump.bin> dump chip state\n" 98 "\tfilter <idx> [<param> <val>] ... set a filter\n" 99 "\tfilter <idx> delete|clear [prio 1] delete a filter\n" 100 "\tfilter list list all filters\n" 101 "\tfilter mode [<match>] ... get/set global filter mode\n" 102 "\thashfilter [<param> <val>] ... set a hashfilter\n" 103 "\thashfilter <idx> delete|clear delete a hashfilter\n" 104 "\thashfilter list list all hashfilters\n" 105 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n" 106 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 107 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 108 "\tloadboot clear [pf|offset <val>] remove boot image\n" 109 "\tloadboot-cfg <bc.bin> install boot config\n" 110 "\tloadboot-cfg clear remove boot config\n" 111 "\tloadcfg <fw-config.txt> install configuration file\n" 112 "\tloadcfg clear remove configuration file\n" 113 "\tloadfw <fw-image.bin> install firmware\n" 114 "\tmemdump <addr> <len> dump a memory range\n" 115 "\tmodinfo <port> [raw] optics/cable information\n" 116 "\tpolicy <policy.txt> install offload policy\n" 117 "\tpolicy clear remove offload policy\n" 118 "\treg <address>[=<val>] read/write register\n" 119 "\treg64 <address>[=<val>] read/write 64 bit register\n" 120 "\tregdump [<module>] ... dump registers\n" 121 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 122 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 123 "\tstdio interactive mode\n" 124 "\ttcb <tid> read TCB\n" 125 "\ttracer <idx> tx<n>|rx<n>|lo<n> set and enable a tracer\n" 126 "\ttracer <idx> disable|enable disable or enable a tracer\n" 127 "\ttracer list list all tracers\n" 128 ); 129 } 130 131 static inline unsigned int 132 get_card_vers(unsigned int version) 133 { 134 return (version & 0x3ff); 135 } 136 137 static int 138 real_doit(unsigned long cmd, void *data, const char *cmdstr) 139 { 140 static int fd = -1; 141 int rc = 0; 142 143 if (fd == -1) { 144 char buf[64]; 145 146 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 147 if ((fd = open(buf, O_RDWR)) < 0) { 148 warn("open(%s)", nexus); 149 rc = errno; 150 return (rc); 151 } 152 } 153 154 rc = ioctl(fd, cmd, data); 155 if (rc < 0) { 156 warn("%s", cmdstr); 157 rc = errno; 158 } 159 160 return (rc); 161 } 162 #define doit(x, y) real_doit(x, y, #x) 163 164 static char * 165 str_to_number(const char *s, long *val, long long *vall) 166 { 167 char *p; 168 169 if (vall) 170 *vall = strtoll(s, &p, 0); 171 else if (val) 172 *val = strtol(s, &p, 0); 173 else 174 p = NULL; 175 176 return (p); 177 } 178 179 static int 180 read_reg(long addr, int size, long long *val) 181 { 182 struct t4_reg reg; 183 int rc; 184 185 reg.addr = (uint32_t) addr; 186 reg.size = (uint32_t) size; 187 reg.val = 0; 188 189 rc = doit(CHELSIO_T4_GETREG, ®); 190 191 *val = reg.val; 192 193 return (rc); 194 } 195 196 static int 197 write_reg(long addr, int size, long long val) 198 { 199 struct t4_reg reg; 200 201 reg.addr = (uint32_t) addr; 202 reg.size = (uint32_t) size; 203 reg.val = (uint64_t) val; 204 205 return doit(CHELSIO_T4_SETREG, ®); 206 } 207 208 static int 209 register_io(int argc, const char *argv[], int size) 210 { 211 char *p, *v; 212 long addr; 213 long long val; 214 int w = 0, rc; 215 216 if (argc == 1) { 217 /* <reg> OR <reg>=<value> */ 218 219 p = str_to_number(argv[0], &addr, NULL); 220 if (*p) { 221 if (*p != '=') { 222 warnx("invalid register \"%s\"", argv[0]); 223 return (EINVAL); 224 } 225 226 w = 1; 227 v = p + 1; 228 p = str_to_number(v, NULL, &val); 229 230 if (*p) { 231 warnx("invalid value \"%s\"", v); 232 return (EINVAL); 233 } 234 } 235 236 } else if (argc == 2) { 237 /* <reg> <value> */ 238 239 w = 1; 240 241 p = str_to_number(argv[0], &addr, NULL); 242 if (*p) { 243 warnx("invalid register \"%s\"", argv[0]); 244 return (EINVAL); 245 } 246 247 p = str_to_number(argv[1], NULL, &val); 248 if (*p) { 249 warnx("invalid value \"%s\"", argv[1]); 250 return (EINVAL); 251 } 252 } else { 253 warnx("reg: invalid number of arguments (%d)", argc); 254 return (EINVAL); 255 } 256 257 if (w) 258 rc = write_reg(addr, size, val); 259 else { 260 rc = read_reg(addr, size, &val); 261 if (rc == 0) 262 printf("0x%llx [%llu]\n", val, val); 263 } 264 265 return (rc); 266 } 267 268 static inline uint32_t 269 xtract(uint32_t val, int shift, int len) 270 { 271 return (val >> shift) & ((1 << len) - 1); 272 } 273 274 static int 275 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 276 { 277 uint32_t reg_val = 0; 278 279 for ( ; reg_array->name; ++reg_array) 280 if (!reg_array->len) { 281 reg_val = regs[reg_array->addr / 4]; 282 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 283 reg_array->name, reg_val, reg_val); 284 } else { 285 uint32_t v = xtract(reg_val, reg_array->addr, 286 reg_array->len); 287 288 printf(" %*u:%u %-47s %#-10x %u\n", 289 reg_array->addr < 10 ? 3 : 2, 290 reg_array->addr + reg_array->len - 1, 291 reg_array->addr, reg_array->name, v, v); 292 } 293 294 return (1); 295 } 296 297 static int 298 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 299 const struct mod_regs *modtab, int nmodules) 300 { 301 int i, j, match; 302 303 for (i = 0; i < argc; i++) { 304 for (j = 0; j < nmodules; j++) { 305 if (!strcmp(argv[i], modtab[j].name)) 306 break; 307 } 308 309 if (j == nmodules) { 310 warnx("invalid register block \"%s\"", argv[i]); 311 fprintf(stderr, "\nAvailable blocks:"); 312 for ( ; nmodules; nmodules--, modtab++) 313 fprintf(stderr, " %s", modtab->name); 314 fprintf(stderr, "\n"); 315 return (EINVAL); 316 } 317 } 318 319 for ( ; nmodules; nmodules--, modtab++) { 320 321 match = argc == 0 ? 1 : 0; 322 for (i = 0; !match && i < argc; i++) { 323 if (!strcmp(argv[i], modtab->name)) 324 match = 1; 325 } 326 327 if (match) 328 dump_block_regs(modtab->ri, regs); 329 } 330 331 return (0); 332 } 333 334 #define T4_MODREGS(name) { #name, t4_##name##_regs } 335 static int 336 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 337 { 338 static struct mod_regs t4_mod[] = { 339 T4_MODREGS(sge), 340 { "pci", t4_pcie_regs }, 341 T4_MODREGS(dbg), 342 T4_MODREGS(mc), 343 T4_MODREGS(ma), 344 { "edc0", t4_edc_0_regs }, 345 { "edc1", t4_edc_1_regs }, 346 T4_MODREGS(cim), 347 T4_MODREGS(tp), 348 T4_MODREGS(ulp_rx), 349 T4_MODREGS(ulp_tx), 350 { "pmrx", t4_pm_rx_regs }, 351 { "pmtx", t4_pm_tx_regs }, 352 T4_MODREGS(mps), 353 { "cplsw", t4_cpl_switch_regs }, 354 T4_MODREGS(smb), 355 { "i2c", t4_i2cm_regs }, 356 T4_MODREGS(mi), 357 T4_MODREGS(uart), 358 T4_MODREGS(pmu), 359 T4_MODREGS(sf), 360 T4_MODREGS(pl), 361 T4_MODREGS(le), 362 T4_MODREGS(ncsi), 363 T4_MODREGS(xgmac) 364 }; 365 366 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 367 } 368 #undef T4_MODREGS 369 370 #define T5_MODREGS(name) { #name, t5_##name##_regs } 371 static int 372 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 373 { 374 static struct mod_regs t5_mod[] = { 375 T5_MODREGS(sge), 376 { "pci", t5_pcie_regs }, 377 T5_MODREGS(dbg), 378 { "mc0", t5_mc_0_regs }, 379 { "mc1", t5_mc_1_regs }, 380 T5_MODREGS(ma), 381 { "edc0", t5_edc_t50_regs }, 382 { "edc1", t5_edc_t51_regs }, 383 T5_MODREGS(cim), 384 T5_MODREGS(tp), 385 { "ulprx", t5_ulp_rx_regs }, 386 { "ulptx", t5_ulp_tx_regs }, 387 { "pmrx", t5_pm_rx_regs }, 388 { "pmtx", t5_pm_tx_regs }, 389 T5_MODREGS(mps), 390 { "cplsw", t5_cpl_switch_regs }, 391 T5_MODREGS(smb), 392 { "i2c", t5_i2cm_regs }, 393 T5_MODREGS(mi), 394 T5_MODREGS(uart), 395 T5_MODREGS(pmu), 396 T5_MODREGS(sf), 397 T5_MODREGS(pl), 398 T5_MODREGS(le), 399 T5_MODREGS(ncsi), 400 T5_MODREGS(mac), 401 { "hma", t5_hma_t5_regs } 402 }; 403 404 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 405 } 406 #undef T5_MODREGS 407 408 #define T6_MODREGS(name) { #name, t6_##name##_regs } 409 static int 410 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 411 { 412 static struct mod_regs t6_mod[] = { 413 T6_MODREGS(sge), 414 { "pci", t6_pcie_regs }, 415 T6_MODREGS(dbg), 416 { "mc0", t6_mc_0_regs }, 417 T6_MODREGS(ma), 418 { "edc0", t6_edc_t60_regs }, 419 { "edc1", t6_edc_t61_regs }, 420 T6_MODREGS(cim), 421 T6_MODREGS(tp), 422 { "ulprx", t6_ulp_rx_regs }, 423 { "ulptx", t6_ulp_tx_regs }, 424 { "pmrx", t6_pm_rx_regs }, 425 { "pmtx", t6_pm_tx_regs }, 426 T6_MODREGS(mps), 427 { "cplsw", t6_cpl_switch_regs }, 428 T6_MODREGS(smb), 429 { "i2c", t6_i2cm_regs }, 430 T6_MODREGS(mi), 431 T6_MODREGS(uart), 432 T6_MODREGS(pmu), 433 T6_MODREGS(sf), 434 T6_MODREGS(pl), 435 T6_MODREGS(le), 436 T6_MODREGS(ncsi), 437 T6_MODREGS(mac), 438 { "hma", t6_hma_t6_regs } 439 }; 440 441 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 442 } 443 #undef T6_MODREGS 444 445 static int 446 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 447 { 448 static struct mod_regs t4vf_mod[] = { 449 { "sge", t4vf_sge_regs }, 450 { "mps", t4vf_mps_regs }, 451 { "pl", t4vf_pl_regs }, 452 { "mbdata", t4vf_mbdata_regs }, 453 { "cim", t4vf_cim_regs }, 454 }; 455 456 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 457 } 458 459 static int 460 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 461 { 462 static struct mod_regs t5vf_mod[] = { 463 { "sge", t5vf_sge_regs }, 464 { "mps", t4vf_mps_regs }, 465 { "pl", t5vf_pl_regs }, 466 { "mbdata", t4vf_mbdata_regs }, 467 { "cim", t4vf_cim_regs }, 468 }; 469 470 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 471 } 472 473 static int 474 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 475 { 476 static struct mod_regs t6vf_mod[] = { 477 { "sge", t5vf_sge_regs }, 478 { "mps", t4vf_mps_regs }, 479 { "pl", t6vf_pl_regs }, 480 { "mbdata", t4vf_mbdata_regs }, 481 { "cim", t4vf_cim_regs }, 482 }; 483 484 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 485 } 486 487 static int 488 dump_regs(int argc, const char *argv[]) 489 { 490 int vers, revision, rc; 491 struct t4_regdump regs; 492 uint32_t len; 493 494 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 495 regs.data = calloc(1, len); 496 if (regs.data == NULL) { 497 warnc(ENOMEM, "regdump"); 498 return (ENOMEM); 499 } 500 501 regs.len = len; 502 rc = doit(CHELSIO_T4_REGDUMP, ®s); 503 if (rc != 0) 504 return (rc); 505 506 vers = get_card_vers(regs.version); 507 revision = (regs.version >> 10) & 0x3f; 508 509 if (vers == 4) { 510 if (revision == 0x3f) 511 rc = dump_regs_t4vf(argc, argv, regs.data); 512 else 513 rc = dump_regs_t4(argc, argv, regs.data); 514 } else if (vers == 5) { 515 if (revision == 0x3f) 516 rc = dump_regs_t5vf(argc, argv, regs.data); 517 else 518 rc = dump_regs_t5(argc, argv, regs.data); 519 } else if (vers == 6) { 520 if (revision == 0x3f) 521 rc = dump_regs_t6vf(argc, argv, regs.data); 522 else 523 rc = dump_regs_t6(argc, argv, regs.data); 524 } else { 525 warnx("%s (type %d, rev %d) is not a known card.", 526 nexus, vers, revision); 527 return (ENOTSUP); 528 } 529 530 free(regs.data); 531 return (rc); 532 } 533 534 static void 535 do_show_info_header(uint32_t mode) 536 { 537 uint32_t i; 538 539 printf("%4s %8s", "Idx", "Hits"); 540 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 541 switch (mode & i) { 542 case T4_FILTER_FCoE: 543 printf(" FCoE"); 544 break; 545 case T4_FILTER_PORT: 546 printf(" Port"); 547 break; 548 case T4_FILTER_VNIC: 549 if (mode & T4_FILTER_IC_VNIC) 550 printf(" VFvld:PF:VF"); 551 else 552 printf(" vld:oVLAN"); 553 break; 554 case T4_FILTER_VLAN: 555 printf(" vld:VLAN"); 556 break; 557 case T4_FILTER_IP_TOS: 558 printf(" TOS"); 559 break; 560 case T4_FILTER_IP_PROTO: 561 printf(" Prot"); 562 break; 563 case T4_FILTER_ETH_TYPE: 564 printf(" EthType"); 565 break; 566 case T4_FILTER_MAC_IDX: 567 printf(" MACIdx"); 568 break; 569 case T4_FILTER_MPS_HIT_TYPE: 570 printf(" MPS"); 571 break; 572 case T4_FILTER_IP_FRAGMENT: 573 printf(" Frag"); 574 break; 575 default: 576 /* compressed filter field not enabled */ 577 break; 578 } 579 } 580 printf(" %20s %20s %9s %9s %s\n", 581 "DIP", "SIP", "DPORT", "SPORT", "Action"); 582 } 583 584 /* 585 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 586 * ordered tuple. If the parameter name in the argument sub-vector does not 587 * match the passed in parameter name, then a zero is returned for the 588 * function and no parsing is performed. If there is a match, then the value 589 * and optional mask are parsed and returned in the provided return value 590 * pointers. If no optional mask is specified, then a default mask of all 1s 591 * will be returned. 592 * 593 * An error in parsing the value[:mask] will result in an error message and 594 * program termination. 595 */ 596 static int 597 parse_val_mask(const char *param, const char *args[], uint32_t *val, 598 uint32_t *mask, int hashfilter) 599 { 600 long l; 601 char *p; 602 603 if (strcmp(param, args[0]) != 0) 604 return (EINVAL); 605 606 p = str_to_number(args[1], &l, NULL); 607 if (l >= 0 && l <= UINT32_MAX) { 608 *val = (uint32_t)l; 609 if (p > args[1]) { 610 if (p[0] == 0) { 611 *mask = ~0; 612 return (0); 613 } 614 615 if (p[0] == ':' && p[1] != 0) { 616 if (hashfilter) { 617 warnx("param %s: mask not allowed for " 618 "hashfilter or nat params", param); 619 return (EINVAL); 620 } 621 p = str_to_number(p + 1, &l, NULL); 622 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 623 *mask = (uint32_t)l; 624 return (0); 625 } 626 } 627 } 628 } 629 630 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 631 args[0], args[1]); 632 633 return (EINVAL); 634 } 635 636 /* 637 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 638 * ordered tuple. If the parameter name in the argument sub-vector does not 639 * match the passed in parameter name, then a zero is returned for the 640 * function and no parsing is performed. If there is a match, then the value 641 * and optional mask are parsed and returned in the provided return value 642 * pointers. If no optional mask is specified, then a default mask of all 1s 643 * will be returned. 644 * 645 * The value return parameter "afp" is used to specify the expected address 646 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 647 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 648 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 649 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 650 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 651 * returned in the first four bytes of the address and mask return values with 652 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 653 * 1, 2, 3}, respectively. 654 * 655 * An error in parsing the value[:mask] will result in an error message and 656 * program termination. 657 */ 658 static int 659 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 660 uint8_t mask[], int maskless) 661 { 662 const char *colon, *afn; 663 char *slash; 664 uint8_t *m; 665 int af, ret; 666 unsigned int masksize; 667 668 /* 669 * Is this our parameter? 670 */ 671 if (strcmp(param, args[0]) != 0) 672 return (EINVAL); 673 674 /* 675 * Fundamental IPv4 versus IPv6 selection. 676 */ 677 colon = strchr(args[1], ':'); 678 if (!colon) { 679 afn = "IPv4"; 680 af = AF_INET; 681 masksize = 32; 682 } else { 683 afn = "IPv6"; 684 af = AF_INET6; 685 masksize = 128; 686 } 687 if (*afp == AF_UNSPEC) 688 *afp = af; 689 else if (*afp != af) { 690 warnx("address %s is not of expected family %s", 691 args[1], *afp == AF_INET ? "IP" : "IPv6"); 692 return (EINVAL); 693 } 694 695 /* 696 * Parse address (temporarily stripping off any "/mask" 697 * specification). 698 */ 699 slash = strchr(args[1], '/'); 700 if (slash) 701 *slash = 0; 702 ret = inet_pton(af, args[1], addr); 703 if (slash) 704 *slash = '/'; 705 if (ret <= 0) { 706 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 707 return (EINVAL); 708 } 709 710 /* 711 * Parse optional mask specification. 712 */ 713 if (slash) { 714 char *p; 715 unsigned int prefix = strtoul(slash + 1, &p, 10); 716 717 if (maskless) { 718 warnx("mask cannot be provided for maskless specification"); 719 return (EINVAL); 720 } 721 722 if (p == slash + 1) { 723 warnx("missing address prefix for %s", param); 724 return (EINVAL); 725 } 726 if (*p) { 727 warnx("%s is not a valid address prefix", slash + 1); 728 return (EINVAL); 729 } 730 if (prefix > masksize) { 731 warnx("prefix %u is too long for an %s address", 732 prefix, afn); 733 return (EINVAL); 734 } 735 memset(mask, 0, masksize / 8); 736 masksize = prefix; 737 } 738 739 if (mask != NULL) { 740 /* 741 * Fill in mask. 742 */ 743 for (m = mask; masksize >= 8; m++, masksize -= 8) 744 *m = ~0; 745 if (masksize) 746 *m = ~0 << (8 - masksize); 747 } 748 749 return (0); 750 } 751 752 /* 753 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 754 * tuple. If the parameter name in the argument sub-vector does not match the 755 * passed in parameter name, then a zero is returned for the function and no 756 * parsing is performed. If there is a match, then the value is parsed and 757 * returned in the provided return value pointer. 758 */ 759 static int 760 parse_val(const char *param, const char *args[], uint32_t *val) 761 { 762 char *p; 763 long l; 764 765 if (strcmp(param, args[0]) != 0) 766 return (EINVAL); 767 768 p = str_to_number(args[1], &l, NULL); 769 if (*p || l < 0 || l > UINT32_MAX) { 770 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 771 return (EINVAL); 772 } 773 774 *val = (uint32_t)l; 775 return (0); 776 } 777 778 static void 779 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 780 { 781 int noctets, octet; 782 783 printf(" "); 784 if (type == 0) { 785 noctets = 4; 786 printf("%3s", " "); 787 } else 788 noctets = 16; 789 790 for (octet = 0; octet < noctets; octet++) 791 printf("%02x", addr[octet]); 792 printf("/"); 793 for (octet = 0; octet < noctets; octet++) 794 printf("%02x", addrm[octet]); 795 } 796 797 static void 798 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 799 { 800 uint32_t i; 801 802 printf("%4d", t->idx); 803 if (t->hits == UINT64_MAX) 804 printf(" %8s", "-"); 805 else 806 printf(" %8ju", t->hits); 807 808 /* 809 * Compressed header portion of filter. 810 */ 811 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 812 switch (mode & i) { 813 case T4_FILTER_FCoE: 814 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 815 break; 816 case T4_FILTER_PORT: 817 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 818 break; 819 case T4_FILTER_VNIC: 820 if (mode & T4_FILTER_IC_VNIC) { 821 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 822 t->fs.val.pfvf_vld, 823 (t->fs.val.vnic >> 13) & 0x7, 824 t->fs.val.vnic & 0x1fff, 825 t->fs.mask.pfvf_vld, 826 (t->fs.mask.vnic >> 13) & 0x7, 827 t->fs.mask.vnic & 0x1fff); 828 } else { 829 printf(" %1d:%04x/%1d:%04x", 830 t->fs.val.ovlan_vld, t->fs.val.vnic, 831 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 832 } 833 break; 834 case T4_FILTER_VLAN: 835 printf(" %1d:%04x/%1d:%04x", 836 t->fs.val.vlan_vld, t->fs.val.vlan, 837 t->fs.mask.vlan_vld, t->fs.mask.vlan); 838 break; 839 case T4_FILTER_IP_TOS: 840 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 841 break; 842 case T4_FILTER_IP_PROTO: 843 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 844 break; 845 case T4_FILTER_ETH_TYPE: 846 printf(" %04x/%04x", t->fs.val.ethtype, 847 t->fs.mask.ethtype); 848 break; 849 case T4_FILTER_MAC_IDX: 850 printf(" %03x/%03x", t->fs.val.macidx, 851 t->fs.mask.macidx); 852 break; 853 case T4_FILTER_MPS_HIT_TYPE: 854 printf(" %1x/%1x", t->fs.val.matchtype, 855 t->fs.mask.matchtype); 856 break; 857 case T4_FILTER_IP_FRAGMENT: 858 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 859 break; 860 default: 861 /* compressed filter field not enabled */ 862 break; 863 } 864 } 865 866 /* 867 * Fixed portion of filter. 868 */ 869 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 870 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 871 printf(" %04x/%04x %04x/%04x", 872 t->fs.val.dport, t->fs.mask.dport, 873 t->fs.val.sport, t->fs.mask.sport); 874 875 /* 876 * Variable length filter action. 877 */ 878 if (t->fs.action == FILTER_DROP) 879 printf(" Drop"); 880 else if (t->fs.action == FILTER_SWITCH) { 881 printf(" Switch: port=%d", t->fs.eport); 882 if (t->fs.newdmac) 883 printf( 884 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 885 ", l2tidx=%d", 886 t->fs.dmac[0], t->fs.dmac[1], 887 t->fs.dmac[2], t->fs.dmac[3], 888 t->fs.dmac[4], t->fs.dmac[5], 889 t->l2tidx); 890 if (t->fs.newsmac) 891 printf( 892 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 893 ", smtidx=%d", 894 t->fs.smac[0], t->fs.smac[1], 895 t->fs.smac[2], t->fs.smac[3], 896 t->fs.smac[4], t->fs.smac[5], 897 t->smtidx); 898 if (t->fs.newvlan == VLAN_REMOVE) 899 printf(", vlan=none"); 900 else if (t->fs.newvlan == VLAN_INSERT) 901 printf(", vlan=insert(%x)", t->fs.vlan); 902 else if (t->fs.newvlan == VLAN_REWRITE) 903 printf(", vlan=rewrite(%x)", t->fs.vlan); 904 } else { 905 printf(" Pass: Q="); 906 if (t->fs.dirsteer == 0) { 907 printf("RSS"); 908 if (t->fs.maskhash) 909 printf("(region %d)", t->fs.iq << 1); 910 } else { 911 printf("%d", t->fs.iq); 912 if (t->fs.dirsteerhash == 0) 913 printf("(QID)"); 914 else 915 printf("(hash)"); 916 } 917 } 918 if (chip_id <= 5 && t->fs.prio) 919 printf(" Prio"); 920 if (t->fs.rpttid) 921 printf(" RptTID"); 922 printf("\n"); 923 } 924 925 static int 926 show_filters(int hash) 927 { 928 uint32_t mode = 0, header, hpfilter = 0; 929 struct t4_filter t; 930 int rc; 931 932 /* Get the global filter mode first */ 933 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 934 if (rc != 0) 935 return (rc); 936 937 if (!hash && chip_id >= 6) { 938 header = 0; 939 bzero(&t, sizeof (t)); 940 t.idx = 0; 941 t.fs.hash = 0; 942 t.fs.prio = 1; 943 for (t.idx = 0; ; t.idx++) { 944 rc = doit(CHELSIO_T4_GET_FILTER, &t); 945 if (rc != 0 || t.idx == 0xffffffff) 946 break; 947 948 if (!header) { 949 printf("High Priority TCAM Region:\n"); 950 do_show_info_header(mode); 951 header = 1; 952 hpfilter = 1; 953 } 954 do_show_one_filter_info(&t, mode); 955 } 956 } 957 958 header = 0; 959 bzero(&t, sizeof (t)); 960 t.idx = 0; 961 t.fs.hash = hash; 962 for (t.idx = 0; ; t.idx++) { 963 rc = doit(CHELSIO_T4_GET_FILTER, &t); 964 if (rc != 0 || t.idx == 0xffffffff) 965 break; 966 967 if (!header) { 968 if (hpfilter) 969 printf("\nNormal Priority TCAM Region:\n"); 970 do_show_info_header(mode); 971 header = 1; 972 } 973 do_show_one_filter_info(&t, mode); 974 } 975 976 return (rc); 977 } 978 979 static int 980 get_filter_mode(int hashfilter) 981 { 982 uint32_t mode = hashfilter; 983 int rc; 984 985 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 986 if (rc != 0) 987 return (rc); 988 989 if (mode & T4_FILTER_IPv4) 990 printf("ipv4 "); 991 if (mode & T4_FILTER_IPv6) 992 printf("ipv6 "); 993 if (mode & T4_FILTER_IP_SADDR) 994 printf("sip "); 995 if (mode & T4_FILTER_IP_DADDR) 996 printf("dip "); 997 if (mode & T4_FILTER_IP_SPORT) 998 printf("sport "); 999 if (mode & T4_FILTER_IP_DPORT) 1000 printf("dport "); 1001 if (mode & T4_FILTER_IP_FRAGMENT) 1002 printf("frag "); 1003 if (mode & T4_FILTER_MPS_HIT_TYPE) 1004 printf("matchtype "); 1005 if (mode & T4_FILTER_MAC_IDX) 1006 printf("macidx "); 1007 if (mode & T4_FILTER_ETH_TYPE) 1008 printf("ethtype "); 1009 if (mode & T4_FILTER_IP_PROTO) 1010 printf("proto "); 1011 if (mode & T4_FILTER_IP_TOS) 1012 printf("tos "); 1013 if (mode & T4_FILTER_VLAN) 1014 printf("vlan "); 1015 if (mode & T4_FILTER_VNIC) { 1016 if (mode & T4_FILTER_IC_VNIC) 1017 printf("vnic_id "); 1018 else if (mode & T4_FILTER_IC_ENCAP) 1019 printf("encap "); 1020 else 1021 printf("ovlan "); 1022 } 1023 if (mode & T4_FILTER_PORT) 1024 printf("iport "); 1025 if (mode & T4_FILTER_FCoE) 1026 printf("fcoe "); 1027 printf("\n"); 1028 1029 return (0); 1030 } 1031 1032 static int 1033 set_filter_mode(int argc, const char *argv[], int hashfilter) 1034 { 1035 uint32_t mode = 0; 1036 int vnic = 0, ovlan = 0, invalid = 0; 1037 1038 for (; argc; argc--, argv++) { 1039 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") || 1040 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") || 1041 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) { 1042 /* These are always available and enabled. */ 1043 continue; 1044 } else if (!strcmp(argv[0], "frag")) 1045 mode |= T4_FILTER_IP_FRAGMENT; 1046 else if (!strcmp(argv[0], "matchtype")) 1047 mode |= T4_FILTER_MPS_HIT_TYPE; 1048 else if (!strcmp(argv[0], "macidx")) 1049 mode |= T4_FILTER_MAC_IDX; 1050 else if (!strcmp(argv[0], "ethtype")) 1051 mode |= T4_FILTER_ETH_TYPE; 1052 else if (!strcmp(argv[0], "proto")) 1053 mode |= T4_FILTER_IP_PROTO; 1054 else if (!strcmp(argv[0], "tos")) 1055 mode |= T4_FILTER_IP_TOS; 1056 else if (!strcmp(argv[0], "vlan")) 1057 mode |= T4_FILTER_VLAN; 1058 else if (!strcmp(argv[0], "ovlan")) { 1059 mode |= T4_FILTER_VNIC; 1060 ovlan = 1; 1061 } else if (!strcmp(argv[0], "vnic_id")) { 1062 mode |= T4_FILTER_VNIC; 1063 mode |= T4_FILTER_IC_VNIC; 1064 vnic = 1; 1065 } 1066 #ifdef notyet 1067 else if (!strcmp(argv[0], "encap")) { 1068 mode |= T4_FILTER_VNIC; 1069 mode |= T4_FILTER_IC_ENCAP; 1070 encap = 1; 1071 } 1072 #endif 1073 else if (!strcmp(argv[0], "iport")) 1074 mode |= T4_FILTER_PORT; 1075 else if (!strcmp(argv[0], "fcoe")) 1076 mode |= T4_FILTER_FCoE; 1077 else { 1078 warnx("\"%s\" is not valid while setting filter mode.", 1079 argv[0]); 1080 invalid++; 1081 } 1082 } 1083 1084 if (vnic + ovlan > 1) { 1085 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1086 invalid++; 1087 } 1088 1089 if (invalid > 0) 1090 return (EINVAL); 1091 1092 if (hashfilter) 1093 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode); 1094 else 1095 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1096 } 1097 1098 static int 1099 del_filter(uint32_t idx, int prio, int hashfilter) 1100 { 1101 struct t4_filter t; 1102 1103 t.fs.prio = prio; 1104 t.fs.hash = hashfilter; 1105 t.idx = idx; 1106 1107 return doit(CHELSIO_T4_DEL_FILTER, &t); 1108 } 1109 1110 #define MAX_VLANID (4095) 1111 1112 static int 1113 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1114 { 1115 int rc, af = AF_UNSPEC, start_arg = 0; 1116 struct t4_filter t; 1117 1118 if (argc < 2) { 1119 warnc(EINVAL, "%s", __func__); 1120 return (EINVAL); 1121 }; 1122 bzero(&t, sizeof (t)); 1123 t.idx = idx; 1124 t.fs.hitcnts = 1; 1125 t.fs.hash = hash; 1126 1127 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1128 const char **args = &argv[start_arg]; 1129 uint32_t val, mask; 1130 1131 if (!strcmp(argv[start_arg], "type")) { 1132 int newaf; 1133 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1134 newaf = AF_INET; 1135 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1136 newaf = AF_INET6; 1137 else { 1138 warnx("invalid type \"%s\"; " 1139 "must be one of \"ipv4\" or \"ipv6\"", 1140 argv[start_arg + 1]); 1141 return (EINVAL); 1142 } 1143 1144 if (af != AF_UNSPEC && af != newaf) { 1145 warnx("conflicting IPv4/IPv6 specifications."); 1146 return (EINVAL); 1147 } 1148 af = newaf; 1149 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1150 t.fs.val.fcoe = val; 1151 t.fs.mask.fcoe = mask; 1152 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1153 t.fs.val.iport = val; 1154 t.fs.mask.iport = mask; 1155 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1156 t.fs.val.vnic = val; 1157 t.fs.mask.vnic = mask; 1158 t.fs.val.ovlan_vld = 1; 1159 t.fs.mask.ovlan_vld = 1; 1160 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1161 t.fs.val.vlan = val; 1162 t.fs.mask.vlan = mask; 1163 t.fs.val.vlan_vld = 1; 1164 t.fs.mask.vlan_vld = 1; 1165 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1166 t.fs.val.vnic &= 0x1fff; 1167 t.fs.val.vnic |= (val & 0x7) << 13; 1168 t.fs.mask.vnic &= 0x1fff; 1169 t.fs.mask.vnic |= (mask & 0x7) << 13; 1170 t.fs.val.pfvf_vld = 1; 1171 t.fs.mask.pfvf_vld = 1; 1172 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1173 t.fs.val.vnic &= 0xe000; 1174 t.fs.val.vnic |= val & 0x1fff; 1175 t.fs.mask.vnic &= 0xe000; 1176 t.fs.mask.vnic |= mask & 0x1fff; 1177 t.fs.val.pfvf_vld = 1; 1178 t.fs.mask.pfvf_vld = 1; 1179 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1180 t.fs.val.tos = val; 1181 t.fs.mask.tos = mask; 1182 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1183 t.fs.val.proto = val; 1184 t.fs.mask.proto = mask; 1185 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1186 t.fs.val.ethtype = val; 1187 t.fs.mask.ethtype = mask; 1188 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1189 t.fs.val.macidx = val; 1190 t.fs.mask.macidx = mask; 1191 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1192 t.fs.val.matchtype = val; 1193 t.fs.mask.matchtype = mask; 1194 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1195 t.fs.val.frag = val; 1196 t.fs.mask.frag = mask; 1197 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1198 t.fs.val.dport = val; 1199 t.fs.mask.dport = mask; 1200 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1201 t.fs.val.sport = val; 1202 t.fs.mask.sport = mask; 1203 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1204 t.fs.mask.dip, hash)) { 1205 /* nada */; 1206 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1207 t.fs.mask.sip, hash)) { 1208 /* nada */; 1209 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1210 /*nada*/; 1211 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1212 /*nada*/ 1213 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1214 t.fs.nat_dport = val; 1215 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1216 t.fs.nat_sport = val; 1217 } else if (!strcmp(argv[start_arg], "action")) { 1218 if (!strcmp(argv[start_arg + 1], "pass")) 1219 t.fs.action = FILTER_PASS; 1220 else if (!strcmp(argv[start_arg + 1], "drop")) 1221 t.fs.action = FILTER_DROP; 1222 else if (!strcmp(argv[start_arg + 1], "switch")) 1223 t.fs.action = FILTER_SWITCH; 1224 else { 1225 warnx("invalid action \"%s\"; must be one of" 1226 " \"pass\", \"drop\" or \"switch\"", 1227 argv[start_arg + 1]); 1228 return (EINVAL); 1229 } 1230 } else if (!parse_val("hitcnts", args, &val)) { 1231 t.fs.hitcnts = val; 1232 } else if (!parse_val("prio", args, &val)) { 1233 if (hash) { 1234 warnx("Hashfilters doesn't support \"prio\"\n"); 1235 return (EINVAL); 1236 } 1237 if (val != 0 && val != 1) { 1238 warnx("invalid priority \"%s\"; must be" 1239 " \"0\" or \"1\"", argv[start_arg + 1]); 1240 return (EINVAL); 1241 } 1242 t.fs.prio = val; 1243 } else if (!parse_val("rpttid", args, &val)) { 1244 t.fs.rpttid = 1; 1245 } else if (!parse_val("queue", args, &val)) { 1246 t.fs.dirsteer = 1; /* direct steer */ 1247 t.fs.iq = val; /* to the iq with this cntxt_id */ 1248 } else if (!parse_val("tcbhash", args, &val)) { 1249 t.fs.dirsteerhash = 1; /* direct steer */ 1250 /* XXX: use (val << 1) as the rss_hash? */ 1251 t.fs.iq = val; 1252 } else if (!parse_val("tcbrss", args, &val)) { 1253 t.fs.maskhash = 1; /* steer to RSS region */ 1254 /* 1255 * val = start idx of the region but the internal TCB 1256 * field is 10b only and is left shifted by 1 before use. 1257 */ 1258 t.fs.iq = val >> 1; 1259 } else if (!parse_val("eport", args, &val)) { 1260 t.fs.eport = val; 1261 } else if (!parse_val("swapmac", args, &val)) { 1262 t.fs.swapmac = 1; 1263 } else if (!strcmp(argv[start_arg], "nat")) { 1264 if (!strcmp(argv[start_arg + 1], "dip")) 1265 t.fs.nat_mode = NAT_MODE_DIP; 1266 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1267 t.fs.nat_mode = NAT_MODE_DIP_DP; 1268 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1269 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1270 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1271 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1272 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1273 t.fs.nat_mode = NAT_MODE_SIP_SP; 1274 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1275 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1276 else if (!strcmp(argv[start_arg + 1], "all")) 1277 t.fs.nat_mode = NAT_MODE_ALL; 1278 else { 1279 warnx("unknown nat type \"%s\"; known types are dip, " 1280 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1281 "dip-sip-sp, and all", argv[start_arg + 1]); 1282 return (EINVAL); 1283 } 1284 } else if (!parse_val("natseq", args, &val)) { 1285 t.fs.nat_seq_chk = val; 1286 } else if (!parse_val("natflag", args, &val)) { 1287 t.fs.nat_flag_chk = 1; 1288 } else if (!strcmp(argv[start_arg], "dmac")) { 1289 struct ether_addr *daddr; 1290 1291 daddr = ether_aton(argv[start_arg + 1]); 1292 if (daddr == NULL) { 1293 warnx("invalid dmac address \"%s\"", 1294 argv[start_arg + 1]); 1295 return (EINVAL); 1296 } 1297 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1298 t.fs.newdmac = 1; 1299 } else if (!strcmp(argv[start_arg], "smac")) { 1300 struct ether_addr *saddr; 1301 1302 saddr = ether_aton(argv[start_arg + 1]); 1303 if (saddr == NULL) { 1304 warnx("invalid smac address \"%s\"", 1305 argv[start_arg + 1]); 1306 return (EINVAL); 1307 } 1308 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1309 t.fs.newsmac = 1; 1310 } else if (!strcmp(argv[start_arg], "vlan")) { 1311 char *p; 1312 if (!strcmp(argv[start_arg + 1], "none")) { 1313 t.fs.newvlan = VLAN_REMOVE; 1314 } else if (argv[start_arg + 1][0] == '=') { 1315 t.fs.newvlan = VLAN_REWRITE; 1316 } else if (argv[start_arg + 1][0] == '+') { 1317 t.fs.newvlan = VLAN_INSERT; 1318 } else { 1319 warnx("unknown vlan parameter \"%s\"; must" 1320 " be one of \"none\", \"=<vlan>\", " 1321 " \"+<vlan>\"", argv[start_arg + 1]); 1322 return (EINVAL); 1323 } 1324 if (t.fs.newvlan == VLAN_REWRITE || 1325 t.fs.newvlan == VLAN_INSERT) { 1326 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1327 &p, 0); 1328 if (p == argv[start_arg + 1] + 1 || p[0] != 0 || 1329 t.fs.vlan > MAX_VLANID) { 1330 warnx("invalid vlan \"%s\"", 1331 argv[start_arg + 1]); 1332 return (EINVAL); 1333 } 1334 } 1335 } else { 1336 warnx("invalid parameter \"%s\"", argv[start_arg]); 1337 return (EINVAL); 1338 } 1339 } 1340 if (start_arg != argc) { 1341 warnx("no value for \"%s\"", argv[start_arg]); 1342 return (EINVAL); 1343 } 1344 1345 /* 1346 * Check basic sanity of option combinations. 1347 */ 1348 if (t.fs.action != FILTER_SWITCH && 1349 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1350 t.fs.swapmac || t.fs.nat_mode)) { 1351 warnx("port, dmac, smac, vlan, and nat only make sense with" 1352 " \"action switch\""); 1353 return (EINVAL); 1354 } 1355 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1356 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1357 warnx("nat params only make sense with valid nat mode"); 1358 return (EINVAL); 1359 } 1360 if (t.fs.action != FILTER_PASS && 1361 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1362 warnx("rpttid, queue and tcbhash don't make sense with" 1363 " action \"drop\" or \"switch\""); 1364 return (EINVAL); 1365 } 1366 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1367 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1368 return (EINVAL); 1369 } 1370 1371 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1372 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1373 if (hash && rc == 0) 1374 printf("%d\n", t.idx); 1375 return (rc); 1376 } 1377 1378 static int 1379 filter_cmd(int argc, const char *argv[], int hashfilter) 1380 { 1381 long long val; 1382 uint32_t idx; 1383 char *s; 1384 1385 if (argc == 0) { 1386 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1387 return (EINVAL); 1388 }; 1389 1390 /* list */ 1391 if (strcmp(argv[0], "list") == 0) { 1392 if (argc != 1) 1393 warnx("trailing arguments after \"list\" ignored."); 1394 1395 return show_filters(hashfilter); 1396 } 1397 1398 /* mode */ 1399 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1400 return get_filter_mode(hashfilter); 1401 1402 /* mode <mode> */ 1403 if (strcmp(argv[0], "mode") == 0) 1404 return set_filter_mode(argc - 1, argv + 1, hashfilter); 1405 1406 /* <idx> ... */ 1407 s = str_to_number(argv[0], NULL, &val); 1408 if (*s || val < 0 || val > 0xffffffffU) { 1409 if (hashfilter) { 1410 /* 1411 * No numeric index means this must be a request to 1412 * create a new hashfilter and we are already at the 1413 * parameter/value list. 1414 */ 1415 idx = (uint32_t) -1; 1416 goto setf; 1417 } 1418 warnx("\"%s\" is neither an index nor a filter subcommand.", 1419 argv[0]); 1420 return (EINVAL); 1421 } 1422 idx = (uint32_t) val; 1423 1424 /* <idx> delete|clear [prio 0|1] */ 1425 if ((argc == 2 || argc == 4) && 1426 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1427 int prio = 0; 1428 1429 if (argc == 4) { 1430 if (hashfilter) { 1431 warnx("stray arguments after \"%s\".", argv[1]); 1432 return (EINVAL); 1433 } 1434 1435 if (strcmp(argv[2], "prio") != 0) { 1436 warnx("\"prio\" is the only valid keyword " 1437 "after \"%s\", found \"%s\" instead.", 1438 argv[1], argv[2]); 1439 return (EINVAL); 1440 } 1441 1442 s = str_to_number(argv[3], NULL, &val); 1443 if (*s || val < 0 || val > 1) { 1444 warnx("%s \"%s\"; must be \"0\" or \"1\".", 1445 argv[2], argv[3]); 1446 return (EINVAL); 1447 } 1448 prio = (int)val; 1449 } 1450 return del_filter(idx, prio, hashfilter); 1451 } 1452 1453 /* skip <idx> */ 1454 argc--; 1455 argv++; 1456 1457 setf: 1458 /* [<param> <val>] ... */ 1459 return set_filter(idx, argc, argv, hashfilter); 1460 } 1461 1462 /* 1463 * Shows the fields of a multi-word structure. The structure is considered to 1464 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1465 * whose fields are described by @fd. The 32-bit words are given in @words 1466 * starting with the least significant 32-bit word. 1467 */ 1468 static void 1469 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1470 { 1471 unsigned int w = 0; 1472 const struct field_desc *p; 1473 1474 for (p = fd; p->name; p++) 1475 w = max(w, strlen(p->name)); 1476 1477 while (fd->name) { 1478 unsigned long long data; 1479 int first_word = fd->start / 32; 1480 int shift = fd->start % 32; 1481 int width = fd->end - fd->start + 1; 1482 unsigned long long mask = (1ULL << width) - 1; 1483 1484 data = (words[first_word] >> shift) | 1485 ((uint64_t)words[first_word + 1] << (32 - shift)); 1486 if (shift) 1487 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1488 data &= mask; 1489 if (fd->islog2) 1490 data = 1 << data; 1491 printf("%-*s ", w, fd->name); 1492 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1493 fd++; 1494 } 1495 } 1496 1497 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1498 #define FIELD1(name, start) FIELD(name, start, start) 1499 1500 static void 1501 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1502 { 1503 static struct field_desc egress_t5[] = { 1504 FIELD("DCA_ST:", 181, 191), 1505 FIELD1("StatusPgNS:", 180), 1506 FIELD1("StatusPgRO:", 179), 1507 FIELD1("FetchNS:", 178), 1508 FIELD1("FetchRO:", 177), 1509 FIELD1("Valid:", 176), 1510 FIELD("PCIeDataChannel:", 174, 175), 1511 FIELD1("StatusPgTPHintEn:", 173), 1512 FIELD("StatusPgTPHint:", 171, 172), 1513 FIELD1("FetchTPHintEn:", 170), 1514 FIELD("FetchTPHint:", 168, 169), 1515 FIELD1("FCThreshOverride:", 167), 1516 { "WRLength:", 162, 166, 9, 0, 1 }, 1517 FIELD1("WRLengthKnown:", 161), 1518 FIELD1("ReschedulePending:", 160), 1519 FIELD1("OnChipQueue:", 159), 1520 FIELD1("FetchSizeMode:", 158), 1521 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1522 FIELD1("FLMPacking:", 155), 1523 FIELD("FetchBurstMax:", 153, 154), 1524 FIELD("uPToken:", 133, 152), 1525 FIELD1("uPTokenEn:", 132), 1526 FIELD1("UserModeIO:", 131), 1527 FIELD("uPFLCredits:", 123, 130), 1528 FIELD1("uPFLCreditEn:", 122), 1529 FIELD("FID:", 111, 121), 1530 FIELD("HostFCMode:", 109, 110), 1531 FIELD1("HostFCOwner:", 108), 1532 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1533 FIELD("CIDX:", 89, 104), 1534 FIELD("PIDX:", 73, 88), 1535 { "BaseAddress:", 18, 72, 9, 1 }, 1536 FIELD("QueueSize:", 2, 17), 1537 FIELD1("QueueType:", 1), 1538 FIELD1("CachePriority:", 0), 1539 { NULL } 1540 }; 1541 static struct field_desc egress_t6[] = { 1542 FIELD("DCA_ST:", 181, 191), 1543 FIELD1("StatusPgNS:", 180), 1544 FIELD1("StatusPgRO:", 179), 1545 FIELD1("FetchNS:", 178), 1546 FIELD1("FetchRO:", 177), 1547 FIELD1("Valid:", 176), 1548 FIELD1("ReschedulePending_1:", 175), 1549 FIELD1("PCIeDataChannel:", 174), 1550 FIELD1("StatusPgTPHintEn:", 173), 1551 FIELD("StatusPgTPHint:", 171, 172), 1552 FIELD1("FetchTPHintEn:", 170), 1553 FIELD("FetchTPHint:", 168, 169), 1554 FIELD1("FCThreshOverride:", 167), 1555 { "WRLength:", 162, 166, 9, 0, 1 }, 1556 FIELD1("WRLengthKnown:", 161), 1557 FIELD1("ReschedulePending:", 160), 1558 FIELD("TimerIx:", 157, 159), 1559 FIELD1("FetchBurstMin:", 156), 1560 FIELD1("FLMPacking:", 155), 1561 FIELD("FetchBurstMax:", 153, 154), 1562 FIELD("uPToken:", 133, 152), 1563 FIELD1("uPTokenEn:", 132), 1564 FIELD1("UserModeIO:", 131), 1565 FIELD("uPFLCredits:", 123, 130), 1566 FIELD1("uPFLCreditEn:", 122), 1567 FIELD("FID:", 111, 121), 1568 FIELD("HostFCMode:", 109, 110), 1569 FIELD1("HostFCOwner:", 108), 1570 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1571 FIELD("CIDX:", 89, 104), 1572 FIELD("PIDX:", 73, 88), 1573 { "BaseAddress:", 18, 72, 9, 1 }, 1574 FIELD("QueueSize:", 2, 17), 1575 FIELD1("QueueType:", 1), 1576 FIELD1("FetchSizeMode:", 0), 1577 { NULL } 1578 }; 1579 static struct field_desc fl_t5[] = { 1580 FIELD("DCA_ST:", 181, 191), 1581 FIELD1("StatusPgNS:", 180), 1582 FIELD1("StatusPgRO:", 179), 1583 FIELD1("FetchNS:", 178), 1584 FIELD1("FetchRO:", 177), 1585 FIELD1("Valid:", 176), 1586 FIELD("PCIeDataChannel:", 174, 175), 1587 FIELD1("StatusPgTPHintEn:", 173), 1588 FIELD("StatusPgTPHint:", 171, 172), 1589 FIELD1("FetchTPHintEn:", 170), 1590 FIELD("FetchTPHint:", 168, 169), 1591 FIELD1("FCThreshOverride:", 167), 1592 FIELD1("ReschedulePending:", 160), 1593 FIELD1("OnChipQueue:", 159), 1594 FIELD1("FetchSizeMode:", 158), 1595 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1596 FIELD1("FLMPacking:", 155), 1597 FIELD("FetchBurstMax:", 153, 154), 1598 FIELD1("FLMcongMode:", 152), 1599 FIELD("MaxuPFLCredits:", 144, 151), 1600 FIELD("FLMcontextID:", 133, 143), 1601 FIELD1("uPTokenEn:", 132), 1602 FIELD1("UserModeIO:", 131), 1603 FIELD("uPFLCredits:", 123, 130), 1604 FIELD1("uPFLCreditEn:", 122), 1605 FIELD("FID:", 111, 121), 1606 FIELD("HostFCMode:", 109, 110), 1607 FIELD1("HostFCOwner:", 108), 1608 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1609 FIELD("CIDX:", 89, 104), 1610 FIELD("PIDX:", 73, 88), 1611 { "BaseAddress:", 18, 72, 9, 1 }, 1612 FIELD("QueueSize:", 2, 17), 1613 FIELD1("QueueType:", 1), 1614 FIELD1("CachePriority:", 0), 1615 { NULL } 1616 }; 1617 static struct field_desc ingress_t5[] = { 1618 FIELD("DCA_ST:", 143, 153), 1619 FIELD1("ISCSICoalescing:", 142), 1620 FIELD1("Queue_Valid:", 141), 1621 FIELD1("TimerPending:", 140), 1622 FIELD1("DropRSS:", 139), 1623 FIELD("PCIeChannel:", 137, 138), 1624 FIELD1("SEInterruptArmed:", 136), 1625 FIELD1("CongestionMgtEnable:", 135), 1626 FIELD1("NoSnoop:", 134), 1627 FIELD1("RelaxedOrdering:", 133), 1628 FIELD1("GTSmode:", 132), 1629 FIELD1("TPHintEn:", 131), 1630 FIELD("TPHint:", 129, 130), 1631 FIELD1("UpdateScheduling:", 128), 1632 FIELD("UpdateDelivery:", 126, 127), 1633 FIELD1("InterruptSent:", 125), 1634 FIELD("InterruptIDX:", 114, 124), 1635 FIELD1("InterruptDestination:", 113), 1636 FIELD1("InterruptArmed:", 112), 1637 FIELD("RxIntCounter:", 106, 111), 1638 FIELD("RxIntCounterThreshold:", 104, 105), 1639 FIELD1("Generation:", 103), 1640 { "BaseAddress:", 48, 102, 9, 1 }, 1641 FIELD("PIDX:", 32, 47), 1642 FIELD("CIDX:", 16, 31), 1643 { "QueueSize:", 4, 15, 4, 0 }, 1644 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1645 FIELD1("QueueEntryOverride:", 1), 1646 FIELD1("CachePriority:", 0), 1647 { NULL } 1648 }; 1649 static struct field_desc ingress_t6[] = { 1650 FIELD1("SP_NS:", 158), 1651 FIELD1("SP_RO:", 157), 1652 FIELD1("SP_TPHintEn:", 156), 1653 FIELD("SP_TPHint:", 154, 155), 1654 FIELD("DCA_ST:", 143, 153), 1655 FIELD1("ISCSICoalescing:", 142), 1656 FIELD1("Queue_Valid:", 141), 1657 FIELD1("TimerPending:", 140), 1658 FIELD1("DropRSS:", 139), 1659 FIELD("PCIeChannel:", 137, 138), 1660 FIELD1("SEInterruptArmed:", 136), 1661 FIELD1("CongestionMgtEnable:", 135), 1662 FIELD1("NoSnoop:", 134), 1663 FIELD1("RelaxedOrdering:", 133), 1664 FIELD1("GTSmode:", 132), 1665 FIELD1("TPHintEn:", 131), 1666 FIELD("TPHint:", 129, 130), 1667 FIELD1("UpdateScheduling:", 128), 1668 FIELD("UpdateDelivery:", 126, 127), 1669 FIELD1("InterruptSent:", 125), 1670 FIELD("InterruptIDX:", 114, 124), 1671 FIELD1("InterruptDestination:", 113), 1672 FIELD1("InterruptArmed:", 112), 1673 FIELD("RxIntCounter:", 106, 111), 1674 FIELD("RxIntCounterThreshold:", 104, 105), 1675 FIELD1("Generation:", 103), 1676 { "BaseAddress:", 48, 102, 9, 1 }, 1677 FIELD("PIDX:", 32, 47), 1678 FIELD("CIDX:", 16, 31), 1679 { "QueueSize:", 4, 15, 4, 0 }, 1680 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1681 FIELD1("QueueEntryOverride:", 1), 1682 FIELD1("CachePriority:", 0), 1683 { NULL } 1684 }; 1685 static struct field_desc flm_t5[] = { 1686 FIELD1("Valid:", 89), 1687 FIELD("SplitLenMode:", 87, 88), 1688 FIELD1("TPHintEn:", 86), 1689 FIELD("TPHint:", 84, 85), 1690 FIELD1("NoSnoop:", 83), 1691 FIELD1("RelaxedOrdering:", 82), 1692 FIELD("DCA_ST:", 71, 81), 1693 FIELD("EQid:", 54, 70), 1694 FIELD("SplitEn:", 52, 53), 1695 FIELD1("PadEn:", 51), 1696 FIELD1("PackEn:", 50), 1697 FIELD1("Cache_Lock :", 49), 1698 FIELD1("CongDrop:", 48), 1699 FIELD("PackOffset:", 16, 47), 1700 FIELD("CIDX:", 8, 15), 1701 FIELD("PIDX:", 0, 7), 1702 { NULL } 1703 }; 1704 static struct field_desc flm_t6[] = { 1705 FIELD1("Valid:", 89), 1706 FIELD("SplitLenMode:", 87, 88), 1707 FIELD1("TPHintEn:", 86), 1708 FIELD("TPHint:", 84, 85), 1709 FIELD1("NoSnoop:", 83), 1710 FIELD1("RelaxedOrdering:", 82), 1711 FIELD("DCA_ST:", 71, 81), 1712 FIELD("EQid:", 54, 70), 1713 FIELD("SplitEn:", 52, 53), 1714 FIELD1("PadEn:", 51), 1715 FIELD1("PackEn:", 50), 1716 FIELD1("Cache_Lock :", 49), 1717 FIELD1("CongDrop:", 48), 1718 FIELD1("Inflight:", 47), 1719 FIELD1("CongEn:", 46), 1720 FIELD1("CongMode:", 45), 1721 FIELD("PackOffset:", 20, 39), 1722 FIELD("CIDX:", 8, 15), 1723 FIELD("PIDX:", 0, 7), 1724 { NULL } 1725 }; 1726 static struct field_desc conm_t5[] = { 1727 FIELD1("CngMPSEnable:", 21), 1728 FIELD("CngTPMode:", 19, 20), 1729 FIELD1("CngDBPHdr:", 18), 1730 FIELD1("CngDBPData:", 17), 1731 FIELD1("CngIMSG:", 16), 1732 { "CngChMap:", 0, 15, 0, 1, 0 }, 1733 { NULL } 1734 }; 1735 1736 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1737 if (p->data[0] & 2) 1738 show_struct(p->data, 6, fl_t5); 1739 else if (vers == 5) 1740 show_struct(p->data, 6, egress_t5); 1741 else 1742 show_struct(p->data, 6, egress_t6); 1743 } else if (p->mem_id == SGE_CONTEXT_FLM) 1744 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1745 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1746 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1747 else if (p->mem_id == SGE_CONTEXT_CNM) 1748 show_struct(p->data, 1, conm_t5); 1749 } 1750 1751 static void 1752 show_t4_ctxt(const struct t4_sge_context *p) 1753 { 1754 static struct field_desc egress_t4[] = { 1755 FIELD1("StatusPgNS:", 180), 1756 FIELD1("StatusPgRO:", 179), 1757 FIELD1("FetchNS:", 178), 1758 FIELD1("FetchRO:", 177), 1759 FIELD1("Valid:", 176), 1760 FIELD("PCIeDataChannel:", 174, 175), 1761 FIELD1("DCAEgrQEn:", 173), 1762 FIELD("DCACPUID:", 168, 172), 1763 FIELD1("FCThreshOverride:", 167), 1764 FIELD("WRLength:", 162, 166), 1765 FIELD1("WRLengthKnown:", 161), 1766 FIELD1("ReschedulePending:", 160), 1767 FIELD1("OnChipQueue:", 159), 1768 FIELD1("FetchSizeMode", 158), 1769 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1770 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1771 FIELD("uPToken:", 133, 152), 1772 FIELD1("uPTokenEn:", 132), 1773 FIELD1("UserModeIO:", 131), 1774 FIELD("uPFLCredits:", 123, 130), 1775 FIELD1("uPFLCreditEn:", 122), 1776 FIELD("FID:", 111, 121), 1777 FIELD("HostFCMode:", 109, 110), 1778 FIELD1("HostFCOwner:", 108), 1779 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1780 FIELD("CIDX:", 89, 104), 1781 FIELD("PIDX:", 73, 88), 1782 { "BaseAddress:", 18, 72, 9, 1 }, 1783 FIELD("QueueSize:", 2, 17), 1784 FIELD1("QueueType:", 1), 1785 FIELD1("CachePriority:", 0), 1786 { NULL } 1787 }; 1788 static struct field_desc fl_t4[] = { 1789 FIELD1("StatusPgNS:", 180), 1790 FIELD1("StatusPgRO:", 179), 1791 FIELD1("FetchNS:", 178), 1792 FIELD1("FetchRO:", 177), 1793 FIELD1("Valid:", 176), 1794 FIELD("PCIeDataChannel:", 174, 175), 1795 FIELD1("DCAEgrQEn:", 173), 1796 FIELD("DCACPUID:", 168, 172), 1797 FIELD1("FCThreshOverride:", 167), 1798 FIELD1("ReschedulePending:", 160), 1799 FIELD1("OnChipQueue:", 159), 1800 FIELD1("FetchSizeMode", 158), 1801 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1802 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1803 FIELD1("FLMcongMode:", 152), 1804 FIELD("MaxuPFLCredits:", 144, 151), 1805 FIELD("FLMcontextID:", 133, 143), 1806 FIELD1("uPTokenEn:", 132), 1807 FIELD1("UserModeIO:", 131), 1808 FIELD("uPFLCredits:", 123, 130), 1809 FIELD1("uPFLCreditEn:", 122), 1810 FIELD("FID:", 111, 121), 1811 FIELD("HostFCMode:", 109, 110), 1812 FIELD1("HostFCOwner:", 108), 1813 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1814 FIELD("CIDX:", 89, 104), 1815 FIELD("PIDX:", 73, 88), 1816 { "BaseAddress:", 18, 72, 9, 1 }, 1817 FIELD("QueueSize:", 2, 17), 1818 FIELD1("QueueType:", 1), 1819 FIELD1("CachePriority:", 0), 1820 { NULL } 1821 }; 1822 static struct field_desc ingress_t4[] = { 1823 FIELD1("NoSnoop:", 145), 1824 FIELD1("RelaxedOrdering:", 144), 1825 FIELD1("GTSmode:", 143), 1826 FIELD1("ISCSICoalescing:", 142), 1827 FIELD1("Valid:", 141), 1828 FIELD1("TimerPending:", 140), 1829 FIELD1("DropRSS:", 139), 1830 FIELD("PCIeChannel:", 137, 138), 1831 FIELD1("SEInterruptArmed:", 136), 1832 FIELD1("CongestionMgtEnable:", 135), 1833 FIELD1("DCAIngQEnable:", 134), 1834 FIELD("DCACPUID:", 129, 133), 1835 FIELD1("UpdateScheduling:", 128), 1836 FIELD("UpdateDelivery:", 126, 127), 1837 FIELD1("InterruptSent:", 125), 1838 FIELD("InterruptIDX:", 114, 124), 1839 FIELD1("InterruptDestination:", 113), 1840 FIELD1("InterruptArmed:", 112), 1841 FIELD("RxIntCounter:", 106, 111), 1842 FIELD("RxIntCounterThreshold:", 104, 105), 1843 FIELD1("Generation:", 103), 1844 { "BaseAddress:", 48, 102, 9, 1 }, 1845 FIELD("PIDX:", 32, 47), 1846 FIELD("CIDX:", 16, 31), 1847 { "QueueSize:", 4, 15, 4, 0 }, 1848 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1849 FIELD1("QueueEntryOverride:", 1), 1850 FIELD1("CachePriority:", 0), 1851 { NULL } 1852 }; 1853 static struct field_desc flm_t4[] = { 1854 FIELD1("NoSnoop:", 79), 1855 FIELD1("RelaxedOrdering:", 78), 1856 FIELD1("Valid:", 77), 1857 FIELD("DCACPUID:", 72, 76), 1858 FIELD1("DCAFLEn:", 71), 1859 FIELD("EQid:", 54, 70), 1860 FIELD("SplitEn:", 52, 53), 1861 FIELD1("PadEn:", 51), 1862 FIELD1("PackEn:", 50), 1863 FIELD1("DBpriority:", 48), 1864 FIELD("PackOffset:", 16, 47), 1865 FIELD("CIDX:", 8, 15), 1866 FIELD("PIDX:", 0, 7), 1867 { NULL } 1868 }; 1869 static struct field_desc conm_t4[] = { 1870 FIELD1("CngDBPHdr:", 6), 1871 FIELD1("CngDBPData:", 5), 1872 FIELD1("CngIMSG:", 4), 1873 { "CngChMap:", 0, 3, 0, 1, 0}, 1874 { NULL } 1875 }; 1876 1877 if (p->mem_id == SGE_CONTEXT_EGRESS) 1878 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1879 else if (p->mem_id == SGE_CONTEXT_FLM) 1880 show_struct(p->data, 3, flm_t4); 1881 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1882 show_struct(p->data, 5, ingress_t4); 1883 else if (p->mem_id == SGE_CONTEXT_CNM) 1884 show_struct(p->data, 1, conm_t4); 1885 } 1886 1887 #undef FIELD 1888 #undef FIELD1 1889 1890 static int 1891 get_sge_context(int argc, const char *argv[]) 1892 { 1893 int rc; 1894 char *p; 1895 long cid; 1896 struct t4_sge_context cntxt = {0}; 1897 1898 if (argc != 2) { 1899 warnx("sge_context: incorrect number of arguments."); 1900 return (EINVAL); 1901 } 1902 1903 if (!strcmp(argv[0], "egress")) 1904 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1905 else if (!strcmp(argv[0], "ingress")) 1906 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1907 else if (!strcmp(argv[0], "fl")) 1908 cntxt.mem_id = SGE_CONTEXT_FLM; 1909 else if (!strcmp(argv[0], "cong")) 1910 cntxt.mem_id = SGE_CONTEXT_CNM; 1911 else { 1912 warnx("unknown context type \"%s\"; known types are egress, " 1913 "ingress, fl, and cong.", argv[0]); 1914 return (EINVAL); 1915 } 1916 1917 p = str_to_number(argv[1], &cid, NULL); 1918 if (*p) { 1919 warnx("invalid context id \"%s\"", argv[1]); 1920 return (EINVAL); 1921 } 1922 cntxt.cid = cid; 1923 1924 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1925 if (rc != 0) 1926 return (rc); 1927 1928 if (chip_id == 4) 1929 show_t4_ctxt(&cntxt); 1930 else 1931 show_t5t6_ctxt(&cntxt, chip_id); 1932 1933 return (0); 1934 } 1935 1936 static int 1937 loadfw(int argc, const char *argv[]) 1938 { 1939 int rc, fd; 1940 struct t4_data data = {0}; 1941 const char *fname = argv[0]; 1942 struct stat st = {0}; 1943 1944 if (argc != 1) { 1945 warnx("loadfw: incorrect number of arguments."); 1946 return (EINVAL); 1947 } 1948 1949 fd = open(fname, O_RDONLY); 1950 if (fd < 0) { 1951 warn("open(%s)", fname); 1952 return (errno); 1953 } 1954 1955 if (fstat(fd, &st) < 0) { 1956 warn("fstat"); 1957 close(fd); 1958 return (errno); 1959 } 1960 1961 data.len = st.st_size; 1962 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1963 if (data.data == MAP_FAILED) { 1964 warn("mmap"); 1965 close(fd); 1966 return (errno); 1967 } 1968 1969 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1970 munmap(data.data, data.len); 1971 close(fd); 1972 return (rc); 1973 } 1974 1975 static int 1976 loadcfg(int argc, const char *argv[]) 1977 { 1978 int rc, fd; 1979 struct t4_data data = {0}; 1980 const char *fname = argv[0]; 1981 struct stat st = {0}; 1982 1983 if (argc != 1) { 1984 warnx("loadcfg: incorrect number of arguments."); 1985 return (EINVAL); 1986 } 1987 1988 if (strcmp(fname, "clear") == 0) 1989 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1990 1991 fd = open(fname, O_RDONLY); 1992 if (fd < 0) { 1993 warn("open(%s)", fname); 1994 return (errno); 1995 } 1996 1997 if (fstat(fd, &st) < 0) { 1998 warn("fstat"); 1999 close(fd); 2000 return (errno); 2001 } 2002 2003 data.len = st.st_size; 2004 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 2005 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 2006 if (data.data == MAP_FAILED) { 2007 warn("mmap"); 2008 close(fd); 2009 return (errno); 2010 } 2011 2012 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 2013 munmap(data.data, data.len); 2014 close(fd); 2015 return (rc); 2016 } 2017 2018 static int 2019 dumpstate(int argc, const char *argv[]) 2020 { 2021 int rc, fd; 2022 struct t4_cudbg_dump dump = {0}; 2023 const char *fname = argv[0]; 2024 2025 if (argc != 1) { 2026 warnx("dumpstate: incorrect number of arguments."); 2027 return (EINVAL); 2028 } 2029 2030 dump.wr_flash = 0; 2031 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 2032 dump.len = 8 * 1024 * 1024; 2033 dump.data = malloc(dump.len); 2034 if (dump.data == NULL) { 2035 return (ENOMEM); 2036 } 2037 2038 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 2039 if (rc != 0) 2040 goto done; 2041 2042 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2043 S_IRUSR | S_IRGRP | S_IROTH); 2044 if (fd < 0) { 2045 warn("open(%s)", fname); 2046 rc = errno; 2047 goto done; 2048 } 2049 write(fd, dump.data, dump.len); 2050 close(fd); 2051 done: 2052 free(dump.data); 2053 return (rc); 2054 } 2055 2056 static int 2057 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2058 { 2059 int rc; 2060 struct t4_mem_range mr; 2061 2062 mr.addr = addr; 2063 mr.len = len; 2064 mr.data = malloc(mr.len); 2065 2066 if (mr.data == 0) { 2067 warn("read_mem: malloc"); 2068 return (errno); 2069 } 2070 2071 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2072 if (rc != 0) 2073 goto done; 2074 2075 if (output) 2076 (*output)(mr.data, mr.len); 2077 done: 2078 free(mr.data); 2079 return (rc); 2080 } 2081 2082 static int 2083 loadboot(int argc, const char *argv[]) 2084 { 2085 int rc, fd; 2086 long l; 2087 char *p; 2088 struct t4_bootrom br = {0}; 2089 const char *fname = argv[0]; 2090 struct stat st = {0}; 2091 2092 if (argc == 1) { 2093 br.pf_offset = 0; 2094 br.pfidx_addr = 0; 2095 } else if (argc == 3) { 2096 if (!strcmp(argv[1], "pf")) 2097 br.pf_offset = 0; 2098 else if (!strcmp(argv[1], "offset")) 2099 br.pf_offset = 1; 2100 else 2101 return (EINVAL); 2102 2103 p = str_to_number(argv[2], &l, NULL); 2104 if (*p) 2105 return (EINVAL); 2106 br.pfidx_addr = l; 2107 } else { 2108 warnx("loadboot: incorrect number of arguments."); 2109 return (EINVAL); 2110 } 2111 2112 if (strcmp(fname, "clear") == 0) 2113 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2114 2115 fd = open(fname, O_RDONLY); 2116 if (fd < 0) { 2117 warn("open(%s)", fname); 2118 return (errno); 2119 } 2120 2121 if (fstat(fd, &st) < 0) { 2122 warn("fstat"); 2123 close(fd); 2124 return (errno); 2125 } 2126 2127 br.len = st.st_size; 2128 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2129 if (br.data == MAP_FAILED) { 2130 warn("mmap"); 2131 close(fd); 2132 return (errno); 2133 } 2134 2135 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2136 munmap(br.data, br.len); 2137 close(fd); 2138 return (rc); 2139 } 2140 2141 static int 2142 loadbootcfg(int argc, const char *argv[]) 2143 { 2144 int rc, fd; 2145 struct t4_data bc = {0}; 2146 const char *fname = argv[0]; 2147 struct stat st = {0}; 2148 2149 if (argc != 1) { 2150 warnx("loadbootcfg: incorrect number of arguments."); 2151 return (EINVAL); 2152 } 2153 2154 if (strcmp(fname, "clear") == 0) 2155 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2156 2157 fd = open(fname, O_RDONLY); 2158 if (fd < 0) { 2159 warn("open(%s)", fname); 2160 return (errno); 2161 } 2162 2163 if (fstat(fd, &st) < 0) { 2164 warn("fstat"); 2165 close(fd); 2166 return (errno); 2167 } 2168 2169 bc.len = st.st_size; 2170 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2171 if (bc.data == MAP_FAILED) { 2172 warn("mmap"); 2173 close(fd); 2174 return (errno); 2175 } 2176 2177 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2178 munmap(bc.data, bc.len); 2179 close(fd); 2180 return (rc); 2181 } 2182 2183 /* 2184 * Display memory as list of 'n' 4-byte values per line. 2185 */ 2186 static void 2187 show_mem(uint32_t *buf, uint32_t len) 2188 { 2189 const char *s; 2190 int i, n = 8; 2191 2192 while (len) { 2193 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2194 s = i ? " " : ""; 2195 printf("%s%08x", s, htonl(*buf)); 2196 } 2197 printf("\n"); 2198 } 2199 } 2200 2201 static int 2202 memdump(int argc, const char *argv[]) 2203 { 2204 char *p; 2205 long l; 2206 uint32_t addr, len; 2207 2208 if (argc != 2) { 2209 warnx("incorrect number of arguments."); 2210 return (EINVAL); 2211 } 2212 2213 p = str_to_number(argv[0], &l, NULL); 2214 if (*p) { 2215 warnx("invalid address \"%s\"", argv[0]); 2216 return (EINVAL); 2217 } 2218 addr = l; 2219 2220 p = str_to_number(argv[1], &l, NULL); 2221 if (*p) { 2222 warnx("memdump: invalid length \"%s\"", argv[1]); 2223 return (EINVAL); 2224 } 2225 len = l; 2226 2227 return (read_mem(addr, len, show_mem)); 2228 } 2229 2230 /* 2231 * Display TCB as list of 'n' 4-byte values per line. 2232 */ 2233 static void 2234 show_tcb(uint32_t *buf, uint32_t len) 2235 { 2236 unsigned char *tcb = (unsigned char *)buf; 2237 const char *s; 2238 int i, n = 8; 2239 2240 while (len) { 2241 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2242 s = i ? " " : ""; 2243 printf("%s%08x", s, htonl(*buf)); 2244 } 2245 printf("\n"); 2246 } 2247 set_tcb_info(TIDTYPE_TCB, chip_id); 2248 set_print_style(PRNTSTYL_COMP); 2249 swizzle_tcb(tcb); 2250 parse_n_display_xcb(tcb); 2251 } 2252 2253 #define A_TP_CMM_TCB_BASE 0x7d10 2254 #define TCB_SIZE 128 2255 static int 2256 read_tcb(int argc, const char *argv[]) 2257 { 2258 char *p; 2259 long l; 2260 long long val; 2261 unsigned int tid; 2262 uint32_t addr; 2263 int rc; 2264 2265 if (argc != 1) { 2266 warnx("incorrect number of arguments."); 2267 return (EINVAL); 2268 } 2269 2270 p = str_to_number(argv[0], &l, NULL); 2271 if (*p) { 2272 warnx("invalid tid \"%s\"", argv[0]); 2273 return (EINVAL); 2274 } 2275 tid = l; 2276 2277 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2278 if (rc != 0) 2279 return (rc); 2280 2281 addr = val + tid * TCB_SIZE; 2282 2283 return (read_mem(addr, TCB_SIZE, show_tcb)); 2284 } 2285 2286 static int 2287 read_i2c(int argc, const char *argv[]) 2288 { 2289 char *p; 2290 long l; 2291 struct t4_i2c_data i2cd; 2292 int rc, i; 2293 2294 if (argc < 3 || argc > 4) { 2295 warnx("incorrect number of arguments."); 2296 return (EINVAL); 2297 } 2298 2299 p = str_to_number(argv[0], &l, NULL); 2300 if (*p || l > UCHAR_MAX) { 2301 warnx("invalid port id \"%s\"", argv[0]); 2302 return (EINVAL); 2303 } 2304 i2cd.port_id = l; 2305 2306 p = str_to_number(argv[1], &l, NULL); 2307 if (*p || l > UCHAR_MAX) { 2308 warnx("invalid i2c device address \"%s\"", argv[1]); 2309 return (EINVAL); 2310 } 2311 i2cd.dev_addr = l; 2312 2313 p = str_to_number(argv[2], &l, NULL); 2314 if (*p || l > UCHAR_MAX) { 2315 warnx("invalid byte offset \"%s\"", argv[2]); 2316 return (EINVAL); 2317 } 2318 i2cd.offset = l; 2319 2320 if (argc == 4) { 2321 p = str_to_number(argv[3], &l, NULL); 2322 if (*p || l > sizeof(i2cd.data)) { 2323 warnx("invalid number of bytes \"%s\"", argv[3]); 2324 return (EINVAL); 2325 } 2326 i2cd.len = l; 2327 } else 2328 i2cd.len = 1; 2329 2330 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2331 if (rc != 0) 2332 return (rc); 2333 2334 for (i = 0; i < i2cd.len; i++) 2335 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2336 2337 return (0); 2338 } 2339 2340 static int 2341 clearstats(int argc, const char *argv[]) 2342 { 2343 char *p; 2344 long l; 2345 uint32_t port; 2346 2347 if (argc != 1) { 2348 warnx("incorrect number of arguments."); 2349 return (EINVAL); 2350 } 2351 2352 p = str_to_number(argv[0], &l, NULL); 2353 if (*p) { 2354 warnx("invalid port id \"%s\"", argv[0]); 2355 return (EINVAL); 2356 } 2357 port = l; 2358 2359 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2360 } 2361 2362 static int 2363 show_tracers(void) 2364 { 2365 struct t4_tracer t; 2366 char *s; 2367 int rc, port_idx, i; 2368 long long val; 2369 2370 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2371 rc = read_reg(0x9800, 4, &val); 2372 if (rc != 0) 2373 return (rc); 2374 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2375 2376 t.idx = 0; 2377 for (t.idx = 0; ; t.idx++) { 2378 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2379 if (rc != 0 || t.idx == 0xff) 2380 break; 2381 2382 if (t.tp.port < 4) { 2383 s = "Rx"; 2384 port_idx = t.tp.port; 2385 } else if (t.tp.port < 8) { 2386 s = "Tx"; 2387 port_idx = t.tp.port - 4; 2388 } else if (t.tp.port < 12) { 2389 s = "loopback"; 2390 port_idx = t.tp.port - 8; 2391 } else if (t.tp.port < 16) { 2392 s = "MPS Rx"; 2393 port_idx = t.tp.port - 12; 2394 } else if (t.tp.port < 20) { 2395 s = "MPS Tx"; 2396 port_idx = t.tp.port - 16; 2397 } else { 2398 s = "unknown"; 2399 port_idx = t.tp.port; 2400 } 2401 2402 printf("\ntracer %u (currently %s) captures ", t.idx, 2403 t.enabled ? "ENABLED" : "DISABLED"); 2404 if (t.tp.port < 8) 2405 printf("port %u %s, ", port_idx, s); 2406 else 2407 printf("%s %u, ", s, port_idx); 2408 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2409 t.tp.min_len); 2410 printf("packets captured %smatch filter\n", 2411 t.tp.invert ? "do not " : ""); 2412 if (t.tp.skip_ofst) { 2413 printf("filter pattern: "); 2414 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2415 printf("%08x%08x", t.tp.data[i], 2416 t.tp.data[i + 1]); 2417 printf("/"); 2418 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2419 printf("%08x%08x", t.tp.mask[i], 2420 t.tp.mask[i + 1]); 2421 printf("@0\n"); 2422 } 2423 printf("filter pattern: "); 2424 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2425 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2426 printf("/"); 2427 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2428 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2429 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2430 } 2431 2432 return (rc); 2433 } 2434 2435 static int 2436 tracer_onoff(uint8_t idx, int enabled) 2437 { 2438 struct t4_tracer t; 2439 2440 t.idx = idx; 2441 t.enabled = enabled; 2442 t.valid = 0; 2443 2444 return doit(CHELSIO_T4_SET_TRACER, &t); 2445 } 2446 2447 static void 2448 create_tracing_ifnet() 2449 { 2450 char *cmd[] = { 2451 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2452 }; 2453 char *env[] = {NULL}; 2454 2455 if (vfork() == 0) { 2456 close(STDERR_FILENO); 2457 execve(cmd[0], cmd, env); 2458 _exit(0); 2459 } 2460 } 2461 2462 /* 2463 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2464 * matching). Right now this is a quick-n-dirty implementation that traces the 2465 * first 128B of all tx or rx on a port 2466 */ 2467 static int 2468 set_tracer(uint8_t idx, int argc, const char *argv[]) 2469 { 2470 struct t4_tracer t; 2471 int len, port; 2472 2473 bzero(&t, sizeof (t)); 2474 t.idx = idx; 2475 t.enabled = 1; 2476 t.valid = 1; 2477 2478 if (argc != 1) { 2479 warnx("must specify one of tx/rx/lo<n>"); 2480 return (EINVAL); 2481 } 2482 2483 len = strlen(argv[0]); 2484 if (len != 3) { 2485 warnx("argument must be 3 characters (tx/rx/lo<n>). eg. tx0"); 2486 return (EINVAL); 2487 } 2488 2489 if (strncmp(argv[0], "lo", 2) == 0) { 2490 port = argv[0][2] - '0'; 2491 if (port < 0 || port > 3) { 2492 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2493 return (EINVAL); 2494 } 2495 port += 8; 2496 } else if (strncmp(argv[0], "tx", 2) == 0) { 2497 port = argv[0][2] - '0'; 2498 if (port < 0 || port > 3) { 2499 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2500 return (EINVAL); 2501 } 2502 port += 4; 2503 } else if (strncmp(argv[0], "rx", 2) == 0) { 2504 port = argv[0][2] - '0'; 2505 if (port < 0 || port > 3) { 2506 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2507 return (EINVAL); 2508 } 2509 } else { 2510 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2511 return (EINVAL); 2512 } 2513 2514 t.tp.snap_len = 128; 2515 t.tp.min_len = 0; 2516 t.tp.skip_ofst = 0; 2517 t.tp.skip_len = 0; 2518 t.tp.invert = 0; 2519 t.tp.port = port; 2520 2521 create_tracing_ifnet(); 2522 return doit(CHELSIO_T4_SET_TRACER, &t); 2523 } 2524 2525 static int 2526 tracer_cmd(int argc, const char *argv[]) 2527 { 2528 long long val; 2529 uint8_t idx; 2530 char *s; 2531 2532 if (argc == 0) { 2533 warnx("tracer: no arguments."); 2534 return (EINVAL); 2535 }; 2536 2537 /* list */ 2538 if (strcmp(argv[0], "list") == 0) { 2539 if (argc != 1) 2540 warnx("trailing arguments after \"list\" ignored."); 2541 2542 return show_tracers(); 2543 } 2544 2545 /* <idx> ... */ 2546 s = str_to_number(argv[0], NULL, &val); 2547 if (*s || val > 0xff) { 2548 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2549 argv[0]); 2550 return (EINVAL); 2551 } 2552 idx = (int8_t)val; 2553 2554 /* <idx> disable */ 2555 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2556 return tracer_onoff(idx, 0); 2557 2558 /* <idx> enable */ 2559 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2560 return tracer_onoff(idx, 1); 2561 2562 /* <idx> ... */ 2563 return set_tracer(idx, argc - 1, argv + 1); 2564 } 2565 2566 static int 2567 modinfo_raw(int port_id) 2568 { 2569 uint8_t offset; 2570 struct t4_i2c_data i2cd; 2571 int rc; 2572 2573 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2574 bzero(&i2cd, sizeof(i2cd)); 2575 i2cd.port_id = port_id; 2576 i2cd.dev_addr = 0xa0; 2577 i2cd.offset = offset; 2578 i2cd.len = sizeof(i2cd.data); 2579 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2580 if (rc != 0) 2581 return (rc); 2582 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2583 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2584 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2585 i2cd.data[7]); 2586 2587 printf(" %c%c%c%c %c%c%c%c\n", 2588 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2589 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2590 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2591 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2592 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2593 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2594 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2595 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2596 } 2597 2598 return (0); 2599 } 2600 2601 static int 2602 modinfo(int argc, const char *argv[]) 2603 { 2604 long port; 2605 char string[16], *p; 2606 struct t4_i2c_data i2cd; 2607 int rc, i; 2608 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2609 2610 if (argc < 1) { 2611 warnx("must supply a port"); 2612 return (EINVAL); 2613 } 2614 2615 if (argc > 2) { 2616 warnx("too many arguments"); 2617 return (EINVAL); 2618 } 2619 2620 p = str_to_number(argv[0], &port, NULL); 2621 if (*p || port > UCHAR_MAX) { 2622 warnx("invalid port id \"%s\"", argv[0]); 2623 return (EINVAL); 2624 } 2625 2626 if (argc == 2) { 2627 if (!strcmp(argv[1], "raw")) 2628 return (modinfo_raw(port)); 2629 else { 2630 warnx("second argument can only be \"raw\""); 2631 return (EINVAL); 2632 } 2633 } 2634 2635 bzero(&i2cd, sizeof(i2cd)); 2636 i2cd.len = 1; 2637 i2cd.port_id = port; 2638 i2cd.dev_addr = SFF_8472_BASE; 2639 2640 i2cd.offset = SFF_8472_ID; 2641 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2642 goto fail; 2643 2644 if (i2cd.data[0] > SFF_8472_ID_LAST) 2645 printf("Unknown ID\n"); 2646 else 2647 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2648 2649 bzero(&string, sizeof(string)); 2650 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2651 i2cd.offset = i; 2652 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2653 goto fail; 2654 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2655 } 2656 printf("Vendor %s\n", string); 2657 2658 bzero(&string, sizeof(string)); 2659 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2660 i2cd.offset = i; 2661 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2662 goto fail; 2663 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2664 } 2665 printf("SN %s\n", string); 2666 2667 bzero(&string, sizeof(string)); 2668 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2669 i2cd.offset = i; 2670 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2671 goto fail; 2672 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2673 } 2674 printf("PN %s\n", string); 2675 2676 bzero(&string, sizeof(string)); 2677 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2678 i2cd.offset = i; 2679 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2680 goto fail; 2681 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2682 } 2683 printf("Rev %s\n", string); 2684 2685 i2cd.offset = SFF_8472_DIAG_TYPE; 2686 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2687 goto fail; 2688 2689 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2690 SFF_8472_DIAG_INTERNAL)) { 2691 2692 /* Switch to reading from the Diagnostic address. */ 2693 i2cd.dev_addr = SFF_8472_DIAG; 2694 i2cd.len = 1; 2695 2696 i2cd.offset = SFF_8472_TEMP; 2697 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2698 goto fail; 2699 temp = i2cd.data[0] << 8; 2700 printf("Temp: "); 2701 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2702 printf("-"); 2703 else 2704 printf("+"); 2705 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2706 SFF_8472_TEMP_SHIFT); 2707 2708 i2cd.offset = SFF_8472_VCC; 2709 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2710 goto fail; 2711 vcc = i2cd.data[0] << 8; 2712 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2713 2714 i2cd.offset = SFF_8472_TX_BIAS; 2715 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2716 goto fail; 2717 tx_bias = i2cd.data[0] << 8; 2718 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2719 2720 i2cd.offset = SFF_8472_TX_POWER; 2721 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2722 goto fail; 2723 tx_power = i2cd.data[0] << 8; 2724 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2725 2726 i2cd.offset = SFF_8472_RX_POWER; 2727 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2728 goto fail; 2729 rx_power = i2cd.data[0] << 8; 2730 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2731 2732 } else 2733 printf("Diagnostics not supported.\n"); 2734 2735 return(0); 2736 2737 fail: 2738 if (rc == EPERM) 2739 warnx("No module/cable in port %ld", port); 2740 return (rc); 2741 2742 } 2743 2744 /* XXX: pass in a low/high and do range checks as well */ 2745 static int 2746 get_sched_param(const char *param, const char *args[], long *val) 2747 { 2748 char *p; 2749 2750 if (strcmp(param, args[0]) != 0) 2751 return (EINVAL); 2752 2753 p = str_to_number(args[1], val, NULL); 2754 if (*p) { 2755 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2756 args[1]); 2757 return (EINVAL); 2758 } 2759 2760 return (0); 2761 } 2762 2763 static int 2764 sched_class(int argc, const char *argv[]) 2765 { 2766 struct t4_sched_params op; 2767 int errs, i; 2768 2769 memset(&op, 0xff, sizeof(op)); 2770 op.subcmd = -1; 2771 op.type = -1; 2772 if (argc == 0) { 2773 warnx("missing scheduling sub-command"); 2774 return (EINVAL); 2775 } 2776 if (!strcmp(argv[0], "config")) { 2777 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2778 op.u.config.minmax = -1; 2779 } else if (!strcmp(argv[0], "params")) { 2780 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2781 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2782 op.u.params.ratemode = op.u.params.channel = 2783 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2784 op.u.params.weight = op.u.params.pktsize = -1; 2785 } else { 2786 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2787 return (EINVAL); 2788 } 2789 2790 /* Decode remaining arguments ... */ 2791 errs = 0; 2792 for (i = 1; i < argc; i += 2) { 2793 const char **args = &argv[i]; 2794 long l; 2795 2796 if (i + 1 == argc) { 2797 warnx("missing argument for \"%s\"", args[0]); 2798 errs++; 2799 break; 2800 } 2801 2802 if (!strcmp(args[0], "type")) { 2803 if (!strcmp(args[1], "packet")) 2804 op.type = SCHED_CLASS_TYPE_PACKET; 2805 else { 2806 warnx("invalid type parameter \"%s\"", args[1]); 2807 errs++; 2808 } 2809 2810 continue; 2811 } 2812 2813 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2814 if(!get_sched_param("minmax", args, &l)) 2815 op.u.config.minmax = (int8_t)l; 2816 else { 2817 warnx("unknown scheduler config parameter " 2818 "\"%s\"", args[0]); 2819 errs++; 2820 } 2821 2822 continue; 2823 } 2824 2825 /* Rest applies only to SUBCMD_PARAMS */ 2826 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2827 continue; 2828 2829 if (!strcmp(args[0], "level")) { 2830 if (!strcmp(args[1], "cl-rl")) 2831 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2832 else if (!strcmp(args[1], "cl-wrr")) 2833 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2834 else if (!strcmp(args[1], "ch-rl")) 2835 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2836 else { 2837 warnx("invalid level parameter \"%s\"", 2838 args[1]); 2839 errs++; 2840 } 2841 } else if (!strcmp(args[0], "mode")) { 2842 if (!strcmp(args[1], "class")) 2843 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2844 else if (!strcmp(args[1], "flow")) 2845 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2846 else { 2847 warnx("invalid mode parameter \"%s\"", args[1]); 2848 errs++; 2849 } 2850 } else if (!strcmp(args[0], "rate-unit")) { 2851 if (!strcmp(args[1], "bits")) 2852 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2853 else if (!strcmp(args[1], "pkts")) 2854 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2855 else { 2856 warnx("invalid rate-unit parameter \"%s\"", 2857 args[1]); 2858 errs++; 2859 } 2860 } else if (!strcmp(args[0], "rate-mode")) { 2861 if (!strcmp(args[1], "relative")) 2862 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2863 else if (!strcmp(args[1], "absolute")) 2864 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2865 else { 2866 warnx("invalid rate-mode parameter \"%s\"", 2867 args[1]); 2868 errs++; 2869 } 2870 } else if (!get_sched_param("channel", args, &l)) 2871 op.u.params.channel = (int8_t)l; 2872 else if (!get_sched_param("class", args, &l)) 2873 op.u.params.cl = (int8_t)l; 2874 else if (!get_sched_param("min-rate", args, &l)) 2875 op.u.params.minrate = (int32_t)l; 2876 else if (!get_sched_param("max-rate", args, &l)) 2877 op.u.params.maxrate = (int32_t)l; 2878 else if (!get_sched_param("weight", args, &l)) 2879 op.u.params.weight = (int16_t)l; 2880 else if (!get_sched_param("pkt-size", args, &l)) 2881 op.u.params.pktsize = (int16_t)l; 2882 else { 2883 warnx("unknown scheduler parameter \"%s\"", args[0]); 2884 errs++; 2885 } 2886 } 2887 2888 /* 2889 * Catch some logical fallacies in terms of argument combinations here 2890 * so we can offer more than just the EINVAL return from the driver. 2891 * The driver will be able to catch a lot more issues since it knows 2892 * the specifics of the device hardware capabilities like how many 2893 * channels, classes, etc. the device supports. 2894 */ 2895 if (op.type < 0) { 2896 warnx("sched \"type\" parameter missing"); 2897 errs++; 2898 } 2899 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2900 if (op.u.config.minmax < 0) { 2901 warnx("sched config \"minmax\" parameter missing"); 2902 errs++; 2903 } 2904 } 2905 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2906 if (op.u.params.level < 0) { 2907 warnx("sched params \"level\" parameter missing"); 2908 errs++; 2909 } 2910 if (op.u.params.mode < 0 && 2911 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2912 warnx("sched params \"mode\" parameter missing"); 2913 errs++; 2914 } 2915 if (op.u.params.rateunit < 0 && 2916 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2917 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2918 warnx("sched params \"rate-unit\" parameter missing"); 2919 errs++; 2920 } 2921 if (op.u.params.ratemode < 0 && 2922 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2923 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2924 warnx("sched params \"rate-mode\" parameter missing"); 2925 errs++; 2926 } 2927 if (op.u.params.channel < 0) { 2928 warnx("sched params \"channel\" missing"); 2929 errs++; 2930 } 2931 if (op.u.params.cl < 0 && 2932 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2933 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) { 2934 warnx("sched params \"class\" missing"); 2935 errs++; 2936 } 2937 if (op.u.params.maxrate < 0 && 2938 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2939 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2940 warnx("sched params \"max-rate\" missing for " 2941 "rate-limit level"); 2942 errs++; 2943 } 2944 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR && 2945 (op.u.params.weight < 1 || op.u.params.weight > 99)) { 2946 warnx("sched params \"weight\" missing or invalid " 2947 "(not 1-99) for weighted-round-robin level"); 2948 errs++; 2949 } 2950 if (op.u.params.pktsize < 0 && 2951 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2952 warnx("sched params \"pkt-size\" missing for " 2953 "rate-limit level"); 2954 errs++; 2955 } 2956 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2957 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2958 warnx("sched params mode flow needs rate-mode absolute"); 2959 errs++; 2960 } 2961 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2962 !in_range(op.u.params.maxrate, 1, 100)) { 2963 warnx("sched params \"max-rate\" takes " 2964 "percentage value(1-100) for rate-mode relative"); 2965 errs++; 2966 } 2967 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2968 !in_range(op.u.params.maxrate, 1, 100000000)) { 2969 warnx("sched params \"max-rate\" takes " 2970 "value(1-100000000) for rate-mode absolute"); 2971 errs++; 2972 } 2973 if (op.u.params.maxrate > 0 && 2974 op.u.params.maxrate < op.u.params.minrate) { 2975 warnx("sched params \"max-rate\" is less than " 2976 "\"min-rate\""); 2977 errs++; 2978 } 2979 } 2980 2981 if (errs > 0) { 2982 warnx("%d error%s in sched-class command", errs, 2983 errs == 1 ? "" : "s"); 2984 return (EINVAL); 2985 } 2986 2987 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2988 } 2989 2990 static int 2991 sched_queue(int argc, const char *argv[]) 2992 { 2993 struct t4_sched_queue op = {0}; 2994 char *p; 2995 long val; 2996 2997 if (argc != 3) { 2998 /* need "<port> <queue> <class> */ 2999 warnx("incorrect number of arguments."); 3000 return (EINVAL); 3001 } 3002 3003 p = str_to_number(argv[0], &val, NULL); 3004 if (*p || val > UCHAR_MAX) { 3005 warnx("invalid port id \"%s\"", argv[0]); 3006 return (EINVAL); 3007 } 3008 op.port = (uint8_t)val; 3009 3010 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 3011 op.queue = -1; 3012 else { 3013 p = str_to_number(argv[1], &val, NULL); 3014 if (*p || val < -1) { 3015 warnx("invalid queue \"%s\"", argv[1]); 3016 return (EINVAL); 3017 } 3018 op.queue = (int8_t)val; 3019 } 3020 3021 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 3022 op.cl = -1; 3023 else { 3024 p = str_to_number(argv[2], &val, NULL); 3025 if (*p || val < -1) { 3026 warnx("invalid class \"%s\"", argv[2]); 3027 return (EINVAL); 3028 } 3029 op.cl = (int8_t)val; 3030 } 3031 3032 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 3033 } 3034 3035 static int 3036 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 3037 int *pneg, struct offload_settings *os) 3038 { 3039 3040 while (*s == '!') { 3041 (*pneg)++; 3042 s++; 3043 } 3044 3045 if (!strcmp(s, "not")) { 3046 (*pneg)++; 3047 return (0); 3048 } 3049 3050 if (!strcmp(s, "offload")) { 3051 os->offload = (*pneg + 1) & 1; 3052 *pneg = 0; 3053 } else if (!strcmp(s , "coalesce")) { 3054 os->rx_coalesce = (*pneg + 1) & 1; 3055 *pneg = 0; 3056 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3057 os->tstamp = (*pneg + 1) & 1; 3058 *pneg = 0; 3059 } else if (!strcmp(s, "sack")) { 3060 os->sack = (*pneg + 1) & 1; 3061 *pneg = 0; 3062 } else if (!strcmp(s, "nagle")) { 3063 os->nagle = (*pneg + 1) & 1; 3064 *pneg = 0; 3065 } else if (!strcmp(s, "ecn")) { 3066 os->ecn = (*pneg + 1) & 1; 3067 *pneg = 0; 3068 } else if (!strcmp(s, "ddp")) { 3069 os->ddp = (*pneg + 1) & 1; 3070 *pneg = 0; 3071 } else if (!strcmp(s, "tls")) { 3072 os->tls = (*pneg + 1) & 1; 3073 *pneg = 0; 3074 } else { 3075 char *param, *p; 3076 long val; 3077 3078 /* Settings with additional parameter handled here. */ 3079 3080 if (*pneg) { 3081 warnx("\"%s\" is not a valid keyword, or it does not " 3082 "support negation.", s); 3083 return (EINVAL); 3084 } 3085 3086 while ((param = strsep(pnext, ws)) != NULL) { 3087 if (*param != '\0') 3088 break; 3089 } 3090 if (param == NULL) { 3091 warnx("\"%s\" is not a valid keyword, or it requires a " 3092 "parameter that has not been provided.", s); 3093 return (EINVAL); 3094 } 3095 3096 if (!strcmp(s, "cong")) { 3097 if (!strcmp(param, "reno")) 3098 os->cong_algo = 0; 3099 else if (!strcmp(param, "tahoe")) 3100 os->cong_algo = 1; 3101 else if (!strcmp(param, "newreno")) 3102 os->cong_algo = 2; 3103 else if (!strcmp(param, "highspeed")) 3104 os->cong_algo = 3; 3105 else { 3106 warnx("unknown congestion algorithm \"%s\".", s); 3107 return (EINVAL); 3108 } 3109 } else if (!strcmp(s, "class")) { 3110 val = -1; 3111 p = str_to_number(param, &val, NULL); 3112 /* (nsched_cls - 1) is spelled 15 here. */ 3113 if (*p || val < 0 || val > 15) { 3114 warnx("invalid scheduling class \"%s\". " 3115 "\"class\" needs an integer value where " 3116 "0 <= value <= 15", param); 3117 return (EINVAL); 3118 } 3119 os->sched_class = val; 3120 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3121 !strcmp(s, "rxq")) { 3122 if (!strcmp(param, "random")) { 3123 val = QUEUE_RANDOM; 3124 } else if (!strcmp(param, "roundrobin")) { 3125 val = QUEUE_ROUNDROBIN; 3126 } else { 3127 p = str_to_number(param, &val, NULL); 3128 if (*p || val < 0 || val > 0xffff) { 3129 warnx("invalid queue specification " 3130 "\"%s\". \"%s\" needs an integer" 3131 " value, \"random\", or " 3132 "\"roundrobin\".", param, s); 3133 return (EINVAL); 3134 } 3135 } 3136 if (!strcmp(s, "bind")) { 3137 os->txq = val; 3138 os->rxq = val; 3139 } else if (!strcmp(s, "txq")) { 3140 os->txq = val; 3141 } else if (!strcmp(s, "rxq")) { 3142 os->rxq = val; 3143 } else { 3144 return (EDOOFUS); 3145 } 3146 } else if (!strcmp(s, "mss")) { 3147 val = -1; 3148 p = str_to_number(param, &val, NULL); 3149 if (*p || val <= 0) { 3150 warnx("invalid MSS specification \"%s\". " 3151 "\"mss\" needs a positive integer value", 3152 param); 3153 return (EINVAL); 3154 } 3155 os->mss = val; 3156 } else { 3157 warnx("unknown settings keyword: \"%s\"", s); 3158 return (EINVAL); 3159 } 3160 } 3161 3162 return (0); 3163 } 3164 3165 static int 3166 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3167 { 3168 const char *ws = " \f\n\r\v\t"; 3169 char *settings, *s, *next; 3170 int rc, nsettings, neg; 3171 static const struct offload_settings default_settings = { 3172 .offload = 0, /* No settings imply !offload */ 3173 .rx_coalesce = -1, 3174 .cong_algo = -1, 3175 .sched_class = -1, 3176 .tstamp = -1, 3177 .sack = -1, 3178 .nagle = -1, 3179 .ecn = -1, 3180 .ddp = -1, 3181 .tls = -1, 3182 .txq = QUEUE_RANDOM, 3183 .rxq = QUEUE_RANDOM, 3184 .mss = -1, 3185 }; 3186 3187 *os = default_settings; 3188 3189 next = settings = strdup(settings_ro); 3190 if (settings == NULL) { 3191 warn (NULL); 3192 return (errno); 3193 } 3194 3195 nsettings = 0; 3196 rc = 0; 3197 neg = 0; 3198 while ((s = strsep(&next, ws)) != NULL) { 3199 if (*s == '\0') 3200 continue; 3201 nsettings++; 3202 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3203 if (rc != 0) 3204 goto done; 3205 } 3206 if (nsettings == 0) { 3207 warnx("no settings provided"); 3208 rc = EINVAL; 3209 goto done; 3210 } 3211 if (neg > 0) { 3212 warnx("%d stray negation(s) at end of offload settings", neg); 3213 rc = EINVAL; 3214 goto done; 3215 } 3216 done: 3217 free(settings); 3218 return (rc); 3219 } 3220 3221 static int 3222 isempty_line(char *line, size_t llen) 3223 { 3224 3225 /* skip leading whitespace */ 3226 while (isspace(*line)) { 3227 line++; 3228 llen--; 3229 } 3230 if (llen == 0 || *line == '#' || *line == '\n') 3231 return (1); 3232 3233 return (0); 3234 } 3235 3236 static int 3237 special_offload_rule(char *str) 3238 { 3239 3240 /* skip leading whitespaces */ 3241 while (isspace(*str)) 3242 str++; 3243 3244 /* check for special strings: "-", "all", "any" */ 3245 if (*str == '-') { 3246 str++; 3247 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3248 str += 3; 3249 } else { 3250 return (0); 3251 } 3252 3253 /* skip trailing whitespaces */ 3254 while (isspace(*str)) 3255 str++; 3256 3257 return (*str == '\0'); 3258 } 3259 3260 /* 3261 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3262 * 3263 * [<open-type>] <expr> => <settings> 3264 */ 3265 static int 3266 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3267 struct offload_rule *r) 3268 { 3269 char *expr, *settings, *s; 3270 3271 bzero(r, sizeof(*r)); 3272 3273 /* Skip leading whitespace. */ 3274 while (isspace(*line)) 3275 line++; 3276 /* Trim trailing whitespace */ 3277 s = &line[llen - 1]; 3278 while (isspace(*s)) { 3279 *s-- = '\0'; 3280 llen--; 3281 } 3282 3283 /* 3284 * First part of the rule: '[X]' where X = A/D/L/P 3285 */ 3286 if (*line++ != '[') { 3287 warnx("missing \"[\" on line %zd", lno); 3288 return (EINVAL); 3289 } 3290 switch (*line) { 3291 case 'A': 3292 case 'D': 3293 case 'L': 3294 case 'P': 3295 r->open_type = *line; 3296 break; 3297 default: 3298 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3299 return (EINVAL); 3300 } 3301 line++; 3302 if (*line++ != ']') { 3303 warnx("missing \"]\" after \"[%c\" on line %zd", 3304 r->open_type, lno); 3305 return (EINVAL); 3306 } 3307 3308 /* Skip whitespace. */ 3309 while (isspace(*line)) 3310 line++; 3311 3312 /* 3313 * Rest of the rule: <expr> => <settings> 3314 */ 3315 expr = line; 3316 s = strstr(line, "=>"); 3317 if (s == NULL) 3318 return (EINVAL); 3319 settings = s + 2; 3320 while (isspace(*settings)) 3321 settings++; 3322 *s = '\0'; 3323 3324 /* 3325 * <expr> is either a special name (all, any) or a pcap-filter(7). 3326 * In case of a special name the bpf_prog stays all-zero. 3327 */ 3328 if (!special_offload_rule(expr)) { 3329 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3330 PCAP_NETMASK_UNKNOWN) < 0) { 3331 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3332 lno, pcap_geterr(pd)); 3333 return (EINVAL); 3334 } 3335 } 3336 3337 /* settings to apply on a match. */ 3338 if (parse_offload_settings(settings, &r->settings) != 0) { 3339 warnx("failed to parse offload settings \"%s\" on line %zd", 3340 settings, lno); 3341 pcap_freecode(&r->bpf_prog); 3342 return (EINVAL); 3343 } 3344 3345 return (0); 3346 3347 } 3348 3349 /* 3350 * Note that op itself is not dynamically allocated. 3351 */ 3352 static void 3353 free_offload_policy(struct t4_offload_policy *op) 3354 { 3355 int i; 3356 3357 for (i = 0; i < op->nrules; i++) { 3358 /* 3359 * pcap_freecode can cope with empty bpf_prog, which is the case 3360 * for an rule that matches on 'any/all/-'. 3361 */ 3362 pcap_freecode(&op->rule[i].bpf_prog); 3363 } 3364 free(op->rule); 3365 op->nrules = 0; 3366 op->rule = NULL; 3367 } 3368 3369 #define REALLOC_STRIDE 32 3370 3371 /* 3372 * Fills up op->nrules and op->rule. 3373 */ 3374 static int 3375 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3376 { 3377 FILE *fp; 3378 char *line; 3379 int lno, maxrules, rc; 3380 size_t lcap, llen; 3381 struct offload_rule *r; 3382 pcap_t *pd; 3383 3384 fp = fopen(fname, "r"); 3385 if (fp == NULL) { 3386 warn("Unable to open file \"%s\"", fname); 3387 return (errno); 3388 } 3389 pd = pcap_open_dead(DLT_EN10MB, 128); 3390 if (pd == NULL) { 3391 warnx("Failed to open pcap device"); 3392 fclose(fp); 3393 return (EIO); 3394 } 3395 3396 rc = 0; 3397 lno = 0; 3398 lcap = 0; 3399 maxrules = 0; 3400 op->nrules = 0; 3401 op->rule = NULL; 3402 line = NULL; 3403 3404 while ((llen = getline(&line, &lcap, fp)) != -1) { 3405 lno++; 3406 3407 /* Skip empty lines. */ 3408 if (isempty_line(line, llen)) 3409 continue; 3410 3411 if (op->nrules == maxrules) { 3412 maxrules += REALLOC_STRIDE; 3413 r = realloc(op->rule, 3414 maxrules * sizeof(struct offload_rule)); 3415 if (r == NULL) { 3416 warnx("failed to allocate memory for %d rules", 3417 maxrules); 3418 rc = ENOMEM; 3419 goto done; 3420 } 3421 op->rule = r; 3422 } 3423 3424 r = &op->rule[op->nrules]; 3425 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3426 if (rc != 0) { 3427 warnx("Error parsing line %d of \"%s\"", lno, fname); 3428 goto done; 3429 } 3430 3431 op->nrules++; 3432 } 3433 free(line); 3434 3435 if (!feof(fp)) { 3436 warn("Error while reading from file \"%s\" at line %d", 3437 fname, lno); 3438 rc = errno; 3439 goto done; 3440 } 3441 3442 if (op->nrules == 0) { 3443 warnx("No valid rules found in \"%s\"", fname); 3444 rc = EINVAL; 3445 } 3446 done: 3447 pcap_close(pd); 3448 fclose(fp); 3449 if (rc != 0) { 3450 free_offload_policy(op); 3451 } 3452 3453 return (rc); 3454 } 3455 3456 static int 3457 load_offload_policy(int argc, const char *argv[]) 3458 { 3459 int rc = 0; 3460 const char *fname = argv[0]; 3461 struct t4_offload_policy op = {0}; 3462 3463 if (argc != 1) { 3464 warnx("incorrect number of arguments."); 3465 return (EINVAL); 3466 } 3467 3468 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3469 /* op.nrules is 0 and that means clear policy */ 3470 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3471 } 3472 3473 rc = parse_offload_policy(fname, &op); 3474 if (rc != 0) { 3475 /* Error message displayed already */ 3476 return (EINVAL); 3477 } 3478 3479 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3480 free_offload_policy(&op); 3481 3482 return (rc); 3483 } 3484 3485 static int 3486 display_clip(void) 3487 { 3488 size_t clip_buf_size = 4096; 3489 char *buf, name[32]; 3490 int rc; 3491 3492 buf = malloc(clip_buf_size); 3493 if (buf == NULL) { 3494 warn("%s", __func__); 3495 return (errno); 3496 } 3497 3498 snprintf(name, sizeof(name), "dev.t%unex.%u.misc.clip", chip_id, inst); 3499 rc = sysctlbyname(name, buf, &clip_buf_size, NULL, 0); 3500 if (rc != 0) { 3501 warn("sysctl %s", name); 3502 free(buf); 3503 return (errno); 3504 } 3505 3506 printf("%s\n", buf); 3507 free(buf); 3508 return (0); 3509 } 3510 3511 static int 3512 clip_cmd(int argc, const char *argv[]) 3513 { 3514 int rc, af = AF_INET6, add; 3515 struct t4_clip_addr ca = {0}; 3516 3517 if (argc == 1 && !strcmp(argv[0], "list")) { 3518 rc = display_clip(); 3519 return (rc); 3520 } 3521 3522 if (argc != 2) { 3523 warnx("incorrect number of arguments."); 3524 return (EINVAL); 3525 } 3526 3527 if (!strcmp(argv[0], "hold")) { 3528 add = 1; 3529 } else if (!strcmp(argv[0], "rel") || !strcmp(argv[0], "release")) { 3530 add = 0; 3531 } else { 3532 warnx("first argument must be \"hold\" or \"release\""); 3533 return (EINVAL); 3534 } 3535 3536 rc = parse_ipaddr(argv[0], argv, &af, &ca.addr[0], &ca.mask[0], 1); 3537 if (rc != 0) 3538 return (rc); 3539 3540 if (add) 3541 rc = doit(CHELSIO_T4_HOLD_CLIP_ADDR, &ca); 3542 else 3543 rc = doit(CHELSIO_T4_RELEASE_CLIP_ADDR, &ca); 3544 3545 return (rc); 3546 } 3547 3548 static int 3549 run_cmd(int argc, const char *argv[]) 3550 { 3551 int rc = -1; 3552 const char *cmd = argv[0]; 3553 3554 /* command */ 3555 argc--; 3556 argv++; 3557 3558 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3559 rc = register_io(argc, argv, 4); 3560 else if (!strcmp(cmd, "reg64")) 3561 rc = register_io(argc, argv, 8); 3562 else if (!strcmp(cmd, "regdump")) 3563 rc = dump_regs(argc, argv); 3564 else if (!strcmp(cmd, "filter")) 3565 rc = filter_cmd(argc, argv, 0); 3566 else if (!strcmp(cmd, "context")) 3567 rc = get_sge_context(argc, argv); 3568 else if (!strcmp(cmd, "loadfw")) 3569 rc = loadfw(argc, argv); 3570 else if (!strcmp(cmd, "memdump")) 3571 rc = memdump(argc, argv); 3572 else if (!strcmp(cmd, "tcb")) 3573 rc = read_tcb(argc, argv); 3574 else if (!strcmp(cmd, "i2c")) 3575 rc = read_i2c(argc, argv); 3576 else if (!strcmp(cmd, "clearstats")) 3577 rc = clearstats(argc, argv); 3578 else if (!strcmp(cmd, "tracer")) 3579 rc = tracer_cmd(argc, argv); 3580 else if (!strcmp(cmd, "modinfo")) 3581 rc = modinfo(argc, argv); 3582 else if (!strcmp(cmd, "sched-class")) 3583 rc = sched_class(argc, argv); 3584 else if (!strcmp(cmd, "sched-queue")) 3585 rc = sched_queue(argc, argv); 3586 else if (!strcmp(cmd, "loadcfg")) 3587 rc = loadcfg(argc, argv); 3588 else if (!strcmp(cmd, "loadboot")) 3589 rc = loadboot(argc, argv); 3590 else if (!strcmp(cmd, "loadboot-cfg")) 3591 rc = loadbootcfg(argc, argv); 3592 else if (!strcmp(cmd, "dumpstate")) 3593 rc = dumpstate(argc, argv); 3594 else if (!strcmp(cmd, "policy")) 3595 rc = load_offload_policy(argc, argv); 3596 else if (!strcmp(cmd, "hashfilter")) 3597 rc = filter_cmd(argc, argv, 1); 3598 else if (!strcmp(cmd, "clip")) 3599 rc = clip_cmd(argc, argv); 3600 else { 3601 rc = EINVAL; 3602 warnx("invalid command \"%s\"", cmd); 3603 } 3604 3605 return (rc); 3606 } 3607 3608 #define MAX_ARGS 15 3609 static int 3610 run_cmd_loop(void) 3611 { 3612 int i, rc = 0; 3613 char buffer[128], *buf; 3614 const char *args[MAX_ARGS + 1]; 3615 3616 /* 3617 * Simple loop: displays a "> " prompt and processes any input as a 3618 * cxgbetool command. You're supposed to enter only the part after 3619 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3620 */ 3621 for (;;) { 3622 fprintf(stdout, "> "); 3623 fflush(stdout); 3624 buf = fgets(buffer, sizeof(buffer), stdin); 3625 if (buf == NULL) { 3626 if (ferror(stdin)) { 3627 warn("stdin error"); 3628 rc = errno; /* errno from fgets */ 3629 } 3630 break; 3631 } 3632 3633 i = 0; 3634 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3635 if (args[i][0] != 0 && ++i == MAX_ARGS) 3636 break; 3637 } 3638 args[i] = 0; 3639 3640 if (i == 0) 3641 continue; /* skip empty line */ 3642 3643 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3644 break; 3645 3646 rc = run_cmd(i, args); 3647 } 3648 3649 /* rc normally comes from the last command (not including quit/exit) */ 3650 return (rc); 3651 } 3652 3653 static void 3654 parse_nexus_name(const char *s) 3655 { 3656 char junk; 3657 3658 if (sscanf(s, "t%unex%u%c", &chip_id, &inst, &junk) != 2) 3659 errx(EINVAL, "invalid nexus \"%s\"", s); 3660 nexus = s; 3661 } 3662 3663 int 3664 main(int argc, const char *argv[]) 3665 { 3666 int rc = -1; 3667 3668 progname = argv[0]; 3669 3670 if (argc == 2) { 3671 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3672 usage(stdout); 3673 exit(0); 3674 } 3675 } 3676 3677 if (argc < 3) { 3678 usage(stderr); 3679 exit(EINVAL); 3680 } 3681 3682 parse_nexus_name(argv[1]); 3683 3684 /* progname and nexus */ 3685 argc -= 2; 3686 argv += 2; 3687 3688 if (argc == 1 && !strcmp(argv[0], "stdio")) 3689 rc = run_cmd_loop(); 3690 else 3691 rc = run_cmd(argc, argv); 3692 3693 return (rc); 3694 } 3695