1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/ioctl.h> 33 #include <sys/mman.h> 34 #include <sys/socket.h> 35 #include <sys/stat.h> 36 #include <sys/sysctl.h> 37 38 #include <arpa/inet.h> 39 #include <net/ethernet.h> 40 #include <net/sff8472.h> 41 #include <netinet/in.h> 42 43 #include <ctype.h> 44 #include <err.h> 45 #include <errno.h> 46 #include <fcntl.h> 47 #include <limits.h> 48 #include <stdint.h> 49 #include <stdio.h> 50 #include <stdlib.h> 51 #include <string.h> 52 #include <unistd.h> 53 #include <pcap.h> 54 55 #include "t4_ioctl.h" 56 #include "tcb_common.h" 57 58 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 59 #define max(x, y) ((x) > (y) ? (x) : (y)) 60 61 static const char *progname, *nexus; 62 static int chip_id; /* 4 for T4, 5 for T5, and so on. */ 63 static int inst; /* instance of nexus device */ 64 65 struct reg_info { 66 const char *name; 67 uint32_t addr; 68 uint32_t len; 69 }; 70 71 struct mod_regs { 72 const char *name; 73 const struct reg_info *ri; 74 }; 75 76 struct field_desc { 77 const char *name; /* Field name */ 78 unsigned short start; /* Start bit position */ 79 unsigned short end; /* End bit position */ 80 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 81 unsigned char hex; /* Print field in hex instead of decimal */ 82 unsigned char islog2; /* Field contains the base-2 log of the value */ 83 }; 84 85 #include "reg_defs_t4.c" 86 #include "reg_defs_t5.c" 87 #include "reg_defs_t6.c" 88 #include "reg_defs_t4vf.c" 89 90 static void 91 usage(FILE *fp) 92 { 93 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 94 fprintf(fp, 95 "\tclearstats <port> clear port statistics\n" 96 "\tclip hold|release <ip6> hold/release an address\n" 97 "\tclip list list the CLIP table\n" 98 "\tcontext <type> <id> show an SGE context\n" 99 "\tdumpstate <dump.bin> dump chip state\n" 100 "\tfilter <idx> [<param> <val>] ... set a filter\n" 101 "\tfilter <idx> delete|clear [prio 1] delete a filter\n" 102 "\tfilter list list all filters\n" 103 "\tfilter mode [<match>] ... get/set global filter mode\n" 104 "\thashfilter [<param> <val>] ... set a hashfilter\n" 105 "\thashfilter <idx> delete|clear delete a hashfilter\n" 106 "\thashfilter list list all hashfilters\n" 107 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n" 108 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 109 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 110 "\tloadboot clear [pf|offset <val>] remove boot image\n" 111 "\tloadboot-cfg <bc.bin> install boot config\n" 112 "\tloadboot-cfg clear remove boot config\n" 113 "\tloadcfg <fw-config.txt> install configuration file\n" 114 "\tloadcfg clear remove configuration file\n" 115 "\tloadfw <fw-image.bin> install firmware\n" 116 "\tmemdump <addr> <len> dump a memory range\n" 117 "\tmodinfo <port> [raw] optics/cable information\n" 118 "\tpolicy <policy.txt> install offload policy\n" 119 "\tpolicy clear remove offload policy\n" 120 "\treg <address>[=<val>] read/write register\n" 121 "\treg64 <address>[=<val>] read/write 64 bit register\n" 122 "\tregdump [<module>] ... dump registers\n" 123 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 124 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 125 "\tstdio interactive mode\n" 126 "\ttcb <tid> read TCB\n" 127 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 128 "\ttracer <idx> disable|enable disable or enable a tracer\n" 129 "\ttracer list list all tracers\n" 130 ); 131 } 132 133 static inline unsigned int 134 get_card_vers(unsigned int version) 135 { 136 return (version & 0x3ff); 137 } 138 139 static int 140 real_doit(unsigned long cmd, void *data, const char *cmdstr) 141 { 142 static int fd = -1; 143 int rc = 0; 144 145 if (fd == -1) { 146 char buf[64]; 147 148 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 149 if ((fd = open(buf, O_RDWR)) < 0) { 150 warn("open(%s)", nexus); 151 rc = errno; 152 return (rc); 153 } 154 } 155 156 rc = ioctl(fd, cmd, data); 157 if (rc < 0) { 158 warn("%s", cmdstr); 159 rc = errno; 160 } 161 162 return (rc); 163 } 164 #define doit(x, y) real_doit(x, y, #x) 165 166 static char * 167 str_to_number(const char *s, long *val, long long *vall) 168 { 169 char *p; 170 171 if (vall) 172 *vall = strtoll(s, &p, 0); 173 else if (val) 174 *val = strtol(s, &p, 0); 175 else 176 p = NULL; 177 178 return (p); 179 } 180 181 static int 182 read_reg(long addr, int size, long long *val) 183 { 184 struct t4_reg reg; 185 int rc; 186 187 reg.addr = (uint32_t) addr; 188 reg.size = (uint32_t) size; 189 reg.val = 0; 190 191 rc = doit(CHELSIO_T4_GETREG, ®); 192 193 *val = reg.val; 194 195 return (rc); 196 } 197 198 static int 199 write_reg(long addr, int size, long long val) 200 { 201 struct t4_reg reg; 202 203 reg.addr = (uint32_t) addr; 204 reg.size = (uint32_t) size; 205 reg.val = (uint64_t) val; 206 207 return doit(CHELSIO_T4_SETREG, ®); 208 } 209 210 static int 211 register_io(int argc, const char *argv[], int size) 212 { 213 char *p, *v; 214 long addr; 215 long long val; 216 int w = 0, rc; 217 218 if (argc == 1) { 219 /* <reg> OR <reg>=<value> */ 220 221 p = str_to_number(argv[0], &addr, NULL); 222 if (*p) { 223 if (*p != '=') { 224 warnx("invalid register \"%s\"", argv[0]); 225 return (EINVAL); 226 } 227 228 w = 1; 229 v = p + 1; 230 p = str_to_number(v, NULL, &val); 231 232 if (*p) { 233 warnx("invalid value \"%s\"", v); 234 return (EINVAL); 235 } 236 } 237 238 } else if (argc == 2) { 239 /* <reg> <value> */ 240 241 w = 1; 242 243 p = str_to_number(argv[0], &addr, NULL); 244 if (*p) { 245 warnx("invalid register \"%s\"", argv[0]); 246 return (EINVAL); 247 } 248 249 p = str_to_number(argv[1], NULL, &val); 250 if (*p) { 251 warnx("invalid value \"%s\"", argv[1]); 252 return (EINVAL); 253 } 254 } else { 255 warnx("reg: invalid number of arguments (%d)", argc); 256 return (EINVAL); 257 } 258 259 if (w) 260 rc = write_reg(addr, size, val); 261 else { 262 rc = read_reg(addr, size, &val); 263 if (rc == 0) 264 printf("0x%llx [%llu]\n", val, val); 265 } 266 267 return (rc); 268 } 269 270 static inline uint32_t 271 xtract(uint32_t val, int shift, int len) 272 { 273 return (val >> shift) & ((1 << len) - 1); 274 } 275 276 static int 277 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 278 { 279 uint32_t reg_val = 0; 280 281 for ( ; reg_array->name; ++reg_array) 282 if (!reg_array->len) { 283 reg_val = regs[reg_array->addr / 4]; 284 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 285 reg_array->name, reg_val, reg_val); 286 } else { 287 uint32_t v = xtract(reg_val, reg_array->addr, 288 reg_array->len); 289 290 printf(" %*u:%u %-47s %#-10x %u\n", 291 reg_array->addr < 10 ? 3 : 2, 292 reg_array->addr + reg_array->len - 1, 293 reg_array->addr, reg_array->name, v, v); 294 } 295 296 return (1); 297 } 298 299 static int 300 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 301 const struct mod_regs *modtab, int nmodules) 302 { 303 int i, j, match; 304 305 for (i = 0; i < argc; i++) { 306 for (j = 0; j < nmodules; j++) { 307 if (!strcmp(argv[i], modtab[j].name)) 308 break; 309 } 310 311 if (j == nmodules) { 312 warnx("invalid register block \"%s\"", argv[i]); 313 fprintf(stderr, "\nAvailable blocks:"); 314 for ( ; nmodules; nmodules--, modtab++) 315 fprintf(stderr, " %s", modtab->name); 316 fprintf(stderr, "\n"); 317 return (EINVAL); 318 } 319 } 320 321 for ( ; nmodules; nmodules--, modtab++) { 322 323 match = argc == 0 ? 1 : 0; 324 for (i = 0; !match && i < argc; i++) { 325 if (!strcmp(argv[i], modtab->name)) 326 match = 1; 327 } 328 329 if (match) 330 dump_block_regs(modtab->ri, regs); 331 } 332 333 return (0); 334 } 335 336 #define T4_MODREGS(name) { #name, t4_##name##_regs } 337 static int 338 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 339 { 340 static struct mod_regs t4_mod[] = { 341 T4_MODREGS(sge), 342 { "pci", t4_pcie_regs }, 343 T4_MODREGS(dbg), 344 T4_MODREGS(mc), 345 T4_MODREGS(ma), 346 { "edc0", t4_edc_0_regs }, 347 { "edc1", t4_edc_1_regs }, 348 T4_MODREGS(cim), 349 T4_MODREGS(tp), 350 T4_MODREGS(ulp_rx), 351 T4_MODREGS(ulp_tx), 352 { "pmrx", t4_pm_rx_regs }, 353 { "pmtx", t4_pm_tx_regs }, 354 T4_MODREGS(mps), 355 { "cplsw", t4_cpl_switch_regs }, 356 T4_MODREGS(smb), 357 { "i2c", t4_i2cm_regs }, 358 T4_MODREGS(mi), 359 T4_MODREGS(uart), 360 T4_MODREGS(pmu), 361 T4_MODREGS(sf), 362 T4_MODREGS(pl), 363 T4_MODREGS(le), 364 T4_MODREGS(ncsi), 365 T4_MODREGS(xgmac) 366 }; 367 368 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 369 } 370 #undef T4_MODREGS 371 372 #define T5_MODREGS(name) { #name, t5_##name##_regs } 373 static int 374 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 375 { 376 static struct mod_regs t5_mod[] = { 377 T5_MODREGS(sge), 378 { "pci", t5_pcie_regs }, 379 T5_MODREGS(dbg), 380 { "mc0", t5_mc_0_regs }, 381 { "mc1", t5_mc_1_regs }, 382 T5_MODREGS(ma), 383 { "edc0", t5_edc_t50_regs }, 384 { "edc1", t5_edc_t51_regs }, 385 T5_MODREGS(cim), 386 T5_MODREGS(tp), 387 { "ulprx", t5_ulp_rx_regs }, 388 { "ulptx", t5_ulp_tx_regs }, 389 { "pmrx", t5_pm_rx_regs }, 390 { "pmtx", t5_pm_tx_regs }, 391 T5_MODREGS(mps), 392 { "cplsw", t5_cpl_switch_regs }, 393 T5_MODREGS(smb), 394 { "i2c", t5_i2cm_regs }, 395 T5_MODREGS(mi), 396 T5_MODREGS(uart), 397 T5_MODREGS(pmu), 398 T5_MODREGS(sf), 399 T5_MODREGS(pl), 400 T5_MODREGS(le), 401 T5_MODREGS(ncsi), 402 T5_MODREGS(mac), 403 { "hma", t5_hma_t5_regs } 404 }; 405 406 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 407 } 408 #undef T5_MODREGS 409 410 #define T6_MODREGS(name) { #name, t6_##name##_regs } 411 static int 412 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 413 { 414 static struct mod_regs t6_mod[] = { 415 T6_MODREGS(sge), 416 { "pci", t6_pcie_regs }, 417 T6_MODREGS(dbg), 418 { "mc0", t6_mc_0_regs }, 419 T6_MODREGS(ma), 420 { "edc0", t6_edc_t60_regs }, 421 { "edc1", t6_edc_t61_regs }, 422 T6_MODREGS(cim), 423 T6_MODREGS(tp), 424 { "ulprx", t6_ulp_rx_regs }, 425 { "ulptx", t6_ulp_tx_regs }, 426 { "pmrx", t6_pm_rx_regs }, 427 { "pmtx", t6_pm_tx_regs }, 428 T6_MODREGS(mps), 429 { "cplsw", t6_cpl_switch_regs }, 430 T6_MODREGS(smb), 431 { "i2c", t6_i2cm_regs }, 432 T6_MODREGS(mi), 433 T6_MODREGS(uart), 434 T6_MODREGS(pmu), 435 T6_MODREGS(sf), 436 T6_MODREGS(pl), 437 T6_MODREGS(le), 438 T6_MODREGS(ncsi), 439 T6_MODREGS(mac), 440 { "hma", t6_hma_t6_regs } 441 }; 442 443 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 444 } 445 #undef T6_MODREGS 446 447 static int 448 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 449 { 450 static struct mod_regs t4vf_mod[] = { 451 { "sge", t4vf_sge_regs }, 452 { "mps", t4vf_mps_regs }, 453 { "pl", t4vf_pl_regs }, 454 { "mbdata", t4vf_mbdata_regs }, 455 { "cim", t4vf_cim_regs }, 456 }; 457 458 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 459 } 460 461 static int 462 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 463 { 464 static struct mod_regs t5vf_mod[] = { 465 { "sge", t5vf_sge_regs }, 466 { "mps", t4vf_mps_regs }, 467 { "pl", t5vf_pl_regs }, 468 { "mbdata", t4vf_mbdata_regs }, 469 { "cim", t4vf_cim_regs }, 470 }; 471 472 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 473 } 474 475 static int 476 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 477 { 478 static struct mod_regs t6vf_mod[] = { 479 { "sge", t5vf_sge_regs }, 480 { "mps", t4vf_mps_regs }, 481 { "pl", t6vf_pl_regs }, 482 { "mbdata", t4vf_mbdata_regs }, 483 { "cim", t4vf_cim_regs }, 484 }; 485 486 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 487 } 488 489 static int 490 dump_regs(int argc, const char *argv[]) 491 { 492 int vers, revision, rc; 493 struct t4_regdump regs; 494 uint32_t len; 495 496 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 497 regs.data = calloc(1, len); 498 if (regs.data == NULL) { 499 warnc(ENOMEM, "regdump"); 500 return (ENOMEM); 501 } 502 503 regs.len = len; 504 rc = doit(CHELSIO_T4_REGDUMP, ®s); 505 if (rc != 0) 506 return (rc); 507 508 vers = get_card_vers(regs.version); 509 revision = (regs.version >> 10) & 0x3f; 510 511 if (vers == 4) { 512 if (revision == 0x3f) 513 rc = dump_regs_t4vf(argc, argv, regs.data); 514 else 515 rc = dump_regs_t4(argc, argv, regs.data); 516 } else if (vers == 5) { 517 if (revision == 0x3f) 518 rc = dump_regs_t5vf(argc, argv, regs.data); 519 else 520 rc = dump_regs_t5(argc, argv, regs.data); 521 } else if (vers == 6) { 522 if (revision == 0x3f) 523 rc = dump_regs_t6vf(argc, argv, regs.data); 524 else 525 rc = dump_regs_t6(argc, argv, regs.data); 526 } else { 527 warnx("%s (type %d, rev %d) is not a known card.", 528 nexus, vers, revision); 529 return (ENOTSUP); 530 } 531 532 free(regs.data); 533 return (rc); 534 } 535 536 static void 537 do_show_info_header(uint32_t mode) 538 { 539 uint32_t i; 540 541 printf("%4s %8s", "Idx", "Hits"); 542 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 543 switch (mode & i) { 544 case T4_FILTER_FCoE: 545 printf(" FCoE"); 546 break; 547 548 case T4_FILTER_PORT: 549 printf(" Port"); 550 break; 551 552 case T4_FILTER_VNIC: 553 if (mode & T4_FILTER_IC_VNIC) 554 printf(" VFvld:PF:VF"); 555 else 556 printf(" vld:oVLAN"); 557 break; 558 559 case T4_FILTER_VLAN: 560 printf(" vld:VLAN"); 561 break; 562 563 case T4_FILTER_IP_TOS: 564 printf(" TOS"); 565 break; 566 567 case T4_FILTER_IP_PROTO: 568 printf(" Prot"); 569 break; 570 571 case T4_FILTER_ETH_TYPE: 572 printf(" EthType"); 573 break; 574 575 case T4_FILTER_MAC_IDX: 576 printf(" MACIdx"); 577 break; 578 579 case T4_FILTER_MPS_HIT_TYPE: 580 printf(" MPS"); 581 break; 582 583 case T4_FILTER_IP_FRAGMENT: 584 printf(" Frag"); 585 break; 586 587 default: 588 /* compressed filter field not enabled */ 589 break; 590 } 591 } 592 printf(" %20s %20s %9s %9s %s\n", 593 "DIP", "SIP", "DPORT", "SPORT", "Action"); 594 } 595 596 /* 597 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 598 * ordered tuple. If the parameter name in the argument sub-vector does not 599 * match the passed in parameter name, then a zero is returned for the 600 * function and no parsing is performed. If there is a match, then the value 601 * and optional mask are parsed and returned in the provided return value 602 * pointers. If no optional mask is specified, then a default mask of all 1s 603 * will be returned. 604 * 605 * An error in parsing the value[:mask] will result in an error message and 606 * program termination. 607 */ 608 static int 609 parse_val_mask(const char *param, const char *args[], uint32_t *val, 610 uint32_t *mask, int hashfilter) 611 { 612 long l; 613 char *p; 614 615 if (strcmp(param, args[0]) != 0) 616 return (EINVAL); 617 618 p = str_to_number(args[1], &l, NULL); 619 if (l >= 0 && l <= UINT32_MAX) { 620 *val = (uint32_t)l; 621 if (p > args[1]) { 622 if (p[0] == 0) { 623 *mask = ~0; 624 return (0); 625 } 626 627 if (p[0] == ':' && p[1] != 0) { 628 if (hashfilter) { 629 warnx("param %s: mask not allowed for " 630 "hashfilter or nat params", param); 631 return (EINVAL); 632 } 633 p = str_to_number(p + 1, &l, NULL); 634 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 635 *mask = (uint32_t)l; 636 return (0); 637 } 638 } 639 } 640 } 641 642 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 643 args[0], args[1]); 644 645 return (EINVAL); 646 } 647 648 /* 649 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 650 * ordered tuple. If the parameter name in the argument sub-vector does not 651 * match the passed in parameter name, then a zero is returned for the 652 * function and no parsing is performed. If there is a match, then the value 653 * and optional mask are parsed and returned in the provided return value 654 * pointers. If no optional mask is specified, then a default mask of all 1s 655 * will be returned. 656 * 657 * The value return parameter "afp" is used to specify the expected address 658 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 659 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 660 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 661 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 662 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 663 * returned in the first four bytes of the address and mask return values with 664 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 665 * 1, 2, 3}, respectively. 666 * 667 * An error in parsing the value[:mask] will result in an error message and 668 * program termination. 669 */ 670 static int 671 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 672 uint8_t mask[], int maskless) 673 { 674 const char *colon, *afn; 675 char *slash; 676 uint8_t *m; 677 int af, ret; 678 unsigned int masksize; 679 680 /* 681 * Is this our parameter? 682 */ 683 if (strcmp(param, args[0]) != 0) 684 return (EINVAL); 685 686 /* 687 * Fundamental IPv4 versus IPv6 selection. 688 */ 689 colon = strchr(args[1], ':'); 690 if (!colon) { 691 afn = "IPv4"; 692 af = AF_INET; 693 masksize = 32; 694 } else { 695 afn = "IPv6"; 696 af = AF_INET6; 697 masksize = 128; 698 } 699 if (*afp == AF_UNSPEC) 700 *afp = af; 701 else if (*afp != af) { 702 warnx("address %s is not of expected family %s", 703 args[1], *afp == AF_INET ? "IP" : "IPv6"); 704 return (EINVAL); 705 } 706 707 /* 708 * Parse address (temporarily stripping off any "/mask" 709 * specification). 710 */ 711 slash = strchr(args[1], '/'); 712 if (slash) 713 *slash = 0; 714 ret = inet_pton(af, args[1], addr); 715 if (slash) 716 *slash = '/'; 717 if (ret <= 0) { 718 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 719 return (EINVAL); 720 } 721 722 /* 723 * Parse optional mask specification. 724 */ 725 if (slash) { 726 char *p; 727 unsigned int prefix = strtoul(slash + 1, &p, 10); 728 729 if (maskless) { 730 warnx("mask cannot be provided for maskless specification"); 731 return (EINVAL); 732 } 733 734 if (p == slash + 1) { 735 warnx("missing address prefix for %s", param); 736 return (EINVAL); 737 } 738 if (*p) { 739 warnx("%s is not a valid address prefix", slash + 1); 740 return (EINVAL); 741 } 742 if (prefix > masksize) { 743 warnx("prefix %u is too long for an %s address", 744 prefix, afn); 745 return (EINVAL); 746 } 747 memset(mask, 0, masksize / 8); 748 masksize = prefix; 749 } 750 751 if (mask != NULL) { 752 /* 753 * Fill in mask. 754 */ 755 for (m = mask; masksize >= 8; m++, masksize -= 8) 756 *m = ~0; 757 if (masksize) 758 *m = ~0 << (8 - masksize); 759 } 760 761 return (0); 762 } 763 764 /* 765 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 766 * tuple. If the parameter name in the argument sub-vector does not match the 767 * passed in parameter name, then a zero is returned for the function and no 768 * parsing is performed. If there is a match, then the value is parsed and 769 * returned in the provided return value pointer. 770 */ 771 static int 772 parse_val(const char *param, const char *args[], uint32_t *val) 773 { 774 char *p; 775 long l; 776 777 if (strcmp(param, args[0]) != 0) 778 return (EINVAL); 779 780 p = str_to_number(args[1], &l, NULL); 781 if (*p || l < 0 || l > UINT32_MAX) { 782 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 783 return (EINVAL); 784 } 785 786 *val = (uint32_t)l; 787 return (0); 788 } 789 790 static void 791 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 792 { 793 int noctets, octet; 794 795 printf(" "); 796 if (type == 0) { 797 noctets = 4; 798 printf("%3s", " "); 799 } else 800 noctets = 16; 801 802 for (octet = 0; octet < noctets; octet++) 803 printf("%02x", addr[octet]); 804 printf("/"); 805 for (octet = 0; octet < noctets; octet++) 806 printf("%02x", addrm[octet]); 807 } 808 809 static void 810 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 811 { 812 uint32_t i; 813 814 printf("%4d", t->idx); 815 if (t->hits == UINT64_MAX) 816 printf(" %8s", "-"); 817 else 818 printf(" %8ju", t->hits); 819 820 /* 821 * Compressed header portion of filter. 822 */ 823 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 824 switch (mode & i) { 825 case T4_FILTER_FCoE: 826 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 827 break; 828 829 case T4_FILTER_PORT: 830 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 831 break; 832 833 case T4_FILTER_VNIC: 834 if (mode & T4_FILTER_IC_VNIC) { 835 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 836 t->fs.val.pfvf_vld, 837 (t->fs.val.vnic >> 13) & 0x7, 838 t->fs.val.vnic & 0x1fff, 839 t->fs.mask.pfvf_vld, 840 (t->fs.mask.vnic >> 13) & 0x7, 841 t->fs.mask.vnic & 0x1fff); 842 } else { 843 printf(" %1d:%04x/%1d:%04x", 844 t->fs.val.ovlan_vld, t->fs.val.vnic, 845 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 846 } 847 break; 848 849 case T4_FILTER_VLAN: 850 printf(" %1d:%04x/%1d:%04x", 851 t->fs.val.vlan_vld, t->fs.val.vlan, 852 t->fs.mask.vlan_vld, t->fs.mask.vlan); 853 break; 854 855 case T4_FILTER_IP_TOS: 856 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 857 break; 858 859 case T4_FILTER_IP_PROTO: 860 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 861 break; 862 863 case T4_FILTER_ETH_TYPE: 864 printf(" %04x/%04x", t->fs.val.ethtype, 865 t->fs.mask.ethtype); 866 break; 867 868 case T4_FILTER_MAC_IDX: 869 printf(" %03x/%03x", t->fs.val.macidx, 870 t->fs.mask.macidx); 871 break; 872 873 case T4_FILTER_MPS_HIT_TYPE: 874 printf(" %1x/%1x", t->fs.val.matchtype, 875 t->fs.mask.matchtype); 876 break; 877 878 case T4_FILTER_IP_FRAGMENT: 879 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 880 break; 881 882 default: 883 /* compressed filter field not enabled */ 884 break; 885 } 886 } 887 888 /* 889 * Fixed portion of filter. 890 */ 891 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 892 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 893 printf(" %04x/%04x %04x/%04x", 894 t->fs.val.dport, t->fs.mask.dport, 895 t->fs.val.sport, t->fs.mask.sport); 896 897 /* 898 * Variable length filter action. 899 */ 900 if (t->fs.action == FILTER_DROP) 901 printf(" Drop"); 902 else if (t->fs.action == FILTER_SWITCH) { 903 printf(" Switch: port=%d", t->fs.eport); 904 if (t->fs.newdmac) 905 printf( 906 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 907 ", l2tidx=%d", 908 t->fs.dmac[0], t->fs.dmac[1], 909 t->fs.dmac[2], t->fs.dmac[3], 910 t->fs.dmac[4], t->fs.dmac[5], 911 t->l2tidx); 912 if (t->fs.newsmac) 913 printf( 914 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 915 ", smtidx=%d", 916 t->fs.smac[0], t->fs.smac[1], 917 t->fs.smac[2], t->fs.smac[3], 918 t->fs.smac[4], t->fs.smac[5], 919 t->smtidx); 920 if (t->fs.newvlan == VLAN_REMOVE) 921 printf(", vlan=none"); 922 else if (t->fs.newvlan == VLAN_INSERT) 923 printf(", vlan=insert(%x)", t->fs.vlan); 924 else if (t->fs.newvlan == VLAN_REWRITE) 925 printf(", vlan=rewrite(%x)", t->fs.vlan); 926 } else { 927 printf(" Pass: Q="); 928 if (t->fs.dirsteer == 0) { 929 printf("RSS"); 930 if (t->fs.maskhash) 931 printf("(region %d)", t->fs.iq << 1); 932 } else { 933 printf("%d", t->fs.iq); 934 if (t->fs.dirsteerhash == 0) 935 printf("(QID)"); 936 else 937 printf("(hash)"); 938 } 939 } 940 if (chip_id <= 5 && t->fs.prio) 941 printf(" Prio"); 942 if (t->fs.rpttid) 943 printf(" RptTID"); 944 printf("\n"); 945 } 946 947 static int 948 show_filters(int hash) 949 { 950 uint32_t mode = 0, header, hpfilter = 0; 951 struct t4_filter t; 952 int rc; 953 954 /* Get the global filter mode first */ 955 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 956 if (rc != 0) 957 return (rc); 958 959 if (!hash && chip_id >= 6) { 960 header = 0; 961 bzero(&t, sizeof (t)); 962 t.idx = 0; 963 t.fs.hash = 0; 964 t.fs.prio = 1; 965 for (t.idx = 0; ; t.idx++) { 966 rc = doit(CHELSIO_T4_GET_FILTER, &t); 967 if (rc != 0 || t.idx == 0xffffffff) 968 break; 969 970 if (!header) { 971 printf("High Priority TCAM Region:\n"); 972 do_show_info_header(mode); 973 header = 1; 974 hpfilter = 1; 975 } 976 do_show_one_filter_info(&t, mode); 977 } 978 } 979 980 header = 0; 981 bzero(&t, sizeof (t)); 982 t.idx = 0; 983 t.fs.hash = hash; 984 for (t.idx = 0; ; t.idx++) { 985 rc = doit(CHELSIO_T4_GET_FILTER, &t); 986 if (rc != 0 || t.idx == 0xffffffff) 987 break; 988 989 if (!header) { 990 if (hpfilter) 991 printf("\nNormal Priority TCAM Region:\n"); 992 do_show_info_header(mode); 993 header = 1; 994 } 995 do_show_one_filter_info(&t, mode); 996 } 997 998 return (rc); 999 } 1000 1001 static int 1002 get_filter_mode(int hashfilter) 1003 { 1004 uint32_t mode = hashfilter; 1005 int rc; 1006 1007 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 1008 if (rc != 0) 1009 return (rc); 1010 1011 if (mode & T4_FILTER_IPv4) 1012 printf("ipv4 "); 1013 1014 if (mode & T4_FILTER_IPv6) 1015 printf("ipv6 "); 1016 1017 if (mode & T4_FILTER_IP_SADDR) 1018 printf("sip "); 1019 1020 if (mode & T4_FILTER_IP_DADDR) 1021 printf("dip "); 1022 1023 if (mode & T4_FILTER_IP_SPORT) 1024 printf("sport "); 1025 1026 if (mode & T4_FILTER_IP_DPORT) 1027 printf("dport "); 1028 1029 if (mode & T4_FILTER_IP_FRAGMENT) 1030 printf("frag "); 1031 1032 if (mode & T4_FILTER_MPS_HIT_TYPE) 1033 printf("matchtype "); 1034 1035 if (mode & T4_FILTER_MAC_IDX) 1036 printf("macidx "); 1037 1038 if (mode & T4_FILTER_ETH_TYPE) 1039 printf("ethtype "); 1040 1041 if (mode & T4_FILTER_IP_PROTO) 1042 printf("proto "); 1043 1044 if (mode & T4_FILTER_IP_TOS) 1045 printf("tos "); 1046 1047 if (mode & T4_FILTER_VLAN) 1048 printf("vlan "); 1049 1050 if (mode & T4_FILTER_VNIC) { 1051 if (mode & T4_FILTER_IC_VNIC) 1052 printf("vnic_id "); 1053 else if (mode & T4_FILTER_IC_ENCAP) 1054 printf("encap "); 1055 else 1056 printf("ovlan "); 1057 } 1058 1059 if (mode & T4_FILTER_PORT) 1060 printf("iport "); 1061 1062 if (mode & T4_FILTER_FCoE) 1063 printf("fcoe "); 1064 1065 printf("\n"); 1066 1067 return (0); 1068 } 1069 1070 static int 1071 set_filter_mode(int argc, const char *argv[], int hashfilter) 1072 { 1073 uint32_t mode = 0; 1074 int vnic = 0, ovlan = 0, invalid = 0; 1075 1076 for (; argc; argc--, argv++) { 1077 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") || 1078 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") || 1079 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) { 1080 /* These are always available and enabled. */ 1081 continue; 1082 } else if (!strcmp(argv[0], "frag")) 1083 mode |= T4_FILTER_IP_FRAGMENT; 1084 else if (!strcmp(argv[0], "matchtype")) 1085 mode |= T4_FILTER_MPS_HIT_TYPE; 1086 else if (!strcmp(argv[0], "macidx")) 1087 mode |= T4_FILTER_MAC_IDX; 1088 else if (!strcmp(argv[0], "ethtype")) 1089 mode |= T4_FILTER_ETH_TYPE; 1090 else if (!strcmp(argv[0], "proto")) 1091 mode |= T4_FILTER_IP_PROTO; 1092 else if (!strcmp(argv[0], "tos")) 1093 mode |= T4_FILTER_IP_TOS; 1094 else if (!strcmp(argv[0], "vlan")) 1095 mode |= T4_FILTER_VLAN; 1096 else if (!strcmp(argv[0], "ovlan")) { 1097 mode |= T4_FILTER_VNIC; 1098 ovlan = 1; 1099 } else if (!strcmp(argv[0], "vnic_id")) { 1100 mode |= T4_FILTER_VNIC; 1101 mode |= T4_FILTER_IC_VNIC; 1102 vnic = 1; 1103 } 1104 #ifdef notyet 1105 else if (!strcmp(argv[0], "encap")) { 1106 mode |= T4_FILTER_VNIC; 1107 mode |= T4_FILTER_IC_ENCAP; 1108 encap = 1; 1109 } 1110 #endif 1111 else if (!strcmp(argv[0], "iport")) 1112 mode |= T4_FILTER_PORT; 1113 else if (!strcmp(argv[0], "fcoe")) 1114 mode |= T4_FILTER_FCoE; 1115 else { 1116 warnx("\"%s\" is not valid while setting filter mode.", 1117 argv[0]); 1118 invalid++; 1119 } 1120 } 1121 1122 if (vnic + ovlan > 1) { 1123 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1124 invalid++; 1125 } 1126 1127 if (invalid > 0) 1128 return (EINVAL); 1129 1130 if (hashfilter) 1131 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode); 1132 else 1133 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1134 } 1135 1136 static int 1137 del_filter(uint32_t idx, int prio, int hashfilter) 1138 { 1139 struct t4_filter t; 1140 1141 t.fs.prio = prio; 1142 t.fs.hash = hashfilter; 1143 t.idx = idx; 1144 1145 return doit(CHELSIO_T4_DEL_FILTER, &t); 1146 } 1147 1148 #define MAX_VLANID (4095) 1149 1150 static int 1151 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1152 { 1153 int rc, af = AF_UNSPEC, start_arg = 0; 1154 struct t4_filter t; 1155 1156 if (argc < 2) { 1157 warnc(EINVAL, "%s", __func__); 1158 return (EINVAL); 1159 }; 1160 bzero(&t, sizeof (t)); 1161 t.idx = idx; 1162 t.fs.hitcnts = 1; 1163 t.fs.hash = hash; 1164 1165 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1166 const char **args = &argv[start_arg]; 1167 uint32_t val, mask; 1168 1169 if (!strcmp(argv[start_arg], "type")) { 1170 int newaf; 1171 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1172 newaf = AF_INET; 1173 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1174 newaf = AF_INET6; 1175 else { 1176 warnx("invalid type \"%s\"; " 1177 "must be one of \"ipv4\" or \"ipv6\"", 1178 argv[start_arg + 1]); 1179 return (EINVAL); 1180 } 1181 1182 if (af != AF_UNSPEC && af != newaf) { 1183 warnx("conflicting IPv4/IPv6 specifications."); 1184 return (EINVAL); 1185 } 1186 af = newaf; 1187 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1188 t.fs.val.fcoe = val; 1189 t.fs.mask.fcoe = mask; 1190 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1191 t.fs.val.iport = val; 1192 t.fs.mask.iport = mask; 1193 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1194 t.fs.val.vnic = val; 1195 t.fs.mask.vnic = mask; 1196 t.fs.val.ovlan_vld = 1; 1197 t.fs.mask.ovlan_vld = 1; 1198 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1199 t.fs.val.vlan = val; 1200 t.fs.mask.vlan = mask; 1201 t.fs.val.vlan_vld = 1; 1202 t.fs.mask.vlan_vld = 1; 1203 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1204 t.fs.val.vnic &= 0x1fff; 1205 t.fs.val.vnic |= (val & 0x7) << 13; 1206 t.fs.mask.vnic &= 0x1fff; 1207 t.fs.mask.vnic |= (mask & 0x7) << 13; 1208 t.fs.val.pfvf_vld = 1; 1209 t.fs.mask.pfvf_vld = 1; 1210 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1211 t.fs.val.vnic &= 0xe000; 1212 t.fs.val.vnic |= val & 0x1fff; 1213 t.fs.mask.vnic &= 0xe000; 1214 t.fs.mask.vnic |= mask & 0x1fff; 1215 t.fs.val.pfvf_vld = 1; 1216 t.fs.mask.pfvf_vld = 1; 1217 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1218 t.fs.val.tos = val; 1219 t.fs.mask.tos = mask; 1220 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1221 t.fs.val.proto = val; 1222 t.fs.mask.proto = mask; 1223 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1224 t.fs.val.ethtype = val; 1225 t.fs.mask.ethtype = mask; 1226 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1227 t.fs.val.macidx = val; 1228 t.fs.mask.macidx = mask; 1229 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1230 t.fs.val.matchtype = val; 1231 t.fs.mask.matchtype = mask; 1232 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1233 t.fs.val.frag = val; 1234 t.fs.mask.frag = mask; 1235 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1236 t.fs.val.dport = val; 1237 t.fs.mask.dport = mask; 1238 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1239 t.fs.val.sport = val; 1240 t.fs.mask.sport = mask; 1241 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1242 t.fs.mask.dip, hash)) { 1243 /* nada */; 1244 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1245 t.fs.mask.sip, hash)) { 1246 /* nada */; 1247 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1248 /*nada*/; 1249 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1250 /*nada*/ 1251 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1252 t.fs.nat_dport = val; 1253 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1254 t.fs.nat_sport = val; 1255 } else if (!strcmp(argv[start_arg], "action")) { 1256 if (!strcmp(argv[start_arg + 1], "pass")) 1257 t.fs.action = FILTER_PASS; 1258 else if (!strcmp(argv[start_arg + 1], "drop")) 1259 t.fs.action = FILTER_DROP; 1260 else if (!strcmp(argv[start_arg + 1], "switch")) 1261 t.fs.action = FILTER_SWITCH; 1262 else { 1263 warnx("invalid action \"%s\"; must be one of" 1264 " \"pass\", \"drop\" or \"switch\"", 1265 argv[start_arg + 1]); 1266 return (EINVAL); 1267 } 1268 } else if (!parse_val("hitcnts", args, &val)) { 1269 t.fs.hitcnts = val; 1270 } else if (!parse_val("prio", args, &val)) { 1271 if (hash) { 1272 warnx("Hashfilters doesn't support \"prio\"\n"); 1273 return (EINVAL); 1274 } 1275 if (val != 0 && val != 1) { 1276 warnx("invalid priority \"%s\"; must be" 1277 " \"0\" or \"1\"", argv[start_arg + 1]); 1278 return (EINVAL); 1279 } 1280 t.fs.prio = val; 1281 } else if (!parse_val("rpttid", args, &val)) { 1282 t.fs.rpttid = 1; 1283 } else if (!parse_val("queue", args, &val)) { 1284 t.fs.dirsteer = 1; /* direct steer */ 1285 t.fs.iq = val; /* to the iq with this cntxt_id */ 1286 } else if (!parse_val("tcbhash", args, &val)) { 1287 t.fs.dirsteerhash = 1; /* direct steer */ 1288 /* XXX: use (val << 1) as the rss_hash? */ 1289 t.fs.iq = val; 1290 } else if (!parse_val("tcbrss", args, &val)) { 1291 t.fs.maskhash = 1; /* steer to RSS region */ 1292 /* 1293 * val = start idx of the region but the internal TCB 1294 * field is 10b only and is left shifted by 1 before use. 1295 */ 1296 t.fs.iq = val >> 1; 1297 } else if (!parse_val("eport", args, &val)) { 1298 t.fs.eport = val; 1299 } else if (!parse_val("swapmac", args, &val)) { 1300 t.fs.swapmac = 1; 1301 } else if (!strcmp(argv[start_arg], "nat")) { 1302 if (!strcmp(argv[start_arg + 1], "dip")) 1303 t.fs.nat_mode = NAT_MODE_DIP; 1304 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1305 t.fs.nat_mode = NAT_MODE_DIP_DP; 1306 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1307 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1308 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1309 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1310 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1311 t.fs.nat_mode = NAT_MODE_SIP_SP; 1312 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1313 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1314 else if (!strcmp(argv[start_arg + 1], "all")) 1315 t.fs.nat_mode = NAT_MODE_ALL; 1316 else { 1317 warnx("unknown nat type \"%s\"; known types are dip, " 1318 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1319 "dip-sip-sp, and all", argv[start_arg + 1]); 1320 return (EINVAL); 1321 } 1322 } else if (!parse_val("natseq", args, &val)) { 1323 t.fs.nat_seq_chk = val; 1324 } else if (!parse_val("natflag", args, &val)) { 1325 t.fs.nat_flag_chk = 1; 1326 } else if (!strcmp(argv[start_arg], "dmac")) { 1327 struct ether_addr *daddr; 1328 1329 daddr = ether_aton(argv[start_arg + 1]); 1330 if (daddr == NULL) { 1331 warnx("invalid dmac address \"%s\"", 1332 argv[start_arg + 1]); 1333 return (EINVAL); 1334 } 1335 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1336 t.fs.newdmac = 1; 1337 } else if (!strcmp(argv[start_arg], "smac")) { 1338 struct ether_addr *saddr; 1339 1340 saddr = ether_aton(argv[start_arg + 1]); 1341 if (saddr == NULL) { 1342 warnx("invalid smac address \"%s\"", 1343 argv[start_arg + 1]); 1344 return (EINVAL); 1345 } 1346 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1347 t.fs.newsmac = 1; 1348 } else if (!strcmp(argv[start_arg], "vlan")) { 1349 char *p; 1350 if (!strcmp(argv[start_arg + 1], "none")) { 1351 t.fs.newvlan = VLAN_REMOVE; 1352 } else if (argv[start_arg + 1][0] == '=') { 1353 t.fs.newvlan = VLAN_REWRITE; 1354 } else if (argv[start_arg + 1][0] == '+') { 1355 t.fs.newvlan = VLAN_INSERT; 1356 } else { 1357 warnx("unknown vlan parameter \"%s\"; must" 1358 " be one of \"none\", \"=<vlan>\", " 1359 " \"+<vlan>\"", argv[start_arg + 1]); 1360 return (EINVAL); 1361 } 1362 if (t.fs.newvlan == VLAN_REWRITE || 1363 t.fs.newvlan == VLAN_INSERT) { 1364 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1365 &p, 0); 1366 if (p == argv[start_arg + 1] + 1 || p[0] != 0 || 1367 t.fs.vlan > MAX_VLANID) { 1368 warnx("invalid vlan \"%s\"", 1369 argv[start_arg + 1]); 1370 return (EINVAL); 1371 } 1372 } 1373 } else { 1374 warnx("invalid parameter \"%s\"", argv[start_arg]); 1375 return (EINVAL); 1376 } 1377 } 1378 if (start_arg != argc) { 1379 warnx("no value for \"%s\"", argv[start_arg]); 1380 return (EINVAL); 1381 } 1382 1383 /* 1384 * Check basic sanity of option combinations. 1385 */ 1386 if (t.fs.action != FILTER_SWITCH && 1387 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1388 t.fs.swapmac || t.fs.nat_mode)) { 1389 warnx("port, dmac, smac, vlan, and nat only make sense with" 1390 " \"action switch\""); 1391 return (EINVAL); 1392 } 1393 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1394 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1395 warnx("nat params only make sense with valid nat mode"); 1396 return (EINVAL); 1397 } 1398 if (t.fs.action != FILTER_PASS && 1399 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1400 warnx("rpttid, queue and tcbhash don't make sense with" 1401 " action \"drop\" or \"switch\""); 1402 return (EINVAL); 1403 } 1404 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1405 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1406 return (EINVAL); 1407 } 1408 1409 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1410 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1411 if (hash && rc == 0) 1412 printf("%d\n", t.idx); 1413 return (rc); 1414 } 1415 1416 static int 1417 filter_cmd(int argc, const char *argv[], int hashfilter) 1418 { 1419 long long val; 1420 uint32_t idx; 1421 char *s; 1422 1423 if (argc == 0) { 1424 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1425 return (EINVAL); 1426 }; 1427 1428 /* list */ 1429 if (strcmp(argv[0], "list") == 0) { 1430 if (argc != 1) 1431 warnx("trailing arguments after \"list\" ignored."); 1432 1433 return show_filters(hashfilter); 1434 } 1435 1436 /* mode */ 1437 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1438 return get_filter_mode(hashfilter); 1439 1440 /* mode <mode> */ 1441 if (strcmp(argv[0], "mode") == 0) 1442 return set_filter_mode(argc - 1, argv + 1, hashfilter); 1443 1444 /* <idx> ... */ 1445 s = str_to_number(argv[0], NULL, &val); 1446 if (*s || val < 0 || val > 0xffffffffU) { 1447 if (hashfilter) { 1448 /* 1449 * No numeric index means this must be a request to 1450 * create a new hashfilter and we are already at the 1451 * paramter/value list. 1452 */ 1453 idx = (uint32_t) -1; 1454 goto setf; 1455 } 1456 warnx("\"%s\" is neither an index nor a filter subcommand.", 1457 argv[0]); 1458 return (EINVAL); 1459 } 1460 idx = (uint32_t) val; 1461 1462 /* <idx> delete|clear [prio 0|1] */ 1463 if ((argc == 2 || argc == 4) && 1464 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1465 int prio = 0; 1466 1467 if (argc == 4) { 1468 if (hashfilter) { 1469 warnx("stray arguments after \"%s\".", argv[1]); 1470 return (EINVAL); 1471 } 1472 1473 if (strcmp(argv[2], "prio") != 0) { 1474 warnx("\"prio\" is the only valid keyword " 1475 "after \"%s\", found \"%s\" instead.", 1476 argv[1], argv[2]); 1477 return (EINVAL); 1478 } 1479 1480 s = str_to_number(argv[3], NULL, &val); 1481 if (*s || val < 0 || val > 1) { 1482 warnx("%s \"%s\"; must be \"0\" or \"1\".", 1483 argv[2], argv[3]); 1484 return (EINVAL); 1485 } 1486 prio = (int)val; 1487 } 1488 return del_filter(idx, prio, hashfilter); 1489 } 1490 1491 /* skip <idx> */ 1492 argc--; 1493 argv++; 1494 1495 setf: 1496 /* [<param> <val>] ... */ 1497 return set_filter(idx, argc, argv, hashfilter); 1498 } 1499 1500 /* 1501 * Shows the fields of a multi-word structure. The structure is considered to 1502 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1503 * whose fields are described by @fd. The 32-bit words are given in @words 1504 * starting with the least significant 32-bit word. 1505 */ 1506 static void 1507 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1508 { 1509 unsigned int w = 0; 1510 const struct field_desc *p; 1511 1512 for (p = fd; p->name; p++) 1513 w = max(w, strlen(p->name)); 1514 1515 while (fd->name) { 1516 unsigned long long data; 1517 int first_word = fd->start / 32; 1518 int shift = fd->start % 32; 1519 int width = fd->end - fd->start + 1; 1520 unsigned long long mask = (1ULL << width) - 1; 1521 1522 data = (words[first_word] >> shift) | 1523 ((uint64_t)words[first_word + 1] << (32 - shift)); 1524 if (shift) 1525 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1526 data &= mask; 1527 if (fd->islog2) 1528 data = 1 << data; 1529 printf("%-*s ", w, fd->name); 1530 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1531 fd++; 1532 } 1533 } 1534 1535 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1536 #define FIELD1(name, start) FIELD(name, start, start) 1537 1538 static void 1539 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1540 { 1541 static struct field_desc egress_t5[] = { 1542 FIELD("DCA_ST:", 181, 191), 1543 FIELD1("StatusPgNS:", 180), 1544 FIELD1("StatusPgRO:", 179), 1545 FIELD1("FetchNS:", 178), 1546 FIELD1("FetchRO:", 177), 1547 FIELD1("Valid:", 176), 1548 FIELD("PCIeDataChannel:", 174, 175), 1549 FIELD1("StatusPgTPHintEn:", 173), 1550 FIELD("StatusPgTPHint:", 171, 172), 1551 FIELD1("FetchTPHintEn:", 170), 1552 FIELD("FetchTPHint:", 168, 169), 1553 FIELD1("FCThreshOverride:", 167), 1554 { "WRLength:", 162, 166, 9, 0, 1 }, 1555 FIELD1("WRLengthKnown:", 161), 1556 FIELD1("ReschedulePending:", 160), 1557 FIELD1("OnChipQueue:", 159), 1558 FIELD1("FetchSizeMode:", 158), 1559 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1560 FIELD1("FLMPacking:", 155), 1561 FIELD("FetchBurstMax:", 153, 154), 1562 FIELD("uPToken:", 133, 152), 1563 FIELD1("uPTokenEn:", 132), 1564 FIELD1("UserModeIO:", 131), 1565 FIELD("uPFLCredits:", 123, 130), 1566 FIELD1("uPFLCreditEn:", 122), 1567 FIELD("FID:", 111, 121), 1568 FIELD("HostFCMode:", 109, 110), 1569 FIELD1("HostFCOwner:", 108), 1570 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1571 FIELD("CIDX:", 89, 104), 1572 FIELD("PIDX:", 73, 88), 1573 { "BaseAddress:", 18, 72, 9, 1 }, 1574 FIELD("QueueSize:", 2, 17), 1575 FIELD1("QueueType:", 1), 1576 FIELD1("CachePriority:", 0), 1577 { NULL } 1578 }; 1579 static struct field_desc egress_t6[] = { 1580 FIELD("DCA_ST:", 181, 191), 1581 FIELD1("StatusPgNS:", 180), 1582 FIELD1("StatusPgRO:", 179), 1583 FIELD1("FetchNS:", 178), 1584 FIELD1("FetchRO:", 177), 1585 FIELD1("Valid:", 176), 1586 FIELD1("ReschedulePending_1:", 175), 1587 FIELD1("PCIeDataChannel:", 174), 1588 FIELD1("StatusPgTPHintEn:", 173), 1589 FIELD("StatusPgTPHint:", 171, 172), 1590 FIELD1("FetchTPHintEn:", 170), 1591 FIELD("FetchTPHint:", 168, 169), 1592 FIELD1("FCThreshOverride:", 167), 1593 { "WRLength:", 162, 166, 9, 0, 1 }, 1594 FIELD1("WRLengthKnown:", 161), 1595 FIELD1("ReschedulePending:", 160), 1596 FIELD("TimerIx:", 157, 159), 1597 FIELD1("FetchBurstMin:", 156), 1598 FIELD1("FLMPacking:", 155), 1599 FIELD("FetchBurstMax:", 153, 154), 1600 FIELD("uPToken:", 133, 152), 1601 FIELD1("uPTokenEn:", 132), 1602 FIELD1("UserModeIO:", 131), 1603 FIELD("uPFLCredits:", 123, 130), 1604 FIELD1("uPFLCreditEn:", 122), 1605 FIELD("FID:", 111, 121), 1606 FIELD("HostFCMode:", 109, 110), 1607 FIELD1("HostFCOwner:", 108), 1608 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1609 FIELD("CIDX:", 89, 104), 1610 FIELD("PIDX:", 73, 88), 1611 { "BaseAddress:", 18, 72, 9, 1 }, 1612 FIELD("QueueSize:", 2, 17), 1613 FIELD1("QueueType:", 1), 1614 FIELD1("FetchSizeMode:", 0), 1615 { NULL } 1616 }; 1617 static struct field_desc fl_t5[] = { 1618 FIELD("DCA_ST:", 181, 191), 1619 FIELD1("StatusPgNS:", 180), 1620 FIELD1("StatusPgRO:", 179), 1621 FIELD1("FetchNS:", 178), 1622 FIELD1("FetchRO:", 177), 1623 FIELD1("Valid:", 176), 1624 FIELD("PCIeDataChannel:", 174, 175), 1625 FIELD1("StatusPgTPHintEn:", 173), 1626 FIELD("StatusPgTPHint:", 171, 172), 1627 FIELD1("FetchTPHintEn:", 170), 1628 FIELD("FetchTPHint:", 168, 169), 1629 FIELD1("FCThreshOverride:", 167), 1630 FIELD1("ReschedulePending:", 160), 1631 FIELD1("OnChipQueue:", 159), 1632 FIELD1("FetchSizeMode:", 158), 1633 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1634 FIELD1("FLMPacking:", 155), 1635 FIELD("FetchBurstMax:", 153, 154), 1636 FIELD1("FLMcongMode:", 152), 1637 FIELD("MaxuPFLCredits:", 144, 151), 1638 FIELD("FLMcontextID:", 133, 143), 1639 FIELD1("uPTokenEn:", 132), 1640 FIELD1("UserModeIO:", 131), 1641 FIELD("uPFLCredits:", 123, 130), 1642 FIELD1("uPFLCreditEn:", 122), 1643 FIELD("FID:", 111, 121), 1644 FIELD("HostFCMode:", 109, 110), 1645 FIELD1("HostFCOwner:", 108), 1646 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1647 FIELD("CIDX:", 89, 104), 1648 FIELD("PIDX:", 73, 88), 1649 { "BaseAddress:", 18, 72, 9, 1 }, 1650 FIELD("QueueSize:", 2, 17), 1651 FIELD1("QueueType:", 1), 1652 FIELD1("CachePriority:", 0), 1653 { NULL } 1654 }; 1655 static struct field_desc ingress_t5[] = { 1656 FIELD("DCA_ST:", 143, 153), 1657 FIELD1("ISCSICoalescing:", 142), 1658 FIELD1("Queue_Valid:", 141), 1659 FIELD1("TimerPending:", 140), 1660 FIELD1("DropRSS:", 139), 1661 FIELD("PCIeChannel:", 137, 138), 1662 FIELD1("SEInterruptArmed:", 136), 1663 FIELD1("CongestionMgtEnable:", 135), 1664 FIELD1("NoSnoop:", 134), 1665 FIELD1("RelaxedOrdering:", 133), 1666 FIELD1("GTSmode:", 132), 1667 FIELD1("TPHintEn:", 131), 1668 FIELD("TPHint:", 129, 130), 1669 FIELD1("UpdateScheduling:", 128), 1670 FIELD("UpdateDelivery:", 126, 127), 1671 FIELD1("InterruptSent:", 125), 1672 FIELD("InterruptIDX:", 114, 124), 1673 FIELD1("InterruptDestination:", 113), 1674 FIELD1("InterruptArmed:", 112), 1675 FIELD("RxIntCounter:", 106, 111), 1676 FIELD("RxIntCounterThreshold:", 104, 105), 1677 FIELD1("Generation:", 103), 1678 { "BaseAddress:", 48, 102, 9, 1 }, 1679 FIELD("PIDX:", 32, 47), 1680 FIELD("CIDX:", 16, 31), 1681 { "QueueSize:", 4, 15, 4, 0 }, 1682 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1683 FIELD1("QueueEntryOverride:", 1), 1684 FIELD1("CachePriority:", 0), 1685 { NULL } 1686 }; 1687 static struct field_desc ingress_t6[] = { 1688 FIELD1("SP_NS:", 158), 1689 FIELD1("SP_RO:", 157), 1690 FIELD1("SP_TPHintEn:", 156), 1691 FIELD("SP_TPHint:", 154, 155), 1692 FIELD("DCA_ST:", 143, 153), 1693 FIELD1("ISCSICoalescing:", 142), 1694 FIELD1("Queue_Valid:", 141), 1695 FIELD1("TimerPending:", 140), 1696 FIELD1("DropRSS:", 139), 1697 FIELD("PCIeChannel:", 137, 138), 1698 FIELD1("SEInterruptArmed:", 136), 1699 FIELD1("CongestionMgtEnable:", 135), 1700 FIELD1("NoSnoop:", 134), 1701 FIELD1("RelaxedOrdering:", 133), 1702 FIELD1("GTSmode:", 132), 1703 FIELD1("TPHintEn:", 131), 1704 FIELD("TPHint:", 129, 130), 1705 FIELD1("UpdateScheduling:", 128), 1706 FIELD("UpdateDelivery:", 126, 127), 1707 FIELD1("InterruptSent:", 125), 1708 FIELD("InterruptIDX:", 114, 124), 1709 FIELD1("InterruptDestination:", 113), 1710 FIELD1("InterruptArmed:", 112), 1711 FIELD("RxIntCounter:", 106, 111), 1712 FIELD("RxIntCounterThreshold:", 104, 105), 1713 FIELD1("Generation:", 103), 1714 { "BaseAddress:", 48, 102, 9, 1 }, 1715 FIELD("PIDX:", 32, 47), 1716 FIELD("CIDX:", 16, 31), 1717 { "QueueSize:", 4, 15, 4, 0 }, 1718 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1719 FIELD1("QueueEntryOverride:", 1), 1720 FIELD1("CachePriority:", 0), 1721 { NULL } 1722 }; 1723 static struct field_desc flm_t5[] = { 1724 FIELD1("Valid:", 89), 1725 FIELD("SplitLenMode:", 87, 88), 1726 FIELD1("TPHintEn:", 86), 1727 FIELD("TPHint:", 84, 85), 1728 FIELD1("NoSnoop:", 83), 1729 FIELD1("RelaxedOrdering:", 82), 1730 FIELD("DCA_ST:", 71, 81), 1731 FIELD("EQid:", 54, 70), 1732 FIELD("SplitEn:", 52, 53), 1733 FIELD1("PadEn:", 51), 1734 FIELD1("PackEn:", 50), 1735 FIELD1("Cache_Lock :", 49), 1736 FIELD1("CongDrop:", 48), 1737 FIELD("PackOffset:", 16, 47), 1738 FIELD("CIDX:", 8, 15), 1739 FIELD("PIDX:", 0, 7), 1740 { NULL } 1741 }; 1742 static struct field_desc flm_t6[] = { 1743 FIELD1("Valid:", 89), 1744 FIELD("SplitLenMode:", 87, 88), 1745 FIELD1("TPHintEn:", 86), 1746 FIELD("TPHint:", 84, 85), 1747 FIELD1("NoSnoop:", 83), 1748 FIELD1("RelaxedOrdering:", 82), 1749 FIELD("DCA_ST:", 71, 81), 1750 FIELD("EQid:", 54, 70), 1751 FIELD("SplitEn:", 52, 53), 1752 FIELD1("PadEn:", 51), 1753 FIELD1("PackEn:", 50), 1754 FIELD1("Cache_Lock :", 49), 1755 FIELD1("CongDrop:", 48), 1756 FIELD1("Inflight:", 47), 1757 FIELD1("CongEn:", 46), 1758 FIELD1("CongMode:", 45), 1759 FIELD("PackOffset:", 20, 39), 1760 FIELD("CIDX:", 8, 15), 1761 FIELD("PIDX:", 0, 7), 1762 { NULL } 1763 }; 1764 static struct field_desc conm_t5[] = { 1765 FIELD1("CngMPSEnable:", 21), 1766 FIELD("CngTPMode:", 19, 20), 1767 FIELD1("CngDBPHdr:", 18), 1768 FIELD1("CngDBPData:", 17), 1769 FIELD1("CngIMSG:", 16), 1770 { "CngChMap:", 0, 15, 0, 1, 0 }, 1771 { NULL } 1772 }; 1773 1774 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1775 if (p->data[0] & 2) 1776 show_struct(p->data, 6, fl_t5); 1777 else if (vers == 5) 1778 show_struct(p->data, 6, egress_t5); 1779 else 1780 show_struct(p->data, 6, egress_t6); 1781 } else if (p->mem_id == SGE_CONTEXT_FLM) 1782 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1783 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1784 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1785 else if (p->mem_id == SGE_CONTEXT_CNM) 1786 show_struct(p->data, 1, conm_t5); 1787 } 1788 1789 static void 1790 show_t4_ctxt(const struct t4_sge_context *p) 1791 { 1792 static struct field_desc egress_t4[] = { 1793 FIELD1("StatusPgNS:", 180), 1794 FIELD1("StatusPgRO:", 179), 1795 FIELD1("FetchNS:", 178), 1796 FIELD1("FetchRO:", 177), 1797 FIELD1("Valid:", 176), 1798 FIELD("PCIeDataChannel:", 174, 175), 1799 FIELD1("DCAEgrQEn:", 173), 1800 FIELD("DCACPUID:", 168, 172), 1801 FIELD1("FCThreshOverride:", 167), 1802 FIELD("WRLength:", 162, 166), 1803 FIELD1("WRLengthKnown:", 161), 1804 FIELD1("ReschedulePending:", 160), 1805 FIELD1("OnChipQueue:", 159), 1806 FIELD1("FetchSizeMode", 158), 1807 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1808 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1809 FIELD("uPToken:", 133, 152), 1810 FIELD1("uPTokenEn:", 132), 1811 FIELD1("UserModeIO:", 131), 1812 FIELD("uPFLCredits:", 123, 130), 1813 FIELD1("uPFLCreditEn:", 122), 1814 FIELD("FID:", 111, 121), 1815 FIELD("HostFCMode:", 109, 110), 1816 FIELD1("HostFCOwner:", 108), 1817 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1818 FIELD("CIDX:", 89, 104), 1819 FIELD("PIDX:", 73, 88), 1820 { "BaseAddress:", 18, 72, 9, 1 }, 1821 FIELD("QueueSize:", 2, 17), 1822 FIELD1("QueueType:", 1), 1823 FIELD1("CachePriority:", 0), 1824 { NULL } 1825 }; 1826 static struct field_desc fl_t4[] = { 1827 FIELD1("StatusPgNS:", 180), 1828 FIELD1("StatusPgRO:", 179), 1829 FIELD1("FetchNS:", 178), 1830 FIELD1("FetchRO:", 177), 1831 FIELD1("Valid:", 176), 1832 FIELD("PCIeDataChannel:", 174, 175), 1833 FIELD1("DCAEgrQEn:", 173), 1834 FIELD("DCACPUID:", 168, 172), 1835 FIELD1("FCThreshOverride:", 167), 1836 FIELD1("ReschedulePending:", 160), 1837 FIELD1("OnChipQueue:", 159), 1838 FIELD1("FetchSizeMode", 158), 1839 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1840 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1841 FIELD1("FLMcongMode:", 152), 1842 FIELD("MaxuPFLCredits:", 144, 151), 1843 FIELD("FLMcontextID:", 133, 143), 1844 FIELD1("uPTokenEn:", 132), 1845 FIELD1("UserModeIO:", 131), 1846 FIELD("uPFLCredits:", 123, 130), 1847 FIELD1("uPFLCreditEn:", 122), 1848 FIELD("FID:", 111, 121), 1849 FIELD("HostFCMode:", 109, 110), 1850 FIELD1("HostFCOwner:", 108), 1851 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1852 FIELD("CIDX:", 89, 104), 1853 FIELD("PIDX:", 73, 88), 1854 { "BaseAddress:", 18, 72, 9, 1 }, 1855 FIELD("QueueSize:", 2, 17), 1856 FIELD1("QueueType:", 1), 1857 FIELD1("CachePriority:", 0), 1858 { NULL } 1859 }; 1860 static struct field_desc ingress_t4[] = { 1861 FIELD1("NoSnoop:", 145), 1862 FIELD1("RelaxedOrdering:", 144), 1863 FIELD1("GTSmode:", 143), 1864 FIELD1("ISCSICoalescing:", 142), 1865 FIELD1("Valid:", 141), 1866 FIELD1("TimerPending:", 140), 1867 FIELD1("DropRSS:", 139), 1868 FIELD("PCIeChannel:", 137, 138), 1869 FIELD1("SEInterruptArmed:", 136), 1870 FIELD1("CongestionMgtEnable:", 135), 1871 FIELD1("DCAIngQEnable:", 134), 1872 FIELD("DCACPUID:", 129, 133), 1873 FIELD1("UpdateScheduling:", 128), 1874 FIELD("UpdateDelivery:", 126, 127), 1875 FIELD1("InterruptSent:", 125), 1876 FIELD("InterruptIDX:", 114, 124), 1877 FIELD1("InterruptDestination:", 113), 1878 FIELD1("InterruptArmed:", 112), 1879 FIELD("RxIntCounter:", 106, 111), 1880 FIELD("RxIntCounterThreshold:", 104, 105), 1881 FIELD1("Generation:", 103), 1882 { "BaseAddress:", 48, 102, 9, 1 }, 1883 FIELD("PIDX:", 32, 47), 1884 FIELD("CIDX:", 16, 31), 1885 { "QueueSize:", 4, 15, 4, 0 }, 1886 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1887 FIELD1("QueueEntryOverride:", 1), 1888 FIELD1("CachePriority:", 0), 1889 { NULL } 1890 }; 1891 static struct field_desc flm_t4[] = { 1892 FIELD1("NoSnoop:", 79), 1893 FIELD1("RelaxedOrdering:", 78), 1894 FIELD1("Valid:", 77), 1895 FIELD("DCACPUID:", 72, 76), 1896 FIELD1("DCAFLEn:", 71), 1897 FIELD("EQid:", 54, 70), 1898 FIELD("SplitEn:", 52, 53), 1899 FIELD1("PadEn:", 51), 1900 FIELD1("PackEn:", 50), 1901 FIELD1("DBpriority:", 48), 1902 FIELD("PackOffset:", 16, 47), 1903 FIELD("CIDX:", 8, 15), 1904 FIELD("PIDX:", 0, 7), 1905 { NULL } 1906 }; 1907 static struct field_desc conm_t4[] = { 1908 FIELD1("CngDBPHdr:", 6), 1909 FIELD1("CngDBPData:", 5), 1910 FIELD1("CngIMSG:", 4), 1911 { "CngChMap:", 0, 3, 0, 1, 0}, 1912 { NULL } 1913 }; 1914 1915 if (p->mem_id == SGE_CONTEXT_EGRESS) 1916 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1917 else if (p->mem_id == SGE_CONTEXT_FLM) 1918 show_struct(p->data, 3, flm_t4); 1919 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1920 show_struct(p->data, 5, ingress_t4); 1921 else if (p->mem_id == SGE_CONTEXT_CNM) 1922 show_struct(p->data, 1, conm_t4); 1923 } 1924 1925 #undef FIELD 1926 #undef FIELD1 1927 1928 static int 1929 get_sge_context(int argc, const char *argv[]) 1930 { 1931 int rc; 1932 char *p; 1933 long cid; 1934 struct t4_sge_context cntxt = {0}; 1935 1936 if (argc != 2) { 1937 warnx("sge_context: incorrect number of arguments."); 1938 return (EINVAL); 1939 } 1940 1941 if (!strcmp(argv[0], "egress")) 1942 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1943 else if (!strcmp(argv[0], "ingress")) 1944 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1945 else if (!strcmp(argv[0], "fl")) 1946 cntxt.mem_id = SGE_CONTEXT_FLM; 1947 else if (!strcmp(argv[0], "cong")) 1948 cntxt.mem_id = SGE_CONTEXT_CNM; 1949 else { 1950 warnx("unknown context type \"%s\"; known types are egress, " 1951 "ingress, fl, and cong.", argv[0]); 1952 return (EINVAL); 1953 } 1954 1955 p = str_to_number(argv[1], &cid, NULL); 1956 if (*p) { 1957 warnx("invalid context id \"%s\"", argv[1]); 1958 return (EINVAL); 1959 } 1960 cntxt.cid = cid; 1961 1962 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1963 if (rc != 0) 1964 return (rc); 1965 1966 if (chip_id == 4) 1967 show_t4_ctxt(&cntxt); 1968 else 1969 show_t5t6_ctxt(&cntxt, chip_id); 1970 1971 return (0); 1972 } 1973 1974 static int 1975 loadfw(int argc, const char *argv[]) 1976 { 1977 int rc, fd; 1978 struct t4_data data = {0}; 1979 const char *fname = argv[0]; 1980 struct stat st = {0}; 1981 1982 if (argc != 1) { 1983 warnx("loadfw: incorrect number of arguments."); 1984 return (EINVAL); 1985 } 1986 1987 fd = open(fname, O_RDONLY); 1988 if (fd < 0) { 1989 warn("open(%s)", fname); 1990 return (errno); 1991 } 1992 1993 if (fstat(fd, &st) < 0) { 1994 warn("fstat"); 1995 close(fd); 1996 return (errno); 1997 } 1998 1999 data.len = st.st_size; 2000 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 2001 if (data.data == MAP_FAILED) { 2002 warn("mmap"); 2003 close(fd); 2004 return (errno); 2005 } 2006 2007 rc = doit(CHELSIO_T4_LOAD_FW, &data); 2008 munmap(data.data, data.len); 2009 close(fd); 2010 return (rc); 2011 } 2012 2013 static int 2014 loadcfg(int argc, const char *argv[]) 2015 { 2016 int rc, fd; 2017 struct t4_data data = {0}; 2018 const char *fname = argv[0]; 2019 struct stat st = {0}; 2020 2021 if (argc != 1) { 2022 warnx("loadcfg: incorrect number of arguments."); 2023 return (EINVAL); 2024 } 2025 2026 if (strcmp(fname, "clear") == 0) 2027 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 2028 2029 fd = open(fname, O_RDONLY); 2030 if (fd < 0) { 2031 warn("open(%s)", fname); 2032 return (errno); 2033 } 2034 2035 if (fstat(fd, &st) < 0) { 2036 warn("fstat"); 2037 close(fd); 2038 return (errno); 2039 } 2040 2041 data.len = st.st_size; 2042 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 2043 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 2044 if (data.data == MAP_FAILED) { 2045 warn("mmap"); 2046 close(fd); 2047 return (errno); 2048 } 2049 2050 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 2051 munmap(data.data, data.len); 2052 close(fd); 2053 return (rc); 2054 } 2055 2056 static int 2057 dumpstate(int argc, const char *argv[]) 2058 { 2059 int rc, fd; 2060 struct t4_cudbg_dump dump = {0}; 2061 const char *fname = argv[0]; 2062 2063 if (argc != 1) { 2064 warnx("dumpstate: incorrect number of arguments."); 2065 return (EINVAL); 2066 } 2067 2068 dump.wr_flash = 0; 2069 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 2070 dump.len = 8 * 1024 * 1024; 2071 dump.data = malloc(dump.len); 2072 if (dump.data == NULL) { 2073 return (ENOMEM); 2074 } 2075 2076 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 2077 if (rc != 0) 2078 goto done; 2079 2080 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2081 S_IRUSR | S_IRGRP | S_IROTH); 2082 if (fd < 0) { 2083 warn("open(%s)", fname); 2084 rc = errno; 2085 goto done; 2086 } 2087 write(fd, dump.data, dump.len); 2088 close(fd); 2089 done: 2090 free(dump.data); 2091 return (rc); 2092 } 2093 2094 static int 2095 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2096 { 2097 int rc; 2098 struct t4_mem_range mr; 2099 2100 mr.addr = addr; 2101 mr.len = len; 2102 mr.data = malloc(mr.len); 2103 2104 if (mr.data == 0) { 2105 warn("read_mem: malloc"); 2106 return (errno); 2107 } 2108 2109 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2110 if (rc != 0) 2111 goto done; 2112 2113 if (output) 2114 (*output)(mr.data, mr.len); 2115 done: 2116 free(mr.data); 2117 return (rc); 2118 } 2119 2120 static int 2121 loadboot(int argc, const char *argv[]) 2122 { 2123 int rc, fd; 2124 long l; 2125 char *p; 2126 struct t4_bootrom br = {0}; 2127 const char *fname = argv[0]; 2128 struct stat st = {0}; 2129 2130 if (argc == 1) { 2131 br.pf_offset = 0; 2132 br.pfidx_addr = 0; 2133 } else if (argc == 3) { 2134 if (!strcmp(argv[1], "pf")) 2135 br.pf_offset = 0; 2136 else if (!strcmp(argv[1], "offset")) 2137 br.pf_offset = 1; 2138 else 2139 return (EINVAL); 2140 2141 p = str_to_number(argv[2], &l, NULL); 2142 if (*p) 2143 return (EINVAL); 2144 br.pfidx_addr = l; 2145 } else { 2146 warnx("loadboot: incorrect number of arguments."); 2147 return (EINVAL); 2148 } 2149 2150 if (strcmp(fname, "clear") == 0) 2151 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2152 2153 fd = open(fname, O_RDONLY); 2154 if (fd < 0) { 2155 warn("open(%s)", fname); 2156 return (errno); 2157 } 2158 2159 if (fstat(fd, &st) < 0) { 2160 warn("fstat"); 2161 close(fd); 2162 return (errno); 2163 } 2164 2165 br.len = st.st_size; 2166 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2167 if (br.data == MAP_FAILED) { 2168 warn("mmap"); 2169 close(fd); 2170 return (errno); 2171 } 2172 2173 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2174 munmap(br.data, br.len); 2175 close(fd); 2176 return (rc); 2177 } 2178 2179 static int 2180 loadbootcfg(int argc, const char *argv[]) 2181 { 2182 int rc, fd; 2183 struct t4_data bc = {0}; 2184 const char *fname = argv[0]; 2185 struct stat st = {0}; 2186 2187 if (argc != 1) { 2188 warnx("loadbootcfg: incorrect number of arguments."); 2189 return (EINVAL); 2190 } 2191 2192 if (strcmp(fname, "clear") == 0) 2193 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2194 2195 fd = open(fname, O_RDONLY); 2196 if (fd < 0) { 2197 warn("open(%s)", fname); 2198 return (errno); 2199 } 2200 2201 if (fstat(fd, &st) < 0) { 2202 warn("fstat"); 2203 close(fd); 2204 return (errno); 2205 } 2206 2207 bc.len = st.st_size; 2208 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2209 if (bc.data == MAP_FAILED) { 2210 warn("mmap"); 2211 close(fd); 2212 return (errno); 2213 } 2214 2215 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2216 munmap(bc.data, bc.len); 2217 close(fd); 2218 return (rc); 2219 } 2220 2221 /* 2222 * Display memory as list of 'n' 4-byte values per line. 2223 */ 2224 static void 2225 show_mem(uint32_t *buf, uint32_t len) 2226 { 2227 const char *s; 2228 int i, n = 8; 2229 2230 while (len) { 2231 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2232 s = i ? " " : ""; 2233 printf("%s%08x", s, htonl(*buf)); 2234 } 2235 printf("\n"); 2236 } 2237 } 2238 2239 static int 2240 memdump(int argc, const char *argv[]) 2241 { 2242 char *p; 2243 long l; 2244 uint32_t addr, len; 2245 2246 if (argc != 2) { 2247 warnx("incorrect number of arguments."); 2248 return (EINVAL); 2249 } 2250 2251 p = str_to_number(argv[0], &l, NULL); 2252 if (*p) { 2253 warnx("invalid address \"%s\"", argv[0]); 2254 return (EINVAL); 2255 } 2256 addr = l; 2257 2258 p = str_to_number(argv[1], &l, NULL); 2259 if (*p) { 2260 warnx("memdump: invalid length \"%s\"", argv[1]); 2261 return (EINVAL); 2262 } 2263 len = l; 2264 2265 return (read_mem(addr, len, show_mem)); 2266 } 2267 2268 /* 2269 * Display TCB as list of 'n' 4-byte values per line. 2270 */ 2271 static void 2272 show_tcb(uint32_t *buf, uint32_t len) 2273 { 2274 unsigned char *tcb = (unsigned char *)buf; 2275 const char *s; 2276 int i, n = 8; 2277 2278 while (len) { 2279 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2280 s = i ? " " : ""; 2281 printf("%s%08x", s, htonl(*buf)); 2282 } 2283 printf("\n"); 2284 } 2285 set_tcb_info(TIDTYPE_TCB, chip_id); 2286 set_print_style(PRNTSTYL_COMP); 2287 swizzle_tcb(tcb); 2288 parse_n_display_xcb(tcb); 2289 } 2290 2291 #define A_TP_CMM_TCB_BASE 0x7d10 2292 #define TCB_SIZE 128 2293 static int 2294 read_tcb(int argc, const char *argv[]) 2295 { 2296 char *p; 2297 long l; 2298 long long val; 2299 unsigned int tid; 2300 uint32_t addr; 2301 int rc; 2302 2303 if (argc != 1) { 2304 warnx("incorrect number of arguments."); 2305 return (EINVAL); 2306 } 2307 2308 p = str_to_number(argv[0], &l, NULL); 2309 if (*p) { 2310 warnx("invalid tid \"%s\"", argv[0]); 2311 return (EINVAL); 2312 } 2313 tid = l; 2314 2315 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2316 if (rc != 0) 2317 return (rc); 2318 2319 addr = val + tid * TCB_SIZE; 2320 2321 return (read_mem(addr, TCB_SIZE, show_tcb)); 2322 } 2323 2324 static int 2325 read_i2c(int argc, const char *argv[]) 2326 { 2327 char *p; 2328 long l; 2329 struct t4_i2c_data i2cd; 2330 int rc, i; 2331 2332 if (argc < 3 || argc > 4) { 2333 warnx("incorrect number of arguments."); 2334 return (EINVAL); 2335 } 2336 2337 p = str_to_number(argv[0], &l, NULL); 2338 if (*p || l > UCHAR_MAX) { 2339 warnx("invalid port id \"%s\"", argv[0]); 2340 return (EINVAL); 2341 } 2342 i2cd.port_id = l; 2343 2344 p = str_to_number(argv[1], &l, NULL); 2345 if (*p || l > UCHAR_MAX) { 2346 warnx("invalid i2c device address \"%s\"", argv[1]); 2347 return (EINVAL); 2348 } 2349 i2cd.dev_addr = l; 2350 2351 p = str_to_number(argv[2], &l, NULL); 2352 if (*p || l > UCHAR_MAX) { 2353 warnx("invalid byte offset \"%s\"", argv[2]); 2354 return (EINVAL); 2355 } 2356 i2cd.offset = l; 2357 2358 if (argc == 4) { 2359 p = str_to_number(argv[3], &l, NULL); 2360 if (*p || l > sizeof(i2cd.data)) { 2361 warnx("invalid number of bytes \"%s\"", argv[3]); 2362 return (EINVAL); 2363 } 2364 i2cd.len = l; 2365 } else 2366 i2cd.len = 1; 2367 2368 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2369 if (rc != 0) 2370 return (rc); 2371 2372 for (i = 0; i < i2cd.len; i++) 2373 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2374 2375 return (0); 2376 } 2377 2378 static int 2379 clearstats(int argc, const char *argv[]) 2380 { 2381 char *p; 2382 long l; 2383 uint32_t port; 2384 2385 if (argc != 1) { 2386 warnx("incorrect number of arguments."); 2387 return (EINVAL); 2388 } 2389 2390 p = str_to_number(argv[0], &l, NULL); 2391 if (*p) { 2392 warnx("invalid port id \"%s\"", argv[0]); 2393 return (EINVAL); 2394 } 2395 port = l; 2396 2397 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2398 } 2399 2400 static int 2401 show_tracers(void) 2402 { 2403 struct t4_tracer t; 2404 char *s; 2405 int rc, port_idx, i; 2406 long long val; 2407 2408 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2409 rc = read_reg(0x9800, 4, &val); 2410 if (rc != 0) 2411 return (rc); 2412 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2413 2414 t.idx = 0; 2415 for (t.idx = 0; ; t.idx++) { 2416 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2417 if (rc != 0 || t.idx == 0xff) 2418 break; 2419 2420 if (t.tp.port < 4) { 2421 s = "Rx"; 2422 port_idx = t.tp.port; 2423 } else if (t.tp.port < 8) { 2424 s = "Tx"; 2425 port_idx = t.tp.port - 4; 2426 } else if (t.tp.port < 12) { 2427 s = "loopback"; 2428 port_idx = t.tp.port - 8; 2429 } else if (t.tp.port < 16) { 2430 s = "MPS Rx"; 2431 port_idx = t.tp.port - 12; 2432 } else if (t.tp.port < 20) { 2433 s = "MPS Tx"; 2434 port_idx = t.tp.port - 16; 2435 } else { 2436 s = "unknown"; 2437 port_idx = t.tp.port; 2438 } 2439 2440 printf("\ntracer %u (currently %s) captures ", t.idx, 2441 t.enabled ? "ENABLED" : "DISABLED"); 2442 if (t.tp.port < 8) 2443 printf("port %u %s, ", port_idx, s); 2444 else 2445 printf("%s %u, ", s, port_idx); 2446 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2447 t.tp.min_len); 2448 printf("packets captured %smatch filter\n", 2449 t.tp.invert ? "do not " : ""); 2450 if (t.tp.skip_ofst) { 2451 printf("filter pattern: "); 2452 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2453 printf("%08x%08x", t.tp.data[i], 2454 t.tp.data[i + 1]); 2455 printf("/"); 2456 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2457 printf("%08x%08x", t.tp.mask[i], 2458 t.tp.mask[i + 1]); 2459 printf("@0\n"); 2460 } 2461 printf("filter pattern: "); 2462 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2463 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2464 printf("/"); 2465 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2466 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2467 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2468 } 2469 2470 return (rc); 2471 } 2472 2473 static int 2474 tracer_onoff(uint8_t idx, int enabled) 2475 { 2476 struct t4_tracer t; 2477 2478 t.idx = idx; 2479 t.enabled = enabled; 2480 t.valid = 0; 2481 2482 return doit(CHELSIO_T4_SET_TRACER, &t); 2483 } 2484 2485 static void 2486 create_tracing_ifnet() 2487 { 2488 char *cmd[] = { 2489 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2490 }; 2491 char *env[] = {NULL}; 2492 2493 if (vfork() == 0) { 2494 close(STDERR_FILENO); 2495 execve(cmd[0], cmd, env); 2496 _exit(0); 2497 } 2498 } 2499 2500 /* 2501 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2502 * matching). Right now this is a quick-n-dirty implementation that traces the 2503 * first 128B of all tx or rx on a port 2504 */ 2505 static int 2506 set_tracer(uint8_t idx, int argc, const char *argv[]) 2507 { 2508 struct t4_tracer t; 2509 int len, port; 2510 2511 bzero(&t, sizeof (t)); 2512 t.idx = idx; 2513 t.enabled = 1; 2514 t.valid = 1; 2515 2516 if (argc != 1) { 2517 warnx("must specify tx<n> or rx<n>."); 2518 return (EINVAL); 2519 } 2520 2521 len = strlen(argv[0]); 2522 if (len != 3) { 2523 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2524 return (EINVAL); 2525 } 2526 2527 if (strncmp(argv[0], "tx", 2) == 0) { 2528 port = argv[0][2] - '0'; 2529 if (port < 0 || port > 3) { 2530 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2531 return (EINVAL); 2532 } 2533 port += 4; 2534 } else if (strncmp(argv[0], "rx", 2) == 0) { 2535 port = argv[0][2] - '0'; 2536 if (port < 0 || port > 3) { 2537 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2538 return (EINVAL); 2539 } 2540 } else { 2541 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2542 return (EINVAL); 2543 } 2544 2545 t.tp.snap_len = 128; 2546 t.tp.min_len = 0; 2547 t.tp.skip_ofst = 0; 2548 t.tp.skip_len = 0; 2549 t.tp.invert = 0; 2550 t.tp.port = port; 2551 2552 create_tracing_ifnet(); 2553 return doit(CHELSIO_T4_SET_TRACER, &t); 2554 } 2555 2556 static int 2557 tracer_cmd(int argc, const char *argv[]) 2558 { 2559 long long val; 2560 uint8_t idx; 2561 char *s; 2562 2563 if (argc == 0) { 2564 warnx("tracer: no arguments."); 2565 return (EINVAL); 2566 }; 2567 2568 /* list */ 2569 if (strcmp(argv[0], "list") == 0) { 2570 if (argc != 1) 2571 warnx("trailing arguments after \"list\" ignored."); 2572 2573 return show_tracers(); 2574 } 2575 2576 /* <idx> ... */ 2577 s = str_to_number(argv[0], NULL, &val); 2578 if (*s || val > 0xff) { 2579 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2580 argv[0]); 2581 return (EINVAL); 2582 } 2583 idx = (int8_t)val; 2584 2585 /* <idx> disable */ 2586 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2587 return tracer_onoff(idx, 0); 2588 2589 /* <idx> enable */ 2590 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2591 return tracer_onoff(idx, 1); 2592 2593 /* <idx> ... */ 2594 return set_tracer(idx, argc - 1, argv + 1); 2595 } 2596 2597 static int 2598 modinfo_raw(int port_id) 2599 { 2600 uint8_t offset; 2601 struct t4_i2c_data i2cd; 2602 int rc; 2603 2604 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2605 bzero(&i2cd, sizeof(i2cd)); 2606 i2cd.port_id = port_id; 2607 i2cd.dev_addr = 0xa0; 2608 i2cd.offset = offset; 2609 i2cd.len = sizeof(i2cd.data); 2610 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2611 if (rc != 0) 2612 return (rc); 2613 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2614 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2615 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2616 i2cd.data[7]); 2617 2618 printf(" %c%c%c%c %c%c%c%c\n", 2619 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2620 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2621 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2622 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2623 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2624 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2625 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2626 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2627 } 2628 2629 return (0); 2630 } 2631 2632 static int 2633 modinfo(int argc, const char *argv[]) 2634 { 2635 long port; 2636 char string[16], *p; 2637 struct t4_i2c_data i2cd; 2638 int rc, i; 2639 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2640 2641 if (argc < 1) { 2642 warnx("must supply a port"); 2643 return (EINVAL); 2644 } 2645 2646 if (argc > 2) { 2647 warnx("too many arguments"); 2648 return (EINVAL); 2649 } 2650 2651 p = str_to_number(argv[0], &port, NULL); 2652 if (*p || port > UCHAR_MAX) { 2653 warnx("invalid port id \"%s\"", argv[0]); 2654 return (EINVAL); 2655 } 2656 2657 if (argc == 2) { 2658 if (!strcmp(argv[1], "raw")) 2659 return (modinfo_raw(port)); 2660 else { 2661 warnx("second argument can only be \"raw\""); 2662 return (EINVAL); 2663 } 2664 } 2665 2666 bzero(&i2cd, sizeof(i2cd)); 2667 i2cd.len = 1; 2668 i2cd.port_id = port; 2669 i2cd.dev_addr = SFF_8472_BASE; 2670 2671 i2cd.offset = SFF_8472_ID; 2672 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2673 goto fail; 2674 2675 if (i2cd.data[0] > SFF_8472_ID_LAST) 2676 printf("Unknown ID\n"); 2677 else 2678 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2679 2680 bzero(&string, sizeof(string)); 2681 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2682 i2cd.offset = i; 2683 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2684 goto fail; 2685 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2686 } 2687 printf("Vendor %s\n", string); 2688 2689 bzero(&string, sizeof(string)); 2690 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2691 i2cd.offset = i; 2692 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2693 goto fail; 2694 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2695 } 2696 printf("SN %s\n", string); 2697 2698 bzero(&string, sizeof(string)); 2699 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2700 i2cd.offset = i; 2701 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2702 goto fail; 2703 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2704 } 2705 printf("PN %s\n", string); 2706 2707 bzero(&string, sizeof(string)); 2708 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2709 i2cd.offset = i; 2710 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2711 goto fail; 2712 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2713 } 2714 printf("Rev %s\n", string); 2715 2716 i2cd.offset = SFF_8472_DIAG_TYPE; 2717 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2718 goto fail; 2719 2720 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2721 SFF_8472_DIAG_INTERNAL)) { 2722 2723 /* Switch to reading from the Diagnostic address. */ 2724 i2cd.dev_addr = SFF_8472_DIAG; 2725 i2cd.len = 1; 2726 2727 i2cd.offset = SFF_8472_TEMP; 2728 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2729 goto fail; 2730 temp = i2cd.data[0] << 8; 2731 printf("Temp: "); 2732 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2733 printf("-"); 2734 else 2735 printf("+"); 2736 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2737 SFF_8472_TEMP_SHIFT); 2738 2739 i2cd.offset = SFF_8472_VCC; 2740 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2741 goto fail; 2742 vcc = i2cd.data[0] << 8; 2743 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2744 2745 i2cd.offset = SFF_8472_TX_BIAS; 2746 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2747 goto fail; 2748 tx_bias = i2cd.data[0] << 8; 2749 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2750 2751 i2cd.offset = SFF_8472_TX_POWER; 2752 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2753 goto fail; 2754 tx_power = i2cd.data[0] << 8; 2755 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2756 2757 i2cd.offset = SFF_8472_RX_POWER; 2758 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2759 goto fail; 2760 rx_power = i2cd.data[0] << 8; 2761 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2762 2763 } else 2764 printf("Diagnostics not supported.\n"); 2765 2766 return(0); 2767 2768 fail: 2769 if (rc == EPERM) 2770 warnx("No module/cable in port %ld", port); 2771 return (rc); 2772 2773 } 2774 2775 /* XXX: pass in a low/high and do range checks as well */ 2776 static int 2777 get_sched_param(const char *param, const char *args[], long *val) 2778 { 2779 char *p; 2780 2781 if (strcmp(param, args[0]) != 0) 2782 return (EINVAL); 2783 2784 p = str_to_number(args[1], val, NULL); 2785 if (*p) { 2786 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2787 args[1]); 2788 return (EINVAL); 2789 } 2790 2791 return (0); 2792 } 2793 2794 static int 2795 sched_class(int argc, const char *argv[]) 2796 { 2797 struct t4_sched_params op; 2798 int errs, i; 2799 2800 memset(&op, 0xff, sizeof(op)); 2801 op.subcmd = -1; 2802 op.type = -1; 2803 if (argc == 0) { 2804 warnx("missing scheduling sub-command"); 2805 return (EINVAL); 2806 } 2807 if (!strcmp(argv[0], "config")) { 2808 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2809 op.u.config.minmax = -1; 2810 } else if (!strcmp(argv[0], "params")) { 2811 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2812 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2813 op.u.params.ratemode = op.u.params.channel = 2814 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2815 op.u.params.weight = op.u.params.pktsize = -1; 2816 } else { 2817 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2818 return (EINVAL); 2819 } 2820 2821 /* Decode remaining arguments ... */ 2822 errs = 0; 2823 for (i = 1; i < argc; i += 2) { 2824 const char **args = &argv[i]; 2825 long l; 2826 2827 if (i + 1 == argc) { 2828 warnx("missing argument for \"%s\"", args[0]); 2829 errs++; 2830 break; 2831 } 2832 2833 if (!strcmp(args[0], "type")) { 2834 if (!strcmp(args[1], "packet")) 2835 op.type = SCHED_CLASS_TYPE_PACKET; 2836 else { 2837 warnx("invalid type parameter \"%s\"", args[1]); 2838 errs++; 2839 } 2840 2841 continue; 2842 } 2843 2844 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2845 if(!get_sched_param("minmax", args, &l)) 2846 op.u.config.minmax = (int8_t)l; 2847 else { 2848 warnx("unknown scheduler config parameter " 2849 "\"%s\"", args[0]); 2850 errs++; 2851 } 2852 2853 continue; 2854 } 2855 2856 /* Rest applies only to SUBCMD_PARAMS */ 2857 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2858 continue; 2859 2860 if (!strcmp(args[0], "level")) { 2861 if (!strcmp(args[1], "cl-rl")) 2862 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2863 else if (!strcmp(args[1], "cl-wrr")) 2864 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2865 else if (!strcmp(args[1], "ch-rl")) 2866 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2867 else { 2868 warnx("invalid level parameter \"%s\"", 2869 args[1]); 2870 errs++; 2871 } 2872 } else if (!strcmp(args[0], "mode")) { 2873 if (!strcmp(args[1], "class")) 2874 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2875 else if (!strcmp(args[1], "flow")) 2876 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2877 else { 2878 warnx("invalid mode parameter \"%s\"", args[1]); 2879 errs++; 2880 } 2881 } else if (!strcmp(args[0], "rate-unit")) { 2882 if (!strcmp(args[1], "bits")) 2883 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2884 else if (!strcmp(args[1], "pkts")) 2885 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2886 else { 2887 warnx("invalid rate-unit parameter \"%s\"", 2888 args[1]); 2889 errs++; 2890 } 2891 } else if (!strcmp(args[0], "rate-mode")) { 2892 if (!strcmp(args[1], "relative")) 2893 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2894 else if (!strcmp(args[1], "absolute")) 2895 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2896 else { 2897 warnx("invalid rate-mode parameter \"%s\"", 2898 args[1]); 2899 errs++; 2900 } 2901 } else if (!get_sched_param("channel", args, &l)) 2902 op.u.params.channel = (int8_t)l; 2903 else if (!get_sched_param("class", args, &l)) 2904 op.u.params.cl = (int8_t)l; 2905 else if (!get_sched_param("min-rate", args, &l)) 2906 op.u.params.minrate = (int32_t)l; 2907 else if (!get_sched_param("max-rate", args, &l)) 2908 op.u.params.maxrate = (int32_t)l; 2909 else if (!get_sched_param("weight", args, &l)) 2910 op.u.params.weight = (int16_t)l; 2911 else if (!get_sched_param("pkt-size", args, &l)) 2912 op.u.params.pktsize = (int16_t)l; 2913 else { 2914 warnx("unknown scheduler parameter \"%s\"", args[0]); 2915 errs++; 2916 } 2917 } 2918 2919 /* 2920 * Catch some logical fallacies in terms of argument combinations here 2921 * so we can offer more than just the EINVAL return from the driver. 2922 * The driver will be able to catch a lot more issues since it knows 2923 * the specifics of the device hardware capabilities like how many 2924 * channels, classes, etc. the device supports. 2925 */ 2926 if (op.type < 0) { 2927 warnx("sched \"type\" parameter missing"); 2928 errs++; 2929 } 2930 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2931 if (op.u.config.minmax < 0) { 2932 warnx("sched config \"minmax\" parameter missing"); 2933 errs++; 2934 } 2935 } 2936 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2937 if (op.u.params.level < 0) { 2938 warnx("sched params \"level\" parameter missing"); 2939 errs++; 2940 } 2941 if (op.u.params.mode < 0 && 2942 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2943 warnx("sched params \"mode\" parameter missing"); 2944 errs++; 2945 } 2946 if (op.u.params.rateunit < 0 && 2947 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2948 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2949 warnx("sched params \"rate-unit\" parameter missing"); 2950 errs++; 2951 } 2952 if (op.u.params.ratemode < 0 && 2953 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2954 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2955 warnx("sched params \"rate-mode\" parameter missing"); 2956 errs++; 2957 } 2958 if (op.u.params.channel < 0) { 2959 warnx("sched params \"channel\" missing"); 2960 errs++; 2961 } 2962 if (op.u.params.cl < 0 && 2963 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2964 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) { 2965 warnx("sched params \"class\" missing"); 2966 errs++; 2967 } 2968 if (op.u.params.maxrate < 0 && 2969 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2970 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2971 warnx("sched params \"max-rate\" missing for " 2972 "rate-limit level"); 2973 errs++; 2974 } 2975 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR && 2976 (op.u.params.weight < 1 || op.u.params.weight > 99)) { 2977 warnx("sched params \"weight\" missing or invalid " 2978 "(not 1-99) for weighted-round-robin level"); 2979 errs++; 2980 } 2981 if (op.u.params.pktsize < 0 && 2982 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2983 warnx("sched params \"pkt-size\" missing for " 2984 "rate-limit level"); 2985 errs++; 2986 } 2987 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2988 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2989 warnx("sched params mode flow needs rate-mode absolute"); 2990 errs++; 2991 } 2992 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2993 !in_range(op.u.params.maxrate, 1, 100)) { 2994 warnx("sched params \"max-rate\" takes " 2995 "percentage value(1-100) for rate-mode relative"); 2996 errs++; 2997 } 2998 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2999 !in_range(op.u.params.maxrate, 1, 100000000)) { 3000 warnx("sched params \"max-rate\" takes " 3001 "value(1-100000000) for rate-mode absolute"); 3002 errs++; 3003 } 3004 if (op.u.params.maxrate > 0 && 3005 op.u.params.maxrate < op.u.params.minrate) { 3006 warnx("sched params \"max-rate\" is less than " 3007 "\"min-rate\""); 3008 errs++; 3009 } 3010 } 3011 3012 if (errs > 0) { 3013 warnx("%d error%s in sched-class command", errs, 3014 errs == 1 ? "" : "s"); 3015 return (EINVAL); 3016 } 3017 3018 return doit(CHELSIO_T4_SCHED_CLASS, &op); 3019 } 3020 3021 static int 3022 sched_queue(int argc, const char *argv[]) 3023 { 3024 struct t4_sched_queue op = {0}; 3025 char *p; 3026 long val; 3027 3028 if (argc != 3) { 3029 /* need "<port> <queue> <class> */ 3030 warnx("incorrect number of arguments."); 3031 return (EINVAL); 3032 } 3033 3034 p = str_to_number(argv[0], &val, NULL); 3035 if (*p || val > UCHAR_MAX) { 3036 warnx("invalid port id \"%s\"", argv[0]); 3037 return (EINVAL); 3038 } 3039 op.port = (uint8_t)val; 3040 3041 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 3042 op.queue = -1; 3043 else { 3044 p = str_to_number(argv[1], &val, NULL); 3045 if (*p || val < -1) { 3046 warnx("invalid queue \"%s\"", argv[1]); 3047 return (EINVAL); 3048 } 3049 op.queue = (int8_t)val; 3050 } 3051 3052 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 3053 op.cl = -1; 3054 else { 3055 p = str_to_number(argv[2], &val, NULL); 3056 if (*p || val < -1) { 3057 warnx("invalid class \"%s\"", argv[2]); 3058 return (EINVAL); 3059 } 3060 op.cl = (int8_t)val; 3061 } 3062 3063 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 3064 } 3065 3066 static int 3067 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 3068 int *pneg, struct offload_settings *os) 3069 { 3070 3071 while (*s == '!') { 3072 (*pneg)++; 3073 s++; 3074 } 3075 3076 if (!strcmp(s, "not")) { 3077 (*pneg)++; 3078 return (0); 3079 } 3080 3081 if (!strcmp(s, "offload")) { 3082 os->offload = (*pneg + 1) & 1; 3083 *pneg = 0; 3084 } else if (!strcmp(s , "coalesce")) { 3085 os->rx_coalesce = (*pneg + 1) & 1; 3086 *pneg = 0; 3087 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3088 os->tstamp = (*pneg + 1) & 1; 3089 *pneg = 0; 3090 } else if (!strcmp(s, "sack")) { 3091 os->sack = (*pneg + 1) & 1; 3092 *pneg = 0; 3093 } else if (!strcmp(s, "nagle")) { 3094 os->nagle = (*pneg + 1) & 1; 3095 *pneg = 0; 3096 } else if (!strcmp(s, "ecn")) { 3097 os->ecn = (*pneg + 1) & 1; 3098 *pneg = 0; 3099 } else if (!strcmp(s, "ddp")) { 3100 os->ddp = (*pneg + 1) & 1; 3101 *pneg = 0; 3102 } else if (!strcmp(s, "tls")) { 3103 os->tls = (*pneg + 1) & 1; 3104 *pneg = 0; 3105 } else { 3106 char *param, *p; 3107 long val; 3108 3109 /* Settings with additional parameter handled here. */ 3110 3111 if (*pneg) { 3112 warnx("\"%s\" is not a valid keyword, or it does not " 3113 "support negation.", s); 3114 return (EINVAL); 3115 } 3116 3117 while ((param = strsep(pnext, ws)) != NULL) { 3118 if (*param != '\0') 3119 break; 3120 } 3121 if (param == NULL) { 3122 warnx("\"%s\" is not a valid keyword, or it requires a " 3123 "parameter that has not been provided.", s); 3124 return (EINVAL); 3125 } 3126 3127 if (!strcmp(s, "cong")) { 3128 if (!strcmp(param, "reno")) 3129 os->cong_algo = 0; 3130 else if (!strcmp(param, "tahoe")) 3131 os->cong_algo = 1; 3132 else if (!strcmp(param, "newreno")) 3133 os->cong_algo = 2; 3134 else if (!strcmp(param, "highspeed")) 3135 os->cong_algo = 3; 3136 else { 3137 warnx("unknown congestion algorithm \"%s\".", s); 3138 return (EINVAL); 3139 } 3140 } else if (!strcmp(s, "class")) { 3141 val = -1; 3142 p = str_to_number(param, &val, NULL); 3143 /* (nsched_cls - 1) is spelled 15 here. */ 3144 if (*p || val < 0 || val > 15) { 3145 warnx("invalid scheduling class \"%s\". " 3146 "\"class\" needs an integer value where " 3147 "0 <= value <= 15", param); 3148 return (EINVAL); 3149 } 3150 os->sched_class = val; 3151 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3152 !strcmp(s, "rxq")) { 3153 if (!strcmp(param, "random")) { 3154 val = QUEUE_RANDOM; 3155 } else if (!strcmp(param, "roundrobin")) { 3156 val = QUEUE_ROUNDROBIN; 3157 } else { 3158 p = str_to_number(param, &val, NULL); 3159 if (*p || val < 0 || val > 0xffff) { 3160 warnx("invalid queue specification " 3161 "\"%s\". \"%s\" needs an integer" 3162 " value, \"random\", or " 3163 "\"roundrobin\".", param, s); 3164 return (EINVAL); 3165 } 3166 } 3167 if (!strcmp(s, "bind")) { 3168 os->txq = val; 3169 os->rxq = val; 3170 } else if (!strcmp(s, "txq")) { 3171 os->txq = val; 3172 } else if (!strcmp(s, "rxq")) { 3173 os->rxq = val; 3174 } else { 3175 return (EDOOFUS); 3176 } 3177 } else if (!strcmp(s, "mss")) { 3178 val = -1; 3179 p = str_to_number(param, &val, NULL); 3180 if (*p || val <= 0) { 3181 warnx("invalid MSS specification \"%s\". " 3182 "\"mss\" needs a positive integer value", 3183 param); 3184 return (EINVAL); 3185 } 3186 os->mss = val; 3187 } else { 3188 warnx("unknown settings keyword: \"%s\"", s); 3189 return (EINVAL); 3190 } 3191 } 3192 3193 return (0); 3194 } 3195 3196 static int 3197 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3198 { 3199 const char *ws = " \f\n\r\v\t"; 3200 char *settings, *s, *next; 3201 int rc, nsettings, neg; 3202 static const struct offload_settings default_settings = { 3203 .offload = 0, /* No settings imply !offload */ 3204 .rx_coalesce = -1, 3205 .cong_algo = -1, 3206 .sched_class = -1, 3207 .tstamp = -1, 3208 .sack = -1, 3209 .nagle = -1, 3210 .ecn = -1, 3211 .ddp = -1, 3212 .tls = -1, 3213 .txq = QUEUE_RANDOM, 3214 .rxq = QUEUE_RANDOM, 3215 .mss = -1, 3216 }; 3217 3218 *os = default_settings; 3219 3220 next = settings = strdup(settings_ro); 3221 if (settings == NULL) { 3222 warn (NULL); 3223 return (errno); 3224 } 3225 3226 nsettings = 0; 3227 rc = 0; 3228 neg = 0; 3229 while ((s = strsep(&next, ws)) != NULL) { 3230 if (*s == '\0') 3231 continue; 3232 nsettings++; 3233 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3234 if (rc != 0) 3235 goto done; 3236 } 3237 if (nsettings == 0) { 3238 warnx("no settings provided"); 3239 rc = EINVAL; 3240 goto done; 3241 } 3242 if (neg > 0) { 3243 warnx("%d stray negation(s) at end of offload settings", neg); 3244 rc = EINVAL; 3245 goto done; 3246 } 3247 done: 3248 free(settings); 3249 return (rc); 3250 } 3251 3252 static int 3253 isempty_line(char *line, size_t llen) 3254 { 3255 3256 /* skip leading whitespace */ 3257 while (isspace(*line)) { 3258 line++; 3259 llen--; 3260 } 3261 if (llen == 0 || *line == '#' || *line == '\n') 3262 return (1); 3263 3264 return (0); 3265 } 3266 3267 static int 3268 special_offload_rule(char *str) 3269 { 3270 3271 /* skip leading whitespaces */ 3272 while (isspace(*str)) 3273 str++; 3274 3275 /* check for special strings: "-", "all", "any" */ 3276 if (*str == '-') { 3277 str++; 3278 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3279 str += 3; 3280 } else { 3281 return (0); 3282 } 3283 3284 /* skip trailing whitespaces */ 3285 while (isspace(*str)) 3286 str++; 3287 3288 return (*str == '\0'); 3289 } 3290 3291 /* 3292 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3293 * 3294 * [<open-type>] <expr> => <settings> 3295 */ 3296 static int 3297 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3298 struct offload_rule *r) 3299 { 3300 char *expr, *settings, *s; 3301 3302 bzero(r, sizeof(*r)); 3303 3304 /* Skip leading whitespace. */ 3305 while (isspace(*line)) 3306 line++; 3307 /* Trim trailing whitespace */ 3308 s = &line[llen - 1]; 3309 while (isspace(*s)) { 3310 *s-- = '\0'; 3311 llen--; 3312 } 3313 3314 /* 3315 * First part of the rule: '[X]' where X = A/D/L/P 3316 */ 3317 if (*line++ != '[') { 3318 warnx("missing \"[\" on line %zd", lno); 3319 return (EINVAL); 3320 } 3321 switch (*line) { 3322 case 'A': 3323 case 'D': 3324 case 'L': 3325 case 'P': 3326 r->open_type = *line; 3327 break; 3328 default: 3329 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3330 return (EINVAL); 3331 } 3332 line++; 3333 if (*line++ != ']') { 3334 warnx("missing \"]\" after \"[%c\" on line %zd", 3335 r->open_type, lno); 3336 return (EINVAL); 3337 } 3338 3339 /* Skip whitespace. */ 3340 while (isspace(*line)) 3341 line++; 3342 3343 /* 3344 * Rest of the rule: <expr> => <settings> 3345 */ 3346 expr = line; 3347 s = strstr(line, "=>"); 3348 if (s == NULL) 3349 return (EINVAL); 3350 settings = s + 2; 3351 while (isspace(*settings)) 3352 settings++; 3353 *s = '\0'; 3354 3355 /* 3356 * <expr> is either a special name (all, any) or a pcap-filter(7). 3357 * In case of a special name the bpf_prog stays all-zero. 3358 */ 3359 if (!special_offload_rule(expr)) { 3360 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3361 PCAP_NETMASK_UNKNOWN) < 0) { 3362 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3363 lno, pcap_geterr(pd)); 3364 return (EINVAL); 3365 } 3366 } 3367 3368 /* settings to apply on a match. */ 3369 if (parse_offload_settings(settings, &r->settings) != 0) { 3370 warnx("failed to parse offload settings \"%s\" on line %zd", 3371 settings, lno); 3372 pcap_freecode(&r->bpf_prog); 3373 return (EINVAL); 3374 } 3375 3376 return (0); 3377 3378 } 3379 3380 /* 3381 * Note that op itself is not dynamically allocated. 3382 */ 3383 static void 3384 free_offload_policy(struct t4_offload_policy *op) 3385 { 3386 int i; 3387 3388 for (i = 0; i < op->nrules; i++) { 3389 /* 3390 * pcap_freecode can cope with empty bpf_prog, which is the case 3391 * for an rule that matches on 'any/all/-'. 3392 */ 3393 pcap_freecode(&op->rule[i].bpf_prog); 3394 } 3395 free(op->rule); 3396 op->nrules = 0; 3397 op->rule = NULL; 3398 } 3399 3400 #define REALLOC_STRIDE 32 3401 3402 /* 3403 * Fills up op->nrules and op->rule. 3404 */ 3405 static int 3406 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3407 { 3408 FILE *fp; 3409 char *line; 3410 int lno, maxrules, rc; 3411 size_t lcap, llen; 3412 struct offload_rule *r; 3413 pcap_t *pd; 3414 3415 fp = fopen(fname, "r"); 3416 if (fp == NULL) { 3417 warn("Unable to open file \"%s\"", fname); 3418 return (errno); 3419 } 3420 pd = pcap_open_dead(DLT_EN10MB, 128); 3421 if (pd == NULL) { 3422 warnx("Failed to open pcap device"); 3423 fclose(fp); 3424 return (EIO); 3425 } 3426 3427 rc = 0; 3428 lno = 0; 3429 lcap = 0; 3430 maxrules = 0; 3431 op->nrules = 0; 3432 op->rule = NULL; 3433 line = NULL; 3434 3435 while ((llen = getline(&line, &lcap, fp)) != -1) { 3436 lno++; 3437 3438 /* Skip empty lines. */ 3439 if (isempty_line(line, llen)) 3440 continue; 3441 3442 if (op->nrules == maxrules) { 3443 maxrules += REALLOC_STRIDE; 3444 r = realloc(op->rule, 3445 maxrules * sizeof(struct offload_rule)); 3446 if (r == NULL) { 3447 warnx("failed to allocate memory for %d rules", 3448 maxrules); 3449 rc = ENOMEM; 3450 goto done; 3451 } 3452 op->rule = r; 3453 } 3454 3455 r = &op->rule[op->nrules]; 3456 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3457 if (rc != 0) { 3458 warnx("Error parsing line %d of \"%s\"", lno, fname); 3459 goto done; 3460 } 3461 3462 op->nrules++; 3463 } 3464 free(line); 3465 3466 if (!feof(fp)) { 3467 warn("Error while reading from file \"%s\" at line %d", 3468 fname, lno); 3469 rc = errno; 3470 goto done; 3471 } 3472 3473 if (op->nrules == 0) { 3474 warnx("No valid rules found in \"%s\"", fname); 3475 rc = EINVAL; 3476 } 3477 done: 3478 pcap_close(pd); 3479 fclose(fp); 3480 if (rc != 0) { 3481 free_offload_policy(op); 3482 } 3483 3484 return (rc); 3485 } 3486 3487 static int 3488 load_offload_policy(int argc, const char *argv[]) 3489 { 3490 int rc = 0; 3491 const char *fname = argv[0]; 3492 struct t4_offload_policy op = {0}; 3493 3494 if (argc != 1) { 3495 warnx("incorrect number of arguments."); 3496 return (EINVAL); 3497 } 3498 3499 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3500 /* op.nrules is 0 and that means clear policy */ 3501 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3502 } 3503 3504 rc = parse_offload_policy(fname, &op); 3505 if (rc != 0) { 3506 /* Error message displayed already */ 3507 return (EINVAL); 3508 } 3509 3510 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3511 free_offload_policy(&op); 3512 3513 return (rc); 3514 } 3515 3516 static int 3517 display_clip(void) 3518 { 3519 size_t clip_buf_size = 4096; 3520 char *buf, name[32]; 3521 int rc; 3522 3523 buf = malloc(clip_buf_size); 3524 if (buf == NULL) { 3525 warn("%s", __func__); 3526 return (errno); 3527 } 3528 3529 snprintf(name, sizeof(name), "dev.t%unex.%u.misc.clip", chip_id, inst); 3530 rc = sysctlbyname(name, buf, &clip_buf_size, NULL, 0); 3531 if (rc != 0) { 3532 warn("sysctl %s", name); 3533 free(buf); 3534 return (errno); 3535 } 3536 3537 printf("%s\n", buf); 3538 free(buf); 3539 return (0); 3540 } 3541 3542 static int 3543 clip_cmd(int argc, const char *argv[]) 3544 { 3545 int rc, af = AF_INET6, add; 3546 struct t4_clip_addr ca = {0}; 3547 3548 if (argc == 1 && !strcmp(argv[0], "list")) { 3549 rc = display_clip(); 3550 return (rc); 3551 } 3552 3553 if (argc != 2) { 3554 warnx("incorrect number of arguments."); 3555 return (EINVAL); 3556 } 3557 3558 if (!strcmp(argv[0], "hold")) { 3559 add = 1; 3560 } else if (!strcmp(argv[0], "rel") || !strcmp(argv[0], "release")) { 3561 add = 0; 3562 } else { 3563 warnx("first argument must be \"hold\" or \"release\""); 3564 return (EINVAL); 3565 } 3566 3567 rc = parse_ipaddr(argv[0], argv, &af, &ca.addr[0], &ca.mask[0], 1); 3568 if (rc != 0) 3569 return (rc); 3570 3571 if (add) 3572 rc = doit(CHELSIO_T4_HOLD_CLIP_ADDR, &ca); 3573 else 3574 rc = doit(CHELSIO_T4_RELEASE_CLIP_ADDR, &ca); 3575 3576 return (rc); 3577 } 3578 3579 static int 3580 run_cmd(int argc, const char *argv[]) 3581 { 3582 int rc = -1; 3583 const char *cmd = argv[0]; 3584 3585 /* command */ 3586 argc--; 3587 argv++; 3588 3589 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3590 rc = register_io(argc, argv, 4); 3591 else if (!strcmp(cmd, "reg64")) 3592 rc = register_io(argc, argv, 8); 3593 else if (!strcmp(cmd, "regdump")) 3594 rc = dump_regs(argc, argv); 3595 else if (!strcmp(cmd, "filter")) 3596 rc = filter_cmd(argc, argv, 0); 3597 else if (!strcmp(cmd, "context")) 3598 rc = get_sge_context(argc, argv); 3599 else if (!strcmp(cmd, "loadfw")) 3600 rc = loadfw(argc, argv); 3601 else if (!strcmp(cmd, "memdump")) 3602 rc = memdump(argc, argv); 3603 else if (!strcmp(cmd, "tcb")) 3604 rc = read_tcb(argc, argv); 3605 else if (!strcmp(cmd, "i2c")) 3606 rc = read_i2c(argc, argv); 3607 else if (!strcmp(cmd, "clearstats")) 3608 rc = clearstats(argc, argv); 3609 else if (!strcmp(cmd, "tracer")) 3610 rc = tracer_cmd(argc, argv); 3611 else if (!strcmp(cmd, "modinfo")) 3612 rc = modinfo(argc, argv); 3613 else if (!strcmp(cmd, "sched-class")) 3614 rc = sched_class(argc, argv); 3615 else if (!strcmp(cmd, "sched-queue")) 3616 rc = sched_queue(argc, argv); 3617 else if (!strcmp(cmd, "loadcfg")) 3618 rc = loadcfg(argc, argv); 3619 else if (!strcmp(cmd, "loadboot")) 3620 rc = loadboot(argc, argv); 3621 else if (!strcmp(cmd, "loadboot-cfg")) 3622 rc = loadbootcfg(argc, argv); 3623 else if (!strcmp(cmd, "dumpstate")) 3624 rc = dumpstate(argc, argv); 3625 else if (!strcmp(cmd, "policy")) 3626 rc = load_offload_policy(argc, argv); 3627 else if (!strcmp(cmd, "hashfilter")) 3628 rc = filter_cmd(argc, argv, 1); 3629 else if (!strcmp(cmd, "clip")) 3630 rc = clip_cmd(argc, argv); 3631 else { 3632 rc = EINVAL; 3633 warnx("invalid command \"%s\"", cmd); 3634 } 3635 3636 return (rc); 3637 } 3638 3639 #define MAX_ARGS 15 3640 static int 3641 run_cmd_loop(void) 3642 { 3643 int i, rc = 0; 3644 char buffer[128], *buf; 3645 const char *args[MAX_ARGS + 1]; 3646 3647 /* 3648 * Simple loop: displays a "> " prompt and processes any input as a 3649 * cxgbetool command. You're supposed to enter only the part after 3650 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3651 */ 3652 for (;;) { 3653 fprintf(stdout, "> "); 3654 fflush(stdout); 3655 buf = fgets(buffer, sizeof(buffer), stdin); 3656 if (buf == NULL) { 3657 if (ferror(stdin)) { 3658 warn("stdin error"); 3659 rc = errno; /* errno from fgets */ 3660 } 3661 break; 3662 } 3663 3664 i = 0; 3665 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3666 if (args[i][0] != 0 && ++i == MAX_ARGS) 3667 break; 3668 } 3669 args[i] = 0; 3670 3671 if (i == 0) 3672 continue; /* skip empty line */ 3673 3674 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3675 break; 3676 3677 rc = run_cmd(i, args); 3678 } 3679 3680 /* rc normally comes from the last command (not including quit/exit) */ 3681 return (rc); 3682 } 3683 3684 static void 3685 parse_nexus_name(const char *s) 3686 { 3687 char junk; 3688 3689 if (sscanf(s, "t%unex%u%c", &chip_id, &inst, &junk) != 2) 3690 errx(EINVAL, "invalid nexus \"%s\"", s); 3691 nexus = s; 3692 } 3693 3694 int 3695 main(int argc, const char *argv[]) 3696 { 3697 int rc = -1; 3698 3699 progname = argv[0]; 3700 3701 if (argc == 2) { 3702 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3703 usage(stdout); 3704 exit(0); 3705 } 3706 } 3707 3708 if (argc < 3) { 3709 usage(stderr); 3710 exit(EINVAL); 3711 } 3712 3713 parse_nexus_name(argv[1]); 3714 3715 /* progname and nexus */ 3716 argc -= 2; 3717 argv += 2; 3718 3719 if (argc == 1 && !strcmp(argv[0], "stdio")) 3720 rc = run_cmd_loop(); 3721 else 3722 rc = run_cmd(argc, argv); 3723 3724 return (rc); 3725 } 3726