1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/ioctl.h> 30 #include <sys/mman.h> 31 #include <sys/socket.h> 32 #include <sys/stat.h> 33 #include <sys/sysctl.h> 34 35 #include <arpa/inet.h> 36 #include <net/ethernet.h> 37 #include <net/sff8472.h> 38 #include <netinet/in.h> 39 40 #include <ctype.h> 41 #include <err.h> 42 #include <errno.h> 43 #include <fcntl.h> 44 #include <limits.h> 45 #include <stdint.h> 46 #include <stdio.h> 47 #include <stdlib.h> 48 #include <string.h> 49 #include <unistd.h> 50 #include <pcap.h> 51 52 #include "t4_ioctl.h" 53 #include "tcb_common.h" 54 55 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 56 #define max(x, y) ((x) > (y) ? (x) : (y)) 57 58 static const char *progname, *nexus; 59 static int chip_id; /* 4 for T4, 5 for T5, and so on. */ 60 static int inst; /* instance of nexus device */ 61 62 struct reg_info { 63 const char *name; 64 uint32_t addr; 65 uint32_t len; 66 }; 67 68 struct mod_regs { 69 const char *name; 70 const struct reg_info *ri; 71 }; 72 73 struct field_desc { 74 const char *name; /* Field name */ 75 unsigned short start; /* Start bit position */ 76 unsigned short end; /* End bit position */ 77 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 78 unsigned char hex; /* Print field in hex instead of decimal */ 79 unsigned char islog2; /* Field contains the base-2 log of the value */ 80 }; 81 82 #include "reg_defs_t4.c" 83 #include "reg_defs_t5.c" 84 #include "reg_defs_t6.c" 85 #include "reg_defs_t4vf.c" 86 87 static void 88 usage(FILE *fp) 89 { 90 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 91 fprintf(fp, 92 "\tclearstats <port> clear port statistics\n" 93 "\tclip hold|release <ip6> hold/release an address\n" 94 "\tclip list list the CLIP table\n" 95 "\tcontext <type> <id> show an SGE context\n" 96 "\tdumpstate <dump.bin> dump chip state\n" 97 "\tfilter <idx> [<param> <val>] ... set a filter\n" 98 "\tfilter <idx> delete|clear [prio 1] delete a filter\n" 99 "\tfilter list list all filters\n" 100 "\tfilter mode [<match>] ... get/set global filter mode\n" 101 "\thashfilter [<param> <val>] ... set a hashfilter\n" 102 "\thashfilter <idx> delete|clear delete a hashfilter\n" 103 "\thashfilter list list all hashfilters\n" 104 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n" 105 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 106 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 107 "\tloadboot clear [pf|offset <val>] remove boot image\n" 108 "\tloadboot-cfg <bc.bin> install boot config\n" 109 "\tloadboot-cfg clear remove boot config\n" 110 "\tloadcfg <fw-config.txt> install configuration file\n" 111 "\tloadcfg clear remove configuration file\n" 112 "\tloadfw <fw-image.bin> install firmware\n" 113 "\tmemdump <addr> <len> dump a memory range\n" 114 "\tmodinfo <port> [raw] optics/cable information\n" 115 "\tpolicy <policy.txt> install offload policy\n" 116 "\tpolicy clear remove offload policy\n" 117 "\treg <address>[=<val>] read/write register\n" 118 "\treg64 <address>[=<val>] read/write 64 bit register\n" 119 "\tregdump [<module>] ... dump registers\n" 120 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 121 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 122 "\tstdio interactive mode\n" 123 "\ttcb <tid> read TCB\n" 124 "\ttracer <idx> tx<n>|rx<n>|lo<n> set and enable a tracer\n" 125 "\ttracer <idx> disable|enable disable or enable a tracer\n" 126 "\ttracer list list all tracers\n" 127 ); 128 } 129 130 static inline unsigned int 131 get_card_vers(unsigned int version) 132 { 133 return (version & 0x3ff); 134 } 135 136 static int 137 real_doit(unsigned long cmd, void *data, const char *cmdstr) 138 { 139 static int fd = -1; 140 int rc = 0; 141 142 if (fd == -1) { 143 char buf[64]; 144 145 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 146 if ((fd = open(buf, O_RDWR)) < 0) { 147 warn("open(%s)", nexus); 148 rc = errno; 149 return (rc); 150 } 151 } 152 153 rc = ioctl(fd, cmd, data); 154 if (rc < 0) { 155 warn("%s", cmdstr); 156 rc = errno; 157 } 158 159 return (rc); 160 } 161 #define doit(x, y) real_doit(x, y, #x) 162 163 static char * 164 str_to_number(const char *s, long *val, long long *vall) 165 { 166 char *p; 167 168 if (vall) 169 *vall = strtoll(s, &p, 0); 170 else if (val) 171 *val = strtol(s, &p, 0); 172 else 173 p = NULL; 174 175 return (p); 176 } 177 178 static int 179 read_reg(long addr, int size, long long *val) 180 { 181 struct t4_reg reg; 182 int rc; 183 184 reg.addr = (uint32_t) addr; 185 reg.size = (uint32_t) size; 186 reg.val = 0; 187 188 rc = doit(CHELSIO_T4_GETREG, ®); 189 190 *val = reg.val; 191 192 return (rc); 193 } 194 195 static int 196 write_reg(long addr, int size, long long val) 197 { 198 struct t4_reg reg; 199 200 reg.addr = (uint32_t) addr; 201 reg.size = (uint32_t) size; 202 reg.val = (uint64_t) val; 203 204 return doit(CHELSIO_T4_SETREG, ®); 205 } 206 207 static int 208 register_io(int argc, const char *argv[], int size) 209 { 210 char *p, *v; 211 long addr; 212 long long val; 213 int w = 0, rc; 214 215 if (argc == 1) { 216 /* <reg> OR <reg>=<value> */ 217 218 p = str_to_number(argv[0], &addr, NULL); 219 if (*p) { 220 if (*p != '=') { 221 warnx("invalid register \"%s\"", argv[0]); 222 return (EINVAL); 223 } 224 225 w = 1; 226 v = p + 1; 227 p = str_to_number(v, NULL, &val); 228 229 if (*p) { 230 warnx("invalid value \"%s\"", v); 231 return (EINVAL); 232 } 233 } 234 235 } else if (argc == 2) { 236 /* <reg> <value> */ 237 238 w = 1; 239 240 p = str_to_number(argv[0], &addr, NULL); 241 if (*p) { 242 warnx("invalid register \"%s\"", argv[0]); 243 return (EINVAL); 244 } 245 246 p = str_to_number(argv[1], NULL, &val); 247 if (*p) { 248 warnx("invalid value \"%s\"", argv[1]); 249 return (EINVAL); 250 } 251 } else { 252 warnx("reg: invalid number of arguments (%d)", argc); 253 return (EINVAL); 254 } 255 256 if (w) 257 rc = write_reg(addr, size, val); 258 else { 259 rc = read_reg(addr, size, &val); 260 if (rc == 0) 261 printf("0x%llx [%llu]\n", val, val); 262 } 263 264 return (rc); 265 } 266 267 static inline uint32_t 268 xtract(uint32_t val, int shift, int len) 269 { 270 return (val >> shift) & ((1 << len) - 1); 271 } 272 273 static int 274 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 275 { 276 uint32_t reg_val = 0; 277 278 for ( ; reg_array->name; ++reg_array) 279 if (!reg_array->len) { 280 reg_val = regs[reg_array->addr / 4]; 281 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 282 reg_array->name, reg_val, reg_val); 283 } else { 284 uint32_t v = xtract(reg_val, reg_array->addr, 285 reg_array->len); 286 287 printf(" %*u:%u %-47s %#-10x %u\n", 288 reg_array->addr < 10 ? 3 : 2, 289 reg_array->addr + reg_array->len - 1, 290 reg_array->addr, reg_array->name, v, v); 291 } 292 293 return (1); 294 } 295 296 static int 297 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 298 const struct mod_regs *modtab, int nmodules) 299 { 300 int i, j, match; 301 302 for (i = 0; i < argc; i++) { 303 for (j = 0; j < nmodules; j++) { 304 if (!strcmp(argv[i], modtab[j].name)) 305 break; 306 } 307 308 if (j == nmodules) { 309 warnx("invalid register block \"%s\"", argv[i]); 310 fprintf(stderr, "\nAvailable blocks:"); 311 for ( ; nmodules; nmodules--, modtab++) 312 fprintf(stderr, " %s", modtab->name); 313 fprintf(stderr, "\n"); 314 return (EINVAL); 315 } 316 } 317 318 for ( ; nmodules; nmodules--, modtab++) { 319 320 match = argc == 0 ? 1 : 0; 321 for (i = 0; !match && i < argc; i++) { 322 if (!strcmp(argv[i], modtab->name)) 323 match = 1; 324 } 325 326 if (match) 327 dump_block_regs(modtab->ri, regs); 328 } 329 330 return (0); 331 } 332 333 #define T4_MODREGS(name) { #name, t4_##name##_regs } 334 static int 335 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 336 { 337 static struct mod_regs t4_mod[] = { 338 T4_MODREGS(sge), 339 { "pci", t4_pcie_regs }, 340 T4_MODREGS(dbg), 341 T4_MODREGS(mc), 342 T4_MODREGS(ma), 343 { "edc0", t4_edc_0_regs }, 344 { "edc1", t4_edc_1_regs }, 345 T4_MODREGS(cim), 346 T4_MODREGS(tp), 347 T4_MODREGS(ulp_rx), 348 T4_MODREGS(ulp_tx), 349 { "pmrx", t4_pm_rx_regs }, 350 { "pmtx", t4_pm_tx_regs }, 351 T4_MODREGS(mps), 352 { "cplsw", t4_cpl_switch_regs }, 353 T4_MODREGS(smb), 354 { "i2c", t4_i2cm_regs }, 355 T4_MODREGS(mi), 356 T4_MODREGS(uart), 357 T4_MODREGS(pmu), 358 T4_MODREGS(sf), 359 T4_MODREGS(pl), 360 T4_MODREGS(le), 361 T4_MODREGS(ncsi), 362 T4_MODREGS(xgmac) 363 }; 364 365 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 366 } 367 #undef T4_MODREGS 368 369 #define T5_MODREGS(name) { #name, t5_##name##_regs } 370 static int 371 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 372 { 373 static struct mod_regs t5_mod[] = { 374 T5_MODREGS(sge), 375 { "pci", t5_pcie_regs }, 376 T5_MODREGS(dbg), 377 { "mc0", t5_mc_0_regs }, 378 { "mc1", t5_mc_1_regs }, 379 T5_MODREGS(ma), 380 { "edc0", t5_edc_t50_regs }, 381 { "edc1", t5_edc_t51_regs }, 382 T5_MODREGS(cim), 383 T5_MODREGS(tp), 384 { "ulprx", t5_ulp_rx_regs }, 385 { "ulptx", t5_ulp_tx_regs }, 386 { "pmrx", t5_pm_rx_regs }, 387 { "pmtx", t5_pm_tx_regs }, 388 T5_MODREGS(mps), 389 { "cplsw", t5_cpl_switch_regs }, 390 T5_MODREGS(smb), 391 { "i2c", t5_i2cm_regs }, 392 T5_MODREGS(mi), 393 T5_MODREGS(uart), 394 T5_MODREGS(pmu), 395 T5_MODREGS(sf), 396 T5_MODREGS(pl), 397 T5_MODREGS(le), 398 T5_MODREGS(ncsi), 399 T5_MODREGS(mac), 400 { "hma", t5_hma_t5_regs } 401 }; 402 403 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 404 } 405 #undef T5_MODREGS 406 407 #define T6_MODREGS(name) { #name, t6_##name##_regs } 408 static int 409 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 410 { 411 static struct mod_regs t6_mod[] = { 412 T6_MODREGS(sge), 413 { "pci", t6_pcie_regs }, 414 T6_MODREGS(dbg), 415 { "mc0", t6_mc_0_regs }, 416 T6_MODREGS(ma), 417 { "edc0", t6_edc_t60_regs }, 418 { "edc1", t6_edc_t61_regs }, 419 T6_MODREGS(cim), 420 T6_MODREGS(tp), 421 { "ulprx", t6_ulp_rx_regs }, 422 { "ulptx", t6_ulp_tx_regs }, 423 { "pmrx", t6_pm_rx_regs }, 424 { "pmtx", t6_pm_tx_regs }, 425 T6_MODREGS(mps), 426 { "cplsw", t6_cpl_switch_regs }, 427 T6_MODREGS(smb), 428 { "i2c", t6_i2cm_regs }, 429 T6_MODREGS(mi), 430 T6_MODREGS(uart), 431 T6_MODREGS(pmu), 432 T6_MODREGS(sf), 433 T6_MODREGS(pl), 434 T6_MODREGS(le), 435 T6_MODREGS(ncsi), 436 T6_MODREGS(mac), 437 { "hma", t6_hma_t6_regs } 438 }; 439 440 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 441 } 442 #undef T6_MODREGS 443 444 static int 445 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 446 { 447 static struct mod_regs t4vf_mod[] = { 448 { "sge", t4vf_sge_regs }, 449 { "mps", t4vf_mps_regs }, 450 { "pl", t4vf_pl_regs }, 451 { "mbdata", t4vf_mbdata_regs }, 452 { "cim", t4vf_cim_regs }, 453 }; 454 455 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 456 } 457 458 static int 459 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 460 { 461 static struct mod_regs t5vf_mod[] = { 462 { "sge", t5vf_sge_regs }, 463 { "mps", t4vf_mps_regs }, 464 { "pl", t5vf_pl_regs }, 465 { "mbdata", t4vf_mbdata_regs }, 466 { "cim", t4vf_cim_regs }, 467 }; 468 469 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 470 } 471 472 static int 473 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 474 { 475 static struct mod_regs t6vf_mod[] = { 476 { "sge", t5vf_sge_regs }, 477 { "mps", t4vf_mps_regs }, 478 { "pl", t6vf_pl_regs }, 479 { "mbdata", t4vf_mbdata_regs }, 480 { "cim", t4vf_cim_regs }, 481 }; 482 483 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 484 } 485 486 static int 487 dump_regs(int argc, const char *argv[]) 488 { 489 int vers, revision, rc; 490 struct t4_regdump regs; 491 uint32_t len; 492 493 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 494 regs.data = calloc(1, len); 495 if (regs.data == NULL) { 496 warnc(ENOMEM, "regdump"); 497 return (ENOMEM); 498 } 499 500 regs.len = len; 501 rc = doit(CHELSIO_T4_REGDUMP, ®s); 502 if (rc != 0) 503 return (rc); 504 505 vers = get_card_vers(regs.version); 506 revision = (regs.version >> 10) & 0x3f; 507 508 if (vers == 4) { 509 if (revision == 0x3f) 510 rc = dump_regs_t4vf(argc, argv, regs.data); 511 else 512 rc = dump_regs_t4(argc, argv, regs.data); 513 } else if (vers == 5) { 514 if (revision == 0x3f) 515 rc = dump_regs_t5vf(argc, argv, regs.data); 516 else 517 rc = dump_regs_t5(argc, argv, regs.data); 518 } else if (vers == 6) { 519 if (revision == 0x3f) 520 rc = dump_regs_t6vf(argc, argv, regs.data); 521 else 522 rc = dump_regs_t6(argc, argv, regs.data); 523 } else { 524 warnx("%s (type %d, rev %d) is not a known card.", 525 nexus, vers, revision); 526 return (ENOTSUP); 527 } 528 529 free(regs.data); 530 return (rc); 531 } 532 533 static void 534 do_show_info_header(uint32_t mode) 535 { 536 uint32_t i; 537 538 printf("%4s %8s", "Idx", "Hits"); 539 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 540 switch (mode & i) { 541 case T4_FILTER_FCoE: 542 printf(" FCoE"); 543 break; 544 case T4_FILTER_PORT: 545 printf(" Port"); 546 break; 547 case T4_FILTER_VNIC: 548 if (mode & T4_FILTER_IC_VNIC) 549 printf(" VFvld:PF:VF"); 550 else 551 printf(" vld:oVLAN"); 552 break; 553 case T4_FILTER_VLAN: 554 printf(" vld:VLAN"); 555 break; 556 case T4_FILTER_IP_TOS: 557 printf(" TOS"); 558 break; 559 case T4_FILTER_IP_PROTO: 560 printf(" Prot"); 561 break; 562 case T4_FILTER_ETH_TYPE: 563 printf(" EthType"); 564 break; 565 case T4_FILTER_MAC_IDX: 566 printf(" MACIdx"); 567 break; 568 case T4_FILTER_MPS_HIT_TYPE: 569 printf(" MPS"); 570 break; 571 case T4_FILTER_IP_FRAGMENT: 572 printf(" Frag"); 573 break; 574 default: 575 /* compressed filter field not enabled */ 576 break; 577 } 578 } 579 printf(" %20s %20s %9s %9s %s\n", 580 "DIP", "SIP", "DPORT", "SPORT", "Action"); 581 } 582 583 /* 584 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 585 * ordered tuple. If the parameter name in the argument sub-vector does not 586 * match the passed in parameter name, then a zero is returned for the 587 * function and no parsing is performed. If there is a match, then the value 588 * and optional mask are parsed and returned in the provided return value 589 * pointers. If no optional mask is specified, then a default mask of all 1s 590 * will be returned. 591 * 592 * An error in parsing the value[:mask] will result in an error message and 593 * program termination. 594 */ 595 static int 596 parse_val_mask(const char *param, const char *args[], uint32_t *val, 597 uint32_t *mask, int hashfilter) 598 { 599 long l; 600 char *p; 601 602 if (strcmp(param, args[0]) != 0) 603 return (EINVAL); 604 605 p = str_to_number(args[1], &l, NULL); 606 if (l >= 0 && l <= UINT32_MAX) { 607 *val = (uint32_t)l; 608 if (p > args[1]) { 609 if (p[0] == 0) { 610 *mask = ~0; 611 return (0); 612 } 613 614 if (p[0] == ':' && p[1] != 0) { 615 if (hashfilter) { 616 warnx("param %s: mask not allowed for " 617 "hashfilter or nat params", param); 618 return (EINVAL); 619 } 620 p = str_to_number(p + 1, &l, NULL); 621 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 622 *mask = (uint32_t)l; 623 return (0); 624 } 625 } 626 } 627 } 628 629 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 630 args[0], args[1]); 631 632 return (EINVAL); 633 } 634 635 /* 636 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 637 * ordered tuple. If the parameter name in the argument sub-vector does not 638 * match the passed in parameter name, then a zero is returned for the 639 * function and no parsing is performed. If there is a match, then the value 640 * and optional mask are parsed and returned in the provided return value 641 * pointers. If no optional mask is specified, then a default mask of all 1s 642 * will be returned. 643 * 644 * The value return parameter "afp" is used to specify the expected address 645 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 646 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 647 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 648 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 649 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 650 * returned in the first four bytes of the address and mask return values with 651 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 652 * 1, 2, 3}, respectively. 653 * 654 * An error in parsing the value[:mask] will result in an error message and 655 * program termination. 656 */ 657 static int 658 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 659 uint8_t mask[], int maskless) 660 { 661 const char *colon, *afn; 662 char *slash; 663 uint8_t *m; 664 int af, ret; 665 unsigned int masksize; 666 667 /* 668 * Is this our parameter? 669 */ 670 if (strcmp(param, args[0]) != 0) 671 return (EINVAL); 672 673 /* 674 * Fundamental IPv4 versus IPv6 selection. 675 */ 676 colon = strchr(args[1], ':'); 677 if (!colon) { 678 afn = "IPv4"; 679 af = AF_INET; 680 masksize = 32; 681 } else { 682 afn = "IPv6"; 683 af = AF_INET6; 684 masksize = 128; 685 } 686 if (*afp == AF_UNSPEC) 687 *afp = af; 688 else if (*afp != af) { 689 warnx("address %s is not of expected family %s", 690 args[1], *afp == AF_INET ? "IP" : "IPv6"); 691 return (EINVAL); 692 } 693 694 /* 695 * Parse address (temporarily stripping off any "/mask" 696 * specification). 697 */ 698 slash = strchr(args[1], '/'); 699 if (slash) 700 *slash = 0; 701 ret = inet_pton(af, args[1], addr); 702 if (slash) 703 *slash = '/'; 704 if (ret <= 0) { 705 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 706 return (EINVAL); 707 } 708 709 /* 710 * Parse optional mask specification. 711 */ 712 if (slash) { 713 char *p; 714 unsigned int prefix = strtoul(slash + 1, &p, 10); 715 716 if (maskless) { 717 warnx("mask cannot be provided for maskless specification"); 718 return (EINVAL); 719 } 720 721 if (p == slash + 1) { 722 warnx("missing address prefix for %s", param); 723 return (EINVAL); 724 } 725 if (*p) { 726 warnx("%s is not a valid address prefix", slash + 1); 727 return (EINVAL); 728 } 729 if (prefix > masksize) { 730 warnx("prefix %u is too long for an %s address", 731 prefix, afn); 732 return (EINVAL); 733 } 734 memset(mask, 0, masksize / 8); 735 masksize = prefix; 736 } 737 738 if (mask != NULL) { 739 /* 740 * Fill in mask. 741 */ 742 for (m = mask; masksize >= 8; m++, masksize -= 8) 743 *m = ~0; 744 if (masksize) 745 *m = ~0 << (8 - masksize); 746 } 747 748 return (0); 749 } 750 751 /* 752 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 753 * tuple. If the parameter name in the argument sub-vector does not match the 754 * passed in parameter name, then a zero is returned for the function and no 755 * parsing is performed. If there is a match, then the value is parsed and 756 * returned in the provided return value pointer. 757 */ 758 static int 759 parse_val(const char *param, const char *args[], uint32_t *val) 760 { 761 char *p; 762 long l; 763 764 if (strcmp(param, args[0]) != 0) 765 return (EINVAL); 766 767 p = str_to_number(args[1], &l, NULL); 768 if (*p || l < 0 || l > UINT32_MAX) { 769 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 770 return (EINVAL); 771 } 772 773 *val = (uint32_t)l; 774 return (0); 775 } 776 777 static void 778 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 779 { 780 int noctets, octet; 781 782 printf(" "); 783 if (type == 0) { 784 noctets = 4; 785 printf("%3s", " "); 786 } else 787 noctets = 16; 788 789 for (octet = 0; octet < noctets; octet++) 790 printf("%02x", addr[octet]); 791 printf("/"); 792 for (octet = 0; octet < noctets; octet++) 793 printf("%02x", addrm[octet]); 794 } 795 796 static void 797 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 798 { 799 uint32_t i; 800 801 printf("%4d", t->idx); 802 if (t->hits == UINT64_MAX) 803 printf(" %8s", "-"); 804 else 805 printf(" %8ju", t->hits); 806 807 /* 808 * Compressed header portion of filter. 809 */ 810 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 811 switch (mode & i) { 812 case T4_FILTER_FCoE: 813 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 814 break; 815 case T4_FILTER_PORT: 816 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 817 break; 818 case T4_FILTER_VNIC: 819 if (mode & T4_FILTER_IC_VNIC) { 820 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 821 t->fs.val.pfvf_vld, 822 (t->fs.val.vnic >> 13) & 0x7, 823 t->fs.val.vnic & 0x1fff, 824 t->fs.mask.pfvf_vld, 825 (t->fs.mask.vnic >> 13) & 0x7, 826 t->fs.mask.vnic & 0x1fff); 827 } else { 828 printf(" %1d:%04x/%1d:%04x", 829 t->fs.val.ovlan_vld, t->fs.val.vnic, 830 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 831 } 832 break; 833 case T4_FILTER_VLAN: 834 printf(" %1d:%04x/%1d:%04x", 835 t->fs.val.vlan_vld, t->fs.val.vlan, 836 t->fs.mask.vlan_vld, t->fs.mask.vlan); 837 break; 838 case T4_FILTER_IP_TOS: 839 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 840 break; 841 case T4_FILTER_IP_PROTO: 842 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 843 break; 844 case T4_FILTER_ETH_TYPE: 845 printf(" %04x/%04x", t->fs.val.ethtype, 846 t->fs.mask.ethtype); 847 break; 848 case T4_FILTER_MAC_IDX: 849 printf(" %03x/%03x", t->fs.val.macidx, 850 t->fs.mask.macidx); 851 break; 852 case T4_FILTER_MPS_HIT_TYPE: 853 printf(" %1x/%1x", t->fs.val.matchtype, 854 t->fs.mask.matchtype); 855 break; 856 case T4_FILTER_IP_FRAGMENT: 857 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 858 break; 859 default: 860 /* compressed filter field not enabled */ 861 break; 862 } 863 } 864 865 /* 866 * Fixed portion of filter. 867 */ 868 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 869 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 870 printf(" %04x/%04x %04x/%04x", 871 t->fs.val.dport, t->fs.mask.dport, 872 t->fs.val.sport, t->fs.mask.sport); 873 874 /* 875 * Variable length filter action. 876 */ 877 if (t->fs.action == FILTER_DROP) 878 printf(" Drop"); 879 else if (t->fs.action == FILTER_SWITCH) { 880 printf(" Switch: port=%d", t->fs.eport); 881 if (t->fs.newdmac) 882 printf( 883 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 884 ", l2tidx=%d", 885 t->fs.dmac[0], t->fs.dmac[1], 886 t->fs.dmac[2], t->fs.dmac[3], 887 t->fs.dmac[4], t->fs.dmac[5], 888 t->l2tidx); 889 if (t->fs.newsmac) 890 printf( 891 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 892 ", smtidx=%d", 893 t->fs.smac[0], t->fs.smac[1], 894 t->fs.smac[2], t->fs.smac[3], 895 t->fs.smac[4], t->fs.smac[5], 896 t->smtidx); 897 if (t->fs.newvlan == VLAN_REMOVE) 898 printf(", vlan=none"); 899 else if (t->fs.newvlan == VLAN_INSERT) 900 printf(", vlan=insert(%x)", t->fs.vlan); 901 else if (t->fs.newvlan == VLAN_REWRITE) 902 printf(", vlan=rewrite(%x)", t->fs.vlan); 903 } else { 904 printf(" Pass: Q="); 905 if (t->fs.dirsteer == 0) { 906 printf("RSS"); 907 if (t->fs.maskhash) 908 printf("(region %d)", t->fs.iq << 1); 909 } else { 910 printf("%d", t->fs.iq); 911 if (t->fs.dirsteerhash == 0) 912 printf("(QID)"); 913 else 914 printf("(hash)"); 915 } 916 } 917 if (chip_id <= 5 && t->fs.prio) 918 printf(" Prio"); 919 if (t->fs.rpttid) 920 printf(" RptTID"); 921 printf("\n"); 922 } 923 924 static int 925 show_filters(int hash) 926 { 927 uint32_t mode = 0, header, hpfilter = 0; 928 struct t4_filter t; 929 int rc; 930 931 /* Get the global filter mode first */ 932 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 933 if (rc != 0) 934 return (rc); 935 936 if (!hash && chip_id >= 6) { 937 header = 0; 938 bzero(&t, sizeof (t)); 939 t.idx = 0; 940 t.fs.hash = 0; 941 t.fs.prio = 1; 942 for (t.idx = 0; ; t.idx++) { 943 rc = doit(CHELSIO_T4_GET_FILTER, &t); 944 if (rc != 0 || t.idx == 0xffffffff) 945 break; 946 947 if (!header) { 948 printf("High Priority TCAM Region:\n"); 949 do_show_info_header(mode); 950 header = 1; 951 hpfilter = 1; 952 } 953 do_show_one_filter_info(&t, mode); 954 } 955 } 956 957 header = 0; 958 bzero(&t, sizeof (t)); 959 t.idx = 0; 960 t.fs.hash = hash; 961 for (t.idx = 0; ; t.idx++) { 962 rc = doit(CHELSIO_T4_GET_FILTER, &t); 963 if (rc != 0 || t.idx == 0xffffffff) 964 break; 965 966 if (!header) { 967 if (hpfilter) 968 printf("\nNormal Priority TCAM Region:\n"); 969 do_show_info_header(mode); 970 header = 1; 971 } 972 do_show_one_filter_info(&t, mode); 973 } 974 975 return (rc); 976 } 977 978 static int 979 get_filter_mode(int hashfilter) 980 { 981 uint32_t mode = hashfilter; 982 int rc; 983 984 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 985 if (rc != 0) 986 return (rc); 987 988 if (mode & T4_FILTER_IPv4) 989 printf("ipv4 "); 990 if (mode & T4_FILTER_IPv6) 991 printf("ipv6 "); 992 if (mode & T4_FILTER_IP_SADDR) 993 printf("sip "); 994 if (mode & T4_FILTER_IP_DADDR) 995 printf("dip "); 996 if (mode & T4_FILTER_IP_SPORT) 997 printf("sport "); 998 if (mode & T4_FILTER_IP_DPORT) 999 printf("dport "); 1000 if (mode & T4_FILTER_IP_FRAGMENT) 1001 printf("frag "); 1002 if (mode & T4_FILTER_MPS_HIT_TYPE) 1003 printf("matchtype "); 1004 if (mode & T4_FILTER_MAC_IDX) 1005 printf("macidx "); 1006 if (mode & T4_FILTER_ETH_TYPE) 1007 printf("ethtype "); 1008 if (mode & T4_FILTER_IP_PROTO) 1009 printf("proto "); 1010 if (mode & T4_FILTER_IP_TOS) 1011 printf("tos "); 1012 if (mode & T4_FILTER_VLAN) 1013 printf("vlan "); 1014 if (mode & T4_FILTER_VNIC) { 1015 if (mode & T4_FILTER_IC_VNIC) 1016 printf("vnic_id "); 1017 else if (mode & T4_FILTER_IC_ENCAP) 1018 printf("encap "); 1019 else 1020 printf("ovlan "); 1021 } 1022 if (mode & T4_FILTER_PORT) 1023 printf("iport "); 1024 if (mode & T4_FILTER_FCoE) 1025 printf("fcoe "); 1026 printf("\n"); 1027 1028 return (0); 1029 } 1030 1031 static int 1032 set_filter_mode(int argc, const char *argv[], int hashfilter) 1033 { 1034 uint32_t mode = 0; 1035 int vnic = 0, ovlan = 0, invalid = 0; 1036 1037 for (; argc; argc--, argv++) { 1038 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") || 1039 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") || 1040 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) { 1041 /* These are always available and enabled. */ 1042 continue; 1043 } else if (!strcmp(argv[0], "frag")) 1044 mode |= T4_FILTER_IP_FRAGMENT; 1045 else if (!strcmp(argv[0], "matchtype")) 1046 mode |= T4_FILTER_MPS_HIT_TYPE; 1047 else if (!strcmp(argv[0], "macidx")) 1048 mode |= T4_FILTER_MAC_IDX; 1049 else if (!strcmp(argv[0], "ethtype")) 1050 mode |= T4_FILTER_ETH_TYPE; 1051 else if (!strcmp(argv[0], "proto")) 1052 mode |= T4_FILTER_IP_PROTO; 1053 else if (!strcmp(argv[0], "tos")) 1054 mode |= T4_FILTER_IP_TOS; 1055 else if (!strcmp(argv[0], "vlan")) 1056 mode |= T4_FILTER_VLAN; 1057 else if (!strcmp(argv[0], "ovlan")) { 1058 mode |= T4_FILTER_VNIC; 1059 ovlan = 1; 1060 } else if (!strcmp(argv[0], "vnic_id")) { 1061 mode |= T4_FILTER_VNIC; 1062 mode |= T4_FILTER_IC_VNIC; 1063 vnic = 1; 1064 } 1065 #ifdef notyet 1066 else if (!strcmp(argv[0], "encap")) { 1067 mode |= T4_FILTER_VNIC; 1068 mode |= T4_FILTER_IC_ENCAP; 1069 encap = 1; 1070 } 1071 #endif 1072 else if (!strcmp(argv[0], "iport")) 1073 mode |= T4_FILTER_PORT; 1074 else if (!strcmp(argv[0], "fcoe")) 1075 mode |= T4_FILTER_FCoE; 1076 else { 1077 warnx("\"%s\" is not valid while setting filter mode.", 1078 argv[0]); 1079 invalid++; 1080 } 1081 } 1082 1083 if (vnic + ovlan > 1) { 1084 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1085 invalid++; 1086 } 1087 1088 if (invalid > 0) 1089 return (EINVAL); 1090 1091 if (hashfilter) 1092 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode); 1093 else 1094 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1095 } 1096 1097 static int 1098 del_filter(uint32_t idx, int prio, int hashfilter) 1099 { 1100 struct t4_filter t; 1101 1102 t.fs.prio = prio; 1103 t.fs.hash = hashfilter; 1104 t.idx = idx; 1105 1106 return doit(CHELSIO_T4_DEL_FILTER, &t); 1107 } 1108 1109 #define MAX_VLANID (4095) 1110 1111 static int 1112 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1113 { 1114 int rc, af = AF_UNSPEC, start_arg = 0; 1115 struct t4_filter t; 1116 1117 if (argc < 2) { 1118 warnc(EINVAL, "%s", __func__); 1119 return (EINVAL); 1120 }; 1121 bzero(&t, sizeof (t)); 1122 t.idx = idx; 1123 t.fs.hitcnts = 1; 1124 t.fs.hash = hash; 1125 1126 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1127 const char **args = &argv[start_arg]; 1128 uint32_t val, mask; 1129 1130 if (!strcmp(argv[start_arg], "type")) { 1131 int newaf; 1132 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1133 newaf = AF_INET; 1134 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1135 newaf = AF_INET6; 1136 else { 1137 warnx("invalid type \"%s\"; " 1138 "must be one of \"ipv4\" or \"ipv6\"", 1139 argv[start_arg + 1]); 1140 return (EINVAL); 1141 } 1142 1143 if (af != AF_UNSPEC && af != newaf) { 1144 warnx("conflicting IPv4/IPv6 specifications."); 1145 return (EINVAL); 1146 } 1147 af = newaf; 1148 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1149 t.fs.val.fcoe = val; 1150 t.fs.mask.fcoe = mask; 1151 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1152 t.fs.val.iport = val; 1153 t.fs.mask.iport = mask; 1154 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1155 t.fs.val.vnic = val; 1156 t.fs.mask.vnic = mask; 1157 t.fs.val.ovlan_vld = 1; 1158 t.fs.mask.ovlan_vld = 1; 1159 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1160 t.fs.val.vlan = val; 1161 t.fs.mask.vlan = mask; 1162 t.fs.val.vlan_vld = 1; 1163 t.fs.mask.vlan_vld = 1; 1164 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1165 t.fs.val.vnic &= 0x1fff; 1166 t.fs.val.vnic |= (val & 0x7) << 13; 1167 t.fs.mask.vnic &= 0x1fff; 1168 t.fs.mask.vnic |= (mask & 0x7) << 13; 1169 t.fs.val.pfvf_vld = 1; 1170 t.fs.mask.pfvf_vld = 1; 1171 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1172 t.fs.val.vnic &= 0xe000; 1173 t.fs.val.vnic |= val & 0x1fff; 1174 t.fs.mask.vnic &= 0xe000; 1175 t.fs.mask.vnic |= mask & 0x1fff; 1176 t.fs.val.pfvf_vld = 1; 1177 t.fs.mask.pfvf_vld = 1; 1178 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1179 t.fs.val.tos = val; 1180 t.fs.mask.tos = mask; 1181 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1182 t.fs.val.proto = val; 1183 t.fs.mask.proto = mask; 1184 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1185 t.fs.val.ethtype = val; 1186 t.fs.mask.ethtype = mask; 1187 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1188 t.fs.val.macidx = val; 1189 t.fs.mask.macidx = mask; 1190 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1191 t.fs.val.matchtype = val; 1192 t.fs.mask.matchtype = mask; 1193 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1194 t.fs.val.frag = val; 1195 t.fs.mask.frag = mask; 1196 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1197 t.fs.val.dport = val; 1198 t.fs.mask.dport = mask; 1199 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1200 t.fs.val.sport = val; 1201 t.fs.mask.sport = mask; 1202 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1203 t.fs.mask.dip, hash)) { 1204 /* nada */; 1205 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1206 t.fs.mask.sip, hash)) { 1207 /* nada */; 1208 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1209 /*nada*/; 1210 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1211 /*nada*/ 1212 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1213 t.fs.nat_dport = val; 1214 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1215 t.fs.nat_sport = val; 1216 } else if (!strcmp(argv[start_arg], "action")) { 1217 if (!strcmp(argv[start_arg + 1], "pass")) 1218 t.fs.action = FILTER_PASS; 1219 else if (!strcmp(argv[start_arg + 1], "drop")) 1220 t.fs.action = FILTER_DROP; 1221 else if (!strcmp(argv[start_arg + 1], "switch")) 1222 t.fs.action = FILTER_SWITCH; 1223 else { 1224 warnx("invalid action \"%s\"; must be one of" 1225 " \"pass\", \"drop\" or \"switch\"", 1226 argv[start_arg + 1]); 1227 return (EINVAL); 1228 } 1229 } else if (!parse_val("hitcnts", args, &val)) { 1230 t.fs.hitcnts = val; 1231 } else if (!parse_val("prio", args, &val)) { 1232 if (hash) { 1233 warnx("Hashfilters doesn't support \"prio\"\n"); 1234 return (EINVAL); 1235 } 1236 if (val != 0 && val != 1) { 1237 warnx("invalid priority \"%s\"; must be" 1238 " \"0\" or \"1\"", argv[start_arg + 1]); 1239 return (EINVAL); 1240 } 1241 t.fs.prio = val; 1242 } else if (!parse_val("rpttid", args, &val)) { 1243 t.fs.rpttid = 1; 1244 } else if (!parse_val("queue", args, &val)) { 1245 t.fs.dirsteer = 1; /* direct steer */ 1246 t.fs.iq = val; /* to the iq with this cntxt_id */ 1247 } else if (!parse_val("tcbhash", args, &val)) { 1248 t.fs.dirsteerhash = 1; /* direct steer */ 1249 /* XXX: use (val << 1) as the rss_hash? */ 1250 t.fs.iq = val; 1251 } else if (!parse_val("tcbrss", args, &val)) { 1252 t.fs.maskhash = 1; /* steer to RSS region */ 1253 /* 1254 * val = start idx of the region but the internal TCB 1255 * field is 10b only and is left shifted by 1 before use. 1256 */ 1257 t.fs.iq = val >> 1; 1258 } else if (!parse_val("eport", args, &val)) { 1259 t.fs.eport = val; 1260 } else if (!parse_val("swapmac", args, &val)) { 1261 t.fs.swapmac = 1; 1262 } else if (!strcmp(argv[start_arg], "nat")) { 1263 if (!strcmp(argv[start_arg + 1], "dip")) 1264 t.fs.nat_mode = NAT_MODE_DIP; 1265 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1266 t.fs.nat_mode = NAT_MODE_DIP_DP; 1267 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1268 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1269 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1270 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1271 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1272 t.fs.nat_mode = NAT_MODE_SIP_SP; 1273 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1274 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1275 else if (!strcmp(argv[start_arg + 1], "all")) 1276 t.fs.nat_mode = NAT_MODE_ALL; 1277 else { 1278 warnx("unknown nat type \"%s\"; known types are dip, " 1279 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1280 "dip-sip-sp, and all", argv[start_arg + 1]); 1281 return (EINVAL); 1282 } 1283 } else if (!parse_val("natseq", args, &val)) { 1284 t.fs.nat_seq_chk = val; 1285 } else if (!parse_val("natflag", args, &val)) { 1286 t.fs.nat_flag_chk = 1; 1287 } else if (!strcmp(argv[start_arg], "dmac")) { 1288 struct ether_addr *daddr; 1289 1290 daddr = ether_aton(argv[start_arg + 1]); 1291 if (daddr == NULL) { 1292 warnx("invalid dmac address \"%s\"", 1293 argv[start_arg + 1]); 1294 return (EINVAL); 1295 } 1296 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1297 t.fs.newdmac = 1; 1298 } else if (!strcmp(argv[start_arg], "smac")) { 1299 struct ether_addr *saddr; 1300 1301 saddr = ether_aton(argv[start_arg + 1]); 1302 if (saddr == NULL) { 1303 warnx("invalid smac address \"%s\"", 1304 argv[start_arg + 1]); 1305 return (EINVAL); 1306 } 1307 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1308 t.fs.newsmac = 1; 1309 } else if (!strcmp(argv[start_arg], "vlan")) { 1310 char *p; 1311 if (!strcmp(argv[start_arg + 1], "none")) { 1312 t.fs.newvlan = VLAN_REMOVE; 1313 } else if (argv[start_arg + 1][0] == '=') { 1314 t.fs.newvlan = VLAN_REWRITE; 1315 } else if (argv[start_arg + 1][0] == '+') { 1316 t.fs.newvlan = VLAN_INSERT; 1317 } else { 1318 warnx("unknown vlan parameter \"%s\"; must" 1319 " be one of \"none\", \"=<vlan>\", " 1320 " \"+<vlan>\"", argv[start_arg + 1]); 1321 return (EINVAL); 1322 } 1323 if (t.fs.newvlan == VLAN_REWRITE || 1324 t.fs.newvlan == VLAN_INSERT) { 1325 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1326 &p, 0); 1327 if (p == argv[start_arg + 1] + 1 || p[0] != 0 || 1328 t.fs.vlan > MAX_VLANID) { 1329 warnx("invalid vlan \"%s\"", 1330 argv[start_arg + 1]); 1331 return (EINVAL); 1332 } 1333 } 1334 } else { 1335 warnx("invalid parameter \"%s\"", argv[start_arg]); 1336 return (EINVAL); 1337 } 1338 } 1339 if (start_arg != argc) { 1340 warnx("no value for \"%s\"", argv[start_arg]); 1341 return (EINVAL); 1342 } 1343 1344 /* 1345 * Check basic sanity of option combinations. 1346 */ 1347 if (t.fs.action != FILTER_SWITCH && 1348 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1349 t.fs.swapmac || t.fs.nat_mode)) { 1350 warnx("port, dmac, smac, vlan, and nat only make sense with" 1351 " \"action switch\""); 1352 return (EINVAL); 1353 } 1354 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1355 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1356 warnx("nat params only make sense with valid nat mode"); 1357 return (EINVAL); 1358 } 1359 if (t.fs.action != FILTER_PASS && 1360 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1361 warnx("rpttid, queue and tcbhash don't make sense with" 1362 " action \"drop\" or \"switch\""); 1363 return (EINVAL); 1364 } 1365 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1366 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1367 return (EINVAL); 1368 } 1369 1370 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1371 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1372 if (hash && rc == 0) 1373 printf("%d\n", t.idx); 1374 return (rc); 1375 } 1376 1377 static int 1378 filter_cmd(int argc, const char *argv[], int hashfilter) 1379 { 1380 long long val; 1381 uint32_t idx; 1382 char *s; 1383 1384 if (argc == 0) { 1385 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1386 return (EINVAL); 1387 }; 1388 1389 /* list */ 1390 if (strcmp(argv[0], "list") == 0) { 1391 if (argc != 1) 1392 warnx("trailing arguments after \"list\" ignored."); 1393 1394 return show_filters(hashfilter); 1395 } 1396 1397 /* mode */ 1398 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1399 return get_filter_mode(hashfilter); 1400 1401 /* mode <mode> */ 1402 if (strcmp(argv[0], "mode") == 0) 1403 return set_filter_mode(argc - 1, argv + 1, hashfilter); 1404 1405 /* <idx> ... */ 1406 s = str_to_number(argv[0], NULL, &val); 1407 if (*s || val < 0 || val > 0xffffffffU) { 1408 if (hashfilter) { 1409 /* 1410 * No numeric index means this must be a request to 1411 * create a new hashfilter and we are already at the 1412 * parameter/value list. 1413 */ 1414 idx = (uint32_t) -1; 1415 goto setf; 1416 } 1417 warnx("\"%s\" is neither an index nor a filter subcommand.", 1418 argv[0]); 1419 return (EINVAL); 1420 } 1421 idx = (uint32_t) val; 1422 1423 /* <idx> delete|clear [prio 0|1] */ 1424 if ((argc == 2 || argc == 4) && 1425 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1426 int prio = 0; 1427 1428 if (argc == 4) { 1429 if (hashfilter) { 1430 warnx("stray arguments after \"%s\".", argv[1]); 1431 return (EINVAL); 1432 } 1433 1434 if (strcmp(argv[2], "prio") != 0) { 1435 warnx("\"prio\" is the only valid keyword " 1436 "after \"%s\", found \"%s\" instead.", 1437 argv[1], argv[2]); 1438 return (EINVAL); 1439 } 1440 1441 s = str_to_number(argv[3], NULL, &val); 1442 if (*s || val < 0 || val > 1) { 1443 warnx("%s \"%s\"; must be \"0\" or \"1\".", 1444 argv[2], argv[3]); 1445 return (EINVAL); 1446 } 1447 prio = (int)val; 1448 } 1449 return del_filter(idx, prio, hashfilter); 1450 } 1451 1452 /* skip <idx> */ 1453 argc--; 1454 argv++; 1455 1456 setf: 1457 /* [<param> <val>] ... */ 1458 return set_filter(idx, argc, argv, hashfilter); 1459 } 1460 1461 /* 1462 * Shows the fields of a multi-word structure. The structure is considered to 1463 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1464 * whose fields are described by @fd. The 32-bit words are given in @words 1465 * starting with the least significant 32-bit word. 1466 */ 1467 static void 1468 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1469 { 1470 unsigned int w = 0; 1471 const struct field_desc *p; 1472 1473 for (p = fd; p->name; p++) 1474 w = max(w, strlen(p->name)); 1475 1476 while (fd->name) { 1477 unsigned long long data; 1478 int first_word = fd->start / 32; 1479 int shift = fd->start % 32; 1480 int width = fd->end - fd->start + 1; 1481 unsigned long long mask = (1ULL << width) - 1; 1482 1483 data = (words[first_word] >> shift) | 1484 ((uint64_t)words[first_word + 1] << (32 - shift)); 1485 if (shift) 1486 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1487 data &= mask; 1488 if (fd->islog2) 1489 data = 1 << data; 1490 printf("%-*s ", w, fd->name); 1491 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1492 fd++; 1493 } 1494 } 1495 1496 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1497 #define FIELD1(name, start) FIELD(name, start, start) 1498 1499 static void 1500 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1501 { 1502 static struct field_desc egress_t5[] = { 1503 FIELD("DCA_ST:", 181, 191), 1504 FIELD1("StatusPgNS:", 180), 1505 FIELD1("StatusPgRO:", 179), 1506 FIELD1("FetchNS:", 178), 1507 FIELD1("FetchRO:", 177), 1508 FIELD1("Valid:", 176), 1509 FIELD("PCIeDataChannel:", 174, 175), 1510 FIELD1("StatusPgTPHintEn:", 173), 1511 FIELD("StatusPgTPHint:", 171, 172), 1512 FIELD1("FetchTPHintEn:", 170), 1513 FIELD("FetchTPHint:", 168, 169), 1514 FIELD1("FCThreshOverride:", 167), 1515 { "WRLength:", 162, 166, 9, 0, 1 }, 1516 FIELD1("WRLengthKnown:", 161), 1517 FIELD1("ReschedulePending:", 160), 1518 FIELD1("OnChipQueue:", 159), 1519 FIELD1("FetchSizeMode:", 158), 1520 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1521 FIELD1("FLMPacking:", 155), 1522 FIELD("FetchBurstMax:", 153, 154), 1523 FIELD("uPToken:", 133, 152), 1524 FIELD1("uPTokenEn:", 132), 1525 FIELD1("UserModeIO:", 131), 1526 FIELD("uPFLCredits:", 123, 130), 1527 FIELD1("uPFLCreditEn:", 122), 1528 FIELD("FID:", 111, 121), 1529 FIELD("HostFCMode:", 109, 110), 1530 FIELD1("HostFCOwner:", 108), 1531 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1532 FIELD("CIDX:", 89, 104), 1533 FIELD("PIDX:", 73, 88), 1534 { "BaseAddress:", 18, 72, 9, 1 }, 1535 FIELD("QueueSize:", 2, 17), 1536 FIELD1("QueueType:", 1), 1537 FIELD1("CachePriority:", 0), 1538 { NULL } 1539 }; 1540 static struct field_desc egress_t6[] = { 1541 FIELD("DCA_ST:", 181, 191), 1542 FIELD1("StatusPgNS:", 180), 1543 FIELD1("StatusPgRO:", 179), 1544 FIELD1("FetchNS:", 178), 1545 FIELD1("FetchRO:", 177), 1546 FIELD1("Valid:", 176), 1547 FIELD1("ReschedulePending_1:", 175), 1548 FIELD1("PCIeDataChannel:", 174), 1549 FIELD1("StatusPgTPHintEn:", 173), 1550 FIELD("StatusPgTPHint:", 171, 172), 1551 FIELD1("FetchTPHintEn:", 170), 1552 FIELD("FetchTPHint:", 168, 169), 1553 FIELD1("FCThreshOverride:", 167), 1554 { "WRLength:", 162, 166, 9, 0, 1 }, 1555 FIELD1("WRLengthKnown:", 161), 1556 FIELD1("ReschedulePending:", 160), 1557 FIELD("TimerIx:", 157, 159), 1558 FIELD1("FetchBurstMin:", 156), 1559 FIELD1("FLMPacking:", 155), 1560 FIELD("FetchBurstMax:", 153, 154), 1561 FIELD("uPToken:", 133, 152), 1562 FIELD1("uPTokenEn:", 132), 1563 FIELD1("UserModeIO:", 131), 1564 FIELD("uPFLCredits:", 123, 130), 1565 FIELD1("uPFLCreditEn:", 122), 1566 FIELD("FID:", 111, 121), 1567 FIELD("HostFCMode:", 109, 110), 1568 FIELD1("HostFCOwner:", 108), 1569 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1570 FIELD("CIDX:", 89, 104), 1571 FIELD("PIDX:", 73, 88), 1572 { "BaseAddress:", 18, 72, 9, 1 }, 1573 FIELD("QueueSize:", 2, 17), 1574 FIELD1("QueueType:", 1), 1575 FIELD1("FetchSizeMode:", 0), 1576 { NULL } 1577 }; 1578 static struct field_desc fl_t5[] = { 1579 FIELD("DCA_ST:", 181, 191), 1580 FIELD1("StatusPgNS:", 180), 1581 FIELD1("StatusPgRO:", 179), 1582 FIELD1("FetchNS:", 178), 1583 FIELD1("FetchRO:", 177), 1584 FIELD1("Valid:", 176), 1585 FIELD("PCIeDataChannel:", 174, 175), 1586 FIELD1("StatusPgTPHintEn:", 173), 1587 FIELD("StatusPgTPHint:", 171, 172), 1588 FIELD1("FetchTPHintEn:", 170), 1589 FIELD("FetchTPHint:", 168, 169), 1590 FIELD1("FCThreshOverride:", 167), 1591 FIELD1("ReschedulePending:", 160), 1592 FIELD1("OnChipQueue:", 159), 1593 FIELD1("FetchSizeMode:", 158), 1594 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1595 FIELD1("FLMPacking:", 155), 1596 FIELD("FetchBurstMax:", 153, 154), 1597 FIELD1("FLMcongMode:", 152), 1598 FIELD("MaxuPFLCredits:", 144, 151), 1599 FIELD("FLMcontextID:", 133, 143), 1600 FIELD1("uPTokenEn:", 132), 1601 FIELD1("UserModeIO:", 131), 1602 FIELD("uPFLCredits:", 123, 130), 1603 FIELD1("uPFLCreditEn:", 122), 1604 FIELD("FID:", 111, 121), 1605 FIELD("HostFCMode:", 109, 110), 1606 FIELD1("HostFCOwner:", 108), 1607 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1608 FIELD("CIDX:", 89, 104), 1609 FIELD("PIDX:", 73, 88), 1610 { "BaseAddress:", 18, 72, 9, 1 }, 1611 FIELD("QueueSize:", 2, 17), 1612 FIELD1("QueueType:", 1), 1613 FIELD1("CachePriority:", 0), 1614 { NULL } 1615 }; 1616 static struct field_desc ingress_t5[] = { 1617 FIELD("DCA_ST:", 143, 153), 1618 FIELD1("ISCSICoalescing:", 142), 1619 FIELD1("Queue_Valid:", 141), 1620 FIELD1("TimerPending:", 140), 1621 FIELD1("DropRSS:", 139), 1622 FIELD("PCIeChannel:", 137, 138), 1623 FIELD1("SEInterruptArmed:", 136), 1624 FIELD1("CongestionMgtEnable:", 135), 1625 FIELD1("NoSnoop:", 134), 1626 FIELD1("RelaxedOrdering:", 133), 1627 FIELD1("GTSmode:", 132), 1628 FIELD1("TPHintEn:", 131), 1629 FIELD("TPHint:", 129, 130), 1630 FIELD1("UpdateScheduling:", 128), 1631 FIELD("UpdateDelivery:", 126, 127), 1632 FIELD1("InterruptSent:", 125), 1633 FIELD("InterruptIDX:", 114, 124), 1634 FIELD1("InterruptDestination:", 113), 1635 FIELD1("InterruptArmed:", 112), 1636 FIELD("RxIntCounter:", 106, 111), 1637 FIELD("RxIntCounterThreshold:", 104, 105), 1638 FIELD1("Generation:", 103), 1639 { "BaseAddress:", 48, 102, 9, 1 }, 1640 FIELD("PIDX:", 32, 47), 1641 FIELD("CIDX:", 16, 31), 1642 { "QueueSize:", 4, 15, 4, 0 }, 1643 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1644 FIELD1("QueueEntryOverride:", 1), 1645 FIELD1("CachePriority:", 0), 1646 { NULL } 1647 }; 1648 static struct field_desc ingress_t6[] = { 1649 FIELD1("SP_NS:", 158), 1650 FIELD1("SP_RO:", 157), 1651 FIELD1("SP_TPHintEn:", 156), 1652 FIELD("SP_TPHint:", 154, 155), 1653 FIELD("DCA_ST:", 143, 153), 1654 FIELD1("ISCSICoalescing:", 142), 1655 FIELD1("Queue_Valid:", 141), 1656 FIELD1("TimerPending:", 140), 1657 FIELD1("DropRSS:", 139), 1658 FIELD("PCIeChannel:", 137, 138), 1659 FIELD1("SEInterruptArmed:", 136), 1660 FIELD1("CongestionMgtEnable:", 135), 1661 FIELD1("NoSnoop:", 134), 1662 FIELD1("RelaxedOrdering:", 133), 1663 FIELD1("GTSmode:", 132), 1664 FIELD1("TPHintEn:", 131), 1665 FIELD("TPHint:", 129, 130), 1666 FIELD1("UpdateScheduling:", 128), 1667 FIELD("UpdateDelivery:", 126, 127), 1668 FIELD1("InterruptSent:", 125), 1669 FIELD("InterruptIDX:", 114, 124), 1670 FIELD1("InterruptDestination:", 113), 1671 FIELD1("InterruptArmed:", 112), 1672 FIELD("RxIntCounter:", 106, 111), 1673 FIELD("RxIntCounterThreshold:", 104, 105), 1674 FIELD1("Generation:", 103), 1675 { "BaseAddress:", 48, 102, 9, 1 }, 1676 FIELD("PIDX:", 32, 47), 1677 FIELD("CIDX:", 16, 31), 1678 { "QueueSize:", 4, 15, 4, 0 }, 1679 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1680 FIELD1("QueueEntryOverride:", 1), 1681 FIELD1("CachePriority:", 0), 1682 { NULL } 1683 }; 1684 static struct field_desc flm_t5[] = { 1685 FIELD1("Valid:", 89), 1686 FIELD("SplitLenMode:", 87, 88), 1687 FIELD1("TPHintEn:", 86), 1688 FIELD("TPHint:", 84, 85), 1689 FIELD1("NoSnoop:", 83), 1690 FIELD1("RelaxedOrdering:", 82), 1691 FIELD("DCA_ST:", 71, 81), 1692 FIELD("EQid:", 54, 70), 1693 FIELD("SplitEn:", 52, 53), 1694 FIELD1("PadEn:", 51), 1695 FIELD1("PackEn:", 50), 1696 FIELD1("Cache_Lock :", 49), 1697 FIELD1("CongDrop:", 48), 1698 FIELD("PackOffset:", 16, 47), 1699 FIELD("CIDX:", 8, 15), 1700 FIELD("PIDX:", 0, 7), 1701 { NULL } 1702 }; 1703 static struct field_desc flm_t6[] = { 1704 FIELD1("Valid:", 89), 1705 FIELD("SplitLenMode:", 87, 88), 1706 FIELD1("TPHintEn:", 86), 1707 FIELD("TPHint:", 84, 85), 1708 FIELD1("NoSnoop:", 83), 1709 FIELD1("RelaxedOrdering:", 82), 1710 FIELD("DCA_ST:", 71, 81), 1711 FIELD("EQid:", 54, 70), 1712 FIELD("SplitEn:", 52, 53), 1713 FIELD1("PadEn:", 51), 1714 FIELD1("PackEn:", 50), 1715 FIELD1("Cache_Lock :", 49), 1716 FIELD1("CongDrop:", 48), 1717 FIELD1("Inflight:", 47), 1718 FIELD1("CongEn:", 46), 1719 FIELD1("CongMode:", 45), 1720 FIELD("PackOffset:", 20, 39), 1721 FIELD("CIDX:", 8, 15), 1722 FIELD("PIDX:", 0, 7), 1723 { NULL } 1724 }; 1725 static struct field_desc conm_t5[] = { 1726 FIELD1("CngMPSEnable:", 21), 1727 FIELD("CngTPMode:", 19, 20), 1728 FIELD1("CngDBPHdr:", 18), 1729 FIELD1("CngDBPData:", 17), 1730 FIELD1("CngIMSG:", 16), 1731 { "CngChMap:", 0, 15, 0, 1, 0 }, 1732 { NULL } 1733 }; 1734 1735 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1736 if (p->data[0] & 2) 1737 show_struct(p->data, 6, fl_t5); 1738 else if (vers == 5) 1739 show_struct(p->data, 6, egress_t5); 1740 else 1741 show_struct(p->data, 6, egress_t6); 1742 } else if (p->mem_id == SGE_CONTEXT_FLM) 1743 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1744 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1745 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1746 else if (p->mem_id == SGE_CONTEXT_CNM) 1747 show_struct(p->data, 1, conm_t5); 1748 } 1749 1750 static void 1751 show_t4_ctxt(const struct t4_sge_context *p) 1752 { 1753 static struct field_desc egress_t4[] = { 1754 FIELD1("StatusPgNS:", 180), 1755 FIELD1("StatusPgRO:", 179), 1756 FIELD1("FetchNS:", 178), 1757 FIELD1("FetchRO:", 177), 1758 FIELD1("Valid:", 176), 1759 FIELD("PCIeDataChannel:", 174, 175), 1760 FIELD1("DCAEgrQEn:", 173), 1761 FIELD("DCACPUID:", 168, 172), 1762 FIELD1("FCThreshOverride:", 167), 1763 FIELD("WRLength:", 162, 166), 1764 FIELD1("WRLengthKnown:", 161), 1765 FIELD1("ReschedulePending:", 160), 1766 FIELD1("OnChipQueue:", 159), 1767 FIELD1("FetchSizeMode", 158), 1768 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1769 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1770 FIELD("uPToken:", 133, 152), 1771 FIELD1("uPTokenEn:", 132), 1772 FIELD1("UserModeIO:", 131), 1773 FIELD("uPFLCredits:", 123, 130), 1774 FIELD1("uPFLCreditEn:", 122), 1775 FIELD("FID:", 111, 121), 1776 FIELD("HostFCMode:", 109, 110), 1777 FIELD1("HostFCOwner:", 108), 1778 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1779 FIELD("CIDX:", 89, 104), 1780 FIELD("PIDX:", 73, 88), 1781 { "BaseAddress:", 18, 72, 9, 1 }, 1782 FIELD("QueueSize:", 2, 17), 1783 FIELD1("QueueType:", 1), 1784 FIELD1("CachePriority:", 0), 1785 { NULL } 1786 }; 1787 static struct field_desc fl_t4[] = { 1788 FIELD1("StatusPgNS:", 180), 1789 FIELD1("StatusPgRO:", 179), 1790 FIELD1("FetchNS:", 178), 1791 FIELD1("FetchRO:", 177), 1792 FIELD1("Valid:", 176), 1793 FIELD("PCIeDataChannel:", 174, 175), 1794 FIELD1("DCAEgrQEn:", 173), 1795 FIELD("DCACPUID:", 168, 172), 1796 FIELD1("FCThreshOverride:", 167), 1797 FIELD1("ReschedulePending:", 160), 1798 FIELD1("OnChipQueue:", 159), 1799 FIELD1("FetchSizeMode", 158), 1800 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1801 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1802 FIELD1("FLMcongMode:", 152), 1803 FIELD("MaxuPFLCredits:", 144, 151), 1804 FIELD("FLMcontextID:", 133, 143), 1805 FIELD1("uPTokenEn:", 132), 1806 FIELD1("UserModeIO:", 131), 1807 FIELD("uPFLCredits:", 123, 130), 1808 FIELD1("uPFLCreditEn:", 122), 1809 FIELD("FID:", 111, 121), 1810 FIELD("HostFCMode:", 109, 110), 1811 FIELD1("HostFCOwner:", 108), 1812 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1813 FIELD("CIDX:", 89, 104), 1814 FIELD("PIDX:", 73, 88), 1815 { "BaseAddress:", 18, 72, 9, 1 }, 1816 FIELD("QueueSize:", 2, 17), 1817 FIELD1("QueueType:", 1), 1818 FIELD1("CachePriority:", 0), 1819 { NULL } 1820 }; 1821 static struct field_desc ingress_t4[] = { 1822 FIELD1("NoSnoop:", 145), 1823 FIELD1("RelaxedOrdering:", 144), 1824 FIELD1("GTSmode:", 143), 1825 FIELD1("ISCSICoalescing:", 142), 1826 FIELD1("Valid:", 141), 1827 FIELD1("TimerPending:", 140), 1828 FIELD1("DropRSS:", 139), 1829 FIELD("PCIeChannel:", 137, 138), 1830 FIELD1("SEInterruptArmed:", 136), 1831 FIELD1("CongestionMgtEnable:", 135), 1832 FIELD1("DCAIngQEnable:", 134), 1833 FIELD("DCACPUID:", 129, 133), 1834 FIELD1("UpdateScheduling:", 128), 1835 FIELD("UpdateDelivery:", 126, 127), 1836 FIELD1("InterruptSent:", 125), 1837 FIELD("InterruptIDX:", 114, 124), 1838 FIELD1("InterruptDestination:", 113), 1839 FIELD1("InterruptArmed:", 112), 1840 FIELD("RxIntCounter:", 106, 111), 1841 FIELD("RxIntCounterThreshold:", 104, 105), 1842 FIELD1("Generation:", 103), 1843 { "BaseAddress:", 48, 102, 9, 1 }, 1844 FIELD("PIDX:", 32, 47), 1845 FIELD("CIDX:", 16, 31), 1846 { "QueueSize:", 4, 15, 4, 0 }, 1847 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1848 FIELD1("QueueEntryOverride:", 1), 1849 FIELD1("CachePriority:", 0), 1850 { NULL } 1851 }; 1852 static struct field_desc flm_t4[] = { 1853 FIELD1("NoSnoop:", 79), 1854 FIELD1("RelaxedOrdering:", 78), 1855 FIELD1("Valid:", 77), 1856 FIELD("DCACPUID:", 72, 76), 1857 FIELD1("DCAFLEn:", 71), 1858 FIELD("EQid:", 54, 70), 1859 FIELD("SplitEn:", 52, 53), 1860 FIELD1("PadEn:", 51), 1861 FIELD1("PackEn:", 50), 1862 FIELD1("DBpriority:", 48), 1863 FIELD("PackOffset:", 16, 47), 1864 FIELD("CIDX:", 8, 15), 1865 FIELD("PIDX:", 0, 7), 1866 { NULL } 1867 }; 1868 static struct field_desc conm_t4[] = { 1869 FIELD1("CngDBPHdr:", 6), 1870 FIELD1("CngDBPData:", 5), 1871 FIELD1("CngIMSG:", 4), 1872 { "CngChMap:", 0, 3, 0, 1, 0}, 1873 { NULL } 1874 }; 1875 1876 if (p->mem_id == SGE_CONTEXT_EGRESS) 1877 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1878 else if (p->mem_id == SGE_CONTEXT_FLM) 1879 show_struct(p->data, 3, flm_t4); 1880 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1881 show_struct(p->data, 5, ingress_t4); 1882 else if (p->mem_id == SGE_CONTEXT_CNM) 1883 show_struct(p->data, 1, conm_t4); 1884 } 1885 1886 #undef FIELD 1887 #undef FIELD1 1888 1889 static int 1890 get_sge_context(int argc, const char *argv[]) 1891 { 1892 int rc; 1893 char *p; 1894 long cid; 1895 struct t4_sge_context cntxt = {0}; 1896 1897 if (argc != 2) { 1898 warnx("sge_context: incorrect number of arguments."); 1899 return (EINVAL); 1900 } 1901 1902 if (!strcmp(argv[0], "egress")) 1903 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1904 else if (!strcmp(argv[0], "ingress")) 1905 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1906 else if (!strcmp(argv[0], "fl")) 1907 cntxt.mem_id = SGE_CONTEXT_FLM; 1908 else if (!strcmp(argv[0], "cong")) 1909 cntxt.mem_id = SGE_CONTEXT_CNM; 1910 else { 1911 warnx("unknown context type \"%s\"; known types are egress, " 1912 "ingress, fl, and cong.", argv[0]); 1913 return (EINVAL); 1914 } 1915 1916 p = str_to_number(argv[1], &cid, NULL); 1917 if (*p) { 1918 warnx("invalid context id \"%s\"", argv[1]); 1919 return (EINVAL); 1920 } 1921 cntxt.cid = cid; 1922 1923 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1924 if (rc != 0) 1925 return (rc); 1926 1927 if (chip_id == 4) 1928 show_t4_ctxt(&cntxt); 1929 else 1930 show_t5t6_ctxt(&cntxt, chip_id); 1931 1932 return (0); 1933 } 1934 1935 static int 1936 loadfw(int argc, const char *argv[]) 1937 { 1938 int rc, fd; 1939 struct t4_data data = {0}; 1940 const char *fname = argv[0]; 1941 struct stat st = {0}; 1942 1943 if (argc != 1) { 1944 warnx("loadfw: incorrect number of arguments."); 1945 return (EINVAL); 1946 } 1947 1948 fd = open(fname, O_RDONLY); 1949 if (fd < 0) { 1950 warn("open(%s)", fname); 1951 return (errno); 1952 } 1953 1954 if (fstat(fd, &st) < 0) { 1955 warn("fstat"); 1956 close(fd); 1957 return (errno); 1958 } 1959 1960 data.len = st.st_size; 1961 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1962 if (data.data == MAP_FAILED) { 1963 warn("mmap"); 1964 close(fd); 1965 return (errno); 1966 } 1967 1968 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1969 munmap(data.data, data.len); 1970 close(fd); 1971 return (rc); 1972 } 1973 1974 static int 1975 loadcfg(int argc, const char *argv[]) 1976 { 1977 int rc, fd; 1978 struct t4_data data = {0}; 1979 const char *fname = argv[0]; 1980 struct stat st = {0}; 1981 1982 if (argc != 1) { 1983 warnx("loadcfg: incorrect number of arguments."); 1984 return (EINVAL); 1985 } 1986 1987 if (strcmp(fname, "clear") == 0) 1988 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1989 1990 fd = open(fname, O_RDONLY); 1991 if (fd < 0) { 1992 warn("open(%s)", fname); 1993 return (errno); 1994 } 1995 1996 if (fstat(fd, &st) < 0) { 1997 warn("fstat"); 1998 close(fd); 1999 return (errno); 2000 } 2001 2002 data.len = st.st_size; 2003 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 2004 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 2005 if (data.data == MAP_FAILED) { 2006 warn("mmap"); 2007 close(fd); 2008 return (errno); 2009 } 2010 2011 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 2012 munmap(data.data, data.len); 2013 close(fd); 2014 return (rc); 2015 } 2016 2017 static int 2018 dumpstate(int argc, const char *argv[]) 2019 { 2020 int rc, fd; 2021 struct t4_cudbg_dump dump = {0}; 2022 const char *fname = argv[0]; 2023 2024 if (argc != 1) { 2025 warnx("dumpstate: incorrect number of arguments."); 2026 return (EINVAL); 2027 } 2028 2029 dump.wr_flash = 0; 2030 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 2031 dump.len = 8 * 1024 * 1024; 2032 dump.data = malloc(dump.len); 2033 if (dump.data == NULL) { 2034 return (ENOMEM); 2035 } 2036 2037 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 2038 if (rc != 0) 2039 goto done; 2040 2041 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2042 S_IRUSR | S_IRGRP | S_IROTH); 2043 if (fd < 0) { 2044 warn("open(%s)", fname); 2045 rc = errno; 2046 goto done; 2047 } 2048 write(fd, dump.data, dump.len); 2049 close(fd); 2050 done: 2051 free(dump.data); 2052 return (rc); 2053 } 2054 2055 static int 2056 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2057 { 2058 int rc; 2059 struct t4_mem_range mr; 2060 2061 mr.addr = addr; 2062 mr.len = len; 2063 mr.data = malloc(mr.len); 2064 2065 if (mr.data == 0) { 2066 warn("read_mem: malloc"); 2067 return (errno); 2068 } 2069 2070 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2071 if (rc != 0) 2072 goto done; 2073 2074 if (output) 2075 (*output)(mr.data, mr.len); 2076 done: 2077 free(mr.data); 2078 return (rc); 2079 } 2080 2081 static int 2082 loadboot(int argc, const char *argv[]) 2083 { 2084 int rc, fd; 2085 long l; 2086 char *p; 2087 struct t4_bootrom br = {0}; 2088 const char *fname = argv[0]; 2089 struct stat st = {0}; 2090 2091 if (argc == 1) { 2092 br.pf_offset = 0; 2093 br.pfidx_addr = 0; 2094 } else if (argc == 3) { 2095 if (!strcmp(argv[1], "pf")) 2096 br.pf_offset = 0; 2097 else if (!strcmp(argv[1], "offset")) 2098 br.pf_offset = 1; 2099 else 2100 return (EINVAL); 2101 2102 p = str_to_number(argv[2], &l, NULL); 2103 if (*p) 2104 return (EINVAL); 2105 br.pfidx_addr = l; 2106 } else { 2107 warnx("loadboot: incorrect number of arguments."); 2108 return (EINVAL); 2109 } 2110 2111 if (strcmp(fname, "clear") == 0) 2112 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2113 2114 fd = open(fname, O_RDONLY); 2115 if (fd < 0) { 2116 warn("open(%s)", fname); 2117 return (errno); 2118 } 2119 2120 if (fstat(fd, &st) < 0) { 2121 warn("fstat"); 2122 close(fd); 2123 return (errno); 2124 } 2125 2126 br.len = st.st_size; 2127 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2128 if (br.data == MAP_FAILED) { 2129 warn("mmap"); 2130 close(fd); 2131 return (errno); 2132 } 2133 2134 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2135 munmap(br.data, br.len); 2136 close(fd); 2137 return (rc); 2138 } 2139 2140 static int 2141 loadbootcfg(int argc, const char *argv[]) 2142 { 2143 int rc, fd; 2144 struct t4_data bc = {0}; 2145 const char *fname = argv[0]; 2146 struct stat st = {0}; 2147 2148 if (argc != 1) { 2149 warnx("loadbootcfg: incorrect number of arguments."); 2150 return (EINVAL); 2151 } 2152 2153 if (strcmp(fname, "clear") == 0) 2154 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2155 2156 fd = open(fname, O_RDONLY); 2157 if (fd < 0) { 2158 warn("open(%s)", fname); 2159 return (errno); 2160 } 2161 2162 if (fstat(fd, &st) < 0) { 2163 warn("fstat"); 2164 close(fd); 2165 return (errno); 2166 } 2167 2168 bc.len = st.st_size; 2169 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2170 if (bc.data == MAP_FAILED) { 2171 warn("mmap"); 2172 close(fd); 2173 return (errno); 2174 } 2175 2176 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2177 munmap(bc.data, bc.len); 2178 close(fd); 2179 return (rc); 2180 } 2181 2182 /* 2183 * Display memory as list of 'n' 4-byte values per line. 2184 */ 2185 static void 2186 show_mem(uint32_t *buf, uint32_t len) 2187 { 2188 const char *s; 2189 int i, n = 8; 2190 2191 while (len) { 2192 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2193 s = i ? " " : ""; 2194 printf("%s%08x", s, htonl(*buf)); 2195 } 2196 printf("\n"); 2197 } 2198 } 2199 2200 static int 2201 memdump(int argc, const char *argv[]) 2202 { 2203 char *p; 2204 long l; 2205 uint32_t addr, len; 2206 2207 if (argc != 2) { 2208 warnx("incorrect number of arguments."); 2209 return (EINVAL); 2210 } 2211 2212 p = str_to_number(argv[0], &l, NULL); 2213 if (*p) { 2214 warnx("invalid address \"%s\"", argv[0]); 2215 return (EINVAL); 2216 } 2217 addr = l; 2218 2219 p = str_to_number(argv[1], &l, NULL); 2220 if (*p) { 2221 warnx("memdump: invalid length \"%s\"", argv[1]); 2222 return (EINVAL); 2223 } 2224 len = l; 2225 2226 return (read_mem(addr, len, show_mem)); 2227 } 2228 2229 /* 2230 * Display TCB as list of 'n' 4-byte values per line. 2231 */ 2232 static void 2233 show_tcb(uint32_t *buf, uint32_t len) 2234 { 2235 unsigned char *tcb = (unsigned char *)buf; 2236 const char *s; 2237 int i, n = 8; 2238 2239 while (len) { 2240 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2241 s = i ? " " : ""; 2242 printf("%s%08x", s, htonl(*buf)); 2243 } 2244 printf("\n"); 2245 } 2246 set_tcb_info(TIDTYPE_TCB, chip_id); 2247 set_print_style(PRNTSTYL_COMP); 2248 swizzle_tcb(tcb); 2249 parse_n_display_xcb(tcb); 2250 } 2251 2252 #define A_TP_CMM_TCB_BASE 0x7d10 2253 #define TCB_SIZE 128 2254 static int 2255 read_tcb(int argc, const char *argv[]) 2256 { 2257 char *p; 2258 long l; 2259 long long val; 2260 unsigned int tid; 2261 uint32_t addr; 2262 int rc; 2263 2264 if (argc != 1) { 2265 warnx("incorrect number of arguments."); 2266 return (EINVAL); 2267 } 2268 2269 p = str_to_number(argv[0], &l, NULL); 2270 if (*p) { 2271 warnx("invalid tid \"%s\"", argv[0]); 2272 return (EINVAL); 2273 } 2274 tid = l; 2275 2276 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2277 if (rc != 0) 2278 return (rc); 2279 2280 addr = val + tid * TCB_SIZE; 2281 2282 return (read_mem(addr, TCB_SIZE, show_tcb)); 2283 } 2284 2285 static int 2286 read_i2c(int argc, const char *argv[]) 2287 { 2288 char *p; 2289 long l; 2290 struct t4_i2c_data i2cd; 2291 int rc, i; 2292 2293 if (argc < 3 || argc > 4) { 2294 warnx("incorrect number of arguments."); 2295 return (EINVAL); 2296 } 2297 2298 p = str_to_number(argv[0], &l, NULL); 2299 if (*p || l > UCHAR_MAX) { 2300 warnx("invalid port id \"%s\"", argv[0]); 2301 return (EINVAL); 2302 } 2303 i2cd.port_id = l; 2304 2305 p = str_to_number(argv[1], &l, NULL); 2306 if (*p || l > UCHAR_MAX) { 2307 warnx("invalid i2c device address \"%s\"", argv[1]); 2308 return (EINVAL); 2309 } 2310 i2cd.dev_addr = l; 2311 2312 p = str_to_number(argv[2], &l, NULL); 2313 if (*p || l > UCHAR_MAX) { 2314 warnx("invalid byte offset \"%s\"", argv[2]); 2315 return (EINVAL); 2316 } 2317 i2cd.offset = l; 2318 2319 if (argc == 4) { 2320 p = str_to_number(argv[3], &l, NULL); 2321 if (*p || l > sizeof(i2cd.data)) { 2322 warnx("invalid number of bytes \"%s\"", argv[3]); 2323 return (EINVAL); 2324 } 2325 i2cd.len = l; 2326 } else 2327 i2cd.len = 1; 2328 2329 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2330 if (rc != 0) 2331 return (rc); 2332 2333 for (i = 0; i < i2cd.len; i++) 2334 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2335 2336 return (0); 2337 } 2338 2339 static int 2340 clearstats(int argc, const char *argv[]) 2341 { 2342 char *p; 2343 long l; 2344 uint32_t port; 2345 2346 if (argc != 1) { 2347 warnx("incorrect number of arguments."); 2348 return (EINVAL); 2349 } 2350 2351 p = str_to_number(argv[0], &l, NULL); 2352 if (*p) { 2353 warnx("invalid port id \"%s\"", argv[0]); 2354 return (EINVAL); 2355 } 2356 port = l; 2357 2358 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2359 } 2360 2361 static int 2362 show_tracers(void) 2363 { 2364 struct t4_tracer t; 2365 char *s; 2366 int rc, port_idx, i; 2367 long long val; 2368 2369 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2370 rc = read_reg(0x9800, 4, &val); 2371 if (rc != 0) 2372 return (rc); 2373 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2374 2375 t.idx = 0; 2376 for (t.idx = 0; ; t.idx++) { 2377 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2378 if (rc != 0 || t.idx == 0xff) 2379 break; 2380 2381 if (t.tp.port < 4) { 2382 s = "Rx"; 2383 port_idx = t.tp.port; 2384 } else if (t.tp.port < 8) { 2385 s = "Tx"; 2386 port_idx = t.tp.port - 4; 2387 } else if (t.tp.port < 12) { 2388 s = "loopback"; 2389 port_idx = t.tp.port - 8; 2390 } else if (t.tp.port < 16) { 2391 s = "MPS Rx"; 2392 port_idx = t.tp.port - 12; 2393 } else if (t.tp.port < 20) { 2394 s = "MPS Tx"; 2395 port_idx = t.tp.port - 16; 2396 } else { 2397 s = "unknown"; 2398 port_idx = t.tp.port; 2399 } 2400 2401 printf("\ntracer %u (currently %s) captures ", t.idx, 2402 t.enabled ? "ENABLED" : "DISABLED"); 2403 if (t.tp.port < 8) 2404 printf("port %u %s, ", port_idx, s); 2405 else 2406 printf("%s %u, ", s, port_idx); 2407 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2408 t.tp.min_len); 2409 printf("packets captured %smatch filter\n", 2410 t.tp.invert ? "do not " : ""); 2411 if (t.tp.skip_ofst) { 2412 printf("filter pattern: "); 2413 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2414 printf("%08x%08x", t.tp.data[i], 2415 t.tp.data[i + 1]); 2416 printf("/"); 2417 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2418 printf("%08x%08x", t.tp.mask[i], 2419 t.tp.mask[i + 1]); 2420 printf("@0\n"); 2421 } 2422 printf("filter pattern: "); 2423 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2424 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2425 printf("/"); 2426 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2427 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2428 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2429 } 2430 2431 return (rc); 2432 } 2433 2434 static int 2435 tracer_onoff(uint8_t idx, int enabled) 2436 { 2437 struct t4_tracer t; 2438 2439 t.idx = idx; 2440 t.enabled = enabled; 2441 t.valid = 0; 2442 2443 return doit(CHELSIO_T4_SET_TRACER, &t); 2444 } 2445 2446 static void 2447 create_tracing_ifnet() 2448 { 2449 char *cmd[] = { 2450 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2451 }; 2452 char *env[] = {NULL}; 2453 2454 if (vfork() == 0) { 2455 close(STDERR_FILENO); 2456 execve(cmd[0], cmd, env); 2457 _exit(0); 2458 } 2459 } 2460 2461 /* 2462 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2463 * matching). Right now this is a quick-n-dirty implementation that traces the 2464 * first 128B of all tx or rx on a port 2465 */ 2466 static int 2467 set_tracer(uint8_t idx, int argc, const char *argv[]) 2468 { 2469 struct t4_tracer t; 2470 int len, port; 2471 2472 bzero(&t, sizeof (t)); 2473 t.idx = idx; 2474 t.enabled = 1; 2475 t.valid = 1; 2476 2477 if (argc != 1) { 2478 warnx("must specify one of tx/rx/lo<n>"); 2479 return (EINVAL); 2480 } 2481 2482 len = strlen(argv[0]); 2483 if (len != 3) { 2484 warnx("argument must be 3 characters (tx/rx/lo<n>). eg. tx0"); 2485 return (EINVAL); 2486 } 2487 2488 if (strncmp(argv[0], "lo", 2) == 0) { 2489 port = argv[0][2] - '0'; 2490 if (port < 0 || port > 3) { 2491 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2492 return (EINVAL); 2493 } 2494 port += 8; 2495 } else if (strncmp(argv[0], "tx", 2) == 0) { 2496 port = argv[0][2] - '0'; 2497 if (port < 0 || port > 3) { 2498 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2499 return (EINVAL); 2500 } 2501 port += 4; 2502 } else if (strncmp(argv[0], "rx", 2) == 0) { 2503 port = argv[0][2] - '0'; 2504 if (port < 0 || port > 3) { 2505 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2506 return (EINVAL); 2507 } 2508 } else { 2509 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2510 return (EINVAL); 2511 } 2512 2513 t.tp.snap_len = 128; 2514 t.tp.min_len = 0; 2515 t.tp.skip_ofst = 0; 2516 t.tp.skip_len = 0; 2517 t.tp.invert = 0; 2518 t.tp.port = port; 2519 2520 create_tracing_ifnet(); 2521 return doit(CHELSIO_T4_SET_TRACER, &t); 2522 } 2523 2524 static int 2525 tracer_cmd(int argc, const char *argv[]) 2526 { 2527 long long val; 2528 uint8_t idx; 2529 char *s; 2530 2531 if (argc == 0) { 2532 warnx("tracer: no arguments."); 2533 return (EINVAL); 2534 }; 2535 2536 /* list */ 2537 if (strcmp(argv[0], "list") == 0) { 2538 if (argc != 1) 2539 warnx("trailing arguments after \"list\" ignored."); 2540 2541 return show_tracers(); 2542 } 2543 2544 /* <idx> ... */ 2545 s = str_to_number(argv[0], NULL, &val); 2546 if (*s || val > 0xff) { 2547 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2548 argv[0]); 2549 return (EINVAL); 2550 } 2551 idx = (int8_t)val; 2552 2553 /* <idx> disable */ 2554 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2555 return tracer_onoff(idx, 0); 2556 2557 /* <idx> enable */ 2558 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2559 return tracer_onoff(idx, 1); 2560 2561 /* <idx> ... */ 2562 return set_tracer(idx, argc - 1, argv + 1); 2563 } 2564 2565 static int 2566 modinfo_raw(int port_id) 2567 { 2568 uint8_t offset; 2569 struct t4_i2c_data i2cd; 2570 int rc; 2571 2572 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2573 bzero(&i2cd, sizeof(i2cd)); 2574 i2cd.port_id = port_id; 2575 i2cd.dev_addr = 0xa0; 2576 i2cd.offset = offset; 2577 i2cd.len = sizeof(i2cd.data); 2578 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2579 if (rc != 0) 2580 return (rc); 2581 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2582 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2583 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2584 i2cd.data[7]); 2585 2586 printf(" %c%c%c%c %c%c%c%c\n", 2587 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2588 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2589 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2590 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2591 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2592 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2593 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2594 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2595 } 2596 2597 return (0); 2598 } 2599 2600 static int 2601 modinfo(int argc, const char *argv[]) 2602 { 2603 long port; 2604 char string[16], *p; 2605 struct t4_i2c_data i2cd; 2606 int rc, i; 2607 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2608 2609 if (argc < 1) { 2610 warnx("must supply a port"); 2611 return (EINVAL); 2612 } 2613 2614 if (argc > 2) { 2615 warnx("too many arguments"); 2616 return (EINVAL); 2617 } 2618 2619 p = str_to_number(argv[0], &port, NULL); 2620 if (*p || port > UCHAR_MAX) { 2621 warnx("invalid port id \"%s\"", argv[0]); 2622 return (EINVAL); 2623 } 2624 2625 if (argc == 2) { 2626 if (!strcmp(argv[1], "raw")) 2627 return (modinfo_raw(port)); 2628 else { 2629 warnx("second argument can only be \"raw\""); 2630 return (EINVAL); 2631 } 2632 } 2633 2634 bzero(&i2cd, sizeof(i2cd)); 2635 i2cd.len = 1; 2636 i2cd.port_id = port; 2637 i2cd.dev_addr = SFF_8472_BASE; 2638 2639 i2cd.offset = SFF_8472_ID; 2640 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2641 goto fail; 2642 2643 if (i2cd.data[0] > SFF_8472_ID_LAST) 2644 printf("Unknown ID\n"); 2645 else 2646 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2647 2648 bzero(&string, sizeof(string)); 2649 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2650 i2cd.offset = i; 2651 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2652 goto fail; 2653 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2654 } 2655 printf("Vendor %s\n", string); 2656 2657 bzero(&string, sizeof(string)); 2658 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2659 i2cd.offset = i; 2660 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2661 goto fail; 2662 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2663 } 2664 printf("SN %s\n", string); 2665 2666 bzero(&string, sizeof(string)); 2667 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2668 i2cd.offset = i; 2669 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2670 goto fail; 2671 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2672 } 2673 printf("PN %s\n", string); 2674 2675 bzero(&string, sizeof(string)); 2676 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2677 i2cd.offset = i; 2678 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2679 goto fail; 2680 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2681 } 2682 printf("Rev %s\n", string); 2683 2684 i2cd.offset = SFF_8472_DIAG_TYPE; 2685 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2686 goto fail; 2687 2688 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2689 SFF_8472_DIAG_INTERNAL)) { 2690 2691 /* Switch to reading from the Diagnostic address. */ 2692 i2cd.dev_addr = SFF_8472_DIAG; 2693 i2cd.len = 1; 2694 2695 i2cd.offset = SFF_8472_TEMP; 2696 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2697 goto fail; 2698 temp = i2cd.data[0] << 8; 2699 printf("Temp: "); 2700 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2701 printf("-"); 2702 else 2703 printf("+"); 2704 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2705 SFF_8472_TEMP_SHIFT); 2706 2707 i2cd.offset = SFF_8472_VCC; 2708 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2709 goto fail; 2710 vcc = i2cd.data[0] << 8; 2711 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2712 2713 i2cd.offset = SFF_8472_TX_BIAS; 2714 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2715 goto fail; 2716 tx_bias = i2cd.data[0] << 8; 2717 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2718 2719 i2cd.offset = SFF_8472_TX_POWER; 2720 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2721 goto fail; 2722 tx_power = i2cd.data[0] << 8; 2723 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2724 2725 i2cd.offset = SFF_8472_RX_POWER; 2726 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2727 goto fail; 2728 rx_power = i2cd.data[0] << 8; 2729 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2730 2731 } else 2732 printf("Diagnostics not supported.\n"); 2733 2734 return(0); 2735 2736 fail: 2737 if (rc == EPERM) 2738 warnx("No module/cable in port %ld", port); 2739 return (rc); 2740 2741 } 2742 2743 /* XXX: pass in a low/high and do range checks as well */ 2744 static int 2745 get_sched_param(const char *param, const char *args[], long *val) 2746 { 2747 char *p; 2748 2749 if (strcmp(param, args[0]) != 0) 2750 return (EINVAL); 2751 2752 p = str_to_number(args[1], val, NULL); 2753 if (*p) { 2754 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2755 args[1]); 2756 return (EINVAL); 2757 } 2758 2759 return (0); 2760 } 2761 2762 static int 2763 sched_class(int argc, const char *argv[]) 2764 { 2765 struct t4_sched_params op; 2766 int errs, i; 2767 2768 memset(&op, 0xff, sizeof(op)); 2769 op.subcmd = -1; 2770 op.type = -1; 2771 if (argc == 0) { 2772 warnx("missing scheduling sub-command"); 2773 return (EINVAL); 2774 } 2775 if (!strcmp(argv[0], "config")) { 2776 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2777 op.u.config.minmax = -1; 2778 } else if (!strcmp(argv[0], "params")) { 2779 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2780 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2781 op.u.params.ratemode = op.u.params.channel = 2782 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2783 op.u.params.weight = op.u.params.pktsize = -1; 2784 } else { 2785 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2786 return (EINVAL); 2787 } 2788 2789 /* Decode remaining arguments ... */ 2790 errs = 0; 2791 for (i = 1; i < argc; i += 2) { 2792 const char **args = &argv[i]; 2793 long l; 2794 2795 if (i + 1 == argc) { 2796 warnx("missing argument for \"%s\"", args[0]); 2797 errs++; 2798 break; 2799 } 2800 2801 if (!strcmp(args[0], "type")) { 2802 if (!strcmp(args[1], "packet")) 2803 op.type = SCHED_CLASS_TYPE_PACKET; 2804 else { 2805 warnx("invalid type parameter \"%s\"", args[1]); 2806 errs++; 2807 } 2808 2809 continue; 2810 } 2811 2812 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2813 if(!get_sched_param("minmax", args, &l)) 2814 op.u.config.minmax = (int8_t)l; 2815 else { 2816 warnx("unknown scheduler config parameter " 2817 "\"%s\"", args[0]); 2818 errs++; 2819 } 2820 2821 continue; 2822 } 2823 2824 /* Rest applies only to SUBCMD_PARAMS */ 2825 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2826 continue; 2827 2828 if (!strcmp(args[0], "level")) { 2829 if (!strcmp(args[1], "cl-rl")) 2830 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2831 else if (!strcmp(args[1], "cl-wrr")) 2832 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2833 else if (!strcmp(args[1], "ch-rl")) 2834 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2835 else { 2836 warnx("invalid level parameter \"%s\"", 2837 args[1]); 2838 errs++; 2839 } 2840 } else if (!strcmp(args[0], "mode")) { 2841 if (!strcmp(args[1], "class")) 2842 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2843 else if (!strcmp(args[1], "flow")) 2844 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2845 else { 2846 warnx("invalid mode parameter \"%s\"", args[1]); 2847 errs++; 2848 } 2849 } else if (!strcmp(args[0], "rate-unit")) { 2850 if (!strcmp(args[1], "bits")) 2851 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2852 else if (!strcmp(args[1], "pkts")) 2853 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2854 else { 2855 warnx("invalid rate-unit parameter \"%s\"", 2856 args[1]); 2857 errs++; 2858 } 2859 } else if (!strcmp(args[0], "rate-mode")) { 2860 if (!strcmp(args[1], "relative")) 2861 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2862 else if (!strcmp(args[1], "absolute")) 2863 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2864 else { 2865 warnx("invalid rate-mode parameter \"%s\"", 2866 args[1]); 2867 errs++; 2868 } 2869 } else if (!get_sched_param("channel", args, &l)) 2870 op.u.params.channel = (int8_t)l; 2871 else if (!get_sched_param("class", args, &l)) 2872 op.u.params.cl = (int8_t)l; 2873 else if (!get_sched_param("min-rate", args, &l)) 2874 op.u.params.minrate = (int32_t)l; 2875 else if (!get_sched_param("max-rate", args, &l)) 2876 op.u.params.maxrate = (int32_t)l; 2877 else if (!get_sched_param("weight", args, &l)) 2878 op.u.params.weight = (int16_t)l; 2879 else if (!get_sched_param("pkt-size", args, &l)) 2880 op.u.params.pktsize = (int16_t)l; 2881 else { 2882 warnx("unknown scheduler parameter \"%s\"", args[0]); 2883 errs++; 2884 } 2885 } 2886 2887 /* 2888 * Catch some logical fallacies in terms of argument combinations here 2889 * so we can offer more than just the EINVAL return from the driver. 2890 * The driver will be able to catch a lot more issues since it knows 2891 * the specifics of the device hardware capabilities like how many 2892 * channels, classes, etc. the device supports. 2893 */ 2894 if (op.type < 0) { 2895 warnx("sched \"type\" parameter missing"); 2896 errs++; 2897 } 2898 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2899 if (op.u.config.minmax < 0) { 2900 warnx("sched config \"minmax\" parameter missing"); 2901 errs++; 2902 } 2903 } 2904 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2905 if (op.u.params.level < 0) { 2906 warnx("sched params \"level\" parameter missing"); 2907 errs++; 2908 } 2909 if (op.u.params.mode < 0 && 2910 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2911 warnx("sched params \"mode\" parameter missing"); 2912 errs++; 2913 } 2914 if (op.u.params.rateunit < 0 && 2915 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2916 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2917 warnx("sched params \"rate-unit\" parameter missing"); 2918 errs++; 2919 } 2920 if (op.u.params.ratemode < 0 && 2921 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2922 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2923 warnx("sched params \"rate-mode\" parameter missing"); 2924 errs++; 2925 } 2926 if (op.u.params.channel < 0) { 2927 warnx("sched params \"channel\" missing"); 2928 errs++; 2929 } 2930 if (op.u.params.cl < 0 && 2931 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2932 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) { 2933 warnx("sched params \"class\" missing"); 2934 errs++; 2935 } 2936 if (op.u.params.maxrate < 0 && 2937 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2938 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2939 warnx("sched params \"max-rate\" missing for " 2940 "rate-limit level"); 2941 errs++; 2942 } 2943 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR && 2944 (op.u.params.weight < 1 || op.u.params.weight > 99)) { 2945 warnx("sched params \"weight\" missing or invalid " 2946 "(not 1-99) for weighted-round-robin level"); 2947 errs++; 2948 } 2949 if (op.u.params.pktsize < 0 && 2950 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2951 warnx("sched params \"pkt-size\" missing for " 2952 "rate-limit level"); 2953 errs++; 2954 } 2955 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2956 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2957 warnx("sched params mode flow needs rate-mode absolute"); 2958 errs++; 2959 } 2960 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2961 !in_range(op.u.params.maxrate, 1, 100)) { 2962 warnx("sched params \"max-rate\" takes " 2963 "percentage value(1-100) for rate-mode relative"); 2964 errs++; 2965 } 2966 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2967 !in_range(op.u.params.maxrate, 1, 100000000)) { 2968 warnx("sched params \"max-rate\" takes " 2969 "value(1-100000000) for rate-mode absolute"); 2970 errs++; 2971 } 2972 if (op.u.params.maxrate > 0 && 2973 op.u.params.maxrate < op.u.params.minrate) { 2974 warnx("sched params \"max-rate\" is less than " 2975 "\"min-rate\""); 2976 errs++; 2977 } 2978 } 2979 2980 if (errs > 0) { 2981 warnx("%d error%s in sched-class command", errs, 2982 errs == 1 ? "" : "s"); 2983 return (EINVAL); 2984 } 2985 2986 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2987 } 2988 2989 static int 2990 sched_queue(int argc, const char *argv[]) 2991 { 2992 struct t4_sched_queue op = {0}; 2993 char *p; 2994 long val; 2995 2996 if (argc != 3) { 2997 /* need "<port> <queue> <class> */ 2998 warnx("incorrect number of arguments."); 2999 return (EINVAL); 3000 } 3001 3002 p = str_to_number(argv[0], &val, NULL); 3003 if (*p || val > UCHAR_MAX) { 3004 warnx("invalid port id \"%s\"", argv[0]); 3005 return (EINVAL); 3006 } 3007 op.port = (uint8_t)val; 3008 3009 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 3010 op.queue = -1; 3011 else { 3012 p = str_to_number(argv[1], &val, NULL); 3013 if (*p || val < -1) { 3014 warnx("invalid queue \"%s\"", argv[1]); 3015 return (EINVAL); 3016 } 3017 op.queue = (int8_t)val; 3018 } 3019 3020 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 3021 op.cl = -1; 3022 else { 3023 p = str_to_number(argv[2], &val, NULL); 3024 if (*p || val < -1) { 3025 warnx("invalid class \"%s\"", argv[2]); 3026 return (EINVAL); 3027 } 3028 op.cl = (int8_t)val; 3029 } 3030 3031 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 3032 } 3033 3034 static int 3035 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 3036 int *pneg, struct offload_settings *os) 3037 { 3038 3039 while (*s == '!') { 3040 (*pneg)++; 3041 s++; 3042 } 3043 3044 if (!strcmp(s, "not")) { 3045 (*pneg)++; 3046 return (0); 3047 } 3048 3049 if (!strcmp(s, "offload")) { 3050 os->offload = (*pneg + 1) & 1; 3051 *pneg = 0; 3052 } else if (!strcmp(s , "coalesce")) { 3053 os->rx_coalesce = (*pneg + 1) & 1; 3054 *pneg = 0; 3055 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3056 os->tstamp = (*pneg + 1) & 1; 3057 *pneg = 0; 3058 } else if (!strcmp(s, "sack")) { 3059 os->sack = (*pneg + 1) & 1; 3060 *pneg = 0; 3061 } else if (!strcmp(s, "nagle")) { 3062 os->nagle = (*pneg + 1) & 1; 3063 *pneg = 0; 3064 } else if (!strcmp(s, "ecn")) { 3065 os->ecn = (*pneg + 1) & 1; 3066 *pneg = 0; 3067 } else if (!strcmp(s, "ddp")) { 3068 os->ddp = (*pneg + 1) & 1; 3069 *pneg = 0; 3070 } else if (!strcmp(s, "tls")) { 3071 os->tls = (*pneg + 1) & 1; 3072 *pneg = 0; 3073 } else { 3074 char *param, *p; 3075 long val; 3076 3077 /* Settings with additional parameter handled here. */ 3078 3079 if (*pneg) { 3080 warnx("\"%s\" is not a valid keyword, or it does not " 3081 "support negation.", s); 3082 return (EINVAL); 3083 } 3084 3085 while ((param = strsep(pnext, ws)) != NULL) { 3086 if (*param != '\0') 3087 break; 3088 } 3089 if (param == NULL) { 3090 warnx("\"%s\" is not a valid keyword, or it requires a " 3091 "parameter that has not been provided.", s); 3092 return (EINVAL); 3093 } 3094 3095 if (!strcmp(s, "cong")) { 3096 if (!strcmp(param, "reno")) 3097 os->cong_algo = 0; 3098 else if (!strcmp(param, "tahoe")) 3099 os->cong_algo = 1; 3100 else if (!strcmp(param, "newreno")) 3101 os->cong_algo = 2; 3102 else if (!strcmp(param, "highspeed")) 3103 os->cong_algo = 3; 3104 else { 3105 warnx("unknown congestion algorithm \"%s\".", s); 3106 return (EINVAL); 3107 } 3108 } else if (!strcmp(s, "class")) { 3109 val = -1; 3110 p = str_to_number(param, &val, NULL); 3111 /* (nsched_cls - 1) is spelled 15 here. */ 3112 if (*p || val < 0 || val > 15) { 3113 warnx("invalid scheduling class \"%s\". " 3114 "\"class\" needs an integer value where " 3115 "0 <= value <= 15", param); 3116 return (EINVAL); 3117 } 3118 os->sched_class = val; 3119 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3120 !strcmp(s, "rxq")) { 3121 if (!strcmp(param, "random")) { 3122 val = QUEUE_RANDOM; 3123 } else if (!strcmp(param, "roundrobin")) { 3124 val = QUEUE_ROUNDROBIN; 3125 } else { 3126 p = str_to_number(param, &val, NULL); 3127 if (*p || val < 0 || val > 0xffff) { 3128 warnx("invalid queue specification " 3129 "\"%s\". \"%s\" needs an integer" 3130 " value, \"random\", or " 3131 "\"roundrobin\".", param, s); 3132 return (EINVAL); 3133 } 3134 } 3135 if (!strcmp(s, "bind")) { 3136 os->txq = val; 3137 os->rxq = val; 3138 } else if (!strcmp(s, "txq")) { 3139 os->txq = val; 3140 } else if (!strcmp(s, "rxq")) { 3141 os->rxq = val; 3142 } else { 3143 return (EDOOFUS); 3144 } 3145 } else if (!strcmp(s, "mss")) { 3146 val = -1; 3147 p = str_to_number(param, &val, NULL); 3148 if (*p || val <= 0) { 3149 warnx("invalid MSS specification \"%s\". " 3150 "\"mss\" needs a positive integer value", 3151 param); 3152 return (EINVAL); 3153 } 3154 os->mss = val; 3155 } else { 3156 warnx("unknown settings keyword: \"%s\"", s); 3157 return (EINVAL); 3158 } 3159 } 3160 3161 return (0); 3162 } 3163 3164 static int 3165 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3166 { 3167 const char *ws = " \f\n\r\v\t"; 3168 char *settings, *s, *next; 3169 int rc, nsettings, neg; 3170 static const struct offload_settings default_settings = { 3171 .offload = 0, /* No settings imply !offload */ 3172 .rx_coalesce = -1, 3173 .cong_algo = -1, 3174 .sched_class = -1, 3175 .tstamp = -1, 3176 .sack = -1, 3177 .nagle = -1, 3178 .ecn = -1, 3179 .ddp = -1, 3180 .tls = -1, 3181 .txq = QUEUE_RANDOM, 3182 .rxq = QUEUE_RANDOM, 3183 .mss = -1, 3184 }; 3185 3186 *os = default_settings; 3187 3188 next = settings = strdup(settings_ro); 3189 if (settings == NULL) { 3190 warn (NULL); 3191 return (errno); 3192 } 3193 3194 nsettings = 0; 3195 rc = 0; 3196 neg = 0; 3197 while ((s = strsep(&next, ws)) != NULL) { 3198 if (*s == '\0') 3199 continue; 3200 nsettings++; 3201 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3202 if (rc != 0) 3203 goto done; 3204 } 3205 if (nsettings == 0) { 3206 warnx("no settings provided"); 3207 rc = EINVAL; 3208 goto done; 3209 } 3210 if (neg > 0) { 3211 warnx("%d stray negation(s) at end of offload settings", neg); 3212 rc = EINVAL; 3213 goto done; 3214 } 3215 done: 3216 free(settings); 3217 return (rc); 3218 } 3219 3220 static int 3221 isempty_line(char *line, size_t llen) 3222 { 3223 3224 /* skip leading whitespace */ 3225 while (isspace(*line)) { 3226 line++; 3227 llen--; 3228 } 3229 if (llen == 0 || *line == '#' || *line == '\n') 3230 return (1); 3231 3232 return (0); 3233 } 3234 3235 static int 3236 special_offload_rule(char *str) 3237 { 3238 3239 /* skip leading whitespaces */ 3240 while (isspace(*str)) 3241 str++; 3242 3243 /* check for special strings: "-", "all", "any" */ 3244 if (*str == '-') { 3245 str++; 3246 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3247 str += 3; 3248 } else { 3249 return (0); 3250 } 3251 3252 /* skip trailing whitespaces */ 3253 while (isspace(*str)) 3254 str++; 3255 3256 return (*str == '\0'); 3257 } 3258 3259 /* 3260 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3261 * 3262 * [<open-type>] <expr> => <settings> 3263 */ 3264 static int 3265 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3266 struct offload_rule *r) 3267 { 3268 char *expr, *settings, *s; 3269 3270 bzero(r, sizeof(*r)); 3271 3272 /* Skip leading whitespace. */ 3273 while (isspace(*line)) 3274 line++; 3275 /* Trim trailing whitespace */ 3276 s = &line[llen - 1]; 3277 while (isspace(*s)) { 3278 *s-- = '\0'; 3279 llen--; 3280 } 3281 3282 /* 3283 * First part of the rule: '[X]' where X = A/D/L/P 3284 */ 3285 if (*line++ != '[') { 3286 warnx("missing \"[\" on line %zd", lno); 3287 return (EINVAL); 3288 } 3289 switch (*line) { 3290 case 'A': 3291 case 'D': 3292 case 'L': 3293 case 'P': 3294 r->open_type = *line; 3295 break; 3296 default: 3297 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3298 return (EINVAL); 3299 } 3300 line++; 3301 if (*line++ != ']') { 3302 warnx("missing \"]\" after \"[%c\" on line %zd", 3303 r->open_type, lno); 3304 return (EINVAL); 3305 } 3306 3307 /* Skip whitespace. */ 3308 while (isspace(*line)) 3309 line++; 3310 3311 /* 3312 * Rest of the rule: <expr> => <settings> 3313 */ 3314 expr = line; 3315 s = strstr(line, "=>"); 3316 if (s == NULL) 3317 return (EINVAL); 3318 settings = s + 2; 3319 while (isspace(*settings)) 3320 settings++; 3321 *s = '\0'; 3322 3323 /* 3324 * <expr> is either a special name (all, any) or a pcap-filter(7). 3325 * In case of a special name the bpf_prog stays all-zero. 3326 */ 3327 if (!special_offload_rule(expr)) { 3328 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3329 PCAP_NETMASK_UNKNOWN) < 0) { 3330 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3331 lno, pcap_geterr(pd)); 3332 return (EINVAL); 3333 } 3334 } 3335 3336 /* settings to apply on a match. */ 3337 if (parse_offload_settings(settings, &r->settings) != 0) { 3338 warnx("failed to parse offload settings \"%s\" on line %zd", 3339 settings, lno); 3340 pcap_freecode(&r->bpf_prog); 3341 return (EINVAL); 3342 } 3343 3344 return (0); 3345 3346 } 3347 3348 /* 3349 * Note that op itself is not dynamically allocated. 3350 */ 3351 static void 3352 free_offload_policy(struct t4_offload_policy *op) 3353 { 3354 int i; 3355 3356 for (i = 0; i < op->nrules; i++) { 3357 /* 3358 * pcap_freecode can cope with empty bpf_prog, which is the case 3359 * for an rule that matches on 'any/all/-'. 3360 */ 3361 pcap_freecode(&op->rule[i].bpf_prog); 3362 } 3363 free(op->rule); 3364 op->nrules = 0; 3365 op->rule = NULL; 3366 } 3367 3368 #define REALLOC_STRIDE 32 3369 3370 /* 3371 * Fills up op->nrules and op->rule. 3372 */ 3373 static int 3374 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3375 { 3376 FILE *fp; 3377 char *line; 3378 int lno, maxrules, rc; 3379 size_t lcap, llen; 3380 struct offload_rule *r; 3381 pcap_t *pd; 3382 3383 fp = fopen(fname, "r"); 3384 if (fp == NULL) { 3385 warn("Unable to open file \"%s\"", fname); 3386 return (errno); 3387 } 3388 pd = pcap_open_dead(DLT_EN10MB, 128); 3389 if (pd == NULL) { 3390 warnx("Failed to open pcap device"); 3391 fclose(fp); 3392 return (EIO); 3393 } 3394 3395 rc = 0; 3396 lno = 0; 3397 lcap = 0; 3398 maxrules = 0; 3399 op->nrules = 0; 3400 op->rule = NULL; 3401 line = NULL; 3402 3403 while ((llen = getline(&line, &lcap, fp)) != -1) { 3404 lno++; 3405 3406 /* Skip empty lines. */ 3407 if (isempty_line(line, llen)) 3408 continue; 3409 3410 if (op->nrules == maxrules) { 3411 maxrules += REALLOC_STRIDE; 3412 r = realloc(op->rule, 3413 maxrules * sizeof(struct offload_rule)); 3414 if (r == NULL) { 3415 warnx("failed to allocate memory for %d rules", 3416 maxrules); 3417 rc = ENOMEM; 3418 goto done; 3419 } 3420 op->rule = r; 3421 } 3422 3423 r = &op->rule[op->nrules]; 3424 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3425 if (rc != 0) { 3426 warnx("Error parsing line %d of \"%s\"", lno, fname); 3427 goto done; 3428 } 3429 3430 op->nrules++; 3431 } 3432 free(line); 3433 3434 if (!feof(fp)) { 3435 warn("Error while reading from file \"%s\" at line %d", 3436 fname, lno); 3437 rc = errno; 3438 goto done; 3439 } 3440 3441 if (op->nrules == 0) { 3442 warnx("No valid rules found in \"%s\"", fname); 3443 rc = EINVAL; 3444 } 3445 done: 3446 pcap_close(pd); 3447 fclose(fp); 3448 if (rc != 0) { 3449 free_offload_policy(op); 3450 } 3451 3452 return (rc); 3453 } 3454 3455 static int 3456 load_offload_policy(int argc, const char *argv[]) 3457 { 3458 int rc = 0; 3459 const char *fname = argv[0]; 3460 struct t4_offload_policy op = {0}; 3461 3462 if (argc != 1) { 3463 warnx("incorrect number of arguments."); 3464 return (EINVAL); 3465 } 3466 3467 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3468 /* op.nrules is 0 and that means clear policy */ 3469 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3470 } 3471 3472 rc = parse_offload_policy(fname, &op); 3473 if (rc != 0) { 3474 /* Error message displayed already */ 3475 return (EINVAL); 3476 } 3477 3478 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3479 free_offload_policy(&op); 3480 3481 return (rc); 3482 } 3483 3484 static int 3485 display_clip(void) 3486 { 3487 size_t clip_buf_size = 4096; 3488 char *buf, name[32]; 3489 int rc; 3490 3491 buf = malloc(clip_buf_size); 3492 if (buf == NULL) { 3493 warn("%s", __func__); 3494 return (errno); 3495 } 3496 3497 snprintf(name, sizeof(name), "dev.t%unex.%u.misc.clip", chip_id, inst); 3498 rc = sysctlbyname(name, buf, &clip_buf_size, NULL, 0); 3499 if (rc != 0) { 3500 warn("sysctl %s", name); 3501 free(buf); 3502 return (errno); 3503 } 3504 3505 printf("%s\n", buf); 3506 free(buf); 3507 return (0); 3508 } 3509 3510 static int 3511 clip_cmd(int argc, const char *argv[]) 3512 { 3513 int rc, af = AF_INET6, add; 3514 struct t4_clip_addr ca = {0}; 3515 3516 if (argc == 1 && !strcmp(argv[0], "list")) { 3517 rc = display_clip(); 3518 return (rc); 3519 } 3520 3521 if (argc != 2) { 3522 warnx("incorrect number of arguments."); 3523 return (EINVAL); 3524 } 3525 3526 if (!strcmp(argv[0], "hold")) { 3527 add = 1; 3528 } else if (!strcmp(argv[0], "rel") || !strcmp(argv[0], "release")) { 3529 add = 0; 3530 } else { 3531 warnx("first argument must be \"hold\" or \"release\""); 3532 return (EINVAL); 3533 } 3534 3535 rc = parse_ipaddr(argv[0], argv, &af, &ca.addr[0], &ca.mask[0], 1); 3536 if (rc != 0) 3537 return (rc); 3538 3539 if (add) 3540 rc = doit(CHELSIO_T4_HOLD_CLIP_ADDR, &ca); 3541 else 3542 rc = doit(CHELSIO_T4_RELEASE_CLIP_ADDR, &ca); 3543 3544 return (rc); 3545 } 3546 3547 static int 3548 run_cmd(int argc, const char *argv[]) 3549 { 3550 int rc = -1; 3551 const char *cmd = argv[0]; 3552 3553 /* command */ 3554 argc--; 3555 argv++; 3556 3557 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3558 rc = register_io(argc, argv, 4); 3559 else if (!strcmp(cmd, "reg64")) 3560 rc = register_io(argc, argv, 8); 3561 else if (!strcmp(cmd, "regdump")) 3562 rc = dump_regs(argc, argv); 3563 else if (!strcmp(cmd, "filter")) 3564 rc = filter_cmd(argc, argv, 0); 3565 else if (!strcmp(cmd, "context")) 3566 rc = get_sge_context(argc, argv); 3567 else if (!strcmp(cmd, "loadfw")) 3568 rc = loadfw(argc, argv); 3569 else if (!strcmp(cmd, "memdump")) 3570 rc = memdump(argc, argv); 3571 else if (!strcmp(cmd, "tcb")) 3572 rc = read_tcb(argc, argv); 3573 else if (!strcmp(cmd, "i2c")) 3574 rc = read_i2c(argc, argv); 3575 else if (!strcmp(cmd, "clearstats")) 3576 rc = clearstats(argc, argv); 3577 else if (!strcmp(cmd, "tracer")) 3578 rc = tracer_cmd(argc, argv); 3579 else if (!strcmp(cmd, "modinfo")) 3580 rc = modinfo(argc, argv); 3581 else if (!strcmp(cmd, "sched-class")) 3582 rc = sched_class(argc, argv); 3583 else if (!strcmp(cmd, "sched-queue")) 3584 rc = sched_queue(argc, argv); 3585 else if (!strcmp(cmd, "loadcfg")) 3586 rc = loadcfg(argc, argv); 3587 else if (!strcmp(cmd, "loadboot")) 3588 rc = loadboot(argc, argv); 3589 else if (!strcmp(cmd, "loadboot-cfg")) 3590 rc = loadbootcfg(argc, argv); 3591 else if (!strcmp(cmd, "dumpstate")) 3592 rc = dumpstate(argc, argv); 3593 else if (!strcmp(cmd, "policy")) 3594 rc = load_offload_policy(argc, argv); 3595 else if (!strcmp(cmd, "hashfilter")) 3596 rc = filter_cmd(argc, argv, 1); 3597 else if (!strcmp(cmd, "clip")) 3598 rc = clip_cmd(argc, argv); 3599 else { 3600 rc = EINVAL; 3601 warnx("invalid command \"%s\"", cmd); 3602 } 3603 3604 return (rc); 3605 } 3606 3607 #define MAX_ARGS 15 3608 static int 3609 run_cmd_loop(void) 3610 { 3611 int i, rc = 0; 3612 char buffer[128], *buf; 3613 const char *args[MAX_ARGS + 1]; 3614 3615 /* 3616 * Simple loop: displays a "> " prompt and processes any input as a 3617 * cxgbetool command. You're supposed to enter only the part after 3618 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3619 */ 3620 for (;;) { 3621 fprintf(stdout, "> "); 3622 fflush(stdout); 3623 buf = fgets(buffer, sizeof(buffer), stdin); 3624 if (buf == NULL) { 3625 if (ferror(stdin)) { 3626 warn("stdin error"); 3627 rc = errno; /* errno from fgets */ 3628 } 3629 break; 3630 } 3631 3632 i = 0; 3633 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3634 if (args[i][0] != 0 && ++i == MAX_ARGS) 3635 break; 3636 } 3637 args[i] = 0; 3638 3639 if (i == 0) 3640 continue; /* skip empty line */ 3641 3642 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3643 break; 3644 3645 rc = run_cmd(i, args); 3646 } 3647 3648 /* rc normally comes from the last command (not including quit/exit) */ 3649 return (rc); 3650 } 3651 3652 static void 3653 parse_nexus_name(const char *s) 3654 { 3655 char junk; 3656 3657 if (sscanf(s, "t%unex%u%c", &chip_id, &inst, &junk) != 2) 3658 errx(EINVAL, "invalid nexus \"%s\"", s); 3659 nexus = s; 3660 } 3661 3662 int 3663 main(int argc, const char *argv[]) 3664 { 3665 int rc = -1; 3666 3667 progname = argv[0]; 3668 3669 if (argc == 2) { 3670 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3671 usage(stdout); 3672 exit(0); 3673 } 3674 } 3675 3676 if (argc < 3) { 3677 usage(stderr); 3678 exit(EINVAL); 3679 } 3680 3681 parse_nexus_name(argv[1]); 3682 3683 /* progname and nexus */ 3684 argc -= 2; 3685 argv += 2; 3686 3687 if (argc == 1 && !strcmp(argv[0], "stdio")) 3688 rc = run_cmd_loop(); 3689 else 3690 rc = run_cmd(argc, argv); 3691 3692 return (rc); 3693 } 3694