1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/ioctl.h> 33 #include <sys/mman.h> 34 #include <sys/socket.h> 35 #include <sys/stat.h> 36 37 #include <arpa/inet.h> 38 #include <net/ethernet.h> 39 #include <net/sff8472.h> 40 #include <netinet/in.h> 41 42 #include <ctype.h> 43 #include <err.h> 44 #include <errno.h> 45 #include <fcntl.h> 46 #include <limits.h> 47 #include <stdint.h> 48 #include <stdio.h> 49 #include <stdlib.h> 50 #include <string.h> 51 #include <unistd.h> 52 #include <pcap.h> 53 54 #include "t4_ioctl.h" 55 #include "tcb_common.h" 56 57 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 58 #define max(x, y) ((x) > (y) ? (x) : (y)) 59 60 static const char *progname, *nexus; 61 static int chip_id; /* 4 for T4, 5 for T5 */ 62 63 struct reg_info { 64 const char *name; 65 uint32_t addr; 66 uint32_t len; 67 }; 68 69 struct mod_regs { 70 const char *name; 71 const struct reg_info *ri; 72 }; 73 74 struct field_desc { 75 const char *name; /* Field name */ 76 unsigned short start; /* Start bit position */ 77 unsigned short end; /* End bit position */ 78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 79 unsigned char hex; /* Print field in hex instead of decimal */ 80 unsigned char islog2; /* Field contains the base-2 log of the value */ 81 }; 82 83 #include "reg_defs_t4.c" 84 #include "reg_defs_t5.c" 85 #include "reg_defs_t6.c" 86 #include "reg_defs_t4vf.c" 87 88 static void 89 usage(FILE *fp) 90 { 91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 92 fprintf(fp, 93 "\tclearstats <port> clear port statistics\n" 94 "\tcontext <type> <id> show an SGE context\n" 95 "\tdumpstate <dump.bin> dump chip state\n" 96 "\tfilter <idx> [<param> <val>] ... set a filter\n" 97 "\tfilter <idx> delete|clear delete a filter\n" 98 "\tfilter list list all filters\n" 99 "\tfilter mode [<match>] ... get/set global filter mode\n" 100 "\thashfilter [<param> <val>] ... set a hashfilter\n" 101 "\thashfilter <idx> delete|clear delete a hashfilter\n" 102 "\thashfilter list list all hashfilters\n" 103 "\thashfilter mode get global hashfilter mode\n" 104 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 105 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 106 "\tloadboot clear [pf|offset <val>] remove boot image\n" 107 "\tloadboot-cfg <bc.bin> install boot config\n" 108 "\tloadboot-cfg clear remove boot config\n" 109 "\tloadcfg <fw-config.txt> install configuration file\n" 110 "\tloadcfg clear remove configuration file\n" 111 "\tloadfw <fw-image.bin> install firmware\n" 112 "\tmemdump <addr> <len> dump a memory range\n" 113 "\tmodinfo <port> [raw] optics/cable information\n" 114 "\tpolicy <policy.txt> install offload policy\n" 115 "\tpolicy clear remove offload policy\n" 116 "\treg <address>[=<val>] read/write register\n" 117 "\treg64 <address>[=<val>] read/write 64 bit register\n" 118 "\tregdump [<module>] ... dump registers\n" 119 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 120 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 121 "\tstdio interactive mode\n" 122 "\ttcb <tid> read TCB\n" 123 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 124 "\ttracer <idx> disable|enable disable or enable a tracer\n" 125 "\ttracer list list all tracers\n" 126 ); 127 } 128 129 static inline unsigned int 130 get_card_vers(unsigned int version) 131 { 132 return (version & 0x3ff); 133 } 134 135 static int 136 real_doit(unsigned long cmd, void *data, const char *cmdstr) 137 { 138 static int fd = -1; 139 int rc = 0; 140 141 if (fd == -1) { 142 char buf[64]; 143 144 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 145 if ((fd = open(buf, O_RDWR)) < 0) { 146 warn("open(%s)", nexus); 147 rc = errno; 148 return (rc); 149 } 150 chip_id = nexus[1] - '0'; 151 } 152 153 rc = ioctl(fd, cmd, data); 154 if (rc < 0) { 155 warn("%s", cmdstr); 156 rc = errno; 157 } 158 159 return (rc); 160 } 161 #define doit(x, y) real_doit(x, y, #x) 162 163 static char * 164 str_to_number(const char *s, long *val, long long *vall) 165 { 166 char *p; 167 168 if (vall) 169 *vall = strtoll(s, &p, 0); 170 else if (val) 171 *val = strtol(s, &p, 0); 172 else 173 p = NULL; 174 175 return (p); 176 } 177 178 static int 179 read_reg(long addr, int size, long long *val) 180 { 181 struct t4_reg reg; 182 int rc; 183 184 reg.addr = (uint32_t) addr; 185 reg.size = (uint32_t) size; 186 reg.val = 0; 187 188 rc = doit(CHELSIO_T4_GETREG, ®); 189 190 *val = reg.val; 191 192 return (rc); 193 } 194 195 static int 196 write_reg(long addr, int size, long long val) 197 { 198 struct t4_reg reg; 199 200 reg.addr = (uint32_t) addr; 201 reg.size = (uint32_t) size; 202 reg.val = (uint64_t) val; 203 204 return doit(CHELSIO_T4_SETREG, ®); 205 } 206 207 static int 208 register_io(int argc, const char *argv[], int size) 209 { 210 char *p, *v; 211 long addr; 212 long long val; 213 int w = 0, rc; 214 215 if (argc == 1) { 216 /* <reg> OR <reg>=<value> */ 217 218 p = str_to_number(argv[0], &addr, NULL); 219 if (*p) { 220 if (*p != '=') { 221 warnx("invalid register \"%s\"", argv[0]); 222 return (EINVAL); 223 } 224 225 w = 1; 226 v = p + 1; 227 p = str_to_number(v, NULL, &val); 228 229 if (*p) { 230 warnx("invalid value \"%s\"", v); 231 return (EINVAL); 232 } 233 } 234 235 } else if (argc == 2) { 236 /* <reg> <value> */ 237 238 w = 1; 239 240 p = str_to_number(argv[0], &addr, NULL); 241 if (*p) { 242 warnx("invalid register \"%s\"", argv[0]); 243 return (EINVAL); 244 } 245 246 p = str_to_number(argv[1], NULL, &val); 247 if (*p) { 248 warnx("invalid value \"%s\"", argv[1]); 249 return (EINVAL); 250 } 251 } else { 252 warnx("reg: invalid number of arguments (%d)", argc); 253 return (EINVAL); 254 } 255 256 if (w) 257 rc = write_reg(addr, size, val); 258 else { 259 rc = read_reg(addr, size, &val); 260 if (rc == 0) 261 printf("0x%llx [%llu]\n", val, val); 262 } 263 264 return (rc); 265 } 266 267 static inline uint32_t 268 xtract(uint32_t val, int shift, int len) 269 { 270 return (val >> shift) & ((1 << len) - 1); 271 } 272 273 static int 274 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 275 { 276 uint32_t reg_val = 0; 277 278 for ( ; reg_array->name; ++reg_array) 279 if (!reg_array->len) { 280 reg_val = regs[reg_array->addr / 4]; 281 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 282 reg_array->name, reg_val, reg_val); 283 } else { 284 uint32_t v = xtract(reg_val, reg_array->addr, 285 reg_array->len); 286 287 printf(" %*u:%u %-47s %#-10x %u\n", 288 reg_array->addr < 10 ? 3 : 2, 289 reg_array->addr + reg_array->len - 1, 290 reg_array->addr, reg_array->name, v, v); 291 } 292 293 return (1); 294 } 295 296 static int 297 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 298 const struct mod_regs *modtab, int nmodules) 299 { 300 int i, j, match; 301 302 for (i = 0; i < argc; i++) { 303 for (j = 0; j < nmodules; j++) { 304 if (!strcmp(argv[i], modtab[j].name)) 305 break; 306 } 307 308 if (j == nmodules) { 309 warnx("invalid register block \"%s\"", argv[i]); 310 fprintf(stderr, "\nAvailable blocks:"); 311 for ( ; nmodules; nmodules--, modtab++) 312 fprintf(stderr, " %s", modtab->name); 313 fprintf(stderr, "\n"); 314 return (EINVAL); 315 } 316 } 317 318 for ( ; nmodules; nmodules--, modtab++) { 319 320 match = argc == 0 ? 1 : 0; 321 for (i = 0; !match && i < argc; i++) { 322 if (!strcmp(argv[i], modtab->name)) 323 match = 1; 324 } 325 326 if (match) 327 dump_block_regs(modtab->ri, regs); 328 } 329 330 return (0); 331 } 332 333 #define T4_MODREGS(name) { #name, t4_##name##_regs } 334 static int 335 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 336 { 337 static struct mod_regs t4_mod[] = { 338 T4_MODREGS(sge), 339 { "pci", t4_pcie_regs }, 340 T4_MODREGS(dbg), 341 T4_MODREGS(mc), 342 T4_MODREGS(ma), 343 { "edc0", t4_edc_0_regs }, 344 { "edc1", t4_edc_1_regs }, 345 T4_MODREGS(cim), 346 T4_MODREGS(tp), 347 T4_MODREGS(ulp_rx), 348 T4_MODREGS(ulp_tx), 349 { "pmrx", t4_pm_rx_regs }, 350 { "pmtx", t4_pm_tx_regs }, 351 T4_MODREGS(mps), 352 { "cplsw", t4_cpl_switch_regs }, 353 T4_MODREGS(smb), 354 { "i2c", t4_i2cm_regs }, 355 T4_MODREGS(mi), 356 T4_MODREGS(uart), 357 T4_MODREGS(pmu), 358 T4_MODREGS(sf), 359 T4_MODREGS(pl), 360 T4_MODREGS(le), 361 T4_MODREGS(ncsi), 362 T4_MODREGS(xgmac) 363 }; 364 365 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 366 } 367 #undef T4_MODREGS 368 369 #define T5_MODREGS(name) { #name, t5_##name##_regs } 370 static int 371 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 372 { 373 static struct mod_regs t5_mod[] = { 374 T5_MODREGS(sge), 375 { "pci", t5_pcie_regs }, 376 T5_MODREGS(dbg), 377 { "mc0", t5_mc_0_regs }, 378 { "mc1", t5_mc_1_regs }, 379 T5_MODREGS(ma), 380 { "edc0", t5_edc_t50_regs }, 381 { "edc1", t5_edc_t51_regs }, 382 T5_MODREGS(cim), 383 T5_MODREGS(tp), 384 { "ulprx", t5_ulp_rx_regs }, 385 { "ulptx", t5_ulp_tx_regs }, 386 { "pmrx", t5_pm_rx_regs }, 387 { "pmtx", t5_pm_tx_regs }, 388 T5_MODREGS(mps), 389 { "cplsw", t5_cpl_switch_regs }, 390 T5_MODREGS(smb), 391 { "i2c", t5_i2cm_regs }, 392 T5_MODREGS(mi), 393 T5_MODREGS(uart), 394 T5_MODREGS(pmu), 395 T5_MODREGS(sf), 396 T5_MODREGS(pl), 397 T5_MODREGS(le), 398 T5_MODREGS(ncsi), 399 T5_MODREGS(mac), 400 { "hma", t5_hma_t5_regs } 401 }; 402 403 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 404 } 405 #undef T5_MODREGS 406 407 #define T6_MODREGS(name) { #name, t6_##name##_regs } 408 static int 409 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 410 { 411 static struct mod_regs t6_mod[] = { 412 T6_MODREGS(sge), 413 { "pci", t6_pcie_regs }, 414 T6_MODREGS(dbg), 415 { "mc0", t6_mc_0_regs }, 416 T6_MODREGS(ma), 417 { "edc0", t6_edc_t60_regs }, 418 { "edc1", t6_edc_t61_regs }, 419 T6_MODREGS(cim), 420 T6_MODREGS(tp), 421 { "ulprx", t6_ulp_rx_regs }, 422 { "ulptx", t6_ulp_tx_regs }, 423 { "pmrx", t6_pm_rx_regs }, 424 { "pmtx", t6_pm_tx_regs }, 425 T6_MODREGS(mps), 426 { "cplsw", t6_cpl_switch_regs }, 427 T6_MODREGS(smb), 428 { "i2c", t6_i2cm_regs }, 429 T6_MODREGS(mi), 430 T6_MODREGS(uart), 431 T6_MODREGS(pmu), 432 T6_MODREGS(sf), 433 T6_MODREGS(pl), 434 T6_MODREGS(le), 435 T6_MODREGS(ncsi), 436 T6_MODREGS(mac), 437 { "hma", t6_hma_t6_regs } 438 }; 439 440 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 441 } 442 #undef T6_MODREGS 443 444 static int 445 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 446 { 447 static struct mod_regs t4vf_mod[] = { 448 { "sge", t4vf_sge_regs }, 449 { "mps", t4vf_mps_regs }, 450 { "pl", t4vf_pl_regs }, 451 { "mbdata", t4vf_mbdata_regs }, 452 { "cim", t4vf_cim_regs }, 453 }; 454 455 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 456 } 457 458 static int 459 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 460 { 461 static struct mod_regs t5vf_mod[] = { 462 { "sge", t5vf_sge_regs }, 463 { "mps", t4vf_mps_regs }, 464 { "pl", t5vf_pl_regs }, 465 { "mbdata", t4vf_mbdata_regs }, 466 { "cim", t4vf_cim_regs }, 467 }; 468 469 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 470 } 471 472 static int 473 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 474 { 475 static struct mod_regs t6vf_mod[] = { 476 { "sge", t5vf_sge_regs }, 477 { "mps", t4vf_mps_regs }, 478 { "pl", t6vf_pl_regs }, 479 { "mbdata", t4vf_mbdata_regs }, 480 { "cim", t4vf_cim_regs }, 481 }; 482 483 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 484 } 485 486 static int 487 dump_regs(int argc, const char *argv[]) 488 { 489 int vers, revision, rc; 490 struct t4_regdump regs; 491 uint32_t len; 492 493 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 494 regs.data = calloc(1, len); 495 if (regs.data == NULL) { 496 warnc(ENOMEM, "regdump"); 497 return (ENOMEM); 498 } 499 500 regs.len = len; 501 rc = doit(CHELSIO_T4_REGDUMP, ®s); 502 if (rc != 0) 503 return (rc); 504 505 vers = get_card_vers(regs.version); 506 revision = (regs.version >> 10) & 0x3f; 507 508 if (vers == 4) { 509 if (revision == 0x3f) 510 rc = dump_regs_t4vf(argc, argv, regs.data); 511 else 512 rc = dump_regs_t4(argc, argv, regs.data); 513 } else if (vers == 5) { 514 if (revision == 0x3f) 515 rc = dump_regs_t5vf(argc, argv, regs.data); 516 else 517 rc = dump_regs_t5(argc, argv, regs.data); 518 } else if (vers == 6) { 519 if (revision == 0x3f) 520 rc = dump_regs_t6vf(argc, argv, regs.data); 521 else 522 rc = dump_regs_t6(argc, argv, regs.data); 523 } else { 524 warnx("%s (type %d, rev %d) is not a known card.", 525 nexus, vers, revision); 526 return (ENOTSUP); 527 } 528 529 free(regs.data); 530 return (rc); 531 } 532 533 static void 534 do_show_info_header(uint32_t mode) 535 { 536 uint32_t i; 537 538 printf("%4s %8s", "Idx", "Hits"); 539 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 540 switch (mode & i) { 541 case T4_FILTER_FCoE: 542 printf(" FCoE"); 543 break; 544 545 case T4_FILTER_PORT: 546 printf(" Port"); 547 break; 548 549 case T4_FILTER_VNIC: 550 if (mode & T4_FILTER_IC_VNIC) 551 printf(" VFvld:PF:VF"); 552 else 553 printf(" vld:oVLAN"); 554 break; 555 556 case T4_FILTER_VLAN: 557 printf(" vld:VLAN"); 558 break; 559 560 case T4_FILTER_IP_TOS: 561 printf(" TOS"); 562 break; 563 564 case T4_FILTER_IP_PROTO: 565 printf(" Prot"); 566 break; 567 568 case T4_FILTER_ETH_TYPE: 569 printf(" EthType"); 570 break; 571 572 case T4_FILTER_MAC_IDX: 573 printf(" MACIdx"); 574 break; 575 576 case T4_FILTER_MPS_HIT_TYPE: 577 printf(" MPS"); 578 break; 579 580 case T4_FILTER_IP_FRAGMENT: 581 printf(" Frag"); 582 break; 583 584 default: 585 /* compressed filter field not enabled */ 586 break; 587 } 588 } 589 printf(" %20s %20s %9s %9s %s\n", 590 "DIP", "SIP", "DPORT", "SPORT", "Action"); 591 } 592 593 /* 594 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 595 * ordered tuple. If the parameter name in the argument sub-vector does not 596 * match the passed in parameter name, then a zero is returned for the 597 * function and no parsing is performed. If there is a match, then the value 598 * and optional mask are parsed and returned in the provided return value 599 * pointers. If no optional mask is specified, then a default mask of all 1s 600 * will be returned. 601 * 602 * An error in parsing the value[:mask] will result in an error message and 603 * program termination. 604 */ 605 static int 606 parse_val_mask(const char *param, const char *args[], uint32_t *val, 607 uint32_t *mask, int hashfilter) 608 { 609 char *p; 610 611 if (strcmp(param, args[0]) != 0) 612 return (EINVAL); 613 614 *val = strtoul(args[1], &p, 0); 615 if (p > args[1]) { 616 if (p[0] == 0) { 617 *mask = ~0; 618 return (0); 619 } 620 621 if (p[0] == ':' && p[1] != 0) { 622 if (hashfilter) { 623 warnx("param %s: mask not allowed for " 624 "hashfilter or nat params", param); 625 return (EINVAL); 626 } 627 *mask = strtoul(p+1, &p, 0); 628 if (p[0] == 0) 629 return (0); 630 } else { 631 warnx("param %s: mask not allowed for hashfilter", 632 param); 633 return (EINVAL); 634 } 635 } 636 637 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 638 args[0], args[1]); 639 640 return (EINVAL); 641 } 642 643 /* 644 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 645 * ordered tuple. If the parameter name in the argument sub-vector does not 646 * match the passed in parameter name, then a zero is returned for the 647 * function and no parsing is performed. If there is a match, then the value 648 * and optional mask are parsed and returned in the provided return value 649 * pointers. If no optional mask is specified, then a default mask of all 1s 650 * will be returned. 651 * 652 * The value return parameter "afp" is used to specify the expected address 653 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 654 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 655 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 656 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 657 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 658 * returned in the first four bytes of the address and mask return values with 659 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 660 * 1, 2, 3}, respectively. 661 * 662 * An error in parsing the value[:mask] will result in an error message and 663 * program termination. 664 */ 665 static int 666 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 667 uint8_t mask[], int maskless) 668 { 669 const char *colon, *afn; 670 char *slash; 671 uint8_t *m; 672 int af, ret; 673 unsigned int masksize; 674 675 /* 676 * Is this our parameter? 677 */ 678 if (strcmp(param, args[0]) != 0) 679 return (EINVAL); 680 681 /* 682 * Fundamental IPv4 versus IPv6 selection. 683 */ 684 colon = strchr(args[1], ':'); 685 if (!colon) { 686 afn = "IPv4"; 687 af = AF_INET; 688 masksize = 32; 689 } else { 690 afn = "IPv6"; 691 af = AF_INET6; 692 masksize = 128; 693 } 694 if (*afp == AF_UNSPEC) 695 *afp = af; 696 else if (*afp != af) { 697 warnx("address %s is not of expected family %s", 698 args[1], *afp == AF_INET ? "IP" : "IPv6"); 699 return (EINVAL); 700 } 701 702 /* 703 * Parse address (temporarily stripping off any "/mask" 704 * specification). 705 */ 706 slash = strchr(args[1], '/'); 707 if (slash) 708 *slash = 0; 709 ret = inet_pton(af, args[1], addr); 710 if (slash) 711 *slash = '/'; 712 if (ret <= 0) { 713 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 714 return (EINVAL); 715 } 716 717 /* 718 * Parse optional mask specification. 719 */ 720 if (slash) { 721 char *p; 722 unsigned int prefix = strtoul(slash + 1, &p, 10); 723 724 if (maskless) { 725 warnx("mask cannot be provided for maskless specification"); 726 return (EINVAL); 727 } 728 729 if (p == slash + 1) { 730 warnx("missing address prefix for %s", param); 731 return (EINVAL); 732 } 733 if (*p) { 734 warnx("%s is not a valid address prefix", slash + 1); 735 return (EINVAL); 736 } 737 if (prefix > masksize) { 738 warnx("prefix %u is too long for an %s address", 739 prefix, afn); 740 return (EINVAL); 741 } 742 memset(mask, 0, masksize / 8); 743 masksize = prefix; 744 } 745 746 if (mask != NULL) { 747 /* 748 * Fill in mask. 749 */ 750 for (m = mask; masksize >= 8; m++, masksize -= 8) 751 *m = ~0; 752 if (masksize) 753 *m = ~0 << (8 - masksize); 754 } 755 756 return (0); 757 } 758 759 /* 760 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 761 * tuple. If the parameter name in the argument sub-vector does not match the 762 * passed in parameter name, then a zero is returned for the function and no 763 * parsing is performed. If there is a match, then the value is parsed and 764 * returned in the provided return value pointer. 765 */ 766 static int 767 parse_val(const char *param, const char *args[], uint32_t *val) 768 { 769 char *p; 770 771 if (strcmp(param, args[0]) != 0) 772 return (EINVAL); 773 774 *val = strtoul(args[1], &p, 0); 775 if (p > args[1] && p[0] == 0) 776 return (0); 777 778 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 779 return (EINVAL); 780 } 781 782 static void 783 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 784 { 785 int noctets, octet; 786 787 printf(" "); 788 if (type == 0) { 789 noctets = 4; 790 printf("%3s", " "); 791 } else 792 noctets = 16; 793 794 for (octet = 0; octet < noctets; octet++) 795 printf("%02x", addr[octet]); 796 printf("/"); 797 for (octet = 0; octet < noctets; octet++) 798 printf("%02x", addrm[octet]); 799 } 800 801 static void 802 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 803 { 804 uint32_t i; 805 806 printf("%4d", t->idx); 807 if (t->hits == UINT64_MAX) 808 printf(" %8s", "-"); 809 else 810 printf(" %8ju", t->hits); 811 812 /* 813 * Compressed header portion of filter. 814 */ 815 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 816 switch (mode & i) { 817 case T4_FILTER_FCoE: 818 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 819 break; 820 821 case T4_FILTER_PORT: 822 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 823 break; 824 825 case T4_FILTER_VNIC: 826 if (mode & T4_FILTER_IC_VNIC) { 827 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 828 t->fs.val.pfvf_vld, 829 (t->fs.val.vnic >> 13) & 0x7, 830 t->fs.val.vnic & 0x1fff, 831 t->fs.mask.pfvf_vld, 832 (t->fs.mask.vnic >> 13) & 0x7, 833 t->fs.mask.vnic & 0x1fff); 834 } else { 835 printf(" %1d:%04x/%1d:%04x", 836 t->fs.val.ovlan_vld, t->fs.val.vnic, 837 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 838 } 839 break; 840 841 case T4_FILTER_VLAN: 842 printf(" %1d:%04x/%1d:%04x", 843 t->fs.val.vlan_vld, t->fs.val.vlan, 844 t->fs.mask.vlan_vld, t->fs.mask.vlan); 845 break; 846 847 case T4_FILTER_IP_TOS: 848 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 849 break; 850 851 case T4_FILTER_IP_PROTO: 852 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 853 break; 854 855 case T4_FILTER_ETH_TYPE: 856 printf(" %04x/%04x", t->fs.val.ethtype, 857 t->fs.mask.ethtype); 858 break; 859 860 case T4_FILTER_MAC_IDX: 861 printf(" %03x/%03x", t->fs.val.macidx, 862 t->fs.mask.macidx); 863 break; 864 865 case T4_FILTER_MPS_HIT_TYPE: 866 printf(" %1x/%1x", t->fs.val.matchtype, 867 t->fs.mask.matchtype); 868 break; 869 870 case T4_FILTER_IP_FRAGMENT: 871 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 872 break; 873 874 default: 875 /* compressed filter field not enabled */ 876 break; 877 } 878 } 879 880 /* 881 * Fixed portion of filter. 882 */ 883 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 884 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 885 printf(" %04x/%04x %04x/%04x", 886 t->fs.val.dport, t->fs.mask.dport, 887 t->fs.val.sport, t->fs.mask.sport); 888 889 /* 890 * Variable length filter action. 891 */ 892 if (t->fs.action == FILTER_DROP) 893 printf(" Drop"); 894 else if (t->fs.action == FILTER_SWITCH) { 895 printf(" Switch: port=%d", t->fs.eport); 896 if (t->fs.newdmac) 897 printf( 898 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 899 ", l2tidx=%d", 900 t->fs.dmac[0], t->fs.dmac[1], 901 t->fs.dmac[2], t->fs.dmac[3], 902 t->fs.dmac[4], t->fs.dmac[5], 903 t->l2tidx); 904 if (t->fs.newsmac) 905 printf( 906 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 907 ", smtidx=%d", 908 t->fs.smac[0], t->fs.smac[1], 909 t->fs.smac[2], t->fs.smac[3], 910 t->fs.smac[4], t->fs.smac[5], 911 t->smtidx); 912 if (t->fs.newvlan == VLAN_REMOVE) 913 printf(", vlan=none"); 914 else if (t->fs.newvlan == VLAN_INSERT) 915 printf(", vlan=insert(%x)", t->fs.vlan); 916 else if (t->fs.newvlan == VLAN_REWRITE) 917 printf(", vlan=rewrite(%x)", t->fs.vlan); 918 } else { 919 printf(" Pass: Q="); 920 if (t->fs.dirsteer == 0) { 921 printf("RSS"); 922 if (t->fs.maskhash) 923 printf("(TCB=hash)"); 924 } else { 925 printf("%d", t->fs.iq); 926 if (t->fs.dirsteerhash == 0) 927 printf("(QID)"); 928 else 929 printf("(hash)"); 930 } 931 } 932 if (t->fs.prio) 933 printf(" Prio"); 934 if (t->fs.rpttid) 935 printf(" RptTID"); 936 printf("\n"); 937 } 938 939 static int 940 show_filters(int hash) 941 { 942 uint32_t mode = 0, header = 0; 943 struct t4_filter t; 944 int rc; 945 946 /* Get the global filter mode first */ 947 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 948 if (rc != 0) 949 return (rc); 950 951 t.idx = 0; 952 t.fs.hash = hash; 953 for (t.idx = 0; ; t.idx++) { 954 rc = doit(CHELSIO_T4_GET_FILTER, &t); 955 if (rc != 0 || t.idx == 0xffffffff) 956 break; 957 958 if (!header) { 959 do_show_info_header(mode); 960 header = 1; 961 } 962 do_show_one_filter_info(&t, mode); 963 }; 964 965 return (rc); 966 } 967 968 static int 969 get_filter_mode(int hashfilter) 970 { 971 uint32_t mode = hashfilter; 972 int rc; 973 974 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 975 if (rc != 0) 976 return (rc); 977 978 if (mode & T4_FILTER_IPv4) 979 printf("ipv4 "); 980 981 if (mode & T4_FILTER_IPv6) 982 printf("ipv6 "); 983 984 if (mode & T4_FILTER_IP_SADDR) 985 printf("sip "); 986 987 if (mode & T4_FILTER_IP_DADDR) 988 printf("dip "); 989 990 if (mode & T4_FILTER_IP_SPORT) 991 printf("sport "); 992 993 if (mode & T4_FILTER_IP_DPORT) 994 printf("dport "); 995 996 if (mode & T4_FILTER_IP_FRAGMENT) 997 printf("frag "); 998 999 if (mode & T4_FILTER_MPS_HIT_TYPE) 1000 printf("matchtype "); 1001 1002 if (mode & T4_FILTER_MAC_IDX) 1003 printf("macidx "); 1004 1005 if (mode & T4_FILTER_ETH_TYPE) 1006 printf("ethtype "); 1007 1008 if (mode & T4_FILTER_IP_PROTO) 1009 printf("proto "); 1010 1011 if (mode & T4_FILTER_IP_TOS) 1012 printf("tos "); 1013 1014 if (mode & T4_FILTER_VLAN) 1015 printf("vlan "); 1016 1017 if (mode & T4_FILTER_VNIC) { 1018 if (mode & T4_FILTER_IC_VNIC) 1019 printf("vnic_id "); 1020 else 1021 printf("ovlan "); 1022 } 1023 1024 if (mode & T4_FILTER_PORT) 1025 printf("iport "); 1026 1027 if (mode & T4_FILTER_FCoE) 1028 printf("fcoe "); 1029 1030 printf("\n"); 1031 1032 return (0); 1033 } 1034 1035 static int 1036 set_filter_mode(int argc, const char *argv[]) 1037 { 1038 uint32_t mode = 0; 1039 int vnic = 0, ovlan = 0; 1040 1041 for (; argc; argc--, argv++) { 1042 if (!strcmp(argv[0], "frag")) 1043 mode |= T4_FILTER_IP_FRAGMENT; 1044 1045 if (!strcmp(argv[0], "matchtype")) 1046 mode |= T4_FILTER_MPS_HIT_TYPE; 1047 1048 if (!strcmp(argv[0], "macidx")) 1049 mode |= T4_FILTER_MAC_IDX; 1050 1051 if (!strcmp(argv[0], "ethtype")) 1052 mode |= T4_FILTER_ETH_TYPE; 1053 1054 if (!strcmp(argv[0], "proto")) 1055 mode |= T4_FILTER_IP_PROTO; 1056 1057 if (!strcmp(argv[0], "tos")) 1058 mode |= T4_FILTER_IP_TOS; 1059 1060 if (!strcmp(argv[0], "vlan")) 1061 mode |= T4_FILTER_VLAN; 1062 1063 if (!strcmp(argv[0], "ovlan")) { 1064 mode |= T4_FILTER_VNIC; 1065 ovlan++; 1066 } 1067 1068 if (!strcmp(argv[0], "vnic_id")) { 1069 mode |= T4_FILTER_VNIC; 1070 mode |= T4_FILTER_IC_VNIC; 1071 vnic++; 1072 } 1073 1074 if (!strcmp(argv[0], "iport")) 1075 mode |= T4_FILTER_PORT; 1076 1077 if (!strcmp(argv[0], "fcoe")) 1078 mode |= T4_FILTER_FCoE; 1079 } 1080 1081 if (vnic > 0 && ovlan > 0) { 1082 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1083 return (EINVAL); 1084 } 1085 1086 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1087 } 1088 1089 static int 1090 del_filter(uint32_t idx, int hashfilter) 1091 { 1092 struct t4_filter t; 1093 1094 t.fs.hash = hashfilter; 1095 t.idx = idx; 1096 1097 return doit(CHELSIO_T4_DEL_FILTER, &t); 1098 } 1099 1100 static int 1101 set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1102 { 1103 int rc, af = AF_UNSPEC, start_arg = 0; 1104 struct t4_filter t; 1105 1106 if (argc < 2) { 1107 warnc(EINVAL, "%s", __func__); 1108 return (EINVAL); 1109 }; 1110 bzero(&t, sizeof (t)); 1111 t.idx = idx; 1112 t.fs.hitcnts = 1; 1113 t.fs.hash = hash; 1114 1115 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1116 const char **args = &argv[start_arg]; 1117 uint32_t val, mask; 1118 1119 if (!strcmp(argv[start_arg], "type")) { 1120 int newaf; 1121 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1122 newaf = AF_INET; 1123 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1124 newaf = AF_INET6; 1125 else { 1126 warnx("invalid type \"%s\"; " 1127 "must be one of \"ipv4\" or \"ipv6\"", 1128 argv[start_arg + 1]); 1129 return (EINVAL); 1130 } 1131 1132 if (af != AF_UNSPEC && af != newaf) { 1133 warnx("conflicting IPv4/IPv6 specifications."); 1134 return (EINVAL); 1135 } 1136 af = newaf; 1137 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1138 t.fs.val.fcoe = val; 1139 t.fs.mask.fcoe = mask; 1140 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1141 t.fs.val.iport = val; 1142 t.fs.mask.iport = mask; 1143 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1144 t.fs.val.vnic = val; 1145 t.fs.mask.vnic = mask; 1146 t.fs.val.ovlan_vld = 1; 1147 t.fs.mask.ovlan_vld = 1; 1148 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1149 t.fs.val.vlan = val; 1150 t.fs.mask.vlan = mask; 1151 t.fs.val.vlan_vld = 1; 1152 t.fs.mask.vlan_vld = 1; 1153 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1154 t.fs.val.vnic &= 0x1fff; 1155 t.fs.val.vnic |= (val & 0x7) << 13; 1156 t.fs.mask.vnic &= 0x1fff; 1157 t.fs.mask.vnic |= (mask & 0x7) << 13; 1158 t.fs.val.pfvf_vld = 1; 1159 t.fs.mask.pfvf_vld = 1; 1160 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1161 t.fs.val.vnic &= 0xe000; 1162 t.fs.val.vnic |= val & 0x1fff; 1163 t.fs.mask.vnic &= 0xe000; 1164 t.fs.mask.vnic |= mask & 0x1fff; 1165 t.fs.val.pfvf_vld = 1; 1166 t.fs.mask.pfvf_vld = 1; 1167 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1168 t.fs.val.tos = val; 1169 t.fs.mask.tos = mask; 1170 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1171 t.fs.val.proto = val; 1172 t.fs.mask.proto = mask; 1173 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1174 t.fs.val.ethtype = val; 1175 t.fs.mask.ethtype = mask; 1176 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1177 t.fs.val.macidx = val; 1178 t.fs.mask.macidx = mask; 1179 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1180 t.fs.val.matchtype = val; 1181 t.fs.mask.matchtype = mask; 1182 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1183 t.fs.val.frag = val; 1184 t.fs.mask.frag = mask; 1185 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1186 t.fs.val.dport = val; 1187 t.fs.mask.dport = mask; 1188 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1189 t.fs.val.sport = val; 1190 t.fs.mask.sport = mask; 1191 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1192 t.fs.mask.dip, hash)) { 1193 /* nada */; 1194 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1195 t.fs.mask.sip, hash)) { 1196 /* nada */; 1197 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1198 /*nada*/; 1199 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1200 /*nada*/ 1201 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1202 t.fs.nat_dport = val; 1203 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1204 t.fs.nat_sport = val; 1205 } else if (!strcmp(argv[start_arg], "action")) { 1206 if (!strcmp(argv[start_arg + 1], "pass")) 1207 t.fs.action = FILTER_PASS; 1208 else if (!strcmp(argv[start_arg + 1], "drop")) 1209 t.fs.action = FILTER_DROP; 1210 else if (!strcmp(argv[start_arg + 1], "switch")) 1211 t.fs.action = FILTER_SWITCH; 1212 else { 1213 warnx("invalid action \"%s\"; must be one of" 1214 " \"pass\", \"drop\" or \"switch\"", 1215 argv[start_arg + 1]); 1216 return (EINVAL); 1217 } 1218 } else if (!parse_val("hitcnts", args, &val)) { 1219 t.fs.hitcnts = val; 1220 } else if (!parse_val("prio", args, &val)) { 1221 t.fs.prio = val; 1222 } else if (!parse_val("rpttid", args, &val)) { 1223 t.fs.rpttid = 1; 1224 } else if (!parse_val("queue", args, &val)) { 1225 t.fs.dirsteer = 1; 1226 t.fs.iq = val; 1227 } else if (!parse_val("tcbhash", args, &val)) { 1228 t.fs.maskhash = 1; 1229 t.fs.dirsteerhash = 1; 1230 } else if (!parse_val("eport", args, &val)) { 1231 t.fs.eport = val; 1232 } else if (!parse_val("swapmac", args, &val)) { 1233 t.fs.swapmac = 1; 1234 } else if (!strcmp(argv[start_arg], "nat")) { 1235 if (!strcmp(argv[start_arg + 1], "dip")) 1236 t.fs.nat_mode = NAT_MODE_DIP; 1237 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1238 t.fs.nat_mode = NAT_MODE_DIP_DP; 1239 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1240 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1241 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1242 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1243 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1244 t.fs.nat_mode = NAT_MODE_SIP_SP; 1245 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1246 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1247 else if (!strcmp(argv[start_arg + 1], "all")) 1248 t.fs.nat_mode = NAT_MODE_ALL; 1249 else { 1250 warnx("unknown nat type \"%s\"; known types are dip, " 1251 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1252 "dip-sip-sp, and all", argv[start_arg + 1]); 1253 return (EINVAL); 1254 } 1255 } else if (!parse_val("natseq", args, &val)) { 1256 t.fs.nat_seq_chk = val; 1257 } else if (!parse_val("natflag", args, &val)) { 1258 t.fs.nat_flag_chk = 1; 1259 } else if (!strcmp(argv[start_arg], "dmac")) { 1260 struct ether_addr *daddr; 1261 1262 daddr = ether_aton(argv[start_arg + 1]); 1263 if (daddr == NULL) { 1264 warnx("invalid dmac address \"%s\"", 1265 argv[start_arg + 1]); 1266 return (EINVAL); 1267 } 1268 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1269 t.fs.newdmac = 1; 1270 } else if (!strcmp(argv[start_arg], "smac")) { 1271 struct ether_addr *saddr; 1272 1273 saddr = ether_aton(argv[start_arg + 1]); 1274 if (saddr == NULL) { 1275 warnx("invalid smac address \"%s\"", 1276 argv[start_arg + 1]); 1277 return (EINVAL); 1278 } 1279 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1280 t.fs.newsmac = 1; 1281 } else if (!strcmp(argv[start_arg], "vlan")) { 1282 char *p; 1283 if (!strcmp(argv[start_arg + 1], "none")) { 1284 t.fs.newvlan = VLAN_REMOVE; 1285 } else if (argv[start_arg + 1][0] == '=') { 1286 t.fs.newvlan = VLAN_REWRITE; 1287 } else if (argv[start_arg + 1][0] == '+') { 1288 t.fs.newvlan = VLAN_INSERT; 1289 } else if (isdigit(argv[start_arg + 1][0]) && 1290 !parse_val_mask("vlan", args, &val, &mask, hash)) { 1291 t.fs.val.vlan = val; 1292 t.fs.mask.vlan = mask; 1293 t.fs.val.vlan_vld = 1; 1294 t.fs.mask.vlan_vld = 1; 1295 } else { 1296 warnx("unknown vlan parameter \"%s\"; must" 1297 " be one of \"none\", \"=<vlan>\", " 1298 " \"+<vlan>\", or \"<vlan>\"", 1299 argv[start_arg + 1]); 1300 return (EINVAL); 1301 } 1302 if (t.fs.newvlan == VLAN_REWRITE || 1303 t.fs.newvlan == VLAN_INSERT) { 1304 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1305 &p, 0); 1306 if (p == argv[start_arg + 1] + 1 || p[0] != 0) { 1307 warnx("invalid vlan \"%s\"", 1308 argv[start_arg + 1]); 1309 return (EINVAL); 1310 } 1311 } 1312 } else { 1313 warnx("invalid parameter \"%s\"", argv[start_arg]); 1314 return (EINVAL); 1315 } 1316 } 1317 if (start_arg != argc) { 1318 warnx("no value for \"%s\"", argv[start_arg]); 1319 return (EINVAL); 1320 } 1321 1322 /* 1323 * Check basic sanity of option combinations. 1324 */ 1325 if (t.fs.action != FILTER_SWITCH && 1326 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1327 t.fs.swapmac || t.fs.nat_mode)) { 1328 warnx("port, dmac, smac, vlan, and nat only make sense with" 1329 " \"action switch\""); 1330 return (EINVAL); 1331 } 1332 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1333 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1334 warnx("nat params only make sense with valid nat mode"); 1335 return (EINVAL); 1336 } 1337 if (t.fs.action != FILTER_PASS && 1338 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1339 warnx("rpttid, queue and tcbhash don't make sense with" 1340 " action \"drop\" or \"switch\""); 1341 return (EINVAL); 1342 } 1343 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1344 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1345 return (EINVAL); 1346 } 1347 1348 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1349 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1350 if (hash && rc == 0) 1351 printf("%d\n", t.idx); 1352 return (rc); 1353 } 1354 1355 static int 1356 filter_cmd(int argc, const char *argv[], int hashfilter) 1357 { 1358 long long val; 1359 uint32_t idx; 1360 char *s; 1361 1362 if (argc == 0) { 1363 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1364 return (EINVAL); 1365 }; 1366 1367 /* list */ 1368 if (strcmp(argv[0], "list") == 0) { 1369 if (argc != 1) 1370 warnx("trailing arguments after \"list\" ignored."); 1371 1372 return show_filters(hashfilter); 1373 } 1374 1375 /* mode */ 1376 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1377 return get_filter_mode(hashfilter); 1378 1379 /* mode <mode> */ 1380 if (!hashfilter && strcmp(argv[0], "mode") == 0) 1381 return set_filter_mode(argc - 1, argv + 1); 1382 1383 /* <idx> ... */ 1384 s = str_to_number(argv[0], NULL, &val); 1385 if (*s || val < 0 || val > 0xffffffffU) { 1386 if (hashfilter) { 1387 /* 1388 * No numeric index means this must be a request to 1389 * create a new hashfilter and we are already at the 1390 * paramter/value list. 1391 */ 1392 idx = (uint32_t) -1; 1393 goto setf; 1394 } 1395 warnx("\"%s\" is neither an index nor a filter subcommand.", 1396 argv[0]); 1397 return (EINVAL); 1398 } 1399 idx = (uint32_t) val; 1400 1401 /* <idx> delete|clear */ 1402 if (argc == 2 && 1403 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1404 return del_filter(idx, hashfilter); 1405 } 1406 1407 /* skip <idx> */ 1408 argc--; 1409 argv++; 1410 1411 setf: 1412 /* [<param> <val>] ... */ 1413 return set_filter(idx, argc, argv, hashfilter); 1414 } 1415 1416 /* 1417 * Shows the fields of a multi-word structure. The structure is considered to 1418 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1419 * whose fields are described by @fd. The 32-bit words are given in @words 1420 * starting with the least significant 32-bit word. 1421 */ 1422 static void 1423 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1424 { 1425 unsigned int w = 0; 1426 const struct field_desc *p; 1427 1428 for (p = fd; p->name; p++) 1429 w = max(w, strlen(p->name)); 1430 1431 while (fd->name) { 1432 unsigned long long data; 1433 int first_word = fd->start / 32; 1434 int shift = fd->start % 32; 1435 int width = fd->end - fd->start + 1; 1436 unsigned long long mask = (1ULL << width) - 1; 1437 1438 data = (words[first_word] >> shift) | 1439 ((uint64_t)words[first_word + 1] << (32 - shift)); 1440 if (shift) 1441 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1442 data &= mask; 1443 if (fd->islog2) 1444 data = 1 << data; 1445 printf("%-*s ", w, fd->name); 1446 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1447 fd++; 1448 } 1449 } 1450 1451 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1452 #define FIELD1(name, start) FIELD(name, start, start) 1453 1454 static void 1455 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1456 { 1457 static struct field_desc egress_t5[] = { 1458 FIELD("DCA_ST:", 181, 191), 1459 FIELD1("StatusPgNS:", 180), 1460 FIELD1("StatusPgRO:", 179), 1461 FIELD1("FetchNS:", 178), 1462 FIELD1("FetchRO:", 177), 1463 FIELD1("Valid:", 176), 1464 FIELD("PCIeDataChannel:", 174, 175), 1465 FIELD1("StatusPgTPHintEn:", 173), 1466 FIELD("StatusPgTPHint:", 171, 172), 1467 FIELD1("FetchTPHintEn:", 170), 1468 FIELD("FetchTPHint:", 168, 169), 1469 FIELD1("FCThreshOverride:", 167), 1470 { "WRLength:", 162, 166, 9, 0, 1 }, 1471 FIELD1("WRLengthKnown:", 161), 1472 FIELD1("ReschedulePending:", 160), 1473 FIELD1("OnChipQueue:", 159), 1474 FIELD1("FetchSizeMode:", 158), 1475 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1476 FIELD1("FLMPacking:", 155), 1477 FIELD("FetchBurstMax:", 153, 154), 1478 FIELD("uPToken:", 133, 152), 1479 FIELD1("uPTokenEn:", 132), 1480 FIELD1("UserModeIO:", 131), 1481 FIELD("uPFLCredits:", 123, 130), 1482 FIELD1("uPFLCreditEn:", 122), 1483 FIELD("FID:", 111, 121), 1484 FIELD("HostFCMode:", 109, 110), 1485 FIELD1("HostFCOwner:", 108), 1486 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1487 FIELD("CIDX:", 89, 104), 1488 FIELD("PIDX:", 73, 88), 1489 { "BaseAddress:", 18, 72, 9, 1 }, 1490 FIELD("QueueSize:", 2, 17), 1491 FIELD1("QueueType:", 1), 1492 FIELD1("CachePriority:", 0), 1493 { NULL } 1494 }; 1495 static struct field_desc egress_t6[] = { 1496 FIELD("DCA_ST:", 181, 191), 1497 FIELD1("StatusPgNS:", 180), 1498 FIELD1("StatusPgRO:", 179), 1499 FIELD1("FetchNS:", 178), 1500 FIELD1("FetchRO:", 177), 1501 FIELD1("Valid:", 176), 1502 FIELD1("ReschedulePending_1:", 175), 1503 FIELD1("PCIeDataChannel:", 174), 1504 FIELD1("StatusPgTPHintEn:", 173), 1505 FIELD("StatusPgTPHint:", 171, 172), 1506 FIELD1("FetchTPHintEn:", 170), 1507 FIELD("FetchTPHint:", 168, 169), 1508 FIELD1("FCThreshOverride:", 167), 1509 { "WRLength:", 162, 166, 9, 0, 1 }, 1510 FIELD1("WRLengthKnown:", 161), 1511 FIELD1("ReschedulePending:", 160), 1512 FIELD("TimerIx:", 157, 159), 1513 FIELD1("FetchBurstMin:", 156), 1514 FIELD1("FLMPacking:", 155), 1515 FIELD("FetchBurstMax:", 153, 154), 1516 FIELD("uPToken:", 133, 152), 1517 FIELD1("uPTokenEn:", 132), 1518 FIELD1("UserModeIO:", 131), 1519 FIELD("uPFLCredits:", 123, 130), 1520 FIELD1("uPFLCreditEn:", 122), 1521 FIELD("FID:", 111, 121), 1522 FIELD("HostFCMode:", 109, 110), 1523 FIELD1("HostFCOwner:", 108), 1524 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1525 FIELD("CIDX:", 89, 104), 1526 FIELD("PIDX:", 73, 88), 1527 { "BaseAddress:", 18, 72, 9, 1 }, 1528 FIELD("QueueSize:", 2, 17), 1529 FIELD1("QueueType:", 1), 1530 FIELD1("FetchSizeMode:", 0), 1531 { NULL } 1532 }; 1533 static struct field_desc fl_t5[] = { 1534 FIELD("DCA_ST:", 181, 191), 1535 FIELD1("StatusPgNS:", 180), 1536 FIELD1("StatusPgRO:", 179), 1537 FIELD1("FetchNS:", 178), 1538 FIELD1("FetchRO:", 177), 1539 FIELD1("Valid:", 176), 1540 FIELD("PCIeDataChannel:", 174, 175), 1541 FIELD1("StatusPgTPHintEn:", 173), 1542 FIELD("StatusPgTPHint:", 171, 172), 1543 FIELD1("FetchTPHintEn:", 170), 1544 FIELD("FetchTPHint:", 168, 169), 1545 FIELD1("FCThreshOverride:", 167), 1546 FIELD1("ReschedulePending:", 160), 1547 FIELD1("OnChipQueue:", 159), 1548 FIELD1("FetchSizeMode:", 158), 1549 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1550 FIELD1("FLMPacking:", 155), 1551 FIELD("FetchBurstMax:", 153, 154), 1552 FIELD1("FLMcongMode:", 152), 1553 FIELD("MaxuPFLCredits:", 144, 151), 1554 FIELD("FLMcontextID:", 133, 143), 1555 FIELD1("uPTokenEn:", 132), 1556 FIELD1("UserModeIO:", 131), 1557 FIELD("uPFLCredits:", 123, 130), 1558 FIELD1("uPFLCreditEn:", 122), 1559 FIELD("FID:", 111, 121), 1560 FIELD("HostFCMode:", 109, 110), 1561 FIELD1("HostFCOwner:", 108), 1562 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1563 FIELD("CIDX:", 89, 104), 1564 FIELD("PIDX:", 73, 88), 1565 { "BaseAddress:", 18, 72, 9, 1 }, 1566 FIELD("QueueSize:", 2, 17), 1567 FIELD1("QueueType:", 1), 1568 FIELD1("CachePriority:", 0), 1569 { NULL } 1570 }; 1571 static struct field_desc ingress_t5[] = { 1572 FIELD("DCA_ST:", 143, 153), 1573 FIELD1("ISCSICoalescing:", 142), 1574 FIELD1("Queue_Valid:", 141), 1575 FIELD1("TimerPending:", 140), 1576 FIELD1("DropRSS:", 139), 1577 FIELD("PCIeChannel:", 137, 138), 1578 FIELD1("SEInterruptArmed:", 136), 1579 FIELD1("CongestionMgtEnable:", 135), 1580 FIELD1("NoSnoop:", 134), 1581 FIELD1("RelaxedOrdering:", 133), 1582 FIELD1("GTSmode:", 132), 1583 FIELD1("TPHintEn:", 131), 1584 FIELD("TPHint:", 129, 130), 1585 FIELD1("UpdateScheduling:", 128), 1586 FIELD("UpdateDelivery:", 126, 127), 1587 FIELD1("InterruptSent:", 125), 1588 FIELD("InterruptIDX:", 114, 124), 1589 FIELD1("InterruptDestination:", 113), 1590 FIELD1("InterruptArmed:", 112), 1591 FIELD("RxIntCounter:", 106, 111), 1592 FIELD("RxIntCounterThreshold:", 104, 105), 1593 FIELD1("Generation:", 103), 1594 { "BaseAddress:", 48, 102, 9, 1 }, 1595 FIELD("PIDX:", 32, 47), 1596 FIELD("CIDX:", 16, 31), 1597 { "QueueSize:", 4, 15, 4, 0 }, 1598 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1599 FIELD1("QueueEntryOverride:", 1), 1600 FIELD1("CachePriority:", 0), 1601 { NULL } 1602 }; 1603 static struct field_desc ingress_t6[] = { 1604 FIELD1("SP_NS:", 158), 1605 FIELD1("SP_RO:", 157), 1606 FIELD1("SP_TPHintEn:", 156), 1607 FIELD("SP_TPHint:", 154, 155), 1608 FIELD("DCA_ST:", 143, 153), 1609 FIELD1("ISCSICoalescing:", 142), 1610 FIELD1("Queue_Valid:", 141), 1611 FIELD1("TimerPending:", 140), 1612 FIELD1("DropRSS:", 139), 1613 FIELD("PCIeChannel:", 137, 138), 1614 FIELD1("SEInterruptArmed:", 136), 1615 FIELD1("CongestionMgtEnable:", 135), 1616 FIELD1("NoSnoop:", 134), 1617 FIELD1("RelaxedOrdering:", 133), 1618 FIELD1("GTSmode:", 132), 1619 FIELD1("TPHintEn:", 131), 1620 FIELD("TPHint:", 129, 130), 1621 FIELD1("UpdateScheduling:", 128), 1622 FIELD("UpdateDelivery:", 126, 127), 1623 FIELD1("InterruptSent:", 125), 1624 FIELD("InterruptIDX:", 114, 124), 1625 FIELD1("InterruptDestination:", 113), 1626 FIELD1("InterruptArmed:", 112), 1627 FIELD("RxIntCounter:", 106, 111), 1628 FIELD("RxIntCounterThreshold:", 104, 105), 1629 FIELD1("Generation:", 103), 1630 { "BaseAddress:", 48, 102, 9, 1 }, 1631 FIELD("PIDX:", 32, 47), 1632 FIELD("CIDX:", 16, 31), 1633 { "QueueSize:", 4, 15, 4, 0 }, 1634 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1635 FIELD1("QueueEntryOverride:", 1), 1636 FIELD1("CachePriority:", 0), 1637 { NULL } 1638 }; 1639 static struct field_desc flm_t5[] = { 1640 FIELD1("Valid:", 89), 1641 FIELD("SplitLenMode:", 87, 88), 1642 FIELD1("TPHintEn:", 86), 1643 FIELD("TPHint:", 84, 85), 1644 FIELD1("NoSnoop:", 83), 1645 FIELD1("RelaxedOrdering:", 82), 1646 FIELD("DCA_ST:", 71, 81), 1647 FIELD("EQid:", 54, 70), 1648 FIELD("SplitEn:", 52, 53), 1649 FIELD1("PadEn:", 51), 1650 FIELD1("PackEn:", 50), 1651 FIELD1("Cache_Lock :", 49), 1652 FIELD1("CongDrop:", 48), 1653 FIELD("PackOffset:", 16, 47), 1654 FIELD("CIDX:", 8, 15), 1655 FIELD("PIDX:", 0, 7), 1656 { NULL } 1657 }; 1658 static struct field_desc flm_t6[] = { 1659 FIELD1("Valid:", 89), 1660 FIELD("SplitLenMode:", 87, 88), 1661 FIELD1("TPHintEn:", 86), 1662 FIELD("TPHint:", 84, 85), 1663 FIELD1("NoSnoop:", 83), 1664 FIELD1("RelaxedOrdering:", 82), 1665 FIELD("DCA_ST:", 71, 81), 1666 FIELD("EQid:", 54, 70), 1667 FIELD("SplitEn:", 52, 53), 1668 FIELD1("PadEn:", 51), 1669 FIELD1("PackEn:", 50), 1670 FIELD1("Cache_Lock :", 49), 1671 FIELD1("CongDrop:", 48), 1672 FIELD1("Inflight:", 47), 1673 FIELD1("CongEn:", 46), 1674 FIELD1("CongMode:", 45), 1675 FIELD("PackOffset:", 20, 39), 1676 FIELD("CIDX:", 8, 15), 1677 FIELD("PIDX:", 0, 7), 1678 { NULL } 1679 }; 1680 static struct field_desc conm_t5[] = { 1681 FIELD1("CngMPSEnable:", 21), 1682 FIELD("CngTPMode:", 19, 20), 1683 FIELD1("CngDBPHdr:", 18), 1684 FIELD1("CngDBPData:", 17), 1685 FIELD1("CngIMSG:", 16), 1686 { "CngChMap:", 0, 15, 0, 1, 0 }, 1687 { NULL } 1688 }; 1689 1690 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1691 if (p->data[0] & 2) 1692 show_struct(p->data, 6, fl_t5); 1693 else if (vers == 5) 1694 show_struct(p->data, 6, egress_t5); 1695 else 1696 show_struct(p->data, 6, egress_t6); 1697 } else if (p->mem_id == SGE_CONTEXT_FLM) 1698 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1699 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1700 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1701 else if (p->mem_id == SGE_CONTEXT_CNM) 1702 show_struct(p->data, 1, conm_t5); 1703 } 1704 1705 static void 1706 show_t4_ctxt(const struct t4_sge_context *p) 1707 { 1708 static struct field_desc egress_t4[] = { 1709 FIELD1("StatusPgNS:", 180), 1710 FIELD1("StatusPgRO:", 179), 1711 FIELD1("FetchNS:", 178), 1712 FIELD1("FetchRO:", 177), 1713 FIELD1("Valid:", 176), 1714 FIELD("PCIeDataChannel:", 174, 175), 1715 FIELD1("DCAEgrQEn:", 173), 1716 FIELD("DCACPUID:", 168, 172), 1717 FIELD1("FCThreshOverride:", 167), 1718 FIELD("WRLength:", 162, 166), 1719 FIELD1("WRLengthKnown:", 161), 1720 FIELD1("ReschedulePending:", 160), 1721 FIELD1("OnChipQueue:", 159), 1722 FIELD1("FetchSizeMode", 158), 1723 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1724 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1725 FIELD("uPToken:", 133, 152), 1726 FIELD1("uPTokenEn:", 132), 1727 FIELD1("UserModeIO:", 131), 1728 FIELD("uPFLCredits:", 123, 130), 1729 FIELD1("uPFLCreditEn:", 122), 1730 FIELD("FID:", 111, 121), 1731 FIELD("HostFCMode:", 109, 110), 1732 FIELD1("HostFCOwner:", 108), 1733 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1734 FIELD("CIDX:", 89, 104), 1735 FIELD("PIDX:", 73, 88), 1736 { "BaseAddress:", 18, 72, 9, 1 }, 1737 FIELD("QueueSize:", 2, 17), 1738 FIELD1("QueueType:", 1), 1739 FIELD1("CachePriority:", 0), 1740 { NULL } 1741 }; 1742 static struct field_desc fl_t4[] = { 1743 FIELD1("StatusPgNS:", 180), 1744 FIELD1("StatusPgRO:", 179), 1745 FIELD1("FetchNS:", 178), 1746 FIELD1("FetchRO:", 177), 1747 FIELD1("Valid:", 176), 1748 FIELD("PCIeDataChannel:", 174, 175), 1749 FIELD1("DCAEgrQEn:", 173), 1750 FIELD("DCACPUID:", 168, 172), 1751 FIELD1("FCThreshOverride:", 167), 1752 FIELD1("ReschedulePending:", 160), 1753 FIELD1("OnChipQueue:", 159), 1754 FIELD1("FetchSizeMode", 158), 1755 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1756 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1757 FIELD1("FLMcongMode:", 152), 1758 FIELD("MaxuPFLCredits:", 144, 151), 1759 FIELD("FLMcontextID:", 133, 143), 1760 FIELD1("uPTokenEn:", 132), 1761 FIELD1("UserModeIO:", 131), 1762 FIELD("uPFLCredits:", 123, 130), 1763 FIELD1("uPFLCreditEn:", 122), 1764 FIELD("FID:", 111, 121), 1765 FIELD("HostFCMode:", 109, 110), 1766 FIELD1("HostFCOwner:", 108), 1767 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1768 FIELD("CIDX:", 89, 104), 1769 FIELD("PIDX:", 73, 88), 1770 { "BaseAddress:", 18, 72, 9, 1 }, 1771 FIELD("QueueSize:", 2, 17), 1772 FIELD1("QueueType:", 1), 1773 FIELD1("CachePriority:", 0), 1774 { NULL } 1775 }; 1776 static struct field_desc ingress_t4[] = { 1777 FIELD1("NoSnoop:", 145), 1778 FIELD1("RelaxedOrdering:", 144), 1779 FIELD1("GTSmode:", 143), 1780 FIELD1("ISCSICoalescing:", 142), 1781 FIELD1("Valid:", 141), 1782 FIELD1("TimerPending:", 140), 1783 FIELD1("DropRSS:", 139), 1784 FIELD("PCIeChannel:", 137, 138), 1785 FIELD1("SEInterruptArmed:", 136), 1786 FIELD1("CongestionMgtEnable:", 135), 1787 FIELD1("DCAIngQEnable:", 134), 1788 FIELD("DCACPUID:", 129, 133), 1789 FIELD1("UpdateScheduling:", 128), 1790 FIELD("UpdateDelivery:", 126, 127), 1791 FIELD1("InterruptSent:", 125), 1792 FIELD("InterruptIDX:", 114, 124), 1793 FIELD1("InterruptDestination:", 113), 1794 FIELD1("InterruptArmed:", 112), 1795 FIELD("RxIntCounter:", 106, 111), 1796 FIELD("RxIntCounterThreshold:", 104, 105), 1797 FIELD1("Generation:", 103), 1798 { "BaseAddress:", 48, 102, 9, 1 }, 1799 FIELD("PIDX:", 32, 47), 1800 FIELD("CIDX:", 16, 31), 1801 { "QueueSize:", 4, 15, 4, 0 }, 1802 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1803 FIELD1("QueueEntryOverride:", 1), 1804 FIELD1("CachePriority:", 0), 1805 { NULL } 1806 }; 1807 static struct field_desc flm_t4[] = { 1808 FIELD1("NoSnoop:", 79), 1809 FIELD1("RelaxedOrdering:", 78), 1810 FIELD1("Valid:", 77), 1811 FIELD("DCACPUID:", 72, 76), 1812 FIELD1("DCAFLEn:", 71), 1813 FIELD("EQid:", 54, 70), 1814 FIELD("SplitEn:", 52, 53), 1815 FIELD1("PadEn:", 51), 1816 FIELD1("PackEn:", 50), 1817 FIELD1("DBpriority:", 48), 1818 FIELD("PackOffset:", 16, 47), 1819 FIELD("CIDX:", 8, 15), 1820 FIELD("PIDX:", 0, 7), 1821 { NULL } 1822 }; 1823 static struct field_desc conm_t4[] = { 1824 FIELD1("CngDBPHdr:", 6), 1825 FIELD1("CngDBPData:", 5), 1826 FIELD1("CngIMSG:", 4), 1827 { "CngChMap:", 0, 3, 0, 1, 0}, 1828 { NULL } 1829 }; 1830 1831 if (p->mem_id == SGE_CONTEXT_EGRESS) 1832 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1833 else if (p->mem_id == SGE_CONTEXT_FLM) 1834 show_struct(p->data, 3, flm_t4); 1835 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1836 show_struct(p->data, 5, ingress_t4); 1837 else if (p->mem_id == SGE_CONTEXT_CNM) 1838 show_struct(p->data, 1, conm_t4); 1839 } 1840 1841 #undef FIELD 1842 #undef FIELD1 1843 1844 static int 1845 get_sge_context(int argc, const char *argv[]) 1846 { 1847 int rc; 1848 char *p; 1849 long cid; 1850 struct t4_sge_context cntxt = {0}; 1851 1852 if (argc != 2) { 1853 warnx("sge_context: incorrect number of arguments."); 1854 return (EINVAL); 1855 } 1856 1857 if (!strcmp(argv[0], "egress")) 1858 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1859 else if (!strcmp(argv[0], "ingress")) 1860 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1861 else if (!strcmp(argv[0], "fl")) 1862 cntxt.mem_id = SGE_CONTEXT_FLM; 1863 else if (!strcmp(argv[0], "cong")) 1864 cntxt.mem_id = SGE_CONTEXT_CNM; 1865 else { 1866 warnx("unknown context type \"%s\"; known types are egress, " 1867 "ingress, fl, and cong.", argv[0]); 1868 return (EINVAL); 1869 } 1870 1871 p = str_to_number(argv[1], &cid, NULL); 1872 if (*p) { 1873 warnx("invalid context id \"%s\"", argv[1]); 1874 return (EINVAL); 1875 } 1876 cntxt.cid = cid; 1877 1878 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1879 if (rc != 0) 1880 return (rc); 1881 1882 if (chip_id == 4) 1883 show_t4_ctxt(&cntxt); 1884 else 1885 show_t5t6_ctxt(&cntxt, chip_id); 1886 1887 return (0); 1888 } 1889 1890 static int 1891 loadfw(int argc, const char *argv[]) 1892 { 1893 int rc, fd; 1894 struct t4_data data = {0}; 1895 const char *fname = argv[0]; 1896 struct stat st = {0}; 1897 1898 if (argc != 1) { 1899 warnx("loadfw: incorrect number of arguments."); 1900 return (EINVAL); 1901 } 1902 1903 fd = open(fname, O_RDONLY); 1904 if (fd < 0) { 1905 warn("open(%s)", fname); 1906 return (errno); 1907 } 1908 1909 if (fstat(fd, &st) < 0) { 1910 warn("fstat"); 1911 close(fd); 1912 return (errno); 1913 } 1914 1915 data.len = st.st_size; 1916 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1917 if (data.data == MAP_FAILED) { 1918 warn("mmap"); 1919 close(fd); 1920 return (errno); 1921 } 1922 1923 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1924 munmap(data.data, data.len); 1925 close(fd); 1926 return (rc); 1927 } 1928 1929 static int 1930 loadcfg(int argc, const char *argv[]) 1931 { 1932 int rc, fd; 1933 struct t4_data data = {0}; 1934 const char *fname = argv[0]; 1935 struct stat st = {0}; 1936 1937 if (argc != 1) { 1938 warnx("loadcfg: incorrect number of arguments."); 1939 return (EINVAL); 1940 } 1941 1942 if (strcmp(fname, "clear") == 0) 1943 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1944 1945 fd = open(fname, O_RDONLY); 1946 if (fd < 0) { 1947 warn("open(%s)", fname); 1948 return (errno); 1949 } 1950 1951 if (fstat(fd, &st) < 0) { 1952 warn("fstat"); 1953 close(fd); 1954 return (errno); 1955 } 1956 1957 data.len = st.st_size; 1958 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 1959 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1960 if (data.data == MAP_FAILED) { 1961 warn("mmap"); 1962 close(fd); 1963 return (errno); 1964 } 1965 1966 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 1967 munmap(data.data, data.len); 1968 close(fd); 1969 return (rc); 1970 } 1971 1972 static int 1973 dumpstate(int argc, const char *argv[]) 1974 { 1975 int rc, fd; 1976 struct t4_cudbg_dump dump = {0}; 1977 const char *fname = argv[0]; 1978 1979 if (argc != 1) { 1980 warnx("dumpstate: incorrect number of arguments."); 1981 return (EINVAL); 1982 } 1983 1984 dump.wr_flash = 0; 1985 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 1986 dump.len = 8 * 1024 * 1024; 1987 dump.data = malloc(dump.len); 1988 if (dump.data == NULL) { 1989 return (ENOMEM); 1990 } 1991 1992 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 1993 if (rc != 0) 1994 goto done; 1995 1996 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 1997 S_IRUSR | S_IRGRP | S_IROTH); 1998 if (fd < 0) { 1999 warn("open(%s)", fname); 2000 rc = errno; 2001 goto done; 2002 } 2003 write(fd, dump.data, dump.len); 2004 close(fd); 2005 done: 2006 free(dump.data); 2007 return (rc); 2008 } 2009 2010 static int 2011 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2012 { 2013 int rc; 2014 struct t4_mem_range mr; 2015 2016 mr.addr = addr; 2017 mr.len = len; 2018 mr.data = malloc(mr.len); 2019 2020 if (mr.data == 0) { 2021 warn("read_mem: malloc"); 2022 return (errno); 2023 } 2024 2025 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2026 if (rc != 0) 2027 goto done; 2028 2029 if (output) 2030 (*output)(mr.data, mr.len); 2031 done: 2032 free(mr.data); 2033 return (rc); 2034 } 2035 2036 static int 2037 loadboot(int argc, const char *argv[]) 2038 { 2039 int rc, fd; 2040 long l; 2041 char *p; 2042 struct t4_bootrom br = {0}; 2043 const char *fname = argv[0]; 2044 struct stat st = {0}; 2045 2046 if (argc == 1) { 2047 br.pf_offset = 0; 2048 br.pfidx_addr = 0; 2049 } else if (argc == 3) { 2050 if (!strcmp(argv[1], "pf")) 2051 br.pf_offset = 0; 2052 else if (!strcmp(argv[1], "offset")) 2053 br.pf_offset = 1; 2054 else 2055 return (EINVAL); 2056 2057 p = str_to_number(argv[2], &l, NULL); 2058 if (*p) 2059 return (EINVAL); 2060 br.pfidx_addr = l; 2061 } else { 2062 warnx("loadboot: incorrect number of arguments."); 2063 return (EINVAL); 2064 } 2065 2066 if (strcmp(fname, "clear") == 0) 2067 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2068 2069 fd = open(fname, O_RDONLY); 2070 if (fd < 0) { 2071 warn("open(%s)", fname); 2072 return (errno); 2073 } 2074 2075 if (fstat(fd, &st) < 0) { 2076 warn("fstat"); 2077 close(fd); 2078 return (errno); 2079 } 2080 2081 br.len = st.st_size; 2082 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2083 if (br.data == MAP_FAILED) { 2084 warn("mmap"); 2085 close(fd); 2086 return (errno); 2087 } 2088 2089 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2090 munmap(br.data, br.len); 2091 close(fd); 2092 return (rc); 2093 } 2094 2095 static int 2096 loadbootcfg(int argc, const char *argv[]) 2097 { 2098 int rc, fd; 2099 struct t4_data bc = {0}; 2100 const char *fname = argv[0]; 2101 struct stat st = {0}; 2102 2103 if (argc != 1) { 2104 warnx("loadbootcfg: incorrect number of arguments."); 2105 return (EINVAL); 2106 } 2107 2108 if (strcmp(fname, "clear") == 0) 2109 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2110 2111 fd = open(fname, O_RDONLY); 2112 if (fd < 0) { 2113 warn("open(%s)", fname); 2114 return (errno); 2115 } 2116 2117 if (fstat(fd, &st) < 0) { 2118 warn("fstat"); 2119 close(fd); 2120 return (errno); 2121 } 2122 2123 bc.len = st.st_size; 2124 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2125 if (bc.data == MAP_FAILED) { 2126 warn("mmap"); 2127 close(fd); 2128 return (errno); 2129 } 2130 2131 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2132 munmap(bc.data, bc.len); 2133 close(fd); 2134 return (rc); 2135 } 2136 2137 /* 2138 * Display memory as list of 'n' 4-byte values per line. 2139 */ 2140 static void 2141 show_mem(uint32_t *buf, uint32_t len) 2142 { 2143 const char *s; 2144 int i, n = 8; 2145 2146 while (len) { 2147 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2148 s = i ? " " : ""; 2149 printf("%s%08x", s, htonl(*buf)); 2150 } 2151 printf("\n"); 2152 } 2153 } 2154 2155 static int 2156 memdump(int argc, const char *argv[]) 2157 { 2158 char *p; 2159 long l; 2160 uint32_t addr, len; 2161 2162 if (argc != 2) { 2163 warnx("incorrect number of arguments."); 2164 return (EINVAL); 2165 } 2166 2167 p = str_to_number(argv[0], &l, NULL); 2168 if (*p) { 2169 warnx("invalid address \"%s\"", argv[0]); 2170 return (EINVAL); 2171 } 2172 addr = l; 2173 2174 p = str_to_number(argv[1], &l, NULL); 2175 if (*p) { 2176 warnx("memdump: invalid length \"%s\"", argv[1]); 2177 return (EINVAL); 2178 } 2179 len = l; 2180 2181 return (read_mem(addr, len, show_mem)); 2182 } 2183 2184 /* 2185 * Display TCB as list of 'n' 4-byte values per line. 2186 */ 2187 static void 2188 show_tcb(uint32_t *buf, uint32_t len) 2189 { 2190 unsigned char *tcb = (unsigned char *)buf; 2191 const char *s; 2192 int i, n = 8; 2193 2194 while (len) { 2195 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2196 s = i ? " " : ""; 2197 printf("%s%08x", s, htonl(*buf)); 2198 } 2199 printf("\n"); 2200 } 2201 set_tcb_info(TIDTYPE_TCB, chip_id); 2202 set_print_style(PRNTSTYL_COMP); 2203 swizzle_tcb(tcb); 2204 parse_n_display_xcb(tcb); 2205 } 2206 2207 #define A_TP_CMM_TCB_BASE 0x7d10 2208 #define TCB_SIZE 128 2209 static int 2210 read_tcb(int argc, const char *argv[]) 2211 { 2212 char *p; 2213 long l; 2214 long long val; 2215 unsigned int tid; 2216 uint32_t addr; 2217 int rc; 2218 2219 if (argc != 1) { 2220 warnx("incorrect number of arguments."); 2221 return (EINVAL); 2222 } 2223 2224 p = str_to_number(argv[0], &l, NULL); 2225 if (*p) { 2226 warnx("invalid tid \"%s\"", argv[0]); 2227 return (EINVAL); 2228 } 2229 tid = l; 2230 2231 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2232 if (rc != 0) 2233 return (rc); 2234 2235 addr = val + tid * TCB_SIZE; 2236 2237 return (read_mem(addr, TCB_SIZE, show_tcb)); 2238 } 2239 2240 static int 2241 read_i2c(int argc, const char *argv[]) 2242 { 2243 char *p; 2244 long l; 2245 struct t4_i2c_data i2cd; 2246 int rc, i; 2247 2248 if (argc < 3 || argc > 4) { 2249 warnx("incorrect number of arguments."); 2250 return (EINVAL); 2251 } 2252 2253 p = str_to_number(argv[0], &l, NULL); 2254 if (*p || l > UCHAR_MAX) { 2255 warnx("invalid port id \"%s\"", argv[0]); 2256 return (EINVAL); 2257 } 2258 i2cd.port_id = l; 2259 2260 p = str_to_number(argv[1], &l, NULL); 2261 if (*p || l > UCHAR_MAX) { 2262 warnx("invalid i2c device address \"%s\"", argv[1]); 2263 return (EINVAL); 2264 } 2265 i2cd.dev_addr = l; 2266 2267 p = str_to_number(argv[2], &l, NULL); 2268 if (*p || l > UCHAR_MAX) { 2269 warnx("invalid byte offset \"%s\"", argv[2]); 2270 return (EINVAL); 2271 } 2272 i2cd.offset = l; 2273 2274 if (argc == 4) { 2275 p = str_to_number(argv[3], &l, NULL); 2276 if (*p || l > sizeof(i2cd.data)) { 2277 warnx("invalid number of bytes \"%s\"", argv[3]); 2278 return (EINVAL); 2279 } 2280 i2cd.len = l; 2281 } else 2282 i2cd.len = 1; 2283 2284 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2285 if (rc != 0) 2286 return (rc); 2287 2288 for (i = 0; i < i2cd.len; i++) 2289 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2290 2291 return (0); 2292 } 2293 2294 static int 2295 clearstats(int argc, const char *argv[]) 2296 { 2297 char *p; 2298 long l; 2299 uint32_t port; 2300 2301 if (argc != 1) { 2302 warnx("incorrect number of arguments."); 2303 return (EINVAL); 2304 } 2305 2306 p = str_to_number(argv[0], &l, NULL); 2307 if (*p) { 2308 warnx("invalid port id \"%s\"", argv[0]); 2309 return (EINVAL); 2310 } 2311 port = l; 2312 2313 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2314 } 2315 2316 static int 2317 show_tracers(void) 2318 { 2319 struct t4_tracer t; 2320 char *s; 2321 int rc, port_idx, i; 2322 long long val; 2323 2324 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2325 rc = read_reg(0x9800, 4, &val); 2326 if (rc != 0) 2327 return (rc); 2328 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2329 2330 t.idx = 0; 2331 for (t.idx = 0; ; t.idx++) { 2332 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2333 if (rc != 0 || t.idx == 0xff) 2334 break; 2335 2336 if (t.tp.port < 4) { 2337 s = "Rx"; 2338 port_idx = t.tp.port; 2339 } else if (t.tp.port < 8) { 2340 s = "Tx"; 2341 port_idx = t.tp.port - 4; 2342 } else if (t.tp.port < 12) { 2343 s = "loopback"; 2344 port_idx = t.tp.port - 8; 2345 } else if (t.tp.port < 16) { 2346 s = "MPS Rx"; 2347 port_idx = t.tp.port - 12; 2348 } else if (t.tp.port < 20) { 2349 s = "MPS Tx"; 2350 port_idx = t.tp.port - 16; 2351 } else { 2352 s = "unknown"; 2353 port_idx = t.tp.port; 2354 } 2355 2356 printf("\ntracer %u (currently %s) captures ", t.idx, 2357 t.enabled ? "ENABLED" : "DISABLED"); 2358 if (t.tp.port < 8) 2359 printf("port %u %s, ", port_idx, s); 2360 else 2361 printf("%s %u, ", s, port_idx); 2362 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2363 t.tp.min_len); 2364 printf("packets captured %smatch filter\n", 2365 t.tp.invert ? "do not " : ""); 2366 if (t.tp.skip_ofst) { 2367 printf("filter pattern: "); 2368 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2369 printf("%08x%08x", t.tp.data[i], 2370 t.tp.data[i + 1]); 2371 printf("/"); 2372 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2373 printf("%08x%08x", t.tp.mask[i], 2374 t.tp.mask[i + 1]); 2375 printf("@0\n"); 2376 } 2377 printf("filter pattern: "); 2378 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2379 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2380 printf("/"); 2381 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2382 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2383 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2384 } 2385 2386 return (rc); 2387 } 2388 2389 static int 2390 tracer_onoff(uint8_t idx, int enabled) 2391 { 2392 struct t4_tracer t; 2393 2394 t.idx = idx; 2395 t.enabled = enabled; 2396 t.valid = 0; 2397 2398 return doit(CHELSIO_T4_SET_TRACER, &t); 2399 } 2400 2401 static void 2402 create_tracing_ifnet() 2403 { 2404 char *cmd[] = { 2405 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2406 }; 2407 char *env[] = {NULL}; 2408 2409 if (vfork() == 0) { 2410 close(STDERR_FILENO); 2411 execve(cmd[0], cmd, env); 2412 _exit(0); 2413 } 2414 } 2415 2416 /* 2417 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2418 * matching). Right now this is a quick-n-dirty implementation that traces the 2419 * first 128B of all tx or rx on a port 2420 */ 2421 static int 2422 set_tracer(uint8_t idx, int argc, const char *argv[]) 2423 { 2424 struct t4_tracer t; 2425 int len, port; 2426 2427 bzero(&t, sizeof (t)); 2428 t.idx = idx; 2429 t.enabled = 1; 2430 t.valid = 1; 2431 2432 if (argc != 1) { 2433 warnx("must specify tx<n> or rx<n>."); 2434 return (EINVAL); 2435 } 2436 2437 len = strlen(argv[0]); 2438 if (len != 3) { 2439 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2440 return (EINVAL); 2441 } 2442 2443 if (strncmp(argv[0], "tx", 2) == 0) { 2444 port = argv[0][2] - '0'; 2445 if (port < 0 || port > 3) { 2446 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2447 return (EINVAL); 2448 } 2449 port += 4; 2450 } else if (strncmp(argv[0], "rx", 2) == 0) { 2451 port = argv[0][2] - '0'; 2452 if (port < 0 || port > 3) { 2453 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2454 return (EINVAL); 2455 } 2456 } else { 2457 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2458 return (EINVAL); 2459 } 2460 2461 t.tp.snap_len = 128; 2462 t.tp.min_len = 0; 2463 t.tp.skip_ofst = 0; 2464 t.tp.skip_len = 0; 2465 t.tp.invert = 0; 2466 t.tp.port = port; 2467 2468 create_tracing_ifnet(); 2469 return doit(CHELSIO_T4_SET_TRACER, &t); 2470 } 2471 2472 static int 2473 tracer_cmd(int argc, const char *argv[]) 2474 { 2475 long long val; 2476 uint8_t idx; 2477 char *s; 2478 2479 if (argc == 0) { 2480 warnx("tracer: no arguments."); 2481 return (EINVAL); 2482 }; 2483 2484 /* list */ 2485 if (strcmp(argv[0], "list") == 0) { 2486 if (argc != 1) 2487 warnx("trailing arguments after \"list\" ignored."); 2488 2489 return show_tracers(); 2490 } 2491 2492 /* <idx> ... */ 2493 s = str_to_number(argv[0], NULL, &val); 2494 if (*s || val > 0xff) { 2495 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2496 argv[0]); 2497 return (EINVAL); 2498 } 2499 idx = (int8_t)val; 2500 2501 /* <idx> disable */ 2502 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2503 return tracer_onoff(idx, 0); 2504 2505 /* <idx> enable */ 2506 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2507 return tracer_onoff(idx, 1); 2508 2509 /* <idx> ... */ 2510 return set_tracer(idx, argc - 1, argv + 1); 2511 } 2512 2513 static int 2514 modinfo_raw(int port_id) 2515 { 2516 uint8_t offset; 2517 struct t4_i2c_data i2cd; 2518 int rc; 2519 2520 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2521 bzero(&i2cd, sizeof(i2cd)); 2522 i2cd.port_id = port_id; 2523 i2cd.dev_addr = 0xa0; 2524 i2cd.offset = offset; 2525 i2cd.len = sizeof(i2cd.data); 2526 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2527 if (rc != 0) 2528 return (rc); 2529 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2530 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2531 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2532 i2cd.data[7]); 2533 2534 printf(" %c%c%c%c %c%c%c%c\n", 2535 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2536 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2537 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2538 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2539 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2540 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2541 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2542 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2543 } 2544 2545 return (0); 2546 } 2547 2548 static int 2549 modinfo(int argc, const char *argv[]) 2550 { 2551 long port; 2552 char string[16], *p; 2553 struct t4_i2c_data i2cd; 2554 int rc, i; 2555 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2556 2557 if (argc < 1) { 2558 warnx("must supply a port"); 2559 return (EINVAL); 2560 } 2561 2562 if (argc > 2) { 2563 warnx("too many arguments"); 2564 return (EINVAL); 2565 } 2566 2567 p = str_to_number(argv[0], &port, NULL); 2568 if (*p || port > UCHAR_MAX) { 2569 warnx("invalid port id \"%s\"", argv[0]); 2570 return (EINVAL); 2571 } 2572 2573 if (argc == 2) { 2574 if (!strcmp(argv[1], "raw")) 2575 return (modinfo_raw(port)); 2576 else { 2577 warnx("second argument can only be \"raw\""); 2578 return (EINVAL); 2579 } 2580 } 2581 2582 bzero(&i2cd, sizeof(i2cd)); 2583 i2cd.len = 1; 2584 i2cd.port_id = port; 2585 i2cd.dev_addr = SFF_8472_BASE; 2586 2587 i2cd.offset = SFF_8472_ID; 2588 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2589 goto fail; 2590 2591 if (i2cd.data[0] > SFF_8472_ID_LAST) 2592 printf("Unknown ID\n"); 2593 else 2594 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2595 2596 bzero(&string, sizeof(string)); 2597 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2598 i2cd.offset = i; 2599 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2600 goto fail; 2601 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2602 } 2603 printf("Vendor %s\n", string); 2604 2605 bzero(&string, sizeof(string)); 2606 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2607 i2cd.offset = i; 2608 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2609 goto fail; 2610 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2611 } 2612 printf("SN %s\n", string); 2613 2614 bzero(&string, sizeof(string)); 2615 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2616 i2cd.offset = i; 2617 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2618 goto fail; 2619 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2620 } 2621 printf("PN %s\n", string); 2622 2623 bzero(&string, sizeof(string)); 2624 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2625 i2cd.offset = i; 2626 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2627 goto fail; 2628 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2629 } 2630 printf("Rev %s\n", string); 2631 2632 i2cd.offset = SFF_8472_DIAG_TYPE; 2633 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2634 goto fail; 2635 2636 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2637 SFF_8472_DIAG_INTERNAL)) { 2638 2639 /* Switch to reading from the Diagnostic address. */ 2640 i2cd.dev_addr = SFF_8472_DIAG; 2641 i2cd.len = 1; 2642 2643 i2cd.offset = SFF_8472_TEMP; 2644 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2645 goto fail; 2646 temp = i2cd.data[0] << 8; 2647 printf("Temp: "); 2648 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2649 printf("-"); 2650 else 2651 printf("+"); 2652 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2653 SFF_8472_TEMP_SHIFT); 2654 2655 i2cd.offset = SFF_8472_VCC; 2656 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2657 goto fail; 2658 vcc = i2cd.data[0] << 8; 2659 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2660 2661 i2cd.offset = SFF_8472_TX_BIAS; 2662 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2663 goto fail; 2664 tx_bias = i2cd.data[0] << 8; 2665 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2666 2667 i2cd.offset = SFF_8472_TX_POWER; 2668 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2669 goto fail; 2670 tx_power = i2cd.data[0] << 8; 2671 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2672 2673 i2cd.offset = SFF_8472_RX_POWER; 2674 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2675 goto fail; 2676 rx_power = i2cd.data[0] << 8; 2677 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2678 2679 } else 2680 printf("Diagnostics not supported.\n"); 2681 2682 return(0); 2683 2684 fail: 2685 if (rc == EPERM) 2686 warnx("No module/cable in port %ld", port); 2687 return (rc); 2688 2689 } 2690 2691 /* XXX: pass in a low/high and do range checks as well */ 2692 static int 2693 get_sched_param(const char *param, const char *args[], long *val) 2694 { 2695 char *p; 2696 2697 if (strcmp(param, args[0]) != 0) 2698 return (EINVAL); 2699 2700 p = str_to_number(args[1], val, NULL); 2701 if (*p) { 2702 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2703 args[1]); 2704 return (EINVAL); 2705 } 2706 2707 return (0); 2708 } 2709 2710 static int 2711 sched_class(int argc, const char *argv[]) 2712 { 2713 struct t4_sched_params op; 2714 int errs, i; 2715 2716 memset(&op, 0xff, sizeof(op)); 2717 op.subcmd = -1; 2718 op.type = -1; 2719 if (argc == 0) { 2720 warnx("missing scheduling sub-command"); 2721 return (EINVAL); 2722 } 2723 if (!strcmp(argv[0], "config")) { 2724 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2725 op.u.config.minmax = -1; 2726 } else if (!strcmp(argv[0], "params")) { 2727 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2728 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2729 op.u.params.ratemode = op.u.params.channel = 2730 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2731 op.u.params.weight = op.u.params.pktsize = -1; 2732 } else { 2733 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2734 return (EINVAL); 2735 } 2736 2737 /* Decode remaining arguments ... */ 2738 errs = 0; 2739 for (i = 1; i < argc; i += 2) { 2740 const char **args = &argv[i]; 2741 long l; 2742 2743 if (i + 1 == argc) { 2744 warnx("missing argument for \"%s\"", args[0]); 2745 errs++; 2746 break; 2747 } 2748 2749 if (!strcmp(args[0], "type")) { 2750 if (!strcmp(args[1], "packet")) 2751 op.type = SCHED_CLASS_TYPE_PACKET; 2752 else { 2753 warnx("invalid type parameter \"%s\"", args[1]); 2754 errs++; 2755 } 2756 2757 continue; 2758 } 2759 2760 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2761 if(!get_sched_param("minmax", args, &l)) 2762 op.u.config.minmax = (int8_t)l; 2763 else { 2764 warnx("unknown scheduler config parameter " 2765 "\"%s\"", args[0]); 2766 errs++; 2767 } 2768 2769 continue; 2770 } 2771 2772 /* Rest applies only to SUBCMD_PARAMS */ 2773 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2774 continue; 2775 2776 if (!strcmp(args[0], "level")) { 2777 if (!strcmp(args[1], "cl-rl")) 2778 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2779 else if (!strcmp(args[1], "cl-wrr")) 2780 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2781 else if (!strcmp(args[1], "ch-rl")) 2782 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2783 else { 2784 warnx("invalid level parameter \"%s\"", 2785 args[1]); 2786 errs++; 2787 } 2788 } else if (!strcmp(args[0], "mode")) { 2789 if (!strcmp(args[1], "class")) 2790 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2791 else if (!strcmp(args[1], "flow")) 2792 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2793 else { 2794 warnx("invalid mode parameter \"%s\"", args[1]); 2795 errs++; 2796 } 2797 } else if (!strcmp(args[0], "rate-unit")) { 2798 if (!strcmp(args[1], "bits")) 2799 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2800 else if (!strcmp(args[1], "pkts")) 2801 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2802 else { 2803 warnx("invalid rate-unit parameter \"%s\"", 2804 args[1]); 2805 errs++; 2806 } 2807 } else if (!strcmp(args[0], "rate-mode")) { 2808 if (!strcmp(args[1], "relative")) 2809 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2810 else if (!strcmp(args[1], "absolute")) 2811 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2812 else { 2813 warnx("invalid rate-mode parameter \"%s\"", 2814 args[1]); 2815 errs++; 2816 } 2817 } else if (!get_sched_param("channel", args, &l)) 2818 op.u.params.channel = (int8_t)l; 2819 else if (!get_sched_param("class", args, &l)) 2820 op.u.params.cl = (int8_t)l; 2821 else if (!get_sched_param("min-rate", args, &l)) 2822 op.u.params.minrate = (int32_t)l; 2823 else if (!get_sched_param("max-rate", args, &l)) 2824 op.u.params.maxrate = (int32_t)l; 2825 else if (!get_sched_param("weight", args, &l)) 2826 op.u.params.weight = (int16_t)l; 2827 else if (!get_sched_param("pkt-size", args, &l)) 2828 op.u.params.pktsize = (int16_t)l; 2829 else { 2830 warnx("unknown scheduler parameter \"%s\"", args[0]); 2831 errs++; 2832 } 2833 } 2834 2835 /* 2836 * Catch some logical fallacies in terms of argument combinations here 2837 * so we can offer more than just the EINVAL return from the driver. 2838 * The driver will be able to catch a lot more issues since it knows 2839 * the specifics of the device hardware capabilities like how many 2840 * channels, classes, etc. the device supports. 2841 */ 2842 if (op.type < 0) { 2843 warnx("sched \"type\" parameter missing"); 2844 errs++; 2845 } 2846 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2847 if (op.u.config.minmax < 0) { 2848 warnx("sched config \"minmax\" parameter missing"); 2849 errs++; 2850 } 2851 } 2852 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2853 if (op.u.params.level < 0) { 2854 warnx("sched params \"level\" parameter missing"); 2855 errs++; 2856 } 2857 if (op.u.params.mode < 0) { 2858 warnx("sched params \"mode\" parameter missing"); 2859 errs++; 2860 } 2861 if (op.u.params.rateunit < 0) { 2862 warnx("sched params \"rate-unit\" parameter missing"); 2863 errs++; 2864 } 2865 if (op.u.params.ratemode < 0) { 2866 warnx("sched params \"rate-mode\" parameter missing"); 2867 errs++; 2868 } 2869 if (op.u.params.channel < 0) { 2870 warnx("sched params \"channel\" missing"); 2871 errs++; 2872 } 2873 if (op.u.params.cl < 0) { 2874 warnx("sched params \"class\" missing"); 2875 errs++; 2876 } 2877 if (op.u.params.maxrate < 0 && 2878 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2879 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2880 warnx("sched params \"max-rate\" missing for " 2881 "rate-limit level"); 2882 errs++; 2883 } 2884 if (op.u.params.weight < 0 && 2885 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) { 2886 warnx("sched params \"weight\" missing for " 2887 "weighted-round-robin level"); 2888 errs++; 2889 } 2890 if (op.u.params.pktsize < 0 && 2891 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2892 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2893 warnx("sched params \"pkt-size\" missing for " 2894 "rate-limit level"); 2895 errs++; 2896 } 2897 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2898 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2899 warnx("sched params mode flow needs rate-mode absolute"); 2900 errs++; 2901 } 2902 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2903 !in_range(op.u.params.maxrate, 1, 100)) { 2904 warnx("sched params \"max-rate\" takes " 2905 "percentage value(1-100) for rate-mode relative"); 2906 errs++; 2907 } 2908 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2909 !in_range(op.u.params.maxrate, 1, 100000000)) { 2910 warnx("sched params \"max-rate\" takes " 2911 "value(1-100000000) for rate-mode absolute"); 2912 errs++; 2913 } 2914 if (op.u.params.maxrate > 0 && 2915 op.u.params.maxrate < op.u.params.minrate) { 2916 warnx("sched params \"max-rate\" is less than " 2917 "\"min-rate\""); 2918 errs++; 2919 } 2920 } 2921 2922 if (errs > 0) { 2923 warnx("%d error%s in sched-class command", errs, 2924 errs == 1 ? "" : "s"); 2925 return (EINVAL); 2926 } 2927 2928 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2929 } 2930 2931 static int 2932 sched_queue(int argc, const char *argv[]) 2933 { 2934 struct t4_sched_queue op = {0}; 2935 char *p; 2936 long val; 2937 2938 if (argc != 3) { 2939 /* need "<port> <queue> <class> */ 2940 warnx("incorrect number of arguments."); 2941 return (EINVAL); 2942 } 2943 2944 p = str_to_number(argv[0], &val, NULL); 2945 if (*p || val > UCHAR_MAX) { 2946 warnx("invalid port id \"%s\"", argv[0]); 2947 return (EINVAL); 2948 } 2949 op.port = (uint8_t)val; 2950 2951 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 2952 op.queue = -1; 2953 else { 2954 p = str_to_number(argv[1], &val, NULL); 2955 if (*p || val < -1) { 2956 warnx("invalid queue \"%s\"", argv[1]); 2957 return (EINVAL); 2958 } 2959 op.queue = (int8_t)val; 2960 } 2961 2962 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 2963 op.cl = -1; 2964 else { 2965 p = str_to_number(argv[2], &val, NULL); 2966 if (*p || val < -1) { 2967 warnx("invalid class \"%s\"", argv[2]); 2968 return (EINVAL); 2969 } 2970 op.cl = (int8_t)val; 2971 } 2972 2973 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 2974 } 2975 2976 static int 2977 parse_offload_settings_word(const char *s, char **pnext, const char *ws, 2978 int *pneg, struct offload_settings *os) 2979 { 2980 2981 while (*s == '!') { 2982 (*pneg)++; 2983 s++; 2984 } 2985 2986 if (!strcmp(s, "not")) { 2987 (*pneg)++; 2988 return (0); 2989 } 2990 2991 if (!strcmp(s, "offload")) { 2992 os->offload = (*pneg + 1) & 1; 2993 *pneg = 0; 2994 } else if (!strcmp(s , "coalesce")) { 2995 os->rx_coalesce = (*pneg + 1) & 1; 2996 *pneg = 0; 2997 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 2998 os->tstamp = (*pneg + 1) & 1; 2999 *pneg = 0; 3000 } else if (!strcmp(s, "sack")) { 3001 os->sack = (*pneg + 1) & 1; 3002 *pneg = 0; 3003 } else if (!strcmp(s, "nagle")) { 3004 os->nagle = (*pneg + 1) & 1; 3005 *pneg = 0; 3006 } else if (!strcmp(s, "ecn")) { 3007 os->ecn = (*pneg + 1) & 1; 3008 *pneg = 0; 3009 } else if (!strcmp(s, "ddp")) { 3010 os->ddp = (*pneg + 1) & 1; 3011 *pneg = 0; 3012 } else if (!strcmp(s, "tls")) { 3013 os->tls = (*pneg + 1) & 1; 3014 *pneg = 0; 3015 } else { 3016 char *param, *p; 3017 long val; 3018 3019 /* Settings with additional parameter handled here. */ 3020 3021 if (*pneg) { 3022 warnx("\"%s\" is not a valid keyword, or it does not " 3023 "support negation.", s); 3024 return (EINVAL); 3025 } 3026 3027 while ((param = strsep(pnext, ws)) != NULL) { 3028 if (*param != '\0') 3029 break; 3030 } 3031 if (param == NULL) { 3032 warnx("\"%s\" is not a valid keyword, or it requires a " 3033 "parameter that has not been provided.", s); 3034 return (EINVAL); 3035 } 3036 3037 if (!strcmp(s, "cong")) { 3038 if (!strcmp(param, "reno")) 3039 os->cong_algo = 0; 3040 else if (!strcmp(param, "tahoe")) 3041 os->cong_algo = 1; 3042 else if (!strcmp(param, "newreno")) 3043 os->cong_algo = 2; 3044 else if (!strcmp(param, "highspeed")) 3045 os->cong_algo = 3; 3046 else { 3047 warnx("unknown congestion algorithm \"%s\".", s); 3048 return (EINVAL); 3049 } 3050 } else if (!strcmp(s, "class")) { 3051 val = -1; 3052 p = str_to_number(param, &val, NULL); 3053 /* (nsched_cls - 1) is spelled 15 here. */ 3054 if (*p || val < 0 || val > 15) { 3055 warnx("invalid scheduling class \"%s\". " 3056 "\"class\" needs an integer value where " 3057 "0 <= value <= 15", param); 3058 return (EINVAL); 3059 } 3060 os->sched_class = val; 3061 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3062 !strcmp(s, "rxq")) { 3063 val = -1; 3064 if (strcmp(param, "random")) { 3065 p = str_to_number(param, &val, NULL); 3066 if (*p || val < 0 || val > 0xffff) { 3067 warnx("invalid queue specification " 3068 "\"%s\". \"%s\" needs an integer" 3069 " value, or \"random\".", 3070 param, s); 3071 return (EINVAL); 3072 } 3073 } 3074 if (!strcmp(s, "bind")) { 3075 os->txq = val; 3076 os->rxq = val; 3077 } else if (!strcmp(s, "txq")) { 3078 os->txq = val; 3079 } else if (!strcmp(s, "rxq")) { 3080 os->rxq = val; 3081 } else { 3082 return (EDOOFUS); 3083 } 3084 } else if (!strcmp(s, "mss")) { 3085 val = -1; 3086 p = str_to_number(param, &val, NULL); 3087 if (*p || val <= 0) { 3088 warnx("invalid MSS specification \"%s\". " 3089 "\"mss\" needs a positive integer value", 3090 param); 3091 return (EINVAL); 3092 } 3093 os->mss = val; 3094 } else { 3095 warnx("unknown settings keyword: \"%s\"", s); 3096 return (EINVAL); 3097 } 3098 } 3099 3100 return (0); 3101 } 3102 3103 static int 3104 parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3105 { 3106 const char *ws = " \f\n\r\v\t"; 3107 char *settings, *s, *next; 3108 int rc, nsettings, neg; 3109 static const struct offload_settings default_settings = { 3110 .offload = 0, /* No settings imply !offload */ 3111 .rx_coalesce = -1, 3112 .cong_algo = -1, 3113 .sched_class = -1, 3114 .tstamp = -1, 3115 .sack = -1, 3116 .nagle = -1, 3117 .ecn = -1, 3118 .ddp = -1, 3119 .tls = -1, 3120 .txq = -1, 3121 .rxq = -1, 3122 .mss = -1, 3123 }; 3124 3125 *os = default_settings; 3126 3127 next = settings = strdup(settings_ro); 3128 if (settings == NULL) { 3129 warn (NULL); 3130 return (errno); 3131 } 3132 3133 nsettings = 0; 3134 rc = 0; 3135 neg = 0; 3136 while ((s = strsep(&next, ws)) != NULL) { 3137 if (*s == '\0') 3138 continue; 3139 nsettings++; 3140 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3141 if (rc != 0) 3142 goto done; 3143 } 3144 if (nsettings == 0) { 3145 warnx("no settings provided"); 3146 rc = EINVAL; 3147 goto done; 3148 } 3149 if (neg > 0) { 3150 warnx("%d stray negation(s) at end of offload settings", neg); 3151 rc = EINVAL; 3152 goto done; 3153 } 3154 done: 3155 free(settings); 3156 return (rc); 3157 } 3158 3159 static int 3160 isempty_line(char *line, size_t llen) 3161 { 3162 3163 /* skip leading whitespace */ 3164 while (isspace(*line)) { 3165 line++; 3166 llen--; 3167 } 3168 if (llen == 0 || *line == '#' || *line == '\n') 3169 return (1); 3170 3171 return (0); 3172 } 3173 3174 static int 3175 special_offload_rule(char *str) 3176 { 3177 3178 /* skip leading whitespaces */ 3179 while (isspace(*str)) 3180 str++; 3181 3182 /* check for special strings: "-", "all", "any" */ 3183 if (*str == '-') { 3184 str++; 3185 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3186 str += 3; 3187 } else { 3188 return (0); 3189 } 3190 3191 /* skip trailing whitespaces */ 3192 while (isspace(*str)) 3193 str++; 3194 3195 return (*str == '\0'); 3196 } 3197 3198 /* 3199 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3200 * 3201 * [<open-type>] <expr> => <settings> 3202 */ 3203 static int 3204 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3205 struct offload_rule *r) 3206 { 3207 char *expr, *settings, *s; 3208 3209 bzero(r, sizeof(*r)); 3210 3211 /* Skip leading whitespace. */ 3212 while (isspace(*line)) 3213 line++; 3214 /* Trim trailing whitespace */ 3215 s = &line[llen - 1]; 3216 while (isspace(*s)) { 3217 *s-- = '\0'; 3218 llen--; 3219 } 3220 3221 /* 3222 * First part of the rule: '[X]' where X = A/D/L/P 3223 */ 3224 if (*line++ != '[') { 3225 warnx("missing \"[\" on line %zd", lno); 3226 return (EINVAL); 3227 } 3228 switch (*line) { 3229 case 'A': 3230 case 'D': 3231 case 'L': 3232 case 'P': 3233 r->open_type = *line; 3234 break; 3235 default: 3236 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3237 return (EINVAL); 3238 } 3239 line++; 3240 if (*line++ != ']') { 3241 warnx("missing \"]\" after \"[%c\" on line %zd", 3242 r->open_type, lno); 3243 return (EINVAL); 3244 } 3245 3246 /* Skip whitespace. */ 3247 while (isspace(*line)) 3248 line++; 3249 3250 /* 3251 * Rest of the rule: <expr> => <settings> 3252 */ 3253 expr = line; 3254 s = strstr(line, "=>"); 3255 if (s == NULL) 3256 return (EINVAL); 3257 settings = s + 2; 3258 while (isspace(*settings)) 3259 settings++; 3260 *s = '\0'; 3261 3262 /* 3263 * <expr> is either a special name (all, any) or a pcap-filter(7). 3264 * In case of a special name the bpf_prog stays all-zero. 3265 */ 3266 if (!special_offload_rule(expr)) { 3267 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3268 PCAP_NETMASK_UNKNOWN) < 0) { 3269 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3270 lno, pcap_geterr(pd)); 3271 return (EINVAL); 3272 } 3273 } 3274 3275 /* settings to apply on a match. */ 3276 if (parse_offload_settings(settings, &r->settings) != 0) { 3277 warnx("failed to parse offload settings \"%s\" on line %zd", 3278 settings, lno); 3279 pcap_freecode(&r->bpf_prog); 3280 return (EINVAL); 3281 } 3282 3283 return (0); 3284 3285 } 3286 3287 /* 3288 * Note that op itself is not dynamically allocated. 3289 */ 3290 static void 3291 free_offload_policy(struct t4_offload_policy *op) 3292 { 3293 int i; 3294 3295 for (i = 0; i < op->nrules; i++) { 3296 /* 3297 * pcap_freecode can cope with empty bpf_prog, which is the case 3298 * for an rule that matches on 'any/all/-'. 3299 */ 3300 pcap_freecode(&op->rule[i].bpf_prog); 3301 } 3302 free(op->rule); 3303 op->nrules = 0; 3304 op->rule = NULL; 3305 } 3306 3307 #define REALLOC_STRIDE 32 3308 3309 /* 3310 * Fills up op->nrules and op->rule. 3311 */ 3312 static int 3313 parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3314 { 3315 FILE *fp; 3316 char *line; 3317 int lno, maxrules, rc; 3318 size_t lcap, llen; 3319 struct offload_rule *r; 3320 pcap_t *pd; 3321 3322 fp = fopen(fname, "r"); 3323 if (fp == NULL) { 3324 warn("Unable to open file \"%s\"", fname); 3325 return (errno); 3326 } 3327 pd = pcap_open_dead(DLT_EN10MB, 128); 3328 if (pd == NULL) { 3329 warnx("Failed to open pcap device"); 3330 fclose(fp); 3331 return (EIO); 3332 } 3333 3334 rc = 0; 3335 lno = 0; 3336 lcap = 0; 3337 maxrules = 0; 3338 op->nrules = 0; 3339 op->rule = NULL; 3340 line = NULL; 3341 3342 while ((llen = getline(&line, &lcap, fp)) != -1) { 3343 lno++; 3344 3345 /* Skip empty lines. */ 3346 if (isempty_line(line, llen)) 3347 continue; 3348 3349 if (op->nrules == maxrules) { 3350 maxrules += REALLOC_STRIDE; 3351 r = realloc(op->rule, 3352 maxrules * sizeof(struct offload_rule)); 3353 if (r == NULL) { 3354 warnx("failed to allocate memory for %d rules", 3355 maxrules); 3356 rc = ENOMEM; 3357 goto done; 3358 } 3359 op->rule = r; 3360 } 3361 3362 r = &op->rule[op->nrules]; 3363 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3364 if (rc != 0) { 3365 warnx("Error parsing line %d of \"%s\"", lno, fname); 3366 goto done; 3367 } 3368 3369 op->nrules++; 3370 } 3371 free(line); 3372 3373 if (!feof(fp)) { 3374 warn("Error while reading from file \"%s\" at line %d", 3375 fname, lno); 3376 rc = errno; 3377 goto done; 3378 } 3379 3380 if (op->nrules == 0) { 3381 warnx("No valid rules found in \"%s\"", fname); 3382 rc = EINVAL; 3383 } 3384 done: 3385 pcap_close(pd); 3386 fclose(fp); 3387 if (rc != 0) { 3388 free_offload_policy(op); 3389 } 3390 3391 return (rc); 3392 } 3393 3394 static int 3395 load_offload_policy(int argc, const char *argv[]) 3396 { 3397 int rc = 0; 3398 const char *fname = argv[0]; 3399 struct t4_offload_policy op = {0}; 3400 3401 if (argc != 1) { 3402 warnx("incorrect number of arguments."); 3403 return (EINVAL); 3404 } 3405 3406 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3407 /* op.nrules is 0 and that means clear policy */ 3408 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3409 } 3410 3411 rc = parse_offload_policy(fname, &op); 3412 if (rc != 0) { 3413 /* Error message displayed already */ 3414 return (EINVAL); 3415 } 3416 3417 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3418 free_offload_policy(&op); 3419 3420 return (rc); 3421 } 3422 3423 static int 3424 run_cmd(int argc, const char *argv[]) 3425 { 3426 int rc = -1; 3427 const char *cmd = argv[0]; 3428 3429 /* command */ 3430 argc--; 3431 argv++; 3432 3433 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3434 rc = register_io(argc, argv, 4); 3435 else if (!strcmp(cmd, "reg64")) 3436 rc = register_io(argc, argv, 8); 3437 else if (!strcmp(cmd, "regdump")) 3438 rc = dump_regs(argc, argv); 3439 else if (!strcmp(cmd, "filter")) 3440 rc = filter_cmd(argc, argv, 0); 3441 else if (!strcmp(cmd, "context")) 3442 rc = get_sge_context(argc, argv); 3443 else if (!strcmp(cmd, "loadfw")) 3444 rc = loadfw(argc, argv); 3445 else if (!strcmp(cmd, "memdump")) 3446 rc = memdump(argc, argv); 3447 else if (!strcmp(cmd, "tcb")) 3448 rc = read_tcb(argc, argv); 3449 else if (!strcmp(cmd, "i2c")) 3450 rc = read_i2c(argc, argv); 3451 else if (!strcmp(cmd, "clearstats")) 3452 rc = clearstats(argc, argv); 3453 else if (!strcmp(cmd, "tracer")) 3454 rc = tracer_cmd(argc, argv); 3455 else if (!strcmp(cmd, "modinfo")) 3456 rc = modinfo(argc, argv); 3457 else if (!strcmp(cmd, "sched-class")) 3458 rc = sched_class(argc, argv); 3459 else if (!strcmp(cmd, "sched-queue")) 3460 rc = sched_queue(argc, argv); 3461 else if (!strcmp(cmd, "loadcfg")) 3462 rc = loadcfg(argc, argv); 3463 else if (!strcmp(cmd, "loadboot")) 3464 rc = loadboot(argc, argv); 3465 else if (!strcmp(cmd, "loadboot-cfg")) 3466 rc = loadbootcfg(argc, argv); 3467 else if (!strcmp(cmd, "dumpstate")) 3468 rc = dumpstate(argc, argv); 3469 else if (!strcmp(cmd, "policy")) 3470 rc = load_offload_policy(argc, argv); 3471 else if (!strcmp(cmd, "hashfilter")) 3472 rc = filter_cmd(argc, argv, 1); 3473 else { 3474 rc = EINVAL; 3475 warnx("invalid command \"%s\"", cmd); 3476 } 3477 3478 return (rc); 3479 } 3480 3481 #define MAX_ARGS 15 3482 static int 3483 run_cmd_loop(void) 3484 { 3485 int i, rc = 0; 3486 char buffer[128], *buf; 3487 const char *args[MAX_ARGS + 1]; 3488 3489 /* 3490 * Simple loop: displays a "> " prompt and processes any input as a 3491 * cxgbetool command. You're supposed to enter only the part after 3492 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3493 */ 3494 for (;;) { 3495 fprintf(stdout, "> "); 3496 fflush(stdout); 3497 buf = fgets(buffer, sizeof(buffer), stdin); 3498 if (buf == NULL) { 3499 if (ferror(stdin)) { 3500 warn("stdin error"); 3501 rc = errno; /* errno from fgets */ 3502 } 3503 break; 3504 } 3505 3506 i = 0; 3507 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3508 if (args[i][0] != 0 && ++i == MAX_ARGS) 3509 break; 3510 } 3511 args[i] = 0; 3512 3513 if (i == 0) 3514 continue; /* skip empty line */ 3515 3516 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3517 break; 3518 3519 rc = run_cmd(i, args); 3520 } 3521 3522 /* rc normally comes from the last command (not including quit/exit) */ 3523 return (rc); 3524 } 3525 3526 int 3527 main(int argc, const char *argv[]) 3528 { 3529 int rc = -1; 3530 3531 progname = argv[0]; 3532 3533 if (argc == 2) { 3534 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3535 usage(stdout); 3536 exit(0); 3537 } 3538 } 3539 3540 if (argc < 3) { 3541 usage(stderr); 3542 exit(EINVAL); 3543 } 3544 3545 nexus = argv[1]; 3546 3547 /* progname and nexus */ 3548 argc -= 2; 3549 argv += 2; 3550 3551 if (argc == 1 && !strcmp(argv[0], "stdio")) 3552 rc = run_cmd_loop(); 3553 else 3554 rc = run_cmd(argc, argv); 3555 3556 return (rc); 3557 } 3558