1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/sysctl.h> 35 #include <sys/errno.h> 36 #include <sys/mman.h> 37 #include <sys/cpuset.h> 38 39 #include <stdio.h> 40 #include <stdlib.h> 41 #include <stdbool.h> 42 #include <string.h> 43 #include <unistd.h> 44 #include <libgen.h> 45 #include <libutil.h> 46 #include <fcntl.h> 47 #include <getopt.h> 48 #include <time.h> 49 #include <assert.h> 50 #include <libutil.h> 51 52 #include <machine/cpufunc.h> 53 #include <machine/specialreg.h> 54 #include <machine/vmm.h> 55 #include <machine/vmm_dev.h> 56 #include <vmmapi.h> 57 58 #include "amd/vmcb.h" 59 #include "intel/vmcs.h" 60 61 #define MB (1UL << 20) 62 #define GB (1UL << 30) 63 64 #define REQ_ARG required_argument 65 #define NO_ARG no_argument 66 #define OPT_ARG optional_argument 67 68 static const char *progname; 69 70 static void 71 usage(bool cpu_intel) 72 { 73 74 (void)fprintf(stderr, 75 "Usage: %s --vm=<vmname>\n" 76 " [--cpu=<vcpu_number>]\n" 77 " [--create]\n" 78 " [--destroy]\n" 79 " [--get-all]\n" 80 " [--get-stats]\n" 81 " [--set-desc-ds]\n" 82 " [--get-desc-ds]\n" 83 " [--set-desc-es]\n" 84 " [--get-desc-es]\n" 85 " [--set-desc-gs]\n" 86 " [--get-desc-gs]\n" 87 " [--set-desc-fs]\n" 88 " [--get-desc-fs]\n" 89 " [--set-desc-cs]\n" 90 " [--get-desc-cs]\n" 91 " [--set-desc-ss]\n" 92 " [--get-desc-ss]\n" 93 " [--set-desc-tr]\n" 94 " [--get-desc-tr]\n" 95 " [--set-desc-ldtr]\n" 96 " [--get-desc-ldtr]\n" 97 " [--set-desc-gdtr]\n" 98 " [--get-desc-gdtr]\n" 99 " [--set-desc-idtr]\n" 100 " [--get-desc-idtr]\n" 101 " [--run]\n" 102 " [--capname=<capname>]\n" 103 " [--getcap]\n" 104 " [--setcap=<0|1>]\n" 105 " [--desc-base=<BASE>]\n" 106 " [--desc-limit=<LIMIT>]\n" 107 " [--desc-access=<ACCESS>]\n" 108 " [--set-cr0=<CR0>]\n" 109 " [--get-cr0]\n" 110 " [--set-cr3=<CR3>]\n" 111 " [--get-cr3]\n" 112 " [--set-cr4=<CR4>]\n" 113 " [--get-cr4]\n" 114 " [--set-dr7=<DR7>]\n" 115 " [--get-dr7]\n" 116 " [--set-rsp=<RSP>]\n" 117 " [--get-rsp]\n" 118 " [--set-rip=<RIP>]\n" 119 " [--get-rip]\n" 120 " [--get-rax]\n" 121 " [--set-rax=<RAX>]\n" 122 " [--get-rbx]\n" 123 " [--get-rcx]\n" 124 " [--get-rdx]\n" 125 " [--get-rsi]\n" 126 " [--get-rdi]\n" 127 " [--get-rbp]\n" 128 " [--get-r8]\n" 129 " [--get-r9]\n" 130 " [--get-r10]\n" 131 " [--get-r11]\n" 132 " [--get-r12]\n" 133 " [--get-r13]\n" 134 " [--get-r14]\n" 135 " [--get-r15]\n" 136 " [--set-rflags=<RFLAGS>]\n" 137 " [--get-rflags]\n" 138 " [--set-cs]\n" 139 " [--get-cs]\n" 140 " [--set-ds]\n" 141 " [--get-ds]\n" 142 " [--set-es]\n" 143 " [--get-es]\n" 144 " [--set-fs]\n" 145 " [--get-fs]\n" 146 " [--set-gs]\n" 147 " [--get-gs]\n" 148 " [--set-ss]\n" 149 " [--get-ss]\n" 150 " [--get-tr]\n" 151 " [--get-ldtr]\n" 152 " [--set-x2apic-state=<state>]\n" 153 " [--get-x2apic-state]\n" 154 " [--unassign-pptdev=<bus/slot/func>]\n" 155 " [--set-mem=<memory in units of MB>]\n" 156 " [--get-lowmem]\n" 157 " [--get-highmem]\n" 158 " [--get-gpa-pmap]\n" 159 " [--assert-lapic-lvt=<pin>]\n" 160 " [--inject-nmi]\n" 161 " [--force-reset]\n" 162 " [--force-poweroff]\n" 163 " [--get-rtc-time]\n" 164 " [--set-rtc-time=<secs>]\n" 165 " [--get-rtc-nvram]\n" 166 " [--set-rtc-nvram=<val>]\n" 167 " [--rtc-nvram-offset=<offset>]\n" 168 " [--get-active-cpus]\n" 169 " [--get-suspended-cpus]\n" 170 " [--get-intinfo]\n" 171 " [--get-eptp]\n" 172 " [--set-exception-bitmap]\n" 173 " [--get-exception-bitmap]\n" 174 " [--get-tsc-offset]\n" 175 " [--get-guest-pat]\n" 176 " [--get-io-bitmap-address]\n" 177 " [--get-msr-bitmap]\n" 178 " [--get-msr-bitmap-address]\n" 179 " [--get-guest-sysenter]\n" 180 " [--get-exit-reason]\n", 181 progname); 182 183 if (cpu_intel) { 184 (void)fprintf(stderr, 185 " [--get-vmcs-pinbased-ctls]\n" 186 " [--get-vmcs-procbased-ctls]\n" 187 " [--get-vmcs-procbased-ctls2]\n" 188 " [--get-vmcs-entry-interruption-info]\n" 189 " [--set-vmcs-entry-interruption-info=<info>]\n" 190 " [--get-vmcs-guest-physical-address\n" 191 " [--get-vmcs-guest-linear-address\n" 192 " [--get-vmcs-host-pat]\n" 193 " [--get-vmcs-host-cr0]\n" 194 " [--get-vmcs-host-cr3]\n" 195 " [--get-vmcs-host-cr4]\n" 196 " [--get-vmcs-host-rip]\n" 197 " [--get-vmcs-host-rsp]\n" 198 " [--get-vmcs-cr0-mask]\n" 199 " [--get-vmcs-cr0-shadow]\n" 200 " [--get-vmcs-cr4-mask]\n" 201 " [--get-vmcs-cr4-shadow]\n" 202 " [--get-vmcs-cr3-targets]\n" 203 " [--get-vmcs-apic-access-address]\n" 204 " [--get-vmcs-virtual-apic-address]\n" 205 " [--get-vmcs-tpr-threshold]\n" 206 " [--get-vmcs-vpid]\n" 207 " [--get-vmcs-instruction-error]\n" 208 " [--get-vmcs-exit-ctls]\n" 209 " [--get-vmcs-entry-ctls]\n" 210 " [--get-vmcs-link]\n" 211 " [--get-vmcs-exit-qualification]\n" 212 " [--get-vmcs-exit-interruption-info]\n" 213 " [--get-vmcs-exit-interruption-error]\n" 214 " [--get-vmcs-interruptibility]\n" 215 ); 216 } else { 217 (void)fprintf(stderr, 218 " [--get-vmcb-intercepts]\n" 219 " [--get-vmcb-asid]\n" 220 " [--get-vmcb-exit-details]\n" 221 " [--get-vmcb-tlb-ctrl]\n" 222 " [--get-vmcb-virq]\n" 223 " [--get-avic-apic-bar]\n" 224 " [--get-avic-backing-page]\n" 225 " [--get-avic-table]\n" 226 ); 227 } 228 exit(1); 229 } 230 231 static int get_rtc_time, set_rtc_time; 232 static int get_rtc_nvram, set_rtc_nvram; 233 static int rtc_nvram_offset; 234 static uint8_t rtc_nvram_value; 235 static time_t rtc_secs; 236 237 static int get_stats, getcap, setcap, capval, get_gpa_pmap; 238 static int inject_nmi, assert_lapic_lvt; 239 static int force_reset, force_poweroff; 240 static const char *capname; 241 static int create, destroy, get_memmap, get_memseg; 242 static int get_intinfo; 243 static int get_active_cpus, get_suspended_cpus; 244 static uint64_t memsize; 245 static int set_cr0, get_cr0, set_cr3, get_cr3, set_cr4, get_cr4; 246 static int set_efer, get_efer; 247 static int set_dr7, get_dr7; 248 static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags; 249 static int set_rax, get_rax; 250 static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp; 251 static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15; 252 static int set_desc_ds, get_desc_ds; 253 static int set_desc_es, get_desc_es; 254 static int set_desc_fs, get_desc_fs; 255 static int set_desc_gs, get_desc_gs; 256 static int set_desc_cs, get_desc_cs; 257 static int set_desc_ss, get_desc_ss; 258 static int set_desc_gdtr, get_desc_gdtr; 259 static int set_desc_idtr, get_desc_idtr; 260 static int set_desc_tr, get_desc_tr; 261 static int set_desc_ldtr, get_desc_ldtr; 262 static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr; 263 static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr; 264 static int set_x2apic_state, get_x2apic_state; 265 enum x2apic_state x2apic_state; 266 static int unassign_pptdev, bus, slot, func; 267 static int run; 268 269 /* 270 * VMCB specific. 271 */ 272 static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl; 273 static int get_vmcb_virq, get_avic_table; 274 275 /* 276 * VMCS-specific fields 277 */ 278 static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2; 279 static int get_eptp, get_io_bitmap, get_tsc_offset; 280 static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info; 281 static int get_vmcs_interruptibility; 282 uint32_t vmcs_entry_interruption_info; 283 static int get_vmcs_gpa, get_vmcs_gla; 284 static int get_exception_bitmap, set_exception_bitmap, exception_bitmap; 285 static int get_cr0_mask, get_cr0_shadow; 286 static int get_cr4_mask, get_cr4_shadow; 287 static int get_cr3_targets; 288 static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold; 289 static int get_msr_bitmap, get_msr_bitmap_address; 290 static int get_vpid_asid; 291 static int get_inst_err, get_exit_ctls, get_entry_ctls; 292 static int get_host_cr0, get_host_cr3, get_host_cr4; 293 static int get_host_rip, get_host_rsp; 294 static int get_guest_pat, get_host_pat; 295 static int get_guest_sysenter, get_vmcs_link; 296 static int get_exit_reason, get_vmcs_exit_qualification; 297 static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error; 298 static int get_vmcs_exit_inst_length; 299 300 static uint64_t desc_base; 301 static uint32_t desc_limit, desc_access; 302 303 static int get_all; 304 305 static void 306 dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu) 307 { 308 printf("vm exit[%d]\n", vcpu); 309 printf("\trip\t\t0x%016lx\n", vmexit->rip); 310 printf("\tinst_length\t%d\n", vmexit->inst_length); 311 switch (vmexit->exitcode) { 312 case VM_EXITCODE_INOUT: 313 printf("\treason\t\tINOUT\n"); 314 printf("\tdirection\t%s\n", vmexit->u.inout.in ? "IN" : "OUT"); 315 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes); 316 printf("\tflags\t\t%s%s\n", 317 vmexit->u.inout.string ? "STRING " : "", 318 vmexit->u.inout.rep ? "REP " : ""); 319 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port); 320 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax); 321 break; 322 case VM_EXITCODE_VMX: 323 printf("\treason\t\tVMX\n"); 324 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status); 325 printf("\texit_reason\t0x%08x (%u)\n", 326 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason); 327 printf("\tqualification\t0x%016lx\n", 328 vmexit->u.vmx.exit_qualification); 329 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type); 330 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error); 331 break; 332 case VM_EXITCODE_SVM: 333 printf("\treason\t\tSVM\n"); 334 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode); 335 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1); 336 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2); 337 break; 338 default: 339 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode); 340 break; 341 } 342 } 343 344 /* AMD 6th generation and Intel compatible MSRs */ 345 #define MSR_AMD6TH_START 0xC0000000 346 #define MSR_AMD6TH_END 0xC0001FFF 347 /* AMD 7th and 8th generation compatible MSRs */ 348 #define MSR_AMD7TH_START 0xC0010000 349 #define MSR_AMD7TH_END 0xC0011FFF 350 351 static const char * 352 msr_name(uint32_t msr) 353 { 354 static char buf[32]; 355 356 switch(msr) { 357 case MSR_TSC: 358 return ("MSR_TSC"); 359 case MSR_EFER: 360 return ("MSR_EFER"); 361 case MSR_STAR: 362 return ("MSR_STAR"); 363 case MSR_LSTAR: 364 return ("MSR_LSTAR"); 365 case MSR_CSTAR: 366 return ("MSR_CSTAR"); 367 case MSR_SF_MASK: 368 return ("MSR_SF_MASK"); 369 case MSR_FSBASE: 370 return ("MSR_FSBASE"); 371 case MSR_GSBASE: 372 return ("MSR_GSBASE"); 373 case MSR_KGSBASE: 374 return ("MSR_KGSBASE"); 375 case MSR_SYSENTER_CS_MSR: 376 return ("MSR_SYSENTER_CS_MSR"); 377 case MSR_SYSENTER_ESP_MSR: 378 return ("MSR_SYSENTER_ESP_MSR"); 379 case MSR_SYSENTER_EIP_MSR: 380 return ("MSR_SYSENTER_EIP_MSR"); 381 case MSR_PAT: 382 return ("MSR_PAT"); 383 } 384 snprintf(buf, sizeof(buf), "MSR %#08x", msr); 385 386 return (buf); 387 } 388 389 static inline void 390 print_msr_pm(uint64_t msr, int vcpu, int readable, int writeable) 391 { 392 393 if (readable || writeable) { 394 printf("%-20s[%d]\t\t%c%c\n", msr_name(msr), vcpu, 395 readable ? 'R' : '-', writeable ? 'W' : '-'); 396 } 397 } 398 399 /* 400 * Reference APM vol2, section 15.11 MSR Intercepts. 401 */ 402 static void 403 dump_amd_msr_pm(const char *bitmap, int vcpu) 404 { 405 int byte, bit, readable, writeable; 406 uint32_t msr; 407 408 for (msr = 0; msr < 0x2000; msr++) { 409 byte = msr / 4; 410 bit = (msr % 4) * 2; 411 412 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */ 413 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 414 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 415 print_msr_pm(msr, vcpu, readable, writeable); 416 417 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ 418 byte += 2048; 419 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 420 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 421 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable, 422 writeable); 423 424 /* MSR 0xC0010000 to 0xC0011FF is only for AMD */ 425 byte += 4096; 426 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 427 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 428 print_msr_pm(msr + MSR_AMD7TH_START, vcpu, readable, 429 writeable); 430 } 431 } 432 433 /* 434 * Reference Intel SDM Vol3 Section 24.6.9 MSR-Bitmap Address 435 */ 436 static void 437 dump_intel_msr_pm(const char *bitmap, int vcpu) 438 { 439 int byte, bit, readable, writeable; 440 uint32_t msr; 441 442 for (msr = 0; msr < 0x2000; msr++) { 443 byte = msr / 8; 444 bit = msr & 0x7; 445 446 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */ 447 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 448 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1; 449 print_msr_pm(msr, vcpu, readable, writeable); 450 451 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ 452 byte += 1024; 453 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 454 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1; 455 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable, 456 writeable); 457 } 458 } 459 460 static int 461 dump_msr_bitmap(int vcpu, uint64_t addr, bool cpu_intel) 462 { 463 int error, fd, map_size; 464 const char *bitmap; 465 466 error = -1; 467 bitmap = MAP_FAILED; 468 469 fd = open("/dev/mem", O_RDONLY, 0); 470 if (fd < 0) { 471 perror("Couldn't open /dev/mem"); 472 goto done; 473 } 474 475 if (cpu_intel) 476 map_size = PAGE_SIZE; 477 else 478 map_size = 2 * PAGE_SIZE; 479 480 bitmap = mmap(NULL, map_size, PROT_READ, MAP_SHARED, fd, addr); 481 if (bitmap == MAP_FAILED) { 482 perror("mmap failed"); 483 goto done; 484 } 485 486 if (cpu_intel) 487 dump_intel_msr_pm(bitmap, vcpu); 488 else 489 dump_amd_msr_pm(bitmap, vcpu); 490 491 error = 0; 492 done: 493 if (bitmap != MAP_FAILED) 494 munmap((void *)bitmap, map_size); 495 if (fd >= 0) 496 close(fd); 497 498 return (error); 499 } 500 501 static int 502 vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val) 503 { 504 505 return (vm_get_register(ctx, vcpu, VMCS_IDENT(field), ret_val)); 506 } 507 508 static int 509 vm_set_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t val) 510 { 511 512 return (vm_set_register(ctx, vcpu, VMCS_IDENT(field), val)); 513 } 514 515 static int 516 vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 517 uint64_t *ret_val) 518 { 519 520 return (vm_get_register(ctx, vcpu, VMCB_ACCESS(off, bytes), ret_val)); 521 } 522 523 static int 524 vm_set_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 525 uint64_t val) 526 { 527 528 return (vm_set_register(ctx, vcpu, VMCB_ACCESS(off, bytes), val)); 529 } 530 531 enum { 532 VMNAME = 1000, /* avoid collision with return values from getopt */ 533 VCPU, 534 SET_MEM, 535 SET_EFER, 536 SET_CR0, 537 SET_CR3, 538 SET_CR4, 539 SET_DR7, 540 SET_RSP, 541 SET_RIP, 542 SET_RAX, 543 SET_RFLAGS, 544 DESC_BASE, 545 DESC_LIMIT, 546 DESC_ACCESS, 547 SET_CS, 548 SET_DS, 549 SET_ES, 550 SET_FS, 551 SET_GS, 552 SET_SS, 553 SET_TR, 554 SET_LDTR, 555 SET_X2APIC_STATE, 556 SET_EXCEPTION_BITMAP, 557 SET_VMCS_ENTRY_INTERRUPTION_INFO, 558 SET_CAP, 559 CAPNAME, 560 UNASSIGN_PPTDEV, 561 GET_GPA_PMAP, 562 ASSERT_LAPIC_LVT, 563 SET_RTC_TIME, 564 SET_RTC_NVRAM, 565 RTC_NVRAM_OFFSET, 566 }; 567 568 static void 569 print_cpus(const char *banner, const cpuset_t *cpus) 570 { 571 int i, first; 572 573 first = 1; 574 printf("%s:\t", banner); 575 if (!CPU_EMPTY(cpus)) { 576 for (i = 0; i < CPU_SETSIZE; i++) { 577 if (CPU_ISSET(i, cpus)) { 578 printf("%s%d", first ? " " : ", ", i); 579 first = 0; 580 } 581 } 582 } else 583 printf(" (none)"); 584 printf("\n"); 585 } 586 587 static void 588 print_intinfo(const char *banner, uint64_t info) 589 { 590 int type; 591 592 printf("%s:\t", banner); 593 if (info & VM_INTINFO_VALID) { 594 type = info & VM_INTINFO_TYPE; 595 switch (type) { 596 case VM_INTINFO_HWINTR: 597 printf("extint"); 598 break; 599 case VM_INTINFO_NMI: 600 printf("nmi"); 601 break; 602 case VM_INTINFO_SWINTR: 603 printf("swint"); 604 break; 605 default: 606 printf("exception"); 607 break; 608 } 609 printf(" vector %d", (int)VM_INTINFO_VECTOR(info)); 610 if (info & VM_INTINFO_DEL_ERRCODE) 611 printf(" errcode %#x", (u_int)(info >> 32)); 612 } else { 613 printf("n/a"); 614 } 615 printf("\n"); 616 } 617 618 static bool 619 cpu_vendor_intel(void) 620 { 621 u_int regs[4]; 622 char cpu_vendor[13]; 623 624 do_cpuid(0, regs); 625 ((u_int *)&cpu_vendor)[0] = regs[1]; 626 ((u_int *)&cpu_vendor)[1] = regs[3]; 627 ((u_int *)&cpu_vendor)[2] = regs[2]; 628 cpu_vendor[12] = '\0'; 629 630 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { 631 return (false); 632 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { 633 return (true); 634 } else { 635 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor); 636 exit(1); 637 } 638 } 639 640 static int 641 get_all_registers(struct vmctx *ctx, int vcpu) 642 { 643 uint64_t cr0, cr3, cr4, dr7, rsp, rip, rflags, efer; 644 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp; 645 uint64_t r8, r9, r10, r11, r12, r13, r14, r15; 646 int error = 0; 647 648 if (!error && (get_efer || get_all)) { 649 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer); 650 if (error == 0) 651 printf("efer[%d]\t\t0x%016lx\n", vcpu, efer); 652 } 653 654 if (!error && (get_cr0 || get_all)) { 655 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0); 656 if (error == 0) 657 printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 658 } 659 660 if (!error && (get_cr3 || get_all)) { 661 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3); 662 if (error == 0) 663 printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 664 } 665 666 if (!error && (get_cr4 || get_all)) { 667 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4); 668 if (error == 0) 669 printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 670 } 671 672 if (!error && (get_dr7 || get_all)) { 673 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7); 674 if (error == 0) 675 printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7); 676 } 677 678 if (!error && (get_rsp || get_all)) { 679 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp); 680 if (error == 0) 681 printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 682 } 683 684 if (!error && (get_rip || get_all)) { 685 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip); 686 if (error == 0) 687 printf("rip[%d]\t\t0x%016lx\n", vcpu, rip); 688 } 689 690 if (!error && (get_rax || get_all)) { 691 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax); 692 if (error == 0) 693 printf("rax[%d]\t\t0x%016lx\n", vcpu, rax); 694 } 695 696 if (!error && (get_rbx || get_all)) { 697 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx); 698 if (error == 0) 699 printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx); 700 } 701 702 if (!error && (get_rcx || get_all)) { 703 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx); 704 if (error == 0) 705 printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx); 706 } 707 708 if (!error && (get_rdx || get_all)) { 709 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx); 710 if (error == 0) 711 printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx); 712 } 713 714 if (!error && (get_rsi || get_all)) { 715 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi); 716 if (error == 0) 717 printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi); 718 } 719 720 if (!error && (get_rdi || get_all)) { 721 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi); 722 if (error == 0) 723 printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi); 724 } 725 726 if (!error && (get_rbp || get_all)) { 727 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp); 728 if (error == 0) 729 printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp); 730 } 731 732 if (!error && (get_r8 || get_all)) { 733 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8); 734 if (error == 0) 735 printf("r8[%d]\t\t0x%016lx\n", vcpu, r8); 736 } 737 738 if (!error && (get_r9 || get_all)) { 739 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9); 740 if (error == 0) 741 printf("r9[%d]\t\t0x%016lx\n", vcpu, r9); 742 } 743 744 if (!error && (get_r10 || get_all)) { 745 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10); 746 if (error == 0) 747 printf("r10[%d]\t\t0x%016lx\n", vcpu, r10); 748 } 749 750 if (!error && (get_r11 || get_all)) { 751 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11); 752 if (error == 0) 753 printf("r11[%d]\t\t0x%016lx\n", vcpu, r11); 754 } 755 756 if (!error && (get_r12 || get_all)) { 757 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12); 758 if (error == 0) 759 printf("r12[%d]\t\t0x%016lx\n", vcpu, r12); 760 } 761 762 if (!error && (get_r13 || get_all)) { 763 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13); 764 if (error == 0) 765 printf("r13[%d]\t\t0x%016lx\n", vcpu, r13); 766 } 767 768 if (!error && (get_r14 || get_all)) { 769 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14); 770 if (error == 0) 771 printf("r14[%d]\t\t0x%016lx\n", vcpu, r14); 772 } 773 774 if (!error && (get_r15 || get_all)) { 775 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15); 776 if (error == 0) 777 printf("r15[%d]\t\t0x%016lx\n", vcpu, r15); 778 } 779 780 if (!error && (get_rflags || get_all)) { 781 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 782 &rflags); 783 if (error == 0) 784 printf("rflags[%d]\t0x%016lx\n", vcpu, rflags); 785 } 786 787 return (error); 788 } 789 790 static int 791 get_all_segments(struct vmctx *ctx, int vcpu) 792 { 793 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 794 int error = 0; 795 796 if (!error && (get_desc_ds || get_all)) { 797 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS, 798 &desc_base, &desc_limit, &desc_access); 799 if (error == 0) { 800 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 801 vcpu, desc_base, desc_limit, desc_access); 802 } 803 } 804 805 if (!error && (get_desc_es || get_all)) { 806 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES, 807 &desc_base, &desc_limit, &desc_access); 808 if (error == 0) { 809 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 810 vcpu, desc_base, desc_limit, desc_access); 811 } 812 } 813 814 if (!error && (get_desc_fs || get_all)) { 815 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS, 816 &desc_base, &desc_limit, &desc_access); 817 if (error == 0) { 818 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 819 vcpu, desc_base, desc_limit, desc_access); 820 } 821 } 822 823 if (!error && (get_desc_gs || get_all)) { 824 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS, 825 &desc_base, &desc_limit, &desc_access); 826 if (error == 0) { 827 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 828 vcpu, desc_base, desc_limit, desc_access); 829 } 830 } 831 832 if (!error && (get_desc_ss || get_all)) { 833 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS, 834 &desc_base, &desc_limit, &desc_access); 835 if (error == 0) { 836 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 837 vcpu, desc_base, desc_limit, desc_access); 838 } 839 } 840 841 if (!error && (get_desc_cs || get_all)) { 842 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS, 843 &desc_base, &desc_limit, &desc_access); 844 if (error == 0) { 845 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 846 vcpu, desc_base, desc_limit, desc_access); 847 } 848 } 849 850 if (!error && (get_desc_tr || get_all)) { 851 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR, 852 &desc_base, &desc_limit, &desc_access); 853 if (error == 0) { 854 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 855 vcpu, desc_base, desc_limit, desc_access); 856 } 857 } 858 859 if (!error && (get_desc_ldtr || get_all)) { 860 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 861 &desc_base, &desc_limit, &desc_access); 862 if (error == 0) { 863 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 864 vcpu, desc_base, desc_limit, desc_access); 865 } 866 } 867 868 if (!error && (get_desc_gdtr || get_all)) { 869 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 870 &desc_base, &desc_limit, &desc_access); 871 if (error == 0) { 872 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n", 873 vcpu, desc_base, desc_limit); 874 } 875 } 876 877 if (!error && (get_desc_idtr || get_all)) { 878 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 879 &desc_base, &desc_limit, &desc_access); 880 if (error == 0) { 881 printf("idtr[%d]\t\t0x%016lx/0x%08x\n", 882 vcpu, desc_base, desc_limit); 883 } 884 } 885 886 if (!error && (get_cs || get_all)) { 887 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs); 888 if (error == 0) 889 printf("cs[%d]\t\t0x%04lx\n", vcpu, cs); 890 } 891 892 if (!error && (get_ds || get_all)) { 893 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds); 894 if (error == 0) 895 printf("ds[%d]\t\t0x%04lx\n", vcpu, ds); 896 } 897 898 if (!error && (get_es || get_all)) { 899 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es); 900 if (error == 0) 901 printf("es[%d]\t\t0x%04lx\n", vcpu, es); 902 } 903 904 if (!error && (get_fs || get_all)) { 905 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs); 906 if (error == 0) 907 printf("fs[%d]\t\t0x%04lx\n", vcpu, fs); 908 } 909 910 if (!error && (get_gs || get_all)) { 911 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs); 912 if (error == 0) 913 printf("gs[%d]\t\t0x%04lx\n", vcpu, gs); 914 } 915 916 if (!error && (get_ss || get_all)) { 917 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss); 918 if (error == 0) 919 printf("ss[%d]\t\t0x%04lx\n", vcpu, ss); 920 } 921 922 if (!error && (get_tr || get_all)) { 923 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr); 924 if (error == 0) 925 printf("tr[%d]\t\t0x%04lx\n", vcpu, tr); 926 } 927 928 if (!error && (get_ldtr || get_all)) { 929 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr); 930 if (error == 0) 931 printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr); 932 } 933 934 return (error); 935 } 936 937 static int 938 get_misc_vmcs(struct vmctx *ctx, int vcpu) 939 { 940 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64; 941 int error = 0; 942 943 if (!error && (get_cr0_mask || get_all)) { 944 uint64_t cr0mask; 945 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask); 946 if (error == 0) 947 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask); 948 } 949 950 if (!error && (get_cr0_shadow || get_all)) { 951 uint64_t cr0shadow; 952 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW, 953 &cr0shadow); 954 if (error == 0) 955 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow); 956 } 957 958 if (!error && (get_cr4_mask || get_all)) { 959 uint64_t cr4mask; 960 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask); 961 if (error == 0) 962 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask); 963 } 964 965 if (!error && (get_cr4_shadow || get_all)) { 966 uint64_t cr4shadow; 967 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW, 968 &cr4shadow); 969 if (error == 0) 970 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow); 971 } 972 973 if (!error && (get_cr3_targets || get_all)) { 974 uint64_t target_count, target_addr; 975 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT, 976 &target_count); 977 if (error == 0) { 978 printf("cr3_target_count[%d]\t0x%016lx\n", 979 vcpu, target_count); 980 } 981 982 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0, 983 &target_addr); 984 if (error == 0) { 985 printf("cr3_target0[%d]\t\t0x%016lx\n", 986 vcpu, target_addr); 987 } 988 989 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1, 990 &target_addr); 991 if (error == 0) { 992 printf("cr3_target1[%d]\t\t0x%016lx\n", 993 vcpu, target_addr); 994 } 995 996 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2, 997 &target_addr); 998 if (error == 0) { 999 printf("cr3_target2[%d]\t\t0x%016lx\n", 1000 vcpu, target_addr); 1001 } 1002 1003 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3, 1004 &target_addr); 1005 if (error == 0) { 1006 printf("cr3_target3[%d]\t\t0x%016lx\n", 1007 vcpu, target_addr); 1008 } 1009 } 1010 1011 if (!error && (get_pinbased_ctls || get_all)) { 1012 error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl); 1013 if (error == 0) 1014 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 1015 } 1016 1017 if (!error && (get_procbased_ctls || get_all)) { 1018 error = vm_get_vmcs_field(ctx, vcpu, 1019 VMCS_PRI_PROC_BASED_CTLS, &ctl); 1020 if (error == 0) 1021 printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 1022 } 1023 1024 if (!error && (get_procbased_ctls2 || get_all)) { 1025 error = vm_get_vmcs_field(ctx, vcpu, 1026 VMCS_SEC_PROC_BASED_CTLS, &ctl); 1027 if (error == 0) 1028 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl); 1029 } 1030 1031 if (!error && (get_vmcs_gla || get_all)) { 1032 error = vm_get_vmcs_field(ctx, vcpu, 1033 VMCS_GUEST_LINEAR_ADDRESS, &u64); 1034 if (error == 0) 1035 printf("gla[%d]\t\t0x%016lx\n", vcpu, u64); 1036 } 1037 1038 if (!error && (get_vmcs_gpa || get_all)) { 1039 error = vm_get_vmcs_field(ctx, vcpu, 1040 VMCS_GUEST_PHYSICAL_ADDRESS, &u64); 1041 if (error == 0) 1042 printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64); 1043 } 1044 1045 if (!error && (get_vmcs_entry_interruption_info || 1046 get_all)) { 1047 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64); 1048 if (error == 0) { 1049 printf("entry_interruption_info[%d]\t0x%016lx\n", 1050 vcpu, u64); 1051 } 1052 } 1053 1054 if (!error && (get_tpr_threshold || get_all)) { 1055 uint64_t threshold; 1056 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD, 1057 &threshold); 1058 if (error == 0) 1059 printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold); 1060 } 1061 1062 if (!error && (get_inst_err || get_all)) { 1063 uint64_t insterr; 1064 error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR, 1065 &insterr); 1066 if (error == 0) { 1067 printf("instruction_error[%d]\t0x%016lx\n", 1068 vcpu, insterr); 1069 } 1070 } 1071 1072 if (!error && (get_exit_ctls || get_all)) { 1073 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl); 1074 if (error == 0) 1075 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1076 } 1077 1078 if (!error && (get_entry_ctls || get_all)) { 1079 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl); 1080 if (error == 0) 1081 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1082 } 1083 1084 if (!error && (get_host_pat || get_all)) { 1085 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat); 1086 if (error == 0) 1087 printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat); 1088 } 1089 1090 if (!error && (get_host_cr0 || get_all)) { 1091 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0); 1092 if (error == 0) 1093 printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 1094 } 1095 1096 if (!error && (get_host_cr3 || get_all)) { 1097 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3); 1098 if (error == 0) 1099 printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 1100 } 1101 1102 if (!error && (get_host_cr4 || get_all)) { 1103 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4); 1104 if (error == 0) 1105 printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 1106 } 1107 1108 if (!error && (get_host_rip || get_all)) { 1109 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip); 1110 if (error == 0) 1111 printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip); 1112 } 1113 1114 if (!error && (get_host_rsp || get_all)) { 1115 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp); 1116 if (error == 0) 1117 printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 1118 } 1119 1120 if (!error && (get_vmcs_link || get_all)) { 1121 error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr); 1122 if (error == 0) 1123 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr); 1124 } 1125 1126 if (!error && (get_vmcs_exit_interruption_info || get_all)) { 1127 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64); 1128 if (error == 0) { 1129 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n", 1130 vcpu, u64); 1131 } 1132 } 1133 1134 if (!error && (get_vmcs_exit_interruption_error || get_all)) { 1135 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE, 1136 &u64); 1137 if (error == 0) { 1138 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n", 1139 vcpu, u64); 1140 } 1141 } 1142 1143 if (!error && (get_vmcs_interruptibility || get_all)) { 1144 error = vm_get_vmcs_field(ctx, vcpu, 1145 VMCS_GUEST_INTERRUPTIBILITY, &u64); 1146 if (error == 0) { 1147 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n", 1148 vcpu, u64); 1149 } 1150 } 1151 1152 if (!error && (get_vmcs_exit_inst_length || get_all)) { 1153 error = vm_get_vmcs_field(ctx, vcpu, 1154 VMCS_EXIT_INSTRUCTION_LENGTH, &u64); 1155 if (error == 0) 1156 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu, 1157 (uint32_t)u64); 1158 } 1159 1160 if (!error && (get_vmcs_exit_qualification || get_all)) { 1161 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION, 1162 &u64); 1163 if (error == 0) 1164 printf("vmcs_exit_qualification[%d]\t0x%016lx\n", 1165 vcpu, u64); 1166 } 1167 1168 return (error); 1169 } 1170 1171 static int 1172 get_misc_vmcb(struct vmctx *ctx, int vcpu) 1173 { 1174 uint64_t ctl, addr; 1175 int error = 0; 1176 1177 if (!error && (get_vmcb_intercept || get_all)) { 1178 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4, 1179 &ctl); 1180 if (error == 0) 1181 printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1182 1183 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4, 1184 &ctl); 1185 if (error == 0) 1186 printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1187 1188 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4, 1189 &ctl); 1190 if (error == 0) 1191 printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1192 1193 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT, 1194 4, &ctl); 1195 if (error == 0) 1196 printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1197 1198 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT, 1199 4, &ctl); 1200 if (error == 0) 1201 printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1202 } 1203 1204 if (!error && (get_vmcb_tlb_ctrl || get_all)) { 1205 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL, 1206 4, &ctl); 1207 if (error == 0) 1208 printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl); 1209 } 1210 1211 if (!error && (get_vmcb_exit_details || get_all)) { 1212 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1, 1213 8, &ctl); 1214 if (error == 0) 1215 printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl); 1216 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2, 1217 8, &ctl); 1218 if (error == 0) 1219 printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl); 1220 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO, 1221 8, &ctl); 1222 if (error == 0) 1223 printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl); 1224 } 1225 1226 if (!error && (get_vmcb_virq || get_all)) { 1227 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ, 1228 8, &ctl); 1229 if (error == 0) 1230 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl); 1231 } 1232 1233 if (!error && (get_apic_access_addr || get_all)) { 1234 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8, 1235 &addr); 1236 if (error == 0) 1237 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr); 1238 } 1239 1240 if (!error && (get_virtual_apic_addr || get_all)) { 1241 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8, 1242 &addr); 1243 if (error == 0) 1244 printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr); 1245 } 1246 1247 if (!error && (get_avic_table || get_all)) { 1248 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8, 1249 &addr); 1250 if (error == 0) 1251 printf("AVIC logical table[%d]\t0x%016lx\n", 1252 vcpu, addr); 1253 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8, 1254 &addr); 1255 if (error == 0) 1256 printf("AVIC physical table[%d]\t0x%016lx\n", 1257 vcpu, addr); 1258 } 1259 1260 return (error); 1261 } 1262 1263 static struct option * 1264 setup_options(bool cpu_intel) 1265 { 1266 const struct option common_opts[] = { 1267 { "vm", REQ_ARG, 0, VMNAME }, 1268 { "cpu", REQ_ARG, 0, VCPU }, 1269 { "set-mem", REQ_ARG, 0, SET_MEM }, 1270 { "set-efer", REQ_ARG, 0, SET_EFER }, 1271 { "set-cr0", REQ_ARG, 0, SET_CR0 }, 1272 { "set-cr3", REQ_ARG, 0, SET_CR3 }, 1273 { "set-cr4", REQ_ARG, 0, SET_CR4 }, 1274 { "set-dr7", REQ_ARG, 0, SET_DR7 }, 1275 { "set-rsp", REQ_ARG, 0, SET_RSP }, 1276 { "set-rip", REQ_ARG, 0, SET_RIP }, 1277 { "set-rax", REQ_ARG, 0, SET_RAX }, 1278 { "set-rflags", REQ_ARG, 0, SET_RFLAGS }, 1279 { "desc-base", REQ_ARG, 0, DESC_BASE }, 1280 { "desc-limit", REQ_ARG, 0, DESC_LIMIT }, 1281 { "desc-access",REQ_ARG, 0, DESC_ACCESS }, 1282 { "set-cs", REQ_ARG, 0, SET_CS }, 1283 { "set-ds", REQ_ARG, 0, SET_DS }, 1284 { "set-es", REQ_ARG, 0, SET_ES }, 1285 { "set-fs", REQ_ARG, 0, SET_FS }, 1286 { "set-gs", REQ_ARG, 0, SET_GS }, 1287 { "set-ss", REQ_ARG, 0, SET_SS }, 1288 { "set-tr", REQ_ARG, 0, SET_TR }, 1289 { "set-ldtr", REQ_ARG, 0, SET_LDTR }, 1290 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE }, 1291 { "set-exception-bitmap", 1292 REQ_ARG, 0, SET_EXCEPTION_BITMAP }, 1293 { "capname", REQ_ARG, 0, CAPNAME }, 1294 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV }, 1295 { "setcap", REQ_ARG, 0, SET_CAP }, 1296 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP }, 1297 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT }, 1298 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 }, 1299 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME }, 1300 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET }, 1301 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 }, 1302 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM }, 1303 { "getcap", NO_ARG, &getcap, 1 }, 1304 { "get-stats", NO_ARG, &get_stats, 1 }, 1305 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 }, 1306 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 }, 1307 { "get-desc-es",NO_ARG, &get_desc_es, 1 }, 1308 { "set-desc-es",NO_ARG, &set_desc_es, 1 }, 1309 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 }, 1310 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 }, 1311 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 }, 1312 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 }, 1313 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 }, 1314 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 }, 1315 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 }, 1316 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 }, 1317 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 }, 1318 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 }, 1319 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 }, 1320 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 }, 1321 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 }, 1322 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 }, 1323 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 }, 1324 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 }, 1325 { "get-memmap", NO_ARG, &get_memmap, 1 }, 1326 { "get-memseg", NO_ARG, &get_memseg, 1 }, 1327 { "get-efer", NO_ARG, &get_efer, 1 }, 1328 { "get-cr0", NO_ARG, &get_cr0, 1 }, 1329 { "get-cr3", NO_ARG, &get_cr3, 1 }, 1330 { "get-cr4", NO_ARG, &get_cr4, 1 }, 1331 { "get-dr7", NO_ARG, &get_dr7, 1 }, 1332 { "get-rsp", NO_ARG, &get_rsp, 1 }, 1333 { "get-rip", NO_ARG, &get_rip, 1 }, 1334 { "get-rax", NO_ARG, &get_rax, 1 }, 1335 { "get-rbx", NO_ARG, &get_rbx, 1 }, 1336 { "get-rcx", NO_ARG, &get_rcx, 1 }, 1337 { "get-rdx", NO_ARG, &get_rdx, 1 }, 1338 { "get-rsi", NO_ARG, &get_rsi, 1 }, 1339 { "get-rdi", NO_ARG, &get_rdi, 1 }, 1340 { "get-rbp", NO_ARG, &get_rbp, 1 }, 1341 { "get-r8", NO_ARG, &get_r8, 1 }, 1342 { "get-r9", NO_ARG, &get_r9, 1 }, 1343 { "get-r10", NO_ARG, &get_r10, 1 }, 1344 { "get-r11", NO_ARG, &get_r11, 1 }, 1345 { "get-r12", NO_ARG, &get_r12, 1 }, 1346 { "get-r13", NO_ARG, &get_r13, 1 }, 1347 { "get-r14", NO_ARG, &get_r14, 1 }, 1348 { "get-r15", NO_ARG, &get_r15, 1 }, 1349 { "get-rflags", NO_ARG, &get_rflags, 1 }, 1350 { "get-cs", NO_ARG, &get_cs, 1 }, 1351 { "get-ds", NO_ARG, &get_ds, 1 }, 1352 { "get-es", NO_ARG, &get_es, 1 }, 1353 { "get-fs", NO_ARG, &get_fs, 1 }, 1354 { "get-gs", NO_ARG, &get_gs, 1 }, 1355 { "get-ss", NO_ARG, &get_ss, 1 }, 1356 { "get-tr", NO_ARG, &get_tr, 1 }, 1357 { "get-ldtr", NO_ARG, &get_ldtr, 1 }, 1358 { "get-eptp", NO_ARG, &get_eptp, 1 }, 1359 { "get-exception-bitmap", 1360 NO_ARG, &get_exception_bitmap, 1 }, 1361 { "get-io-bitmap-address", 1362 NO_ARG, &get_io_bitmap, 1 }, 1363 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 }, 1364 { "get-msr-bitmap", 1365 NO_ARG, &get_msr_bitmap, 1 }, 1366 { "get-msr-bitmap-address", 1367 NO_ARG, &get_msr_bitmap_address, 1 }, 1368 { "get-guest-pat", NO_ARG, &get_guest_pat, 1 }, 1369 { "get-guest-sysenter", 1370 NO_ARG, &get_guest_sysenter, 1 }, 1371 { "get-exit-reason", 1372 NO_ARG, &get_exit_reason, 1 }, 1373 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 }, 1374 { "get-all", NO_ARG, &get_all, 1 }, 1375 { "run", NO_ARG, &run, 1 }, 1376 { "create", NO_ARG, &create, 1 }, 1377 { "destroy", NO_ARG, &destroy, 1 }, 1378 { "inject-nmi", NO_ARG, &inject_nmi, 1 }, 1379 { "force-reset", NO_ARG, &force_reset, 1 }, 1380 { "force-poweroff", NO_ARG, &force_poweroff, 1 }, 1381 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 }, 1382 { "get-suspended-cpus", NO_ARG, &get_suspended_cpus, 1 }, 1383 { "get-intinfo", NO_ARG, &get_intinfo, 1 }, 1384 }; 1385 1386 const struct option intel_opts[] = { 1387 { "get-vmcs-pinbased-ctls", 1388 NO_ARG, &get_pinbased_ctls, 1 }, 1389 { "get-vmcs-procbased-ctls", 1390 NO_ARG, &get_procbased_ctls, 1 }, 1391 { "get-vmcs-procbased-ctls2", 1392 NO_ARG, &get_procbased_ctls2, 1 }, 1393 { "get-vmcs-guest-linear-address", 1394 NO_ARG, &get_vmcs_gla, 1 }, 1395 { "get-vmcs-guest-physical-address", 1396 NO_ARG, &get_vmcs_gpa, 1 }, 1397 { "get-vmcs-entry-interruption-info", 1398 NO_ARG, &get_vmcs_entry_interruption_info, 1}, 1399 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 }, 1400 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 }, 1401 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 }, 1402 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 }, 1403 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 }, 1404 { "get-vmcs-tpr-threshold", 1405 NO_ARG, &get_tpr_threshold, 1 }, 1406 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 }, 1407 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 }, 1408 { "get-vmcs-entry-ctls", 1409 NO_ARG, &get_entry_ctls, 1 }, 1410 { "get-vmcs-instruction-error", 1411 NO_ARG, &get_inst_err, 1 }, 1412 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 }, 1413 { "get-vmcs-host-cr0", 1414 NO_ARG, &get_host_cr0, 1 }, 1415 { "set-vmcs-entry-interruption-info", 1416 REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO }, 1417 { "get-vmcs-exit-qualification", 1418 NO_ARG, &get_vmcs_exit_qualification, 1 }, 1419 { "get-vmcs-exit-inst-length", 1420 NO_ARG, &get_vmcs_exit_inst_length, 1 }, 1421 { "get-vmcs-interruptibility", 1422 NO_ARG, &get_vmcs_interruptibility, 1 }, 1423 { "get-vmcs-exit-interruption-error", 1424 NO_ARG, &get_vmcs_exit_interruption_error, 1 }, 1425 { "get-vmcs-exit-interruption-info", 1426 NO_ARG, &get_vmcs_exit_interruption_info, 1 }, 1427 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 }, 1428 { "get-vmcs-host-cr3", 1429 NO_ARG, &get_host_cr3, 1 }, 1430 { "get-vmcs-host-cr4", 1431 NO_ARG, &get_host_cr4, 1 }, 1432 { "get-vmcs-host-rip", 1433 NO_ARG, &get_host_rip, 1 }, 1434 { "get-vmcs-host-rsp", 1435 NO_ARG, &get_host_rsp, 1 }, 1436 { "get-apic-access-address", 1437 NO_ARG, &get_apic_access_addr, 1}, 1438 { "get-virtual-apic-address", 1439 NO_ARG, &get_virtual_apic_addr, 1} 1440 }; 1441 1442 const struct option amd_opts[] = { 1443 { "get-vmcb-intercepts", 1444 NO_ARG, &get_vmcb_intercept, 1 }, 1445 { "get-vmcb-asid", 1446 NO_ARG, &get_vpid_asid, 1 }, 1447 { "get-vmcb-exit-details", 1448 NO_ARG, &get_vmcb_exit_details, 1 }, 1449 { "get-vmcb-tlb-ctrl", 1450 NO_ARG, &get_vmcb_tlb_ctrl, 1 }, 1451 { "get-vmcb-virq", 1452 NO_ARG, &get_vmcb_virq, 1 }, 1453 { "get-avic-apic-bar", 1454 NO_ARG, &get_apic_access_addr, 1 }, 1455 { "get-avic-backing-page", 1456 NO_ARG, &get_virtual_apic_addr, 1 }, 1457 { "get-avic-table", 1458 NO_ARG, &get_avic_table, 1 } 1459 }; 1460 1461 const struct option null_opt = { 1462 NULL, 0, NULL, 0 1463 }; 1464 1465 struct option *all_opts; 1466 char *cp; 1467 int optlen; 1468 1469 optlen = sizeof(common_opts); 1470 1471 if (cpu_intel) 1472 optlen += sizeof(intel_opts); 1473 else 1474 optlen += sizeof(amd_opts); 1475 1476 optlen += sizeof(null_opt); 1477 1478 all_opts = malloc(optlen); 1479 1480 cp = (char *)all_opts; 1481 memcpy(cp, common_opts, sizeof(common_opts)); 1482 cp += sizeof(common_opts); 1483 1484 if (cpu_intel) { 1485 memcpy(cp, intel_opts, sizeof(intel_opts)); 1486 cp += sizeof(intel_opts); 1487 } else { 1488 memcpy(cp, amd_opts, sizeof(amd_opts)); 1489 cp += sizeof(amd_opts); 1490 } 1491 1492 memcpy(cp, &null_opt, sizeof(null_opt)); 1493 cp += sizeof(null_opt); 1494 1495 return (all_opts); 1496 } 1497 1498 static const char * 1499 wday_str(int idx) 1500 { 1501 static const char *weekdays[] = { 1502 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" 1503 }; 1504 1505 if (idx >= 0 && idx < 7) 1506 return (weekdays[idx]); 1507 else 1508 return ("UNK"); 1509 } 1510 1511 static const char * 1512 mon_str(int idx) 1513 { 1514 static const char *months[] = { 1515 "Jan", "Feb", "Mar", "Apr", "May", "Jun", 1516 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" 1517 }; 1518 1519 if (idx >= 0 && idx < 12) 1520 return (months[idx]); 1521 else 1522 return ("UNK"); 1523 } 1524 1525 static int 1526 show_memmap(struct vmctx *ctx) 1527 { 1528 char name[SPECNAMELEN + 1], numbuf[8]; 1529 vm_ooffset_t segoff; 1530 vm_paddr_t gpa; 1531 size_t maplen, seglen; 1532 int error, flags, prot, segid, delim; 1533 1534 printf("Address Length Segment Offset "); 1535 printf("Prot Flags\n"); 1536 1537 gpa = 0; 1538 while (1) { 1539 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen, 1540 &prot, &flags); 1541 if (error) 1542 return (errno == ENOENT ? 0 : error); 1543 1544 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1545 if (error) 1546 return (error); 1547 1548 printf("%-12lX", gpa); 1549 humanize_number(numbuf, sizeof(numbuf), maplen, "B", 1550 HN_AUTOSCALE, HN_NOSPACE); 1551 printf("%-12s", numbuf); 1552 1553 printf("%-12s", name[0] ? name : "sysmem"); 1554 printf("%-12lX", segoff); 1555 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-', 1556 prot & PROT_WRITE ? 'W' : '-', 1557 prot & PROT_EXEC ? 'X' : '-'); 1558 1559 delim = '\0'; 1560 if (flags & VM_MEMMAP_F_WIRED) { 1561 printf("%cwired", delim); 1562 delim = '/'; 1563 } 1564 if (flags & VM_MEMMAP_F_IOMMU) { 1565 printf("%ciommu", delim); 1566 delim = '/'; 1567 } 1568 printf("\n"); 1569 1570 gpa += maplen; 1571 } 1572 } 1573 1574 static int 1575 show_memseg(struct vmctx *ctx) 1576 { 1577 char name[SPECNAMELEN + 1], numbuf[8]; 1578 size_t seglen; 1579 int error, segid; 1580 1581 printf("ID Length Name\n"); 1582 1583 segid = 0; 1584 while (1) { 1585 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1586 if (error) 1587 return (errno == EINVAL ? 0 : error); 1588 1589 if (seglen) { 1590 printf("%-4d", segid); 1591 humanize_number(numbuf, sizeof(numbuf), seglen, "B", 1592 HN_AUTOSCALE, HN_NOSPACE); 1593 printf("%-12s", numbuf); 1594 printf("%s", name[0] ? name : "sysmem"); 1595 printf("\n"); 1596 } 1597 segid++; 1598 } 1599 } 1600 1601 int 1602 main(int argc, char *argv[]) 1603 { 1604 char *vmname; 1605 int error, ch, vcpu, ptenum; 1606 vm_paddr_t gpa_pmap; 1607 struct vm_exit vmexit; 1608 uint64_t rax, cr0, cr3, cr4, dr7, rsp, rip, rflags, efer, pat; 1609 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2]; 1610 struct vmctx *ctx; 1611 cpuset_t cpus; 1612 bool cpu_intel; 1613 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 1614 struct tm tm; 1615 struct option *opts; 1616 1617 cpu_intel = cpu_vendor_intel(); 1618 opts = setup_options(cpu_intel); 1619 1620 vcpu = 0; 1621 vmname = NULL; 1622 assert_lapic_lvt = -1; 1623 progname = basename(argv[0]); 1624 1625 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) { 1626 switch (ch) { 1627 case 0: 1628 break; 1629 case VMNAME: 1630 vmname = optarg; 1631 break; 1632 case VCPU: 1633 vcpu = atoi(optarg); 1634 break; 1635 case SET_MEM: 1636 memsize = atoi(optarg) * MB; 1637 memsize = roundup(memsize, 2 * MB); 1638 break; 1639 case SET_EFER: 1640 efer = strtoul(optarg, NULL, 0); 1641 set_efer = 1; 1642 break; 1643 case SET_CR0: 1644 cr0 = strtoul(optarg, NULL, 0); 1645 set_cr0 = 1; 1646 break; 1647 case SET_CR3: 1648 cr3 = strtoul(optarg, NULL, 0); 1649 set_cr3 = 1; 1650 break; 1651 case SET_CR4: 1652 cr4 = strtoul(optarg, NULL, 0); 1653 set_cr4 = 1; 1654 break; 1655 case SET_DR7: 1656 dr7 = strtoul(optarg, NULL, 0); 1657 set_dr7 = 1; 1658 break; 1659 case SET_RSP: 1660 rsp = strtoul(optarg, NULL, 0); 1661 set_rsp = 1; 1662 break; 1663 case SET_RIP: 1664 rip = strtoul(optarg, NULL, 0); 1665 set_rip = 1; 1666 break; 1667 case SET_RAX: 1668 rax = strtoul(optarg, NULL, 0); 1669 set_rax = 1; 1670 break; 1671 case SET_RFLAGS: 1672 rflags = strtoul(optarg, NULL, 0); 1673 set_rflags = 1; 1674 break; 1675 case DESC_BASE: 1676 desc_base = strtoul(optarg, NULL, 0); 1677 break; 1678 case DESC_LIMIT: 1679 desc_limit = strtoul(optarg, NULL, 0); 1680 break; 1681 case DESC_ACCESS: 1682 desc_access = strtoul(optarg, NULL, 0); 1683 break; 1684 case SET_CS: 1685 cs = strtoul(optarg, NULL, 0); 1686 set_cs = 1; 1687 break; 1688 case SET_DS: 1689 ds = strtoul(optarg, NULL, 0); 1690 set_ds = 1; 1691 break; 1692 case SET_ES: 1693 es = strtoul(optarg, NULL, 0); 1694 set_es = 1; 1695 break; 1696 case SET_FS: 1697 fs = strtoul(optarg, NULL, 0); 1698 set_fs = 1; 1699 break; 1700 case SET_GS: 1701 gs = strtoul(optarg, NULL, 0); 1702 set_gs = 1; 1703 break; 1704 case SET_SS: 1705 ss = strtoul(optarg, NULL, 0); 1706 set_ss = 1; 1707 break; 1708 case SET_TR: 1709 tr = strtoul(optarg, NULL, 0); 1710 set_tr = 1; 1711 break; 1712 case SET_LDTR: 1713 ldtr = strtoul(optarg, NULL, 0); 1714 set_ldtr = 1; 1715 break; 1716 case SET_X2APIC_STATE: 1717 x2apic_state = strtol(optarg, NULL, 0); 1718 set_x2apic_state = 1; 1719 break; 1720 case SET_EXCEPTION_BITMAP: 1721 exception_bitmap = strtoul(optarg, NULL, 0); 1722 set_exception_bitmap = 1; 1723 break; 1724 case SET_VMCS_ENTRY_INTERRUPTION_INFO: 1725 vmcs_entry_interruption_info = strtoul(optarg, NULL, 0); 1726 set_vmcs_entry_interruption_info = 1; 1727 break; 1728 case SET_CAP: 1729 capval = strtoul(optarg, NULL, 0); 1730 setcap = 1; 1731 break; 1732 case SET_RTC_TIME: 1733 rtc_secs = strtoul(optarg, NULL, 0); 1734 set_rtc_time = 1; 1735 break; 1736 case SET_RTC_NVRAM: 1737 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0); 1738 set_rtc_nvram = 1; 1739 break; 1740 case RTC_NVRAM_OFFSET: 1741 rtc_nvram_offset = strtoul(optarg, NULL, 0); 1742 break; 1743 case GET_GPA_PMAP: 1744 gpa_pmap = strtoul(optarg, NULL, 0); 1745 get_gpa_pmap = 1; 1746 break; 1747 case CAPNAME: 1748 capname = optarg; 1749 break; 1750 case UNASSIGN_PPTDEV: 1751 unassign_pptdev = 1; 1752 if (sscanf(optarg, "%d/%d/%d", &bus, &slot, &func) != 3) 1753 usage(cpu_intel); 1754 break; 1755 case ASSERT_LAPIC_LVT: 1756 assert_lapic_lvt = atoi(optarg); 1757 break; 1758 default: 1759 usage(cpu_intel); 1760 } 1761 } 1762 argc -= optind; 1763 argv += optind; 1764 1765 if (vmname == NULL) 1766 usage(cpu_intel); 1767 1768 error = 0; 1769 1770 if (!error && create) 1771 error = vm_create(vmname); 1772 1773 if (!error) { 1774 ctx = vm_open(vmname); 1775 if (ctx == NULL) { 1776 printf("VM:%s is not created.\n", vmname); 1777 exit (1); 1778 } 1779 } 1780 1781 if (!error && memsize) 1782 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL); 1783 1784 if (!error && set_efer) 1785 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer); 1786 1787 if (!error && set_cr0) 1788 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0); 1789 1790 if (!error && set_cr3) 1791 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3); 1792 1793 if (!error && set_cr4) 1794 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4); 1795 1796 if (!error && set_dr7) 1797 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7); 1798 1799 if (!error && set_rsp) 1800 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp); 1801 1802 if (!error && set_rip) 1803 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip); 1804 1805 if (!error && set_rax) 1806 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax); 1807 1808 if (!error && set_rflags) { 1809 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 1810 rflags); 1811 } 1812 1813 if (!error && set_desc_ds) { 1814 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS, 1815 desc_base, desc_limit, desc_access); 1816 } 1817 1818 if (!error && set_desc_es) { 1819 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES, 1820 desc_base, desc_limit, desc_access); 1821 } 1822 1823 if (!error && set_desc_ss) { 1824 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS, 1825 desc_base, desc_limit, desc_access); 1826 } 1827 1828 if (!error && set_desc_cs) { 1829 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS, 1830 desc_base, desc_limit, desc_access); 1831 } 1832 1833 if (!error && set_desc_fs) { 1834 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS, 1835 desc_base, desc_limit, desc_access); 1836 } 1837 1838 if (!error && set_desc_gs) { 1839 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS, 1840 desc_base, desc_limit, desc_access); 1841 } 1842 1843 if (!error && set_desc_tr) { 1844 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR, 1845 desc_base, desc_limit, desc_access); 1846 } 1847 1848 if (!error && set_desc_ldtr) { 1849 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 1850 desc_base, desc_limit, desc_access); 1851 } 1852 1853 if (!error && set_desc_gdtr) { 1854 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 1855 desc_base, desc_limit, 0); 1856 } 1857 1858 if (!error && set_desc_idtr) { 1859 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 1860 desc_base, desc_limit, 0); 1861 } 1862 1863 if (!error && set_cs) 1864 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs); 1865 1866 if (!error && set_ds) 1867 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds); 1868 1869 if (!error && set_es) 1870 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es); 1871 1872 if (!error && set_fs) 1873 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs); 1874 1875 if (!error && set_gs) 1876 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs); 1877 1878 if (!error && set_ss) 1879 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss); 1880 1881 if (!error && set_tr) 1882 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr); 1883 1884 if (!error && set_ldtr) 1885 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr); 1886 1887 if (!error && set_x2apic_state) 1888 error = vm_set_x2apic_state(ctx, vcpu, x2apic_state); 1889 1890 if (!error && unassign_pptdev) 1891 error = vm_unassign_pptdev(ctx, bus, slot, func); 1892 1893 if (!error && set_exception_bitmap) { 1894 if (cpu_intel) 1895 error = vm_set_vmcs_field(ctx, vcpu, 1896 VMCS_EXCEPTION_BITMAP, 1897 exception_bitmap); 1898 else 1899 error = vm_set_vmcb_field(ctx, vcpu, 1900 VMCB_OFF_EXC_INTERCEPT, 1901 4, exception_bitmap); 1902 } 1903 1904 if (!error && cpu_intel && set_vmcs_entry_interruption_info) { 1905 error = vm_set_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO, 1906 vmcs_entry_interruption_info); 1907 } 1908 1909 if (!error && inject_nmi) { 1910 error = vm_inject_nmi(ctx, vcpu); 1911 } 1912 1913 if (!error && assert_lapic_lvt != -1) { 1914 error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt); 1915 } 1916 1917 if (!error && (get_memseg || get_all)) 1918 error = show_memseg(ctx); 1919 1920 if (!error && (get_memmap || get_all)) 1921 error = show_memmap(ctx); 1922 1923 if (!error) 1924 error = get_all_registers(ctx, vcpu); 1925 1926 if (!error) 1927 error = get_all_segments(ctx, vcpu); 1928 1929 if (!error) { 1930 if (cpu_intel) 1931 error = get_misc_vmcs(ctx, vcpu); 1932 else 1933 error = get_misc_vmcb(ctx, vcpu); 1934 } 1935 1936 if (!error && (get_x2apic_state || get_all)) { 1937 error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state); 1938 if (error == 0) 1939 printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state); 1940 } 1941 1942 if (!error && (get_eptp || get_all)) { 1943 if (cpu_intel) 1944 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp); 1945 else 1946 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE, 1947 8, &eptp); 1948 if (error == 0) 1949 printf("%s[%d]\t\t0x%016lx\n", 1950 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp); 1951 } 1952 1953 if (!error && (get_exception_bitmap || get_all)) { 1954 if(cpu_intel) 1955 error = vm_get_vmcs_field(ctx, vcpu, 1956 VMCS_EXCEPTION_BITMAP, &bm); 1957 else 1958 error = vm_get_vmcb_field(ctx, vcpu, 1959 VMCB_OFF_EXC_INTERCEPT, 1960 4, &bm); 1961 if (error == 0) 1962 printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm); 1963 } 1964 1965 if (!error && (get_io_bitmap || get_all)) { 1966 if (cpu_intel) { 1967 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A, 1968 &bm); 1969 if (error == 0) 1970 printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm); 1971 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B, 1972 &bm); 1973 if (error == 0) 1974 printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm); 1975 } else { 1976 error = vm_get_vmcb_field(ctx, vcpu, 1977 VMCB_OFF_IO_PERM, 8, &bm); 1978 if (error == 0) 1979 printf("io_bitmap[%d]\t%#lx\n", vcpu, bm); 1980 } 1981 } 1982 1983 if (!error && (get_tsc_offset || get_all)) { 1984 uint64_t tscoff; 1985 if (cpu_intel) 1986 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET, 1987 &tscoff); 1988 else 1989 error = vm_get_vmcb_field(ctx, vcpu, 1990 VMCB_OFF_TSC_OFFSET, 1991 8, &tscoff); 1992 if (error == 0) 1993 printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff); 1994 } 1995 1996 if (!error && (get_msr_bitmap_address || get_all)) { 1997 if (cpu_intel) 1998 error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP, 1999 &addr); 2000 else 2001 error = vm_get_vmcb_field(ctx, vcpu, 2002 VMCB_OFF_MSR_PERM, 8, &addr); 2003 if (error == 0) 2004 printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr); 2005 } 2006 2007 if (!error && (get_msr_bitmap || get_all)) { 2008 if (cpu_intel) { 2009 error = vm_get_vmcs_field(ctx, vcpu, 2010 VMCS_MSR_BITMAP, &addr); 2011 } else { 2012 error = vm_get_vmcb_field(ctx, vcpu, 2013 VMCB_OFF_MSR_PERM, 8, 2014 &addr); 2015 } 2016 2017 if (error == 0) 2018 error = dump_msr_bitmap(vcpu, addr, cpu_intel); 2019 } 2020 2021 if (!error && (get_vpid_asid || get_all)) { 2022 uint64_t vpid; 2023 if (cpu_intel) 2024 error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid); 2025 else 2026 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID, 2027 4, &vpid); 2028 if (error == 0) 2029 printf("%s[%d]\t\t0x%04lx\n", 2030 cpu_intel ? "vpid" : "asid", vcpu, vpid); 2031 } 2032 2033 if (!error && (get_guest_pat || get_all)) { 2034 if (cpu_intel) 2035 error = vm_get_vmcs_field(ctx, vcpu, 2036 VMCS_GUEST_IA32_PAT, &pat); 2037 else 2038 error = vm_get_vmcb_field(ctx, vcpu, 2039 VMCB_OFF_GUEST_PAT, 8, &pat); 2040 if (error == 0) 2041 printf("guest_pat[%d]\t\t0x%016lx\n", vcpu, pat); 2042 } 2043 2044 if (!error && (get_guest_sysenter || get_all)) { 2045 if (cpu_intel) 2046 error = vm_get_vmcs_field(ctx, vcpu, 2047 VMCS_GUEST_IA32_SYSENTER_CS, 2048 &cs); 2049 else 2050 error = vm_get_vmcb_field(ctx, vcpu, 2051 VMCB_OFF_SYSENTER_CS, 8, 2052 &cs); 2053 2054 if (error == 0) 2055 printf("guest_sysenter_cs[%d]\t%#lx\n", vcpu, cs); 2056 if (cpu_intel) 2057 error = vm_get_vmcs_field(ctx, vcpu, 2058 VMCS_GUEST_IA32_SYSENTER_ESP, 2059 &rsp); 2060 else 2061 error = vm_get_vmcb_field(ctx, vcpu, 2062 VMCB_OFF_SYSENTER_ESP, 8, 2063 &rsp); 2064 2065 if (error == 0) 2066 printf("guest_sysenter_sp[%d]\t%#lx\n", vcpu, rsp); 2067 if (cpu_intel) 2068 error = vm_get_vmcs_field(ctx, vcpu, 2069 VMCS_GUEST_IA32_SYSENTER_EIP, 2070 &rip); 2071 else 2072 error = vm_get_vmcb_field(ctx, vcpu, 2073 VMCB_OFF_SYSENTER_EIP, 8, 2074 &rip); 2075 if (error == 0) 2076 printf("guest_sysenter_ip[%d]\t%#lx\n", vcpu, rip); 2077 } 2078 2079 if (!error && (get_exit_reason || get_all)) { 2080 if (cpu_intel) 2081 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON, 2082 &u64); 2083 else 2084 error = vm_get_vmcb_field(ctx, vcpu, 2085 VMCB_OFF_EXIT_REASON, 8, 2086 &u64); 2087 if (error == 0) 2088 printf("exit_reason[%d]\t%#lx\n", vcpu, u64); 2089 } 2090 2091 if (!error && setcap) { 2092 int captype; 2093 captype = vm_capability_name2type(capname); 2094 error = vm_set_capability(ctx, vcpu, captype, capval); 2095 if (error != 0 && errno == ENOENT) 2096 printf("Capability \"%s\" is not available\n", capname); 2097 } 2098 2099 if (!error && get_gpa_pmap) { 2100 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum); 2101 if (error == 0) { 2102 printf("gpa %#lx:", gpa_pmap); 2103 pte = &pteval[0]; 2104 while (ptenum-- > 0) 2105 printf(" %#lx", *pte++); 2106 printf("\n"); 2107 } 2108 } 2109 2110 if (!error && set_rtc_nvram) 2111 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value); 2112 2113 if (!error && (get_rtc_nvram || get_all)) { 2114 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value); 2115 if (error == 0) { 2116 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset, 2117 rtc_nvram_value); 2118 } 2119 } 2120 2121 if (!error && set_rtc_time) 2122 error = vm_rtc_settime(ctx, rtc_secs); 2123 2124 if (!error && (get_rtc_time || get_all)) { 2125 error = vm_rtc_gettime(ctx, &rtc_secs); 2126 if (error == 0) { 2127 gmtime_r(&rtc_secs, &tm); 2128 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n", 2129 rtc_secs, wday_str(tm.tm_wday), mon_str(tm.tm_mon), 2130 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec, 2131 1900 + tm.tm_year); 2132 } 2133 } 2134 2135 if (!error && (getcap || get_all)) { 2136 int captype, val, getcaptype; 2137 2138 if (getcap && capname) 2139 getcaptype = vm_capability_name2type(capname); 2140 else 2141 getcaptype = -1; 2142 2143 for (captype = 0; captype < VM_CAP_MAX; captype++) { 2144 if (getcaptype >= 0 && captype != getcaptype) 2145 continue; 2146 error = vm_get_capability(ctx, vcpu, captype, &val); 2147 if (error == 0) { 2148 printf("Capability \"%s\" is %s on vcpu %d\n", 2149 vm_capability_type2name(captype), 2150 val ? "set" : "not set", vcpu); 2151 } else if (errno == ENOENT) { 2152 error = 0; 2153 printf("Capability \"%s\" is not available\n", 2154 vm_capability_type2name(captype)); 2155 } else { 2156 break; 2157 } 2158 } 2159 } 2160 2161 if (!error && (get_active_cpus || get_all)) { 2162 error = vm_active_cpus(ctx, &cpus); 2163 if (!error) 2164 print_cpus("active cpus", &cpus); 2165 } 2166 2167 if (!error && (get_suspended_cpus || get_all)) { 2168 error = vm_suspended_cpus(ctx, &cpus); 2169 if (!error) 2170 print_cpus("suspended cpus", &cpus); 2171 } 2172 2173 if (!error && (get_intinfo || get_all)) { 2174 error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]); 2175 if (!error) { 2176 print_intinfo("pending", info[0]); 2177 print_intinfo("current", info[1]); 2178 } 2179 } 2180 2181 if (!error && (get_stats || get_all)) { 2182 int i, num_stats; 2183 uint64_t *stats; 2184 struct timeval tv; 2185 const char *desc; 2186 2187 stats = vm_get_stats(ctx, vcpu, &tv, &num_stats); 2188 if (stats != NULL) { 2189 printf("vcpu%d stats:\n", vcpu); 2190 for (i = 0; i < num_stats; i++) { 2191 desc = vm_get_stat_desc(ctx, i); 2192 printf("%-40s\t%ld\n", desc, stats[i]); 2193 } 2194 } 2195 } 2196 2197 if (!error && run) { 2198 error = vm_run(ctx, vcpu, &vmexit); 2199 if (error == 0) 2200 dump_vm_run_exitcode(&vmexit, vcpu); 2201 else 2202 printf("vm_run error %d\n", error); 2203 } 2204 2205 if (!error && force_reset) 2206 error = vm_suspend(ctx, VM_SUSPEND_RESET); 2207 2208 if (!error && force_poweroff) 2209 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF); 2210 2211 if (error) 2212 printf("errno = %d\n", errno); 2213 2214 if (!error && destroy) 2215 vm_destroy(ctx); 2216 2217 free (opts); 2218 exit(error); 2219 } 2220