xref: /freebsd/usr.sbin/bhyve/virtio.h (revision fd45b686f9d92f583366c75b22c04c7ee49709c0)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013  Chris Torek <torek @ torek net>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef	_BHYVE_VIRTIO_H_
30 #define	_BHYVE_VIRTIO_H_
31 
32 #include <machine/atomic.h>
33 
34 #include <dev/virtio/virtio.h>
35 #include <dev/virtio/virtio_ring.h>
36 #include <dev/virtio/pci/virtio_pci_var.h>
37 
38 /*
39  * These are derived from several virtio specifications.
40  *
41  * Some useful links:
42  *    https://github.com/rustyrussell/virtio-spec
43  *    http://people.redhat.com/pbonzini/virtio-spec.pdf
44  */
45 
46 /*
47  * A virtual device has zero or more "virtual queues" (virtqueue).
48  * Each virtqueue uses at least two 4096-byte pages, laid out thus:
49  *
50  *      +-----------------------------------------------+
51  *      |    "desc":  <N> descriptors, 16 bytes each    |
52  *      |   -----------------------------------------   |
53  *      |   "avail":   2 uint16; <N> uint16; 1 uint16   |
54  *      |   -----------------------------------------   |
55  *      |              pad to 4k boundary               |
56  *      +-----------------------------------------------+
57  *      |   "used": 2 x uint16; <N> elems; 1 uint16     |
58  *      |   -----------------------------------------   |
59  *      |              pad to 4k boundary               |
60  *      +-----------------------------------------------+
61  *
62  * The number <N> that appears here is always a power of two and is
63  * limited to no more than 32768 (as it must fit in a 16-bit field).
64  * If <N> is sufficiently large, the above will occupy more than
65  * two pages.  In any case, all pages must be physically contiguous
66  * within the guest's physical address space.
67  *
68  * The <N> 16-byte "desc" descriptors consist of a 64-bit guest
69  * physical address <addr>, a 32-bit length <len>, a 16-bit
70  * <flags>, and a 16-bit <next> field (all in guest byte order).
71  *
72  * There are three flags that may be set :
73  *	NEXT    descriptor is chained, so use its "next" field
74  *	WRITE   descriptor is for host to write into guest RAM
75  *		(else host is to read from guest RAM)
76  *	INDIRECT   descriptor address field is (guest physical)
77  *		address of a linear array of descriptors
78  *
79  * Unless INDIRECT is set, <len> is the number of bytes that may
80  * be read/written from guest physical address <addr>.  If
81  * INDIRECT is set, WRITE is ignored and <len> provides the length
82  * of the indirect descriptors (and <len> must be a multiple of
83  * 16).  Note that NEXT may still be set in the main descriptor
84  * pointing to the indirect, and should be set in each indirect
85  * descriptor that uses the next descriptor (these should generally
86  * be numbered sequentially).  However, INDIRECT must not be set
87  * in the indirect descriptors.  Upon reaching an indirect descriptor
88  * without a NEXT bit, control returns to the direct descriptors.
89  *
90  * Except inside an indirect, each <next> value must be in the
91  * range [0 .. N) (i.e., the half-open interval).  (Inside an
92  * indirect, each <next> must be in the range [0 .. <len>/16).)
93  *
94  * The "avail" data structures reside in the same pages as the
95  * "desc" structures since both together are used by the device to
96  * pass information to the hypervisor's virtual driver.  These
97  * begin with a 16-bit <flags> field and 16-bit index <idx>, then
98  * have <N> 16-bit <ring> values, followed by one final 16-bit
99  * field <used_event>.  The <N> <ring> entries are simply indices
100  * indices into the descriptor ring (and thus must meet the same
101  * constraints as each <next> value).  However, <idx> is counted
102  * up from 0 (initially) and simply wraps around after 65535; it
103  * is taken mod <N> to find the next available entry.
104  *
105  * The "used" ring occupies a separate page or pages, and contains
106  * values written from the virtual driver back to the guest OS.
107  * This begins with a 16-bit <flags> and 16-bit <idx>, then there
108  * are <N> "vring_used" elements, followed by a 16-bit <avail_event>.
109  * The <N> "vring_used" elements consist of a 32-bit <id> and a
110  * 32-bit <len> (vu_tlen below).  The <id> is simply the index of
111  * the head of a descriptor chain the guest made available
112  * earlier, and the <len> is the number of bytes actually written,
113  * e.g., in the case of a network driver that provided a large
114  * receive buffer but received only a small amount of data.
115  *
116  * The two event fields, <used_event> and <avail_event>, in the
117  * avail and used rings (respectively -- note the reversal!), are
118  * always provided, but are used only if the virtual device
119  * negotiates the VIRTIO_RING_F_EVENT_IDX feature during feature
120  * negotiation.  Similarly, both rings provide a flag --
121  * VRING_AVAIL_F_NO_INTERRUPT and VRING_USED_F_NO_NOTIFY -- in
122  * their <flags> field, indicating that the guest does not need an
123  * interrupt, or that the hypervisor driver does not need a
124  * notify, when descriptors are added to the corresponding ring.
125  * (These are provided only for interrupt optimization and need
126  * not be implemented.)
127  */
128 #define VRING_ALIGN	4096
129 
130 /*
131  * The address of any given virtual queue is determined by a single
132  * Page Frame Number register.  The guest writes the PFN into the
133  * PCI config space.  However, a device that has two or more
134  * virtqueues can have a different PFN, and size, for each queue.
135  * The number of queues is determinable via the PCI config space
136  * VTCFG_R_QSEL register.  Writes to QSEL select the queue: 0 means
137  * queue #0, 1 means queue#1, etc.  Once a queue is selected, the
138  * remaining PFN and QNUM registers refer to that queue.
139  *
140  * QNUM is a read-only register containing a nonzero power of two
141  * that indicates the (hypervisor's) queue size.  Or, if reading it
142  * produces zero, the hypervisor does not have a corresponding
143  * queue.  (The number of possible queues depends on the virtual
144  * device.  The block device has just one; the network device
145  * provides either two -- 0 = receive, 1 = transmit -- or three,
146  * with 2 = control.)
147  *
148  * PFN is a read/write register giving the physical page address of
149  * the virtqueue in guest memory (the guest must allocate enough space
150  * based on the hypervisor's provided QNUM).
151  *
152  * QNOTIFY is effectively write-only: when the guest writes a queue
153  * number to the register, the hypervisor should scan the specified
154  * virtqueue. (Reading QNOTIFY currently always gets 0).
155  */
156 
157 /*
158  * PFN register shift amount
159  */
160 #define	VRING_PFN		12
161 
162 /*
163  * PCI vendor/device IDs
164  */
165 #define	VIRTIO_VENDOR		0x1AF4
166 #define	VIRTIO_DEV_NET		0x1000
167 #define	VIRTIO_DEV_BLOCK	0x1001
168 #define	VIRTIO_DEV_CONSOLE	0x1003
169 #define	VIRTIO_DEV_SCSI		0x1004
170 #define	VIRTIO_DEV_RANDOM	0x1005
171 #define	VIRTIO_DEV_9P		0x1009
172 #define VIRTIO_DEV_INPUT	0x1052
173 
174 /*
175  * PCI revision IDs
176  */
177 #define VIRTIO_REV_INPUT	1
178 
179 /*
180  * PCI subvendor IDs
181  */
182 #define VIRTIO_SUBVEN_INPUT	0x108E
183 
184 /*
185  * PCI subdevice IDs
186  */
187 #define VIRTIO_SUBDEV_INPUT	0x1100
188 
189 /* From section 2.3, "Virtqueue Configuration", of the virtio specification */
190 static inline int
191 vring_size_aligned(u_int qsz)
192 {
193 	return (roundup2(vring_size(qsz, VRING_ALIGN), VRING_ALIGN));
194 }
195 
196 struct pci_devinst;
197 struct vqueue_info;
198 struct vm_snapshot_meta;
199 
200 /*
201  * A virtual device, with some number (possibly 0) of virtual
202  * queues and some size (possibly 0) of configuration-space
203  * registers private to the device.  The virtio_softc should come
204  * at the front of each "derived class", so that a pointer to the
205  * virtio_softc is also a pointer to the more specific, derived-
206  * from-virtio driver's softc.
207  *
208  * Note: inside each hypervisor virtio driver, changes to these
209  * data structures must be locked against other threads, if any.
210  * Except for PCI config space register read/write, we assume each
211  * driver does the required locking, but we need a pointer to the
212  * lock (if there is one) for PCI config space read/write ops.
213  *
214  * When the guest reads or writes the device's config space, the
215  * generic layer checks for operations on the special registers
216  * described above.  If the offset of the register(s) being read
217  * or written is past the CFG area (CFG0 or CFG1), the request is
218  * passed on to the virtual device, after subtracting off the
219  * generic-layer size.  (So, drivers can just use the offset as
220  * an offset into "struct config", for instance.)
221  *
222  * (The virtio layer also makes sure that the read or write is to/
223  * from a "good" config offset, hence vc_cfgsize, and on BAR #0.
224  * However, the driver must verify the read or write size and offset
225  * and that no one is writing a readonly register.)
226  *
227  * The BROKED flag ("this thing done gone and broked") is for future
228  * use.
229  */
230 #define	VIRTIO_USE_MSIX		0x01
231 #define	VIRTIO_EVENT_IDX	0x02	/* use the event-index values */
232 #define	VIRTIO_BROKED		0x08	/* ??? */
233 
234 struct virtio_softc {
235 	struct virtio_consts *vs_vc;	/* constants (see below) */
236 	int	vs_flags;		/* VIRTIO_* flags from above */
237 	pthread_mutex_t *vs_mtx;	/* POSIX mutex, if any */
238 	struct pci_devinst *vs_pi;	/* PCI device instance */
239 	uint32_t vs_negotiated_caps;	/* negotiated capabilities */
240 	struct vqueue_info *vs_queues;	/* one per vc_nvq */
241 	int	vs_curq;		/* current queue */
242 	uint8_t	vs_status;		/* value from last status write */
243 	uint8_t	vs_isr;			/* ISR flags, if not MSI-X */
244 	uint16_t vs_msix_cfg_idx;	/* MSI-X vector for config event */
245 };
246 
247 #define	VS_LOCK(vs)							\
248 do {									\
249 	if (vs->vs_mtx)							\
250 		pthread_mutex_lock(vs->vs_mtx);				\
251 } while (0)
252 
253 #define	VS_UNLOCK(vs)							\
254 do {									\
255 	if (vs->vs_mtx)							\
256 		pthread_mutex_unlock(vs->vs_mtx);			\
257 } while (0)
258 
259 struct virtio_consts {
260 	const char *vc_name;		/* name of driver (for diagnostics) */
261 	int	vc_nvq;			/* number of virtual queues */
262 	size_t	vc_cfgsize;		/* size of dev-specific config regs */
263 	void	(*vc_reset)(void *);	/* called on virtual device reset */
264 	void	(*vc_qnotify)(void *, struct vqueue_info *);
265 					/* called on QNOTIFY if no VQ notify */
266 	int	(*vc_cfgread)(void *, int, int, uint32_t *);
267 					/* called to read config regs */
268 	int	(*vc_cfgwrite)(void *, int, int, uint32_t);
269 					/* called to write config regs */
270 	void    (*vc_apply_features)(void *, uint64_t);
271 				/* called to apply negotiated features */
272 	uint64_t vc_hv_caps;		/* hypervisor-provided capabilities */
273 	void	(*vc_pause)(void *);	/* called to pause device activity */
274 	void	(*vc_resume)(void *);	/* called to resume device activity */
275 	int	(*vc_snapshot)(void *, struct vm_snapshot_meta *);
276 				/* called to save / restore device state */
277 };
278 
279 /*
280  * Data structure allocated (statically) per virtual queue.
281  *
282  * Drivers may change vq_qsize after a reset.  When the guest OS
283  * requests a device reset, the hypervisor first calls
284  * vs->vs_vc->vc_reset(); then the data structure below is
285  * reinitialized (for each virtqueue: vs->vs_vc->vc_nvq).
286  *
287  * The remaining fields should only be fussed-with by the generic
288  * code.
289  *
290  * Note: the addresses of vq_desc, vq_avail, and vq_used are all
291  * computable from each other, but it's a lot simpler if we just
292  * keep a pointer to each one.  The event indices are similarly
293  * (but more easily) computable, and this time we'll compute them:
294  * they're just XX_ring[N].
295  */
296 #define	VQ_ALLOC	0x01	/* set once we have a pfn */
297 #define	VQ_BROKED	0x02	/* ??? */
298 struct vqueue_info {
299 	uint16_t vq_qsize;	/* size of this queue (a power of 2) */
300 	void	(*vq_notify)(void *, struct vqueue_info *);
301 				/* called instead of vc_notify, if not NULL */
302 
303 	struct virtio_softc *vq_vs;	/* backpointer to softc */
304 	uint16_t vq_num;	/* we're the num'th queue in the softc */
305 
306 	uint16_t vq_flags;	/* flags (see above) */
307 	uint16_t vq_last_avail;	/* a recent value of vq_avail->idx */
308 	uint16_t vq_next_used;	/* index of the next used slot to be filled */
309 	uint16_t vq_save_used;	/* saved vq_used->idx; see vq_endchains */
310 	uint16_t vq_msix_idx;	/* MSI-X index, or VIRTIO_MSI_NO_VECTOR */
311 
312 	uint32_t vq_pfn;	/* PFN of virt queue (not shifted!) */
313 
314 	struct vring_desc *vq_desc;	/* descriptor array */
315 	struct vring_avail *vq_avail;	/* the "avail" ring */
316 	struct vring_used *vq_used;	/* the "used" ring */
317 
318 };
319 /* as noted above, these are sort of backwards, name-wise */
320 #define VQ_AVAIL_EVENT_IDX(vq) \
321 	(*(uint16_t *)&(vq)->vq_used->ring[(vq)->vq_qsize])
322 #define VQ_USED_EVENT_IDX(vq) \
323 	((vq)->vq_avail->ring[(vq)->vq_qsize])
324 
325 /*
326  * Is this ring ready for I/O?
327  */
328 static inline int
329 vq_ring_ready(struct vqueue_info *vq)
330 {
331 
332 	return (vq->vq_flags & VQ_ALLOC);
333 }
334 
335 /*
336  * Are there "available" descriptors?  (This does not count
337  * how many, just returns True if there are some.)
338  */
339 static inline int
340 vq_has_descs(struct vqueue_info *vq)
341 {
342 
343 	return (vq_ring_ready(vq) && vq->vq_last_avail !=
344 	    vq->vq_avail->idx);
345 }
346 
347 /*
348  * Deliver an interrupt to the guest for a specific MSI-X queue or
349  * event.
350  */
351 static inline void
352 vi_interrupt(struct virtio_softc *vs, uint8_t isr, uint16_t msix_idx)
353 {
354 
355 	if (pci_msix_enabled(vs->vs_pi))
356 		pci_generate_msix(vs->vs_pi, msix_idx);
357 	else {
358 		VS_LOCK(vs);
359 		vs->vs_isr |= isr;
360 		pci_generate_msi(vs->vs_pi, 0);
361 #ifdef __amd64__
362 		pci_lintr_assert(vs->vs_pi);
363 #endif
364 		VS_UNLOCK(vs);
365 	}
366 }
367 
368 /*
369  * Deliver an interrupt to the guest on the given virtual queue (if
370  * possible, or a generic MSI interrupt if not using MSI-X).
371  */
372 static inline void
373 vq_interrupt(struct virtio_softc *vs, struct vqueue_info *vq)
374 {
375 
376 	vi_interrupt(vs, VIRTIO_PCI_ISR_INTR, vq->vq_msix_idx);
377 }
378 
379 static inline void
380 vq_kick_enable(struct vqueue_info *vq)
381 {
382 
383 	vq->vq_used->flags &= ~VRING_USED_F_NO_NOTIFY;
384 	/*
385 	 * Full memory barrier to make sure the store to vq_used->flags
386 	 * happens before the load from vq_avail->idx, which results from a
387 	 * subsequent call to vq_has_descs().
388 	 */
389 	atomic_thread_fence_seq_cst();
390 }
391 
392 static inline void
393 vq_kick_disable(struct vqueue_info *vq)
394 {
395 
396 	vq->vq_used->flags |= VRING_USED_F_NO_NOTIFY;
397 }
398 
399 struct iovec;
400 
401 /*
402  * Request description returned by vq_getchain.
403  *
404  * Writable iovecs start at iov[req.readable].
405  */
406 struct vi_req {
407 	int readable;		/* num of readable iovecs */
408 	int writable;		/* num of writable iovecs */
409 	unsigned int idx;	/* ring index */
410 };
411 
412 void	vi_softc_linkup(struct virtio_softc *vs, struct virtio_consts *vc,
413 			void *dev_softc, struct pci_devinst *pi,
414 			struct vqueue_info *queues);
415 int	vi_intr_init(struct virtio_softc *vs, int barnum, int use_msix);
416 void	vi_reset_dev(struct virtio_softc *);
417 void	vi_set_io_bar(struct virtio_softc *, int);
418 
419 int	vq_getchain(struct vqueue_info *vq, struct iovec *iov, int niov,
420 	    struct vi_req *reqp);
421 void	vq_retchains(struct vqueue_info *vq, uint16_t n_chains);
422 void	vq_relchain_prepare(struct vqueue_info *vq, uint16_t idx,
423 			    uint32_t iolen);
424 void	vq_relchain_publish(struct vqueue_info *vq);
425 void	vq_relchain(struct vqueue_info *vq, uint16_t idx, uint32_t iolen);
426 void	vq_endchains(struct vqueue_info *vq, int used_all_avail);
427 
428 uint64_t vi_pci_read(struct pci_devinst *pi, int baridx, uint64_t offset,
429 	    int size);
430 void	vi_pci_write(struct pci_devinst *pi, int baridx, uint64_t offset,
431 	    int size, uint64_t value);
432 #ifdef BHYVE_SNAPSHOT
433 int	vi_pci_snapshot(struct vm_snapshot_meta *meta);
434 int	vi_pci_pause(struct pci_devinst *pi);
435 int	vi_pci_resume(struct pci_devinst *pi);
436 #endif
437 #endif	/* _BHYVE_VIRTIO_H_ */
438