1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/linker_set.h> 34 #include <sys/stat.h> 35 #include <sys/uio.h> 36 #include <sys/ioctl.h> 37 #include <sys/disk.h> 38 39 #include <errno.h> 40 #include <fcntl.h> 41 #include <stdio.h> 42 #include <stdlib.h> 43 #include <stdint.h> 44 #include <string.h> 45 #include <strings.h> 46 #include <unistd.h> 47 #include <assert.h> 48 #include <pthread.h> 49 50 #include "bhyverun.h" 51 #include "pci_emul.h" 52 #include "virtio.h" 53 54 #define VTBLK_RINGSZ 64 55 56 #define VTBLK_CFGSZ 28 57 58 #define VTBLK_R_CFG VTCFG_R_CFG1 59 #define VTBLK_R_CFG_END VTBLK_R_CFG + VTBLK_CFGSZ -1 60 #define VTBLK_R_MAX VTBLK_R_CFG_END 61 62 #define VTBLK_REGSZ VTBLK_R_MAX+1 63 64 #define VTBLK_MAXSEGS 32 65 66 #define VTBLK_S_OK 0 67 #define VTBLK_S_IOERR 1 68 69 /* 70 * Host capabilities 71 */ 72 #define VTBLK_S_HOSTCAPS \ 73 ( 0x00000004 | /* host maximum request segments */ \ 74 0x10000000 ) /* supports indirect descriptors */ 75 76 static int use_msix = 1; 77 78 struct vring_hqueue { 79 /* Internal state */ 80 uint16_t hq_size; 81 uint16_t hq_cur_aidx; /* trails behind 'avail_idx' */ 82 83 /* Host-context pointers to the queue */ 84 struct virtio_desc *hq_dtable; 85 uint16_t *hq_avail_flags; 86 uint16_t *hq_avail_idx; /* monotonically increasing */ 87 uint16_t *hq_avail_ring; 88 89 uint16_t *hq_used_flags; 90 uint16_t *hq_used_idx; /* monotonically increasing */ 91 struct virtio_used *hq_used_ring; 92 }; 93 94 /* 95 * Config space 96 */ 97 struct vtblk_config { 98 uint64_t vbc_capacity; 99 uint32_t vbc_size_max; 100 uint32_t vbc_seg_max; 101 uint16_t vbc_geom_c; 102 uint8_t vbc_geom_h; 103 uint8_t vbc_geom_s; 104 uint32_t vbc_blk_size; 105 uint32_t vbc_sectors_max; 106 } __packed; 107 CTASSERT(sizeof(struct vtblk_config) == VTBLK_CFGSZ); 108 109 /* 110 * Fixed-size block header 111 */ 112 struct virtio_blk_hdr { 113 #define VBH_OP_READ 0 114 #define VBH_OP_WRITE 1 115 #define VBH_FLAG_BARRIER 0x80000000 /* OR'ed into vbh_type */ 116 uint32_t vbh_type; 117 uint32_t vbh_ioprio; 118 uint64_t vbh_sector; 119 } __packed; 120 121 /* 122 * Debug printf 123 */ 124 static int pci_vtblk_debug; 125 #define DPRINTF(params) if (pci_vtblk_debug) printf params 126 #define WPRINTF(params) printf params 127 128 /* 129 * Per-device softc 130 */ 131 struct pci_vtblk_softc { 132 struct pci_devinst *vbsc_pi; 133 int vbsc_fd; 134 int vbsc_status; 135 int vbsc_isr; 136 int vbsc_lastq; 137 uint32_t vbsc_features; 138 uint64_t vbsc_pfn; 139 struct vring_hqueue vbsc_q; 140 struct vtblk_config vbsc_cfg; 141 uint16_t msix_table_idx_req; 142 uint16_t msix_table_idx_cfg; 143 }; 144 145 /* 146 * Return the size of IO BAR that maps virtio header and device specific 147 * region. The size would vary depending on whether MSI-X is enabled or 148 * not 149 */ 150 static uint64_t 151 pci_vtblk_iosize(struct pci_devinst *pi) 152 { 153 154 if (pci_msix_enabled(pi)) 155 return (VTBLK_REGSZ); 156 else 157 return (VTBLK_REGSZ - (VTCFG_R_CFG1 - VTCFG_R_MSIX)); 158 } 159 160 /* 161 * Return the number of available descriptors in the vring taking care 162 * of the 16-bit index wraparound. 163 */ 164 static int 165 hq_num_avail(struct vring_hqueue *hq) 166 { 167 int ndesc; 168 169 if (*hq->hq_avail_idx >= hq->hq_cur_aidx) 170 ndesc = *hq->hq_avail_idx - hq->hq_cur_aidx; 171 else 172 ndesc = UINT16_MAX - hq->hq_cur_aidx + *hq->hq_avail_idx + 1; 173 174 assert(ndesc >= 0 && ndesc <= hq->hq_size); 175 176 return (ndesc); 177 } 178 179 static void 180 pci_vtblk_update_status(struct pci_vtblk_softc *sc, uint32_t value) 181 { 182 if (value == 0) { 183 DPRINTF(("vtblk: device reset requested !\n")); 184 } 185 186 sc->vbsc_status = value; 187 } 188 189 static void 190 pci_vtblk_proc(struct pci_vtblk_softc *sc, struct vring_hqueue *hq) 191 { 192 struct iovec iov[VTBLK_MAXSEGS]; 193 struct virtio_blk_hdr *vbh; 194 struct virtio_desc *vd, *vid; 195 struct virtio_used *vu; 196 uint8_t *status; 197 int i; 198 int err; 199 int iolen; 200 int nsegs; 201 int uidx, aidx, didx; 202 int writeop, type; 203 off_t offset; 204 205 uidx = *hq->hq_used_idx; 206 aidx = hq->hq_cur_aidx; 207 didx = hq->hq_avail_ring[aidx % hq->hq_size]; 208 assert(didx >= 0 && didx < hq->hq_size); 209 210 vd = &hq->hq_dtable[didx]; 211 212 /* 213 * Verify that the descriptor is indirect, and obtain 214 * the pointer to the indirect descriptor. 215 * There has to be space for at least 3 descriptors 216 * in the indirect descriptor array: the block header, 217 * 1 or more data descriptors, and a status byte. 218 */ 219 assert(vd->vd_flags & VRING_DESC_F_INDIRECT); 220 221 nsegs = vd->vd_len / sizeof(struct virtio_desc); 222 assert(nsegs >= 3); 223 assert(nsegs < VTBLK_MAXSEGS + 2); 224 225 vid = paddr_guest2host(vd->vd_addr); 226 assert((vid->vd_flags & VRING_DESC_F_INDIRECT) == 0); 227 228 /* 229 * The first descriptor will be the read-only fixed header 230 */ 231 vbh = paddr_guest2host(vid[0].vd_addr); 232 assert(vid[0].vd_len == sizeof(struct virtio_blk_hdr)); 233 assert(vid[0].vd_flags & VRING_DESC_F_NEXT); 234 assert((vid[0].vd_flags & VRING_DESC_F_WRITE) == 0); 235 236 /* 237 * XXX 238 * The guest should not be setting the BARRIER flag because 239 * we don't advertise the capability. 240 */ 241 type = vbh->vbh_type & ~VBH_FLAG_BARRIER; 242 writeop = (type == VBH_OP_WRITE); 243 244 offset = vbh->vbh_sector * DEV_BSIZE; 245 246 /* 247 * Build up the iovec based on the guest's data descriptors 248 */ 249 for (i = 1, iolen = 0; i < nsegs - 1; i++) { 250 iov[i-1].iov_base = paddr_guest2host(vid[i].vd_addr); 251 iov[i-1].iov_len = vid[i].vd_len; 252 iolen += vid[i].vd_len; 253 254 assert(vid[i].vd_flags & VRING_DESC_F_NEXT); 255 assert((vid[i].vd_flags & VRING_DESC_F_INDIRECT) == 0); 256 257 /* 258 * - write op implies read-only descriptor, 259 * - read op implies write-only descriptor, 260 * therefore test the inverse of the descriptor bit 261 * to the op. 262 */ 263 assert(((vid[i].vd_flags & VRING_DESC_F_WRITE) == 0) == 264 writeop); 265 } 266 267 /* Lastly, get the address of the status byte */ 268 status = paddr_guest2host(vid[nsegs - 1].vd_addr); 269 assert(vid[nsegs - 1].vd_len == 1); 270 assert((vid[nsegs - 1].vd_flags & VRING_DESC_F_NEXT) == 0); 271 assert(vid[nsegs - 1].vd_flags & VRING_DESC_F_WRITE); 272 273 DPRINTF(("virtio-block: %s op, %d bytes, %d segs, offset %ld\n\r", 274 writeop ? "write" : "read", iolen, nsegs - 2, offset)); 275 276 if (writeop){ 277 err = pwritev(sc->vbsc_fd, iov, nsegs - 2, offset); 278 } else { 279 err = preadv(sc->vbsc_fd, iov, nsegs - 2, offset); 280 } 281 282 *status = err < 0 ? VTBLK_S_IOERR : VTBLK_S_OK; 283 284 /* 285 * Return the single indirect descriptor back to the host 286 */ 287 vu = &hq->hq_used_ring[uidx % hq->hq_size]; 288 vu->vu_idx = didx; 289 vu->vu_tlen = 1; 290 hq->hq_cur_aidx++; 291 *hq->hq_used_idx += 1; 292 } 293 294 static void 295 pci_vtblk_qnotify(struct pci_vtblk_softc *sc) 296 { 297 struct vring_hqueue *hq = &sc->vbsc_q; 298 int i; 299 int ndescs; 300 301 /* 302 * Calculate number of ring entries to process 303 */ 304 ndescs = hq_num_avail(hq); 305 306 if (ndescs == 0) 307 return; 308 309 /* 310 * Run through all the entries, placing them into iovecs and 311 * sending when an end-of-packet is found 312 */ 313 for (i = 0; i < ndescs; i++) 314 pci_vtblk_proc(sc, hq); 315 316 /* 317 * Generate an interrupt if able 318 */ 319 if ((*hq->hq_avail_flags & VRING_AVAIL_F_NO_INTERRUPT) == 0) { 320 if (use_msix) { 321 pci_generate_msix(sc->vbsc_pi, sc->msix_table_idx_req); 322 } else if (sc->vbsc_isr == 0) { 323 sc->vbsc_isr = 1; 324 pci_generate_msi(sc->vbsc_pi, 0); 325 } 326 } 327 328 } 329 330 static void 331 pci_vtblk_ring_init(struct pci_vtblk_softc *sc, uint64_t pfn) 332 { 333 struct vring_hqueue *hq; 334 335 sc->vbsc_pfn = pfn << VRING_PFN; 336 337 /* 338 * Set up host pointers to the various parts of the 339 * queue 340 */ 341 hq = &sc->vbsc_q; 342 hq->hq_size = VTBLK_RINGSZ; 343 344 hq->hq_dtable = paddr_guest2host(pfn << VRING_PFN); 345 hq->hq_avail_flags = (uint16_t *)(hq->hq_dtable + hq->hq_size); 346 hq->hq_avail_idx = hq->hq_avail_flags + 1; 347 hq->hq_avail_ring = hq->hq_avail_flags + 2; 348 hq->hq_used_flags = (uint16_t *)roundup2((uintptr_t)hq->hq_avail_ring, 349 VRING_ALIGN); 350 hq->hq_used_idx = hq->hq_used_flags + 1; 351 hq->hq_used_ring = (struct virtio_used *)(hq->hq_used_flags + 2); 352 353 /* 354 * Initialize queue indexes 355 */ 356 hq->hq_cur_aidx = 0; 357 } 358 359 static int 360 pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) 361 { 362 struct stat sbuf; 363 struct pci_vtblk_softc *sc; 364 off_t size; 365 int fd; 366 int sectsz; 367 const char *env_msi; 368 369 if (opts == NULL) { 370 printf("virtio-block: backing device required\n"); 371 return (1); 372 } 373 374 /* 375 * Access to guest memory is required. Fail if 376 * memory not mapped 377 */ 378 if (paddr_guest2host(0) == NULL) 379 return (1); 380 381 /* 382 * The supplied backing file has to exist 383 */ 384 fd = open(opts, O_RDWR); 385 if (fd < 0) { 386 perror("Could not open backing file"); 387 return (1); 388 } 389 390 if (fstat(fd, &sbuf) < 0) { 391 perror("Could not stat backing file"); 392 close(fd); 393 return (1); 394 } 395 396 /* 397 * Deal with raw devices 398 */ 399 size = sbuf.st_size; 400 sectsz = DEV_BSIZE; 401 if (S_ISCHR(sbuf.st_mode)) { 402 if (ioctl(fd, DIOCGMEDIASIZE, &size) < 0 || 403 ioctl(fd, DIOCGSECTORSIZE, §sz)) { 404 perror("Could not fetch dev blk/sector size"); 405 close(fd); 406 return (1); 407 } 408 assert(size != 0); 409 assert(sectsz != 0); 410 } 411 412 sc = malloc(sizeof(struct pci_vtblk_softc)); 413 memset(sc, 0, sizeof(struct pci_vtblk_softc)); 414 415 pi->pi_arg = sc; 416 sc->vbsc_pi = pi; 417 sc->vbsc_fd = fd; 418 419 /* setup virtio block config space */ 420 sc->vbsc_cfg.vbc_capacity = size / sectsz; 421 sc->vbsc_cfg.vbc_seg_max = VTBLK_MAXSEGS; 422 sc->vbsc_cfg.vbc_blk_size = sectsz; 423 sc->vbsc_cfg.vbc_size_max = 0; /* not negotiated */ 424 sc->vbsc_cfg.vbc_geom_c = 0; /* no geometry */ 425 sc->vbsc_cfg.vbc_geom_h = 0; 426 sc->vbsc_cfg.vbc_geom_s = 0; 427 sc->vbsc_cfg.vbc_sectors_max = 0; 428 429 /* initialize config space */ 430 pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_BLOCK); 431 pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR); 432 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE); 433 pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_BLOCK); 434 435 if ((env_msi = getenv("BHYVE_USE_MSI"))) { 436 if (strcasecmp(env_msi, "yes") == 0) 437 use_msix = 0; 438 } 439 440 if (use_msix) { 441 /* MSI-X Support */ 442 sc->msix_table_idx_req = VIRTIO_MSI_NO_VECTOR; 443 sc->msix_table_idx_cfg = VIRTIO_MSI_NO_VECTOR; 444 445 if (pci_emul_add_msixcap(pi, 2, 1)) 446 return (1); 447 } else { 448 /* MSI Support */ 449 pci_emul_add_msicap(pi, 1); 450 } 451 452 pci_emul_alloc_bar(pi, 0, PCIBAR_IO, VTBLK_REGSZ); 453 454 return (0); 455 } 456 457 static uint64_t 458 vtblk_adjust_offset(struct pci_devinst *pi, uint64_t offset) 459 { 460 /* 461 * Device specific offsets used by guest would change 462 * based on whether MSI-X capability is enabled or not 463 */ 464 if (!pci_msix_enabled(pi)) { 465 if (offset >= VTCFG_R_MSIX) 466 return (offset + (VTCFG_R_CFG1 - VTCFG_R_MSIX)); 467 } 468 469 return (offset); 470 } 471 472 static void 473 pci_vtblk_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 474 int baridx, uint64_t offset, int size, uint64_t value) 475 { 476 struct pci_vtblk_softc *sc = pi->pi_arg; 477 478 if (use_msix) { 479 if (baridx == pci_msix_table_bar(pi) || 480 baridx == pci_msix_pba_bar(pi)) { 481 pci_emul_msix_twrite(pi, offset, size, value); 482 return; 483 } 484 } 485 486 assert(baridx == 0); 487 488 if (offset + size > pci_vtblk_iosize(pi)) { 489 DPRINTF(("vtblk_write: 2big, offset %ld size %d\n", 490 offset, size)); 491 return; 492 } 493 494 offset = vtblk_adjust_offset(pi, offset); 495 496 switch (offset) { 497 case VTCFG_R_GUESTCAP: 498 assert(size == 4); 499 sc->vbsc_features = value & VTBLK_S_HOSTCAPS; 500 break; 501 case VTCFG_R_PFN: 502 assert(size == 4); 503 pci_vtblk_ring_init(sc, value); 504 break; 505 case VTCFG_R_QSEL: 506 assert(size == 2); 507 sc->vbsc_lastq = value; 508 break; 509 case VTCFG_R_QNOTIFY: 510 assert(size == 2); 511 assert(value == 0); 512 pci_vtblk_qnotify(sc); 513 break; 514 case VTCFG_R_STATUS: 515 assert(size == 1); 516 pci_vtblk_update_status(sc, value); 517 break; 518 case VTCFG_R_CFGVEC: 519 assert(size == 2); 520 sc->msix_table_idx_cfg = value; 521 break; 522 case VTCFG_R_QVEC: 523 assert(size == 2); 524 sc->msix_table_idx_req = value; 525 break; 526 case VTCFG_R_HOSTCAP: 527 case VTCFG_R_QNUM: 528 case VTCFG_R_ISR: 529 case VTBLK_R_CFG ... VTBLK_R_CFG_END: 530 DPRINTF(("vtblk: write to readonly reg %ld\n\r", offset)); 531 break; 532 default: 533 DPRINTF(("vtblk: unknown i/o write offset %ld\n\r", offset)); 534 value = 0; 535 break; 536 } 537 } 538 539 uint64_t 540 pci_vtblk_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 541 int baridx, uint64_t offset, int size) 542 { 543 struct pci_vtblk_softc *sc = pi->pi_arg; 544 void *ptr; 545 uint32_t value; 546 547 if (use_msix) { 548 if (baridx == pci_msix_table_bar(pi) || 549 baridx == pci_msix_pba_bar(pi)) { 550 return (pci_emul_msix_tread(pi, offset, size)); 551 } 552 } 553 554 assert(baridx == 0); 555 556 if (offset + size > pci_vtblk_iosize(pi)) { 557 DPRINTF(("vtblk_read: 2big, offset %ld size %d\n", 558 offset, size)); 559 return (0); 560 } 561 562 offset = vtblk_adjust_offset(pi, offset); 563 564 switch (offset) { 565 case VTCFG_R_HOSTCAP: 566 assert(size == 4); 567 value = VTBLK_S_HOSTCAPS; 568 break; 569 case VTCFG_R_GUESTCAP: 570 assert(size == 4); 571 value = sc->vbsc_features; /* XXX never read ? */ 572 break; 573 case VTCFG_R_PFN: 574 assert(size == 4); 575 value = sc->vbsc_pfn >> VRING_PFN; 576 break; 577 case VTCFG_R_QNUM: 578 value = (sc->vbsc_lastq == 0) ? VTBLK_RINGSZ: 0; 579 break; 580 case VTCFG_R_QSEL: 581 assert(size == 2); 582 value = sc->vbsc_lastq; /* XXX never read ? */ 583 break; 584 case VTCFG_R_QNOTIFY: 585 assert(size == 2); 586 value = 0; /* XXX never read ? */ 587 break; 588 case VTCFG_R_STATUS: 589 assert(size == 1); 590 value = sc->vbsc_status; 591 break; 592 case VTCFG_R_ISR: 593 assert(size == 1); 594 value = sc->vbsc_isr; 595 sc->vbsc_isr = 0; /* a read clears this flag */ 596 break; 597 case VTCFG_R_CFGVEC: 598 assert(size == 2); 599 value = sc->msix_table_idx_cfg; 600 break; 601 case VTCFG_R_QVEC: 602 assert(size == 2); 603 value = sc->msix_table_idx_req; 604 break; 605 case VTBLK_R_CFG ... VTBLK_R_CFG_END: 606 assert(size + offset <= (VTBLK_R_CFG_END + 1)); 607 ptr = (uint8_t *)&sc->vbsc_cfg + offset - VTBLK_R_CFG; 608 if (size == 1) { 609 value = *(uint8_t *) ptr; 610 } else if (size == 2) { 611 value = *(uint16_t *) ptr; 612 } else { 613 value = *(uint32_t *) ptr; 614 } 615 break; 616 default: 617 DPRINTF(("vtblk: unknown i/o read offset %ld\n\r", offset)); 618 value = 0; 619 break; 620 } 621 622 return (value); 623 } 624 625 struct pci_devemu pci_de_vblk = { 626 .pe_emu = "virtio-blk", 627 .pe_init = pci_vtblk_init, 628 .pe_barwrite = pci_vtblk_write, 629 .pe_barread = pci_vtblk_read 630 }; 631 PCI_EMUL_SET(pci_de_vblk); 632