xref: /freebsd/usr.sbin/bhyve/pci_fbuf.c (revision 732a02b4e77866604a120a275c082bb6221bd2ff)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2015 Nahanni Systems, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/types.h>
35 #include <sys/mman.h>
36 
37 #include <machine/vmm.h>
38 #include <vmmapi.h>
39 
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43 
44 #include <errno.h>
45 #include <unistd.h>
46 
47 #include "bhyvegc.h"
48 #include "bhyverun.h"
49 #include "debug.h"
50 #include "console.h"
51 #include "inout.h"
52 #include "pci_emul.h"
53 #include "rfb.h"
54 #include "vga.h"
55 
56 /*
57  * bhyve Framebuffer device emulation.
58  * BAR0 points to the current mode information.
59  * BAR1 is the 32-bit framebuffer address.
60  *
61  *  -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height
62  */
63 
64 static int fbuf_debug = 1;
65 #define	DEBUG_INFO	1
66 #define	DEBUG_VERBOSE	4
67 #define	DPRINTF(level, params)  if (level <= fbuf_debug) PRINTLN params
68 
69 
70 #define	KB	(1024UL)
71 #define	MB	(1024 * 1024UL)
72 
73 #define	DMEMSZ	128
74 
75 #define	FB_SIZE		(16*MB)
76 
77 #define COLS_MAX	1920
78 #define	ROWS_MAX	1200
79 
80 #define COLS_DEFAULT	1024
81 #define ROWS_DEFAULT	768
82 
83 #define COLS_MIN	640
84 #define ROWS_MIN	480
85 
86 struct pci_fbuf_softc {
87 	struct pci_devinst *fsc_pi;
88 	struct {
89 		uint32_t fbsize;
90 		uint16_t width;
91 		uint16_t height;
92 		uint16_t depth;
93 		uint16_t refreshrate;
94 		uint8_t  reserved[116];
95 	} __packed memregs;
96 
97 	/* rfb server */
98 	char      *rfb_host;
99 	char      *rfb_password;
100 	int       rfb_port;
101 	int       rfb_wait;
102 	int       vga_enabled;
103 	int	  vga_full;
104 
105 	uint32_t  fbaddr;
106 	char      *fb_base;
107 	uint16_t  gc_width;
108 	uint16_t  gc_height;
109 	void      *vgasc;
110 	struct bhyvegc_image *gc_image;
111 };
112 
113 static struct pci_fbuf_softc *fbuf_sc;
114 
115 #define	PCI_FBUF_MSI_MSGS	 4
116 
117 static void
118 pci_fbuf_usage(char *opt)
119 {
120 
121 	EPRINTLN("Invalid fbuf emulation option \"%s\"", opt);
122 	EPRINTLN("fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port"
123 	    "{,w=width}{,h=height}");
124 }
125 
126 static void
127 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
128 	       int baridx, uint64_t offset, int size, uint64_t value)
129 {
130 	struct pci_fbuf_softc *sc;
131 	uint8_t *p;
132 
133 	assert(baridx == 0);
134 
135 	sc = pi->pi_arg;
136 
137 	DPRINTF(DEBUG_VERBOSE,
138 	    ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx",
139 	    offset, size, value));
140 
141 	if (offset + size > DMEMSZ) {
142 		printf("fbuf: write too large, offset %ld size %d\n",
143 		       offset, size);
144 		return;
145 	}
146 
147 	p = (uint8_t *)&sc->memregs + offset;
148 
149 	switch (size) {
150 	case 1:
151 		*p = value;
152 		break;
153 	case 2:
154 		*(uint16_t *)p = value;
155 		break;
156 	case 4:
157 		*(uint32_t *)p = value;
158 		break;
159 	case 8:
160 		*(uint64_t *)p = value;
161 		break;
162 	default:
163 		printf("fbuf: write unknown size %d\n", size);
164 		break;
165 	}
166 
167 	if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
168 	    sc->memregs.height == 0) {
169 		DPRINTF(DEBUG_INFO, ("switching to VGA mode"));
170 		sc->gc_image->vgamode = 1;
171 		sc->gc_width = 0;
172 		sc->gc_height = 0;
173 	} else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
174 	    sc->memregs.height != 0) {
175 		DPRINTF(DEBUG_INFO, ("switching to VESA mode"));
176 		sc->gc_image->vgamode = 0;
177 	}
178 }
179 
180 uint64_t
181 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
182 	      int baridx, uint64_t offset, int size)
183 {
184 	struct pci_fbuf_softc *sc;
185 	uint8_t *p;
186 	uint64_t value;
187 
188 	assert(baridx == 0);
189 
190 	sc = pi->pi_arg;
191 
192 
193 	if (offset + size > DMEMSZ) {
194 		printf("fbuf: read too large, offset %ld size %d\n",
195 		       offset, size);
196 		return (0);
197 	}
198 
199 	p = (uint8_t *)&sc->memregs + offset;
200 	value = 0;
201 	switch (size) {
202 	case 1:
203 		value = *p;
204 		break;
205 	case 2:
206 		value = *(uint16_t *)p;
207 		break;
208 	case 4:
209 		value = *(uint32_t *)p;
210 		break;
211 	case 8:
212 		value = *(uint64_t *)p;
213 		break;
214 	default:
215 		printf("fbuf: read unknown size %d\n", size);
216 		break;
217 	}
218 
219 	DPRINTF(DEBUG_VERBOSE,
220 	    ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx",
221 	     offset, size, value));
222 
223 	return (value);
224 }
225 
226 static int
227 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts)
228 {
229 	char	*uopts, *uoptsbak, *xopts, *config;
230 	char	*tmpstr;
231 	int	ret;
232 
233 	ret = 0;
234 	uoptsbak = uopts = strdup(opts);
235 	while ((xopts = strsep(&uopts, ",")) != NULL) {
236 		if (strcmp(xopts, "wait") == 0) {
237 			sc->rfb_wait = 1;
238 			continue;
239 		}
240 
241 		if ((config = strchr(xopts, '=')) == NULL) {
242 			pci_fbuf_usage(xopts);
243 			ret = -1;
244 			goto done;
245 		}
246 
247 		*config++ = '\0';
248 
249 		DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s",
250 		   xopts, config));
251 
252 		if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) {
253 			/*
254 			 * IPv4 -- host-ip:port
255 			 * IPv6 -- [host-ip%zone]:port
256 			 * XXX for now port is mandatory.
257 			 */
258 			tmpstr = strsep(&config, "]");
259 			if (config) {
260 				if (tmpstr[0] == '[')
261 					tmpstr++;
262 				sc->rfb_host = strdup(tmpstr);
263 				if (config[0] == ':')
264 					config++;
265 				else {
266 					pci_fbuf_usage(xopts);
267 					ret = -1;
268 					goto done;
269 				}
270 				sc->rfb_port = atoi(config);
271 			} else {
272 				config = tmpstr;
273 				tmpstr = strsep(&config, ":");
274 				if (!config)
275 					sc->rfb_port = atoi(tmpstr);
276 				else {
277 					sc->rfb_port = atoi(config);
278 					sc->rfb_host = strdup(tmpstr);
279 				}
280 			}
281 	        } else if (!strcmp(xopts, "vga")) {
282 			if (!strcmp(config, "off")) {
283 				sc->vga_enabled = 0;
284 			} else if (!strcmp(config, "io")) {
285 				sc->vga_enabled = 1;
286 				sc->vga_full = 0;
287 			} else if (!strcmp(config, "on")) {
288 				sc->vga_enabled = 1;
289 				sc->vga_full = 1;
290 			} else {
291 				pci_fbuf_usage(xopts);
292 				ret = -1;
293 				goto done;
294 			}
295 	        } else if (!strcmp(xopts, "w")) {
296 		        sc->memregs.width = atoi(config);
297 			if (sc->memregs.width > COLS_MAX) {
298 				pci_fbuf_usage(xopts);
299 				ret = -1;
300 				goto done;
301 			} else if (sc->memregs.width == 0)
302 				sc->memregs.width = 1920;
303 		} else if (!strcmp(xopts, "h")) {
304 			sc->memregs.height = atoi(config);
305 			if (sc->memregs.height > ROWS_MAX) {
306 				pci_fbuf_usage(xopts);
307 				ret = -1;
308 				goto done;
309 			} else if (sc->memregs.height == 0)
310 				sc->memregs.height = 1080;
311 		} else if (!strcmp(xopts, "password")) {
312 			sc->rfb_password = strdup(config);
313 		} else {
314 			pci_fbuf_usage(xopts);
315 			ret = -1;
316 			goto done;
317 		}
318 	}
319 
320 done:
321 	free(uoptsbak);
322 	return (ret);
323 }
324 
325 
326 extern void vga_render(struct bhyvegc *gc, void *arg);
327 
328 void
329 pci_fbuf_render(struct bhyvegc *gc, void *arg)
330 {
331 	struct pci_fbuf_softc *sc;
332 
333 	sc = arg;
334 
335 	if (sc->vga_full && sc->gc_image->vgamode) {
336 		/* TODO: mode switching to vga and vesa should use the special
337 		 *      EFI-bhyve protocol port.
338 		 */
339 		vga_render(gc, sc->vgasc);
340 		return;
341 	}
342 	if (sc->gc_width != sc->memregs.width ||
343 	    sc->gc_height != sc->memregs.height) {
344 		bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height);
345 		sc->gc_width = sc->memregs.width;
346 		sc->gc_height = sc->memregs.height;
347 	}
348 
349 	return;
350 }
351 
352 static int
353 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
354 {
355 	int error, prot;
356 	struct pci_fbuf_softc *sc;
357 
358 	if (fbuf_sc != NULL) {
359 		EPRINTLN("Only one frame buffer device is allowed.");
360 		return (-1);
361 	}
362 
363 	sc = calloc(1, sizeof(struct pci_fbuf_softc));
364 
365 	pi->pi_arg = sc;
366 
367 	/* initialize config space */
368 	pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB);
369 	pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D);
370 	pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY);
371 	pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA);
372 
373 	error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ);
374 	assert(error == 0);
375 
376 	error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE);
377 	assert(error == 0);
378 
379 	error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS);
380 	assert(error == 0);
381 
382 	sc->fbaddr = pi->pi_bar[1].addr;
383 	sc->memregs.fbsize = FB_SIZE;
384 	sc->memregs.width  = COLS_DEFAULT;
385 	sc->memregs.height = ROWS_DEFAULT;
386 	sc->memregs.depth  = 32;
387 
388 	sc->vga_enabled = 1;
389 	sc->vga_full = 0;
390 
391 	sc->fsc_pi = pi;
392 
393 	error = pci_fbuf_parse_opts(sc, opts);
394 	if (error != 0)
395 		goto done;
396 
397 	/* XXX until VGA rendering is enabled */
398 	if (sc->vga_full != 0) {
399 		EPRINTLN("pci_fbuf: VGA rendering not enabled");
400 		goto done;
401 	}
402 
403 	sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE);
404 	if (sc->fb_base == MAP_FAILED) {
405 		error = -1;
406 		goto done;
407 	}
408 	DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]",
409 	        sc->fb_base, FB_SIZE));
410 
411 	/*
412 	 * Map the framebuffer into the guest address space.
413 	 * XXX This may fail if the BAR is different than a prior
414 	 * run. In this case flag the error. This will be fixed
415 	 * when a change_memseg api is available.
416 	 */
417 	prot = PROT_READ | PROT_WRITE;
418 	if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) {
419 		EPRINTLN("pci_fbuf: mapseg failed - try deleting VM and restarting");
420 		error = -1;
421 		goto done;
422 	}
423 
424 	console_init(sc->memregs.width, sc->memregs.height, sc->fb_base);
425 	console_fb_register(pci_fbuf_render, sc);
426 
427 	if (sc->vga_enabled)
428 		sc->vgasc = vga_init(!sc->vga_full);
429 	sc->gc_image = console_get_image();
430 
431 	fbuf_sc = sc;
432 
433 	memset((void *)sc->fb_base, 0, FB_SIZE);
434 
435 	error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password);
436 done:
437 	if (error)
438 		free(sc);
439 
440 	return (error);
441 }
442 
443 struct pci_devemu pci_fbuf = {
444 	.pe_emu =	"fbuf",
445 	.pe_init =	pci_fbuf_init,
446 	.pe_barwrite =	pci_fbuf_write,
447 	.pe_barread =	pci_fbuf_read
448 };
449 PCI_EMUL_SET(pci_fbuf);
450