xref: /freebsd/usr.sbin/bhyve/pci_fbuf.c (revision 6829dae12bb055451fa467da4589c43bd03b1e64)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2015 Nahanni Systems, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/types.h>
35 #include <sys/mman.h>
36 
37 #include <machine/vmm.h>
38 #include <vmmapi.h>
39 
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43 
44 #include <errno.h>
45 #include <unistd.h>
46 
47 #include "bhyvegc.h"
48 #include "bhyverun.h"
49 #include "console.h"
50 #include "inout.h"
51 #include "pci_emul.h"
52 #include "rfb.h"
53 #include "vga.h"
54 
55 /*
56  * bhyve Framebuffer device emulation.
57  * BAR0 points to the current mode information.
58  * BAR1 is the 32-bit framebuffer address.
59  *
60  *  -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height
61  */
62 
63 static int fbuf_debug = 1;
64 #define	DEBUG_INFO	1
65 #define	DEBUG_VERBOSE	4
66 #define	DPRINTF(level, params)  if (level <= fbuf_debug) printf params
67 
68 
69 #define	KB	(1024UL)
70 #define	MB	(1024 * 1024UL)
71 
72 #define	DMEMSZ	128
73 
74 #define	FB_SIZE		(16*MB)
75 
76 #define COLS_MAX	1920
77 #define	ROWS_MAX	1200
78 
79 #define COLS_DEFAULT	1024
80 #define ROWS_DEFAULT	768
81 
82 #define COLS_MIN	640
83 #define ROWS_MIN	480
84 
85 struct pci_fbuf_softc {
86 	struct pci_devinst *fsc_pi;
87 	struct {
88 		uint32_t fbsize;
89 		uint16_t width;
90 		uint16_t height;
91 		uint16_t depth;
92 		uint16_t refreshrate;
93 		uint8_t  reserved[116];
94 	} __packed memregs;
95 
96 	/* rfb server */
97 	char      *rfb_host;
98 	char      *rfb_password;
99 	int       rfb_port;
100 	int       rfb_wait;
101 	int       vga_enabled;
102 	int	  vga_full;
103 
104 	uint32_t  fbaddr;
105 	char      *fb_base;
106 	uint16_t  gc_width;
107 	uint16_t  gc_height;
108 	void      *vgasc;
109 	struct bhyvegc_image *gc_image;
110 };
111 
112 static struct pci_fbuf_softc *fbuf_sc;
113 
114 #define	PCI_FBUF_MSI_MSGS	 4
115 
116 static void
117 pci_fbuf_usage(char *opt)
118 {
119 
120 	fprintf(stderr, "Invalid fbuf emulation option \"%s\"\r\n", opt);
121 	fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port"
122 	    "{,w=width}{,h=height}\r\n");
123 }
124 
125 static void
126 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
127 	       int baridx, uint64_t offset, int size, uint64_t value)
128 {
129 	struct pci_fbuf_softc *sc;
130 	uint8_t *p;
131 
132 	assert(baridx == 0);
133 
134 	sc = pi->pi_arg;
135 
136 	DPRINTF(DEBUG_VERBOSE,
137 	    ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx\n",
138 	    offset, size, value));
139 
140 	if (offset + size > DMEMSZ) {
141 		printf("fbuf: write too large, offset %ld size %d\n",
142 		       offset, size);
143 		return;
144 	}
145 
146 	p = (uint8_t *)&sc->memregs + offset;
147 
148 	switch (size) {
149 	case 1:
150 		*p = value;
151 		break;
152 	case 2:
153 		*(uint16_t *)p = value;
154 		break;
155 	case 4:
156 		*(uint32_t *)p = value;
157 		break;
158 	case 8:
159 		*(uint64_t *)p = value;
160 		break;
161 	default:
162 		printf("fbuf: write unknown size %d\n", size);
163 		break;
164 	}
165 
166 	if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
167 	    sc->memregs.height == 0) {
168 		DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n"));
169 		sc->gc_image->vgamode = 1;
170 		sc->gc_width = 0;
171 		sc->gc_height = 0;
172 	} else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
173 	    sc->memregs.height != 0) {
174 		DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n"));
175 		sc->gc_image->vgamode = 0;
176 	}
177 }
178 
179 uint64_t
180 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
181 	      int baridx, uint64_t offset, int size)
182 {
183 	struct pci_fbuf_softc *sc;
184 	uint8_t *p;
185 	uint64_t value;
186 
187 	assert(baridx == 0);
188 
189 	sc = pi->pi_arg;
190 
191 
192 	if (offset + size > DMEMSZ) {
193 		printf("fbuf: read too large, offset %ld size %d\n",
194 		       offset, size);
195 		return (0);
196 	}
197 
198 	p = (uint8_t *)&sc->memregs + offset;
199 	value = 0;
200 	switch (size) {
201 	case 1:
202 		value = *p;
203 		break;
204 	case 2:
205 		value = *(uint16_t *)p;
206 		break;
207 	case 4:
208 		value = *(uint32_t *)p;
209 		break;
210 	case 8:
211 		value = *(uint64_t *)p;
212 		break;
213 	default:
214 		printf("fbuf: read unknown size %d\n", size);
215 		break;
216 	}
217 
218 	DPRINTF(DEBUG_VERBOSE,
219 	    ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx\n",
220 	     offset, size, value));
221 
222 	return (value);
223 }
224 
225 static int
226 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts)
227 {
228 	char	*uopts, *xopts, *config;
229 	char	*tmpstr;
230 	int	ret;
231 
232 	ret = 0;
233 	uopts = strdup(opts);
234 	for (xopts = strtok(uopts, ",");
235 	     xopts != NULL;
236 	     xopts = strtok(NULL, ",")) {
237 		if (strcmp(xopts, "wait") == 0) {
238 			sc->rfb_wait = 1;
239 			continue;
240 		}
241 
242 		if ((config = strchr(xopts, '=')) == NULL) {
243 			pci_fbuf_usage(xopts);
244 			ret = -1;
245 			goto done;
246 		}
247 
248 		*config++ = '\0';
249 
250 		DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n",
251 		   xopts, config));
252 
253 		if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) {
254 			/*
255 			 * IPv4 -- host-ip:port
256 			 * IPv6 -- [host-ip%zone]:port
257 			 * XXX for now port is mandatory.
258 			 */
259 			tmpstr = strsep(&config, "]");
260 			if (config) {
261 				if (tmpstr[0] == '[')
262 					tmpstr++;
263 				sc->rfb_host = tmpstr;
264 				if (config[0] == ':')
265 					config++;
266 				else {
267 					pci_fbuf_usage(xopts);
268 					ret = -1;
269 					goto done;
270 				}
271 				sc->rfb_port = atoi(config);
272 			} else {
273 				config = tmpstr;
274 				tmpstr = strsep(&config, ":");
275 				if (!config)
276 					sc->rfb_port = atoi(tmpstr);
277 				else {
278 					sc->rfb_port = atoi(config);
279 					sc->rfb_host = tmpstr;
280 				}
281 			}
282 	        } else if (!strcmp(xopts, "vga")) {
283 			if (!strcmp(config, "off")) {
284 				sc->vga_enabled = 0;
285 			} else if (!strcmp(config, "io")) {
286 				sc->vga_enabled = 1;
287 				sc->vga_full = 0;
288 			} else if (!strcmp(config, "on")) {
289 				sc->vga_enabled = 1;
290 				sc->vga_full = 1;
291 			} else {
292 				pci_fbuf_usage(xopts);
293 				ret = -1;
294 				goto done;
295 			}
296 	        } else if (!strcmp(xopts, "w")) {
297 		        sc->memregs.width = atoi(config);
298 			if (sc->memregs.width > COLS_MAX) {
299 				pci_fbuf_usage(xopts);
300 				ret = -1;
301 				goto done;
302 			} else if (sc->memregs.width == 0)
303 				sc->memregs.width = 1920;
304 		} else if (!strcmp(xopts, "h")) {
305 			sc->memregs.height = atoi(config);
306 			if (sc->memregs.height > ROWS_MAX) {
307 				pci_fbuf_usage(xopts);
308 				ret = -1;
309 				goto done;
310 			} else if (sc->memregs.height == 0)
311 				sc->memregs.height = 1080;
312 		} else if (!strcmp(xopts, "password")) {
313 			sc->rfb_password = config;
314 		} else {
315 			pci_fbuf_usage(xopts);
316 			ret = -1;
317 			goto done;
318 		}
319 	}
320 
321 done:
322 	return (ret);
323 }
324 
325 
326 extern void vga_render(struct bhyvegc *gc, void *arg);
327 
328 void
329 pci_fbuf_render(struct bhyvegc *gc, void *arg)
330 {
331 	struct pci_fbuf_softc *sc;
332 
333 	sc = arg;
334 
335 	if (sc->vga_full && sc->gc_image->vgamode) {
336 		/* TODO: mode switching to vga and vesa should use the special
337 		 *      EFI-bhyve protocol port.
338 		 */
339 		vga_render(gc, sc->vgasc);
340 		return;
341 	}
342 	if (sc->gc_width != sc->memregs.width ||
343 	    sc->gc_height != sc->memregs.height) {
344 		bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height);
345 		sc->gc_width = sc->memregs.width;
346 		sc->gc_height = sc->memregs.height;
347 	}
348 
349 	return;
350 }
351 
352 static int
353 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
354 {
355 	int error, prot;
356 	struct pci_fbuf_softc *sc;
357 
358 	if (fbuf_sc != NULL) {
359 		fprintf(stderr, "Only one frame buffer device is allowed.\n");
360 		return (-1);
361 	}
362 
363 	sc = calloc(1, sizeof(struct pci_fbuf_softc));
364 
365 	pi->pi_arg = sc;
366 
367 	/* initialize config space */
368 	pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB);
369 	pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D);
370 	pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY);
371 	pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA);
372 
373 	error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ);
374 	assert(error == 0);
375 
376 	error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE);
377 	assert(error == 0);
378 
379 	error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS);
380 	assert(error == 0);
381 
382 	sc->fbaddr = pi->pi_bar[1].addr;
383 	sc->memregs.fbsize = FB_SIZE;
384 	sc->memregs.width  = COLS_DEFAULT;
385 	sc->memregs.height = ROWS_DEFAULT;
386 	sc->memregs.depth  = 32;
387 
388 	sc->vga_enabled = 1;
389 	sc->vga_full = 0;
390 
391 	sc->fsc_pi = pi;
392 
393 	error = pci_fbuf_parse_opts(sc, opts);
394 	if (error != 0)
395 		goto done;
396 
397 	/* XXX until VGA rendering is enabled */
398 	if (sc->vga_full != 0) {
399 		fprintf(stderr, "pci_fbuf: VGA rendering not enabled");
400 		goto done;
401 	}
402 
403 	sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE);
404 	if (sc->fb_base == MAP_FAILED) {
405 		error = -1;
406 		goto done;
407 	}
408 	DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n",
409 	        sc->fb_base, FB_SIZE));
410 
411 	/*
412 	 * Map the framebuffer into the guest address space.
413 	 * XXX This may fail if the BAR is different than a prior
414 	 * run. In this case flag the error. This will be fixed
415 	 * when a change_memseg api is available.
416 	 */
417 	prot = PROT_READ | PROT_WRITE;
418 	if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) {
419 		fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n");
420 		error = -1;
421 		goto done;
422 	}
423 
424 	console_init(sc->memregs.width, sc->memregs.height, sc->fb_base);
425 	console_fb_register(pci_fbuf_render, sc);
426 
427 	if (sc->vga_enabled)
428 		sc->vgasc = vga_init(!sc->vga_full);
429 	sc->gc_image = console_get_image();
430 
431 	fbuf_sc = sc;
432 
433 	memset((void *)sc->fb_base, 0, FB_SIZE);
434 
435 	error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password);
436 done:
437 	if (error)
438 		free(sc);
439 
440 	return (error);
441 }
442 
443 struct pci_devemu pci_fbuf = {
444 	.pe_emu =	"fbuf",
445 	.pe_init =	pci_fbuf_init,
446 	.pe_barwrite =	pci_fbuf_write,
447 	.pe_barread =	pci_fbuf_read
448 };
449 PCI_EMUL_SET(pci_fbuf);
450