xref: /freebsd/usr.sbin/bhyve/pci_fbuf.c (revision 273c26a3c3bea87a241d6879abd4f991db180bf0)
1 /*-
2  * Copyright (c) 2015 Nahanni Systems, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/types.h>
33 #include <sys/mman.h>
34 
35 #include <machine/vmm.h>
36 #include <vmmapi.h>
37 
38 #include <stdio.h>
39 #include <stdlib.h>
40 #include <string.h>
41 
42 #include <errno.h>
43 #include <unistd.h>
44 
45 #include "bhyvegc.h"
46 #include "bhyverun.h"
47 #include "console.h"
48 #include "inout.h"
49 #include "pci_emul.h"
50 #include "rfb.h"
51 #include "vga.h"
52 
53 /*
54  * bhyve Framebuffer device emulation.
55  * BAR0 points to the current mode information.
56  * BAR1 is the 32-bit framebuffer address.
57  *
58  *  -s <b>,fbuf,wait,tcp=<ip>:port,w=width,h=height
59  */
60 
61 static int fbuf_debug = 1;
62 #define	DEBUG_INFO	1
63 #define	DEBUG_VERBOSE	4
64 #define	DPRINTF(level, params)  if (level <= fbuf_debug) printf params
65 
66 
67 #define	KB	(1024UL)
68 #define	MB	(1024 * 1024UL)
69 
70 #define	DMEMSZ	128
71 
72 #define	FB_SIZE		(16*MB)
73 
74 #define COLS_MAX	1920
75 #define	ROWS_MAX	1200
76 
77 #define COLS_DEFAULT	1024
78 #define ROWS_DEFAULT	768
79 
80 #define COLS_MIN	640
81 #define ROWS_MIN	480
82 
83 struct pci_fbuf_softc {
84 	struct pci_devinst *fsc_pi;
85 	struct {
86 		uint32_t fbsize;
87 		uint16_t width;
88 		uint16_t height;
89 		uint16_t depth;
90 		uint16_t refreshrate;
91 		uint8_t  reserved[116];
92 	} __packed memregs;
93 
94 	/* rfb server */
95 	char      *rfb_host;
96 	int       rfb_port;
97 	int       rfb_wait;
98 	int       vga_enabled;
99 	int	  vga_full;
100 
101 	uint32_t  fbaddr;
102 	char      *fb_base;
103 	uint16_t  gc_width;
104 	uint16_t  gc_height;
105 	void      *vgasc;
106 	struct bhyvegc_image *gc_image;
107 };
108 
109 static struct pci_fbuf_softc *fbuf_sc;
110 
111 #define	PCI_FBUF_MSI_MSGS	 4
112 
113 static void
114 pci_fbuf_usage(char *opt)
115 {
116 
117 	fprintf(stderr, "Invalid fbuf emulation \"%s\"\r\n", opt);
118 	fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port\r\n");
119 }
120 
121 static void
122 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
123 	       int baridx, uint64_t offset, int size, uint64_t value)
124 {
125 	struct pci_fbuf_softc *sc;
126 	uint8_t *p;
127 
128 	assert(baridx == 0);
129 
130 	sc = pi->pi_arg;
131 
132 	DPRINTF(DEBUG_VERBOSE,
133 	    ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx\n",
134 	    offset, size, value));
135 
136 	if (offset + size > DMEMSZ) {
137 		printf("fbuf: write too large, offset %ld size %d\n",
138 		       offset, size);
139 		return;
140 	}
141 
142 	p = (uint8_t *)&sc->memregs + offset;
143 
144 	switch (size) {
145 	case 1:
146 		*p = value;
147 		break;
148 	case 2:
149 		*(uint16_t *)p = value;
150 		break;
151 	case 4:
152 		*(uint32_t *)p = value;
153 		break;
154 	case 8:
155 		*(uint64_t *)p = value;
156 		break;
157 	default:
158 		printf("fbuf: write unknown size %d\n", size);
159 		break;
160 	}
161 
162 	if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
163 	    sc->memregs.height == 0) {
164 		DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n"));
165 		sc->gc_image->vgamode = 1;
166 		sc->gc_width = 0;
167 		sc->gc_height = 0;
168 	} else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
169 	    sc->memregs.height != 0) {
170 		DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n"));
171 		sc->gc_image->vgamode = 0;
172 	}
173 }
174 
175 uint64_t
176 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
177 	      int baridx, uint64_t offset, int size)
178 {
179 	struct pci_fbuf_softc *sc;
180 	uint8_t *p;
181 	uint64_t value;
182 
183 	assert(baridx == 0);
184 
185 	sc = pi->pi_arg;
186 
187 
188 	if (offset + size > DMEMSZ) {
189 		printf("fbuf: read too large, offset %ld size %d\n",
190 		       offset, size);
191 		return (0);
192 	}
193 
194 	p = (uint8_t *)&sc->memregs + offset;
195 	value = 0;
196 	switch (size) {
197 	case 1:
198 		value = *p;
199 		break;
200 	case 2:
201 		value = *(uint16_t *)p;
202 		break;
203 	case 4:
204 		value = *(uint32_t *)p;
205 		break;
206 	case 8:
207 		value = *(uint64_t *)p;
208 		break;
209 	default:
210 		printf("fbuf: read unknown size %d\n", size);
211 		break;
212 	}
213 
214 	DPRINTF(DEBUG_VERBOSE,
215 	    ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx\n",
216 	     offset, size, value));
217 
218 	return (value);
219 }
220 
221 static int
222 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts)
223 {
224 	char	*uopts, *xopts, *config;
225 	char	*tmpstr;
226 	int	ret;
227 
228 	ret = 0;
229 	uopts = strdup(opts);
230 	for (xopts = strtok(uopts, ",");
231 	     xopts != NULL;
232 	     xopts = strtok(NULL, ",")) {
233 		if (strcmp(xopts, "wait") == 0) {
234 			sc->rfb_wait = 1;
235 			continue;
236 		}
237 
238 		if ((config = strchr(xopts, '=')) == NULL) {
239 			pci_fbuf_usage(xopts);
240 			ret = -1;
241 			goto done;
242 		}
243 
244 		*config++ = '\0';
245 
246 		DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n",
247 		   xopts, config));
248 
249 		if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) {
250 			/* parse host-ip:port */
251 		        tmpstr = strsep(&config, ":");
252 			if (!config)
253 				sc->rfb_port = atoi(tmpstr);
254 			else {
255 				sc->rfb_port = atoi(config);
256 				sc->rfb_host = tmpstr;
257 			}
258 	        } else if (!strcmp(xopts, "vga")) {
259 			if (!strcmp(config, "off")) {
260 				sc->vga_enabled = 0;
261 			} else if (!strcmp(config, "io")) {
262 				sc->vga_enabled = 1;
263 				sc->vga_full = 0;
264 			} else if (!strcmp(config, "on")) {
265 				sc->vga_enabled = 1;
266 				sc->vga_full = 1;
267 			} else {
268 				pci_fbuf_usage(opts);
269 				ret = -1;
270 				goto done;
271 			}
272 	        } else if (!strcmp(xopts, "w")) {
273 		        sc->memregs.width = atoi(config);
274 			if (sc->memregs.width > COLS_MAX) {
275 				pci_fbuf_usage(xopts);
276 				ret = -1;
277 				goto done;
278 			} else if (sc->memregs.width == 0)
279 				sc->memregs.width = 1920;
280 		} else if (!strcmp(xopts, "h")) {
281 			sc->memregs.height = atoi(config);
282 			if (sc->memregs.height > ROWS_MAX) {
283 				pci_fbuf_usage(xopts);
284 				ret = -1;
285 				goto done;
286 			} else if (sc->memregs.height == 0)
287 				sc->memregs.height = 1080;
288 
289 		} else {
290 			pci_fbuf_usage(xopts);
291 			ret = -1;
292 			goto done;
293 		}
294 	}
295 
296 done:
297 	return (ret);
298 }
299 
300 
301 extern void vga_render(struct bhyvegc *gc, void *arg);
302 
303 void
304 pci_fbuf_render(struct bhyvegc *gc, void *arg)
305 {
306 	struct pci_fbuf_softc *sc;
307 
308 	sc = arg;
309 
310 	if (sc->vga_full && sc->gc_image->vgamode) {
311 		/* TODO: mode switching to vga and vesa should use the special
312 		 *      EFI-bhyve protocol port.
313 		 */
314 		vga_render(gc, sc->vgasc);
315 		return;
316 	}
317 	if (sc->gc_width != sc->memregs.width ||
318 	    sc->gc_height != sc->memregs.height) {
319 		bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height);
320 		sc->gc_width = sc->memregs.width;
321 		sc->gc_height = sc->memregs.height;
322 	}
323 
324 	return;
325 }
326 
327 static int
328 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
329 {
330 	int error, prot;
331 	struct pci_fbuf_softc *sc;
332 
333 	if (fbuf_sc != NULL) {
334 		fprintf(stderr, "Only one frame buffer device is allowed.\n");
335 		return (-1);
336 	}
337 
338 	sc = calloc(1, sizeof(struct pci_fbuf_softc));
339 
340 	pi->pi_arg = sc;
341 
342 	/* initialize config space */
343 	pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB);
344 	pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D);
345 	pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY);
346 	pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA);
347 
348 	error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ);
349 	assert(error == 0);
350 
351 	error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE);
352 	assert(error == 0);
353 
354 	error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS);
355 	assert(error == 0);
356 
357 	sc->fbaddr = pi->pi_bar[1].addr;
358 	sc->memregs.fbsize = FB_SIZE;
359 	sc->memregs.width  = COLS_DEFAULT;
360 	sc->memregs.height = ROWS_DEFAULT;
361 	sc->memregs.depth  = 32;
362 
363 	sc->vga_enabled = 1;
364 	sc->vga_full = 0;
365 
366 	sc->fsc_pi = pi;
367 
368 	error = pci_fbuf_parse_opts(sc, opts);
369 	if (error != 0)
370 		goto done;
371 
372 	/* XXX until VGA rendering is enabled */
373 	if (sc->vga_full != 0) {
374 		fprintf(stderr, "pci_fbuf: VGA rendering not enabled");
375 		goto done;
376 	}
377 
378 	sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE);
379 	if (sc->fb_base == MAP_FAILED) {
380 		error = -1;
381 		goto done;
382 	}
383 	DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n",
384 	        sc->fb_base, FB_SIZE));
385 
386 	/*
387 	 * Map the framebuffer into the guest address space.
388 	 * XXX This may fail if the BAR is different than a prior
389 	 * run. In this case flag the error. This will be fixed
390 	 * when a change_memseg api is available.
391 	 */
392 	prot = PROT_READ | PROT_WRITE;
393 	if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) {
394 		fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n");
395 		error = -1;
396 		goto done;
397 	}
398 
399 	console_init(sc->memregs.width, sc->memregs.height, sc->fb_base);
400 	console_fb_register(pci_fbuf_render, sc);
401 
402 	if (sc->vga_enabled)
403 		sc->vgasc = vga_init(!sc->vga_full);
404 	sc->gc_image = console_get_image();
405 
406 	fbuf_sc = sc;
407 
408 	memset((void *)sc->fb_base, 0, FB_SIZE);
409 
410 	error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait);
411 done:
412 	if (error)
413 		free(sc);
414 
415 	return (error);
416 }
417 
418 struct pci_devemu pci_fbuf = {
419 	.pe_emu =	"fbuf",
420 	.pe_init =	pci_fbuf_init,
421 	.pe_barwrite =	pci_fbuf_write,
422 	.pe_barread =	pci_fbuf_read
423 };
424 PCI_EMUL_SET(pci_fbuf);
425