xref: /freebsd/usr.sbin/bhyve/amd64/ioapic.c (revision 87b759f0fa1f7554d50ce640c40138512bbded44)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2014 Hudson River Trading LLC
5  * Written by: John H. Baldwin <jhb@FreeBSD.org>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <sys/types.h>
31 #include <stdio.h>
32 
33 #include <machine/vmm.h>
34 #include <vmmapi.h>
35 
36 #include "bootrom.h"
37 #include "ioapic.h"
38 #include "pci_emul.h"
39 #include "pci_lpc.h"
40 
41 /*
42  * Assign PCI INTx interrupts to I/O APIC pins in a round-robin
43  * fashion.  Note that we have no idea what the HPET is using, but the
44  * HPET is also programmable whereas this is intended for hardwired
45  * PCI interrupts.
46  *
47  * This assumes a single I/O APIC where pins >= 16 are permitted for
48  * PCI devices.
49  */
50 static int pci_pins;
51 
52 void
53 ioapic_init(struct vmctx *ctx)
54 {
55 
56 	if (vm_ioapic_pincount(ctx, &pci_pins) < 0) {
57 		pci_pins = 0;
58 		return;
59 	}
60 
61 	/* Ignore the first 16 pins. */
62 	if (pci_pins <= 16) {
63 		pci_pins = 0;
64 		return;
65 	}
66 	pci_pins -= 16;
67 }
68 
69 int
70 ioapic_pci_alloc_irq(struct pci_devinst *pi)
71 {
72 	static int last_pin;
73 
74 	if (pci_pins == 0)
75 		return (-1);
76 	if (bootrom_boot()) {
77 		/* For external bootrom use fixed mapping. */
78 		return (16 + (4 + pi->pi_slot + pi->pi_lintr.pin) % 8);
79 	}
80 	return (16 + (last_pin++ % pci_pins));
81 }
82