xref: /freebsd/usr.bin/clang/llvm-tblgen/Makefile (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
134cdd776SDimitry AndricPROG_CXX=	llvm-tblgen
2a324c340SDimitry AndricMAN=
334cdd776SDimitry Andric
40b57cec5SDimitry AndricSRCDIR=		llvm/utils/TableGen
5*0fca6ea1SDimitry AndricSRCS+=		ARMTargetDefEmitter.cpp
6986e05bcSDimitry AndricSRCS+=		AsmMatcherEmitter.cpp
7986e05bcSDimitry AndricSRCS+=		AsmWriterEmitter.cpp
8986e05bcSDimitry AndricSRCS+=		Attributes.cpp
9*0fca6ea1SDimitry AndricSRCS+=		Basic/CodeGenIntrinsics.cpp
10*0fca6ea1SDimitry AndricSRCS+=		Basic/SDNodeProperties.cpp
11986e05bcSDimitry AndricSRCS+=		CTagsEmitter.cpp
12986e05bcSDimitry AndricSRCS+=		CallingConvEmitter.cpp
13986e05bcSDimitry AndricSRCS+=		CodeEmitterGen.cpp
14986e05bcSDimitry AndricSRCS+=		CodeGenMapTable.cpp
15*0fca6ea1SDimitry AndricSRCS+=		Common/AsmWriterInst.cpp
16*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenDAGPatterns.cpp
17*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenHwModes.cpp
18*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenInstAlias.cpp
19*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenInstruction.cpp
20*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenRegisters.cpp
21*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenSchedule.cpp
22*0fca6ea1SDimitry AndricSRCS+=		Common/CodeGenTarget.cpp
23*0fca6ea1SDimitry AndricSRCS+=		Common/DAGISelMatcher.cpp
24*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/CodeExpander.cpp
25*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/CombinerUtils.cpp
26*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/CXXPredicates.cpp
27*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/GlobalISelMatchTable.cpp
28*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.cpp
29*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/PatternParser.cpp
30*0fca6ea1SDimitry AndricSRCS+=		Common/GlobalISel/Patterns.cpp
31*0fca6ea1SDimitry AndricSRCS+=		Common/InfoByHwMode.cpp
32*0fca6ea1SDimitry AndricSRCS+=		Common/OptEmitter.cpp
33*0fca6ea1SDimitry AndricSRCS+=		Common/PredicateExpander.cpp
34*0fca6ea1SDimitry AndricSRCS+=		Common/SubtargetFeatureInfo.cpp
35*0fca6ea1SDimitry AndricSRCS+=		Common/Types.cpp
36*0fca6ea1SDimitry AndricSRCS+=		Common/VarLenCodeEmitterGen.cpp
375e801ac6SDimitry AndricSRCS+=		CompressInstEmitter.cpp
38986e05bcSDimitry AndricSRCS+=		DAGISelEmitter.cpp
39986e05bcSDimitry AndricSRCS+=		DAGISelMatcherEmitter.cpp
40986e05bcSDimitry AndricSRCS+=		DAGISelMatcherGen.cpp
41986e05bcSDimitry AndricSRCS+=		DAGISelMatcherOpt.cpp
4238b6f456SDimitry AndricSRCS+=		DFAEmitter.cpp
43986e05bcSDimitry AndricSRCS+=		DFAPacketizerEmitter.cpp
4481ad6265SDimitry AndricSRCS+=		DXILEmitter.cpp
4581ad6265SDimitry AndricSRCS+=		DecoderEmitter.cpp
4648aaf27bSDimitry AndricSRCS+=		DirectiveEmitter.cpp
47986e05bcSDimitry AndricSRCS+=		DisassemblerEmitter.cpp
48676320a0SDimitry AndricSRCS+=		ExegesisEmitter.cpp
49986e05bcSDimitry AndricSRCS+=		FastISelEmitter.cpp
505f757f3fSDimitry AndricSRCS+=		GlobalISelCombinerEmitter.cpp
5109bfd043SDimitry AndricSRCS+=		GlobalISelEmitter.cpp
5236cb3905SDimitry AndricSRCS+=		InstrDocsEmitter.cpp
53986e05bcSDimitry AndricSRCS+=		InstrInfoEmitter.cpp
54986e05bcSDimitry AndricSRCS+=		IntrinsicEmitter.cpp
551db9f3b2SDimitry AndricSRCS+=		MacroFusionPredicatorEmitter.cpp
56986e05bcSDimitry AndricSRCS+=		OptParserEmitter.cpp
5738b6f456SDimitry AndricSRCS+=		OptRSTEmitter.cpp
58986e05bcSDimitry AndricSRCS+=		PseudoLoweringEmitter.cpp
59bdd1243dSDimitry AndricSRCS+=		RISCVTargetDefEmitter.cpp
605897d2f0SDimitry AndricSRCS+=		RegisterBankEmitter.cpp
61986e05bcSDimitry AndricSRCS+=		RegisterInfoEmitter.cpp
62986e05bcSDimitry AndricSRCS+=		SearchableTableEmitter.cpp
63986e05bcSDimitry AndricSRCS+=		SubtargetEmitter.cpp
64986e05bcSDimitry AndricSRCS+=		TableGen.cpp
655f757f3fSDimitry AndricSRCS+=		VTEmitter.cpp
6625194b54SDimitry AndricSRCS+=		WebAssemblyDisassemblerEmitter.cpp
67986e05bcSDimitry AndricSRCS+=		X86DisassemblerTables.cpp
6836cb3905SDimitry AndricSRCS+=		X86FoldTablesEmitter.cpp
69*0fca6ea1SDimitry AndricSRCS+=		X86InstrMappingEmitter.cpp
7081ad6265SDimitry AndricSRCS+=		X86MnemonicTables.cpp
71986e05bcSDimitry AndricSRCS+=		X86ModRMFilters.cpp
72986e05bcSDimitry AndricSRCS+=		X86RecognizableInstr.cpp
7334cdd776SDimitry Andric
74*0fca6ea1SDimitry AndricCFLAGS+=	-I${LLVM_BASE}/${SRCDIR}
75*0fca6ea1SDimitry AndricCFLAGS+=	-I${.OBJDIR}
76*0fca6ea1SDimitry Andric
7706c3fb27SDimitry Andric.include "${SRCTOP}/lib/clang/llvm.pre.mk"
7806c3fb27SDimitry Andric
7906c3fb27SDimitry Andricllvm/CodeGen/GenVT.inc: ${LLVM_SRCS}/include/llvm/CodeGen/ValueTypes.td
8006c3fb27SDimitry Andric	${LLVM_MIN_TBLGEN} -gen-vt \
8106c3fb27SDimitry Andric	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
8206c3fb27SDimitry Andric	    ${LLVM_SRCS}/include/llvm/CodeGen/ValueTypes.td
8306c3fb27SDimitry AndricTGHDRS+=	llvm/CodeGen/GenVT.inc
8406c3fb27SDimitry Andric
8506c3fb27SDimitry AndricDEPENDFILES+=	${TGHDRS:C/$/.d/}
8606c3fb27SDimitry AndricDPSRCS+=	${TGHDRS}
8706c3fb27SDimitry AndricCLEANFILES+=	${TGHDRS} ${TGHDRS:C/$/.d/}
8806c3fb27SDimitry AndricCLEANFILES+=	${GENSRCS} ${GENSRCS:C/$/.d/}
8906c3fb27SDimitry Andric
90986e05bcSDimitry Andric.include "../llvm.prog.mk"
91