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"LLI" "1" "2023-05-24" "16" "LLVM"
NAME
lli - directly execute programs from LLVM bitcode
SYNOPSIS
lli [options] [filename] [program args]
DESCRIPTION
lli directly executes programs in LLVM bitcode format. It takes a program in LLVM bitcode format and executes it using a just-in-time compiler or an interpreter. lli is not an emulator. It will not execute IR of different architectures and it can only interpret (or JIT-compile) for the host architecture. The JIT compiler takes the same arguments as other tools, like llc, but they don\(aqt necessarily work for the interpreter. If filename is not specified, then lli reads the LLVM bitcode for the program from standard input. The optional args specified on the command line are passed to the program as arguments.
GENERAL OPTIONS
NDENT 0.0

-fake-argv0=executable Override the argv[0] value passed into the executing program. NINDENT NDENT 0.0

-force-interpreter={false,true} If set to true, use the interpreter even if a just-in-time compiler is available for this architecture. Defaults to false. NINDENT NDENT 0.0

-help Print a summary of command line options. NINDENT NDENT 0.0

-load=pluginfilename Causes lli to load the plugin (shared object) named pluginfilename and use it for optimization. NINDENT NDENT 0.0

-stats Print statistics from the code-generation passes. This is only meaningful for the just-in-time compiler, at present. NINDENT NDENT 0.0

-time-passes Record the amount of time needed for each code-generation pass and print it to standard error. NINDENT NDENT 0.0

-version Print out the version of lli and exit without doing anything else. NINDENT

TARGET OPTIONS
NDENT 0.0

-mtriple=target triple Override the target triple specified in the input bitcode file with the specified string. This may result in a crash if you pick an architecture which is not compatible with the current system. NINDENT NDENT 0.0

-march=arch Specify the architecture for which to generate assembly, overriding the target encoded in the bitcode file. See the output of llc -help for a list of valid architectures. By default this is inferred from the target triple or autodetected to the current architecture. NINDENT NDENT 0.0

-mcpu=cpuname Specify a specific chip in the current architecture to generate code for. By default this is inferred from the target triple and autodetected to the current architecture. For a list of available CPUs, use: llvm-as < /dev/null | llc -march=xyz -mcpu=help NINDENT NDENT 0.0

-mattr=a1,+a2,-a3,... Override or control specific attributes of the target, such as whether SIMD operations are enabled or not. The default set of attributes is set by the current CPU. For a list of available attributes, use: llvm-as < /dev/null | llc -march=xyz -mattr=help NINDENT

FLOATING POINT OPTIONS
NDENT 0.0

-disable-excess-fp-precision Disable optimizations that may increase floating point precision. NINDENT NDENT 0.0

-enable-no-infs-fp-math Enable optimizations that assume no Inf values. NINDENT NDENT 0.0

-enable-no-nans-fp-math Enable optimizations that assume no NAN values. NINDENT NDENT 0.0

-enable-unsafe-fp-math Causes lli to enable optimizations that may decrease floating point precision. NINDENT NDENT 0.0

-soft-float Causes lli to generate software floating point library calls instead of equivalent hardware instructions. NINDENT

CODE GENERATION OPTIONS
NDENT 0.0

-code-model=model Choose the code model from: NDENT 7.0 NDENT 3.5

default: Target default code model
tiny: Tiny code model
small: Small code model
kernel: Kernel code model
medium: Medium code model
large: Large code model
NINDENT NINDENT NINDENT NDENT 0.0

-disable-post-RA-scheduler Disable scheduling after register allocation. NINDENT NDENT 0.0

-disable-spill-fusing Disable fusing of spill code into instructions. NINDENT NDENT 0.0

-jit-enable-eh Exception handling should be enabled in the just-in-time compiler. NINDENT NDENT 0.0

-join-liveintervals Coalesce copies (default=true). NINDENT NDENT 0.0

-nozero-initialized-in-bss Don\(aqt place zero-initialized symbols into the BSS section. NINDENT NDENT 0.0

-pre-RA-sched=scheduler Instruction schedulers available (before register allocation): NDENT 7.0 NDENT 3.5

=default: Best scheduler for the target
=none: No scheduling: breadth first sequencing
=simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
=simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
=list-burr: Bottom-up register reduction list scheduling
=list-tdrr: Top-down register reduction list scheduling
=list-td: Top-down list scheduler
NINDENT NINDENT NINDENT NDENT 0.0

-regalloc=allocator Register allocator to use (default=linearscan) NDENT 7.0 NDENT 3.5

=bigblock: Big-block register allocator
=linearscan: linear scan register allocator
=local: local register allocator
=simple: simple register allocator
NINDENT NINDENT NINDENT NDENT 0.0

-relocation-model=model Choose relocation model from: NDENT 7.0 NDENT 3.5

=default: Target default relocation model
=static: Non-relocatable code
=pic: Fully relocatable, position independent code
=dynamic-no-pic: Relocatable external references, non-relocatable code
NINDENT NINDENT NINDENT NDENT 0.0

-spiller Spiller to use (default=local) NDENT 7.0 NDENT 3.5

=simple: simple spiller
=local: local spiller
NINDENT NINDENT NINDENT NDENT 0.0

-x86-asm-syntax=syntax Choose style of code to emit from X86 backend: NDENT 7.0 NDENT 3.5

=att: Emit AT&T-style assembly
=intel: Emit Intel-style assembly
NINDENT NINDENT NINDENT
EXIT STATUS
If lli fails to load the program, it will exit with an exit code of 1. Otherwise, it will return the exit code of the program it executes.
SEE ALSO
llc(1)
AUTHOR
Maintained by the LLVM Team (https://llvm.org/).
COPYRIGHT
2003-2023, LLVM Project Generated by docutils manpage writer.
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