1111b1318SSam Leffler #ifndef _DUMPREGS_ 2111b1318SSam Leffler #define _DUMPREGS_ 3111b1318SSam Leffler /*- 4111b1318SSam Leffler * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 5111b1318SSam Leffler * All rights reserved. 6111b1318SSam Leffler * 7111b1318SSam Leffler * Redistribution and use in source and binary forms, with or without 8111b1318SSam Leffler * modification, are permitted provided that the following conditions 9111b1318SSam Leffler * are met: 10111b1318SSam Leffler * 1. Redistributions of source code must retain the above copyright 11111b1318SSam Leffler * notice, this list of conditions and the following disclaimer, 12111b1318SSam Leffler * without modification. 13111b1318SSam Leffler * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14111b1318SSam Leffler * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15111b1318SSam Leffler * redistribution must be conditioned upon including a substantially 16111b1318SSam Leffler * similar Disclaimer requirement for further binary redistribution. 17111b1318SSam Leffler * 18111b1318SSam Leffler * NO WARRANTY 19111b1318SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20111b1318SSam Leffler * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21111b1318SSam Leffler * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22111b1318SSam Leffler * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23111b1318SSam Leffler * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24111b1318SSam Leffler * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25111b1318SSam Leffler * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26111b1318SSam Leffler * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27111b1318SSam Leffler * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28111b1318SSam Leffler * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29111b1318SSam Leffler * THE POSSIBILITY OF SUCH DAMAGES. 30111b1318SSam Leffler */ 31111b1318SSam Leffler 32111b1318SSam Leffler #define __constructor __attribute__((constructor)) 33111b1318SSam Leffler 34111b1318SSam Leffler struct dumpreg { 35111b1318SSam Leffler uint32_t addr; 36111b1318SSam Leffler const char *name; 37111b1318SSam Leffler const char *bits; 38111b1318SSam Leffler int type; 39111b1318SSam Leffler u_int srevMin, srevMax; 40111b1318SSam Leffler u_int phyMin, phyMax; 41111b1318SSam Leffler }; 42111b1318SSam Leffler #define SREV(v,r) (((v) << 16) | (r)) 43111b1318SSam Leffler #define MAC_MATCH(dr, mv, mr) \ 44111b1318SSam Leffler ((dr)->srevMin <= SREV(mv,mr) && SREV(mv,mr) < (dr)->srevMax) 45111b1318SSam Leffler 46111b1318SSam Leffler #define PHY_MATCH(dr, pr) \ 47111b1318SSam Leffler ((dr)->phyMin <= (pr) && (pr) < (dr)->phyMax) 48111b1318SSam Leffler #define PHYANY 0,0xffff 49111b1318SSam Leffler 50111b1318SSam Leffler enum { 51111b1318SSam Leffler DUMP_BASIC = 0x0001, /* basic/default registers */ 52111b1318SSam Leffler DUMP_KEYCACHE = 0x0002, /* key cache */ 53111b1318SSam Leffler DUMP_BASEBAND = 0x0004, /* baseband */ 54111b1318SSam Leffler DUMP_INTERRUPT = 0x0008, /* interrupt state */ 55111b1318SSam Leffler DUMP_XR = 0x0010, /* XR state */ 56111b1318SSam Leffler DUMP_QCU = 0x0020, /* QCU state */ 57111b1318SSam Leffler DUMP_DCU = 0x0040, /* DCU state */ 58111b1318SSam Leffler 59111b1318SSam Leffler DUMP_PUBLIC = 0x0061, /* public = BASIC+QCU+DCU */ 60111b1318SSam Leffler DUMP_ALL = 0xffff 61111b1318SSam Leffler }; 62111b1318SSam Leffler 63111b1318SSam Leffler #define _DEFREG(_addr, _name, _type) \ 64111b1318SSam Leffler { .addr = _addr, .name = _name, .type = _type } 65111b1318SSam Leffler #define _DEFREGx(_addr, _name, _type, _srevmin, _srevmax) \ 66111b1318SSam Leffler { .addr = _addr, .name = _name, .type = _type, \ 67111b1318SSam Leffler .srevMin = _srevmin, .srevMax = _srevmax } 68111b1318SSam Leffler #define _DEFREGfmt(_addr, _name, _type, _fmt) \ 69111b1318SSam Leffler { .addr = _addr, .name = _name, .type = _type, .bits = _fmt } 70111b1318SSam Leffler #define DEFVOID(_addr, _name) _DEFREG(_addr, _name, 0) 71111b1318SSam Leffler #define DEFVOIDx(_addr, _name, _smin, _smax) \ 72111b1318SSam Leffler __DEFREGx(_addr, _name, _smin, _smax, 0) 73111b1318SSam Leffler #define DEFVOIDfmt(_addr, _name, _fmt) \ 74111b1318SSam Leffler _DEFREGfmt(_addr, _name, 0, _fmt) 75111b1318SSam Leffler #define DEFBASIC(_addr, _name) _DEFREG(_addr, _name, DUMP_BASIC) 76111b1318SSam Leffler #define DEFBASICfmt(_addr, _name, _fmt) \ 77111b1318SSam Leffler _DEFREGfmt(_addr, _name, DUMP_BASIC, _fmt) 78111b1318SSam Leffler #define DEFBASICx(_addr, _name, _smin, _smax) \ 79111b1318SSam Leffler _DEFREGx(_addr, _name, DUMP_BASIC, _smin, _smax) 80111b1318SSam Leffler #define DEFBB(_addr, _name) _DEFREG(_addr, _name, DUMP_BASEBAND) 81111b1318SSam Leffler #define DEFINT(_addr, _name) _DEFREG(_addr, _name, DUMP_INTERRUPT) 82111b1318SSam Leffler #define DEFINTfmt(_addr, _name, _fmt) \ 83111b1318SSam Leffler _DEFREGfmt(_addr, _name, DUMP_INTERRUPT, _fmt) 84111b1318SSam Leffler #define DEFQCU(_addr, _name) _DEFREG(_addr, _name, DUMP_QCU) 85111b1318SSam Leffler #define DEFDCU(_addr, _name) _DEFREG(_addr, _name, DUMP_DCU) 86111b1318SSam Leffler 87111b1318SSam Leffler void register_regs(struct dumpreg *_regs, u_int _nregs, 88111b1318SSam Leffler int def_srev_min, int def_srev_max, 89111b1318SSam Leffler int def_phy_min, int def_phy_max); 90111b1318SSam Leffler void register_keycache(u_int nslots, 91111b1318SSam Leffler int def_srev_min, int def_srev_max, 92111b1318SSam Leffler int def_phy_min, int def_phy_max); 93111b1318SSam Leffler void register_range(u_int brange, u_int erange, int what, 94111b1318SSam Leffler int def_srev_min, int def_srev_max, 95111b1318SSam Leffler int def_phy_min, int def_phy_max); 96111b1318SSam Leffler #endif /* _DUMPREGS_ */ 97