xref: /freebsd/tools/tools/ath/athstats/athstats.c (revision 60caf0c9c2848b8389cc3159bbc219dd408a2496)
112f961f4SSam Leffler /*-
210ad9a77SSam Leffler  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
312f961f4SSam Leffler  * All rights reserved.
412f961f4SSam Leffler  *
512f961f4SSam Leffler  * Redistribution and use in source and binary forms, with or without
612f961f4SSam Leffler  * modification, are permitted provided that the following conditions
712f961f4SSam Leffler  * are met:
812f961f4SSam Leffler  * 1. Redistributions of source code must retain the above copyright
912f961f4SSam Leffler  *    notice, this list of conditions and the following disclaimer,
1012f961f4SSam Leffler  *    without modification.
1112f961f4SSam Leffler  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
1212f961f4SSam Leffler  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
1312f961f4SSam Leffler  *    redistribution must be conditioned upon including a substantially
1412f961f4SSam Leffler  *    similar Disclaimer requirement for further binary redistribution.
1512f961f4SSam Leffler  *
1612f961f4SSam Leffler  * NO WARRANTY
1712f961f4SSam Leffler  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1812f961f4SSam Leffler  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1912f961f4SSam Leffler  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
2012f961f4SSam Leffler  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
2112f961f4SSam Leffler  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
2212f961f4SSam Leffler  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2312f961f4SSam Leffler  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2412f961f4SSam Leffler  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
2512f961f4SSam Leffler  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2612f961f4SSam Leffler  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
2712f961f4SSam Leffler  * THE POSSIBILITY OF SUCH DAMAGES.
2812f961f4SSam Leffler  *
2912f961f4SSam Leffler  * $FreeBSD$
3012f961f4SSam Leffler  */
3112f961f4SSam Leffler 
328363d9c4SAdrian Chadd #include "opt_ah.h"
338363d9c4SAdrian Chadd 
3412f961f4SSam Leffler /*
352f549d72SSam Leffler  * ath statistics class.
3612f961f4SSam Leffler  */
37*60caf0c9SCraig Rodrigues 
38*60caf0c9SCraig Rodrigues #include <sys/param.h>
3912f961f4SSam Leffler #include <sys/file.h>
4012f961f4SSam Leffler #include <sys/sockio.h>
4112f961f4SSam Leffler #include <sys/socket.h>
42*60caf0c9SCraig Rodrigues 
4312f961f4SSam Leffler #include <net/if.h>
4412f961f4SSam Leffler #include <net/if_media.h>
4512f961f4SSam Leffler #include <net/if_var.h>
4612f961f4SSam Leffler 
47*60caf0c9SCraig Rodrigues #include <err.h>
48*60caf0c9SCraig Rodrigues #include <signal.h>
4912f961f4SSam Leffler #include <stdio.h>
50207ae002SSam Leffler #include <stdlib.h>
512f549d72SSam Leffler #include <string.h>
522f549d72SSam Leffler #include <unistd.h>
5312f961f4SSam Leffler 
54207ae002SSam Leffler #include "ah.h"
55207ae002SSam Leffler #include "ah_desc.h"
56582aab3bSAdrian Chadd #include "ah_diagcodes.h"
57b1b75b3bSAdrian Chadd #include "net80211/ieee80211_ioctl.h"
58b1b75b3bSAdrian Chadd #include "net80211/ieee80211_radiotap.h"
59207ae002SSam Leffler #include "if_athioctl.h"
6012f961f4SSam Leffler 
612f549d72SSam Leffler #include "athstats.h"
622f549d72SSam Leffler 
634d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
644d490647SSam Leffler #define HAL_EP_RND(x,mul) \
654d490647SSam Leffler 	((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
664d490647SSam Leffler #define HAL_RSSI(x)     HAL_EP_RND(x, HAL_RSSI_EP_MULTIPLIER)
674d490647SSam Leffler #endif
684d490647SSam Leffler 
692f549d72SSam Leffler #define	NOTPRESENT	{ 0, "", "" }
702f549d72SSam Leffler 
71207ae002SSam Leffler #define	AFTER(prev)	((prev)+1)
72207ae002SSam Leffler 
732f549d72SSam Leffler static const struct fmt athstats[] = {
742f549d72SSam Leffler #define	S_INPUT		0
7595d7bf0fSSam Leffler 	{ 8,	"input",	"input",	"data frames received" },
76207ae002SSam Leffler #define	S_OUTPUT	AFTER(S_INPUT)
7795d7bf0fSSam Leffler 	{ 8,	"output",	"output",	"data frames transmit" },
78207ae002SSam Leffler #define	S_TX_ALTRATE	AFTER(S_OUTPUT)
792f549d72SSam Leffler 	{ 7,	"altrate",	"altrate",	"tx frames with an alternate rate" },
80207ae002SSam Leffler #define	S_TX_SHORTRETRY	AFTER(S_TX_ALTRATE)
8195d7bf0fSSam Leffler 	{ 7,	"short",	"short",	"short on-chip tx retries" },
82207ae002SSam Leffler #define	S_TX_LONGRETRY	AFTER(S_TX_SHORTRETRY)
8395d7bf0fSSam Leffler 	{ 7,	"long",		"long",		"long on-chip tx retries" },
84207ae002SSam Leffler #define	S_TX_XRETRIES	AFTER(S_TX_LONGRETRY)
852f549d72SSam Leffler 	{ 6,	"xretry",	"xretry",	"tx failed 'cuz too many retries" },
86207ae002SSam Leffler #define	S_MIB		AFTER(S_TX_XRETRIES)
872f549d72SSam Leffler 	{ 5,	"mib",		"mib",		"mib overflow interrupts" },
882f549d72SSam Leffler #ifndef __linux__
89207ae002SSam Leffler #define	S_TX_LINEAR	AFTER(S_MIB)
902f549d72SSam Leffler 	{ 5,	"txlinear",	"txlinear",	"tx linearized to cluster" },
91207ae002SSam Leffler #define	S_BSTUCK	AFTER(S_TX_LINEAR)
928e787d67SAdrian Chadd 	{ 6,	"bstuck",	"bstuck",	"stuck beacon conditions" },
93207ae002SSam Leffler #define	S_INTRCOAL	AFTER(S_BSTUCK)
942f549d72SSam Leffler 	{ 5,	"intrcoal",	"intrcoal",	"interrupts coalesced" },
95207ae002SSam Leffler #define	S_RATE		AFTER(S_INTRCOAL)
962f549d72SSam Leffler #else
97207ae002SSam Leffler #define	S_RATE		AFTER(S_MIB)
982f549d72SSam Leffler #endif
994d490647SSam Leffler 	{ 5,	"rate",		"rate",		"current transmit rate" },
100207ae002SSam Leffler #define	S_WATCHDOG	AFTER(S_RATE)
1012f549d72SSam Leffler 	{ 5,	"wdog",		"wdog",		"watchdog timeouts" },
102207ae002SSam Leffler #define	S_FATAL		AFTER(S_WATCHDOG)
1032f549d72SSam Leffler 	{ 5,	"fatal",	"fatal",	"hardware error interrupts" },
104207ae002SSam Leffler #define	S_BMISS		AFTER(S_FATAL)
1052f549d72SSam Leffler 	{ 5,	"bmiss",	"bmiss",	"beacon miss interrupts" },
106207ae002SSam Leffler #define	S_RXORN		AFTER(S_BMISS)
1072f549d72SSam Leffler 	{ 5,	"rxorn",	"rxorn",	"recv overrun interrupts" },
108207ae002SSam Leffler #define	S_RXEOL		AFTER(S_RXORN)
1092f549d72SSam Leffler 	{ 5,	"rxeol",	"rxeol",	"recv eol interrupts" },
110207ae002SSam Leffler #define	S_TXURN		AFTER(S_RXEOL)
1112f549d72SSam Leffler 	{ 5,	"txurn",	"txurn",	"txmit underrun interrupts" },
112207ae002SSam Leffler #define	S_TX_MGMT	AFTER(S_TXURN)
1132f549d72SSam Leffler 	{ 5,	"txmgt",	"txmgt",	"tx management frames" },
114207ae002SSam Leffler #define	S_TX_DISCARD	AFTER(S_TX_MGMT)
1152f549d72SSam Leffler 	{ 5,	"txdisc",	"txdisc",	"tx frames discarded prior to association" },
116207ae002SSam Leffler #define	S_TX_INVALID	AFTER(S_TX_DISCARD)
1172f549d72SSam Leffler 	{ 5,	"txinv",	"txinv",	"tx invalid (19)" },
118207ae002SSam Leffler #define	S_TX_QSTOP	AFTER(S_TX_INVALID)
1192f549d72SSam Leffler 	{ 5,	"qstop",	"qstop",	"tx stopped 'cuz no xmit buffer" },
120207ae002SSam Leffler #define	S_TX_ENCAP	AFTER(S_TX_QSTOP)
1212f549d72SSam Leffler 	{ 5,	"txencode",	"txencode",	"tx encapsulation failed" },
122207ae002SSam Leffler #define	S_TX_NONODE	AFTER(S_TX_ENCAP)
1232f549d72SSam Leffler 	{ 5,	"txnonode",	"txnonode",	"tx failed 'cuz no node" },
12441e449dbSSam Leffler #define	S_TX_NOBUF	AFTER(S_TX_NONODE)
12541e449dbSSam Leffler 	{ 5,	"txnobuf",	"txnobuf",	"tx failed 'cuz dma buffer allocation failed" },
12641e449dbSSam Leffler #define	S_TX_NOFRAG	AFTER(S_TX_NOBUF)
12741e449dbSSam Leffler 	{ 5,	"txnofrag",	"txnofrag",	"tx failed 'cuz frag buffer allocation(s) failed" },
12841e449dbSSam Leffler #define	S_TX_NOMBUF	AFTER(S_TX_NOFRAG)
1292f549d72SSam Leffler 	{ 5,	"txnombuf",	"txnombuf",	"tx failed 'cuz mbuf allocation failed" },
1302f549d72SSam Leffler #ifndef __linux__
131207ae002SSam Leffler #define	S_TX_NOMCL	AFTER(S_TX_NOMBUF)
1322f549d72SSam Leffler 	{ 5,	"txnomcl",	"txnomcl",	"tx failed 'cuz cluster allocation failed" },
133207ae002SSam Leffler #define	S_TX_FIFOERR	AFTER(S_TX_NOMCL)
1342f549d72SSam Leffler #else
135207ae002SSam Leffler #define	S_TX_FIFOERR	AFTER(S_TX_NOMBUF)
1362f549d72SSam Leffler #endif
1372f549d72SSam Leffler 	{ 5,	"efifo",	"efifo",	"tx failed 'cuz FIFO underrun" },
138207ae002SSam Leffler #define	S_TX_FILTERED	AFTER(S_TX_FIFOERR)
1392f549d72SSam Leffler 	{ 5,	"efilt",	"efilt",	"tx failed 'cuz destination filtered" },
140207ae002SSam Leffler #define	S_TX_BADRATE	AFTER(S_TX_FILTERED)
1412f549d72SSam Leffler 	{ 5,	"txbadrate",	"txbadrate",	"tx failed 'cuz bogus xmit rate" },
142207ae002SSam Leffler #define	S_TX_NOACK	AFTER(S_TX_BADRATE)
1432f549d72SSam Leffler 	{ 5,	"noack",	"noack",	"tx frames with no ack marked" },
144207ae002SSam Leffler #define	S_TX_RTS	AFTER(S_TX_NOACK)
1452f549d72SSam Leffler 	{ 5,	"rts",		"rts",		"tx frames with rts enabled" },
146207ae002SSam Leffler #define	S_TX_CTS	AFTER(S_TX_RTS)
1472f549d72SSam Leffler 	{ 5,	"cts",		"cts",		"tx frames with cts enabled" },
148207ae002SSam Leffler #define	S_TX_SHORTPRE	AFTER(S_TX_CTS)
1492f549d72SSam Leffler 	{ 5,	"shpre",	"shpre",	"tx frames with short preamble" },
150207ae002SSam Leffler #define	S_TX_PROTECT	AFTER(S_TX_SHORTPRE)
1512f549d72SSam Leffler 	{ 5,	"protect",	"protect",	"tx frames with 11g protection" },
152207ae002SSam Leffler #define	S_RX_ORN	AFTER(S_TX_PROTECT)
1532f549d72SSam Leffler 	{ 5,	"rxorn",	"rxorn",	"rx failed 'cuz of desc overrun" },
154207ae002SSam Leffler #define	S_RX_CRC_ERR	AFTER(S_RX_ORN)
1552f549d72SSam Leffler 	{ 6,	"crcerr",	"crcerr",	"rx failed 'cuz of bad CRC" },
156207ae002SSam Leffler #define	S_RX_FIFO_ERR	AFTER(S_RX_CRC_ERR)
1572f549d72SSam Leffler 	{ 5,	"rxfifo",	"rxfifo",	"rx failed 'cuz of FIFO overrun" },
158207ae002SSam Leffler #define	S_RX_CRYPTO_ERR	AFTER(S_RX_FIFO_ERR)
1592f549d72SSam Leffler 	{ 5,	"crypt",	"crypt",	"rx failed 'cuz decryption" },
160207ae002SSam Leffler #define	S_RX_MIC_ERR	AFTER(S_RX_CRYPTO_ERR)
1612f549d72SSam Leffler 	{ 4,	"mic",		"mic",		"rx failed 'cuz MIC failure" },
162207ae002SSam Leffler #define	S_RX_TOOSHORT	AFTER(S_RX_MIC_ERR)
1632f549d72SSam Leffler 	{ 5,	"rxshort",	"rxshort",	"rx failed 'cuz frame too short" },
164207ae002SSam Leffler #define	S_RX_NOMBUF	AFTER(S_RX_TOOSHORT)
1652f549d72SSam Leffler 	{ 5,	"rxnombuf",	"rxnombuf",	"rx setup failed 'cuz no mbuf" },
166207ae002SSam Leffler #define	S_RX_MGT	AFTER(S_RX_NOMBUF)
1672f549d72SSam Leffler 	{ 5,	"rxmgt",	"rxmgt",	"rx management frames" },
168207ae002SSam Leffler #define	S_RX_CTL	AFTER(S_RX_MGT)
1692f549d72SSam Leffler 	{ 5,	"rxctl",	"rxctl",	"rx control frames" },
170207ae002SSam Leffler #define	S_RX_PHY_ERR	AFTER(S_RX_CTL)
1712f549d72SSam Leffler 	{ 7,	"phyerr",	"phyerr",	"rx failed 'cuz of PHY err" },
172207ae002SSam Leffler #define	S_RX_PHY_UNDERRUN		AFTER(S_RX_PHY_ERR)
1734d490647SSam Leffler 	{ 4,	"phyund",	"TUnd",	"transmit underrun" },
174207ae002SSam Leffler #define	S_RX_PHY_TIMING			AFTER(S_RX_PHY_UNDERRUN)
1754d490647SSam Leffler 	{ 4,	"phytim",	"Tim",	"timing error" },
176207ae002SSam Leffler #define	S_RX_PHY_PARITY			AFTER(S_RX_PHY_TIMING)
1774d490647SSam Leffler 	{ 4,	"phypar",	"IPar",	"illegal parity" },
178207ae002SSam Leffler #define	S_RX_PHY_RATE			AFTER(S_RX_PHY_PARITY)
1794d490647SSam Leffler 	{ 4,	"phyrate",	"IRate",	"illegal rate" },
180207ae002SSam Leffler #define	S_RX_PHY_LENGTH			AFTER(S_RX_PHY_RATE)
1814d490647SSam Leffler 	{ 4,	"phylen",	"ILen",		"illegal length" },
182207ae002SSam Leffler #define	S_RX_PHY_RADAR			AFTER(S_RX_PHY_LENGTH)
1834d490647SSam Leffler 	{ 4,	"phyradar",	"Radar",	"radar detect" },
184207ae002SSam Leffler #define	S_RX_PHY_SERVICE		AFTER(S_RX_PHY_RADAR)
1854d490647SSam Leffler 	{ 4,	"physervice",	"Service",	"illegal service" },
186207ae002SSam Leffler #define	S_RX_PHY_TOR			AFTER(S_RX_PHY_SERVICE)
1874d490647SSam Leffler 	{ 4,	"phytor",	"TOR",		"transmit override receive" },
188207ae002SSam Leffler #define	S_RX_PHY_OFDM_TIMING		AFTER(S_RX_PHY_TOR)
1892f549d72SSam Leffler 	{ 6,	"ofdmtim",	"ofdmtim",	"OFDM timing" },
190207ae002SSam Leffler #define	S_RX_PHY_OFDM_SIGNAL_PARITY	AFTER(S_RX_PHY_OFDM_TIMING)
1912f549d72SSam Leffler 	{ 6,	"ofdmsig",	"ofdmsig",	"OFDM illegal parity" },
192207ae002SSam Leffler #define	S_RX_PHY_OFDM_RATE_ILLEGAL	AFTER(S_RX_PHY_OFDM_SIGNAL_PARITY)
1932f549d72SSam Leffler 	{ 6,	"ofdmrate",	"ofdmrate",	"OFDM illegal rate" },
194207ae002SSam Leffler #define	S_RX_PHY_OFDM_POWER_DROP	AFTER(S_RX_PHY_OFDM_RATE_ILLEGAL)
1952f549d72SSam Leffler 	{ 6,	"ofdmpow",	"ofdmpow",	"OFDM power drop" },
196207ae002SSam Leffler #define	S_RX_PHY_OFDM_SERVICE		AFTER(S_RX_PHY_OFDM_POWER_DROP)
1972f549d72SSam Leffler 	{ 6,	"ofdmservice",	"ofdmservice",	"OFDM illegal service" },
198207ae002SSam Leffler #define	S_RX_PHY_OFDM_RESTART		AFTER(S_RX_PHY_OFDM_SERVICE)
1992f549d72SSam Leffler 	{ 6,	"ofdmrestart",	"ofdmrestart",	"OFDM restart" },
200207ae002SSam Leffler #define	S_RX_PHY_CCK_TIMING		AFTER(S_RX_PHY_OFDM_RESTART)
2012f549d72SSam Leffler 	{ 6,	"ccktim",	"ccktim",	"CCK timing" },
202207ae002SSam Leffler #define	S_RX_PHY_CCK_HEADER_CRC		AFTER(S_RX_PHY_CCK_TIMING)
2032f549d72SSam Leffler 	{ 6,	"cckhead",	"cckhead",	"CCK header crc" },
204207ae002SSam Leffler #define	S_RX_PHY_CCK_RATE_ILLEGAL	AFTER(S_RX_PHY_CCK_HEADER_CRC)
2052f549d72SSam Leffler 	{ 6,	"cckrate",	"cckrate",	"CCK illegal rate" },
206207ae002SSam Leffler #define	S_RX_PHY_CCK_SERVICE		AFTER(S_RX_PHY_CCK_RATE_ILLEGAL)
2072f549d72SSam Leffler 	{ 6,	"cckservice",	"cckservice",	"CCK illegal service" },
208207ae002SSam Leffler #define	S_RX_PHY_CCK_RESTART		AFTER(S_RX_PHY_CCK_SERVICE)
2092f549d72SSam Leffler 	{ 6,	"cckrestar",	"cckrestar",	"CCK restart" },
210207ae002SSam Leffler #define	S_BE_NOMBUF	AFTER(S_RX_PHY_CCK_RESTART)
2112f549d72SSam Leffler 	{ 4,	"benombuf",	"benombuf",	"beacon setup failed 'cuz no mbuf" },
212207ae002SSam Leffler #define	S_BE_XMIT	AFTER(S_BE_NOMBUF)
21395d7bf0fSSam Leffler 	{ 7,	"bexmit",	"bexmit",	"beacons transmitted" },
214207ae002SSam Leffler #define	S_PER_CAL	AFTER(S_BE_XMIT)
2152f549d72SSam Leffler 	{ 4,	"pcal",		"pcal",		"periodic calibrations" },
216207ae002SSam Leffler #define	S_PER_CALFAIL	AFTER(S_PER_CAL)
2172f549d72SSam Leffler 	{ 4,	"pcalf",	"pcalf",	"periodic calibration failures" },
218207ae002SSam Leffler #define	S_PER_RFGAIN	AFTER(S_PER_CALFAIL)
2192f549d72SSam Leffler 	{ 4,	"prfga",	"prfga",	"rfgain value change" },
220207ae002SSam Leffler #if ATH_SUPPORT_TDMA
221207ae002SSam Leffler #define	S_TDMA_UPDATE	AFTER(S_PER_RFGAIN)
22295d7bf0fSSam Leffler 	{ 5,	"tdmau",	"tdmau",	"TDMA slot timing updates" },
223207ae002SSam Leffler #define	S_TDMA_TIMERS	AFTER(S_TDMA_UPDATE)
22495d7bf0fSSam Leffler 	{ 5,	"tdmab",	"tdmab",	"TDMA slot update set beacon timers" },
225207ae002SSam Leffler #define	S_TDMA_TSF	AFTER(S_TDMA_TIMERS)
22695d7bf0fSSam Leffler 	{ 5,	"tdmat",	"tdmat",	"TDMA slot update set TSF" },
22710ad9a77SSam Leffler #define	S_TDMA_TSFADJ	AFTER(S_TDMA_TSF)
22895d7bf0fSSam Leffler 	{ 8,	"tdmadj",	"tdmadj",	"TDMA slot adjust (usecs, smoothed)" },
229cc5912f8SSam Leffler #define	S_TDMA_ACK	AFTER(S_TDMA_TSFADJ)
230cc5912f8SSam Leffler 	{ 5,	"tdmack",	"tdmack",	"TDMA tx failed 'cuz ACK required" },
231cc5912f8SSam Leffler #define	S_RATE_CALLS	AFTER(S_TDMA_ACK)
2322f549d72SSam Leffler #else
233207ae002SSam Leffler #define	S_RATE_CALLS	AFTER(S_PER_RFGAIN)
2342f549d72SSam Leffler #endif
2352f549d72SSam Leffler 	{ 5,	"ratec",	"ratec",	"rate control checks" },
236207ae002SSam Leffler #define	S_RATE_RAISE	AFTER(S_RATE_CALLS)
2372f549d72SSam Leffler 	{ 5,	"rate+",	"rate+",	"rate control raised xmit rate" },
238207ae002SSam Leffler #define	S_RATE_DROP	AFTER(S_RATE_RAISE)
2392f549d72SSam Leffler 	{ 5,	"rate-",	"rate-",	"rate control dropped xmit rate" },
240207ae002SSam Leffler #define	S_TX_RSSI	AFTER(S_RATE_DROP)
2412f549d72SSam Leffler 	{ 4,	"arssi",	"arssi",	"rssi of last ack" },
242207ae002SSam Leffler #define	S_RX_RSSI	AFTER(S_TX_RSSI)
2432f549d72SSam Leffler 	{ 4,	"rssi",		"rssi",		"avg recv rssi" },
244207ae002SSam Leffler #define	S_RX_NOISE	AFTER(S_RX_RSSI)
2452f549d72SSam Leffler 	{ 5,	"noise",	"noise",	"rx noise floor" },
246207ae002SSam Leffler #define	S_BMISS_PHANTOM	AFTER(S_RX_NOISE)
2472f549d72SSam Leffler 	{ 5,	"bmissphantom",	"bmissphantom",	"phantom beacon misses" },
248207ae002SSam Leffler #define	S_TX_RAW	AFTER(S_BMISS_PHANTOM)
2492f549d72SSam Leffler 	{ 5,	"txraw",	"txraw",	"tx frames through raw api" },
250cc5912f8SSam Leffler #define	S_TX_RAW_FAIL	AFTER(S_TX_RAW)
251cc5912f8SSam Leffler 	{ 5,	"txrawfail",	"txrawfail",	"raw tx failed 'cuz interface/hw down" },
252cc5912f8SSam Leffler #define	S_RX_TOOBIG	AFTER(S_TX_RAW_FAIL)
2532f549d72SSam Leffler 	{ 5,	"rx2big",	"rx2big",	"rx failed 'cuz frame too large"  },
254b1b75b3bSAdrian Chadd #define	S_RX_AGG	AFTER(S_RX_TOOBIG)
255b1b75b3bSAdrian Chadd 	{ 5,	"rxagg",	"rxagg",	"A-MPDU sub-frames received" },
256b1b75b3bSAdrian Chadd #define	S_RX_HALFGI	AFTER(S_RX_AGG)
257b1b75b3bSAdrian Chadd 	{ 5,	"rxhalfgi",	"rxhgi",	"Half-GI frames received" },
258b1b75b3bSAdrian Chadd #define	S_RX_2040	AFTER(S_RX_HALFGI)
259b1b75b3bSAdrian Chadd 	{ 6,	"rx2040",	"rx2040",	"40MHz frames received" },
260b1b75b3bSAdrian Chadd #define	S_RX_PRE_CRC_ERR	AFTER(S_RX_2040)
261b1b75b3bSAdrian Chadd 	{ 11,	"rxprecrcerr",	"rxprecrcerr",	"CRC errors for non-last A-MPDU subframes" },
262b1b75b3bSAdrian Chadd #define	S_RX_POST_CRC_ERR	AFTER(S_RX_PRE_CRC_ERR)
263b1b75b3bSAdrian Chadd 	{ 12,	"rxpostcrcerr",	"rxpostcrcerr",	"CRC errors for last subframe in an A-MPDU" },
264b1b75b3bSAdrian Chadd #define	S_RX_DECRYPT_BUSY_ERR	AFTER(S_RX_POST_CRC_ERR)
265b1b75b3bSAdrian Chadd 	{ 10,	"rxdescbusy",	"rxdescbusy",	"Decryption engine busy" },
266b1b75b3bSAdrian Chadd #define	S_RX_HI_CHAIN	AFTER(S_RX_DECRYPT_BUSY_ERR)
267b1b75b3bSAdrian Chadd 	{ 4,	"rxhi",	"rxhi",	"Frames received with RX chain in high power mode" },
2682cdc5a48SAdrian Chadd #define	S_RX_STBC	AFTER(S_RX_HI_CHAIN)
2692cdc5a48SAdrian Chadd 	{ 6,	"rxstbc", "rxstbc", "Frames received w/ STBC encoding" },
2702cdc5a48SAdrian Chadd #define	S_TX_HTPROTECT	AFTER(S_RX_STBC)
271b1b75b3bSAdrian Chadd 	{ 7,	"txhtprot",	"txhtprot",	"Frames transmitted with HT Protection" },
272b1b75b3bSAdrian Chadd #define	S_RX_QEND	AFTER(S_TX_HTPROTECT)
273b1b75b3bSAdrian Chadd 	{ 7,	"rxquend",	"rxquend",	"Hit end of RX descriptor queue" },
274b1b75b3bSAdrian Chadd #define	S_TX_TIMEOUT	AFTER(S_RX_QEND)
275b1b75b3bSAdrian Chadd 	{ 4,	"txtimeout",	"TXTX",	"TX Timeout" },
276b1b75b3bSAdrian Chadd #define	S_TX_CSTIMEOUT	AFTER(S_TX_TIMEOUT)
277b1b75b3bSAdrian Chadd 	{ 4,	"csttimeout",	"CSTX",	"Carrier Sense Timeout" },
278b1b75b3bSAdrian Chadd #define	S_TX_XTXOP_ERR	AFTER(S_TX_CSTIMEOUT)
279b1b75b3bSAdrian Chadd 	{ 5,	"xtxoperr",	"TXOPX",	"TXOP exceed" },
280b1b75b3bSAdrian Chadd #define	S_TX_TIMEREXPIRED_ERR	AFTER(S_TX_XTXOP_ERR)
281b1b75b3bSAdrian Chadd 	{ 7,	"texperr",	"texperr",	"TX Timer expired" },
282b1b75b3bSAdrian Chadd #define	S_TX_DESCCFG_ERR	AFTER(S_TX_TIMEREXPIRED_ERR)
283b1b75b3bSAdrian Chadd 	{ 10,	"desccfgerr",	"desccfgerr",	"TX descriptor error" },
284b1b75b3bSAdrian Chadd #define	S_TX_SWRETRIES	AFTER(S_TX_DESCCFG_ERR)
285b1b75b3bSAdrian Chadd 	{ 9,	"txswretry",	"txswretry",	"Number of frames retransmitted in software" },
286b1b75b3bSAdrian Chadd #define	S_TX_SWRETRIES_MAX	AFTER(S_TX_SWRETRIES)
287b1b75b3bSAdrian Chadd 	{ 7,	"txswmax",	"txswmax",	"Number of frames exceeding software retry" },
288b1b75b3bSAdrian Chadd #define	S_TX_DATA_UNDERRUN	AFTER(S_TX_SWRETRIES_MAX)
289b1b75b3bSAdrian Chadd 	{ 5,	"txdataunderrun",	"TXDAU",	"A-MPDU TX FIFO data underrun" },
290b1b75b3bSAdrian Chadd #define	S_TX_DELIM_UNDERRUN	AFTER(S_TX_DATA_UNDERRUN)
291b1b75b3bSAdrian Chadd 	{ 5,	"txdelimunderrun",	"TXDEU",	"A-MPDU TX Delimiter underrun" },
2921df8da4cSAdrian Chadd #define	S_TX_AGGR_OK		AFTER(S_TX_DELIM_UNDERRUN)
2931df8da4cSAdrian Chadd 	{ 5,	"txaggrok",	"TXAOK",	"A-MPDU sub-frame TX attempt success" },
2941df8da4cSAdrian Chadd #define	S_TX_AGGR_FAIL		AFTER(S_TX_AGGR_OK)
295317d14cfSAdrian Chadd 	{ 4,	"txaggrfail",	"TXAF",	"A-MPDU sub-frame TX attempt failures" },
2961df8da4cSAdrian Chadd #define	S_TX_AGGR_FAILALL	AFTER(S_TX_AGGR_FAIL)
297317d14cfSAdrian Chadd 	{ 7,	"txaggrfailall",	"TXAFALL",	"A-MPDU TX frame failures" },
2982f549d72SSam Leffler #ifndef __linux__
2991df8da4cSAdrian Chadd #define	S_CABQ_XMIT	AFTER(S_TX_AGGR_FAILALL)
3008e787d67SAdrian Chadd 	{ 7,	"cabxmit",	"cabxmit",	"cabq frames transmitted" },
301207ae002SSam Leffler #define	S_CABQ_BUSY	AFTER(S_CABQ_XMIT)
3028e787d67SAdrian Chadd 	{ 8,	"cabqbusy",	"cabqbusy",	"cabq xmit overflowed beacon interval" },
303207ae002SSam Leffler #define	S_TX_NODATA	AFTER(S_CABQ_BUSY)
3048e787d67SAdrian Chadd 	{ 8,	"txnodata",	"txnodata",	"tx discarded empty frame" },
305207ae002SSam Leffler #define	S_TX_BUSDMA	AFTER(S_TX_NODATA)
3068e787d67SAdrian Chadd 	{ 8,	"txbusdma",	"txbusdma",	"tx failed for dma resrcs" },
307207ae002SSam Leffler #define	S_RX_BUSDMA	AFTER(S_TX_BUSDMA)
3088e787d67SAdrian Chadd 	{ 8,	"rxbusdma",	"rxbusdma",	"rx setup failed for dma resrcs" },
309207ae002SSam Leffler #define	S_FF_TXOK	AFTER(S_RX_BUSDMA)
3102f549d72SSam Leffler #else
3111df8da4cSAdrian Chadd #define	S_FF_TXOK	AFTER(S_TX_AGGR_FAILALL)
3122f549d72SSam Leffler #endif
3132f549d72SSam Leffler 	{ 5,	"fftxok",	"fftxok",	"fast frames xmit successfully" },
314207ae002SSam Leffler #define	S_FF_TXERR	AFTER(S_FF_TXOK)
3152f549d72SSam Leffler 	{ 5,	"fftxerr",	"fftxerr",	"fast frames not xmit due to error" },
316207ae002SSam Leffler #define	S_FF_RX		AFTER(S_FF_TXERR)
3172f549d72SSam Leffler 	{ 5,	"ffrx",		"ffrx",		"fast frames received" },
318207ae002SSam Leffler #define	S_FF_FLUSH	AFTER(S_FF_RX)
3192f549d72SSam Leffler 	{ 5,	"ffflush",	"ffflush",	"fast frames flushed from staging q" },
320207ae002SSam Leffler #define	S_TX_QFULL	AFTER(S_FF_FLUSH)
321207ae002SSam Leffler 	{ 5,	"txqfull",	"txqfull",	"tx discarded 'cuz queue is full" },
322207ae002SSam Leffler #define	S_ANT_DEFSWITCH	AFTER(S_TX_QFULL)
3232f549d72SSam Leffler 	{ 5,	"defsw",	"defsw",	"switched default/rx antenna" },
324207ae002SSam Leffler #define	S_ANT_TXSWITCH	AFTER(S_ANT_DEFSWITCH)
3252f549d72SSam Leffler 	{ 5,	"txsw",		"txsw",		"tx used alternate antenna" },
3264d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
3274d490647SSam Leffler #define	S_ANI_NOISE	AFTER(S_ANT_TXSWITCH)
3284d490647SSam Leffler 	{ 2,	"ni",	"NI",		"noise immunity level" },
3294d490647SSam Leffler #define	S_ANI_SPUR	AFTER(S_ANI_NOISE)
3304d490647SSam Leffler 	{ 2,	"si",	"SI",		"spur immunity level" },
3314d490647SSam Leffler #define	S_ANI_STEP	AFTER(S_ANI_SPUR)
3324d490647SSam Leffler 	{ 2,	"step",	"ST",		"first step level" },
3334d490647SSam Leffler #define	S_ANI_OFDM	AFTER(S_ANI_STEP)
3344d490647SSam Leffler 	{ 4,	"owsd",	"OWSD",		"OFDM weak signal detect" },
3354d490647SSam Leffler #define	S_ANI_CCK	AFTER(S_ANI_OFDM)
3364d490647SSam Leffler 	{ 4,	"cwst",	"CWST",		"CCK weak signal threshold" },
3374d490647SSam Leffler #define	S_ANI_MAXSPUR	AFTER(S_ANI_CCK)
3384d490647SSam Leffler 	{ 3,	"maxsi","MSI",		"max spur immunity level" },
3394d490647SSam Leffler #define	S_ANI_LISTEN	AFTER(S_ANI_MAXSPUR)
3404d490647SSam Leffler 	{ 6,	"listen","LISTEN",	"listen time" },
3414d490647SSam Leffler #define	S_ANI_NIUP	AFTER(S_ANI_LISTEN)
342582aab3bSAdrian Chadd 	{ 4,	"ni+",	"NI+",		"ANI increased noise immunity" },
3434d490647SSam Leffler #define	S_ANI_NIDOWN	AFTER(S_ANI_NIUP)
3444d490647SSam Leffler 	{ 4,	"ni-",	"NI-",		"ANI decrease noise immunity" },
3454d490647SSam Leffler #define	S_ANI_SIUP	AFTER(S_ANI_NIDOWN)
3464d490647SSam Leffler 	{ 4,	"si+",	"SI+",		"ANI increased spur immunity" },
3474d490647SSam Leffler #define	S_ANI_SIDOWN	AFTER(S_ANI_SIUP)
3484d490647SSam Leffler 	{ 4,	"si-",	"SI-",		"ANI decrease spur immunity" },
3494d490647SSam Leffler #define	S_ANI_OFDMON	AFTER(S_ANI_SIDOWN)
3504d490647SSam Leffler 	{ 5,	"ofdm+","OFDM+",	"ANI enabled OFDM weak signal detect" },
3514d490647SSam Leffler #define	S_ANI_OFDMOFF	AFTER(S_ANI_OFDMON)
3524d490647SSam Leffler 	{ 5,	"ofdm-","OFDM-",	"ANI disabled OFDM weak signal detect" },
3534d490647SSam Leffler #define	S_ANI_CCKHI	AFTER(S_ANI_OFDMOFF)
3544d490647SSam Leffler 	{ 5,	"cck+",	"CCK+",		"ANI enabled CCK weak signal threshold" },
3554d490647SSam Leffler #define	S_ANI_CCKLO	AFTER(S_ANI_CCKHI)
3564d490647SSam Leffler 	{ 5,	"cck-",	"CCK-",		"ANI disabled CCK weak signal threshold" },
3574d490647SSam Leffler #define	S_ANI_STEPUP	AFTER(S_ANI_CCKLO)
3584d490647SSam Leffler 	{ 5,	"step+","STEP+",	"ANI increased first step level" },
3594d490647SSam Leffler #define	S_ANI_STEPDOWN	AFTER(S_ANI_STEPUP)
3604d490647SSam Leffler 	{ 5,	"step-","STEP-",	"ANI decreased first step level" },
3614d490647SSam Leffler #define	S_ANI_OFDMERRS	AFTER(S_ANI_STEPDOWN)
36295d7bf0fSSam Leffler 	{ 8,	"ofdm",	"OFDM",		"cumulative OFDM phy error count" },
3634d490647SSam Leffler #define	S_ANI_CCKERRS	AFTER(S_ANI_OFDMERRS)
36495d7bf0fSSam Leffler 	{ 8,	"cck",	"CCK",		"cumulative CCK phy error count" },
3654d490647SSam Leffler #define	S_ANI_RESET	AFTER(S_ANI_CCKERRS)
3664d490647SSam Leffler 	{ 5,	"reset","RESET",	"ANI parameters zero'd for non-STA operation" },
3674d490647SSam Leffler #define	S_ANI_LZERO	AFTER(S_ANI_RESET)
3684d490647SSam Leffler 	{ 5,	"lzero","LZERO",	"ANI forced listen time to zero" },
3694d490647SSam Leffler #define	S_ANI_LNEG	AFTER(S_ANI_LZERO)
3704d490647SSam Leffler 	{ 5,	"lneg",	"LNEG",		"ANI calculated listen time < 0" },
3714d490647SSam Leffler #define	S_MIB_ACKBAD	AFTER(S_ANI_LNEG)
37295d7bf0fSSam Leffler 	{ 5,	"ackbad","ACKBAD",	"missing ACK's" },
3734d490647SSam Leffler #define	S_MIB_RTSBAD	AFTER(S_MIB_ACKBAD)
37495d7bf0fSSam Leffler 	{ 5,	"rtsbad","RTSBAD",	"RTS without CTS" },
3754d490647SSam Leffler #define	S_MIB_RTSGOOD	AFTER(S_MIB_RTSBAD)
37695d7bf0fSSam Leffler 	{ 5,	"rtsgood","RTSGOOD",	"successful RTS" },
3774d490647SSam Leffler #define	S_MIB_FCSBAD	AFTER(S_MIB_RTSGOOD)
37895d7bf0fSSam Leffler 	{ 5,	"fcsbad","FCSBAD",	"bad FCS" },
3794d490647SSam Leffler #define	S_MIB_BEACONS	AFTER(S_MIB_FCSBAD)
38095d7bf0fSSam Leffler 	{ 5,	"beacons","beacons",	"beacons received" },
3814d490647SSam Leffler #define	S_NODE_AVGBRSSI	AFTER(S_MIB_BEACONS)
3824d490647SSam Leffler 	{ 3,	"avgbrssi","BSI",	"average rssi (beacons only)" },
3834d490647SSam Leffler #define	S_NODE_AVGRSSI	AFTER(S_NODE_AVGBRSSI)
3844d490647SSam Leffler 	{ 3,	"avgrssi","DSI",	"average rssi (all rx'd frames)" },
3854d490647SSam Leffler #define	S_NODE_AVGARSSI	AFTER(S_NODE_AVGRSSI)
3864d490647SSam Leffler 	{ 3,	"avgtxrssi","TSI",	"average rssi (ACKs only)" },
3874d490647SSam Leffler #define	S_ANT_TX0	AFTER(S_NODE_AVGARSSI)
3884d490647SSam Leffler #else
389207ae002SSam Leffler #define	S_ANT_TX0	AFTER(S_ANT_TXSWITCH)
3904d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */
39195d7bf0fSSam Leffler 	{ 8,	"tx0",	"ant0(tx)",	"frames tx on antenna 0" },
392207ae002SSam Leffler #define	S_ANT_TX1	AFTER(S_ANT_TX0)
39395d7bf0fSSam Leffler 	{ 8,	"tx1",	"ant1(tx)",	"frames tx on antenna 1"  },
394207ae002SSam Leffler #define	S_ANT_TX2	AFTER(S_ANT_TX1)
39595d7bf0fSSam Leffler 	{ 8,	"tx2",	"ant2(tx)",	"frames tx on antenna 2"  },
396207ae002SSam Leffler #define	S_ANT_TX3	AFTER(S_ANT_TX2)
39795d7bf0fSSam Leffler 	{ 8,	"tx3",	"ant3(tx)",	"frames tx on antenna 3"  },
398207ae002SSam Leffler #define	S_ANT_TX4	AFTER(S_ANT_TX3)
39995d7bf0fSSam Leffler 	{ 8,	"tx4",	"ant4(tx)",	"frames tx on antenna 4"  },
400207ae002SSam Leffler #define	S_ANT_TX5	AFTER(S_ANT_TX4)
40195d7bf0fSSam Leffler 	{ 8,	"tx5",	"ant5(tx)",	"frames tx on antenna 5"  },
402207ae002SSam Leffler #define	S_ANT_TX6	AFTER(S_ANT_TX5)
40395d7bf0fSSam Leffler 	{ 8,	"tx6",	"ant6(tx)",	"frames tx on antenna 6"  },
404207ae002SSam Leffler #define	S_ANT_TX7	AFTER(S_ANT_TX6)
40595d7bf0fSSam Leffler 	{ 8,	"tx7",	"ant7(tx)",	"frames tx on antenna 7"  },
406207ae002SSam Leffler #define	S_ANT_RX0	AFTER(S_ANT_TX7)
40795d7bf0fSSam Leffler 	{ 8,	"rx0",	"ant0(rx)",	"frames rx on antenna 0"  },
408207ae002SSam Leffler #define	S_ANT_RX1	AFTER(S_ANT_RX0)
40995d7bf0fSSam Leffler 	{ 8,	"rx1",	"ant1(rx)",	"frames rx on antenna 1"   },
410207ae002SSam Leffler #define	S_ANT_RX2	AFTER(S_ANT_RX1)
41195d7bf0fSSam Leffler 	{ 8,	"rx2",	"ant2(rx)",	"frames rx on antenna 2"   },
412207ae002SSam Leffler #define	S_ANT_RX3	AFTER(S_ANT_RX2)
41395d7bf0fSSam Leffler 	{ 8,	"rx3",	"ant3(rx)",	"frames rx on antenna 3"   },
414207ae002SSam Leffler #define	S_ANT_RX4	AFTER(S_ANT_RX3)
41595d7bf0fSSam Leffler 	{ 8,	"rx4",	"ant4(rx)",	"frames rx on antenna 4"   },
416207ae002SSam Leffler #define	S_ANT_RX5	AFTER(S_ANT_RX4)
41795d7bf0fSSam Leffler 	{ 8,	"rx5",	"ant5(rx)",	"frames rx on antenna 5"   },
418207ae002SSam Leffler #define	S_ANT_RX6	AFTER(S_ANT_RX5)
41995d7bf0fSSam Leffler 	{ 8,	"rx6",	"ant6(rx)",	"frames rx on antenna 6"   },
420207ae002SSam Leffler #define	S_ANT_RX7	AFTER(S_ANT_RX6)
42195d7bf0fSSam Leffler 	{ 8,	"rx7",	"ant7(rx)",	"frames rx on antenna 7"   },
422207ae002SSam Leffler #define	S_TX_SIGNAL	AFTER(S_ANT_RX7)
4232f549d72SSam Leffler 	{ 4,	"asignal",	"asig",	"signal of last ack (dBm)" },
424207ae002SSam Leffler #define	S_RX_SIGNAL	AFTER(S_TX_SIGNAL)
4252f549d72SSam Leffler 	{ 4,	"signal",	"sig",	"avg recv signal (dBm)" },
426d90b001eSAdrian Chadd #define	S_BMISSCOUNT		AFTER(S_RX_SIGNAL)
427d90b001eSAdrian Chadd 	{ 8,	"bmisscount",	"bmisscnt",	"beacon miss count" },
42812f961f4SSam Leffler };
4292f549d72SSam Leffler #define	S_PHY_MIN	S_RX_PHY_UNDERRUN
4302f549d72SSam Leffler #define	S_PHY_MAX	S_RX_PHY_CCK_RESTART
4312f549d72SSam Leffler #define	S_LAST		S_ANT_TX0
432d90b001eSAdrian Chadd #define	S_MAX		S_BMISSCOUNT+1
43312f961f4SSam Leffler 
434207ae002SSam Leffler struct _athstats {
435207ae002SSam Leffler 	struct ath_stats ath;
4364d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
437582aab3bSAdrian Chadd 	HAL_ANI_STATS ani_stats;
438582aab3bSAdrian Chadd 	HAL_ANI_STATE ani_state;
4394d490647SSam Leffler #endif
440207ae002SSam Leffler };
441207ae002SSam Leffler 
4422f549d72SSam Leffler struct athstatfoo_p {
4432f549d72SSam Leffler 	struct athstatfoo base;
44412f961f4SSam Leffler 	int s;
445207ae002SSam Leffler 	int optstats;
4464d490647SSam Leffler #define	ATHSTATS_ANI	0x0001
44712f961f4SSam Leffler 	struct ifreq ifr;
448207ae002SSam Leffler 	struct ath_diag atd;
449207ae002SSam Leffler 	struct _athstats cur;
450207ae002SSam Leffler 	struct _athstats total;
4512f549d72SSam Leffler };
45212f961f4SSam Leffler 
4532f549d72SSam Leffler static void
4542f549d72SSam Leffler ath_setifname(struct athstatfoo *wf0, const char *ifname)
4552f549d72SSam Leffler {
4562f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0;
45712f961f4SSam Leffler 
4582f549d72SSam Leffler 	strncpy(wf->ifr.ifr_name, ifname, sizeof (wf->ifr.ifr_name));
4594d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
4604d490647SSam Leffler 	strncpy(wf->atd.ad_name, ifname, sizeof (wf->atd.ad_name));
4614d490647SSam Leffler 	wf->optstats |= ATHSTATS_ANI;
4624d490647SSam Leffler #endif
46312f961f4SSam Leffler }
46412f961f4SSam Leffler 
4652f549d72SSam Leffler static void
466dd8d00f5SSam Leffler ath_zerostats(struct athstatfoo *wf0)
467dd8d00f5SSam Leffler {
468dd8d00f5SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0;
469dd8d00f5SSam Leffler 
470dd8d00f5SSam Leffler 	if (ioctl(wf->s, SIOCZATHSTATS, &wf->ifr) < 0)
4715205fa34SAdrian Chadd 		err(-1, "ioctl: %s", wf->ifr.ifr_name);
472dd8d00f5SSam Leffler }
473dd8d00f5SSam Leffler 
474dd8d00f5SSam Leffler static void
475207ae002SSam Leffler ath_collect(struct athstatfoo_p *wf, struct _athstats *stats)
4762f549d72SSam Leffler {
477207ae002SSam Leffler 	wf->ifr.ifr_data = (caddr_t) &stats->ath;
4782f549d72SSam Leffler 	if (ioctl(wf->s, SIOCGATHSTATS, &wf->ifr) < 0)
4795205fa34SAdrian Chadd 		err(1, "ioctl: %s", wf->ifr.ifr_name);
4804d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
4814d490647SSam Leffler 	if (wf->optstats & ATHSTATS_ANI) {
482582aab3bSAdrian Chadd 		wf->atd.ad_id = HAL_DIAG_ANI_CURRENT; /* HAL_DIAG_ANI_CURRENT */
4834d490647SSam Leffler 		wf->atd.ad_out_data = (caddr_t) &stats->ani_state;
4844d490647SSam Leffler 		wf->atd.ad_out_size = sizeof(stats->ani_state);
4854d490647SSam Leffler 		if (ioctl(wf->s, SIOCGATHDIAG, &wf->atd) < 0) {
4865205fa34SAdrian Chadd 			warn("ioctl: %s", wf->atd.ad_name);
4874d490647SSam Leffler 			wf->optstats &= ~ATHSTATS_ANI;
4884d490647SSam Leffler 		}
489582aab3bSAdrian Chadd 		wf->atd.ad_id = HAL_DIAG_ANI_STATS; /* HAL_DIAG_ANI_STATS */
4904d490647SSam Leffler 		wf->atd.ad_out_data = (caddr_t) &stats->ani_stats;
4914d490647SSam Leffler 		wf->atd.ad_out_size = sizeof(stats->ani_stats);
4924d490647SSam Leffler 		if (ioctl(wf->s, SIOCGATHDIAG, &wf->atd) < 0)
4935205fa34SAdrian Chadd 			warn("ioctl: %s", wf->atd.ad_name);
4944d490647SSam Leffler 	}
4954d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */
49612f961f4SSam Leffler }
4972f549d72SSam Leffler 
4982f549d72SSam Leffler static void
49915abc53aSAdrian Chadd ath_collect_cur(struct bsdstat *sf)
5002f549d72SSam Leffler {
5012f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5022f549d72SSam Leffler 
5032f549d72SSam Leffler 	ath_collect(wf, &wf->cur);
5042f549d72SSam Leffler }
5052f549d72SSam Leffler 
5062f549d72SSam Leffler static void
50715abc53aSAdrian Chadd ath_collect_tot(struct bsdstat *sf)
5082f549d72SSam Leffler {
5092f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5102f549d72SSam Leffler 
5112f549d72SSam Leffler 	ath_collect(wf, &wf->total);
5122f549d72SSam Leffler }
5132f549d72SSam Leffler 
5142f549d72SSam Leffler static void
51515abc53aSAdrian Chadd ath_update_tot(struct bsdstat *sf)
5162f549d72SSam Leffler {
5172f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5182f549d72SSam Leffler 
5192f549d72SSam Leffler 	wf->total = wf->cur;
5202f549d72SSam Leffler }
5212f549d72SSam Leffler 
5224d490647SSam Leffler static void
5234d490647SSam Leffler snprintrate(char b[], size_t bs, int rate)
5244d490647SSam Leffler {
5254d490647SSam Leffler 	if (rate & IEEE80211_RATE_MCS)
5264d490647SSam Leffler 		snprintf(b, bs, "MCS%u", rate &~ IEEE80211_RATE_MCS);
5274d490647SSam Leffler 	else if (rate & 1)
5284d490647SSam Leffler 		snprintf(b, bs, "%u.5M", rate / 2);
5294d490647SSam Leffler 	else
5304d490647SSam Leffler 		snprintf(b, bs, "%uM", rate / 2);
5314d490647SSam Leffler }
5324d490647SSam Leffler 
5332f549d72SSam Leffler static int
53415abc53aSAdrian Chadd ath_get_curstat(struct bsdstat *sf, int s, char b[], size_t bs)
5352f549d72SSam Leffler {
5362f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5372f549d72SSam Leffler #define	STAT(x) \
538207ae002SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ath.ast_##x - wf->total.ath.ast_##x); return 1
5392f549d72SSam Leffler #define	PHY(x) \
540207ae002SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ath.ast_rx_phy[x] - wf->total.ath.ast_rx_phy[x]); return 1
5414d490647SSam Leffler #define	ANI(x) \
5424d490647SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ani_state.x); return 1
5434d490647SSam Leffler #define	ANISTAT(x) \
5444d490647SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ani_stats.ast_ani_##x - wf->total.ani_stats.ast_ani_##x); return 1
5454d490647SSam Leffler #define	MIBSTAT(x) \
5464d490647SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ani_stats.ast_mibstats.x - wf->total.ani_stats.ast_mibstats.x); return 1
5472f549d72SSam Leffler #define	TXANT(x) \
548207ae002SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ath.ast_ant_tx[x] - wf->total.ath.ast_ant_tx[x]); return 1
5492f549d72SSam Leffler #define	RXANT(x) \
550207ae002SSam Leffler 	snprintf(b, bs, "%u", wf->cur.ath.ast_ant_rx[x] - wf->total.ath.ast_ant_rx[x]); return 1
5512f549d72SSam Leffler 
5522f549d72SSam Leffler 	switch (s) {
5532f549d72SSam Leffler 	case S_INPUT:
5542f549d72SSam Leffler 		snprintf(b, bs, "%lu",
5555205fa34SAdrian Chadd 		    (unsigned long)
5565205fa34SAdrian Chadd 		    ((wf->cur.ath.ast_rx_packets - wf->total.ath.ast_rx_packets) -
5575205fa34SAdrian Chadd 		    (wf->cur.ath.ast_rx_mgt - wf->total.ath.ast_rx_mgt)));
5582f549d72SSam Leffler 		return 1;
5592f549d72SSam Leffler 	case S_OUTPUT:
5602f549d72SSam Leffler 		snprintf(b, bs, "%lu",
5615205fa34SAdrian Chadd 		    (unsigned long)
5625205fa34SAdrian Chadd 		    (wf->cur.ath.ast_tx_packets - wf->total.ath.ast_tx_packets));
5632f549d72SSam Leffler 		return 1;
5642f549d72SSam Leffler 	case S_RATE:
5654d490647SSam Leffler 		snprintrate(b, bs, wf->cur.ath.ast_tx_rate);
5662f549d72SSam Leffler 		return 1;
5672f549d72SSam Leffler 	case S_WATCHDOG:	STAT(watchdog);
5682f549d72SSam Leffler 	case S_FATAL:		STAT(hardware);
5692f549d72SSam Leffler 	case S_BMISS:		STAT(bmiss);
5702f549d72SSam Leffler 	case S_BMISS_PHANTOM:	STAT(bmiss_phantom);
5712f549d72SSam Leffler #ifdef S_BSTUCK
5722f549d72SSam Leffler 	case S_BSTUCK:		STAT(bstuck);
5732f549d72SSam Leffler #endif
5742f549d72SSam Leffler 	case S_RXORN:		STAT(rxorn);
5752f549d72SSam Leffler 	case S_RXEOL:		STAT(rxeol);
5762f549d72SSam Leffler 	case S_TXURN:		STAT(txurn);
5772f549d72SSam Leffler 	case S_MIB:		STAT(mib);
5782f549d72SSam Leffler #ifdef S_INTRCOAL
5792f549d72SSam Leffler 	case S_INTRCOAL:	STAT(intrcoal);
5802f549d72SSam Leffler #endif
5812f549d72SSam Leffler 	case S_TX_MGMT:		STAT(tx_mgmt);
5822f549d72SSam Leffler 	case S_TX_DISCARD:	STAT(tx_discard);
5832f549d72SSam Leffler 	case S_TX_QSTOP:	STAT(tx_qstop);
5842f549d72SSam Leffler 	case S_TX_ENCAP:	STAT(tx_encap);
5852f549d72SSam Leffler 	case S_TX_NONODE:	STAT(tx_nonode);
58641e449dbSSam Leffler 	case S_TX_NOBUF:	STAT(tx_nobuf);
58741e449dbSSam Leffler 	case S_TX_NOFRAG:	STAT(tx_nofrag);
5882f549d72SSam Leffler 	case S_TX_NOMBUF:	STAT(tx_nombuf);
5892f549d72SSam Leffler #ifdef S_TX_NOMCL
5902f549d72SSam Leffler 	case S_TX_NOMCL:	STAT(tx_nomcl);
5912f549d72SSam Leffler 	case S_TX_LINEAR:	STAT(tx_linear);
5922f549d72SSam Leffler 	case S_TX_NODATA:	STAT(tx_nodata);
5932f549d72SSam Leffler 	case S_TX_BUSDMA:	STAT(tx_busdma);
5942f549d72SSam Leffler #endif
5952f549d72SSam Leffler 	case S_TX_XRETRIES:	STAT(tx_xretries);
5962f549d72SSam Leffler 	case S_TX_FIFOERR:	STAT(tx_fifoerr);
5972f549d72SSam Leffler 	case S_TX_FILTERED:	STAT(tx_filtered);
5982f549d72SSam Leffler 	case S_TX_SHORTRETRY:	STAT(tx_shortretry);
5992f549d72SSam Leffler 	case S_TX_LONGRETRY:	STAT(tx_longretry);
6002f549d72SSam Leffler 	case S_TX_BADRATE:	STAT(tx_badrate);
6012f549d72SSam Leffler 	case S_TX_NOACK:	STAT(tx_noack);
6022f549d72SSam Leffler 	case S_TX_RTS:		STAT(tx_rts);
6032f549d72SSam Leffler 	case S_TX_CTS:		STAT(tx_cts);
6042f549d72SSam Leffler 	case S_TX_SHORTPRE:	STAT(tx_shortpre);
6052f549d72SSam Leffler 	case S_TX_ALTRATE:	STAT(tx_altrate);
6062f549d72SSam Leffler 	case S_TX_PROTECT:	STAT(tx_protect);
607cc5912f8SSam Leffler 	case S_TX_RAW:		STAT(tx_raw);
608cc5912f8SSam Leffler 	case S_TX_RAW_FAIL:	STAT(tx_raw_fail);
6092f549d72SSam Leffler 	case S_RX_NOMBUF:	STAT(rx_nombuf);
6102f549d72SSam Leffler #ifdef S_RX_BUSDMA
6112f549d72SSam Leffler 	case S_RX_BUSDMA:	STAT(rx_busdma);
6122f549d72SSam Leffler #endif
6132f549d72SSam Leffler 	case S_RX_ORN:		STAT(rx_orn);
6142f549d72SSam Leffler 	case S_RX_CRC_ERR:	STAT(rx_crcerr);
6152f549d72SSam Leffler 	case S_RX_FIFO_ERR: 	STAT(rx_fifoerr);
6162f549d72SSam Leffler 	case S_RX_CRYPTO_ERR: 	STAT(rx_badcrypt);
6172f549d72SSam Leffler 	case S_RX_MIC_ERR:	STAT(rx_badmic);
6182f549d72SSam Leffler 	case S_RX_PHY_ERR:	STAT(rx_phyerr);
6192f549d72SSam Leffler 	case S_RX_PHY_UNDERRUN:	PHY(HAL_PHYERR_UNDERRUN);
6202f549d72SSam Leffler 	case S_RX_PHY_TIMING:	PHY(HAL_PHYERR_TIMING);
6212f549d72SSam Leffler 	case S_RX_PHY_PARITY:	PHY(HAL_PHYERR_PARITY);
6222f549d72SSam Leffler 	case S_RX_PHY_RATE:	PHY(HAL_PHYERR_RATE);
6232f549d72SSam Leffler 	case S_RX_PHY_LENGTH:	PHY(HAL_PHYERR_LENGTH);
6242f549d72SSam Leffler 	case S_RX_PHY_RADAR:	PHY(HAL_PHYERR_RADAR);
6252f549d72SSam Leffler 	case S_RX_PHY_SERVICE:	PHY(HAL_PHYERR_SERVICE);
6262f549d72SSam Leffler 	case S_RX_PHY_TOR:	PHY(HAL_PHYERR_TOR);
6272f549d72SSam Leffler 	case S_RX_PHY_OFDM_TIMING:	  PHY(HAL_PHYERR_OFDM_TIMING);
6282f549d72SSam Leffler 	case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY);
6292f549d72SSam Leffler 	case S_RX_PHY_OFDM_RATE_ILLEGAL:  PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL);
6302f549d72SSam Leffler 	case S_RX_PHY_OFDM_POWER_DROP:	  PHY(HAL_PHYERR_OFDM_POWER_DROP);
6312f549d72SSam Leffler 	case S_RX_PHY_OFDM_SERVICE:	  PHY(HAL_PHYERR_OFDM_SERVICE);
6322f549d72SSam Leffler 	case S_RX_PHY_OFDM_RESTART:	  PHY(HAL_PHYERR_OFDM_RESTART);
6332f549d72SSam Leffler 	case S_RX_PHY_CCK_TIMING:	  PHY(HAL_PHYERR_CCK_TIMING);
6342f549d72SSam Leffler 	case S_RX_PHY_CCK_HEADER_CRC:	  PHY(HAL_PHYERR_CCK_HEADER_CRC);
6352f549d72SSam Leffler 	case S_RX_PHY_CCK_RATE_ILLEGAL:	  PHY(HAL_PHYERR_CCK_RATE_ILLEGAL);
6362f549d72SSam Leffler 	case S_RX_PHY_CCK_SERVICE:	  PHY(HAL_PHYERR_CCK_SERVICE);
6372f549d72SSam Leffler 	case S_RX_PHY_CCK_RESTART:	  PHY(HAL_PHYERR_CCK_RESTART);
6382f549d72SSam Leffler 	case S_RX_TOOSHORT:	STAT(rx_tooshort);
6392f549d72SSam Leffler 	case S_RX_TOOBIG:	STAT(rx_toobig);
6402f549d72SSam Leffler 	case S_RX_MGT:		STAT(rx_mgt);
6412f549d72SSam Leffler 	case S_RX_CTL:		STAT(rx_ctl);
6422f549d72SSam Leffler 	case S_TX_RSSI:
643207ae002SSam Leffler 		snprintf(b, bs, "%d", wf->cur.ath.ast_tx_rssi);
6442f549d72SSam Leffler 		return 1;
6452f549d72SSam Leffler 	case S_RX_RSSI:
646207ae002SSam Leffler 		snprintf(b, bs, "%d", wf->cur.ath.ast_rx_rssi);
6472f549d72SSam Leffler 		return 1;
6482f549d72SSam Leffler 	case S_BE_XMIT:		STAT(be_xmit);
6492f549d72SSam Leffler 	case S_BE_NOMBUF:	STAT(be_nombuf);
6502f549d72SSam Leffler 	case S_PER_CAL:		STAT(per_cal);
6512f549d72SSam Leffler 	case S_PER_CALFAIL:	STAT(per_calfail);
6522f549d72SSam Leffler 	case S_PER_RFGAIN:	STAT(per_rfgain);
6532f549d72SSam Leffler #ifdef S_TDMA_UPDATE
6542f549d72SSam Leffler 	case S_TDMA_UPDATE:	STAT(tdma_update);
6552f549d72SSam Leffler 	case S_TDMA_TIMERS:	STAT(tdma_timers);
6562f549d72SSam Leffler 	case S_TDMA_TSF:	STAT(tdma_tsf);
65710ad9a77SSam Leffler 	case S_TDMA_TSFADJ:
65810ad9a77SSam Leffler 		snprintf(b, bs, "-%d/+%d",
65910ad9a77SSam Leffler 		    wf->cur.ath.ast_tdma_tsfadjm, wf->cur.ath.ast_tdma_tsfadjp);
66010ad9a77SSam Leffler 		return 1;
661cc5912f8SSam Leffler 	case S_TDMA_ACK:	STAT(tdma_ack);
6622f549d72SSam Leffler #endif
6632f549d72SSam Leffler 	case S_RATE_CALLS:	STAT(rate_calls);
6642f549d72SSam Leffler 	case S_RATE_RAISE:	STAT(rate_raise);
6652f549d72SSam Leffler 	case S_RATE_DROP:	STAT(rate_drop);
6662f549d72SSam Leffler 	case S_ANT_DEFSWITCH:	STAT(ant_defswitch);
6672f549d72SSam Leffler 	case S_ANT_TXSWITCH:	STAT(ant_txswitch);
6684d490647SSam Leffler #ifdef S_ANI_NOISE
6694d490647SSam Leffler 	case S_ANI_NOISE:	ANI(noiseImmunityLevel);
6704d490647SSam Leffler 	case S_ANI_SPUR:	ANI(spurImmunityLevel);
6714d490647SSam Leffler 	case S_ANI_STEP:	ANI(firstepLevel);
6724d490647SSam Leffler 	case S_ANI_OFDM:	ANI(ofdmWeakSigDetectOff);
67304fc88d5SSam Leffler 	case S_ANI_CCK:		ANI(cckWeakSigThreshold);
6744d490647SSam Leffler 	case S_ANI_LISTEN:	ANI(listenTime);
6754d490647SSam Leffler 	case S_ANI_NIUP:	ANISTAT(niup);
6764d490647SSam Leffler 	case S_ANI_NIDOWN:	ANISTAT(nidown);
6774d490647SSam Leffler 	case S_ANI_SIUP:	ANISTAT(spurup);
6784d490647SSam Leffler 	case S_ANI_SIDOWN:	ANISTAT(spurdown);
6794d490647SSam Leffler 	case S_ANI_OFDMON:	ANISTAT(ofdmon);
6804d490647SSam Leffler 	case S_ANI_OFDMOFF:	ANISTAT(ofdmoff);
6814d490647SSam Leffler 	case S_ANI_CCKHI:	ANISTAT(cckhigh);
6824d490647SSam Leffler 	case S_ANI_CCKLO:	ANISTAT(ccklow);
6834d490647SSam Leffler 	case S_ANI_STEPUP:	ANISTAT(stepup);
6844d490647SSam Leffler 	case S_ANI_STEPDOWN:	ANISTAT(stepdown);
6854d490647SSam Leffler 	case S_ANI_OFDMERRS:	ANISTAT(ofdmerrs);
6864d490647SSam Leffler 	case S_ANI_CCKERRS:	ANISTAT(cckerrs);
6874d490647SSam Leffler 	case S_ANI_RESET:	ANISTAT(reset);
6884d490647SSam Leffler 	case S_ANI_LZERO:	ANISTAT(lzero);
6894d490647SSam Leffler 	case S_ANI_LNEG:	ANISTAT(lneg);
6904d490647SSam Leffler 	case S_MIB_ACKBAD:	MIBSTAT(ackrcv_bad);
6914d490647SSam Leffler 	case S_MIB_RTSBAD:	MIBSTAT(rts_bad);
6924d490647SSam Leffler 	case S_MIB_RTSGOOD:	MIBSTAT(rts_good);
6934d490647SSam Leffler 	case S_MIB_FCSBAD:	MIBSTAT(fcs_bad);
6944d490647SSam Leffler 	case S_MIB_BEACONS:	MIBSTAT(beacons);
6954d490647SSam Leffler 	case S_NODE_AVGBRSSI:
6964d490647SSam Leffler 		snprintf(b, bs, "%u",
6974d490647SSam Leffler 		    HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgbrssi));
6984d490647SSam Leffler 		return 1;
6994d490647SSam Leffler 	case S_NODE_AVGRSSI:
7004d490647SSam Leffler 		snprintf(b, bs, "%u",
7014d490647SSam Leffler 		    HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgrssi));
7024d490647SSam Leffler 		return 1;
7034d490647SSam Leffler 	case S_NODE_AVGARSSI:
7044d490647SSam Leffler 		snprintf(b, bs, "%u",
7054d490647SSam Leffler 		    HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgtxrssi));
7064d490647SSam Leffler 		return 1;
7074d490647SSam Leffler #endif
7082f549d72SSam Leffler 	case S_ANT_TX0:		TXANT(0);
7092f549d72SSam Leffler 	case S_ANT_TX1:		TXANT(1);
7102f549d72SSam Leffler 	case S_ANT_TX2:		TXANT(2);
7112f549d72SSam Leffler 	case S_ANT_TX3:		TXANT(3);
7122f549d72SSam Leffler 	case S_ANT_TX4:		TXANT(4);
7132f549d72SSam Leffler 	case S_ANT_TX5:		TXANT(5);
7142f549d72SSam Leffler 	case S_ANT_TX6:		TXANT(6);
7152f549d72SSam Leffler 	case S_ANT_TX7:		TXANT(7);
7162f549d72SSam Leffler 	case S_ANT_RX0:		RXANT(0);
7172f549d72SSam Leffler 	case S_ANT_RX1:		RXANT(1);
7182f549d72SSam Leffler 	case S_ANT_RX2:		RXANT(2);
7192f549d72SSam Leffler 	case S_ANT_RX3:		RXANT(3);
7202f549d72SSam Leffler 	case S_ANT_RX4:		RXANT(4);
7212f549d72SSam Leffler 	case S_ANT_RX5:		RXANT(5);
7222f549d72SSam Leffler 	case S_ANT_RX6:		RXANT(6);
7232f549d72SSam Leffler 	case S_ANT_RX7:		RXANT(7);
7242f549d72SSam Leffler #ifdef S_CABQ_XMIT
7252f549d72SSam Leffler 	case S_CABQ_XMIT:	STAT(cabq_xmit);
7262f549d72SSam Leffler 	case S_CABQ_BUSY:	STAT(cabq_busy);
7272f549d72SSam Leffler #endif
7282f549d72SSam Leffler 	case S_FF_TXOK:		STAT(ff_txok);
7292f549d72SSam Leffler 	case S_FF_TXERR:	STAT(ff_txerr);
730207ae002SSam Leffler 	case S_FF_RX:		STAT(ff_rx);
7312f549d72SSam Leffler 	case S_FF_FLUSH:	STAT(ff_flush);
732207ae002SSam Leffler 	case S_TX_QFULL:	STAT(tx_qfull);
733d90b001eSAdrian Chadd 	case S_BMISSCOUNT:	STAT(be_missed);
7342f549d72SSam Leffler 	case S_RX_NOISE:
735207ae002SSam Leffler 		snprintf(b, bs, "%d", wf->cur.ath.ast_rx_noise);
7362f549d72SSam Leffler 		return 1;
7372f549d72SSam Leffler 	case S_TX_SIGNAL:
7382f549d72SSam Leffler 		snprintf(b, bs, "%d",
739207ae002SSam Leffler 			wf->cur.ath.ast_tx_rssi + wf->cur.ath.ast_rx_noise);
7402f549d72SSam Leffler 		return 1;
7412f549d72SSam Leffler 	case S_RX_SIGNAL:
7422f549d72SSam Leffler 		snprintf(b, bs, "%d",
743207ae002SSam Leffler 			wf->cur.ath.ast_rx_rssi + wf->cur.ath.ast_rx_noise);
7442f549d72SSam Leffler 		return 1;
745b1b75b3bSAdrian Chadd 	case S_RX_AGG:		STAT(rx_agg);
746b1b75b3bSAdrian Chadd 	case S_RX_HALFGI:	STAT(rx_halfgi);
747b1b75b3bSAdrian Chadd 	case S_RX_2040:		STAT(rx_2040);
748b1b75b3bSAdrian Chadd 	case S_RX_PRE_CRC_ERR:	STAT(rx_pre_crc_err);
749b1b75b3bSAdrian Chadd 	case S_RX_POST_CRC_ERR:	STAT(rx_post_crc_err);
750b1b75b3bSAdrian Chadd 	case S_RX_DECRYPT_BUSY_ERR:	STAT(rx_decrypt_busy_err);
751b1b75b3bSAdrian Chadd 	case S_RX_HI_CHAIN:	STAT(rx_hi_rx_chain);
7522cdc5a48SAdrian Chadd 	case S_RX_STBC:		STAT(rx_stbc);
753b1b75b3bSAdrian Chadd 	case S_TX_HTPROTECT:	STAT(tx_htprotect);
754b1b75b3bSAdrian Chadd 	case S_RX_QEND:		STAT(rx_hitqueueend);
755b1b75b3bSAdrian Chadd 	case S_TX_TIMEOUT:	STAT(tx_timeout);
756b1b75b3bSAdrian Chadd 	case S_TX_CSTIMEOUT:	STAT(tx_cst);
757b1b75b3bSAdrian Chadd 	case S_TX_XTXOP_ERR:	STAT(tx_xtxop);
758b1b75b3bSAdrian Chadd 	case S_TX_TIMEREXPIRED_ERR:	STAT(tx_timerexpired);
759b1b75b3bSAdrian Chadd 	case S_TX_DESCCFG_ERR:	STAT(tx_desccfgerr);
760b1b75b3bSAdrian Chadd 	case S_TX_SWRETRIES:	STAT(tx_swretries);
761b1b75b3bSAdrian Chadd 	case S_TX_SWRETRIES_MAX:	STAT(tx_swretrymax);
762b1b75b3bSAdrian Chadd 	case S_TX_DATA_UNDERRUN:	STAT(tx_data_underrun);
763b1b75b3bSAdrian Chadd 	case S_TX_DELIM_UNDERRUN:	STAT(tx_delim_underrun);
7641df8da4cSAdrian Chadd 	case S_TX_AGGR_OK:		STAT(tx_aggr_ok);
7651df8da4cSAdrian Chadd 	case S_TX_AGGR_FAIL:		STAT(tx_aggr_fail);
7661df8da4cSAdrian Chadd 	case S_TX_AGGR_FAILALL:		STAT(tx_aggr_failall);
7672f549d72SSam Leffler 	}
7682f549d72SSam Leffler 	b[0] = '\0';
76912f961f4SSam Leffler 	return 0;
7702f549d72SSam Leffler #undef RXANT
7712f549d72SSam Leffler #undef TXANT
7724d490647SSam Leffler #undef ANI
7734d490647SSam Leffler #undef ANISTAT
7744d490647SSam Leffler #undef MIBSTAT
7752f549d72SSam Leffler #undef PHY
7762f549d72SSam Leffler #undef STAT
7772f549d72SSam Leffler }
7782f549d72SSam Leffler 
7792f549d72SSam Leffler static int
78015abc53aSAdrian Chadd ath_get_totstat(struct bsdstat *sf, int s, char b[], size_t bs)
7812f549d72SSam Leffler {
7822f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
7832f549d72SSam Leffler #define	STAT(x) \
78495d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ath.ast_##x); return 1
7852f549d72SSam Leffler #define	PHY(x) \
78695d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ath.ast_rx_phy[x]); return 1
7874d490647SSam Leffler #define	ANI(x) \
78895d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ani_state.x); return 1
7894d490647SSam Leffler #define	ANISTAT(x) \
79095d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ani_stats.ast_ani_##x); return 1
7914d490647SSam Leffler #define	MIBSTAT(x) \
79295d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ani_stats.ast_mibstats.x); return 1
7932f549d72SSam Leffler #define	TXANT(x) \
79495d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ath.ast_ant_tx[x]); return 1
7952f549d72SSam Leffler #define	RXANT(x) \
79695d7bf0fSSam Leffler 	snprintf(b, bs, "%u", wf->total.ath.ast_ant_rx[x]); return 1
7972f549d72SSam Leffler 
7982f549d72SSam Leffler 	switch (s) {
7992f549d72SSam Leffler 	case S_INPUT:
80095d7bf0fSSam Leffler 		snprintf(b, bs, "%lu",
801d3385328SAdrian Chadd 		    (unsigned long) wf->total.ath.ast_rx_packets -
802d3385328SAdrian Chadd 		    (unsigned long) wf->total.ath.ast_rx_mgt);
8032f549d72SSam Leffler 		return 1;
8042f549d72SSam Leffler 	case S_OUTPUT:
805d3385328SAdrian Chadd 		snprintf(b, bs, "%lu",
806d3385328SAdrian Chadd 		    (unsigned long) wf->total.ath.ast_tx_packets);
8072f549d72SSam Leffler 		return 1;
8082f549d72SSam Leffler 	case S_RATE:
8094d490647SSam Leffler 		snprintrate(b, bs, wf->total.ath.ast_tx_rate);
8102f549d72SSam Leffler 		return 1;
8112f549d72SSam Leffler 	case S_WATCHDOG:	STAT(watchdog);
8122f549d72SSam Leffler 	case S_FATAL:		STAT(hardware);
8132f549d72SSam Leffler 	case S_BMISS:		STAT(bmiss);
8142f549d72SSam Leffler 	case S_BMISS_PHANTOM:	STAT(bmiss_phantom);
8152f549d72SSam Leffler #ifdef S_BSTUCK
8162f549d72SSam Leffler 	case S_BSTUCK:		STAT(bstuck);
8172f549d72SSam Leffler #endif
8182f549d72SSam Leffler 	case S_RXORN:		STAT(rxorn);
8192f549d72SSam Leffler 	case S_RXEOL:		STAT(rxeol);
8202f549d72SSam Leffler 	case S_TXURN:		STAT(txurn);
8212f549d72SSam Leffler 	case S_MIB:		STAT(mib);
8222f549d72SSam Leffler #ifdef S_INTRCOAL
8232f549d72SSam Leffler 	case S_INTRCOAL:	STAT(intrcoal);
8242f549d72SSam Leffler #endif
8252f549d72SSam Leffler 	case S_TX_MGMT:		STAT(tx_mgmt);
8262f549d72SSam Leffler 	case S_TX_DISCARD:	STAT(tx_discard);
8272f549d72SSam Leffler 	case S_TX_QSTOP:	STAT(tx_qstop);
8282f549d72SSam Leffler 	case S_TX_ENCAP:	STAT(tx_encap);
8292f549d72SSam Leffler 	case S_TX_NONODE:	STAT(tx_nonode);
83041e449dbSSam Leffler 	case S_TX_NOBUF:	STAT(tx_nobuf);
83141e449dbSSam Leffler 	case S_TX_NOFRAG:	STAT(tx_nofrag);
8322f549d72SSam Leffler 	case S_TX_NOMBUF:	STAT(tx_nombuf);
8332f549d72SSam Leffler #ifdef S_TX_NOMCL
8342f549d72SSam Leffler 	case S_TX_NOMCL:	STAT(tx_nomcl);
8352f549d72SSam Leffler 	case S_TX_LINEAR:	STAT(tx_linear);
8362f549d72SSam Leffler 	case S_TX_NODATA:	STAT(tx_nodata);
8372f549d72SSam Leffler 	case S_TX_BUSDMA:	STAT(tx_busdma);
8382f549d72SSam Leffler #endif
8392f549d72SSam Leffler 	case S_TX_XRETRIES:	STAT(tx_xretries);
8402f549d72SSam Leffler 	case S_TX_FIFOERR:	STAT(tx_fifoerr);
8412f549d72SSam Leffler 	case S_TX_FILTERED:	STAT(tx_filtered);
8422f549d72SSam Leffler 	case S_TX_SHORTRETRY:	STAT(tx_shortretry);
8432f549d72SSam Leffler 	case S_TX_LONGRETRY:	STAT(tx_longretry);
8442f549d72SSam Leffler 	case S_TX_BADRATE:	STAT(tx_badrate);
8452f549d72SSam Leffler 	case S_TX_NOACK:	STAT(tx_noack);
8462f549d72SSam Leffler 	case S_TX_RTS:		STAT(tx_rts);
8472f549d72SSam Leffler 	case S_TX_CTS:		STAT(tx_cts);
8482f549d72SSam Leffler 	case S_TX_SHORTPRE:	STAT(tx_shortpre);
8492f549d72SSam Leffler 	case S_TX_ALTRATE:	STAT(tx_altrate);
8502f549d72SSam Leffler 	case S_TX_PROTECT:	STAT(tx_protect);
851cc5912f8SSam Leffler 	case S_TX_RAW:		STAT(tx_raw);
852cc5912f8SSam Leffler 	case S_TX_RAW_FAIL:	STAT(tx_raw_fail);
8532f549d72SSam Leffler 	case S_RX_NOMBUF:	STAT(rx_nombuf);
8542f549d72SSam Leffler #ifdef S_RX_BUSDMA
8552f549d72SSam Leffler 	case S_RX_BUSDMA:	STAT(rx_busdma);
8562f549d72SSam Leffler #endif
8572f549d72SSam Leffler 	case S_RX_ORN:		STAT(rx_orn);
8582f549d72SSam Leffler 	case S_RX_CRC_ERR:	STAT(rx_crcerr);
8592f549d72SSam Leffler 	case S_RX_FIFO_ERR: 	STAT(rx_fifoerr);
8602f549d72SSam Leffler 	case S_RX_CRYPTO_ERR: 	STAT(rx_badcrypt);
8612f549d72SSam Leffler 	case S_RX_MIC_ERR:	STAT(rx_badmic);
8622f549d72SSam Leffler 	case S_RX_PHY_ERR:	STAT(rx_phyerr);
8632f549d72SSam Leffler 	case S_RX_PHY_UNDERRUN:	PHY(HAL_PHYERR_UNDERRUN);
8642f549d72SSam Leffler 	case S_RX_PHY_TIMING:	PHY(HAL_PHYERR_TIMING);
8652f549d72SSam Leffler 	case S_RX_PHY_PARITY:	PHY(HAL_PHYERR_PARITY);
8662f549d72SSam Leffler 	case S_RX_PHY_RATE:	PHY(HAL_PHYERR_RATE);
8672f549d72SSam Leffler 	case S_RX_PHY_LENGTH:	PHY(HAL_PHYERR_LENGTH);
8682f549d72SSam Leffler 	case S_RX_PHY_RADAR:	PHY(HAL_PHYERR_RADAR);
8692f549d72SSam Leffler 	case S_RX_PHY_SERVICE:	PHY(HAL_PHYERR_SERVICE);
8702f549d72SSam Leffler 	case S_RX_PHY_TOR:	PHY(HAL_PHYERR_TOR);
8712f549d72SSam Leffler 	case S_RX_PHY_OFDM_TIMING:	  PHY(HAL_PHYERR_OFDM_TIMING);
8722f549d72SSam Leffler 	case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY);
8732f549d72SSam Leffler 	case S_RX_PHY_OFDM_RATE_ILLEGAL:  PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL);
8742f549d72SSam Leffler 	case S_RX_PHY_OFDM_POWER_DROP:	  PHY(HAL_PHYERR_OFDM_POWER_DROP);
8752f549d72SSam Leffler 	case S_RX_PHY_OFDM_SERVICE:	  PHY(HAL_PHYERR_OFDM_SERVICE);
8762f549d72SSam Leffler 	case S_RX_PHY_OFDM_RESTART:	  PHY(HAL_PHYERR_OFDM_RESTART);
8772f549d72SSam Leffler 	case S_RX_PHY_CCK_TIMING:	  PHY(HAL_PHYERR_CCK_TIMING);
8782f549d72SSam Leffler 	case S_RX_PHY_CCK_HEADER_CRC:	  PHY(HAL_PHYERR_CCK_HEADER_CRC);
8792f549d72SSam Leffler 	case S_RX_PHY_CCK_RATE_ILLEGAL:	  PHY(HAL_PHYERR_CCK_RATE_ILLEGAL);
8802f549d72SSam Leffler 	case S_RX_PHY_CCK_SERVICE:	  PHY(HAL_PHYERR_CCK_SERVICE);
8812f549d72SSam Leffler 	case S_RX_PHY_CCK_RESTART:	  PHY(HAL_PHYERR_CCK_RESTART);
8822f549d72SSam Leffler 	case S_RX_TOOSHORT:	STAT(rx_tooshort);
8832f549d72SSam Leffler 	case S_RX_TOOBIG:	STAT(rx_toobig);
8842f549d72SSam Leffler 	case S_RX_MGT:		STAT(rx_mgt);
8852f549d72SSam Leffler 	case S_RX_CTL:		STAT(rx_ctl);
8862f549d72SSam Leffler 	case S_TX_RSSI:
887207ae002SSam Leffler 		snprintf(b, bs, "%d", wf->total.ath.ast_tx_rssi);
8882f549d72SSam Leffler 		return 1;
8892f549d72SSam Leffler 	case S_RX_RSSI:
890207ae002SSam Leffler 		snprintf(b, bs, "%d", wf->total.ath.ast_rx_rssi);
8912f549d72SSam Leffler 		return 1;
8922f549d72SSam Leffler 	case S_BE_XMIT:		STAT(be_xmit);
8932f549d72SSam Leffler 	case S_BE_NOMBUF:	STAT(be_nombuf);
8942f549d72SSam Leffler 	case S_PER_CAL:		STAT(per_cal);
8952f549d72SSam Leffler 	case S_PER_CALFAIL:	STAT(per_calfail);
8962f549d72SSam Leffler 	case S_PER_RFGAIN:	STAT(per_rfgain);
8972f549d72SSam Leffler #ifdef S_TDMA_UPDATE
8982f549d72SSam Leffler 	case S_TDMA_UPDATE:	STAT(tdma_update);
8992f549d72SSam Leffler 	case S_TDMA_TIMERS:	STAT(tdma_timers);
9002f549d72SSam Leffler 	case S_TDMA_TSF:	STAT(tdma_tsf);
90110ad9a77SSam Leffler 	case S_TDMA_TSFADJ:
90210ad9a77SSam Leffler 		snprintf(b, bs, "-%d/+%d",
90310ad9a77SSam Leffler 		    wf->total.ath.ast_tdma_tsfadjm,
90410ad9a77SSam Leffler 		    wf->total.ath.ast_tdma_tsfadjp);
90510ad9a77SSam Leffler 		return 1;
906cc5912f8SSam Leffler 	case S_TDMA_ACK:	STAT(tdma_ack);
9072f549d72SSam Leffler #endif
9082f549d72SSam Leffler 	case S_RATE_CALLS:	STAT(rate_calls);
9092f549d72SSam Leffler 	case S_RATE_RAISE:	STAT(rate_raise);
9102f549d72SSam Leffler 	case S_RATE_DROP:	STAT(rate_drop);
9112f549d72SSam Leffler 	case S_ANT_DEFSWITCH:	STAT(ant_defswitch);
9122f549d72SSam Leffler 	case S_ANT_TXSWITCH:	STAT(ant_txswitch);
9134d490647SSam Leffler #ifdef S_ANI_NOISE
9144d490647SSam Leffler 	case S_ANI_NOISE:	ANI(noiseImmunityLevel);
9154d490647SSam Leffler 	case S_ANI_SPUR:	ANI(spurImmunityLevel);
9164d490647SSam Leffler 	case S_ANI_STEP:	ANI(firstepLevel);
91704fc88d5SSam Leffler 	case S_ANI_OFDM:	ANI(ofdmWeakSigDetectOff);
91804fc88d5SSam Leffler 	case S_ANI_CCK:		ANI(cckWeakSigThreshold);
9194d490647SSam Leffler 	case S_ANI_LISTEN:	ANI(listenTime);
9204d490647SSam Leffler 	case S_ANI_NIUP:	ANISTAT(niup);
9214d490647SSam Leffler 	case S_ANI_NIDOWN:	ANISTAT(nidown);
9224d490647SSam Leffler 	case S_ANI_SIUP:	ANISTAT(spurup);
9234d490647SSam Leffler 	case S_ANI_SIDOWN:	ANISTAT(spurdown);
9244d490647SSam Leffler 	case S_ANI_OFDMON:	ANISTAT(ofdmon);
9254d490647SSam Leffler 	case S_ANI_OFDMOFF:	ANISTAT(ofdmoff);
9264d490647SSam Leffler 	case S_ANI_CCKHI:	ANISTAT(cckhigh);
9274d490647SSam Leffler 	case S_ANI_CCKLO:	ANISTAT(ccklow);
9284d490647SSam Leffler 	case S_ANI_STEPUP:	ANISTAT(stepup);
9294d490647SSam Leffler 	case S_ANI_STEPDOWN:	ANISTAT(stepdown);
9304d490647SSam Leffler 	case S_ANI_OFDMERRS:	ANISTAT(ofdmerrs);
9314d490647SSam Leffler 	case S_ANI_CCKERRS:	ANISTAT(cckerrs);
9324d490647SSam Leffler 	case S_ANI_RESET:	ANISTAT(reset);
9334d490647SSam Leffler 	case S_ANI_LZERO:	ANISTAT(lzero);
9344d490647SSam Leffler 	case S_ANI_LNEG:	ANISTAT(lneg);
9354d490647SSam Leffler 	case S_MIB_ACKBAD:	MIBSTAT(ackrcv_bad);
9364d490647SSam Leffler 	case S_MIB_RTSBAD:	MIBSTAT(rts_bad);
9374d490647SSam Leffler 	case S_MIB_RTSGOOD:	MIBSTAT(rts_good);
9384d490647SSam Leffler 	case S_MIB_FCSBAD:	MIBSTAT(fcs_bad);
9394d490647SSam Leffler 	case S_MIB_BEACONS:	MIBSTAT(beacons);
9404d490647SSam Leffler 	case S_NODE_AVGBRSSI:
9414d490647SSam Leffler 		snprintf(b, bs, "%u",
9424d490647SSam Leffler 		    HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgbrssi));
9434d490647SSam Leffler 		return 1;
9444d490647SSam Leffler 	case S_NODE_AVGRSSI:
9454d490647SSam Leffler 		snprintf(b, bs, "%u",
9464d490647SSam Leffler 		    HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgrssi));
9474d490647SSam Leffler 		return 1;
9484d490647SSam Leffler 	case S_NODE_AVGARSSI:
9494d490647SSam Leffler 		snprintf(b, bs, "%u",
9504d490647SSam Leffler 		    HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgtxrssi));
9514d490647SSam Leffler 		return 1;
9524d490647SSam Leffler #endif
9532f549d72SSam Leffler 	case S_ANT_TX0:		TXANT(0);
9542f549d72SSam Leffler 	case S_ANT_TX1:		TXANT(1);
9552f549d72SSam Leffler 	case S_ANT_TX2:		TXANT(2);
9562f549d72SSam Leffler 	case S_ANT_TX3:		TXANT(3);
9572f549d72SSam Leffler 	case S_ANT_TX4:		TXANT(4);
9582f549d72SSam Leffler 	case S_ANT_TX5:		TXANT(5);
9592f549d72SSam Leffler 	case S_ANT_TX6:		TXANT(6);
9602f549d72SSam Leffler 	case S_ANT_TX7:		TXANT(7);
9612f549d72SSam Leffler 	case S_ANT_RX0:		RXANT(0);
9622f549d72SSam Leffler 	case S_ANT_RX1:		RXANT(1);
9632f549d72SSam Leffler 	case S_ANT_RX2:		RXANT(2);
9642f549d72SSam Leffler 	case S_ANT_RX3:		RXANT(3);
9652f549d72SSam Leffler 	case S_ANT_RX4:		RXANT(4);
9662f549d72SSam Leffler 	case S_ANT_RX5:		RXANT(5);
9672f549d72SSam Leffler 	case S_ANT_RX6:		RXANT(6);
9682f549d72SSam Leffler 	case S_ANT_RX7:		RXANT(7);
9692f549d72SSam Leffler #ifdef S_CABQ_XMIT
9702f549d72SSam Leffler 	case S_CABQ_XMIT:	STAT(cabq_xmit);
9712f549d72SSam Leffler 	case S_CABQ_BUSY:	STAT(cabq_busy);
9722f549d72SSam Leffler #endif
9732f549d72SSam Leffler 	case S_FF_TXOK:		STAT(ff_txok);
9742f549d72SSam Leffler 	case S_FF_TXERR:	STAT(ff_txerr);
975207ae002SSam Leffler 	case S_FF_RX:		STAT(ff_rx);
9762f549d72SSam Leffler 	case S_FF_FLUSH:	STAT(ff_flush);
977207ae002SSam Leffler 	case S_TX_QFULL:	STAT(tx_qfull);
978d90b001eSAdrian Chadd 	case S_BMISSCOUNT:	STAT(be_missed);
9792f549d72SSam Leffler 	case S_RX_NOISE:
980207ae002SSam Leffler 		snprintf(b, bs, "%d", wf->total.ath.ast_rx_noise);
9812f549d72SSam Leffler 		return 1;
9822f549d72SSam Leffler 	case S_TX_SIGNAL:
9832f549d72SSam Leffler 		snprintf(b, bs, "%d",
984207ae002SSam Leffler 			wf->total.ath.ast_tx_rssi + wf->total.ath.ast_rx_noise);
9852f549d72SSam Leffler 		return 1;
9862f549d72SSam Leffler 	case S_RX_SIGNAL:
9872f549d72SSam Leffler 		snprintf(b, bs, "%d",
988207ae002SSam Leffler 			wf->total.ath.ast_rx_rssi + wf->total.ath.ast_rx_noise);
9892f549d72SSam Leffler 		return 1;
990b1b75b3bSAdrian Chadd 	case S_RX_AGG:		STAT(rx_agg);
991b1b75b3bSAdrian Chadd 	case S_RX_HALFGI:	STAT(rx_halfgi);
992b1b75b3bSAdrian Chadd 	case S_RX_2040:		STAT(rx_2040);
993b1b75b3bSAdrian Chadd 	case S_RX_PRE_CRC_ERR:	STAT(rx_pre_crc_err);
994b1b75b3bSAdrian Chadd 	case S_RX_POST_CRC_ERR:	STAT(rx_post_crc_err);
995b1b75b3bSAdrian Chadd 	case S_RX_DECRYPT_BUSY_ERR:	STAT(rx_decrypt_busy_err);
996b1b75b3bSAdrian Chadd 	case S_RX_HI_CHAIN:	STAT(rx_hi_rx_chain);
9972cdc5a48SAdrian Chadd 	case S_RX_STBC:		STAT(rx_stbc);
998b1b75b3bSAdrian Chadd 	case S_TX_HTPROTECT:	STAT(tx_htprotect);
999b1b75b3bSAdrian Chadd 	case S_RX_QEND:		STAT(rx_hitqueueend);
1000b1b75b3bSAdrian Chadd 	case S_TX_TIMEOUT:	STAT(tx_timeout);
1001b1b75b3bSAdrian Chadd 	case S_TX_CSTIMEOUT:	STAT(tx_cst);
1002b1b75b3bSAdrian Chadd 	case S_TX_XTXOP_ERR:	STAT(tx_xtxop);
1003b1b75b3bSAdrian Chadd 	case S_TX_TIMEREXPIRED_ERR:	STAT(tx_timerexpired);
1004b1b75b3bSAdrian Chadd 	case S_TX_DESCCFG_ERR:	STAT(tx_desccfgerr);
1005b1b75b3bSAdrian Chadd 	case S_TX_SWRETRIES:	STAT(tx_swretries);
1006b1b75b3bSAdrian Chadd 	case S_TX_SWRETRIES_MAX:	STAT(tx_swretrymax);
1007b1b75b3bSAdrian Chadd 	case S_TX_DATA_UNDERRUN:	STAT(tx_data_underrun);
1008b1b75b3bSAdrian Chadd 	case S_TX_DELIM_UNDERRUN:	STAT(tx_delim_underrun);
10091df8da4cSAdrian Chadd 	case S_TX_AGGR_OK:		STAT(tx_aggr_ok);
10101df8da4cSAdrian Chadd 	case S_TX_AGGR_FAIL:		STAT(tx_aggr_fail);
10111df8da4cSAdrian Chadd 	case S_TX_AGGR_FAILALL:		STAT(tx_aggr_failall);
10122f549d72SSam Leffler 	}
10132f549d72SSam Leffler 	b[0] = '\0';
10142f549d72SSam Leffler 	return 0;
10152f549d72SSam Leffler #undef RXANT
10162f549d72SSam Leffler #undef TXANT
10174d490647SSam Leffler #undef ANI
10184d490647SSam Leffler #undef ANISTAT
10194d490647SSam Leffler #undef MIBSTAT
10202f549d72SSam Leffler #undef PHY
10212f549d72SSam Leffler #undef STAT
10222f549d72SSam Leffler }
10232f549d72SSam Leffler 
10242f549d72SSam Leffler static void
102515abc53aSAdrian Chadd ath_print_verbose(struct bsdstat *sf, FILE *fd)
10262f549d72SSam Leffler {
10272f549d72SSam Leffler 	struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
10282f549d72SSam Leffler #define	isphyerr(i)	(S_PHY_MIN <= i && i <= S_PHY_MAX)
1029207ae002SSam Leffler 	const struct fmt *f;
10302f549d72SSam Leffler 	char s[32];
10312f549d72SSam Leffler 	const char *indent;
1032207ae002SSam Leffler 	int i, width;
10332f549d72SSam Leffler 
1034207ae002SSam Leffler 	width = 0;
1035207ae002SSam Leffler 	for (i = 0; i < S_LAST; i++) {
1036207ae002SSam Leffler 		f = &sf->stats[i];
1037207ae002SSam Leffler 		if (!isphyerr(i) && f->width > width)
1038207ae002SSam Leffler 			width = f->width;
1039207ae002SSam Leffler 	}
10402f549d72SSam Leffler 	for (i = 0; i < S_LAST; i++) {
10412f549d72SSam Leffler 		if (ath_get_totstat(sf, i, s, sizeof(s)) && strcmp(s, "0")) {
10422f549d72SSam Leffler 			if (isphyerr(i))
10432f549d72SSam Leffler 				indent = "    ";
10442f549d72SSam Leffler 			else
10452f549d72SSam Leffler 				indent = "";
1046207ae002SSam Leffler 			fprintf(fd, "%s%-*s %s\n", indent, width, s, athstats[i].desc);
10472f549d72SSam Leffler 		}
10482f549d72SSam Leffler 	}
10492f549d72SSam Leffler 	fprintf(fd, "Antenna profile:\n");
10502f549d72SSam Leffler 	for (i = 0; i < 8; i++)
1051207ae002SSam Leffler 		if (wf->total.ath.ast_ant_rx[i] || wf->total.ath.ast_ant_tx[i])
10522f549d72SSam Leffler 			fprintf(fd, "[%u] tx %8u rx %8u\n", i,
1053207ae002SSam Leffler 				wf->total.ath.ast_ant_tx[i],
1054207ae002SSam Leffler 				wf->total.ath.ast_ant_rx[i]);
10552f549d72SSam Leffler #undef isphyerr
10562f549d72SSam Leffler }
10572f549d72SSam Leffler 
105815abc53aSAdrian Chadd BSDSTAT_DEFINE_BOUNCE(athstatfoo)
10592f549d72SSam Leffler 
10602f549d72SSam Leffler struct athstatfoo *
10612f549d72SSam Leffler athstats_new(const char *ifname, const char *fmtstring)
10622f549d72SSam Leffler {
10632f549d72SSam Leffler 	struct athstatfoo_p *wf;
10642f549d72SSam Leffler 
10652f549d72SSam Leffler 	wf = calloc(1, sizeof(struct athstatfoo_p));
10662f549d72SSam Leffler 	if (wf != NULL) {
1067*60caf0c9SCraig Rodrigues 		bsdstat_init(&wf->base.base, "athstats", athstats,
1068*60caf0c9SCraig Rodrigues 		    nitems(athstats));
10692f549d72SSam Leffler 		/* override base methods */
10702f549d72SSam Leffler 		wf->base.base.collect_cur = ath_collect_cur;
10712f549d72SSam Leffler 		wf->base.base.collect_tot = ath_collect_tot;
10722f549d72SSam Leffler 		wf->base.base.get_curstat = ath_get_curstat;
10732f549d72SSam Leffler 		wf->base.base.get_totstat = ath_get_totstat;
10742f549d72SSam Leffler 		wf->base.base.update_tot = ath_update_tot;
10752f549d72SSam Leffler 		wf->base.base.print_verbose = ath_print_verbose;
10762f549d72SSam Leffler 
10772f549d72SSam Leffler 		/* setup bounce functions for public methods */
107815abc53aSAdrian Chadd 		BSDSTAT_BOUNCE(wf, athstatfoo);
10792f549d72SSam Leffler 
10802f549d72SSam Leffler 		/* setup our public methods */
10812f549d72SSam Leffler 		wf->base.setifname = ath_setifname;
10822f549d72SSam Leffler #if 0
10832f549d72SSam Leffler 		wf->base.setstamac = wlan_setstamac;
10842f549d72SSam Leffler #endif
1085dd8d00f5SSam Leffler 		wf->base.zerostats = ath_zerostats;
10862f549d72SSam Leffler 		wf->s = socket(AF_INET, SOCK_DGRAM, 0);
10872f549d72SSam Leffler 		if (wf->s < 0)
10882f549d72SSam Leffler 			err(1, "socket");
10892f549d72SSam Leffler 
10902f549d72SSam Leffler 		ath_setifname(&wf->base, ifname);
10912f549d72SSam Leffler 		wf->base.setfmt(&wf->base, fmtstring);
10922f549d72SSam Leffler 	}
10932f549d72SSam Leffler 	return &wf->base;
109412f961f4SSam Leffler }
1095