112f961f4SSam Leffler /*- 210ad9a77SSam Leffler * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 312f961f4SSam Leffler * All rights reserved. 412f961f4SSam Leffler * 512f961f4SSam Leffler * Redistribution and use in source and binary forms, with or without 612f961f4SSam Leffler * modification, are permitted provided that the following conditions 712f961f4SSam Leffler * are met: 812f961f4SSam Leffler * 1. Redistributions of source code must retain the above copyright 912f961f4SSam Leffler * notice, this list of conditions and the following disclaimer, 1012f961f4SSam Leffler * without modification. 1112f961f4SSam Leffler * 2. Redistributions in binary form must reproduce at minimum a disclaimer 1212f961f4SSam Leffler * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 1312f961f4SSam Leffler * redistribution must be conditioned upon including a substantially 1412f961f4SSam Leffler * similar Disclaimer requirement for further binary redistribution. 1512f961f4SSam Leffler * 1612f961f4SSam Leffler * NO WARRANTY 1712f961f4SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1812f961f4SSam Leffler * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1912f961f4SSam Leffler * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 2012f961f4SSam Leffler * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 2112f961f4SSam Leffler * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 2212f961f4SSam Leffler * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2312f961f4SSam Leffler * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2412f961f4SSam Leffler * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 2512f961f4SSam Leffler * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2612f961f4SSam Leffler * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 2712f961f4SSam Leffler * THE POSSIBILITY OF SUCH DAMAGES. 2812f961f4SSam Leffler * 2912f961f4SSam Leffler * $FreeBSD$ 3012f961f4SSam Leffler */ 3112f961f4SSam Leffler 328363d9c4SAdrian Chadd #include "opt_ah.h" 338363d9c4SAdrian Chadd 3412f961f4SSam Leffler /* 352f549d72SSam Leffler * ath statistics class. 3612f961f4SSam Leffler */ 3712f961f4SSam Leffler #include <sys/types.h> 3812f961f4SSam Leffler #include <sys/file.h> 3912f961f4SSam Leffler #include <sys/sockio.h> 4012f961f4SSam Leffler #include <sys/socket.h> 4112f961f4SSam Leffler #include <net/if.h> 4212f961f4SSam Leffler #include <net/if_media.h> 4312f961f4SSam Leffler #include <net/if_var.h> 4412f961f4SSam Leffler 4512f961f4SSam Leffler #include <stdio.h> 46207ae002SSam Leffler #include <stdlib.h> 4712f961f4SSam Leffler #include <signal.h> 482f549d72SSam Leffler #include <string.h> 492f549d72SSam Leffler #include <unistd.h> 502f549d72SSam Leffler #include <err.h> 5112f961f4SSam Leffler 52207ae002SSam Leffler #include "ah.h" 53207ae002SSam Leffler #include "ah_desc.h" 54b1b75b3bSAdrian Chadd #include "net80211/ieee80211_ioctl.h" 55b1b75b3bSAdrian Chadd #include "net80211/ieee80211_radiotap.h" 56207ae002SSam Leffler #include "if_athioctl.h" 5712f961f4SSam Leffler 582f549d72SSam Leffler #include "athstats.h" 592f549d72SSam Leffler 604d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 614d490647SSam Leffler #define HAL_EP_RND(x,mul) \ 624d490647SSam Leffler ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) 634d490647SSam Leffler #define HAL_RSSI(x) HAL_EP_RND(x, HAL_RSSI_EP_MULTIPLIER) 644d490647SSam Leffler #endif 654d490647SSam Leffler 662f549d72SSam Leffler #define NOTPRESENT { 0, "", "" } 672f549d72SSam Leffler 68207ae002SSam Leffler #define AFTER(prev) ((prev)+1) 69207ae002SSam Leffler 702f549d72SSam Leffler static const struct fmt athstats[] = { 712f549d72SSam Leffler #define S_INPUT 0 7295d7bf0fSSam Leffler { 8, "input", "input", "data frames received" }, 73207ae002SSam Leffler #define S_OUTPUT AFTER(S_INPUT) 7495d7bf0fSSam Leffler { 8, "output", "output", "data frames transmit" }, 75207ae002SSam Leffler #define S_TX_ALTRATE AFTER(S_OUTPUT) 762f549d72SSam Leffler { 7, "altrate", "altrate", "tx frames with an alternate rate" }, 77207ae002SSam Leffler #define S_TX_SHORTRETRY AFTER(S_TX_ALTRATE) 7895d7bf0fSSam Leffler { 7, "short", "short", "short on-chip tx retries" }, 79207ae002SSam Leffler #define S_TX_LONGRETRY AFTER(S_TX_SHORTRETRY) 8095d7bf0fSSam Leffler { 7, "long", "long", "long on-chip tx retries" }, 81207ae002SSam Leffler #define S_TX_XRETRIES AFTER(S_TX_LONGRETRY) 822f549d72SSam Leffler { 6, "xretry", "xretry", "tx failed 'cuz too many retries" }, 83207ae002SSam Leffler #define S_MIB AFTER(S_TX_XRETRIES) 842f549d72SSam Leffler { 5, "mib", "mib", "mib overflow interrupts" }, 852f549d72SSam Leffler #ifndef __linux__ 86207ae002SSam Leffler #define S_TX_LINEAR AFTER(S_MIB) 872f549d72SSam Leffler { 5, "txlinear", "txlinear", "tx linearized to cluster" }, 88207ae002SSam Leffler #define S_BSTUCK AFTER(S_TX_LINEAR) 898e787d67SAdrian Chadd { 6, "bstuck", "bstuck", "stuck beacon conditions" }, 90207ae002SSam Leffler #define S_INTRCOAL AFTER(S_BSTUCK) 912f549d72SSam Leffler { 5, "intrcoal", "intrcoal", "interrupts coalesced" }, 92207ae002SSam Leffler #define S_RATE AFTER(S_INTRCOAL) 932f549d72SSam Leffler #else 94207ae002SSam Leffler #define S_RATE AFTER(S_MIB) 952f549d72SSam Leffler #endif 964d490647SSam Leffler { 5, "rate", "rate", "current transmit rate" }, 97207ae002SSam Leffler #define S_WATCHDOG AFTER(S_RATE) 982f549d72SSam Leffler { 5, "wdog", "wdog", "watchdog timeouts" }, 99207ae002SSam Leffler #define S_FATAL AFTER(S_WATCHDOG) 1002f549d72SSam Leffler { 5, "fatal", "fatal", "hardware error interrupts" }, 101207ae002SSam Leffler #define S_BMISS AFTER(S_FATAL) 1022f549d72SSam Leffler { 5, "bmiss", "bmiss", "beacon miss interrupts" }, 103207ae002SSam Leffler #define S_RXORN AFTER(S_BMISS) 1042f549d72SSam Leffler { 5, "rxorn", "rxorn", "recv overrun interrupts" }, 105207ae002SSam Leffler #define S_RXEOL AFTER(S_RXORN) 1062f549d72SSam Leffler { 5, "rxeol", "rxeol", "recv eol interrupts" }, 107207ae002SSam Leffler #define S_TXURN AFTER(S_RXEOL) 1082f549d72SSam Leffler { 5, "txurn", "txurn", "txmit underrun interrupts" }, 109207ae002SSam Leffler #define S_TX_MGMT AFTER(S_TXURN) 1102f549d72SSam Leffler { 5, "txmgt", "txmgt", "tx management frames" }, 111207ae002SSam Leffler #define S_TX_DISCARD AFTER(S_TX_MGMT) 1122f549d72SSam Leffler { 5, "txdisc", "txdisc", "tx frames discarded prior to association" }, 113207ae002SSam Leffler #define S_TX_INVALID AFTER(S_TX_DISCARD) 1142f549d72SSam Leffler { 5, "txinv", "txinv", "tx invalid (19)" }, 115207ae002SSam Leffler #define S_TX_QSTOP AFTER(S_TX_INVALID) 1162f549d72SSam Leffler { 5, "qstop", "qstop", "tx stopped 'cuz no xmit buffer" }, 117207ae002SSam Leffler #define S_TX_ENCAP AFTER(S_TX_QSTOP) 1182f549d72SSam Leffler { 5, "txencode", "txencode", "tx encapsulation failed" }, 119207ae002SSam Leffler #define S_TX_NONODE AFTER(S_TX_ENCAP) 1202f549d72SSam Leffler { 5, "txnonode", "txnonode", "tx failed 'cuz no node" }, 12141e449dbSSam Leffler #define S_TX_NOBUF AFTER(S_TX_NONODE) 12241e449dbSSam Leffler { 5, "txnobuf", "txnobuf", "tx failed 'cuz dma buffer allocation failed" }, 12341e449dbSSam Leffler #define S_TX_NOFRAG AFTER(S_TX_NOBUF) 12441e449dbSSam Leffler { 5, "txnofrag", "txnofrag", "tx failed 'cuz frag buffer allocation(s) failed" }, 12541e449dbSSam Leffler #define S_TX_NOMBUF AFTER(S_TX_NOFRAG) 1262f549d72SSam Leffler { 5, "txnombuf", "txnombuf", "tx failed 'cuz mbuf allocation failed" }, 1272f549d72SSam Leffler #ifndef __linux__ 128207ae002SSam Leffler #define S_TX_NOMCL AFTER(S_TX_NOMBUF) 1292f549d72SSam Leffler { 5, "txnomcl", "txnomcl", "tx failed 'cuz cluster allocation failed" }, 130207ae002SSam Leffler #define S_TX_FIFOERR AFTER(S_TX_NOMCL) 1312f549d72SSam Leffler #else 132207ae002SSam Leffler #define S_TX_FIFOERR AFTER(S_TX_NOMBUF) 1332f549d72SSam Leffler #endif 1342f549d72SSam Leffler { 5, "efifo", "efifo", "tx failed 'cuz FIFO underrun" }, 135207ae002SSam Leffler #define S_TX_FILTERED AFTER(S_TX_FIFOERR) 1362f549d72SSam Leffler { 5, "efilt", "efilt", "tx failed 'cuz destination filtered" }, 137207ae002SSam Leffler #define S_TX_BADRATE AFTER(S_TX_FILTERED) 1382f549d72SSam Leffler { 5, "txbadrate", "txbadrate", "tx failed 'cuz bogus xmit rate" }, 139207ae002SSam Leffler #define S_TX_NOACK AFTER(S_TX_BADRATE) 1402f549d72SSam Leffler { 5, "noack", "noack", "tx frames with no ack marked" }, 141207ae002SSam Leffler #define S_TX_RTS AFTER(S_TX_NOACK) 1422f549d72SSam Leffler { 5, "rts", "rts", "tx frames with rts enabled" }, 143207ae002SSam Leffler #define S_TX_CTS AFTER(S_TX_RTS) 1442f549d72SSam Leffler { 5, "cts", "cts", "tx frames with cts enabled" }, 145207ae002SSam Leffler #define S_TX_SHORTPRE AFTER(S_TX_CTS) 1462f549d72SSam Leffler { 5, "shpre", "shpre", "tx frames with short preamble" }, 147207ae002SSam Leffler #define S_TX_PROTECT AFTER(S_TX_SHORTPRE) 1482f549d72SSam Leffler { 5, "protect", "protect", "tx frames with 11g protection" }, 149207ae002SSam Leffler #define S_RX_ORN AFTER(S_TX_PROTECT) 1502f549d72SSam Leffler { 5, "rxorn", "rxorn", "rx failed 'cuz of desc overrun" }, 151207ae002SSam Leffler #define S_RX_CRC_ERR AFTER(S_RX_ORN) 1522f549d72SSam Leffler { 6, "crcerr", "crcerr", "rx failed 'cuz of bad CRC" }, 153207ae002SSam Leffler #define S_RX_FIFO_ERR AFTER(S_RX_CRC_ERR) 1542f549d72SSam Leffler { 5, "rxfifo", "rxfifo", "rx failed 'cuz of FIFO overrun" }, 155207ae002SSam Leffler #define S_RX_CRYPTO_ERR AFTER(S_RX_FIFO_ERR) 1562f549d72SSam Leffler { 5, "crypt", "crypt", "rx failed 'cuz decryption" }, 157207ae002SSam Leffler #define S_RX_MIC_ERR AFTER(S_RX_CRYPTO_ERR) 1582f549d72SSam Leffler { 4, "mic", "mic", "rx failed 'cuz MIC failure" }, 159207ae002SSam Leffler #define S_RX_TOOSHORT AFTER(S_RX_MIC_ERR) 1602f549d72SSam Leffler { 5, "rxshort", "rxshort", "rx failed 'cuz frame too short" }, 161207ae002SSam Leffler #define S_RX_NOMBUF AFTER(S_RX_TOOSHORT) 1622f549d72SSam Leffler { 5, "rxnombuf", "rxnombuf", "rx setup failed 'cuz no mbuf" }, 163207ae002SSam Leffler #define S_RX_MGT AFTER(S_RX_NOMBUF) 1642f549d72SSam Leffler { 5, "rxmgt", "rxmgt", "rx management frames" }, 165207ae002SSam Leffler #define S_RX_CTL AFTER(S_RX_MGT) 1662f549d72SSam Leffler { 5, "rxctl", "rxctl", "rx control frames" }, 167207ae002SSam Leffler #define S_RX_PHY_ERR AFTER(S_RX_CTL) 1682f549d72SSam Leffler { 7, "phyerr", "phyerr", "rx failed 'cuz of PHY err" }, 169207ae002SSam Leffler #define S_RX_PHY_UNDERRUN AFTER(S_RX_PHY_ERR) 1704d490647SSam Leffler { 4, "phyund", "TUnd", "transmit underrun" }, 171207ae002SSam Leffler #define S_RX_PHY_TIMING AFTER(S_RX_PHY_UNDERRUN) 1724d490647SSam Leffler { 4, "phytim", "Tim", "timing error" }, 173207ae002SSam Leffler #define S_RX_PHY_PARITY AFTER(S_RX_PHY_TIMING) 1744d490647SSam Leffler { 4, "phypar", "IPar", "illegal parity" }, 175207ae002SSam Leffler #define S_RX_PHY_RATE AFTER(S_RX_PHY_PARITY) 1764d490647SSam Leffler { 4, "phyrate", "IRate", "illegal rate" }, 177207ae002SSam Leffler #define S_RX_PHY_LENGTH AFTER(S_RX_PHY_RATE) 1784d490647SSam Leffler { 4, "phylen", "ILen", "illegal length" }, 179207ae002SSam Leffler #define S_RX_PHY_RADAR AFTER(S_RX_PHY_LENGTH) 1804d490647SSam Leffler { 4, "phyradar", "Radar", "radar detect" }, 181207ae002SSam Leffler #define S_RX_PHY_SERVICE AFTER(S_RX_PHY_RADAR) 1824d490647SSam Leffler { 4, "physervice", "Service", "illegal service" }, 183207ae002SSam Leffler #define S_RX_PHY_TOR AFTER(S_RX_PHY_SERVICE) 1844d490647SSam Leffler { 4, "phytor", "TOR", "transmit override receive" }, 185207ae002SSam Leffler #define S_RX_PHY_OFDM_TIMING AFTER(S_RX_PHY_TOR) 1862f549d72SSam Leffler { 6, "ofdmtim", "ofdmtim", "OFDM timing" }, 187207ae002SSam Leffler #define S_RX_PHY_OFDM_SIGNAL_PARITY AFTER(S_RX_PHY_OFDM_TIMING) 1882f549d72SSam Leffler { 6, "ofdmsig", "ofdmsig", "OFDM illegal parity" }, 189207ae002SSam Leffler #define S_RX_PHY_OFDM_RATE_ILLEGAL AFTER(S_RX_PHY_OFDM_SIGNAL_PARITY) 1902f549d72SSam Leffler { 6, "ofdmrate", "ofdmrate", "OFDM illegal rate" }, 191207ae002SSam Leffler #define S_RX_PHY_OFDM_POWER_DROP AFTER(S_RX_PHY_OFDM_RATE_ILLEGAL) 1922f549d72SSam Leffler { 6, "ofdmpow", "ofdmpow", "OFDM power drop" }, 193207ae002SSam Leffler #define S_RX_PHY_OFDM_SERVICE AFTER(S_RX_PHY_OFDM_POWER_DROP) 1942f549d72SSam Leffler { 6, "ofdmservice", "ofdmservice", "OFDM illegal service" }, 195207ae002SSam Leffler #define S_RX_PHY_OFDM_RESTART AFTER(S_RX_PHY_OFDM_SERVICE) 1962f549d72SSam Leffler { 6, "ofdmrestart", "ofdmrestart", "OFDM restart" }, 197207ae002SSam Leffler #define S_RX_PHY_CCK_TIMING AFTER(S_RX_PHY_OFDM_RESTART) 1982f549d72SSam Leffler { 6, "ccktim", "ccktim", "CCK timing" }, 199207ae002SSam Leffler #define S_RX_PHY_CCK_HEADER_CRC AFTER(S_RX_PHY_CCK_TIMING) 2002f549d72SSam Leffler { 6, "cckhead", "cckhead", "CCK header crc" }, 201207ae002SSam Leffler #define S_RX_PHY_CCK_RATE_ILLEGAL AFTER(S_RX_PHY_CCK_HEADER_CRC) 2022f549d72SSam Leffler { 6, "cckrate", "cckrate", "CCK illegal rate" }, 203207ae002SSam Leffler #define S_RX_PHY_CCK_SERVICE AFTER(S_RX_PHY_CCK_RATE_ILLEGAL) 2042f549d72SSam Leffler { 6, "cckservice", "cckservice", "CCK illegal service" }, 205207ae002SSam Leffler #define S_RX_PHY_CCK_RESTART AFTER(S_RX_PHY_CCK_SERVICE) 2062f549d72SSam Leffler { 6, "cckrestar", "cckrestar", "CCK restart" }, 207207ae002SSam Leffler #define S_BE_NOMBUF AFTER(S_RX_PHY_CCK_RESTART) 2082f549d72SSam Leffler { 4, "benombuf", "benombuf", "beacon setup failed 'cuz no mbuf" }, 209207ae002SSam Leffler #define S_BE_XMIT AFTER(S_BE_NOMBUF) 21095d7bf0fSSam Leffler { 7, "bexmit", "bexmit", "beacons transmitted" }, 211207ae002SSam Leffler #define S_PER_CAL AFTER(S_BE_XMIT) 2122f549d72SSam Leffler { 4, "pcal", "pcal", "periodic calibrations" }, 213207ae002SSam Leffler #define S_PER_CALFAIL AFTER(S_PER_CAL) 2142f549d72SSam Leffler { 4, "pcalf", "pcalf", "periodic calibration failures" }, 215207ae002SSam Leffler #define S_PER_RFGAIN AFTER(S_PER_CALFAIL) 2162f549d72SSam Leffler { 4, "prfga", "prfga", "rfgain value change" }, 217207ae002SSam Leffler #if ATH_SUPPORT_TDMA 218207ae002SSam Leffler #define S_TDMA_UPDATE AFTER(S_PER_RFGAIN) 21995d7bf0fSSam Leffler { 5, "tdmau", "tdmau", "TDMA slot timing updates" }, 220207ae002SSam Leffler #define S_TDMA_TIMERS AFTER(S_TDMA_UPDATE) 22195d7bf0fSSam Leffler { 5, "tdmab", "tdmab", "TDMA slot update set beacon timers" }, 222207ae002SSam Leffler #define S_TDMA_TSF AFTER(S_TDMA_TIMERS) 22395d7bf0fSSam Leffler { 5, "tdmat", "tdmat", "TDMA slot update set TSF" }, 22410ad9a77SSam Leffler #define S_TDMA_TSFADJ AFTER(S_TDMA_TSF) 22595d7bf0fSSam Leffler { 8, "tdmadj", "tdmadj", "TDMA slot adjust (usecs, smoothed)" }, 226cc5912f8SSam Leffler #define S_TDMA_ACK AFTER(S_TDMA_TSFADJ) 227cc5912f8SSam Leffler { 5, "tdmack", "tdmack", "TDMA tx failed 'cuz ACK required" }, 228cc5912f8SSam Leffler #define S_RATE_CALLS AFTER(S_TDMA_ACK) 2292f549d72SSam Leffler #else 230207ae002SSam Leffler #define S_RATE_CALLS AFTER(S_PER_RFGAIN) 2312f549d72SSam Leffler #endif 2322f549d72SSam Leffler { 5, "ratec", "ratec", "rate control checks" }, 233207ae002SSam Leffler #define S_RATE_RAISE AFTER(S_RATE_CALLS) 2342f549d72SSam Leffler { 5, "rate+", "rate+", "rate control raised xmit rate" }, 235207ae002SSam Leffler #define S_RATE_DROP AFTER(S_RATE_RAISE) 2362f549d72SSam Leffler { 5, "rate-", "rate-", "rate control dropped xmit rate" }, 237207ae002SSam Leffler #define S_TX_RSSI AFTER(S_RATE_DROP) 2382f549d72SSam Leffler { 4, "arssi", "arssi", "rssi of last ack" }, 239207ae002SSam Leffler #define S_RX_RSSI AFTER(S_TX_RSSI) 2402f549d72SSam Leffler { 4, "rssi", "rssi", "avg recv rssi" }, 241207ae002SSam Leffler #define S_RX_NOISE AFTER(S_RX_RSSI) 2422f549d72SSam Leffler { 5, "noise", "noise", "rx noise floor" }, 243207ae002SSam Leffler #define S_BMISS_PHANTOM AFTER(S_RX_NOISE) 2442f549d72SSam Leffler { 5, "bmissphantom", "bmissphantom", "phantom beacon misses" }, 245207ae002SSam Leffler #define S_TX_RAW AFTER(S_BMISS_PHANTOM) 2462f549d72SSam Leffler { 5, "txraw", "txraw", "tx frames through raw api" }, 247cc5912f8SSam Leffler #define S_TX_RAW_FAIL AFTER(S_TX_RAW) 248cc5912f8SSam Leffler { 5, "txrawfail", "txrawfail", "raw tx failed 'cuz interface/hw down" }, 249cc5912f8SSam Leffler #define S_RX_TOOBIG AFTER(S_TX_RAW_FAIL) 2502f549d72SSam Leffler { 5, "rx2big", "rx2big", "rx failed 'cuz frame too large" }, 251b1b75b3bSAdrian Chadd #define S_RX_AGG AFTER(S_RX_TOOBIG) 252b1b75b3bSAdrian Chadd { 5, "rxagg", "rxagg", "A-MPDU sub-frames received" }, 253b1b75b3bSAdrian Chadd #define S_RX_HALFGI AFTER(S_RX_AGG) 254b1b75b3bSAdrian Chadd { 5, "rxhalfgi", "rxhgi", "Half-GI frames received" }, 255b1b75b3bSAdrian Chadd #define S_RX_2040 AFTER(S_RX_HALFGI) 256b1b75b3bSAdrian Chadd { 6, "rx2040", "rx2040", "40MHz frames received" }, 257b1b75b3bSAdrian Chadd #define S_RX_PRE_CRC_ERR AFTER(S_RX_2040) 258b1b75b3bSAdrian Chadd { 11, "rxprecrcerr", "rxprecrcerr", "CRC errors for non-last A-MPDU subframes" }, 259b1b75b3bSAdrian Chadd #define S_RX_POST_CRC_ERR AFTER(S_RX_PRE_CRC_ERR) 260b1b75b3bSAdrian Chadd { 12, "rxpostcrcerr", "rxpostcrcerr", "CRC errors for last subframe in an A-MPDU" }, 261b1b75b3bSAdrian Chadd #define S_RX_DECRYPT_BUSY_ERR AFTER(S_RX_POST_CRC_ERR) 262b1b75b3bSAdrian Chadd { 10, "rxdescbusy", "rxdescbusy", "Decryption engine busy" }, 263b1b75b3bSAdrian Chadd #define S_RX_HI_CHAIN AFTER(S_RX_DECRYPT_BUSY_ERR) 264b1b75b3bSAdrian Chadd { 4, "rxhi", "rxhi", "Frames received with RX chain in high power mode" }, 2652cdc5a48SAdrian Chadd #define S_RX_STBC AFTER(S_RX_HI_CHAIN) 2662cdc5a48SAdrian Chadd { 6, "rxstbc", "rxstbc", "Frames received w/ STBC encoding" }, 2672cdc5a48SAdrian Chadd #define S_TX_HTPROTECT AFTER(S_RX_STBC) 268b1b75b3bSAdrian Chadd { 7, "txhtprot", "txhtprot", "Frames transmitted with HT Protection" }, 269b1b75b3bSAdrian Chadd #define S_RX_QEND AFTER(S_TX_HTPROTECT) 270b1b75b3bSAdrian Chadd { 7, "rxquend", "rxquend", "Hit end of RX descriptor queue" }, 271b1b75b3bSAdrian Chadd #define S_TX_TIMEOUT AFTER(S_RX_QEND) 272b1b75b3bSAdrian Chadd { 4, "txtimeout", "TXTX", "TX Timeout" }, 273b1b75b3bSAdrian Chadd #define S_TX_CSTIMEOUT AFTER(S_TX_TIMEOUT) 274b1b75b3bSAdrian Chadd { 4, "csttimeout", "CSTX", "Carrier Sense Timeout" }, 275b1b75b3bSAdrian Chadd #define S_TX_XTXOP_ERR AFTER(S_TX_CSTIMEOUT) 276b1b75b3bSAdrian Chadd { 5, "xtxoperr", "TXOPX", "TXOP exceed" }, 277b1b75b3bSAdrian Chadd #define S_TX_TIMEREXPIRED_ERR AFTER(S_TX_XTXOP_ERR) 278b1b75b3bSAdrian Chadd { 7, "texperr", "texperr", "TX Timer expired" }, 279b1b75b3bSAdrian Chadd #define S_TX_DESCCFG_ERR AFTER(S_TX_TIMEREXPIRED_ERR) 280b1b75b3bSAdrian Chadd { 10, "desccfgerr", "desccfgerr", "TX descriptor error" }, 281b1b75b3bSAdrian Chadd #define S_TX_SWRETRIES AFTER(S_TX_DESCCFG_ERR) 282b1b75b3bSAdrian Chadd { 9, "txswretry", "txswretry", "Number of frames retransmitted in software" }, 283b1b75b3bSAdrian Chadd #define S_TX_SWRETRIES_MAX AFTER(S_TX_SWRETRIES) 284b1b75b3bSAdrian Chadd { 7, "txswmax", "txswmax", "Number of frames exceeding software retry" }, 285b1b75b3bSAdrian Chadd #define S_TX_DATA_UNDERRUN AFTER(S_TX_SWRETRIES_MAX) 286b1b75b3bSAdrian Chadd { 5, "txdataunderrun", "TXDAU", "A-MPDU TX FIFO data underrun" }, 287b1b75b3bSAdrian Chadd #define S_TX_DELIM_UNDERRUN AFTER(S_TX_DATA_UNDERRUN) 288b1b75b3bSAdrian Chadd { 5, "txdelimunderrun", "TXDEU", "A-MPDU TX Delimiter underrun" }, 2891df8da4cSAdrian Chadd #define S_TX_AGGR_OK AFTER(S_TX_DELIM_UNDERRUN) 2901df8da4cSAdrian Chadd { 5, "txaggrok", "TXAOK", "A-MPDU sub-frame TX attempt success" }, 2911df8da4cSAdrian Chadd #define S_TX_AGGR_FAIL AFTER(S_TX_AGGR_OK) 292317d14cfSAdrian Chadd { 4, "txaggrfail", "TXAF", "A-MPDU sub-frame TX attempt failures" }, 2931df8da4cSAdrian Chadd #define S_TX_AGGR_FAILALL AFTER(S_TX_AGGR_FAIL) 294317d14cfSAdrian Chadd { 7, "txaggrfailall", "TXAFALL", "A-MPDU TX frame failures" }, 2952f549d72SSam Leffler #ifndef __linux__ 2961df8da4cSAdrian Chadd #define S_CABQ_XMIT AFTER(S_TX_AGGR_FAILALL) 2978e787d67SAdrian Chadd { 7, "cabxmit", "cabxmit", "cabq frames transmitted" }, 298207ae002SSam Leffler #define S_CABQ_BUSY AFTER(S_CABQ_XMIT) 2998e787d67SAdrian Chadd { 8, "cabqbusy", "cabqbusy", "cabq xmit overflowed beacon interval" }, 300207ae002SSam Leffler #define S_TX_NODATA AFTER(S_CABQ_BUSY) 3018e787d67SAdrian Chadd { 8, "txnodata", "txnodata", "tx discarded empty frame" }, 302207ae002SSam Leffler #define S_TX_BUSDMA AFTER(S_TX_NODATA) 3038e787d67SAdrian Chadd { 8, "txbusdma", "txbusdma", "tx failed for dma resrcs" }, 304207ae002SSam Leffler #define S_RX_BUSDMA AFTER(S_TX_BUSDMA) 3058e787d67SAdrian Chadd { 8, "rxbusdma", "rxbusdma", "rx setup failed for dma resrcs" }, 306207ae002SSam Leffler #define S_FF_TXOK AFTER(S_RX_BUSDMA) 3072f549d72SSam Leffler #else 3081df8da4cSAdrian Chadd #define S_FF_TXOK AFTER(S_TX_AGGR_FAILALL) 3092f549d72SSam Leffler #endif 3102f549d72SSam Leffler { 5, "fftxok", "fftxok", "fast frames xmit successfully" }, 311207ae002SSam Leffler #define S_FF_TXERR AFTER(S_FF_TXOK) 3122f549d72SSam Leffler { 5, "fftxerr", "fftxerr", "fast frames not xmit due to error" }, 313207ae002SSam Leffler #define S_FF_RX AFTER(S_FF_TXERR) 3142f549d72SSam Leffler { 5, "ffrx", "ffrx", "fast frames received" }, 315207ae002SSam Leffler #define S_FF_FLUSH AFTER(S_FF_RX) 3162f549d72SSam Leffler { 5, "ffflush", "ffflush", "fast frames flushed from staging q" }, 317207ae002SSam Leffler #define S_TX_QFULL AFTER(S_FF_FLUSH) 318207ae002SSam Leffler { 5, "txqfull", "txqfull", "tx discarded 'cuz queue is full" }, 319207ae002SSam Leffler #define S_ANT_DEFSWITCH AFTER(S_TX_QFULL) 3202f549d72SSam Leffler { 5, "defsw", "defsw", "switched default/rx antenna" }, 321207ae002SSam Leffler #define S_ANT_TXSWITCH AFTER(S_ANT_DEFSWITCH) 3222f549d72SSam Leffler { 5, "txsw", "txsw", "tx used alternate antenna" }, 3234d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 3244d490647SSam Leffler #define S_ANI_NOISE AFTER(S_ANT_TXSWITCH) 3254d490647SSam Leffler { 2, "ni", "NI", "noise immunity level" }, 3264d490647SSam Leffler #define S_ANI_SPUR AFTER(S_ANI_NOISE) 3274d490647SSam Leffler { 2, "si", "SI", "spur immunity level" }, 3284d490647SSam Leffler #define S_ANI_STEP AFTER(S_ANI_SPUR) 3294d490647SSam Leffler { 2, "step", "ST", "first step level" }, 3304d490647SSam Leffler #define S_ANI_OFDM AFTER(S_ANI_STEP) 3314d490647SSam Leffler { 4, "owsd", "OWSD", "OFDM weak signal detect" }, 3324d490647SSam Leffler #define S_ANI_CCK AFTER(S_ANI_OFDM) 3334d490647SSam Leffler { 4, "cwst", "CWST", "CCK weak signal threshold" }, 3344d490647SSam Leffler #define S_ANI_MAXSPUR AFTER(S_ANI_CCK) 3354d490647SSam Leffler { 3, "maxsi","MSI", "max spur immunity level" }, 3364d490647SSam Leffler #define S_ANI_LISTEN AFTER(S_ANI_MAXSPUR) 3374d490647SSam Leffler { 6, "listen","LISTEN", "listen time" }, 3384d490647SSam Leffler #define S_ANI_NIUP AFTER(S_ANI_LISTEN) 3394d490647SSam Leffler { 4, "ni+", "NI-", "ANI increased noise immunity" }, 3404d490647SSam Leffler #define S_ANI_NIDOWN AFTER(S_ANI_NIUP) 3414d490647SSam Leffler { 4, "ni-", "NI-", "ANI decrease noise immunity" }, 3424d490647SSam Leffler #define S_ANI_SIUP AFTER(S_ANI_NIDOWN) 3434d490647SSam Leffler { 4, "si+", "SI+", "ANI increased spur immunity" }, 3444d490647SSam Leffler #define S_ANI_SIDOWN AFTER(S_ANI_SIUP) 3454d490647SSam Leffler { 4, "si-", "SI-", "ANI decrease spur immunity" }, 3464d490647SSam Leffler #define S_ANI_OFDMON AFTER(S_ANI_SIDOWN) 3474d490647SSam Leffler { 5, "ofdm+","OFDM+", "ANI enabled OFDM weak signal detect" }, 3484d490647SSam Leffler #define S_ANI_OFDMOFF AFTER(S_ANI_OFDMON) 3494d490647SSam Leffler { 5, "ofdm-","OFDM-", "ANI disabled OFDM weak signal detect" }, 3504d490647SSam Leffler #define S_ANI_CCKHI AFTER(S_ANI_OFDMOFF) 3514d490647SSam Leffler { 5, "cck+", "CCK+", "ANI enabled CCK weak signal threshold" }, 3524d490647SSam Leffler #define S_ANI_CCKLO AFTER(S_ANI_CCKHI) 3534d490647SSam Leffler { 5, "cck-", "CCK-", "ANI disabled CCK weak signal threshold" }, 3544d490647SSam Leffler #define S_ANI_STEPUP AFTER(S_ANI_CCKLO) 3554d490647SSam Leffler { 5, "step+","STEP+", "ANI increased first step level" }, 3564d490647SSam Leffler #define S_ANI_STEPDOWN AFTER(S_ANI_STEPUP) 3574d490647SSam Leffler { 5, "step-","STEP-", "ANI decreased first step level" }, 3584d490647SSam Leffler #define S_ANI_OFDMERRS AFTER(S_ANI_STEPDOWN) 35995d7bf0fSSam Leffler { 8, "ofdm", "OFDM", "cumulative OFDM phy error count" }, 3604d490647SSam Leffler #define S_ANI_CCKERRS AFTER(S_ANI_OFDMERRS) 36195d7bf0fSSam Leffler { 8, "cck", "CCK", "cumulative CCK phy error count" }, 3624d490647SSam Leffler #define S_ANI_RESET AFTER(S_ANI_CCKERRS) 3634d490647SSam Leffler { 5, "reset","RESET", "ANI parameters zero'd for non-STA operation" }, 3644d490647SSam Leffler #define S_ANI_LZERO AFTER(S_ANI_RESET) 3654d490647SSam Leffler { 5, "lzero","LZERO", "ANI forced listen time to zero" }, 3664d490647SSam Leffler #define S_ANI_LNEG AFTER(S_ANI_LZERO) 3674d490647SSam Leffler { 5, "lneg", "LNEG", "ANI calculated listen time < 0" }, 3684d490647SSam Leffler #define S_MIB_ACKBAD AFTER(S_ANI_LNEG) 36995d7bf0fSSam Leffler { 5, "ackbad","ACKBAD", "missing ACK's" }, 3704d490647SSam Leffler #define S_MIB_RTSBAD AFTER(S_MIB_ACKBAD) 37195d7bf0fSSam Leffler { 5, "rtsbad","RTSBAD", "RTS without CTS" }, 3724d490647SSam Leffler #define S_MIB_RTSGOOD AFTER(S_MIB_RTSBAD) 37395d7bf0fSSam Leffler { 5, "rtsgood","RTSGOOD", "successful RTS" }, 3744d490647SSam Leffler #define S_MIB_FCSBAD AFTER(S_MIB_RTSGOOD) 37595d7bf0fSSam Leffler { 5, "fcsbad","FCSBAD", "bad FCS" }, 3764d490647SSam Leffler #define S_MIB_BEACONS AFTER(S_MIB_FCSBAD) 37795d7bf0fSSam Leffler { 5, "beacons","beacons", "beacons received" }, 3784d490647SSam Leffler #define S_NODE_AVGBRSSI AFTER(S_MIB_BEACONS) 3794d490647SSam Leffler { 3, "avgbrssi","BSI", "average rssi (beacons only)" }, 3804d490647SSam Leffler #define S_NODE_AVGRSSI AFTER(S_NODE_AVGBRSSI) 3814d490647SSam Leffler { 3, "avgrssi","DSI", "average rssi (all rx'd frames)" }, 3824d490647SSam Leffler #define S_NODE_AVGARSSI AFTER(S_NODE_AVGRSSI) 3834d490647SSam Leffler { 3, "avgtxrssi","TSI", "average rssi (ACKs only)" }, 3844d490647SSam Leffler #define S_ANT_TX0 AFTER(S_NODE_AVGARSSI) 3854d490647SSam Leffler #else 386207ae002SSam Leffler #define S_ANT_TX0 AFTER(S_ANT_TXSWITCH) 3874d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */ 38895d7bf0fSSam Leffler { 8, "tx0", "ant0(tx)", "frames tx on antenna 0" }, 389207ae002SSam Leffler #define S_ANT_TX1 AFTER(S_ANT_TX0) 39095d7bf0fSSam Leffler { 8, "tx1", "ant1(tx)", "frames tx on antenna 1" }, 391207ae002SSam Leffler #define S_ANT_TX2 AFTER(S_ANT_TX1) 39295d7bf0fSSam Leffler { 8, "tx2", "ant2(tx)", "frames tx on antenna 2" }, 393207ae002SSam Leffler #define S_ANT_TX3 AFTER(S_ANT_TX2) 39495d7bf0fSSam Leffler { 8, "tx3", "ant3(tx)", "frames tx on antenna 3" }, 395207ae002SSam Leffler #define S_ANT_TX4 AFTER(S_ANT_TX3) 39695d7bf0fSSam Leffler { 8, "tx4", "ant4(tx)", "frames tx on antenna 4" }, 397207ae002SSam Leffler #define S_ANT_TX5 AFTER(S_ANT_TX4) 39895d7bf0fSSam Leffler { 8, "tx5", "ant5(tx)", "frames tx on antenna 5" }, 399207ae002SSam Leffler #define S_ANT_TX6 AFTER(S_ANT_TX5) 40095d7bf0fSSam Leffler { 8, "tx6", "ant6(tx)", "frames tx on antenna 6" }, 401207ae002SSam Leffler #define S_ANT_TX7 AFTER(S_ANT_TX6) 40295d7bf0fSSam Leffler { 8, "tx7", "ant7(tx)", "frames tx on antenna 7" }, 403207ae002SSam Leffler #define S_ANT_RX0 AFTER(S_ANT_TX7) 40495d7bf0fSSam Leffler { 8, "rx0", "ant0(rx)", "frames rx on antenna 0" }, 405207ae002SSam Leffler #define S_ANT_RX1 AFTER(S_ANT_RX0) 40695d7bf0fSSam Leffler { 8, "rx1", "ant1(rx)", "frames rx on antenna 1" }, 407207ae002SSam Leffler #define S_ANT_RX2 AFTER(S_ANT_RX1) 40895d7bf0fSSam Leffler { 8, "rx2", "ant2(rx)", "frames rx on antenna 2" }, 409207ae002SSam Leffler #define S_ANT_RX3 AFTER(S_ANT_RX2) 41095d7bf0fSSam Leffler { 8, "rx3", "ant3(rx)", "frames rx on antenna 3" }, 411207ae002SSam Leffler #define S_ANT_RX4 AFTER(S_ANT_RX3) 41295d7bf0fSSam Leffler { 8, "rx4", "ant4(rx)", "frames rx on antenna 4" }, 413207ae002SSam Leffler #define S_ANT_RX5 AFTER(S_ANT_RX4) 41495d7bf0fSSam Leffler { 8, "rx5", "ant5(rx)", "frames rx on antenna 5" }, 415207ae002SSam Leffler #define S_ANT_RX6 AFTER(S_ANT_RX5) 41695d7bf0fSSam Leffler { 8, "rx6", "ant6(rx)", "frames rx on antenna 6" }, 417207ae002SSam Leffler #define S_ANT_RX7 AFTER(S_ANT_RX6) 41895d7bf0fSSam Leffler { 8, "rx7", "ant7(rx)", "frames rx on antenna 7" }, 419207ae002SSam Leffler #define S_TX_SIGNAL AFTER(S_ANT_RX7) 4202f549d72SSam Leffler { 4, "asignal", "asig", "signal of last ack (dBm)" }, 421207ae002SSam Leffler #define S_RX_SIGNAL AFTER(S_TX_SIGNAL) 4222f549d72SSam Leffler { 4, "signal", "sig", "avg recv signal (dBm)" }, 423d90b001eSAdrian Chadd #define S_BMISSCOUNT AFTER(S_RX_SIGNAL) 424d90b001eSAdrian Chadd { 8, "bmisscount", "bmisscnt", "beacon miss count" }, 42512f961f4SSam Leffler }; 4262f549d72SSam Leffler #define S_PHY_MIN S_RX_PHY_UNDERRUN 4272f549d72SSam Leffler #define S_PHY_MAX S_RX_PHY_CCK_RESTART 4282f549d72SSam Leffler #define S_LAST S_ANT_TX0 429d90b001eSAdrian Chadd #define S_MAX S_BMISSCOUNT+1 43012f961f4SSam Leffler 431b1b75b3bSAdrian Chadd /* 432b1b75b3bSAdrian Chadd * XXX fold this into the external HAL definitions! -adrian 433b1b75b3bSAdrian Chadd */ 434207ae002SSam Leffler struct _athstats { 435207ae002SSam Leffler struct ath_stats ath; 4364d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 4374d490647SSam Leffler struct { 4384d490647SSam Leffler uint32_t ast_ani_niup; /* increased noise immunity */ 4394d490647SSam Leffler uint32_t ast_ani_nidown; /* decreased noise immunity */ 4404d490647SSam Leffler uint32_t ast_ani_spurup; /* increased spur immunity */ 4414d490647SSam Leffler uint32_t ast_ani_spurdown; /* descreased spur immunity */ 4424d490647SSam Leffler uint32_t ast_ani_ofdmon; /* OFDM weak signal detect on */ 4434d490647SSam Leffler uint32_t ast_ani_ofdmoff; /* OFDM weak signal detect off*/ 4444d490647SSam Leffler uint32_t ast_ani_cckhigh; /* CCK weak signal thr high */ 4454d490647SSam Leffler uint32_t ast_ani_ccklow; /* CCK weak signal thr low */ 4464d490647SSam Leffler uint32_t ast_ani_stepup; /* increased first step level */ 4474d490647SSam Leffler uint32_t ast_ani_stepdown; /* decreased first step level */ 4484d490647SSam Leffler uint32_t ast_ani_ofdmerrs; /* cumulative ofdm phy err cnt*/ 4494d490647SSam Leffler uint32_t ast_ani_cckerrs; /* cumulative cck phy err cnt */ 4504d490647SSam Leffler uint32_t ast_ani_reset; /* params zero'd for non-STA */ 4514d490647SSam Leffler uint32_t ast_ani_lzero; /* listen time forced to zero */ 4524d490647SSam Leffler uint32_t ast_ani_lneg; /* listen time calculated < 0 */ 4534d490647SSam Leffler HAL_MIB_STATS ast_mibstats; /* MIB counter stats */ 4544d490647SSam Leffler HAL_NODE_STATS ast_nodestats; /* latest rssi stats */ 4554d490647SSam Leffler } ani_stats; 4564d490647SSam Leffler struct { 4574d490647SSam Leffler uint8_t noiseImmunityLevel; 4584d490647SSam Leffler uint8_t spurImmunityLevel; 4594d490647SSam Leffler uint8_t firstepLevel; 4604d490647SSam Leffler uint8_t ofdmWeakSigDetectOff; 46104fc88d5SSam Leffler uint8_t cckWeakSigThreshold; 4624d490647SSam Leffler uint32_t listenTime; 4634d490647SSam Leffler } ani_state; 4644d490647SSam Leffler #endif 465207ae002SSam Leffler }; 466207ae002SSam Leffler 4672f549d72SSam Leffler struct athstatfoo_p { 4682f549d72SSam Leffler struct athstatfoo base; 46912f961f4SSam Leffler int s; 470207ae002SSam Leffler int optstats; 4714d490647SSam Leffler #define ATHSTATS_ANI 0x0001 47212f961f4SSam Leffler struct ifreq ifr; 473207ae002SSam Leffler struct ath_diag atd; 474207ae002SSam Leffler struct _athstats cur; 475207ae002SSam Leffler struct _athstats total; 4762f549d72SSam Leffler }; 47712f961f4SSam Leffler 4782f549d72SSam Leffler static void 4792f549d72SSam Leffler ath_setifname(struct athstatfoo *wf0, const char *ifname) 4802f549d72SSam Leffler { 4812f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0; 48212f961f4SSam Leffler 4832f549d72SSam Leffler strncpy(wf->ifr.ifr_name, ifname, sizeof (wf->ifr.ifr_name)); 4844d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 4854d490647SSam Leffler strncpy(wf->atd.ad_name, ifname, sizeof (wf->atd.ad_name)); 4864d490647SSam Leffler wf->optstats |= ATHSTATS_ANI; 4874d490647SSam Leffler #endif 48812f961f4SSam Leffler } 48912f961f4SSam Leffler 4902f549d72SSam Leffler static void 491dd8d00f5SSam Leffler ath_zerostats(struct athstatfoo *wf0) 492dd8d00f5SSam Leffler { 493dd8d00f5SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0; 494dd8d00f5SSam Leffler 495dd8d00f5SSam Leffler if (ioctl(wf->s, SIOCZATHSTATS, &wf->ifr) < 0) 4965205fa34SAdrian Chadd err(-1, "ioctl: %s", wf->ifr.ifr_name); 497dd8d00f5SSam Leffler } 498dd8d00f5SSam Leffler 499dd8d00f5SSam Leffler static void 500207ae002SSam Leffler ath_collect(struct athstatfoo_p *wf, struct _athstats *stats) 5012f549d72SSam Leffler { 502207ae002SSam Leffler wf->ifr.ifr_data = (caddr_t) &stats->ath; 5032f549d72SSam Leffler if (ioctl(wf->s, SIOCGATHSTATS, &wf->ifr) < 0) 5045205fa34SAdrian Chadd err(1, "ioctl: %s", wf->ifr.ifr_name); 5054d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 5064d490647SSam Leffler if (wf->optstats & ATHSTATS_ANI) { 5074d490647SSam Leffler wf->atd.ad_id = 5; 5084d490647SSam Leffler wf->atd.ad_out_data = (caddr_t) &stats->ani_state; 5094d490647SSam Leffler wf->atd.ad_out_size = sizeof(stats->ani_state); 5104d490647SSam Leffler if (ioctl(wf->s, SIOCGATHDIAG, &wf->atd) < 0) { 5115205fa34SAdrian Chadd warn("ioctl: %s", wf->atd.ad_name); 5124d490647SSam Leffler wf->optstats &= ~ATHSTATS_ANI; 5134d490647SSam Leffler } 5144d490647SSam Leffler wf->atd.ad_id = 8; 5154d490647SSam Leffler wf->atd.ad_out_data = (caddr_t) &stats->ani_stats; 5164d490647SSam Leffler wf->atd.ad_out_size = sizeof(stats->ani_stats); 5174d490647SSam Leffler if (ioctl(wf->s, SIOCGATHDIAG, &wf->atd) < 0) 5185205fa34SAdrian Chadd warn("ioctl: %s", wf->atd.ad_name); 5194d490647SSam Leffler } 5204d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */ 52112f961f4SSam Leffler } 5222f549d72SSam Leffler 5232f549d72SSam Leffler static void 524*15abc53aSAdrian Chadd ath_collect_cur(struct bsdstat *sf) 5252f549d72SSam Leffler { 5262f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5272f549d72SSam Leffler 5282f549d72SSam Leffler ath_collect(wf, &wf->cur); 5292f549d72SSam Leffler } 5302f549d72SSam Leffler 5312f549d72SSam Leffler static void 532*15abc53aSAdrian Chadd ath_collect_tot(struct bsdstat *sf) 5332f549d72SSam Leffler { 5342f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5352f549d72SSam Leffler 5362f549d72SSam Leffler ath_collect(wf, &wf->total); 5372f549d72SSam Leffler } 5382f549d72SSam Leffler 5392f549d72SSam Leffler static void 540*15abc53aSAdrian Chadd ath_update_tot(struct bsdstat *sf) 5412f549d72SSam Leffler { 5422f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5432f549d72SSam Leffler 5442f549d72SSam Leffler wf->total = wf->cur; 5452f549d72SSam Leffler } 5462f549d72SSam Leffler 5474d490647SSam Leffler static void 5484d490647SSam Leffler snprintrate(char b[], size_t bs, int rate) 5494d490647SSam Leffler { 5504d490647SSam Leffler if (rate & IEEE80211_RATE_MCS) 5514d490647SSam Leffler snprintf(b, bs, "MCS%u", rate &~ IEEE80211_RATE_MCS); 5524d490647SSam Leffler else if (rate & 1) 5534d490647SSam Leffler snprintf(b, bs, "%u.5M", rate / 2); 5544d490647SSam Leffler else 5554d490647SSam Leffler snprintf(b, bs, "%uM", rate / 2); 5564d490647SSam Leffler } 5574d490647SSam Leffler 5582f549d72SSam Leffler static int 559*15abc53aSAdrian Chadd ath_get_curstat(struct bsdstat *sf, int s, char b[], size_t bs) 5602f549d72SSam Leffler { 5612f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5622f549d72SSam Leffler #define STAT(x) \ 563207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_##x - wf->total.ath.ast_##x); return 1 5642f549d72SSam Leffler #define PHY(x) \ 565207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_rx_phy[x] - wf->total.ath.ast_rx_phy[x]); return 1 5664d490647SSam Leffler #define ANI(x) \ 5674d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_state.x); return 1 5684d490647SSam Leffler #define ANISTAT(x) \ 5694d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_stats.ast_ani_##x - wf->total.ani_stats.ast_ani_##x); return 1 5704d490647SSam Leffler #define MIBSTAT(x) \ 5714d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_stats.ast_mibstats.x - wf->total.ani_stats.ast_mibstats.x); return 1 5722f549d72SSam Leffler #define TXANT(x) \ 573207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_ant_tx[x] - wf->total.ath.ast_ant_tx[x]); return 1 5742f549d72SSam Leffler #define RXANT(x) \ 575207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_ant_rx[x] - wf->total.ath.ast_ant_rx[x]); return 1 5762f549d72SSam Leffler 5772f549d72SSam Leffler switch (s) { 5782f549d72SSam Leffler case S_INPUT: 5792f549d72SSam Leffler snprintf(b, bs, "%lu", 5805205fa34SAdrian Chadd (unsigned long) 5815205fa34SAdrian Chadd ((wf->cur.ath.ast_rx_packets - wf->total.ath.ast_rx_packets) - 5825205fa34SAdrian Chadd (wf->cur.ath.ast_rx_mgt - wf->total.ath.ast_rx_mgt))); 5832f549d72SSam Leffler return 1; 5842f549d72SSam Leffler case S_OUTPUT: 5852f549d72SSam Leffler snprintf(b, bs, "%lu", 5865205fa34SAdrian Chadd (unsigned long) 5875205fa34SAdrian Chadd (wf->cur.ath.ast_tx_packets - wf->total.ath.ast_tx_packets)); 5882f549d72SSam Leffler return 1; 5892f549d72SSam Leffler case S_RATE: 5904d490647SSam Leffler snprintrate(b, bs, wf->cur.ath.ast_tx_rate); 5912f549d72SSam Leffler return 1; 5922f549d72SSam Leffler case S_WATCHDOG: STAT(watchdog); 5932f549d72SSam Leffler case S_FATAL: STAT(hardware); 5942f549d72SSam Leffler case S_BMISS: STAT(bmiss); 5952f549d72SSam Leffler case S_BMISS_PHANTOM: STAT(bmiss_phantom); 5962f549d72SSam Leffler #ifdef S_BSTUCK 5972f549d72SSam Leffler case S_BSTUCK: STAT(bstuck); 5982f549d72SSam Leffler #endif 5992f549d72SSam Leffler case S_RXORN: STAT(rxorn); 6002f549d72SSam Leffler case S_RXEOL: STAT(rxeol); 6012f549d72SSam Leffler case S_TXURN: STAT(txurn); 6022f549d72SSam Leffler case S_MIB: STAT(mib); 6032f549d72SSam Leffler #ifdef S_INTRCOAL 6042f549d72SSam Leffler case S_INTRCOAL: STAT(intrcoal); 6052f549d72SSam Leffler #endif 6062f549d72SSam Leffler case S_TX_MGMT: STAT(tx_mgmt); 6072f549d72SSam Leffler case S_TX_DISCARD: STAT(tx_discard); 6082f549d72SSam Leffler case S_TX_QSTOP: STAT(tx_qstop); 6092f549d72SSam Leffler case S_TX_ENCAP: STAT(tx_encap); 6102f549d72SSam Leffler case S_TX_NONODE: STAT(tx_nonode); 61141e449dbSSam Leffler case S_TX_NOBUF: STAT(tx_nobuf); 61241e449dbSSam Leffler case S_TX_NOFRAG: STAT(tx_nofrag); 6132f549d72SSam Leffler case S_TX_NOMBUF: STAT(tx_nombuf); 6142f549d72SSam Leffler #ifdef S_TX_NOMCL 6152f549d72SSam Leffler case S_TX_NOMCL: STAT(tx_nomcl); 6162f549d72SSam Leffler case S_TX_LINEAR: STAT(tx_linear); 6172f549d72SSam Leffler case S_TX_NODATA: STAT(tx_nodata); 6182f549d72SSam Leffler case S_TX_BUSDMA: STAT(tx_busdma); 6192f549d72SSam Leffler #endif 6202f549d72SSam Leffler case S_TX_XRETRIES: STAT(tx_xretries); 6212f549d72SSam Leffler case S_TX_FIFOERR: STAT(tx_fifoerr); 6222f549d72SSam Leffler case S_TX_FILTERED: STAT(tx_filtered); 6232f549d72SSam Leffler case S_TX_SHORTRETRY: STAT(tx_shortretry); 6242f549d72SSam Leffler case S_TX_LONGRETRY: STAT(tx_longretry); 6252f549d72SSam Leffler case S_TX_BADRATE: STAT(tx_badrate); 6262f549d72SSam Leffler case S_TX_NOACK: STAT(tx_noack); 6272f549d72SSam Leffler case S_TX_RTS: STAT(tx_rts); 6282f549d72SSam Leffler case S_TX_CTS: STAT(tx_cts); 6292f549d72SSam Leffler case S_TX_SHORTPRE: STAT(tx_shortpre); 6302f549d72SSam Leffler case S_TX_ALTRATE: STAT(tx_altrate); 6312f549d72SSam Leffler case S_TX_PROTECT: STAT(tx_protect); 632cc5912f8SSam Leffler case S_TX_RAW: STAT(tx_raw); 633cc5912f8SSam Leffler case S_TX_RAW_FAIL: STAT(tx_raw_fail); 6342f549d72SSam Leffler case S_RX_NOMBUF: STAT(rx_nombuf); 6352f549d72SSam Leffler #ifdef S_RX_BUSDMA 6362f549d72SSam Leffler case S_RX_BUSDMA: STAT(rx_busdma); 6372f549d72SSam Leffler #endif 6382f549d72SSam Leffler case S_RX_ORN: STAT(rx_orn); 6392f549d72SSam Leffler case S_RX_CRC_ERR: STAT(rx_crcerr); 6402f549d72SSam Leffler case S_RX_FIFO_ERR: STAT(rx_fifoerr); 6412f549d72SSam Leffler case S_RX_CRYPTO_ERR: STAT(rx_badcrypt); 6422f549d72SSam Leffler case S_RX_MIC_ERR: STAT(rx_badmic); 6432f549d72SSam Leffler case S_RX_PHY_ERR: STAT(rx_phyerr); 6442f549d72SSam Leffler case S_RX_PHY_UNDERRUN: PHY(HAL_PHYERR_UNDERRUN); 6452f549d72SSam Leffler case S_RX_PHY_TIMING: PHY(HAL_PHYERR_TIMING); 6462f549d72SSam Leffler case S_RX_PHY_PARITY: PHY(HAL_PHYERR_PARITY); 6472f549d72SSam Leffler case S_RX_PHY_RATE: PHY(HAL_PHYERR_RATE); 6482f549d72SSam Leffler case S_RX_PHY_LENGTH: PHY(HAL_PHYERR_LENGTH); 6492f549d72SSam Leffler case S_RX_PHY_RADAR: PHY(HAL_PHYERR_RADAR); 6502f549d72SSam Leffler case S_RX_PHY_SERVICE: PHY(HAL_PHYERR_SERVICE); 6512f549d72SSam Leffler case S_RX_PHY_TOR: PHY(HAL_PHYERR_TOR); 6522f549d72SSam Leffler case S_RX_PHY_OFDM_TIMING: PHY(HAL_PHYERR_OFDM_TIMING); 6532f549d72SSam Leffler case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY); 6542f549d72SSam Leffler case S_RX_PHY_OFDM_RATE_ILLEGAL: PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL); 6552f549d72SSam Leffler case S_RX_PHY_OFDM_POWER_DROP: PHY(HAL_PHYERR_OFDM_POWER_DROP); 6562f549d72SSam Leffler case S_RX_PHY_OFDM_SERVICE: PHY(HAL_PHYERR_OFDM_SERVICE); 6572f549d72SSam Leffler case S_RX_PHY_OFDM_RESTART: PHY(HAL_PHYERR_OFDM_RESTART); 6582f549d72SSam Leffler case S_RX_PHY_CCK_TIMING: PHY(HAL_PHYERR_CCK_TIMING); 6592f549d72SSam Leffler case S_RX_PHY_CCK_HEADER_CRC: PHY(HAL_PHYERR_CCK_HEADER_CRC); 6602f549d72SSam Leffler case S_RX_PHY_CCK_RATE_ILLEGAL: PHY(HAL_PHYERR_CCK_RATE_ILLEGAL); 6612f549d72SSam Leffler case S_RX_PHY_CCK_SERVICE: PHY(HAL_PHYERR_CCK_SERVICE); 6622f549d72SSam Leffler case S_RX_PHY_CCK_RESTART: PHY(HAL_PHYERR_CCK_RESTART); 6632f549d72SSam Leffler case S_RX_TOOSHORT: STAT(rx_tooshort); 6642f549d72SSam Leffler case S_RX_TOOBIG: STAT(rx_toobig); 6652f549d72SSam Leffler case S_RX_MGT: STAT(rx_mgt); 6662f549d72SSam Leffler case S_RX_CTL: STAT(rx_ctl); 6672f549d72SSam Leffler case S_TX_RSSI: 668207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_tx_rssi); 6692f549d72SSam Leffler return 1; 6702f549d72SSam Leffler case S_RX_RSSI: 671207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_rx_rssi); 6722f549d72SSam Leffler return 1; 6732f549d72SSam Leffler case S_BE_XMIT: STAT(be_xmit); 6742f549d72SSam Leffler case S_BE_NOMBUF: STAT(be_nombuf); 6752f549d72SSam Leffler case S_PER_CAL: STAT(per_cal); 6762f549d72SSam Leffler case S_PER_CALFAIL: STAT(per_calfail); 6772f549d72SSam Leffler case S_PER_RFGAIN: STAT(per_rfgain); 6782f549d72SSam Leffler #ifdef S_TDMA_UPDATE 6792f549d72SSam Leffler case S_TDMA_UPDATE: STAT(tdma_update); 6802f549d72SSam Leffler case S_TDMA_TIMERS: STAT(tdma_timers); 6812f549d72SSam Leffler case S_TDMA_TSF: STAT(tdma_tsf); 68210ad9a77SSam Leffler case S_TDMA_TSFADJ: 68310ad9a77SSam Leffler snprintf(b, bs, "-%d/+%d", 68410ad9a77SSam Leffler wf->cur.ath.ast_tdma_tsfadjm, wf->cur.ath.ast_tdma_tsfadjp); 68510ad9a77SSam Leffler return 1; 686cc5912f8SSam Leffler case S_TDMA_ACK: STAT(tdma_ack); 6872f549d72SSam Leffler #endif 6882f549d72SSam Leffler case S_RATE_CALLS: STAT(rate_calls); 6892f549d72SSam Leffler case S_RATE_RAISE: STAT(rate_raise); 6902f549d72SSam Leffler case S_RATE_DROP: STAT(rate_drop); 6912f549d72SSam Leffler case S_ANT_DEFSWITCH: STAT(ant_defswitch); 6922f549d72SSam Leffler case S_ANT_TXSWITCH: STAT(ant_txswitch); 6934d490647SSam Leffler #ifdef S_ANI_NOISE 6944d490647SSam Leffler case S_ANI_NOISE: ANI(noiseImmunityLevel); 6954d490647SSam Leffler case S_ANI_SPUR: ANI(spurImmunityLevel); 6964d490647SSam Leffler case S_ANI_STEP: ANI(firstepLevel); 6974d490647SSam Leffler case S_ANI_OFDM: ANI(ofdmWeakSigDetectOff); 69804fc88d5SSam Leffler case S_ANI_CCK: ANI(cckWeakSigThreshold); 6994d490647SSam Leffler case S_ANI_LISTEN: ANI(listenTime); 7004d490647SSam Leffler case S_ANI_NIUP: ANISTAT(niup); 7014d490647SSam Leffler case S_ANI_NIDOWN: ANISTAT(nidown); 7024d490647SSam Leffler case S_ANI_SIUP: ANISTAT(spurup); 7034d490647SSam Leffler case S_ANI_SIDOWN: ANISTAT(spurdown); 7044d490647SSam Leffler case S_ANI_OFDMON: ANISTAT(ofdmon); 7054d490647SSam Leffler case S_ANI_OFDMOFF: ANISTAT(ofdmoff); 7064d490647SSam Leffler case S_ANI_CCKHI: ANISTAT(cckhigh); 7074d490647SSam Leffler case S_ANI_CCKLO: ANISTAT(ccklow); 7084d490647SSam Leffler case S_ANI_STEPUP: ANISTAT(stepup); 7094d490647SSam Leffler case S_ANI_STEPDOWN: ANISTAT(stepdown); 7104d490647SSam Leffler case S_ANI_OFDMERRS: ANISTAT(ofdmerrs); 7114d490647SSam Leffler case S_ANI_CCKERRS: ANISTAT(cckerrs); 7124d490647SSam Leffler case S_ANI_RESET: ANISTAT(reset); 7134d490647SSam Leffler case S_ANI_LZERO: ANISTAT(lzero); 7144d490647SSam Leffler case S_ANI_LNEG: ANISTAT(lneg); 7154d490647SSam Leffler case S_MIB_ACKBAD: MIBSTAT(ackrcv_bad); 7164d490647SSam Leffler case S_MIB_RTSBAD: MIBSTAT(rts_bad); 7174d490647SSam Leffler case S_MIB_RTSGOOD: MIBSTAT(rts_good); 7184d490647SSam Leffler case S_MIB_FCSBAD: MIBSTAT(fcs_bad); 7194d490647SSam Leffler case S_MIB_BEACONS: MIBSTAT(beacons); 7204d490647SSam Leffler case S_NODE_AVGBRSSI: 7214d490647SSam Leffler snprintf(b, bs, "%u", 7224d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgbrssi)); 7234d490647SSam Leffler return 1; 7244d490647SSam Leffler case S_NODE_AVGRSSI: 7254d490647SSam Leffler snprintf(b, bs, "%u", 7264d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgrssi)); 7274d490647SSam Leffler return 1; 7284d490647SSam Leffler case S_NODE_AVGARSSI: 7294d490647SSam Leffler snprintf(b, bs, "%u", 7304d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgtxrssi)); 7314d490647SSam Leffler return 1; 7324d490647SSam Leffler #endif 7332f549d72SSam Leffler case S_ANT_TX0: TXANT(0); 7342f549d72SSam Leffler case S_ANT_TX1: TXANT(1); 7352f549d72SSam Leffler case S_ANT_TX2: TXANT(2); 7362f549d72SSam Leffler case S_ANT_TX3: TXANT(3); 7372f549d72SSam Leffler case S_ANT_TX4: TXANT(4); 7382f549d72SSam Leffler case S_ANT_TX5: TXANT(5); 7392f549d72SSam Leffler case S_ANT_TX6: TXANT(6); 7402f549d72SSam Leffler case S_ANT_TX7: TXANT(7); 7412f549d72SSam Leffler case S_ANT_RX0: RXANT(0); 7422f549d72SSam Leffler case S_ANT_RX1: RXANT(1); 7432f549d72SSam Leffler case S_ANT_RX2: RXANT(2); 7442f549d72SSam Leffler case S_ANT_RX3: RXANT(3); 7452f549d72SSam Leffler case S_ANT_RX4: RXANT(4); 7462f549d72SSam Leffler case S_ANT_RX5: RXANT(5); 7472f549d72SSam Leffler case S_ANT_RX6: RXANT(6); 7482f549d72SSam Leffler case S_ANT_RX7: RXANT(7); 7492f549d72SSam Leffler #ifdef S_CABQ_XMIT 7502f549d72SSam Leffler case S_CABQ_XMIT: STAT(cabq_xmit); 7512f549d72SSam Leffler case S_CABQ_BUSY: STAT(cabq_busy); 7522f549d72SSam Leffler #endif 7532f549d72SSam Leffler case S_FF_TXOK: STAT(ff_txok); 7542f549d72SSam Leffler case S_FF_TXERR: STAT(ff_txerr); 755207ae002SSam Leffler case S_FF_RX: STAT(ff_rx); 7562f549d72SSam Leffler case S_FF_FLUSH: STAT(ff_flush); 757207ae002SSam Leffler case S_TX_QFULL: STAT(tx_qfull); 758d90b001eSAdrian Chadd case S_BMISSCOUNT: STAT(be_missed); 7592f549d72SSam Leffler case S_RX_NOISE: 760207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_rx_noise); 7612f549d72SSam Leffler return 1; 7622f549d72SSam Leffler case S_TX_SIGNAL: 7632f549d72SSam Leffler snprintf(b, bs, "%d", 764207ae002SSam Leffler wf->cur.ath.ast_tx_rssi + wf->cur.ath.ast_rx_noise); 7652f549d72SSam Leffler return 1; 7662f549d72SSam Leffler case S_RX_SIGNAL: 7672f549d72SSam Leffler snprintf(b, bs, "%d", 768207ae002SSam Leffler wf->cur.ath.ast_rx_rssi + wf->cur.ath.ast_rx_noise); 7692f549d72SSam Leffler return 1; 770b1b75b3bSAdrian Chadd case S_RX_AGG: STAT(rx_agg); 771b1b75b3bSAdrian Chadd case S_RX_HALFGI: STAT(rx_halfgi); 772b1b75b3bSAdrian Chadd case S_RX_2040: STAT(rx_2040); 773b1b75b3bSAdrian Chadd case S_RX_PRE_CRC_ERR: STAT(rx_pre_crc_err); 774b1b75b3bSAdrian Chadd case S_RX_POST_CRC_ERR: STAT(rx_post_crc_err); 775b1b75b3bSAdrian Chadd case S_RX_DECRYPT_BUSY_ERR: STAT(rx_decrypt_busy_err); 776b1b75b3bSAdrian Chadd case S_RX_HI_CHAIN: STAT(rx_hi_rx_chain); 7772cdc5a48SAdrian Chadd case S_RX_STBC: STAT(rx_stbc); 778b1b75b3bSAdrian Chadd case S_TX_HTPROTECT: STAT(tx_htprotect); 779b1b75b3bSAdrian Chadd case S_RX_QEND: STAT(rx_hitqueueend); 780b1b75b3bSAdrian Chadd case S_TX_TIMEOUT: STAT(tx_timeout); 781b1b75b3bSAdrian Chadd case S_TX_CSTIMEOUT: STAT(tx_cst); 782b1b75b3bSAdrian Chadd case S_TX_XTXOP_ERR: STAT(tx_xtxop); 783b1b75b3bSAdrian Chadd case S_TX_TIMEREXPIRED_ERR: STAT(tx_timerexpired); 784b1b75b3bSAdrian Chadd case S_TX_DESCCFG_ERR: STAT(tx_desccfgerr); 785b1b75b3bSAdrian Chadd case S_TX_SWRETRIES: STAT(tx_swretries); 786b1b75b3bSAdrian Chadd case S_TX_SWRETRIES_MAX: STAT(tx_swretrymax); 787b1b75b3bSAdrian Chadd case S_TX_DATA_UNDERRUN: STAT(tx_data_underrun); 788b1b75b3bSAdrian Chadd case S_TX_DELIM_UNDERRUN: STAT(tx_delim_underrun); 7891df8da4cSAdrian Chadd case S_TX_AGGR_OK: STAT(tx_aggr_ok); 7901df8da4cSAdrian Chadd case S_TX_AGGR_FAIL: STAT(tx_aggr_fail); 7911df8da4cSAdrian Chadd case S_TX_AGGR_FAILALL: STAT(tx_aggr_failall); 7922f549d72SSam Leffler } 7932f549d72SSam Leffler b[0] = '\0'; 79412f961f4SSam Leffler return 0; 7952f549d72SSam Leffler #undef RXANT 7962f549d72SSam Leffler #undef TXANT 7974d490647SSam Leffler #undef ANI 7984d490647SSam Leffler #undef ANISTAT 7994d490647SSam Leffler #undef MIBSTAT 8002f549d72SSam Leffler #undef PHY 8012f549d72SSam Leffler #undef STAT 8022f549d72SSam Leffler } 8032f549d72SSam Leffler 8042f549d72SSam Leffler static int 805*15abc53aSAdrian Chadd ath_get_totstat(struct bsdstat *sf, int s, char b[], size_t bs) 8062f549d72SSam Leffler { 8072f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 8082f549d72SSam Leffler #define STAT(x) \ 80995d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_##x); return 1 8102f549d72SSam Leffler #define PHY(x) \ 81195d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_rx_phy[x]); return 1 8124d490647SSam Leffler #define ANI(x) \ 81395d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_state.x); return 1 8144d490647SSam Leffler #define ANISTAT(x) \ 81595d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_stats.ast_ani_##x); return 1 8164d490647SSam Leffler #define MIBSTAT(x) \ 81795d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_stats.ast_mibstats.x); return 1 8182f549d72SSam Leffler #define TXANT(x) \ 81995d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_ant_tx[x]); return 1 8202f549d72SSam Leffler #define RXANT(x) \ 82195d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_ant_rx[x]); return 1 8222f549d72SSam Leffler 8232f549d72SSam Leffler switch (s) { 8242f549d72SSam Leffler case S_INPUT: 82595d7bf0fSSam Leffler snprintf(b, bs, "%lu", 826207ae002SSam Leffler wf->total.ath.ast_rx_packets - wf->total.ath.ast_rx_mgt); 8272f549d72SSam Leffler return 1; 8282f549d72SSam Leffler case S_OUTPUT: 82995d7bf0fSSam Leffler snprintf(b, bs, "%lu", wf->total.ath.ast_tx_packets); 8302f549d72SSam Leffler return 1; 8312f549d72SSam Leffler case S_RATE: 8324d490647SSam Leffler snprintrate(b, bs, wf->total.ath.ast_tx_rate); 8332f549d72SSam Leffler return 1; 8342f549d72SSam Leffler case S_WATCHDOG: STAT(watchdog); 8352f549d72SSam Leffler case S_FATAL: STAT(hardware); 8362f549d72SSam Leffler case S_BMISS: STAT(bmiss); 8372f549d72SSam Leffler case S_BMISS_PHANTOM: STAT(bmiss_phantom); 8382f549d72SSam Leffler #ifdef S_BSTUCK 8392f549d72SSam Leffler case S_BSTUCK: STAT(bstuck); 8402f549d72SSam Leffler #endif 8412f549d72SSam Leffler case S_RXORN: STAT(rxorn); 8422f549d72SSam Leffler case S_RXEOL: STAT(rxeol); 8432f549d72SSam Leffler case S_TXURN: STAT(txurn); 8442f549d72SSam Leffler case S_MIB: STAT(mib); 8452f549d72SSam Leffler #ifdef S_INTRCOAL 8462f549d72SSam Leffler case S_INTRCOAL: STAT(intrcoal); 8472f549d72SSam Leffler #endif 8482f549d72SSam Leffler case S_TX_MGMT: STAT(tx_mgmt); 8492f549d72SSam Leffler case S_TX_DISCARD: STAT(tx_discard); 8502f549d72SSam Leffler case S_TX_QSTOP: STAT(tx_qstop); 8512f549d72SSam Leffler case S_TX_ENCAP: STAT(tx_encap); 8522f549d72SSam Leffler case S_TX_NONODE: STAT(tx_nonode); 85341e449dbSSam Leffler case S_TX_NOBUF: STAT(tx_nobuf); 85441e449dbSSam Leffler case S_TX_NOFRAG: STAT(tx_nofrag); 8552f549d72SSam Leffler case S_TX_NOMBUF: STAT(tx_nombuf); 8562f549d72SSam Leffler #ifdef S_TX_NOMCL 8572f549d72SSam Leffler case S_TX_NOMCL: STAT(tx_nomcl); 8582f549d72SSam Leffler case S_TX_LINEAR: STAT(tx_linear); 8592f549d72SSam Leffler case S_TX_NODATA: STAT(tx_nodata); 8602f549d72SSam Leffler case S_TX_BUSDMA: STAT(tx_busdma); 8612f549d72SSam Leffler #endif 8622f549d72SSam Leffler case S_TX_XRETRIES: STAT(tx_xretries); 8632f549d72SSam Leffler case S_TX_FIFOERR: STAT(tx_fifoerr); 8642f549d72SSam Leffler case S_TX_FILTERED: STAT(tx_filtered); 8652f549d72SSam Leffler case S_TX_SHORTRETRY: STAT(tx_shortretry); 8662f549d72SSam Leffler case S_TX_LONGRETRY: STAT(tx_longretry); 8672f549d72SSam Leffler case S_TX_BADRATE: STAT(tx_badrate); 8682f549d72SSam Leffler case S_TX_NOACK: STAT(tx_noack); 8692f549d72SSam Leffler case S_TX_RTS: STAT(tx_rts); 8702f549d72SSam Leffler case S_TX_CTS: STAT(tx_cts); 8712f549d72SSam Leffler case S_TX_SHORTPRE: STAT(tx_shortpre); 8722f549d72SSam Leffler case S_TX_ALTRATE: STAT(tx_altrate); 8732f549d72SSam Leffler case S_TX_PROTECT: STAT(tx_protect); 874cc5912f8SSam Leffler case S_TX_RAW: STAT(tx_raw); 875cc5912f8SSam Leffler case S_TX_RAW_FAIL: STAT(tx_raw_fail); 8762f549d72SSam Leffler case S_RX_NOMBUF: STAT(rx_nombuf); 8772f549d72SSam Leffler #ifdef S_RX_BUSDMA 8782f549d72SSam Leffler case S_RX_BUSDMA: STAT(rx_busdma); 8792f549d72SSam Leffler #endif 8802f549d72SSam Leffler case S_RX_ORN: STAT(rx_orn); 8812f549d72SSam Leffler case S_RX_CRC_ERR: STAT(rx_crcerr); 8822f549d72SSam Leffler case S_RX_FIFO_ERR: STAT(rx_fifoerr); 8832f549d72SSam Leffler case S_RX_CRYPTO_ERR: STAT(rx_badcrypt); 8842f549d72SSam Leffler case S_RX_MIC_ERR: STAT(rx_badmic); 8852f549d72SSam Leffler case S_RX_PHY_ERR: STAT(rx_phyerr); 8862f549d72SSam Leffler case S_RX_PHY_UNDERRUN: PHY(HAL_PHYERR_UNDERRUN); 8872f549d72SSam Leffler case S_RX_PHY_TIMING: PHY(HAL_PHYERR_TIMING); 8882f549d72SSam Leffler case S_RX_PHY_PARITY: PHY(HAL_PHYERR_PARITY); 8892f549d72SSam Leffler case S_RX_PHY_RATE: PHY(HAL_PHYERR_RATE); 8902f549d72SSam Leffler case S_RX_PHY_LENGTH: PHY(HAL_PHYERR_LENGTH); 8912f549d72SSam Leffler case S_RX_PHY_RADAR: PHY(HAL_PHYERR_RADAR); 8922f549d72SSam Leffler case S_RX_PHY_SERVICE: PHY(HAL_PHYERR_SERVICE); 8932f549d72SSam Leffler case S_RX_PHY_TOR: PHY(HAL_PHYERR_TOR); 8942f549d72SSam Leffler case S_RX_PHY_OFDM_TIMING: PHY(HAL_PHYERR_OFDM_TIMING); 8952f549d72SSam Leffler case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY); 8962f549d72SSam Leffler case S_RX_PHY_OFDM_RATE_ILLEGAL: PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL); 8972f549d72SSam Leffler case S_RX_PHY_OFDM_POWER_DROP: PHY(HAL_PHYERR_OFDM_POWER_DROP); 8982f549d72SSam Leffler case S_RX_PHY_OFDM_SERVICE: PHY(HAL_PHYERR_OFDM_SERVICE); 8992f549d72SSam Leffler case S_RX_PHY_OFDM_RESTART: PHY(HAL_PHYERR_OFDM_RESTART); 9002f549d72SSam Leffler case S_RX_PHY_CCK_TIMING: PHY(HAL_PHYERR_CCK_TIMING); 9012f549d72SSam Leffler case S_RX_PHY_CCK_HEADER_CRC: PHY(HAL_PHYERR_CCK_HEADER_CRC); 9022f549d72SSam Leffler case S_RX_PHY_CCK_RATE_ILLEGAL: PHY(HAL_PHYERR_CCK_RATE_ILLEGAL); 9032f549d72SSam Leffler case S_RX_PHY_CCK_SERVICE: PHY(HAL_PHYERR_CCK_SERVICE); 9042f549d72SSam Leffler case S_RX_PHY_CCK_RESTART: PHY(HAL_PHYERR_CCK_RESTART); 9052f549d72SSam Leffler case S_RX_TOOSHORT: STAT(rx_tooshort); 9062f549d72SSam Leffler case S_RX_TOOBIG: STAT(rx_toobig); 9072f549d72SSam Leffler case S_RX_MGT: STAT(rx_mgt); 9082f549d72SSam Leffler case S_RX_CTL: STAT(rx_ctl); 9092f549d72SSam Leffler case S_TX_RSSI: 910207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_tx_rssi); 9112f549d72SSam Leffler return 1; 9122f549d72SSam Leffler case S_RX_RSSI: 913207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_rx_rssi); 9142f549d72SSam Leffler return 1; 9152f549d72SSam Leffler case S_BE_XMIT: STAT(be_xmit); 9162f549d72SSam Leffler case S_BE_NOMBUF: STAT(be_nombuf); 9172f549d72SSam Leffler case S_PER_CAL: STAT(per_cal); 9182f549d72SSam Leffler case S_PER_CALFAIL: STAT(per_calfail); 9192f549d72SSam Leffler case S_PER_RFGAIN: STAT(per_rfgain); 9202f549d72SSam Leffler #ifdef S_TDMA_UPDATE 9212f549d72SSam Leffler case S_TDMA_UPDATE: STAT(tdma_update); 9222f549d72SSam Leffler case S_TDMA_TIMERS: STAT(tdma_timers); 9232f549d72SSam Leffler case S_TDMA_TSF: STAT(tdma_tsf); 92410ad9a77SSam Leffler case S_TDMA_TSFADJ: 92510ad9a77SSam Leffler snprintf(b, bs, "-%d/+%d", 92610ad9a77SSam Leffler wf->total.ath.ast_tdma_tsfadjm, 92710ad9a77SSam Leffler wf->total.ath.ast_tdma_tsfadjp); 92810ad9a77SSam Leffler return 1; 929cc5912f8SSam Leffler case S_TDMA_ACK: STAT(tdma_ack); 9302f549d72SSam Leffler #endif 9312f549d72SSam Leffler case S_RATE_CALLS: STAT(rate_calls); 9322f549d72SSam Leffler case S_RATE_RAISE: STAT(rate_raise); 9332f549d72SSam Leffler case S_RATE_DROP: STAT(rate_drop); 9342f549d72SSam Leffler case S_ANT_DEFSWITCH: STAT(ant_defswitch); 9352f549d72SSam Leffler case S_ANT_TXSWITCH: STAT(ant_txswitch); 9364d490647SSam Leffler #ifdef S_ANI_NOISE 9374d490647SSam Leffler case S_ANI_NOISE: ANI(noiseImmunityLevel); 9384d490647SSam Leffler case S_ANI_SPUR: ANI(spurImmunityLevel); 9394d490647SSam Leffler case S_ANI_STEP: ANI(firstepLevel); 94004fc88d5SSam Leffler case S_ANI_OFDM: ANI(ofdmWeakSigDetectOff); 94104fc88d5SSam Leffler case S_ANI_CCK: ANI(cckWeakSigThreshold); 9424d490647SSam Leffler case S_ANI_LISTEN: ANI(listenTime); 9434d490647SSam Leffler case S_ANI_NIUP: ANISTAT(niup); 9444d490647SSam Leffler case S_ANI_NIDOWN: ANISTAT(nidown); 9454d490647SSam Leffler case S_ANI_SIUP: ANISTAT(spurup); 9464d490647SSam Leffler case S_ANI_SIDOWN: ANISTAT(spurdown); 9474d490647SSam Leffler case S_ANI_OFDMON: ANISTAT(ofdmon); 9484d490647SSam Leffler case S_ANI_OFDMOFF: ANISTAT(ofdmoff); 9494d490647SSam Leffler case S_ANI_CCKHI: ANISTAT(cckhigh); 9504d490647SSam Leffler case S_ANI_CCKLO: ANISTAT(ccklow); 9514d490647SSam Leffler case S_ANI_STEPUP: ANISTAT(stepup); 9524d490647SSam Leffler case S_ANI_STEPDOWN: ANISTAT(stepdown); 9534d490647SSam Leffler case S_ANI_OFDMERRS: ANISTAT(ofdmerrs); 9544d490647SSam Leffler case S_ANI_CCKERRS: ANISTAT(cckerrs); 9554d490647SSam Leffler case S_ANI_RESET: ANISTAT(reset); 9564d490647SSam Leffler case S_ANI_LZERO: ANISTAT(lzero); 9574d490647SSam Leffler case S_ANI_LNEG: ANISTAT(lneg); 9584d490647SSam Leffler case S_MIB_ACKBAD: MIBSTAT(ackrcv_bad); 9594d490647SSam Leffler case S_MIB_RTSBAD: MIBSTAT(rts_bad); 9604d490647SSam Leffler case S_MIB_RTSGOOD: MIBSTAT(rts_good); 9614d490647SSam Leffler case S_MIB_FCSBAD: MIBSTAT(fcs_bad); 9624d490647SSam Leffler case S_MIB_BEACONS: MIBSTAT(beacons); 9634d490647SSam Leffler case S_NODE_AVGBRSSI: 9644d490647SSam Leffler snprintf(b, bs, "%u", 9654d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgbrssi)); 9664d490647SSam Leffler return 1; 9674d490647SSam Leffler case S_NODE_AVGRSSI: 9684d490647SSam Leffler snprintf(b, bs, "%u", 9694d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgrssi)); 9704d490647SSam Leffler return 1; 9714d490647SSam Leffler case S_NODE_AVGARSSI: 9724d490647SSam Leffler snprintf(b, bs, "%u", 9734d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgtxrssi)); 9744d490647SSam Leffler return 1; 9754d490647SSam Leffler #endif 9762f549d72SSam Leffler case S_ANT_TX0: TXANT(0); 9772f549d72SSam Leffler case S_ANT_TX1: TXANT(1); 9782f549d72SSam Leffler case S_ANT_TX2: TXANT(2); 9792f549d72SSam Leffler case S_ANT_TX3: TXANT(3); 9802f549d72SSam Leffler case S_ANT_TX4: TXANT(4); 9812f549d72SSam Leffler case S_ANT_TX5: TXANT(5); 9822f549d72SSam Leffler case S_ANT_TX6: TXANT(6); 9832f549d72SSam Leffler case S_ANT_TX7: TXANT(7); 9842f549d72SSam Leffler case S_ANT_RX0: RXANT(0); 9852f549d72SSam Leffler case S_ANT_RX1: RXANT(1); 9862f549d72SSam Leffler case S_ANT_RX2: RXANT(2); 9872f549d72SSam Leffler case S_ANT_RX3: RXANT(3); 9882f549d72SSam Leffler case S_ANT_RX4: RXANT(4); 9892f549d72SSam Leffler case S_ANT_RX5: RXANT(5); 9902f549d72SSam Leffler case S_ANT_RX6: RXANT(6); 9912f549d72SSam Leffler case S_ANT_RX7: RXANT(7); 9922f549d72SSam Leffler #ifdef S_CABQ_XMIT 9932f549d72SSam Leffler case S_CABQ_XMIT: STAT(cabq_xmit); 9942f549d72SSam Leffler case S_CABQ_BUSY: STAT(cabq_busy); 9952f549d72SSam Leffler #endif 9962f549d72SSam Leffler case S_FF_TXOK: STAT(ff_txok); 9972f549d72SSam Leffler case S_FF_TXERR: STAT(ff_txerr); 998207ae002SSam Leffler case S_FF_RX: STAT(ff_rx); 9992f549d72SSam Leffler case S_FF_FLUSH: STAT(ff_flush); 1000207ae002SSam Leffler case S_TX_QFULL: STAT(tx_qfull); 1001d90b001eSAdrian Chadd case S_BMISSCOUNT: STAT(be_missed); 10022f549d72SSam Leffler case S_RX_NOISE: 1003207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_rx_noise); 10042f549d72SSam Leffler return 1; 10052f549d72SSam Leffler case S_TX_SIGNAL: 10062f549d72SSam Leffler snprintf(b, bs, "%d", 1007207ae002SSam Leffler wf->total.ath.ast_tx_rssi + wf->total.ath.ast_rx_noise); 10082f549d72SSam Leffler return 1; 10092f549d72SSam Leffler case S_RX_SIGNAL: 10102f549d72SSam Leffler snprintf(b, bs, "%d", 1011207ae002SSam Leffler wf->total.ath.ast_rx_rssi + wf->total.ath.ast_rx_noise); 10122f549d72SSam Leffler return 1; 1013b1b75b3bSAdrian Chadd case S_RX_AGG: STAT(rx_agg); 1014b1b75b3bSAdrian Chadd case S_RX_HALFGI: STAT(rx_halfgi); 1015b1b75b3bSAdrian Chadd case S_RX_2040: STAT(rx_2040); 1016b1b75b3bSAdrian Chadd case S_RX_PRE_CRC_ERR: STAT(rx_pre_crc_err); 1017b1b75b3bSAdrian Chadd case S_RX_POST_CRC_ERR: STAT(rx_post_crc_err); 1018b1b75b3bSAdrian Chadd case S_RX_DECRYPT_BUSY_ERR: STAT(rx_decrypt_busy_err); 1019b1b75b3bSAdrian Chadd case S_RX_HI_CHAIN: STAT(rx_hi_rx_chain); 10202cdc5a48SAdrian Chadd case S_RX_STBC: STAT(rx_stbc); 1021b1b75b3bSAdrian Chadd case S_TX_HTPROTECT: STAT(tx_htprotect); 1022b1b75b3bSAdrian Chadd case S_RX_QEND: STAT(rx_hitqueueend); 1023b1b75b3bSAdrian Chadd case S_TX_TIMEOUT: STAT(tx_timeout); 1024b1b75b3bSAdrian Chadd case S_TX_CSTIMEOUT: STAT(tx_cst); 1025b1b75b3bSAdrian Chadd case S_TX_XTXOP_ERR: STAT(tx_xtxop); 1026b1b75b3bSAdrian Chadd case S_TX_TIMEREXPIRED_ERR: STAT(tx_timerexpired); 1027b1b75b3bSAdrian Chadd case S_TX_DESCCFG_ERR: STAT(tx_desccfgerr); 1028b1b75b3bSAdrian Chadd case S_TX_SWRETRIES: STAT(tx_swretries); 1029b1b75b3bSAdrian Chadd case S_TX_SWRETRIES_MAX: STAT(tx_swretrymax); 1030b1b75b3bSAdrian Chadd case S_TX_DATA_UNDERRUN: STAT(tx_data_underrun); 1031b1b75b3bSAdrian Chadd case S_TX_DELIM_UNDERRUN: STAT(tx_delim_underrun); 10321df8da4cSAdrian Chadd case S_TX_AGGR_OK: STAT(tx_aggr_ok); 10331df8da4cSAdrian Chadd case S_TX_AGGR_FAIL: STAT(tx_aggr_fail); 10341df8da4cSAdrian Chadd case S_TX_AGGR_FAILALL: STAT(tx_aggr_failall); 10352f549d72SSam Leffler } 10362f549d72SSam Leffler b[0] = '\0'; 10372f549d72SSam Leffler return 0; 10382f549d72SSam Leffler #undef RXANT 10392f549d72SSam Leffler #undef TXANT 10404d490647SSam Leffler #undef ANI 10414d490647SSam Leffler #undef ANISTAT 10424d490647SSam Leffler #undef MIBSTAT 10432f549d72SSam Leffler #undef PHY 10442f549d72SSam Leffler #undef STAT 10452f549d72SSam Leffler } 10462f549d72SSam Leffler 10472f549d72SSam Leffler static void 1048*15abc53aSAdrian Chadd ath_print_verbose(struct bsdstat *sf, FILE *fd) 10492f549d72SSam Leffler { 10502f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 10512f549d72SSam Leffler #define isphyerr(i) (S_PHY_MIN <= i && i <= S_PHY_MAX) 1052207ae002SSam Leffler const struct fmt *f; 10532f549d72SSam Leffler char s[32]; 10542f549d72SSam Leffler const char *indent; 1055207ae002SSam Leffler int i, width; 10562f549d72SSam Leffler 1057207ae002SSam Leffler width = 0; 1058207ae002SSam Leffler for (i = 0; i < S_LAST; i++) { 1059207ae002SSam Leffler f = &sf->stats[i]; 1060207ae002SSam Leffler if (!isphyerr(i) && f->width > width) 1061207ae002SSam Leffler width = f->width; 1062207ae002SSam Leffler } 10632f549d72SSam Leffler for (i = 0; i < S_LAST; i++) { 10642f549d72SSam Leffler if (ath_get_totstat(sf, i, s, sizeof(s)) && strcmp(s, "0")) { 10652f549d72SSam Leffler if (isphyerr(i)) 10662f549d72SSam Leffler indent = " "; 10672f549d72SSam Leffler else 10682f549d72SSam Leffler indent = ""; 1069207ae002SSam Leffler fprintf(fd, "%s%-*s %s\n", indent, width, s, athstats[i].desc); 10702f549d72SSam Leffler } 10712f549d72SSam Leffler } 10722f549d72SSam Leffler fprintf(fd, "Antenna profile:\n"); 10732f549d72SSam Leffler for (i = 0; i < 8; i++) 1074207ae002SSam Leffler if (wf->total.ath.ast_ant_rx[i] || wf->total.ath.ast_ant_tx[i]) 10752f549d72SSam Leffler fprintf(fd, "[%u] tx %8u rx %8u\n", i, 1076207ae002SSam Leffler wf->total.ath.ast_ant_tx[i], 1077207ae002SSam Leffler wf->total.ath.ast_ant_rx[i]); 10782f549d72SSam Leffler #undef isphyerr 10792f549d72SSam Leffler } 10802f549d72SSam Leffler 1081*15abc53aSAdrian Chadd BSDSTAT_DEFINE_BOUNCE(athstatfoo) 10822f549d72SSam Leffler 10832f549d72SSam Leffler struct athstatfoo * 10842f549d72SSam Leffler athstats_new(const char *ifname, const char *fmtstring) 10852f549d72SSam Leffler { 10862f549d72SSam Leffler #define N(a) (sizeof(a) / sizeof(a[0])) 10872f549d72SSam Leffler struct athstatfoo_p *wf; 10882f549d72SSam Leffler 10892f549d72SSam Leffler wf = calloc(1, sizeof(struct athstatfoo_p)); 10902f549d72SSam Leffler if (wf != NULL) { 1091*15abc53aSAdrian Chadd bsdstat_init(&wf->base.base, "athstats", athstats, N(athstats)); 10922f549d72SSam Leffler /* override base methods */ 10932f549d72SSam Leffler wf->base.base.collect_cur = ath_collect_cur; 10942f549d72SSam Leffler wf->base.base.collect_tot = ath_collect_tot; 10952f549d72SSam Leffler wf->base.base.get_curstat = ath_get_curstat; 10962f549d72SSam Leffler wf->base.base.get_totstat = ath_get_totstat; 10972f549d72SSam Leffler wf->base.base.update_tot = ath_update_tot; 10982f549d72SSam Leffler wf->base.base.print_verbose = ath_print_verbose; 10992f549d72SSam Leffler 11002f549d72SSam Leffler /* setup bounce functions for public methods */ 1101*15abc53aSAdrian Chadd BSDSTAT_BOUNCE(wf, athstatfoo); 11022f549d72SSam Leffler 11032f549d72SSam Leffler /* setup our public methods */ 11042f549d72SSam Leffler wf->base.setifname = ath_setifname; 11052f549d72SSam Leffler #if 0 11062f549d72SSam Leffler wf->base.setstamac = wlan_setstamac; 11072f549d72SSam Leffler #endif 1108dd8d00f5SSam Leffler wf->base.zerostats = ath_zerostats; 11092f549d72SSam Leffler wf->s = socket(AF_INET, SOCK_DGRAM, 0); 11102f549d72SSam Leffler if (wf->s < 0) 11112f549d72SSam Leffler err(1, "socket"); 11122f549d72SSam Leffler 11132f549d72SSam Leffler ath_setifname(&wf->base, ifname); 11142f549d72SSam Leffler wf->base.setfmt(&wf->base, fmtstring); 11152f549d72SSam Leffler } 11162f549d72SSam Leffler return &wf->base; 11172f549d72SSam Leffler #undef N 111812f961f4SSam Leffler } 1119